./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe012_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe012_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash deb7e396b2920059d9c698c5c1e79cf35a979506 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 22:06:39,304 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 22:06:39,306 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 22:06:39,323 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 22:06:39,323 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 22:06:39,325 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 22:06:39,328 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 22:06:39,344 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 22:06:39,347 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 22:06:39,350 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 22:06:39,351 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 22:06:39,355 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 22:06:39,355 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 22:06:39,356 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 22:06:39,357 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 22:06:39,358 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 22:06:39,359 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 22:06:39,360 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 22:06:39,362 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 22:06:39,364 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 22:06:39,366 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 22:06:39,367 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 22:06:39,369 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 22:06:39,369 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 22:06:39,372 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 22:06:39,372 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 22:06:39,373 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 22:06:39,374 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 22:06:39,374 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 22:06:39,375 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 22:06:39,375 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 22:06:39,376 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 22:06:39,377 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 22:06:39,378 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 22:06:39,379 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 22:06:39,379 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 22:06:39,380 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 22:06:39,380 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 22:06:39,380 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 22:06:39,381 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 22:06:39,382 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 22:06:39,383 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 22:06:39,404 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 22:06:39,404 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 22:06:39,406 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 22:06:39,406 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 22:06:39,406 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 22:06:39,407 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 22:06:39,407 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 22:06:39,407 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 22:06:39,408 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 22:06:39,408 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 22:06:39,408 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 22:06:39,408 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 22:06:39,409 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 22:06:39,409 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 22:06:39,409 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 22:06:39,409 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 22:06:39,410 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 22:06:39,410 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 22:06:39,410 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 22:06:39,411 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 22:06:39,411 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 22:06:39,411 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 22:06:39,411 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 22:06:39,412 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 22:06:39,412 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 22:06:39,412 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 22:06:39,413 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 22:06:39,413 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 22:06:39,413 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> deb7e396b2920059d9c698c5c1e79cf35a979506 [2019-11-15 22:06:39,449 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 22:06:39,468 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 22:06:39,473 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 22:06:39,476 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 22:06:39,477 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 22:06:39,479 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe012_rmo.oepc.i [2019-11-15 22:06:39,557 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/data/5b246c853/4591ed5b40614e37acde1234fc4086b8/FLAG5f60e5e9c [2019-11-15 22:06:40,192 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 22:06:40,193 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/sv-benchmarks/c/pthread-wmm/safe012_rmo.oepc.i [2019-11-15 22:06:40,225 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/data/5b246c853/4591ed5b40614e37acde1234fc4086b8/FLAG5f60e5e9c [2019-11-15 22:06:40,439 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/data/5b246c853/4591ed5b40614e37acde1234fc4086b8 [2019-11-15 22:06:40,442 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 22:06:40,444 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 22:06:40,451 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 22:06:40,451 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 22:06:40,457 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 22:06:40,458 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 10:06:40" (1/1) ... [2019-11-15 22:06:40,461 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4c9aaf7b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:40, skipping insertion in model container [2019-11-15 22:06:40,462 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 10:06:40" (1/1) ... [2019-11-15 22:06:40,470 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 22:06:40,525 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 22:06:41,064 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 22:06:41,081 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 22:06:41,185 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 22:06:41,271 INFO L192 MainTranslator]: Completed translation [2019-11-15 22:06:41,272 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41 WrapperNode [2019-11-15 22:06:41,272 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 22:06:41,274 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 22:06:41,274 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 22:06:41,275 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 22:06:41,286 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,319 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,352 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 22:06:41,352 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 22:06:41,353 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 22:06:41,353 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 22:06:41,362 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,362 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,367 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,368 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,380 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,384 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,388 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... [2019-11-15 22:06:41,394 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 22:06:41,395 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 22:06:41,395 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 22:06:41,395 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 22:06:41,396 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 22:06:41,466 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-11-15 22:06:41,466 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 22:06:41,466 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 22:06:41,466 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 22:06:41,467 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 22:06:41,467 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 22:06:41,467 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 22:06:41,467 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 22:06:41,467 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 22:06:41,468 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-15 22:06:41,468 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-15 22:06:41,468 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-11-15 22:06:41,468 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 22:06:41,468 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 22:06:41,468 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 22:06:41,471 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 22:06:42,473 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 22:06:42,474 INFO L284 CfgBuilder]: Removed 6 assume(true) statements. [2019-11-15 22:06:42,475 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:06:42 BoogieIcfgContainer [2019-11-15 22:06:42,475 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 22:06:42,477 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 22:06:42,477 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 22:06:42,480 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 22:06:42,480 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 10:06:40" (1/3) ... [2019-11-15 22:06:42,481 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@46fb35a0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 10:06:42, skipping insertion in model container [2019-11-15 22:06:42,481 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:06:41" (2/3) ... [2019-11-15 22:06:42,482 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@46fb35a0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 10:06:42, skipping insertion in model container [2019-11-15 22:06:42,482 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:06:42" (3/3) ... [2019-11-15 22:06:42,484 INFO L109 eAbstractionObserver]: Analyzing ICFG safe012_rmo.oepc.i [2019-11-15 22:06:42,533 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,534 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,534 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,534 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,534 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,535 WARN L315 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,535 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,535 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,535 WARN L315 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,536 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,536 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,537 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,537 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,537 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,537 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,538 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,538 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,538 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,539 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,539 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,539 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,540 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,540 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,540 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,540 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,541 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,549 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,549 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,549 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,558 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,558 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,558 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,559 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,559 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,560 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,560 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,560 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,562 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,562 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,563 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,564 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,564 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,565 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,567 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,567 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,568 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,569 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,570 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,570 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,571 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,571 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,572 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,573 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,573 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,573 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,574 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,574 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,574 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,575 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,575 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,576 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,578 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,579 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,579 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,579 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,579 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,580 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,581 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,581 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,581 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,581 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,582 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,582 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,582 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,583 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,583 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,584 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,584 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,584 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,584 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,585 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,585 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,585 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,586 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,590 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,593 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,594 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,594 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,594 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,595 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,595 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,595 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,595 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,596 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,597 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,598 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,598 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,598 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,598 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,599 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,600 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,600 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,601 WARN L315 ript$VariableManager]: TermVariabe Thread2_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,601 WARN L315 ript$VariableManager]: TermVariabe Thread2_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,601 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,602 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,603 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,604 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,604 WARN L315 ript$VariableManager]: TermVariabe Thread0_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,605 WARN L315 ript$VariableManager]: TermVariabe Thread0_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,605 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,606 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,606 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,606 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,607 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,607 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,607 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,607 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,608 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,608 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,608 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,609 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,609 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,609 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,609 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,610 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,610 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,610 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,611 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,611 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,611 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,611 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,612 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,613 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,613 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,613 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,613 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,614 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:06:42,631 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 22:06:42,631 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 22:06:42,640 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-11-15 22:06:42,660 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-11-15 22:06:42,688 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 22:06:42,688 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 22:06:42,689 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 22:06:42,689 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 22:06:42,689 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 22:06:42,689 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 22:06:42,689 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 22:06:42,689 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 22:06:42,705 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 160 places, 192 transitions [2019-11-15 22:06:58,279 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 101068 states. [2019-11-15 22:06:58,286 INFO L276 IsEmpty]: Start isEmpty. Operand 101068 states. [2019-11-15 22:06:58,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 22:06:58,450 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:06:58,452 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:06:58,454 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:06:58,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:06:58,462 INFO L82 PathProgramCache]: Analyzing trace with hash 709219595, now seen corresponding path program 1 times [2019-11-15 22:06:58,471 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:06:58,472 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747412562] [2019-11-15 22:06:58,472 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:06:58,472 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:06:58,473 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:06:58,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:06:58,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:06:58,787 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747412562] [2019-11-15 22:06:58,788 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:06:58,788 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:06:58,788 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2060613185] [2019-11-15 22:06:58,793 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:06:58,794 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:06:58,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:06:58,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:06:58,813 INFO L87 Difference]: Start difference. First operand 101068 states. Second operand 3 states. [2019-11-15 22:07:00,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:00,617 INFO L93 Difference]: Finished difference Result 112844 states and 526572 transitions. [2019-11-15 22:07:00,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:07:00,619 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 22:07:00,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:02,365 INFO L225 Difference]: With dead ends: 112844 [2019-11-15 22:07:02,365 INFO L226 Difference]: Without dead ends: 83404 [2019-11-15 22:07:02,367 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:07:03,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83404 states. [2019-11-15 22:07:07,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83404 to 77516. [2019-11-15 22:07:07,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77516 states. [2019-11-15 22:07:07,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77516 states to 77516 states and 367692 transitions. [2019-11-15 22:07:07,912 INFO L78 Accepts]: Start accepts. Automaton has 77516 states and 367692 transitions. Word has length 79 [2019-11-15 22:07:07,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:07,919 INFO L462 AbstractCegarLoop]: Abstraction has 77516 states and 367692 transitions. [2019-11-15 22:07:07,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:07:07,920 INFO L276 IsEmpty]: Start isEmpty. Operand 77516 states and 367692 transitions. [2019-11-15 22:07:08,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 22:07:08,042 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:08,043 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:08,043 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:08,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:08,044 INFO L82 PathProgramCache]: Analyzing trace with hash -798332214, now seen corresponding path program 1 times [2019-11-15 22:07:08,044 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:08,044 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1978056479] [2019-11-15 22:07:08,044 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:08,045 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:08,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:08,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:08,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:08,288 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1978056479] [2019-11-15 22:07:08,288 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:08,288 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:07:08,289 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [447569648] [2019-11-15 22:07:08,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:07:08,291 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:08,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:07:08,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:07:08,292 INFO L87 Difference]: Start difference. First operand 77516 states and 367692 transitions. Second operand 4 states. [2019-11-15 22:07:09,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:09,619 INFO L93 Difference]: Finished difference Result 109792 states and 491927 transitions. [2019-11-15 22:07:09,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:07:09,619 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 22:07:09,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:10,129 INFO L225 Difference]: With dead ends: 109792 [2019-11-15 22:07:10,129 INFO L226 Difference]: Without dead ends: 109792 [2019-11-15 22:07:10,130 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:11,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109792 states. [2019-11-15 22:07:21,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109792 to 105944. [2019-11-15 22:07:21,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105944 states. [2019-11-15 22:07:22,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105944 states to 105944 states and 476905 transitions. [2019-11-15 22:07:22,149 INFO L78 Accepts]: Start accepts. Automaton has 105944 states and 476905 transitions. Word has length 79 [2019-11-15 22:07:22,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:22,149 INFO L462 AbstractCegarLoop]: Abstraction has 105944 states and 476905 transitions. [2019-11-15 22:07:22,150 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:07:22,150 INFO L276 IsEmpty]: Start isEmpty. Operand 105944 states and 476905 transitions. [2019-11-15 22:07:22,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 22:07:22,198 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:22,198 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:22,198 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:22,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:22,199 INFO L82 PathProgramCache]: Analyzing trace with hash -229579307, now seen corresponding path program 1 times [2019-11-15 22:07:22,199 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:22,199 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957184044] [2019-11-15 22:07:22,199 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:22,200 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:22,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:22,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:22,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:22,392 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957184044] [2019-11-15 22:07:22,392 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:22,392 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:07:22,393 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1442414236] [2019-11-15 22:07:22,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:07:22,393 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:22,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:07:22,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:07:22,394 INFO L87 Difference]: Start difference. First operand 105944 states and 476905 transitions. Second operand 6 states. [2019-11-15 22:07:25,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:25,914 INFO L93 Difference]: Finished difference Result 144292 states and 623102 transitions. [2019-11-15 22:07:25,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:07:25,915 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2019-11-15 22:07:25,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:26,419 INFO L225 Difference]: With dead ends: 144292 [2019-11-15 22:07:26,419 INFO L226 Difference]: Without dead ends: 144292 [2019-11-15 22:07:26,420 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:07:27,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144292 states. [2019-11-15 22:07:29,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144292 to 126276. [2019-11-15 22:07:29,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126276 states. [2019-11-15 22:07:30,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126276 states to 126276 states and 553838 transitions. [2019-11-15 22:07:30,070 INFO L78 Accepts]: Start accepts. Automaton has 126276 states and 553838 transitions. Word has length 81 [2019-11-15 22:07:30,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:30,071 INFO L462 AbstractCegarLoop]: Abstraction has 126276 states and 553838 transitions. [2019-11-15 22:07:30,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:07:30,071 INFO L276 IsEmpty]: Start isEmpty. Operand 126276 states and 553838 transitions. [2019-11-15 22:07:31,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 22:07:31,567 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:31,567 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:31,567 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:31,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:31,568 INFO L82 PathProgramCache]: Analyzing trace with hash 967458166, now seen corresponding path program 1 times [2019-11-15 22:07:31,568 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:31,568 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050802300] [2019-11-15 22:07:31,568 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:31,568 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:31,568 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:31,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:31,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:31,731 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050802300] [2019-11-15 22:07:31,731 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:31,732 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:07:31,732 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434139245] [2019-11-15 22:07:31,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:07:31,734 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:31,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:07:31,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:07:31,734 INFO L87 Difference]: Start difference. First operand 126276 states and 553838 transitions. Second operand 4 states. [2019-11-15 22:07:32,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:32,410 INFO L93 Difference]: Finished difference Result 106098 states and 453188 transitions. [2019-11-15 22:07:32,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:07:32,411 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2019-11-15 22:07:32,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:32,939 INFO L225 Difference]: With dead ends: 106098 [2019-11-15 22:07:32,939 INFO L226 Difference]: Without dead ends: 103378 [2019-11-15 22:07:32,940 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:33,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103378 states. [2019-11-15 22:07:35,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103378 to 103378. [2019-11-15 22:07:35,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103378 states. [2019-11-15 22:07:35,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103378 states to 103378 states and 443505 transitions. [2019-11-15 22:07:35,519 INFO L78 Accepts]: Start accepts. Automaton has 103378 states and 443505 transitions. Word has length 81 [2019-11-15 22:07:35,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:35,519 INFO L462 AbstractCegarLoop]: Abstraction has 103378 states and 443505 transitions. [2019-11-15 22:07:35,519 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:07:35,519 INFO L276 IsEmpty]: Start isEmpty. Operand 103378 states and 443505 transitions. [2019-11-15 22:07:35,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:07:35,552 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:35,552 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:35,552 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:35,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:35,553 INFO L82 PathProgramCache]: Analyzing trace with hash 167888710, now seen corresponding path program 1 times [2019-11-15 22:07:35,553 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:35,553 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662786785] [2019-11-15 22:07:35,553 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:35,553 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:35,554 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:35,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:35,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:35,728 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662786785] [2019-11-15 22:07:35,728 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:35,728 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:07:35,729 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [762233785] [2019-11-15 22:07:35,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:07:35,730 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:35,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:07:35,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:35,730 INFO L87 Difference]: Start difference. First operand 103378 states and 443505 transitions. Second operand 5 states. [2019-11-15 22:07:36,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:36,815 INFO L93 Difference]: Finished difference Result 29410 states and 112481 transitions. [2019-11-15 22:07:36,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 22:07:36,816 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-11-15 22:07:36,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:36,882 INFO L225 Difference]: With dead ends: 29410 [2019-11-15 22:07:36,882 INFO L226 Difference]: Without dead ends: 27193 [2019-11-15 22:07:36,883 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:07:36,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27193 states. [2019-11-15 22:07:37,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27193 to 27193. [2019-11-15 22:07:37,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27193 states. [2019-11-15 22:07:37,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27193 states to 27193 states and 103539 transitions. [2019-11-15 22:07:37,403 INFO L78 Accepts]: Start accepts. Automaton has 27193 states and 103539 transitions. Word has length 82 [2019-11-15 22:07:37,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:37,403 INFO L462 AbstractCegarLoop]: Abstraction has 27193 states and 103539 transitions. [2019-11-15 22:07:37,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:07:37,404 INFO L276 IsEmpty]: Start isEmpty. Operand 27193 states and 103539 transitions. [2019-11-15 22:07:37,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 22:07:37,426 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:37,427 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:37,427 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:37,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:37,428 INFO L82 PathProgramCache]: Analyzing trace with hash 212812663, now seen corresponding path program 1 times [2019-11-15 22:07:37,428 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:37,428 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352011607] [2019-11-15 22:07:37,428 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:37,429 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:37,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:37,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:37,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:37,533 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352011607] [2019-11-15 22:07:37,533 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:37,533 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:07:37,533 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946569688] [2019-11-15 22:07:37,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:07:37,534 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:37,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:07:37,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:07:37,535 INFO L87 Difference]: Start difference. First operand 27193 states and 103539 transitions. Second operand 4 states. [2019-11-15 22:07:37,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:37,966 INFO L93 Difference]: Finished difference Result 26475 states and 99467 transitions. [2019-11-15 22:07:37,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:07:37,967 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2019-11-15 22:07:37,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:38,029 INFO L225 Difference]: With dead ends: 26475 [2019-11-15 22:07:38,030 INFO L226 Difference]: Without dead ends: 26475 [2019-11-15 22:07:38,030 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:38,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26475 states. [2019-11-15 22:07:38,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26475 to 25098. [2019-11-15 22:07:38,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25098 states. [2019-11-15 22:07:38,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25098 states to 25098 states and 94571 transitions. [2019-11-15 22:07:38,522 INFO L78 Accepts]: Start accepts. Automaton has 25098 states and 94571 transitions. Word has length 93 [2019-11-15 22:07:38,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:38,522 INFO L462 AbstractCegarLoop]: Abstraction has 25098 states and 94571 transitions. [2019-11-15 22:07:38,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:07:38,522 INFO L276 IsEmpty]: Start isEmpty. Operand 25098 states and 94571 transitions. [2019-11-15 22:07:38,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:07:38,555 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:38,555 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:38,555 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:38,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:38,556 INFO L82 PathProgramCache]: Analyzing trace with hash -1666832320, now seen corresponding path program 1 times [2019-11-15 22:07:38,556 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:38,556 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96215370] [2019-11-15 22:07:38,557 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:38,557 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:38,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:38,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:38,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:38,663 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96215370] [2019-11-15 22:07:38,664 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:38,664 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:07:38,664 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [678143814] [2019-11-15 22:07:38,665 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:07:38,665 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:38,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:07:38,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:38,666 INFO L87 Difference]: Start difference. First operand 25098 states and 94571 transitions. Second operand 5 states. [2019-11-15 22:07:39,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:39,517 INFO L93 Difference]: Finished difference Result 46462 states and 173590 transitions. [2019-11-15 22:07:39,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 22:07:39,518 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 22:07:39,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:39,629 INFO L225 Difference]: With dead ends: 46462 [2019-11-15 22:07:39,629 INFO L226 Difference]: Without dead ends: 46462 [2019-11-15 22:07:39,629 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 22:07:39,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46462 states. [2019-11-15 22:07:40,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46462 to 17661. [2019-11-15 22:07:40,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17661 states. [2019-11-15 22:07:40,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17661 states to 17661 states and 66368 transitions. [2019-11-15 22:07:40,201 INFO L78 Accepts]: Start accepts. Automaton has 17661 states and 66368 transitions. Word has length 95 [2019-11-15 22:07:40,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:40,202 INFO L462 AbstractCegarLoop]: Abstraction has 17661 states and 66368 transitions. [2019-11-15 22:07:40,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:07:40,202 INFO L276 IsEmpty]: Start isEmpty. Operand 17661 states and 66368 transitions. [2019-11-15 22:07:40,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:07:40,224 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:40,225 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:40,225 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:40,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:40,226 INFO L82 PathProgramCache]: Analyzing trace with hash 831183617, now seen corresponding path program 1 times [2019-11-15 22:07:40,226 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:40,226 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981442637] [2019-11-15 22:07:40,226 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:40,227 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:40,227 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:40,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:40,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:40,315 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981442637] [2019-11-15 22:07:40,315 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:40,316 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:07:40,316 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [491368814] [2019-11-15 22:07:40,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:07:40,317 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:40,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:07:40,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:07:40,317 INFO L87 Difference]: Start difference. First operand 17661 states and 66368 transitions. Second operand 4 states. [2019-11-15 22:07:40,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:40,636 INFO L93 Difference]: Finished difference Result 22409 states and 83382 transitions. [2019-11-15 22:07:40,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:07:40,637 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 22:07:40,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:40,702 INFO L225 Difference]: With dead ends: 22409 [2019-11-15 22:07:40,702 INFO L226 Difference]: Without dead ends: 22409 [2019-11-15 22:07:40,703 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:40,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22409 states. [2019-11-15 22:07:41,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22409 to 19475. [2019-11-15 22:07:41,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19475 states. [2019-11-15 22:07:41,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19475 states to 19475 states and 72567 transitions. [2019-11-15 22:07:41,229 INFO L78 Accepts]: Start accepts. Automaton has 19475 states and 72567 transitions. Word has length 95 [2019-11-15 22:07:41,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:41,230 INFO L462 AbstractCegarLoop]: Abstraction has 19475 states and 72567 transitions. [2019-11-15 22:07:41,230 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:07:41,230 INFO L276 IsEmpty]: Start isEmpty. Operand 19475 states and 72567 transitions. [2019-11-15 22:07:41,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:07:41,252 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:41,253 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:41,253 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:41,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:41,254 INFO L82 PathProgramCache]: Analyzing trace with hash -165888736, now seen corresponding path program 1 times [2019-11-15 22:07:41,254 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:41,254 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176981905] [2019-11-15 22:07:41,254 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:41,255 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:41,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:41,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:41,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:41,343 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176981905] [2019-11-15 22:07:41,344 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:41,344 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:07:41,344 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315274403] [2019-11-15 22:07:41,345 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:07:41,345 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:41,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:07:41,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:07:41,346 INFO L87 Difference]: Start difference. First operand 19475 states and 72567 transitions. Second operand 4 states. [2019-11-15 22:07:42,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:42,012 INFO L93 Difference]: Finished difference Result 23597 states and 87612 transitions. [2019-11-15 22:07:42,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:07:42,013 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 22:07:42,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:42,076 INFO L225 Difference]: With dead ends: 23597 [2019-11-15 22:07:42,078 INFO L226 Difference]: Without dead ends: 22814 [2019-11-15 22:07:42,078 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:42,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22814 states. [2019-11-15 22:07:42,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22814 to 21923. [2019-11-15 22:07:42,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21923 states. [2019-11-15 22:07:42,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21923 states to 21923 states and 81375 transitions. [2019-11-15 22:07:42,553 INFO L78 Accepts]: Start accepts. Automaton has 21923 states and 81375 transitions. Word has length 95 [2019-11-15 22:07:42,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:42,553 INFO L462 AbstractCegarLoop]: Abstraction has 21923 states and 81375 transitions. [2019-11-15 22:07:42,553 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:07:42,553 INFO L276 IsEmpty]: Start isEmpty. Operand 21923 states and 81375 transitions. [2019-11-15 22:07:42,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:07:42,576 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:42,576 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:42,576 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:42,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:42,576 INFO L82 PathProgramCache]: Analyzing trace with hash -459291743, now seen corresponding path program 1 times [2019-11-15 22:07:42,576 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:42,577 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286576373] [2019-11-15 22:07:42,577 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:42,577 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:42,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:42,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:42,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:42,769 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286576373] [2019-11-15 22:07:42,770 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:42,770 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 22:07:42,770 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1907069251] [2019-11-15 22:07:42,771 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 22:07:42,771 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:42,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 22:07:42,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:07:42,772 INFO L87 Difference]: Start difference. First operand 21923 states and 81375 transitions. Second operand 8 states. [2019-11-15 22:07:44,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:44,133 INFO L93 Difference]: Finished difference Result 32302 states and 116132 transitions. [2019-11-15 22:07:44,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 22:07:44,134 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2019-11-15 22:07:44,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:44,226 INFO L225 Difference]: With dead ends: 32302 [2019-11-15 22:07:44,227 INFO L226 Difference]: Without dead ends: 32302 [2019-11-15 22:07:44,233 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-11-15 22:07:44,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32302 states. [2019-11-15 22:07:44,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32302 to 26668. [2019-11-15 22:07:44,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26668 states. [2019-11-15 22:07:44,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26668 states to 26668 states and 96482 transitions. [2019-11-15 22:07:44,805 INFO L78 Accepts]: Start accepts. Automaton has 26668 states and 96482 transitions. Word has length 95 [2019-11-15 22:07:44,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:44,805 INFO L462 AbstractCegarLoop]: Abstraction has 26668 states and 96482 transitions. [2019-11-15 22:07:44,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 22:07:44,805 INFO L276 IsEmpty]: Start isEmpty. Operand 26668 states and 96482 transitions. [2019-11-15 22:07:44,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:07:44,835 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:44,835 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:44,835 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:44,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:44,835 INFO L82 PathProgramCache]: Analyzing trace with hash -60367708, now seen corresponding path program 1 times [2019-11-15 22:07:44,836 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:44,836 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106451803] [2019-11-15 22:07:44,836 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:44,836 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:44,836 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:44,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:44,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:44,996 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [106451803] [2019-11-15 22:07:44,996 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:44,996 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:07:44,996 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178332098] [2019-11-15 22:07:44,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:07:44,997 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:44,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:07:44,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:07:44,998 INFO L87 Difference]: Start difference. First operand 26668 states and 96482 transitions. Second operand 6 states. [2019-11-15 22:07:45,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:45,116 INFO L93 Difference]: Finished difference Result 7840 states and 24704 transitions. [2019-11-15 22:07:45,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:07:45,117 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 22:07:45,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:45,127 INFO L225 Difference]: With dead ends: 7840 [2019-11-15 22:07:45,127 INFO L226 Difference]: Without dead ends: 6661 [2019-11-15 22:07:45,127 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-11-15 22:07:45,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6661 states. [2019-11-15 22:07:45,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6661 to 6565. [2019-11-15 22:07:45,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6565 states. [2019-11-15 22:07:45,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6565 states to 6565 states and 20284 transitions. [2019-11-15 22:07:45,222 INFO L78 Accepts]: Start accepts. Automaton has 6565 states and 20284 transitions. Word has length 95 [2019-11-15 22:07:45,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:45,222 INFO L462 AbstractCegarLoop]: Abstraction has 6565 states and 20284 transitions. [2019-11-15 22:07:45,222 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:07:45,223 INFO L276 IsEmpty]: Start isEmpty. Operand 6565 states and 20284 transitions. [2019-11-15 22:07:45,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2019-11-15 22:07:45,230 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:45,230 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:45,230 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:45,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:45,231 INFO L82 PathProgramCache]: Analyzing trace with hash -653921087, now seen corresponding path program 1 times [2019-11-15 22:07:45,231 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:45,231 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104854350] [2019-11-15 22:07:45,232 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:45,232 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:45,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:45,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:45,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:45,295 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104854350] [2019-11-15 22:07:45,296 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:45,296 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:07:45,296 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [172092447] [2019-11-15 22:07:45,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:07:45,297 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:45,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:07:45,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:07:45,298 INFO L87 Difference]: Start difference. First operand 6565 states and 20284 transitions. Second operand 3 states. [2019-11-15 22:07:45,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:45,414 INFO L93 Difference]: Finished difference Result 7001 states and 21651 transitions. [2019-11-15 22:07:45,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:07:45,414 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 110 [2019-11-15 22:07:45,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:45,424 INFO L225 Difference]: With dead ends: 7001 [2019-11-15 22:07:45,425 INFO L226 Difference]: Without dead ends: 7001 [2019-11-15 22:07:45,425 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:07:45,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7001 states. [2019-11-15 22:07:45,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7001 to 6749. [2019-11-15 22:07:45,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6749 states. [2019-11-15 22:07:45,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6749 states to 6749 states and 20862 transitions. [2019-11-15 22:07:45,523 INFO L78 Accepts]: Start accepts. Automaton has 6749 states and 20862 transitions. Word has length 110 [2019-11-15 22:07:45,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:45,524 INFO L462 AbstractCegarLoop]: Abstraction has 6749 states and 20862 transitions. [2019-11-15 22:07:45,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:07:45,524 INFO L276 IsEmpty]: Start isEmpty. Operand 6749 states and 20862 transitions. [2019-11-15 22:07:45,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2019-11-15 22:07:45,532 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:45,532 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:45,532 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:45,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:45,532 INFO L82 PathProgramCache]: Analyzing trace with hash 308045187, now seen corresponding path program 1 times [2019-11-15 22:07:45,532 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:45,533 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605987084] [2019-11-15 22:07:45,533 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:45,533 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:45,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:45,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:45,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:45,603 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [605987084] [2019-11-15 22:07:45,603 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:45,604 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:07:45,604 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1092959828] [2019-11-15 22:07:45,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:07:45,605 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:45,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:07:45,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:07:45,605 INFO L87 Difference]: Start difference. First operand 6749 states and 20862 transitions. Second operand 4 states. [2019-11-15 22:07:45,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:45,780 INFO L93 Difference]: Finished difference Result 9123 states and 27956 transitions. [2019-11-15 22:07:45,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:07:45,781 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 110 [2019-11-15 22:07:45,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:45,800 INFO L225 Difference]: With dead ends: 9123 [2019-11-15 22:07:45,800 INFO L226 Difference]: Without dead ends: 9123 [2019-11-15 22:07:45,800 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:45,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9123 states. [2019-11-15 22:07:45,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9123 to 7729. [2019-11-15 22:07:45,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7729 states. [2019-11-15 22:07:45,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7729 states to 7729 states and 23787 transitions. [2019-11-15 22:07:45,924 INFO L78 Accepts]: Start accepts. Automaton has 7729 states and 23787 transitions. Word has length 110 [2019-11-15 22:07:45,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:45,925 INFO L462 AbstractCegarLoop]: Abstraction has 7729 states and 23787 transitions. [2019-11-15 22:07:45,925 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:07:45,925 INFO L276 IsEmpty]: Start isEmpty. Operand 7729 states and 23787 transitions. [2019-11-15 22:07:45,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 22:07:45,933 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:45,933 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:45,933 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:45,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:45,934 INFO L82 PathProgramCache]: Analyzing trace with hash -544290650, now seen corresponding path program 1 times [2019-11-15 22:07:45,934 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:45,934 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341911051] [2019-11-15 22:07:45,934 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:45,934 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:45,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:45,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:46,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:46,025 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1341911051] [2019-11-15 22:07:46,025 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:46,025 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:07:46,026 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979186522] [2019-11-15 22:07:46,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:07:46,026 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:46,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:07:46,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:07:46,027 INFO L87 Difference]: Start difference. First operand 7729 states and 23787 transitions. Second operand 4 states. [2019-11-15 22:07:46,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:46,219 INFO L93 Difference]: Finished difference Result 11000 states and 33990 transitions. [2019-11-15 22:07:46,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:07:46,220 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2019-11-15 22:07:46,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:46,242 INFO L225 Difference]: With dead ends: 11000 [2019-11-15 22:07:46,242 INFO L226 Difference]: Without dead ends: 11000 [2019-11-15 22:07:46,244 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:46,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11000 states. [2019-11-15 22:07:46,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11000 to 8893. [2019-11-15 22:07:46,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8893 states. [2019-11-15 22:07:46,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8893 states to 8893 states and 27240 transitions. [2019-11-15 22:07:46,448 INFO L78 Accepts]: Start accepts. Automaton has 8893 states and 27240 transitions. Word has length 112 [2019-11-15 22:07:46,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:46,448 INFO L462 AbstractCegarLoop]: Abstraction has 8893 states and 27240 transitions. [2019-11-15 22:07:46,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:07:46,449 INFO L276 IsEmpty]: Start isEmpty. Operand 8893 states and 27240 transitions. [2019-11-15 22:07:46,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 22:07:46,463 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:46,464 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:46,464 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:46,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:46,464 INFO L82 PathProgramCache]: Analyzing trace with hash 1740572805, now seen corresponding path program 1 times [2019-11-15 22:07:46,465 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:46,465 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812346384] [2019-11-15 22:07:46,465 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:46,465 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:46,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:46,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:46,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:46,603 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812346384] [2019-11-15 22:07:46,604 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:46,604 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:07:46,604 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944667099] [2019-11-15 22:07:46,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:07:46,605 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:46,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:07:46,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:46,606 INFO L87 Difference]: Start difference. First operand 8893 states and 27240 transitions. Second operand 5 states. [2019-11-15 22:07:46,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:46,896 INFO L93 Difference]: Finished difference Result 10451 states and 31940 transitions. [2019-11-15 22:07:46,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:07:46,896 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 112 [2019-11-15 22:07:46,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:46,912 INFO L225 Difference]: With dead ends: 10451 [2019-11-15 22:07:46,912 INFO L226 Difference]: Without dead ends: 10451 [2019-11-15 22:07:46,912 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:07:46,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10451 states. [2019-11-15 22:07:47,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10451 to 8921. [2019-11-15 22:07:47,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8921 states. [2019-11-15 22:07:47,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8921 states to 8921 states and 27317 transitions. [2019-11-15 22:07:47,056 INFO L78 Accepts]: Start accepts. Automaton has 8921 states and 27317 transitions. Word has length 112 [2019-11-15 22:07:47,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:47,056 INFO L462 AbstractCegarLoop]: Abstraction has 8921 states and 27317 transitions. [2019-11-15 22:07:47,056 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:07:47,056 INFO L276 IsEmpty]: Start isEmpty. Operand 8921 states and 27317 transitions. [2019-11-15 22:07:47,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 22:07:47,067 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:47,067 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:47,067 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:47,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:47,068 INFO L82 PathProgramCache]: Analyzing trace with hash -336636538, now seen corresponding path program 1 times [2019-11-15 22:07:47,068 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:47,068 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36660345] [2019-11-15 22:07:47,069 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:47,069 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:47,069 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:47,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:47,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:47,399 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36660345] [2019-11-15 22:07:47,401 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:47,401 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-15 22:07:47,402 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983306752] [2019-11-15 22:07:47,402 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-11-15 22:07:47,402 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:47,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-11-15 22:07:47,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2019-11-15 22:07:47,403 INFO L87 Difference]: Start difference. First operand 8921 states and 27317 transitions. Second operand 11 states. [2019-11-15 22:07:48,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:48,103 INFO L93 Difference]: Finished difference Result 13002 states and 39405 transitions. [2019-11-15 22:07:48,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 22:07:48,104 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 112 [2019-11-15 22:07:48,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:48,124 INFO L225 Difference]: With dead ends: 13002 [2019-11-15 22:07:48,125 INFO L226 Difference]: Without dead ends: 13002 [2019-11-15 22:07:48,125 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2019-11-15 22:07:48,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13002 states. [2019-11-15 22:07:48,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13002 to 10158. [2019-11-15 22:07:48,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10158 states. [2019-11-15 22:07:48,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10158 states to 10158 states and 31141 transitions. [2019-11-15 22:07:48,296 INFO L78 Accepts]: Start accepts. Automaton has 10158 states and 31141 transitions. Word has length 112 [2019-11-15 22:07:48,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:48,296 INFO L462 AbstractCegarLoop]: Abstraction has 10158 states and 31141 transitions. [2019-11-15 22:07:48,296 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-11-15 22:07:48,297 INFO L276 IsEmpty]: Start isEmpty. Operand 10158 states and 31141 transitions. [2019-11-15 22:07:48,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 22:07:48,310 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:48,311 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:48,311 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:48,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:48,312 INFO L82 PathProgramCache]: Analyzing trace with hash 1915452839, now seen corresponding path program 1 times [2019-11-15 22:07:48,312 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:48,312 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123058612] [2019-11-15 22:07:48,312 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:48,312 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:48,313 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:48,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:48,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:48,409 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2123058612] [2019-11-15 22:07:48,409 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:48,409 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:07:48,409 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1174150944] [2019-11-15 22:07:48,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:07:48,410 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:48,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:07:48,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:07:48,411 INFO L87 Difference]: Start difference. First operand 10158 states and 31141 transitions. Second operand 5 states. [2019-11-15 22:07:48,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:48,643 INFO L93 Difference]: Finished difference Result 13536 states and 41714 transitions. [2019-11-15 22:07:48,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:07:48,643 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 112 [2019-11-15 22:07:48,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:48,666 INFO L225 Difference]: With dead ends: 13536 [2019-11-15 22:07:48,666 INFO L226 Difference]: Without dead ends: 13536 [2019-11-15 22:07:48,667 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:07:48,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13536 states. [2019-11-15 22:07:48,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13536 to 11522. [2019-11-15 22:07:48,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11522 states. [2019-11-15 22:07:48,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11522 states to 11522 states and 35556 transitions. [2019-11-15 22:07:48,864 INFO L78 Accepts]: Start accepts. Automaton has 11522 states and 35556 transitions. Word has length 112 [2019-11-15 22:07:48,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:48,864 INFO L462 AbstractCegarLoop]: Abstraction has 11522 states and 35556 transitions. [2019-11-15 22:07:48,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:07:48,865 INFO L276 IsEmpty]: Start isEmpty. Operand 11522 states and 35556 transitions. [2019-11-15 22:07:48,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 22:07:48,880 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:48,880 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:48,881 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:48,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:48,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1182476984, now seen corresponding path program 1 times [2019-11-15 22:07:48,881 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:48,882 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489733638] [2019-11-15 22:07:48,882 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:48,882 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:48,882 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:48,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:49,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:49,079 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489733638] [2019-11-15 22:07:49,079 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:49,080 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 22:07:49,080 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382172337] [2019-11-15 22:07:49,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 22:07:49,081 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:49,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 22:07:49,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:07:49,082 INFO L87 Difference]: Start difference. First operand 11522 states and 35556 transitions. Second operand 8 states. [2019-11-15 22:07:49,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:49,693 INFO L93 Difference]: Finished difference Result 14988 states and 45496 transitions. [2019-11-15 22:07:49,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 22:07:49,693 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 112 [2019-11-15 22:07:49,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:49,718 INFO L225 Difference]: With dead ends: 14988 [2019-11-15 22:07:49,718 INFO L226 Difference]: Without dead ends: 14988 [2019-11-15 22:07:49,718 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=172, Unknown=0, NotChecked=0, Total=240 [2019-11-15 22:07:49,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14988 states. [2019-11-15 22:07:49,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14988 to 11406. [2019-11-15 22:07:49,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11406 states. [2019-11-15 22:07:49,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11406 states to 11406 states and 35081 transitions. [2019-11-15 22:07:49,920 INFO L78 Accepts]: Start accepts. Automaton has 11406 states and 35081 transitions. Word has length 112 [2019-11-15 22:07:49,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:49,920 INFO L462 AbstractCegarLoop]: Abstraction has 11406 states and 35081 transitions. [2019-11-15 22:07:49,920 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 22:07:49,920 INFO L276 IsEmpty]: Start isEmpty. Operand 11406 states and 35081 transitions. [2019-11-15 22:07:49,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 22:07:49,935 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:49,936 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:49,936 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:49,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:49,937 INFO L82 PathProgramCache]: Analyzing trace with hash 1869741960, now seen corresponding path program 1 times [2019-11-15 22:07:49,937 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:49,937 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597274317] [2019-11-15 22:07:49,937 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:49,938 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:49,938 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:49,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:50,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:50,150 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597274317] [2019-11-15 22:07:50,151 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:50,151 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-15 22:07:50,151 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [661886905] [2019-11-15 22:07:50,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-15 22:07:50,153 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:50,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-15 22:07:50,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-11-15 22:07:50,154 INFO L87 Difference]: Start difference. First operand 11406 states and 35081 transitions. Second operand 10 states. [2019-11-15 22:07:51,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:51,081 INFO L93 Difference]: Finished difference Result 14871 states and 45239 transitions. [2019-11-15 22:07:51,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-15 22:07:51,081 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 112 [2019-11-15 22:07:51,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:51,110 INFO L225 Difference]: With dead ends: 14871 [2019-11-15 22:07:51,111 INFO L226 Difference]: Without dead ends: 14871 [2019-11-15 22:07:51,111 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2019-11-15 22:07:51,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14871 states. [2019-11-15 22:07:51,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14871 to 11162. [2019-11-15 22:07:51,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11162 states. [2019-11-15 22:07:51,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11162 states to 11162 states and 34322 transitions. [2019-11-15 22:07:51,318 INFO L78 Accepts]: Start accepts. Automaton has 11162 states and 34322 transitions. Word has length 112 [2019-11-15 22:07:51,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:51,318 INFO L462 AbstractCegarLoop]: Abstraction has 11162 states and 34322 transitions. [2019-11-15 22:07:51,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-15 22:07:51,319 INFO L276 IsEmpty]: Start isEmpty. Operand 11162 states and 34322 transitions. [2019-11-15 22:07:51,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 22:07:51,331 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:51,332 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:51,332 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:51,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:51,332 INFO L82 PathProgramCache]: Analyzing trace with hash 62287497, now seen corresponding path program 1 times [2019-11-15 22:07:51,332 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:51,332 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051541453] [2019-11-15 22:07:51,332 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:51,332 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:51,333 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:51,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:51,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:51,404 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051541453] [2019-11-15 22:07:51,404 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:51,404 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:07:51,404 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1000233726] [2019-11-15 22:07:51,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:07:51,405 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:51,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:07:51,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:07:51,406 INFO L87 Difference]: Start difference. First operand 11162 states and 34322 transitions. Second operand 3 states. [2019-11-15 22:07:51,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:51,461 INFO L93 Difference]: Finished difference Result 11162 states and 34295 transitions. [2019-11-15 22:07:51,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:07:51,462 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 112 [2019-11-15 22:07:51,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:51,486 INFO L225 Difference]: With dead ends: 11162 [2019-11-15 22:07:51,487 INFO L226 Difference]: Without dead ends: 11162 [2019-11-15 22:07:51,487 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:07:51,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11162 states. [2019-11-15 22:07:51,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11162 to 11162. [2019-11-15 22:07:51,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11162 states. [2019-11-15 22:07:51,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11162 states to 11162 states and 34295 transitions. [2019-11-15 22:07:51,771 INFO L78 Accepts]: Start accepts. Automaton has 11162 states and 34295 transitions. Word has length 112 [2019-11-15 22:07:51,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:51,772 INFO L462 AbstractCegarLoop]: Abstraction has 11162 states and 34295 transitions. [2019-11-15 22:07:51,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:07:51,772 INFO L276 IsEmpty]: Start isEmpty. Operand 11162 states and 34295 transitions. [2019-11-15 22:07:51,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-11-15 22:07:51,785 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:51,785 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:51,785 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:51,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:51,785 INFO L82 PathProgramCache]: Analyzing trace with hash -370258387, now seen corresponding path program 1 times [2019-11-15 22:07:51,785 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:51,786 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1902270299] [2019-11-15 22:07:51,786 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:51,786 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:51,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:51,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:07:51,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:07:51,924 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1902270299] [2019-11-15 22:07:51,924 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:07:51,924 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:07:51,925 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73081197] [2019-11-15 22:07:51,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:07:51,925 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:07:51,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:07:51,926 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:07:51,926 INFO L87 Difference]: Start difference. First operand 11162 states and 34295 transitions. Second operand 7 states. [2019-11-15 22:07:52,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:07:52,113 INFO L93 Difference]: Finished difference Result 13277 states and 40373 transitions. [2019-11-15 22:07:52,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:07:52,114 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 114 [2019-11-15 22:07:52,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:07:52,123 INFO L225 Difference]: With dead ends: 13277 [2019-11-15 22:07:52,123 INFO L226 Difference]: Without dead ends: 4952 [2019-11-15 22:07:52,123 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-11-15 22:07:52,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4952 states. [2019-11-15 22:07:52,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4952 to 4952. [2019-11-15 22:07:52,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4952 states. [2019-11-15 22:07:52,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4952 states to 4952 states and 12989 transitions. [2019-11-15 22:07:52,200 INFO L78 Accepts]: Start accepts. Automaton has 4952 states and 12989 transitions. Word has length 114 [2019-11-15 22:07:52,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:07:52,201 INFO L462 AbstractCegarLoop]: Abstraction has 4952 states and 12989 transitions. [2019-11-15 22:07:52,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:07:52,201 INFO L276 IsEmpty]: Start isEmpty. Operand 4952 states and 12989 transitions. [2019-11-15 22:07:52,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-11-15 22:07:52,206 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:07:52,206 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:07:52,206 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:07:52,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:07:52,206 INFO L82 PathProgramCache]: Analyzing trace with hash -1725743903, now seen corresponding path program 2 times [2019-11-15 22:07:52,207 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:07:52,207 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259146589] [2019-11-15 22:07:52,207 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:52,207 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:07:52,207 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:07:52,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 22:07:52,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 22:07:52,359 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 22:07:52,360 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 22:07:52,643 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 22:07:52,647 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 10:07:52 BasicIcfg [2019-11-15 22:07:52,647 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 22:07:52,648 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 22:07:52,648 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 22:07:52,648 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 22:07:52,649 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:06:42" (3/4) ... [2019-11-15 22:07:52,663 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 22:07:52,926 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_48568338-8381-44df-92cd-48de07524688/bin/uautomizer/witness.graphml [2019-11-15 22:07:52,926 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 22:07:52,929 INFO L168 Benchmark]: Toolchain (without parser) took 72483.99 ms. Allocated memory was 1.0 GB in the beginning and 5.6 GB in the end (delta: 4.6 GB). Free memory was 940.8 MB in the beginning and 3.7 GB in the end (delta: -2.7 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-11-15 22:07:52,929 INFO L168 Benchmark]: CDTParser took 0.40 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 22:07:52,930 INFO L168 Benchmark]: CACSL2BoogieTranslator took 822.43 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 176.2 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -193.8 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-11-15 22:07:52,930 INFO L168 Benchmark]: Boogie Procedure Inliner took 78.59 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 22:07:52,930 INFO L168 Benchmark]: Boogie Preprocessor took 42.10 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 22:07:52,931 INFO L168 Benchmark]: RCFGBuilder took 1080.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 58.6 MB). Peak memory consumption was 58.6 MB. Max. memory is 11.5 GB. [2019-11-15 22:07:52,931 INFO L168 Benchmark]: TraceAbstraction took 70170.98 ms. Allocated memory was 1.2 GB in the beginning and 5.6 GB in the end (delta: 4.4 GB). Free memory was 1.1 GB in the beginning and 3.8 GB in the end (delta: -2.7 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-11-15 22:07:52,932 INFO L168 Benchmark]: Witness Printer took 278.26 ms. Allocated memory is still 5.6 GB. Free memory was 3.8 GB in the beginning and 3.7 GB in the end (delta: 67.3 MB). Peak memory consumption was 67.3 MB. Max. memory is 11.5 GB. [2019-11-15 22:07:52,934 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.40 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 822.43 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 176.2 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -193.8 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 78.59 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 42.10 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1080.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 58.6 MB). Peak memory consumption was 58.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 70170.98 ms. Allocated memory was 1.2 GB in the beginning and 5.6 GB in the end (delta: 4.4 GB). Free memory was 1.1 GB in the beginning and 3.8 GB in the end (delta: -2.7 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. * Witness Printer took 278.26 ms. Allocated memory is still 5.6 GB. Free memory was 3.8 GB in the beginning and 3.7 GB in the end (delta: 67.3 MB). Peak memory consumption was 67.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L696] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L698] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L699] 0 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L705] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L706] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L707] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L708] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L709] 0 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L710] 0 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L711] 0 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L712] 0 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L713] 0 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L714] 0 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L716] 0 int __unbuffered_p0_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0] [L718] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0] [L719] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L720] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L722] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L724] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L726] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}] [L727] 0 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0] [L728] 0 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0] [L729] 0 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L730] 0 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L731] 0 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L732] 0 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0] [L733] 0 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0] [L734] 0 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L735] 0 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L736] 0 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0] [L737] 0 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0] [L738] 0 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L739] 0 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L740] 0 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L741] 0 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L742] 0 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L743] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L744] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L745] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] 0 pthread_t t2061; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L823] FCALL, FORK 0 pthread_create(&t2061, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L749] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L750] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L751] 1 z$flush_delayed = weak$$choice2 [L752] EXPR 1 \read(z) [L752] 1 z$mem_tmp = z [L824] 0 pthread_t t2062; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L753] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L753] EXPR 1 \read(z) [L753] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t2062, ((void *)0), P1, ((void *)0)) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L753] 1 z = !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L754] EXPR 1 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] 0 pthread_t t2063; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L754] 1 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) [L755] EXPR 1 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1))=0, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L755] 1 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) [L756] EXPR 1 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used))=0, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 1 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) [L757] EXPR 1 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L757] 1 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L758] EXPR 1 weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1))=0, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L758] 1 z$r_buff0_thd1 = weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) [L759] EXPR 1 weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={2:0}, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L759] 1 z$r_buff1_thd1 = weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L760] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L761] 1 __unbuffered_p0_EAX$read_delayed_var = &z [L762] EXPR 1 \read(z) [L762] 1 __unbuffered_p0_EAX = z [L763] EXPR 1 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=0, y=0, z={2:0}, z$flush_delayed=7, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L763] 1 z = z$flush_delayed ? z$mem_tmp : z [L764] 1 z$flush_delayed = (_Bool)0 [L767] 1 __unbuffered_p0_EBX = x [L772] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=0, y=0, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 x = 1 [L782] 2 y = 1 [L787] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t2063, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L794] 3 __unbuffered_p2_EAX = y [L797] 3 z = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] EXPR 3 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z [L800] EXPR 3 \read(z) [L800] EXPR 3 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z)=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L800] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L801] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L801] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L803] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L804] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L804] 3 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 [L807] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L829] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L833] EXPR 0 \read(z) [L833] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L834] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L834] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L835] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L836] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L837] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L840] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L841] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L841] EXPR 0 \read(*__unbuffered_p0_EAX$read_delayed_var) [L841] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] 0 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L842] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p0_EBX == 0 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] COND TRUE 0 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] 0 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={2:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=7, x=1, y=1, z={2:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 226 locations, 1 error locations. Result: UNSAFE, OverallTime: 69.9s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 19.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5120 SDtfs, 5549 SDslu, 12212 SDs, 0 SdLazy, 4223 SolverSat, 223 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 215 GetRequests, 69 SyntacticMatches, 19 SemanticMatches, 127 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 1.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=126276occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 28.7s AutomataMinimizationTime, 21 MinimizatonAttempts, 84917 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 2202 NumberOfCodeBlocks, 2202 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 2067 ConstructedInterpolants, 0 QuantifiedInterpolants, 476306 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...