./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe014_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe014_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8784e0d77be3072d7c6e2fa72b53f575c6b647e1 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 19:53:13,424 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 19:53:13,426 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 19:53:13,441 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 19:53:13,442 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 19:53:13,443 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 19:53:13,444 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 19:53:13,453 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 19:53:13,457 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 19:53:13,462 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 19:53:13,463 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 19:53:13,465 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 19:53:13,465 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 19:53:13,467 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 19:53:13,468 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 19:53:13,469 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 19:53:13,469 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 19:53:13,470 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 19:53:13,472 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 19:53:13,475 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 19:53:13,478 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 19:53:13,480 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 19:53:13,483 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 19:53:13,485 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 19:53:13,488 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 19:53:13,488 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 19:53:13,488 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 19:53:13,490 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 19:53:13,490 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 19:53:13,491 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 19:53:13,491 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 19:53:13,491 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 19:53:13,492 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 19:53:13,492 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 19:53:13,494 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 19:53:13,494 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 19:53:13,495 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 19:53:13,495 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 19:53:13,495 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 19:53:13,496 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 19:53:13,496 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 19:53:13,497 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 19:53:13,527 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 19:53:13,528 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 19:53:13,529 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 19:53:13,529 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 19:53:13,529 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 19:53:13,529 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 19:53:13,530 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 19:53:13,530 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 19:53:13,530 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 19:53:13,530 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 19:53:13,530 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 19:53:13,531 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 19:53:13,531 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 19:53:13,531 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 19:53:13,531 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 19:53:13,531 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 19:53:13,532 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 19:53:13,532 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 19:53:13,532 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 19:53:13,532 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 19:53:13,532 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 19:53:13,533 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 19:53:13,533 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 19:53:13,533 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 19:53:13,533 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 19:53:13,534 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 19:53:13,534 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 19:53:13,534 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 19:53:13,534 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8784e0d77be3072d7c6e2fa72b53f575c6b647e1 [2019-11-15 19:53:13,558 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 19:53:13,568 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 19:53:13,572 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 19:53:13,573 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 19:53:13,573 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 19:53:13,575 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe014_rmo.oepc.i [2019-11-15 19:53:13,648 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/data/0f686ee02/7087b6e364524728aedbddb90841ad88/FLAGde2621e78 [2019-11-15 19:53:14,058 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 19:53:14,059 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/sv-benchmarks/c/pthread-wmm/safe014_rmo.oepc.i [2019-11-15 19:53:14,075 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/data/0f686ee02/7087b6e364524728aedbddb90841ad88/FLAGde2621e78 [2019-11-15 19:53:14,342 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/data/0f686ee02/7087b6e364524728aedbddb90841ad88 [2019-11-15 19:53:14,345 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 19:53:14,346 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 19:53:14,347 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 19:53:14,347 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 19:53:14,350 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 19:53:14,351 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 07:53:14" (1/1) ... [2019-11-15 19:53:14,354 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6634d154 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:14, skipping insertion in model container [2019-11-15 19:53:14,354 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 07:53:14" (1/1) ... [2019-11-15 19:53:14,361 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 19:53:14,426 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 19:53:14,933 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 19:53:14,943 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 19:53:14,998 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 19:53:15,075 INFO L192 MainTranslator]: Completed translation [2019-11-15 19:53:15,076 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15 WrapperNode [2019-11-15 19:53:15,076 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 19:53:15,076 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 19:53:15,076 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 19:53:15,076 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 19:53:15,083 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,100 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,128 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 19:53:15,128 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 19:53:15,128 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 19:53:15,128 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 19:53:15,137 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,137 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,142 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,142 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,154 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,158 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,162 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... [2019-11-15 19:53:15,167 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 19:53:15,167 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 19:53:15,168 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 19:53:15,168 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 19:53:15,169 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 19:53:15,244 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-11-15 19:53:15,245 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 19:53:15,245 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 19:53:15,246 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 19:53:15,247 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 19:53:15,247 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 19:53:15,247 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 19:53:15,247 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 19:53:15,247 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 19:53:15,247 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-15 19:53:15,249 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-15 19:53:15,249 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-11-15 19:53:15,249 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 19:53:15,249 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 19:53:15,249 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 19:53:15,251 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 19:53:15,915 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 19:53:15,916 INFO L284 CfgBuilder]: Removed 6 assume(true) statements. [2019-11-15 19:53:15,917 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 07:53:15 BoogieIcfgContainer [2019-11-15 19:53:15,917 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 19:53:15,918 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 19:53:15,918 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 19:53:15,921 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 19:53:15,921 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 07:53:14" (1/3) ... [2019-11-15 19:53:15,922 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e0735a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 07:53:15, skipping insertion in model container [2019-11-15 19:53:15,922 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:53:15" (2/3) ... [2019-11-15 19:53:15,923 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e0735a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 07:53:15, skipping insertion in model container [2019-11-15 19:53:15,923 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 07:53:15" (3/3) ... [2019-11-15 19:53:15,924 INFO L109 eAbstractionObserver]: Analyzing ICFG safe014_rmo.oepc.i [2019-11-15 19:53:15,965 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,965 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,965 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,965 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,966 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,966 WARN L315 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,966 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,966 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,966 WARN L315 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,967 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,967 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,967 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,967 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,968 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,968 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,968 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,968 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,969 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,969 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,969 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,969 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,970 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,970 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,970 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,970 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,970 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,971 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,971 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,971 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,971 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,972 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,972 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,972 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,972 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,972 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,973 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,973 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,973 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,973 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,974 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,974 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,974 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,974 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,974 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,975 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,975 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,975 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,975 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,976 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,976 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,976 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,976 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,976 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,977 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,977 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,977 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,977 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,977 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,978 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,978 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,978 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,978 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,979 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,979 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,979 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,979 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,979 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,980 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,980 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,980 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,980 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,980 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,981 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,981 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,981 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,981 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,983 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,983 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,983 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,983 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,985 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,985 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,985 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,985 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,985 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,986 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,986 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,986 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,986 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,990 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,990 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,990 WARN L315 ript$VariableManager]: TermVariabe Thread2_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,991 WARN L315 ript$VariableManager]: TermVariabe Thread2_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,992 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,992 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,993 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,994 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:15,994 WARN L315 ript$VariableManager]: TermVariabe Thread0_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,000 WARN L315 ript$VariableManager]: TermVariabe Thread0_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,001 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,001 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,001 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,001 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,001 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,002 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,002 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,002 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,002 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,002 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,002 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,003 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,003 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,003 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,003 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,003 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,003 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,004 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,004 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,004 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,004 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,004 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,004 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,005 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,005 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,005 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,005 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,005 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:53:16,011 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 19:53:16,012 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 19:53:16,019 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-11-15 19:53:16,029 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-11-15 19:53:16,046 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 19:53:16,047 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 19:53:16,047 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 19:53:16,047 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 19:53:16,047 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 19:53:16,047 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 19:53:16,047 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 19:53:16,047 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 19:53:16,060 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 159 places, 191 transitions [2019-11-15 19:53:28,257 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 101067 states. [2019-11-15 19:53:28,259 INFO L276 IsEmpty]: Start isEmpty. Operand 101067 states. [2019-11-15 19:53:28,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 19:53:28,381 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:53:28,382 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:53:28,384 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:53:28,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:53:28,389 INFO L82 PathProgramCache]: Analyzing trace with hash 1413763152, now seen corresponding path program 1 times [2019-11-15 19:53:28,397 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:53:28,397 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923266180] [2019-11-15 19:53:28,398 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:53:28,398 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:53:28,398 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:53:28,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:53:28,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:53:28,700 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923266180] [2019-11-15 19:53:28,700 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:53:28,701 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:53:28,701 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199255801] [2019-11-15 19:53:28,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:53:28,706 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:53:28,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:53:28,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:53:28,722 INFO L87 Difference]: Start difference. First operand 101067 states. Second operand 4 states. [2019-11-15 19:53:30,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:53:30,580 INFO L93 Difference]: Finished difference Result 155391 states and 683054 transitions. [2019-11-15 19:53:30,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:53:30,582 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-11-15 19:53:30,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:53:31,435 INFO L225 Difference]: With dead ends: 155391 [2019-11-15 19:53:31,435 INFO L226 Difference]: Without dead ends: 105191 [2019-11-15 19:53:31,437 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:53:32,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105191 states. [2019-11-15 19:53:35,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105191 to 101343. [2019-11-15 19:53:35,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101343 states. [2019-11-15 19:53:35,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101343 states to 101343 states and 456422 transitions. [2019-11-15 19:53:35,990 INFO L78 Accepts]: Start accepts. Automaton has 101343 states and 456422 transitions. Word has length 78 [2019-11-15 19:53:35,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:53:35,991 INFO L462 AbstractCegarLoop]: Abstraction has 101343 states and 456422 transitions. [2019-11-15 19:53:35,992 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:53:35,992 INFO L276 IsEmpty]: Start isEmpty. Operand 101343 states and 456422 transitions. [2019-11-15 19:53:36,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 19:53:36,102 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:53:36,102 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:53:36,102 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:53:36,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:53:36,103 INFO L82 PathProgramCache]: Analyzing trace with hash 1942912220, now seen corresponding path program 1 times [2019-11-15 19:53:36,103 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:53:36,103 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1525419716] [2019-11-15 19:53:36,104 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:53:36,104 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:53:36,104 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:53:36,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:53:36,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:53:36,287 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1525419716] [2019-11-15 19:53:36,287 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:53:36,287 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:53:36,287 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [357104867] [2019-11-15 19:53:36,289 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:53:36,289 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:53:36,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:53:36,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:53:36,290 INFO L87 Difference]: Start difference. First operand 101343 states and 456422 transitions. Second operand 4 states. [2019-11-15 19:53:45,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:53:45,044 INFO L93 Difference]: Finished difference Result 146367 states and 652070 transitions. [2019-11-15 19:53:45,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:53:45,045 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2019-11-15 19:53:45,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:53:45,515 INFO L225 Difference]: With dead ends: 146367 [2019-11-15 19:53:45,515 INFO L226 Difference]: Without dead ends: 143963 [2019-11-15 19:53:45,516 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:53:46,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143963 states. [2019-11-15 19:53:48,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143963 to 127627. [2019-11-15 19:53:48,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127627 states. [2019-11-15 19:53:49,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127627 states to 127627 states and 572419 transitions. [2019-11-15 19:53:49,247 INFO L78 Accepts]: Start accepts. Automaton has 127627 states and 572419 transitions. Word has length 80 [2019-11-15 19:53:49,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:53:49,248 INFO L462 AbstractCegarLoop]: Abstraction has 127627 states and 572419 transitions. [2019-11-15 19:53:49,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:53:49,249 INFO L276 IsEmpty]: Start isEmpty. Operand 127627 states and 572419 transitions. [2019-11-15 19:53:49,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 19:53:49,294 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:53:49,294 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:53:49,295 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:53:49,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:53:49,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1649509213, now seen corresponding path program 1 times [2019-11-15 19:53:49,295 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:53:49,295 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87669131] [2019-11-15 19:53:49,295 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:53:49,296 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:53:49,296 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:53:49,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:53:49,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:53:49,455 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87669131] [2019-11-15 19:53:49,456 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:53:49,456 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:53:49,456 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814797754] [2019-11-15 19:53:49,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:53:49,456 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:53:49,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:53:49,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:53:49,457 INFO L87 Difference]: Start difference. First operand 127627 states and 572419 transitions. Second operand 6 states. [2019-11-15 19:53:50,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:53:50,921 INFO L93 Difference]: Finished difference Result 184551 states and 798888 transitions. [2019-11-15 19:53:50,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 19:53:50,921 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 19:53:50,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:53:51,637 INFO L225 Difference]: With dead ends: 184551 [2019-11-15 19:53:51,637 INFO L226 Difference]: Without dead ends: 184551 [2019-11-15 19:53:51,637 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:53:54,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184551 states. [2019-11-15 19:53:56,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184551 to 147307. [2019-11-15 19:53:56,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147307 states. [2019-11-15 19:54:06,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147307 states to 147307 states and 649631 transitions. [2019-11-15 19:54:06,835 INFO L78 Accepts]: Start accepts. Automaton has 147307 states and 649631 transitions. Word has length 80 [2019-11-15 19:54:06,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:06,836 INFO L462 AbstractCegarLoop]: Abstraction has 147307 states and 649631 transitions. [2019-11-15 19:54:06,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:54:06,836 INFO L276 IsEmpty]: Start isEmpty. Operand 147307 states and 649631 transitions. [2019-11-15 19:54:06,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 19:54:06,883 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:06,883 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:06,884 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:06,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:06,884 INFO L82 PathProgramCache]: Analyzing trace with hash -157945250, now seen corresponding path program 1 times [2019-11-15 19:54:06,884 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:06,884 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513559895] [2019-11-15 19:54:06,884 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:06,884 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:06,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:06,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:07,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:07,046 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513559895] [2019-11-15 19:54:07,046 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:07,046 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:54:07,046 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1269979441] [2019-11-15 19:54:07,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:54:07,047 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:07,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:54:07,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:54:07,047 INFO L87 Difference]: Start difference. First operand 147307 states and 649631 transitions. Second operand 4 states. [2019-11-15 19:54:07,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:07,620 INFO L93 Difference]: Finished difference Result 122705 states and 527703 transitions. [2019-11-15 19:54:07,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:54:07,621 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2019-11-15 19:54:07,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:07,966 INFO L225 Difference]: With dead ends: 122705 [2019-11-15 19:54:07,966 INFO L226 Difference]: Without dead ends: 119985 [2019-11-15 19:54:07,966 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:54:08,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119985 states. [2019-11-15 19:54:11,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119985 to 119985. [2019-11-15 19:54:11,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119985 states. [2019-11-15 19:54:11,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119985 states to 119985 states and 518020 transitions. [2019-11-15 19:54:11,474 INFO L78 Accepts]: Start accepts. Automaton has 119985 states and 518020 transitions. Word has length 80 [2019-11-15 19:54:11,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:11,475 INFO L462 AbstractCegarLoop]: Abstraction has 119985 states and 518020 transitions. [2019-11-15 19:54:11,475 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:54:11,475 INFO L276 IsEmpty]: Start isEmpty. Operand 119985 states and 518020 transitions. [2019-11-15 19:54:11,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 19:54:11,506 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:11,506 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:11,507 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:11,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:11,507 INFO L82 PathProgramCache]: Analyzing trace with hash -1986503938, now seen corresponding path program 1 times [2019-11-15 19:54:11,507 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:11,507 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1705611548] [2019-11-15 19:54:11,508 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:11,508 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:11,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:11,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:11,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:11,612 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1705611548] [2019-11-15 19:54:11,612 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:11,613 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 19:54:11,613 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586270270] [2019-11-15 19:54:11,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 19:54:11,614 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:11,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 19:54:11,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:54:11,614 INFO L87 Difference]: Start difference. First operand 119985 states and 518020 transitions. Second operand 5 states. [2019-11-15 19:54:11,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:11,845 INFO L93 Difference]: Finished difference Result 31956 states and 123769 transitions. [2019-11-15 19:54:11,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 19:54:11,845 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-11-15 19:54:11,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:11,930 INFO L225 Difference]: With dead ends: 31956 [2019-11-15 19:54:11,930 INFO L226 Difference]: Without dead ends: 29739 [2019-11-15 19:54:11,931 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:54:12,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29739 states. [2019-11-15 19:54:12,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29739 to 29739. [2019-11-15 19:54:12,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29739 states. [2019-11-15 19:54:12,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29739 states to 29739 states and 114827 transitions. [2019-11-15 19:54:12,570 INFO L78 Accepts]: Start accepts. Automaton has 29739 states and 114827 transitions. Word has length 81 [2019-11-15 19:54:12,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:12,570 INFO L462 AbstractCegarLoop]: Abstraction has 29739 states and 114827 transitions. [2019-11-15 19:54:12,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 19:54:12,570 INFO L276 IsEmpty]: Start isEmpty. Operand 29739 states and 114827 transitions. [2019-11-15 19:54:12,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 19:54:12,599 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:12,599 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:12,599 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:12,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:12,600 INFO L82 PathProgramCache]: Analyzing trace with hash 1558145074, now seen corresponding path program 1 times [2019-11-15 19:54:12,600 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:12,600 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1170681743] [2019-11-15 19:54:12,600 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:12,601 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:12,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:12,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:12,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:12,744 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1170681743] [2019-11-15 19:54:12,744 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:12,744 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:54:12,744 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488021426] [2019-11-15 19:54:12,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:54:12,745 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:12,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:54:12,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:54:12,746 INFO L87 Difference]: Start difference. First operand 29739 states and 114827 transitions. Second operand 4 states. [2019-11-15 19:54:13,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:13,040 INFO L93 Difference]: Finished difference Result 30074 states and 113869 transitions. [2019-11-15 19:54:13,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:54:13,040 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 92 [2019-11-15 19:54:13,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:13,103 INFO L225 Difference]: With dead ends: 30074 [2019-11-15 19:54:13,103 INFO L226 Difference]: Without dead ends: 29912 [2019-11-15 19:54:13,103 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:54:13,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29912 states. [2019-11-15 19:54:13,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29912 to 28328. [2019-11-15 19:54:13,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28328 states. [2019-11-15 19:54:13,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28328 states to 28328 states and 107680 transitions. [2019-11-15 19:54:13,667 INFO L78 Accepts]: Start accepts. Automaton has 28328 states and 107680 transitions. Word has length 92 [2019-11-15 19:54:13,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:13,667 INFO L462 AbstractCegarLoop]: Abstraction has 28328 states and 107680 transitions. [2019-11-15 19:54:13,668 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:54:13,668 INFO L276 IsEmpty]: Start isEmpty. Operand 28328 states and 107680 transitions. [2019-11-15 19:54:13,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 19:54:13,702 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:13,702 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:13,702 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:13,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:13,703 INFO L82 PathProgramCache]: Analyzing trace with hash -1026836483, now seen corresponding path program 1 times [2019-11-15 19:54:13,703 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:13,703 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025500252] [2019-11-15 19:54:13,703 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:13,704 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:13,704 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:13,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:13,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:13,827 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025500252] [2019-11-15 19:54:13,827 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:13,827 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:54:13,827 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559392275] [2019-11-15 19:54:13,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:54:13,828 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:13,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:54:13,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:54:13,828 INFO L87 Difference]: Start difference. First operand 28328 states and 107680 transitions. Second operand 6 states. [2019-11-15 19:54:14,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:14,488 INFO L93 Difference]: Finished difference Result 55965 states and 208212 transitions. [2019-11-15 19:54:14,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 19:54:14,489 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 19:54:14,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:14,605 INFO L225 Difference]: With dead ends: 55965 [2019-11-15 19:54:14,605 INFO L226 Difference]: Without dead ends: 54894 [2019-11-15 19:54:14,605 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 19:54:14,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54894 states. [2019-11-15 19:54:15,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54894 to 21341. [2019-11-15 19:54:15,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21341 states. [2019-11-15 19:54:15,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21341 states to 21341 states and 79924 transitions. [2019-11-15 19:54:15,705 INFO L78 Accepts]: Start accepts. Automaton has 21341 states and 79924 transitions. Word has length 94 [2019-11-15 19:54:15,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:15,705 INFO L462 AbstractCegarLoop]: Abstraction has 21341 states and 79924 transitions. [2019-11-15 19:54:15,705 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:54:15,706 INFO L276 IsEmpty]: Start isEmpty. Operand 21341 states and 79924 transitions. [2019-11-15 19:54:15,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 19:54:15,725 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:15,725 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:15,726 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:15,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:15,726 INFO L82 PathProgramCache]: Analyzing trace with hash 1177776447, now seen corresponding path program 1 times [2019-11-15 19:54:15,726 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:15,726 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475109142] [2019-11-15 19:54:15,726 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:15,726 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:15,726 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:15,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:15,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:15,806 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475109142] [2019-11-15 19:54:15,807 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:15,807 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:54:15,807 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1212809106] [2019-11-15 19:54:15,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:54:15,808 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:15,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:54:15,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:54:15,809 INFO L87 Difference]: Start difference. First operand 21341 states and 79924 transitions. Second operand 4 states. [2019-11-15 19:54:16,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:16,163 INFO L93 Difference]: Finished difference Result 28289 states and 104057 transitions. [2019-11-15 19:54:16,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:54:16,163 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2019-11-15 19:54:16,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:16,216 INFO L225 Difference]: With dead ends: 28289 [2019-11-15 19:54:16,216 INFO L226 Difference]: Without dead ends: 28289 [2019-11-15 19:54:16,216 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:54:16,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28289 states. [2019-11-15 19:54:16,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28289 to 25873. [2019-11-15 19:54:16,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25873 states. [2019-11-15 19:54:16,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25873 states to 25873 states and 95873 transitions. [2019-11-15 19:54:16,654 INFO L78 Accepts]: Start accepts. Automaton has 25873 states and 95873 transitions. Word has length 94 [2019-11-15 19:54:16,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:16,654 INFO L462 AbstractCegarLoop]: Abstraction has 25873 states and 95873 transitions. [2019-11-15 19:54:16,655 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:54:16,655 INFO L276 IsEmpty]: Start isEmpty. Operand 25873 states and 95873 transitions. [2019-11-15 19:54:16,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 19:54:16,678 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:16,678 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:16,678 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:16,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:16,679 INFO L82 PathProgramCache]: Analyzing trace with hash 2139390464, now seen corresponding path program 1 times [2019-11-15 19:54:16,679 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:16,679 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [438719663] [2019-11-15 19:54:16,679 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:16,680 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:16,680 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:16,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:16,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:16,860 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [438719663] [2019-11-15 19:54:16,861 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:16,861 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 19:54:16,861 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012873041] [2019-11-15 19:54:16,861 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 19:54:16,862 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:16,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 19:54:16,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:54:16,862 INFO L87 Difference]: Start difference. First operand 25873 states and 95873 transitions. Second operand 8 states. [2019-11-15 19:54:17,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:17,669 INFO L93 Difference]: Finished difference Result 41274 states and 149981 transitions. [2019-11-15 19:54:17,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 19:54:17,670 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-11-15 19:54:17,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:17,742 INFO L225 Difference]: With dead ends: 41274 [2019-11-15 19:54:17,742 INFO L226 Difference]: Without dead ends: 41274 [2019-11-15 19:54:17,743 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-11-15 19:54:17,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41274 states. [2019-11-15 19:54:18,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41274 to 34396. [2019-11-15 19:54:18,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34396 states. [2019-11-15 19:54:18,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34396 states to 34396 states and 126252 transitions. [2019-11-15 19:54:18,334 INFO L78 Accepts]: Start accepts. Automaton has 34396 states and 126252 transitions. Word has length 94 [2019-11-15 19:54:18,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:18,335 INFO L462 AbstractCegarLoop]: Abstraction has 34396 states and 126252 transitions. [2019-11-15 19:54:18,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 19:54:18,335 INFO L276 IsEmpty]: Start isEmpty. Operand 34396 states and 126252 transitions. [2019-11-15 19:54:18,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 19:54:18,361 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:18,361 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:18,361 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:18,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:18,362 INFO L82 PathProgramCache]: Analyzing trace with hash 331936001, now seen corresponding path program 1 times [2019-11-15 19:54:18,362 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:18,362 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440604314] [2019-11-15 19:54:18,362 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:18,362 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:18,362 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:18,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:18,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:18,480 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [440604314] [2019-11-15 19:54:18,480 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:18,480 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:54:18,480 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1354018771] [2019-11-15 19:54:18,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:54:18,481 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:18,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:54:18,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:54:18,482 INFO L87 Difference]: Start difference. First operand 34396 states and 126252 transitions. Second operand 6 states. [2019-11-15 19:54:18,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:18,851 INFO L93 Difference]: Finished difference Result 36644 states and 133197 transitions. [2019-11-15 19:54:18,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 19:54:18,851 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 19:54:18,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:18,913 INFO L225 Difference]: With dead ends: 36644 [2019-11-15 19:54:18,914 INFO L226 Difference]: Without dead ends: 36644 [2019-11-15 19:54:18,914 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:54:19,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36644 states. [2019-11-15 19:54:19,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36644 to 32213. [2019-11-15 19:54:19,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32213 states. [2019-11-15 19:54:19,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32213 states to 32213 states and 117640 transitions. [2019-11-15 19:54:19,432 INFO L78 Accepts]: Start accepts. Automaton has 32213 states and 117640 transitions. Word has length 94 [2019-11-15 19:54:19,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:19,433 INFO L462 AbstractCegarLoop]: Abstraction has 32213 states and 117640 transitions. [2019-11-15 19:54:19,433 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:54:19,433 INFO L276 IsEmpty]: Start isEmpty. Operand 32213 states and 117640 transitions. [2019-11-15 19:54:19,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 19:54:19,457 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:19,458 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:19,458 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:19,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:19,458 INFO L82 PathProgramCache]: Analyzing trace with hash -910812351, now seen corresponding path program 1 times [2019-11-15 19:54:19,458 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:19,458 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140280179] [2019-11-15 19:54:19,458 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:19,458 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:19,458 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:19,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:19,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:19,573 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2140280179] [2019-11-15 19:54:19,573 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:19,573 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:54:19,573 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1930202194] [2019-11-15 19:54:19,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:54:19,574 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:19,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:54:19,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:54:19,575 INFO L87 Difference]: Start difference. First operand 32213 states and 117640 transitions. Second operand 6 states. [2019-11-15 19:54:19,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:19,981 INFO L93 Difference]: Finished difference Result 33052 states and 118125 transitions. [2019-11-15 19:54:19,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 19:54:19,981 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 19:54:19,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:20,040 INFO L225 Difference]: With dead ends: 33052 [2019-11-15 19:54:20,040 INFO L226 Difference]: Without dead ends: 33052 [2019-11-15 19:54:20,040 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:54:20,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33052 states. [2019-11-15 19:54:20,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33052 to 29398. [2019-11-15 19:54:20,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29398 states. [2019-11-15 19:54:20,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29398 states to 29398 states and 105753 transitions. [2019-11-15 19:54:20,739 INFO L78 Accepts]: Start accepts. Automaton has 29398 states and 105753 transitions. Word has length 94 [2019-11-15 19:54:20,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:20,739 INFO L462 AbstractCegarLoop]: Abstraction has 29398 states and 105753 transitions. [2019-11-15 19:54:20,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:54:20,739 INFO L276 IsEmpty]: Start isEmpty. Operand 29398 states and 105753 transitions. [2019-11-15 19:54:20,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 19:54:20,759 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:20,759 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:20,760 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:20,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:20,760 INFO L82 PathProgramCache]: Analyzing trace with hash 1576700482, now seen corresponding path program 1 times [2019-11-15 19:54:20,760 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:20,760 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275493303] [2019-11-15 19:54:20,761 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:20,761 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:20,761 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:20,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:20,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:20,848 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275493303] [2019-11-15 19:54:20,848 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:20,848 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:54:20,848 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936147758] [2019-11-15 19:54:20,849 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:54:20,849 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:20,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:54:20,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:54:20,849 INFO L87 Difference]: Start difference. First operand 29398 states and 105753 transitions. Second operand 6 states. [2019-11-15 19:54:20,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:20,935 INFO L93 Difference]: Finished difference Result 8023 states and 25224 transitions. [2019-11-15 19:54:20,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 19:54:20,936 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 19:54:20,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:20,944 INFO L225 Difference]: With dead ends: 8023 [2019-11-15 19:54:20,944 INFO L226 Difference]: Without dead ends: 6716 [2019-11-15 19:54:20,944 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-11-15 19:54:20,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6716 states. [2019-11-15 19:54:21,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6716 to 6356. [2019-11-15 19:54:21,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6356 states. [2019-11-15 19:54:21,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6356 states to 6356 states and 19772 transitions. [2019-11-15 19:54:21,025 INFO L78 Accepts]: Start accepts. Automaton has 6356 states and 19772 transitions. Word has length 94 [2019-11-15 19:54:21,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:21,026 INFO L462 AbstractCegarLoop]: Abstraction has 6356 states and 19772 transitions. [2019-11-15 19:54:21,026 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:54:21,026 INFO L276 IsEmpty]: Start isEmpty. Operand 6356 states and 19772 transitions. [2019-11-15 19:54:21,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2019-11-15 19:54:21,032 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:21,032 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:21,032 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:21,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:21,033 INFO L82 PathProgramCache]: Analyzing trace with hash 388733542, now seen corresponding path program 1 times [2019-11-15 19:54:21,033 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:21,033 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236588961] [2019-11-15 19:54:21,033 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:21,033 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:21,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:21,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:21,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:21,092 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [236588961] [2019-11-15 19:54:21,092 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:21,092 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:54:21,093 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005628591] [2019-11-15 19:54:21,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:54:21,093 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:21,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:54:21,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:54:21,094 INFO L87 Difference]: Start difference. First operand 6356 states and 19772 transitions. Second operand 4 states. [2019-11-15 19:54:21,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:21,236 INFO L93 Difference]: Finished difference Result 8469 states and 25971 transitions. [2019-11-15 19:54:21,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:54:21,237 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2019-11-15 19:54:21,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:21,246 INFO L225 Difference]: With dead ends: 8469 [2019-11-15 19:54:21,246 INFO L226 Difference]: Without dead ends: 8333 [2019-11-15 19:54:21,247 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:54:21,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8333 states. [2019-11-15 19:54:21,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8333 to 7892. [2019-11-15 19:54:21,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7892 states. [2019-11-15 19:54:21,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7892 states to 7892 states and 24338 transitions. [2019-11-15 19:54:21,348 INFO L78 Accepts]: Start accepts. Automaton has 7892 states and 24338 transitions. Word has length 109 [2019-11-15 19:54:21,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:21,348 INFO L462 AbstractCegarLoop]: Abstraction has 7892 states and 24338 transitions. [2019-11-15 19:54:21,348 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:54:21,348 INFO L276 IsEmpty]: Start isEmpty. Operand 7892 states and 24338 transitions. [2019-11-15 19:54:21,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 19:54:21,355 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:21,356 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:21,356 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:21,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:21,356 INFO L82 PathProgramCache]: Analyzing trace with hash 721142842, now seen corresponding path program 1 times [2019-11-15 19:54:21,356 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:21,356 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359569379] [2019-11-15 19:54:21,356 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:21,356 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:21,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:21,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:21,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:21,420 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359569379] [2019-11-15 19:54:21,420 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:21,420 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:54:21,421 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1191182959] [2019-11-15 19:54:21,421 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:54:21,421 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:21,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:54:21,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:54:21,422 INFO L87 Difference]: Start difference. First operand 7892 states and 24338 transitions. Second operand 4 states. [2019-11-15 19:54:21,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:21,535 INFO L93 Difference]: Finished difference Result 12578 states and 38972 transitions. [2019-11-15 19:54:21,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:54:21,535 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 111 [2019-11-15 19:54:21,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:21,551 INFO L225 Difference]: With dead ends: 12578 [2019-11-15 19:54:21,551 INFO L226 Difference]: Without dead ends: 12578 [2019-11-15 19:54:21,552 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:54:21,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12578 states. [2019-11-15 19:54:21,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12578 to 8916. [2019-11-15 19:54:21,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8916 states. [2019-11-15 19:54:21,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8916 states to 8916 states and 27386 transitions. [2019-11-15 19:54:21,685 INFO L78 Accepts]: Start accepts. Automaton has 8916 states and 27386 transitions. Word has length 111 [2019-11-15 19:54:21,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:21,686 INFO L462 AbstractCegarLoop]: Abstraction has 8916 states and 27386 transitions. [2019-11-15 19:54:21,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:54:21,686 INFO L276 IsEmpty]: Start isEmpty. Operand 8916 states and 27386 transitions. [2019-11-15 19:54:21,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 19:54:21,694 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:21,694 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:21,695 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:21,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:21,695 INFO L82 PathProgramCache]: Analyzing trace with hash 1050908603, now seen corresponding path program 1 times [2019-11-15 19:54:21,695 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:21,696 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987779196] [2019-11-15 19:54:21,696 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:21,696 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:21,696 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:21,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:21,779 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:21,779 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [987779196] [2019-11-15 19:54:21,779 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:21,780 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 19:54:21,780 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187559638] [2019-11-15 19:54:21,780 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 19:54:21,780 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:21,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 19:54:21,781 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:54:21,781 INFO L87 Difference]: Start difference. First operand 8916 states and 27386 transitions. Second operand 5 states. [2019-11-15 19:54:21,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:21,999 INFO L93 Difference]: Finished difference Result 10025 states and 30698 transitions. [2019-11-15 19:54:21,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 19:54:22,000 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 111 [2019-11-15 19:54:22,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:22,015 INFO L225 Difference]: With dead ends: 10025 [2019-11-15 19:54:22,015 INFO L226 Difference]: Without dead ends: 9889 [2019-11-15 19:54:22,017 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:54:22,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9889 states. [2019-11-15 19:54:22,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9889 to 9024. [2019-11-15 19:54:22,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9024 states. [2019-11-15 19:54:22,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9024 states to 9024 states and 27691 transitions. [2019-11-15 19:54:22,134 INFO L78 Accepts]: Start accepts. Automaton has 9024 states and 27691 transitions. Word has length 111 [2019-11-15 19:54:22,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:22,135 INFO L462 AbstractCegarLoop]: Abstraction has 9024 states and 27691 transitions. [2019-11-15 19:54:22,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 19:54:22,135 INFO L276 IsEmpty]: Start isEmpty. Operand 9024 states and 27691 transitions. [2019-11-15 19:54:22,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 19:54:22,143 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:22,143 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:22,143 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:22,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:22,143 INFO L82 PathProgramCache]: Analyzing trace with hash -64686723, now seen corresponding path program 1 times [2019-11-15 19:54:22,144 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:22,144 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [260227947] [2019-11-15 19:54:22,144 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:22,144 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:22,144 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:22,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:22,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:22,293 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [260227947] [2019-11-15 19:54:22,295 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:22,295 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 19:54:22,295 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1158030696] [2019-11-15 19:54:22,296 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 19:54:22,296 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:22,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 19:54:22,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:54:22,297 INFO L87 Difference]: Start difference. First operand 9024 states and 27691 transitions. Second operand 8 states. [2019-11-15 19:54:22,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:22,718 INFO L93 Difference]: Finished difference Result 12492 states and 37825 transitions. [2019-11-15 19:54:22,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 19:54:22,718 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2019-11-15 19:54:22,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:22,739 INFO L225 Difference]: With dead ends: 12492 [2019-11-15 19:54:22,739 INFO L226 Difference]: Without dead ends: 12492 [2019-11-15 19:54:22,740 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=172, Unknown=0, NotChecked=0, Total=240 [2019-11-15 19:54:22,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12492 states. [2019-11-15 19:54:22,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12492 to 9708. [2019-11-15 19:54:22,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9708 states. [2019-11-15 19:54:22,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9708 states to 9708 states and 29704 transitions. [2019-11-15 19:54:22,891 INFO L78 Accepts]: Start accepts. Automaton has 9708 states and 29704 transitions. Word has length 111 [2019-11-15 19:54:22,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:22,892 INFO L462 AbstractCegarLoop]: Abstraction has 9708 states and 29704 transitions. [2019-11-15 19:54:22,892 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 19:54:22,892 INFO L276 IsEmpty]: Start isEmpty. Operand 9708 states and 29704 transitions. [2019-11-15 19:54:22,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 19:54:22,901 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:22,901 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:22,901 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:22,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:22,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1180077758, now seen corresponding path program 1 times [2019-11-15 19:54:22,902 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:22,902 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478725106] [2019-11-15 19:54:22,902 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:22,902 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:22,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:22,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:23,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:23,052 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478725106] [2019-11-15 19:54:23,052 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:23,052 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 19:54:23,052 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1246418678] [2019-11-15 19:54:23,053 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 19:54:23,053 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:23,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 19:54:23,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:54:23,054 INFO L87 Difference]: Start difference. First operand 9708 states and 29704 transitions. Second operand 8 states. [2019-11-15 19:54:23,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:23,386 INFO L93 Difference]: Finished difference Result 13653 states and 42114 transitions. [2019-11-15 19:54:23,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 19:54:23,386 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2019-11-15 19:54:23,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:23,404 INFO L225 Difference]: With dead ends: 13653 [2019-11-15 19:54:23,404 INFO L226 Difference]: Without dead ends: 13653 [2019-11-15 19:54:23,404 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-11-15 19:54:23,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13653 states. [2019-11-15 19:54:23,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13653 to 10532. [2019-11-15 19:54:23,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10532 states. [2019-11-15 19:54:23,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10532 states to 10532 states and 32730 transitions. [2019-11-15 19:54:23,566 INFO L78 Accepts]: Start accepts. Automaton has 10532 states and 32730 transitions. Word has length 111 [2019-11-15 19:54:23,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:23,567 INFO L462 AbstractCegarLoop]: Abstraction has 10532 states and 32730 transitions. [2019-11-15 19:54:23,567 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 19:54:23,567 INFO L276 IsEmpty]: Start isEmpty. Operand 10532 states and 32730 transitions. [2019-11-15 19:54:23,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 19:54:23,576 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:23,576 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:23,576 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:23,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:23,577 INFO L82 PathProgramCache]: Analyzing trace with hash -627376705, now seen corresponding path program 1 times [2019-11-15 19:54:23,577 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:23,577 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888519393] [2019-11-15 19:54:23,577 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:23,577 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:23,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:23,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:23,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:23,637 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888519393] [2019-11-15 19:54:23,637 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:23,637 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 19:54:23,637 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [267886042] [2019-11-15 19:54:23,638 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 19:54:23,638 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:23,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 19:54:23,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:54:23,638 INFO L87 Difference]: Start difference. First operand 10532 states and 32730 transitions. Second operand 3 states. [2019-11-15 19:54:23,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:23,677 INFO L93 Difference]: Finished difference Result 10532 states and 32703 transitions. [2019-11-15 19:54:23,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 19:54:23,678 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 111 [2019-11-15 19:54:23,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:23,695 INFO L225 Difference]: With dead ends: 10532 [2019-11-15 19:54:23,695 INFO L226 Difference]: Without dead ends: 10532 [2019-11-15 19:54:23,695 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:54:23,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10532 states. [2019-11-15 19:54:23,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10532 to 10532. [2019-11-15 19:54:23,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10532 states. [2019-11-15 19:54:23,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10532 states to 10532 states and 32703 transitions. [2019-11-15 19:54:23,851 INFO L78 Accepts]: Start accepts. Automaton has 10532 states and 32703 transitions. Word has length 111 [2019-11-15 19:54:23,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:23,851 INFO L462 AbstractCegarLoop]: Abstraction has 10532 states and 32703 transitions. [2019-11-15 19:54:23,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 19:54:23,852 INFO L276 IsEmpty]: Start isEmpty. Operand 10532 states and 32703 transitions. [2019-11-15 19:54:23,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 19:54:23,862 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:23,862 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:23,862 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:23,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:23,863 INFO L82 PathProgramCache]: Analyzing trace with hash 118944619, now seen corresponding path program 1 times [2019-11-15 19:54:23,863 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:23,863 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585747126] [2019-11-15 19:54:23,863 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:23,863 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:23,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:23,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:23,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:23,995 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585747126] [2019-11-15 19:54:23,996 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:23,996 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 19:54:23,996 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680945005] [2019-11-15 19:54:23,998 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 19:54:23,998 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:23,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 19:54:23,999 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:54:23,999 INFO L87 Difference]: Start difference. First operand 10532 states and 32703 transitions. Second operand 7 states. [2019-11-15 19:54:24,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:24,128 INFO L93 Difference]: Finished difference Result 12305 states and 37677 transitions. [2019-11-15 19:54:24,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 19:54:24,128 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 113 [2019-11-15 19:54:24,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:24,133 INFO L225 Difference]: With dead ends: 12305 [2019-11-15 19:54:24,133 INFO L226 Difference]: Without dead ends: 4526 [2019-11-15 19:54:24,134 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-11-15 19:54:24,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4526 states. [2019-11-15 19:54:24,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4526 to 4526. [2019-11-15 19:54:24,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4526 states. [2019-11-15 19:54:24,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4526 states to 4526 states and 11790 transitions. [2019-11-15 19:54:24,183 INFO L78 Accepts]: Start accepts. Automaton has 4526 states and 11790 transitions. Word has length 113 [2019-11-15 19:54:24,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:24,183 INFO L462 AbstractCegarLoop]: Abstraction has 4526 states and 11790 transitions. [2019-11-15 19:54:24,183 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 19:54:24,183 INFO L276 IsEmpty]: Start isEmpty. Operand 4526 states and 11790 transitions. [2019-11-15 19:54:24,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 19:54:24,187 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:24,187 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:24,187 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:24,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:24,187 INFO L82 PathProgramCache]: Analyzing trace with hash -995530415, now seen corresponding path program 2 times [2019-11-15 19:54:24,187 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:24,187 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112227861] [2019-11-15 19:54:24,187 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:24,188 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:24,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:24,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:24,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:24,314 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112227861] [2019-11-15 19:54:24,315 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:24,315 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 19:54:24,315 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559421455] [2019-11-15 19:54:24,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 19:54:24,316 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:24,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 19:54:24,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:54:24,316 INFO L87 Difference]: Start difference. First operand 4526 states and 11790 transitions. Second operand 7 states. [2019-11-15 19:54:24,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:24,401 INFO L93 Difference]: Finished difference Result 6047 states and 16140 transitions. [2019-11-15 19:54:24,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 19:54:24,402 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 113 [2019-11-15 19:54:24,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:24,404 INFO L225 Difference]: With dead ends: 6047 [2019-11-15 19:54:24,404 INFO L226 Difference]: Without dead ends: 2598 [2019-11-15 19:54:24,405 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 19:54:24,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2598 states. [2019-11-15 19:54:24,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2598 to 2598. [2019-11-15 19:54:24,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2598 states. [2019-11-15 19:54:24,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2598 states to 2598 states and 6746 transitions. [2019-11-15 19:54:24,431 INFO L78 Accepts]: Start accepts. Automaton has 2598 states and 6746 transitions. Word has length 113 [2019-11-15 19:54:24,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:24,431 INFO L462 AbstractCegarLoop]: Abstraction has 2598 states and 6746 transitions. [2019-11-15 19:54:24,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 19:54:24,431 INFO L276 IsEmpty]: Start isEmpty. Operand 2598 states and 6746 transitions. [2019-11-15 19:54:24,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 19:54:24,433 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:24,434 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:24,434 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:24,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:24,434 INFO L82 PathProgramCache]: Analyzing trace with hash -996607575, now seen corresponding path program 3 times [2019-11-15 19:54:24,434 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:24,434 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717182614] [2019-11-15 19:54:24,434 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:24,434 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:24,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:24,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:54:24,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:54:24,768 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1717182614] [2019-11-15 19:54:24,768 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:54:24,768 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-11-15 19:54:24,769 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707812744] [2019-11-15 19:54:24,770 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-11-15 19:54:24,776 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:54:24,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-11-15 19:54:24,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-11-15 19:54:24,777 INFO L87 Difference]: Start difference. First operand 2598 states and 6746 transitions. Second operand 15 states. [2019-11-15 19:54:25,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:54:25,477 INFO L93 Difference]: Finished difference Result 2760 states and 7205 transitions. [2019-11-15 19:54:25,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-15 19:54:25,478 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 113 [2019-11-15 19:54:25,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:54:25,480 INFO L225 Difference]: With dead ends: 2760 [2019-11-15 19:54:25,480 INFO L226 Difference]: Without dead ends: 2598 [2019-11-15 19:54:25,481 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=161, Invalid=595, Unknown=0, NotChecked=0, Total=756 [2019-11-15 19:54:25,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2598 states. [2019-11-15 19:54:25,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2598 to 2598. [2019-11-15 19:54:25,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2598 states. [2019-11-15 19:54:25,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2598 states to 2598 states and 6719 transitions. [2019-11-15 19:54:25,507 INFO L78 Accepts]: Start accepts. Automaton has 2598 states and 6719 transitions. Word has length 113 [2019-11-15 19:54:25,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:54:25,507 INFO L462 AbstractCegarLoop]: Abstraction has 2598 states and 6719 transitions. [2019-11-15 19:54:25,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-11-15 19:54:25,507 INFO L276 IsEmpty]: Start isEmpty. Operand 2598 states and 6719 transitions. [2019-11-15 19:54:25,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 19:54:25,510 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:54:25,510 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:54:25,510 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:54:25,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:54:25,510 INFO L82 PathProgramCache]: Analyzing trace with hash 1555549386, now seen corresponding path program 1 times [2019-11-15 19:54:25,510 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:54:25,510 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222976893] [2019-11-15 19:54:25,511 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:25,511 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:54:25,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:54:25,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 19:54:25,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 19:54:25,624 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 19:54:25,624 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 19:54:25,817 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 19:54:25,820 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 07:54:25 BasicIcfg [2019-11-15 19:54:25,820 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 19:54:25,820 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 19:54:25,821 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 19:54:25,821 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 19:54:25,821 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 07:53:15" (3/4) ... [2019-11-15 19:54:25,837 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 19:54:26,073 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ab7afde8-e058-4c96-bffa-112fcbac1e33/bin/uautomizer/witness.graphml [2019-11-15 19:54:26,073 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 19:54:26,075 INFO L168 Benchmark]: Toolchain (without parser) took 71728.88 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 939.4 MB in the beginning and 2.6 GB in the end (delta: -1.6 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-11-15 19:54:26,076 INFO L168 Benchmark]: CDTParser took 0.32 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 19:54:26,076 INFO L168 Benchmark]: CACSL2BoogieTranslator took 729.21 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.8 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -156.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-11-15 19:54:26,076 INFO L168 Benchmark]: Boogie Procedure Inliner took 51.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 19:54:26,077 INFO L168 Benchmark]: Boogie Preprocessor took 39.23 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 19:54:26,077 INFO L168 Benchmark]: RCFGBuilder took 749.45 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. [2019-11-15 19:54:26,077 INFO L168 Benchmark]: TraceAbstraction took 69902.45 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-11-15 19:54:26,078 INFO L168 Benchmark]: Witness Printer took 252.93 ms. Allocated memory is still 7.0 GB. Free memory was 2.7 GB in the beginning and 2.6 GB in the end (delta: 112.7 MB). Peak memory consumption was 112.7 MB. Max. memory is 11.5 GB. [2019-11-15 19:54:26,080 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 729.21 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.8 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -156.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 51.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 39.23 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 749.45 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 69902.45 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. * Witness Printer took 252.93 ms. Allocated memory is still 7.0 GB. Free memory was 2.7 GB in the beginning and 2.6 GB in the end (delta: 112.7 MB). Peak memory consumption was 112.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L696] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L698] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L699] 0 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L705] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L706] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L707] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L708] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L709] 0 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L710] 0 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L711] 0 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L712] 0 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L713] 0 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L714] 0 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L716] 0 int __unbuffered_p0_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0] [L718] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0] [L719] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L720] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L722] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L724] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}] [L725] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0] [L726] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0] [L727] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L728] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L729] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L730] 0 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L731] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L732] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L733] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L734] 0 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L735] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L736] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L737] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L738] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L739] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L740] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L741] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L743] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L820] 0 pthread_t t2109; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] FCALL, FORK 0 pthread_create(&t2109, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L748] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L749] 1 y$flush_delayed = weak$$choice2 [L750] EXPR 1 \read(y) [L750] 1 y$mem_tmp = y [L751] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L751] EXPR 1 \read(y) [L751] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L751] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L752] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L822] 0 pthread_t t2110; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L752] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L753] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L753] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L754] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L754] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L755] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L756] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L823] FCALL, FORK 0 pthread_create(&t2110, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L824] 0 pthread_t t2111; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t2111, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L757] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y={1:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L758] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L759] 1 __unbuffered_p0_EAX$read_delayed_var = &y [L760] EXPR 1 \read(y) [L760] 1 __unbuffered_p0_EAX = y [L761] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={1:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L761] 1 y = y$flush_delayed ? y$mem_tmp : y [L762] 1 y$flush_delayed = (_Bool)0 [L765] 1 __unbuffered_p0_EBX = x [L770] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] 2 x = 1 [L780] 2 x = 2 [L785] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] 3 __unbuffered_p2_EAX = x [L795] 3 y = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 3 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L798] EXPR 3 \read(y) [L798] EXPR 3 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=1] [L798] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=1] [L798] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L799] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L800] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L801] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L802] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 3 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L805] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L827] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L831] EXPR 0 \read(y) [L831] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L832] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L832] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L833] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L833] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L834] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L834] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L835] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L835] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L838] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L839] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L839] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L839] EXPR 0 \read(*__unbuffered_p0_EAX$read_delayed_var) [L839] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L839] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L839] 0 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L840] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p0_EAX == 1 && __unbuffered_p0_EBX == 0 && __unbuffered_p2_EAX == 2) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE 0 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] 0 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={1:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 225 locations, 1 error locations. Result: UNSAFE, OverallTime: 69.7s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 21.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5075 SDtfs, 6623 SDslu, 12142 SDs, 0 SdLazy, 3750 SolverSat, 325 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 225 GetRequests, 65 SyntacticMatches, 19 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 160 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=147307occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 32.5s AutomataMinimizationTime, 21 MinimizatonAttempts, 121177 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 2171 NumberOfCodeBlocks, 2171 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 2037 ConstructedInterpolants, 0 QuantifiedInterpolants, 586706 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...