./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe029_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe029_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b6f84a75f7e7e2b60206e8ca033ac378ee639ae0 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 21:05:03,627 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 21:05:03,628 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 21:05:03,638 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 21:05:03,639 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 21:05:03,639 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 21:05:03,641 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 21:05:03,643 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 21:05:03,644 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 21:05:03,645 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 21:05:03,646 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 21:05:03,647 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 21:05:03,648 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 21:05:03,648 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 21:05:03,649 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 21:05:03,650 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 21:05:03,651 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 21:05:03,652 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 21:05:03,654 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 21:05:03,655 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 21:05:03,657 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 21:05:03,658 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 21:05:03,659 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 21:05:03,660 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 21:05:03,662 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 21:05:03,662 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 21:05:03,663 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 21:05:03,663 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 21:05:03,664 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 21:05:03,665 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 21:05:03,665 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 21:05:03,666 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 21:05:03,666 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 21:05:03,667 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 21:05:03,668 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 21:05:03,668 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 21:05:03,669 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 21:05:03,669 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 21:05:03,669 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 21:05:03,670 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 21:05:03,671 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 21:05:03,672 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 21:05:03,684 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 21:05:03,684 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 21:05:03,685 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 21:05:03,686 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 21:05:03,686 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 21:05:03,686 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 21:05:03,687 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 21:05:03,687 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 21:05:03,687 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 21:05:03,687 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 21:05:03,687 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 21:05:03,688 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 21:05:03,688 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 21:05:03,688 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 21:05:03,688 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 21:05:03,689 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 21:05:03,689 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 21:05:03,689 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 21:05:03,690 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 21:05:03,690 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 21:05:03,690 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 21:05:03,690 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:05:03,691 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 21:05:03,691 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 21:05:03,691 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 21:05:03,691 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 21:05:03,692 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 21:05:03,692 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 21:05:03,692 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b6f84a75f7e7e2b60206e8ca033ac378ee639ae0 [2019-11-15 21:05:03,717 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 21:05:03,728 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 21:05:03,732 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 21:05:03,734 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 21:05:03,734 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 21:05:03,735 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe029_power.oepc.i [2019-11-15 21:05:03,794 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/data/230baa462/d387982d64cf4271b63050b11ccf0b2d/FLAG006499ea2 [2019-11-15 21:05:04,294 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 21:05:04,297 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/sv-benchmarks/c/pthread-wmm/safe029_power.oepc.i [2019-11-15 21:05:04,320 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/data/230baa462/d387982d64cf4271b63050b11ccf0b2d/FLAG006499ea2 [2019-11-15 21:05:04,602 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/data/230baa462/d387982d64cf4271b63050b11ccf0b2d [2019-11-15 21:05:04,605 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 21:05:04,606 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 21:05:04,607 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 21:05:04,607 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 21:05:04,610 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 21:05:04,611 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:05:04" (1/1) ... [2019-11-15 21:05:04,612 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3ea50d3d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:04, skipping insertion in model container [2019-11-15 21:05:04,613 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:05:04" (1/1) ... [2019-11-15 21:05:04,620 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 21:05:04,669 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 21:05:05,063 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:05:05,075 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 21:05:05,183 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:05:05,268 INFO L192 MainTranslator]: Completed translation [2019-11-15 21:05:05,268 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05 WrapperNode [2019-11-15 21:05:05,269 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 21:05:05,270 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 21:05:05,270 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 21:05:05,270 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 21:05:05,277 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,292 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,330 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 21:05:05,331 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 21:05:05,331 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 21:05:05,331 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 21:05:05,340 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,340 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,344 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,344 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,353 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,356 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,359 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... [2019-11-15 21:05:05,364 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 21:05:05,364 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 21:05:05,364 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 21:05:05,364 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 21:05:05,365 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:05:05,421 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 21:05:05,422 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 21:05:05,422 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 21:05:05,422 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 21:05:05,422 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 21:05:05,422 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 21:05:05,422 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 21:05:05,423 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 21:05:05,423 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 21:05:05,423 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 21:05:05,423 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 21:05:05,425 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 21:05:06,096 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 21:05:06,097 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 21:05:06,099 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:05:06 BoogieIcfgContainer [2019-11-15 21:05:06,099 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 21:05:06,100 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 21:05:06,100 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 21:05:06,103 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 21:05:06,103 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 09:05:04" (1/3) ... [2019-11-15 21:05:06,104 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c65c357 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:05:06, skipping insertion in model container [2019-11-15 21:05:06,104 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:05:05" (2/3) ... [2019-11-15 21:05:06,105 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c65c357 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:05:06, skipping insertion in model container [2019-11-15 21:05:06,105 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:05:06" (3/3) ... [2019-11-15 21:05:06,106 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_power.oepc.i [2019-11-15 21:05:06,162 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,162 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,162 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,162 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,162 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,162 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,163 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,163 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,163 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,163 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,163 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,164 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,164 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,164 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,164 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,164 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,165 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,165 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,165 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,165 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,165 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,165 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,166 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,166 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,166 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,166 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,167 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,167 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,167 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,167 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,167 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,167 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,168 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,168 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,168 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,169 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,169 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,169 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,169 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,169 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,170 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,170 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,170 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,171 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,171 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,172 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,173 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,173 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,173 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,173 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,173 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,174 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,174 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,174 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,174 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,175 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,175 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,175 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,175 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,176 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,176 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,176 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,176 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,176 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:05:06,181 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 21:05:06,182 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 21:05:06,189 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 21:05:06,203 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 21:05:06,221 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 21:05:06,222 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 21:05:06,222 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 21:05:06,222 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 21:05:06,222 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 21:05:06,223 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 21:05:06,223 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 21:05:06,223 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 21:05:06,239 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 138 places, 176 transitions [2019-11-15 21:05:07,811 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22508 states. [2019-11-15 21:05:07,813 INFO L276 IsEmpty]: Start isEmpty. Operand 22508 states. [2019-11-15 21:05:07,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-11-15 21:05:07,819 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:07,820 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:07,822 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:07,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:07,826 INFO L82 PathProgramCache]: Analyzing trace with hash -564804312, now seen corresponding path program 1 times [2019-11-15 21:05:07,832 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:07,832 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784395410] [2019-11-15 21:05:07,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:07,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:07,833 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:07,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:08,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:08,069 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784395410] [2019-11-15 21:05:08,070 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:08,070 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:05:08,070 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1293554849] [2019-11-15 21:05:08,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:05:08,075 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:08,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:05:08,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:05:08,094 INFO L87 Difference]: Start difference. First operand 22508 states. Second operand 4 states. [2019-11-15 21:05:08,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:08,657 INFO L93 Difference]: Finished difference Result 23452 states and 91769 transitions. [2019-11-15 21:05:08,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:05:08,659 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-11-15 21:05:08,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:08,876 INFO L225 Difference]: With dead ends: 23452 [2019-11-15 21:05:08,877 INFO L226 Difference]: Without dead ends: 21276 [2019-11-15 21:05:08,880 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:05:09,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21276 states. [2019-11-15 21:05:09,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21276 to 21276. [2019-11-15 21:05:09,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21276 states. [2019-11-15 21:05:10,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21276 states to 21276 states and 83793 transitions. [2019-11-15 21:05:10,124 INFO L78 Accepts]: Start accepts. Automaton has 21276 states and 83793 transitions. Word has length 31 [2019-11-15 21:05:10,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:10,125 INFO L462 AbstractCegarLoop]: Abstraction has 21276 states and 83793 transitions. [2019-11-15 21:05:10,125 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:05:10,125 INFO L276 IsEmpty]: Start isEmpty. Operand 21276 states and 83793 transitions. [2019-11-15 21:05:10,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-11-15 21:05:10,136 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:10,136 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:10,136 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:10,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:10,137 INFO L82 PathProgramCache]: Analyzing trace with hash 1206913622, now seen corresponding path program 1 times [2019-11-15 21:05:10,137 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:10,137 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766387863] [2019-11-15 21:05:10,138 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:10,138 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:10,138 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:10,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:10,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:10,277 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766387863] [2019-11-15 21:05:10,277 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:10,277 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:05:10,277 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035051040] [2019-11-15 21:05:10,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:05:10,279 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:10,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:05:10,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:10,280 INFO L87 Difference]: Start difference. First operand 21276 states and 83793 transitions. Second operand 5 states. [2019-11-15 21:05:11,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:11,273 INFO L93 Difference]: Finished difference Result 34710 states and 129089 transitions. [2019-11-15 21:05:11,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:05:11,273 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-11-15 21:05:11,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:11,417 INFO L225 Difference]: With dead ends: 34710 [2019-11-15 21:05:11,418 INFO L226 Difference]: Without dead ends: 34566 [2019-11-15 21:05:11,418 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:05:11,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34566 states. [2019-11-15 21:05:12,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34566 to 33066. [2019-11-15 21:05:12,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33066 states. [2019-11-15 21:05:12,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33066 states to 33066 states and 123977 transitions. [2019-11-15 21:05:12,710 INFO L78 Accepts]: Start accepts. Automaton has 33066 states and 123977 transitions. Word has length 42 [2019-11-15 21:05:12,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:12,712 INFO L462 AbstractCegarLoop]: Abstraction has 33066 states and 123977 transitions. [2019-11-15 21:05:12,712 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:05:12,712 INFO L276 IsEmpty]: Start isEmpty. Operand 33066 states and 123977 transitions. [2019-11-15 21:05:12,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-15 21:05:12,719 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:12,719 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:12,719 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:12,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:12,719 INFO L82 PathProgramCache]: Analyzing trace with hash -1177190009, now seen corresponding path program 1 times [2019-11-15 21:05:12,720 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:12,720 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880418412] [2019-11-15 21:05:12,720 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:12,721 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:12,721 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:12,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:12,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:12,844 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880418412] [2019-11-15 21:05:12,844 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:12,845 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:05:12,845 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974430150] [2019-11-15 21:05:12,845 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:05:12,845 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:12,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:05:12,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:12,846 INFO L87 Difference]: Start difference. First operand 33066 states and 123977 transitions. Second operand 5 states. [2019-11-15 21:05:13,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:13,818 INFO L93 Difference]: Finished difference Result 40218 states and 148646 transitions. [2019-11-15 21:05:13,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:05:13,818 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-15 21:05:13,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:13,938 INFO L225 Difference]: With dead ends: 40218 [2019-11-15 21:05:13,939 INFO L226 Difference]: Without dead ends: 40058 [2019-11-15 21:05:13,939 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:05:14,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40058 states. [2019-11-15 21:05:14,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40058 to 34639. [2019-11-15 21:05:14,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34639 states. [2019-11-15 21:05:14,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34639 states to 34639 states and 129273 transitions. [2019-11-15 21:05:14,786 INFO L78 Accepts]: Start accepts. Automaton has 34639 states and 129273 transitions. Word has length 43 [2019-11-15 21:05:14,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:14,786 INFO L462 AbstractCegarLoop]: Abstraction has 34639 states and 129273 transitions. [2019-11-15 21:05:14,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:05:14,787 INFO L276 IsEmpty]: Start isEmpty. Operand 34639 states and 129273 transitions. [2019-11-15 21:05:14,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-11-15 21:05:14,800 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:14,801 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:14,801 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:14,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:14,802 INFO L82 PathProgramCache]: Analyzing trace with hash 1223739296, now seen corresponding path program 1 times [2019-11-15 21:05:14,802 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:14,802 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913517893] [2019-11-15 21:05:14,802 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:14,802 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:14,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:14,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:14,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:14,882 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913517893] [2019-11-15 21:05:14,883 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:14,883 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:05:14,883 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381595463] [2019-11-15 21:05:14,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:05:14,883 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:14,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:05:14,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:14,884 INFO L87 Difference]: Start difference. First operand 34639 states and 129273 transitions. Second operand 6 states. [2019-11-15 21:05:16,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:16,515 INFO L93 Difference]: Finished difference Result 45667 states and 166167 transitions. [2019-11-15 21:05:16,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 21:05:16,515 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 50 [2019-11-15 21:05:16,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:16,629 INFO L225 Difference]: With dead ends: 45667 [2019-11-15 21:05:16,630 INFO L226 Difference]: Without dead ends: 45523 [2019-11-15 21:05:16,630 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 21:05:16,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45523 states. [2019-11-15 21:05:17,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45523 to 33602. [2019-11-15 21:05:17,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33602 states. [2019-11-15 21:05:17,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33602 states to 33602 states and 125428 transitions. [2019-11-15 21:05:17,379 INFO L78 Accepts]: Start accepts. Automaton has 33602 states and 125428 transitions. Word has length 50 [2019-11-15 21:05:17,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:17,379 INFO L462 AbstractCegarLoop]: Abstraction has 33602 states and 125428 transitions. [2019-11-15 21:05:17,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:05:17,380 INFO L276 IsEmpty]: Start isEmpty. Operand 33602 states and 125428 transitions. [2019-11-15 21:05:17,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-15 21:05:17,413 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:17,413 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:17,413 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:17,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:17,414 INFO L82 PathProgramCache]: Analyzing trace with hash -345936719, now seen corresponding path program 1 times [2019-11-15 21:05:17,414 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:17,414 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010248235] [2019-11-15 21:05:17,414 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:17,414 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:17,415 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:17,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:17,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:17,495 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1010248235] [2019-11-15 21:05:17,496 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:17,496 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:05:17,496 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762893274] [2019-11-15 21:05:17,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:05:17,497 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:17,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:05:17,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:17,497 INFO L87 Difference]: Start difference. First operand 33602 states and 125428 transitions. Second operand 6 states. [2019-11-15 21:05:18,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:18,628 INFO L93 Difference]: Finished difference Result 46074 states and 167861 transitions. [2019-11-15 21:05:18,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 21:05:18,628 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 57 [2019-11-15 21:05:18,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:18,718 INFO L225 Difference]: With dead ends: 46074 [2019-11-15 21:05:18,719 INFO L226 Difference]: Without dead ends: 45834 [2019-11-15 21:05:18,719 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:05:18,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45834 states. [2019-11-15 21:05:19,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45834 to 39963. [2019-11-15 21:05:19,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39963 states. [2019-11-15 21:05:19,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39963 states to 39963 states and 147352 transitions. [2019-11-15 21:05:19,375 INFO L78 Accepts]: Start accepts. Automaton has 39963 states and 147352 transitions. Word has length 57 [2019-11-15 21:05:19,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:19,375 INFO L462 AbstractCegarLoop]: Abstraction has 39963 states and 147352 transitions. [2019-11-15 21:05:19,376 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:05:19,376 INFO L276 IsEmpty]: Start isEmpty. Operand 39963 states and 147352 transitions. [2019-11-15 21:05:19,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-11-15 21:05:19,410 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:19,410 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:19,410 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:19,411 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:19,411 INFO L82 PathProgramCache]: Analyzing trace with hash -480456418, now seen corresponding path program 1 times [2019-11-15 21:05:19,411 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:19,411 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433296755] [2019-11-15 21:05:19,411 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:19,412 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:19,412 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:19,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:19,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:19,451 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [433296755] [2019-11-15 21:05:19,451 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:19,451 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:05:19,451 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636857415] [2019-11-15 21:05:19,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:05:19,452 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:19,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:05:19,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:19,452 INFO L87 Difference]: Start difference. First operand 39963 states and 147352 transitions. Second operand 3 states. [2019-11-15 21:05:19,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:19,658 INFO L93 Difference]: Finished difference Result 50261 states and 182187 transitions. [2019-11-15 21:05:19,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:05:19,658 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-11-15 21:05:19,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:19,750 INFO L225 Difference]: With dead ends: 50261 [2019-11-15 21:05:19,750 INFO L226 Difference]: Without dead ends: 50261 [2019-11-15 21:05:19,750 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:19,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50261 states. [2019-11-15 21:05:21,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50261 to 43893. [2019-11-15 21:05:21,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43893 states. [2019-11-15 21:05:21,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43893 states to 43893 states and 160790 transitions. [2019-11-15 21:05:21,221 INFO L78 Accepts]: Start accepts. Automaton has 43893 states and 160790 transitions. Word has length 59 [2019-11-15 21:05:21,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:21,222 INFO L462 AbstractCegarLoop]: Abstraction has 43893 states and 160790 transitions. [2019-11-15 21:05:21,222 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:05:21,222 INFO L276 IsEmpty]: Start isEmpty. Operand 43893 states and 160790 transitions. [2019-11-15 21:05:21,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-11-15 21:05:21,253 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:21,253 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:21,253 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:21,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:21,254 INFO L82 PathProgramCache]: Analyzing trace with hash 1618566875, now seen corresponding path program 1 times [2019-11-15 21:05:21,254 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:21,254 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400860143] [2019-11-15 21:05:21,254 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:21,254 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:21,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:21,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:21,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:21,348 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400860143] [2019-11-15 21:05:21,348 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:21,348 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:05:21,348 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [851671047] [2019-11-15 21:05:21,349 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:05:21,349 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:21,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:05:21,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:21,350 INFO L87 Difference]: Start difference. First operand 43893 states and 160790 transitions. Second operand 7 states. [2019-11-15 21:05:22,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:22,273 INFO L93 Difference]: Finished difference Result 55889 states and 200524 transitions. [2019-11-15 21:05:22,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:05:22,273 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 63 [2019-11-15 21:05:22,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:22,381 INFO L225 Difference]: With dead ends: 55889 [2019-11-15 21:05:22,381 INFO L226 Difference]: Without dead ends: 55649 [2019-11-15 21:05:22,381 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 21:05:22,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55649 states. [2019-11-15 21:05:23,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55649 to 45119. [2019-11-15 21:05:23,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45119 states. [2019-11-15 21:05:23,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45119 states to 45119 states and 164957 transitions. [2019-11-15 21:05:23,167 INFO L78 Accepts]: Start accepts. Automaton has 45119 states and 164957 transitions. Word has length 63 [2019-11-15 21:05:23,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:23,168 INFO L462 AbstractCegarLoop]: Abstraction has 45119 states and 164957 transitions. [2019-11-15 21:05:23,168 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:05:23,168 INFO L276 IsEmpty]: Start isEmpty. Operand 45119 states and 164957 transitions. [2019-11-15 21:05:23,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 21:05:23,199 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:23,199 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:23,200 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:23,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:23,200 INFO L82 PathProgramCache]: Analyzing trace with hash 884445962, now seen corresponding path program 1 times [2019-11-15 21:05:23,200 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:23,200 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895229394] [2019-11-15 21:05:23,200 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:23,201 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:23,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:23,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:23,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:23,304 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895229394] [2019-11-15 21:05:23,304 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:23,304 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:05:23,304 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422184250] [2019-11-15 21:05:23,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:05:23,305 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:23,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:05:23,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:23,305 INFO L87 Difference]: Start difference. First operand 45119 states and 164957 transitions. Second operand 7 states. [2019-11-15 21:05:24,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:24,721 INFO L93 Difference]: Finished difference Result 55103 states and 197701 transitions. [2019-11-15 21:05:24,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:05:24,721 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-15 21:05:24,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:24,822 INFO L225 Difference]: With dead ends: 55103 [2019-11-15 21:05:24,822 INFO L226 Difference]: Without dead ends: 54903 [2019-11-15 21:05:24,822 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 21:05:24,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54903 states. [2019-11-15 21:05:25,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54903 to 45997. [2019-11-15 21:05:25,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45997 states. [2019-11-15 21:05:25,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45997 states to 45997 states and 167828 transitions. [2019-11-15 21:05:25,603 INFO L78 Accepts]: Start accepts. Automaton has 45997 states and 167828 transitions. Word has length 64 [2019-11-15 21:05:25,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:25,604 INFO L462 AbstractCegarLoop]: Abstraction has 45997 states and 167828 transitions. [2019-11-15 21:05:25,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:05:25,604 INFO L276 IsEmpty]: Start isEmpty. Operand 45997 states and 167828 transitions. [2019-11-15 21:05:25,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:05:25,632 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:25,632 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:25,632 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:25,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:25,633 INFO L82 PathProgramCache]: Analyzing trace with hash 1344094873, now seen corresponding path program 1 times [2019-11-15 21:05:25,633 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:25,633 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126363849] [2019-11-15 21:05:25,633 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:25,633 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:25,633 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:25,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:25,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:25,746 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126363849] [2019-11-15 21:05:25,747 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:25,747 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:05:25,747 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814802973] [2019-11-15 21:05:25,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:05:25,748 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:25,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:05:25,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:25,748 INFO L87 Difference]: Start difference. First operand 45997 states and 167828 transitions. Second operand 6 states. [2019-11-15 21:05:26,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:26,465 INFO L93 Difference]: Finished difference Result 65557 states and 237355 transitions. [2019-11-15 21:05:26,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:05:26,466 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-11-15 21:05:26,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:26,589 INFO L225 Difference]: With dead ends: 65557 [2019-11-15 21:05:26,589 INFO L226 Difference]: Without dead ends: 64913 [2019-11-15 21:05:26,590 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:05:26,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64913 states. [2019-11-15 21:05:27,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64913 to 56047. [2019-11-15 21:05:27,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56047 states. [2019-11-15 21:05:27,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56047 states to 56047 states and 204358 transitions. [2019-11-15 21:05:27,609 INFO L78 Accepts]: Start accepts. Automaton has 56047 states and 204358 transitions. Word has length 66 [2019-11-15 21:05:27,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:27,609 INFO L462 AbstractCegarLoop]: Abstraction has 56047 states and 204358 transitions. [2019-11-15 21:05:27,609 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:05:27,609 INFO L276 IsEmpty]: Start isEmpty. Operand 56047 states and 204358 transitions. [2019-11-15 21:05:27,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:05:27,657 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:27,658 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:27,658 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:27,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:27,658 INFO L82 PathProgramCache]: Analyzing trace with hash -1989258406, now seen corresponding path program 1 times [2019-11-15 21:05:27,658 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:27,659 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286932003] [2019-11-15 21:05:27,659 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:27,659 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:27,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:27,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:27,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:27,811 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286932003] [2019-11-15 21:05:27,812 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:27,812 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:05:27,812 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [655238599] [2019-11-15 21:05:27,812 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:05:27,813 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:27,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:05:27,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:27,813 INFO L87 Difference]: Start difference. First operand 56047 states and 204358 transitions. Second operand 7 states. [2019-11-15 21:05:29,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:29,153 INFO L93 Difference]: Finished difference Result 83035 states and 292786 transitions. [2019-11-15 21:05:29,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:05:29,153 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 21:05:29,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:29,326 INFO L225 Difference]: With dead ends: 83035 [2019-11-15 21:05:29,326 INFO L226 Difference]: Without dead ends: 83035 [2019-11-15 21:05:29,326 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:05:29,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83035 states. [2019-11-15 21:05:30,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83035 to 76084. [2019-11-15 21:05:30,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76084 states. [2019-11-15 21:05:30,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76084 states to 76084 states and 270653 transitions. [2019-11-15 21:05:30,712 INFO L78 Accepts]: Start accepts. Automaton has 76084 states and 270653 transitions. Word has length 66 [2019-11-15 21:05:30,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:30,712 INFO L462 AbstractCegarLoop]: Abstraction has 76084 states and 270653 transitions. [2019-11-15 21:05:30,712 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:05:30,712 INFO L276 IsEmpty]: Start isEmpty. Operand 76084 states and 270653 transitions. [2019-11-15 21:05:30,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:05:30,788 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:30,788 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:30,788 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:30,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:30,789 INFO L82 PathProgramCache]: Analyzing trace with hash -744493925, now seen corresponding path program 1 times [2019-11-15 21:05:30,789 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:30,789 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403880514] [2019-11-15 21:05:30,789 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:30,790 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:30,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:30,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:30,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:30,910 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [403880514] [2019-11-15 21:05:30,910 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:30,910 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:05:30,910 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2056405206] [2019-11-15 21:05:30,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:05:30,911 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:30,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:05:30,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:05:30,912 INFO L87 Difference]: Start difference. First operand 76084 states and 270653 transitions. Second operand 4 states. [2019-11-15 21:05:31,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:31,007 INFO L93 Difference]: Finished difference Result 17229 states and 54531 transitions. [2019-11-15 21:05:31,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:05:31,008 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-11-15 21:05:31,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:31,046 INFO L225 Difference]: With dead ends: 17229 [2019-11-15 21:05:31,046 INFO L226 Difference]: Without dead ends: 16751 [2019-11-15 21:05:31,047 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:31,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16751 states. [2019-11-15 21:05:31,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16751 to 16739. [2019-11-15 21:05:31,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16739 states. [2019-11-15 21:05:31,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16739 states to 16739 states and 53026 transitions. [2019-11-15 21:05:31,393 INFO L78 Accepts]: Start accepts. Automaton has 16739 states and 53026 transitions. Word has length 66 [2019-11-15 21:05:31,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:31,394 INFO L462 AbstractCegarLoop]: Abstraction has 16739 states and 53026 transitions. [2019-11-15 21:05:31,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:05:31,394 INFO L276 IsEmpty]: Start isEmpty. Operand 16739 states and 53026 transitions. [2019-11-15 21:05:31,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 21:05:31,414 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:31,414 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:31,414 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:31,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:31,415 INFO L82 PathProgramCache]: Analyzing trace with hash 263914028, now seen corresponding path program 1 times [2019-11-15 21:05:31,415 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:31,415 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474126242] [2019-11-15 21:05:31,415 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:31,416 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:31,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:31,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:31,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:31,518 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474126242] [2019-11-15 21:05:31,518 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:31,518 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:05:31,519 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [93642024] [2019-11-15 21:05:31,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:05:31,519 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:31,520 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:05:31,520 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:05:31,520 INFO L87 Difference]: Start difference. First operand 16739 states and 53026 transitions. Second operand 4 states. [2019-11-15 21:05:31,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:31,750 INFO L93 Difference]: Finished difference Result 22103 states and 69107 transitions. [2019-11-15 21:05:31,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:05:31,750 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2019-11-15 21:05:31,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:31,783 INFO L225 Difference]: With dead ends: 22103 [2019-11-15 21:05:31,783 INFO L226 Difference]: Without dead ends: 22103 [2019-11-15 21:05:31,783 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:31,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22103 states. [2019-11-15 21:05:32,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22103 to 17615. [2019-11-15 21:05:32,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17615 states. [2019-11-15 21:05:32,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17615 states to 17615 states and 55585 transitions. [2019-11-15 21:05:32,065 INFO L78 Accepts]: Start accepts. Automaton has 17615 states and 55585 transitions. Word has length 76 [2019-11-15 21:05:32,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:32,065 INFO L462 AbstractCegarLoop]: Abstraction has 17615 states and 55585 transitions. [2019-11-15 21:05:32,065 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:05:32,065 INFO L276 IsEmpty]: Start isEmpty. Operand 17615 states and 55585 transitions. [2019-11-15 21:05:32,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 21:05:32,079 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:32,080 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:32,080 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:32,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:32,080 INFO L82 PathProgramCache]: Analyzing trace with hash 9177483, now seen corresponding path program 1 times [2019-11-15 21:05:32,080 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:32,080 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370207103] [2019-11-15 21:05:32,080 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:32,080 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:32,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:32,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:32,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:32,180 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370207103] [2019-11-15 21:05:32,180 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:32,180 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:05:32,181 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980947224] [2019-11-15 21:05:32,181 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:05:32,181 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:32,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:05:32,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:05:32,182 INFO L87 Difference]: Start difference. First operand 17615 states and 55585 transitions. Second operand 8 states. [2019-11-15 21:05:33,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:33,251 INFO L93 Difference]: Finished difference Result 19709 states and 61661 transitions. [2019-11-15 21:05:33,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 21:05:33,252 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 76 [2019-11-15 21:05:33,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:33,280 INFO L225 Difference]: With dead ends: 19709 [2019-11-15 21:05:33,280 INFO L226 Difference]: Without dead ends: 19661 [2019-11-15 21:05:33,280 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-15 21:05:33,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19661 states. [2019-11-15 21:05:33,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19661 to 15533. [2019-11-15 21:05:33,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15533 states. [2019-11-15 21:05:33,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15533 states to 15533 states and 49319 transitions. [2019-11-15 21:05:33,504 INFO L78 Accepts]: Start accepts. Automaton has 15533 states and 49319 transitions. Word has length 76 [2019-11-15 21:05:33,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:33,504 INFO L462 AbstractCegarLoop]: Abstraction has 15533 states and 49319 transitions. [2019-11-15 21:05:33,504 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:05:33,504 INFO L276 IsEmpty]: Start isEmpty. Operand 15533 states and 49319 transitions. [2019-11-15 21:05:33,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-15 21:05:33,517 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:33,517 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:33,518 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:33,518 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:33,518 INFO L82 PathProgramCache]: Analyzing trace with hash -760558455, now seen corresponding path program 1 times [2019-11-15 21:05:33,518 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:33,518 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838610121] [2019-11-15 21:05:33,518 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:33,518 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:33,518 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:33,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:33,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:33,575 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1838610121] [2019-11-15 21:05:33,575 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:33,575 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:05:33,576 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139245918] [2019-11-15 21:05:33,576 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:05:33,576 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:33,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:05:33,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:33,577 INFO L87 Difference]: Start difference. First operand 15533 states and 49319 transitions. Second operand 3 states. [2019-11-15 21:05:33,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:33,846 INFO L93 Difference]: Finished difference Result 16797 states and 53032 transitions. [2019-11-15 21:05:33,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:05:33,846 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 77 [2019-11-15 21:05:33,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:33,870 INFO L225 Difference]: With dead ends: 16797 [2019-11-15 21:05:33,870 INFO L226 Difference]: Without dead ends: 16797 [2019-11-15 21:05:33,871 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:33,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16797 states. [2019-11-15 21:05:34,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16797 to 16149. [2019-11-15 21:05:34,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16149 states. [2019-11-15 21:05:34,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16149 states to 16149 states and 51133 transitions. [2019-11-15 21:05:34,087 INFO L78 Accepts]: Start accepts. Automaton has 16149 states and 51133 transitions. Word has length 77 [2019-11-15 21:05:34,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:34,087 INFO L462 AbstractCegarLoop]: Abstraction has 16149 states and 51133 transitions. [2019-11-15 21:05:34,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:05:34,087 INFO L276 IsEmpty]: Start isEmpty. Operand 16149 states and 51133 transitions. [2019-11-15 21:05:34,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 21:05:34,100 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:34,100 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:34,101 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:34,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:34,101 INFO L82 PathProgramCache]: Analyzing trace with hash -1482177058, now seen corresponding path program 1 times [2019-11-15 21:05:34,101 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:34,101 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670051839] [2019-11-15 21:05:34,101 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:34,101 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:34,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:34,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:34,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:34,164 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670051839] [2019-11-15 21:05:34,165 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:34,165 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:05:34,165 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198448089] [2019-11-15 21:05:34,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:05:34,165 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:34,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:05:34,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:05:34,166 INFO L87 Difference]: Start difference. First operand 16149 states and 51133 transitions. Second operand 4 states. [2019-11-15 21:05:34,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:34,443 INFO L93 Difference]: Finished difference Result 19317 states and 60263 transitions. [2019-11-15 21:05:34,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:05:34,444 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-11-15 21:05:34,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:34,477 INFO L225 Difference]: With dead ends: 19317 [2019-11-15 21:05:34,477 INFO L226 Difference]: Without dead ends: 19317 [2019-11-15 21:05:34,477 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:05:34,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19317 states. [2019-11-15 21:05:34,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19317 to 18294. [2019-11-15 21:05:34,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18294 states. [2019-11-15 21:05:34,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18294 states to 18294 states and 57379 transitions. [2019-11-15 21:05:34,764 INFO L78 Accepts]: Start accepts. Automaton has 18294 states and 57379 transitions. Word has length 78 [2019-11-15 21:05:34,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:34,764 INFO L462 AbstractCegarLoop]: Abstraction has 18294 states and 57379 transitions. [2019-11-15 21:05:34,764 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:05:34,764 INFO L276 IsEmpty]: Start isEmpty. Operand 18294 states and 57379 transitions. [2019-11-15 21:05:34,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 21:05:34,782 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:34,783 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:34,783 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:34,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:34,783 INFO L82 PathProgramCache]: Analyzing trace with hash 877129951, now seen corresponding path program 1 times [2019-11-15 21:05:34,783 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:34,783 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145310419] [2019-11-15 21:05:34,784 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:34,784 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:34,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:34,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:34,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:34,831 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145310419] [2019-11-15 21:05:34,831 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:34,831 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:05:34,831 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287782422] [2019-11-15 21:05:34,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:05:34,832 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:34,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:05:34,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:34,833 INFO L87 Difference]: Start difference. First operand 18294 states and 57379 transitions. Second operand 3 states. [2019-11-15 21:05:35,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:35,154 INFO L93 Difference]: Finished difference Result 19637 states and 61302 transitions. [2019-11-15 21:05:35,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:05:35,155 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-11-15 21:05:35,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:35,187 INFO L225 Difference]: With dead ends: 19637 [2019-11-15 21:05:35,187 INFO L226 Difference]: Without dead ends: 19637 [2019-11-15 21:05:35,189 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:35,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19637 states. [2019-11-15 21:05:35,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19637 to 18974. [2019-11-15 21:05:35,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18974 states. [2019-11-15 21:05:35,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18974 states to 18974 states and 59359 transitions. [2019-11-15 21:05:35,452 INFO L78 Accepts]: Start accepts. Automaton has 18974 states and 59359 transitions. Word has length 78 [2019-11-15 21:05:35,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:35,452 INFO L462 AbstractCegarLoop]: Abstraction has 18974 states and 59359 transitions. [2019-11-15 21:05:35,452 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:05:35,452 INFO L276 IsEmpty]: Start isEmpty. Operand 18974 states and 59359 transitions. [2019-11-15 21:05:35,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:05:35,471 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:35,471 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:35,472 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:35,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:35,472 INFO L82 PathProgramCache]: Analyzing trace with hash 1829246556, now seen corresponding path program 1 times [2019-11-15 21:05:35,472 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:35,472 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784795572] [2019-11-15 21:05:35,473 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:35,473 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:35,473 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:35,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:35,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:35,572 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [784795572] [2019-11-15 21:05:35,572 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:35,573 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:05:35,573 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004594143] [2019-11-15 21:05:35,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:05:35,574 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:35,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:05:35,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:05:35,574 INFO L87 Difference]: Start difference. First operand 18974 states and 59359 transitions. Second operand 8 states. [2019-11-15 21:05:37,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:37,537 INFO L93 Difference]: Finished difference Result 52656 states and 160090 transitions. [2019-11-15 21:05:37,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-15 21:05:37,539 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-15 21:05:37,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:37,621 INFO L225 Difference]: With dead ends: 52656 [2019-11-15 21:05:37,621 INFO L226 Difference]: Without dead ends: 52239 [2019-11-15 21:05:37,622 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-15 21:05:37,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52239 states. [2019-11-15 21:05:38,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52239 to 28681. [2019-11-15 21:05:38,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28681 states. [2019-11-15 21:05:38,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28681 states to 28681 states and 89257 transitions. [2019-11-15 21:05:38,137 INFO L78 Accepts]: Start accepts. Automaton has 28681 states and 89257 transitions. Word has length 79 [2019-11-15 21:05:38,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:38,138 INFO L462 AbstractCegarLoop]: Abstraction has 28681 states and 89257 transitions. [2019-11-15 21:05:38,138 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:05:38,138 INFO L276 IsEmpty]: Start isEmpty. Operand 28681 states and 89257 transitions. [2019-11-15 21:05:38,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:05:38,162 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:38,162 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:38,162 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:38,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:38,163 INFO L82 PathProgramCache]: Analyzing trace with hash -259342242, now seen corresponding path program 1 times [2019-11-15 21:05:38,163 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:38,163 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385933267] [2019-11-15 21:05:38,163 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:38,163 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:38,163 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:38,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:38,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:38,267 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385933267] [2019-11-15 21:05:38,267 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:38,267 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:05:38,267 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034033071] [2019-11-15 21:05:38,267 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:05:38,268 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:38,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:05:38,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:38,268 INFO L87 Difference]: Start difference. First operand 28681 states and 89257 transitions. Second operand 6 states. [2019-11-15 21:05:38,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:38,760 INFO L93 Difference]: Finished difference Result 30406 states and 93750 transitions. [2019-11-15 21:05:38,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:05:38,761 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 79 [2019-11-15 21:05:38,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:38,811 INFO L225 Difference]: With dead ends: 30406 [2019-11-15 21:05:38,811 INFO L226 Difference]: Without dead ends: 30406 [2019-11-15 21:05:38,811 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:05:38,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30406 states. [2019-11-15 21:05:39,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30406 to 29148. [2019-11-15 21:05:39,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29148 states. [2019-11-15 21:05:39,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29148 states to 29148 states and 90159 transitions. [2019-11-15 21:05:39,256 INFO L78 Accepts]: Start accepts. Automaton has 29148 states and 90159 transitions. Word has length 79 [2019-11-15 21:05:39,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:39,256 INFO L462 AbstractCegarLoop]: Abstraction has 29148 states and 90159 transitions. [2019-11-15 21:05:39,256 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:05:39,256 INFO L276 IsEmpty]: Start isEmpty. Operand 29148 states and 90159 transitions. [2019-11-15 21:05:39,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:05:39,280 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:39,280 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:39,280 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:39,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:39,280 INFO L82 PathProgramCache]: Analyzing trace with hash 2099964767, now seen corresponding path program 1 times [2019-11-15 21:05:39,281 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:39,281 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084404053] [2019-11-15 21:05:39,281 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:39,281 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:39,281 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:39,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:39,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:39,369 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084404053] [2019-11-15 21:05:39,370 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:39,370 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:05:39,370 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1305862185] [2019-11-15 21:05:39,370 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:05:39,371 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:39,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:05:39,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:39,371 INFO L87 Difference]: Start difference. First operand 29148 states and 90159 transitions. Second operand 7 states. [2019-11-15 21:05:39,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:39,871 INFO L93 Difference]: Finished difference Result 30833 states and 94867 transitions. [2019-11-15 21:05:39,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:05:39,872 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 79 [2019-11-15 21:05:39,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:39,919 INFO L225 Difference]: With dead ends: 30833 [2019-11-15 21:05:39,919 INFO L226 Difference]: Without dead ends: 30833 [2019-11-15 21:05:39,920 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:05:39,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30833 states. [2019-11-15 21:05:40,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30833 to 29511. [2019-11-15 21:05:40,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29511 states. [2019-11-15 21:05:40,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29511 states to 29511 states and 91024 transitions. [2019-11-15 21:05:40,535 INFO L78 Accepts]: Start accepts. Automaton has 29511 states and 91024 transitions. Word has length 79 [2019-11-15 21:05:40,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:40,535 INFO L462 AbstractCegarLoop]: Abstraction has 29511 states and 91024 transitions. [2019-11-15 21:05:40,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:05:40,535 INFO L276 IsEmpty]: Start isEmpty. Operand 29511 states and 91024 transitions. [2019-11-15 21:05:40,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:05:40,560 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:40,560 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:40,561 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:40,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:40,561 INFO L82 PathProgramCache]: Analyzing trace with hash -1865236768, now seen corresponding path program 1 times [2019-11-15 21:05:40,561 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:40,561 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103333804] [2019-11-15 21:05:40,561 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:40,561 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:40,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:40,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:40,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:40,612 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103333804] [2019-11-15 21:05:40,612 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:40,612 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:05:40,612 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932436939] [2019-11-15 21:05:40,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:05:40,613 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:40,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:05:40,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:40,614 INFO L87 Difference]: Start difference. First operand 29511 states and 91024 transitions. Second operand 3 states. [2019-11-15 21:05:40,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:40,703 INFO L93 Difference]: Finished difference Result 22464 states and 68729 transitions. [2019-11-15 21:05:40,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:05:40,704 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 21:05:40,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:40,743 INFO L225 Difference]: With dead ends: 22464 [2019-11-15 21:05:40,743 INFO L226 Difference]: Without dead ends: 22464 [2019-11-15 21:05:40,743 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:40,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22464 states. [2019-11-15 21:05:41,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22464 to 21650. [2019-11-15 21:05:41,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21650 states. [2019-11-15 21:05:41,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21650 states to 21650 states and 66413 transitions. [2019-11-15 21:05:41,081 INFO L78 Accepts]: Start accepts. Automaton has 21650 states and 66413 transitions. Word has length 79 [2019-11-15 21:05:41,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:41,082 INFO L462 AbstractCegarLoop]: Abstraction has 21650 states and 66413 transitions. [2019-11-15 21:05:41,082 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:05:41,082 INFO L276 IsEmpty]: Start isEmpty. Operand 21650 states and 66413 transitions. [2019-11-15 21:05:41,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:05:41,099 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:41,099 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:41,100 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:41,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:41,100 INFO L82 PathProgramCache]: Analyzing trace with hash -565864143, now seen corresponding path program 1 times [2019-11-15 21:05:41,100 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:41,100 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154735125] [2019-11-15 21:05:41,100 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:41,100 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:41,100 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:41,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:41,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:41,189 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [154735125] [2019-11-15 21:05:41,189 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:41,189 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:05:41,190 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2036622288] [2019-11-15 21:05:41,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:05:41,193 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:41,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:05:41,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:41,197 INFO L87 Difference]: Start difference. First operand 21650 states and 66413 transitions. Second operand 5 states. [2019-11-15 21:05:41,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:41,332 INFO L93 Difference]: Finished difference Result 31338 states and 95665 transitions. [2019-11-15 21:05:41,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:05:41,333 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 79 [2019-11-15 21:05:41,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:41,376 INFO L225 Difference]: With dead ends: 31338 [2019-11-15 21:05:41,376 INFO L226 Difference]: Without dead ends: 31338 [2019-11-15 21:05:41,376 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:41,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31338 states. [2019-11-15 21:05:41,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31338 to 20557. [2019-11-15 21:05:41,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20557 states. [2019-11-15 21:05:41,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20557 states to 20557 states and 61826 transitions. [2019-11-15 21:05:41,680 INFO L78 Accepts]: Start accepts. Automaton has 20557 states and 61826 transitions. Word has length 79 [2019-11-15 21:05:41,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:41,680 INFO L462 AbstractCegarLoop]: Abstraction has 20557 states and 61826 transitions. [2019-11-15 21:05:41,680 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:05:41,680 INFO L276 IsEmpty]: Start isEmpty. Operand 20557 states and 61826 transitions. [2019-11-15 21:05:41,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:05:41,698 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:41,698 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:41,698 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:41,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:41,699 INFO L82 PathProgramCache]: Analyzing trace with hash 1159616754, now seen corresponding path program 1 times [2019-11-15 21:05:41,699 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:41,699 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430547853] [2019-11-15 21:05:41,699 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:41,700 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:41,700 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:41,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:41,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:41,755 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430547853] [2019-11-15 21:05:41,755 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:41,756 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:05:41,756 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1556955470] [2019-11-15 21:05:41,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:05:41,756 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:41,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:05:41,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:41,757 INFO L87 Difference]: Start difference. First operand 20557 states and 61826 transitions. Second operand 3 states. [2019-11-15 21:05:41,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:41,863 INFO L93 Difference]: Finished difference Result 19258 states and 57345 transitions. [2019-11-15 21:05:41,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:05:41,863 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 21:05:41,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:41,887 INFO L225 Difference]: With dead ends: 19258 [2019-11-15 21:05:41,887 INFO L226 Difference]: Without dead ends: 19204 [2019-11-15 21:05:41,887 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:05:41,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19204 states. [2019-11-15 21:05:42,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19204 to 18325. [2019-11-15 21:05:42,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18325 states. [2019-11-15 21:05:42,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18325 states to 18325 states and 54823 transitions. [2019-11-15 21:05:42,115 INFO L78 Accepts]: Start accepts. Automaton has 18325 states and 54823 transitions. Word has length 79 [2019-11-15 21:05:42,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:42,115 INFO L462 AbstractCegarLoop]: Abstraction has 18325 states and 54823 transitions. [2019-11-15 21:05:42,115 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:05:42,116 INFO L276 IsEmpty]: Start isEmpty. Operand 18325 states and 54823 transitions. [2019-11-15 21:05:42,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:05:42,133 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:42,133 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:42,133 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:42,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:42,134 INFO L82 PathProgramCache]: Analyzing trace with hash 1404910931, now seen corresponding path program 1 times [2019-11-15 21:05:42,134 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:42,134 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214707907] [2019-11-15 21:05:42,134 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:42,134 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:42,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:42,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:42,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:42,209 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214707907] [2019-11-15 21:05:42,209 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:42,209 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:05:42,209 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352948094] [2019-11-15 21:05:42,210 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:05:42,210 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:42,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:05:42,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:42,210 INFO L87 Difference]: Start difference. First operand 18325 states and 54823 transitions. Second operand 6 states. [2019-11-15 21:05:43,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:43,167 INFO L93 Difference]: Finished difference Result 34663 states and 104987 transitions. [2019-11-15 21:05:43,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:05:43,168 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 21:05:43,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:43,234 INFO L225 Difference]: With dead ends: 34663 [2019-11-15 21:05:43,234 INFO L226 Difference]: Without dead ends: 34663 [2019-11-15 21:05:43,235 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:05:43,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34663 states. [2019-11-15 21:05:43,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34663 to 19231. [2019-11-15 21:05:43,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19231 states. [2019-11-15 21:05:43,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19231 states to 19231 states and 57296 transitions. [2019-11-15 21:05:43,668 INFO L78 Accepts]: Start accepts. Automaton has 19231 states and 57296 transitions. Word has length 80 [2019-11-15 21:05:43,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:43,668 INFO L462 AbstractCegarLoop]: Abstraction has 19231 states and 57296 transitions. [2019-11-15 21:05:43,668 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:05:43,668 INFO L276 IsEmpty]: Start isEmpty. Operand 19231 states and 57296 transitions. [2019-11-15 21:05:43,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:05:43,684 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:43,684 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:43,684 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:43,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:43,684 INFO L82 PathProgramCache]: Analyzing trace with hash -605192910, now seen corresponding path program 1 times [2019-11-15 21:05:43,685 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:43,685 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194494152] [2019-11-15 21:05:43,685 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:43,685 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:43,685 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:43,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:43,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:43,775 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194494152] [2019-11-15 21:05:43,776 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:43,776 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:05:43,776 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629050204] [2019-11-15 21:05:43,776 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:05:43,776 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:43,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:05:43,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:43,778 INFO L87 Difference]: Start difference. First operand 19231 states and 57296 transitions. Second operand 7 states. [2019-11-15 21:05:45,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:45,336 INFO L93 Difference]: Finished difference Result 38950 states and 115419 transitions. [2019-11-15 21:05:45,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-15 21:05:45,337 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-15 21:05:45,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:45,383 INFO L225 Difference]: With dead ends: 38950 [2019-11-15 21:05:45,383 INFO L226 Difference]: Without dead ends: 38629 [2019-11-15 21:05:45,385 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=95, Invalid=211, Unknown=0, NotChecked=0, Total=306 [2019-11-15 21:05:45,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38629 states. [2019-11-15 21:05:45,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38629 to 28051. [2019-11-15 21:05:45,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28051 states. [2019-11-15 21:05:45,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28051 states to 28051 states and 84569 transitions. [2019-11-15 21:05:45,801 INFO L78 Accepts]: Start accepts. Automaton has 28051 states and 84569 transitions. Word has length 80 [2019-11-15 21:05:45,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:45,801 INFO L462 AbstractCegarLoop]: Abstraction has 28051 states and 84569 transitions. [2019-11-15 21:05:45,801 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:05:45,801 INFO L276 IsEmpty]: Start isEmpty. Operand 28051 states and 84569 transitions. [2019-11-15 21:05:45,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:05:45,821 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:45,821 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:45,822 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:45,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:45,822 INFO L82 PathProgramCache]: Analyzing trace with hash 356421107, now seen corresponding path program 1 times [2019-11-15 21:05:45,822 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:45,822 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104131881] [2019-11-15 21:05:45,823 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:45,823 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:45,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:45,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:45,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:45,899 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104131881] [2019-11-15 21:05:45,899 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:45,899 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:05:45,899 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [937384997] [2019-11-15 21:05:45,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:05:45,900 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:45,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:05:45,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:45,900 INFO L87 Difference]: Start difference. First operand 28051 states and 84569 transitions. Second operand 6 states. [2019-11-15 21:05:46,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:46,239 INFO L93 Difference]: Finished difference Result 29345 states and 88235 transitions. [2019-11-15 21:05:46,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:05:46,240 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 21:05:46,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:46,281 INFO L225 Difference]: With dead ends: 29345 [2019-11-15 21:05:46,281 INFO L226 Difference]: Without dead ends: 29345 [2019-11-15 21:05:46,281 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:05:46,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29345 states. [2019-11-15 21:05:46,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29345 to 27945. [2019-11-15 21:05:46,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27945 states. [2019-11-15 21:05:46,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27945 states to 27945 states and 84195 transitions. [2019-11-15 21:05:46,659 INFO L78 Accepts]: Start accepts. Automaton has 27945 states and 84195 transitions. Word has length 80 [2019-11-15 21:05:46,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:46,660 INFO L462 AbstractCegarLoop]: Abstraction has 27945 states and 84195 transitions. [2019-11-15 21:05:46,660 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:05:46,660 INFO L276 IsEmpty]: Start isEmpty. Operand 27945 states and 84195 transitions. [2019-11-15 21:05:46,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:05:46,683 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:46,683 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:46,684 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:46,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:46,684 INFO L82 PathProgramCache]: Analyzing trace with hash -530749356, now seen corresponding path program 1 times [2019-11-15 21:05:46,684 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:46,684 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42994247] [2019-11-15 21:05:46,684 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:46,684 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:46,684 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:46,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:46,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:46,749 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42994247] [2019-11-15 21:05:46,749 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:46,749 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:05:46,749 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011925673] [2019-11-15 21:05:46,749 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:05:46,749 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:46,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:05:46,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:46,750 INFO L87 Difference]: Start difference. First operand 27945 states and 84195 transitions. Second operand 5 states. [2019-11-15 21:05:47,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:47,096 INFO L93 Difference]: Finished difference Result 35941 states and 107634 transitions. [2019-11-15 21:05:47,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:05:47,096 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-11-15 21:05:47,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:47,147 INFO L225 Difference]: With dead ends: 35941 [2019-11-15 21:05:47,147 INFO L226 Difference]: Without dead ends: 35941 [2019-11-15 21:05:47,147 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:47,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35941 states. [2019-11-15 21:05:47,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35941 to 27904. [2019-11-15 21:05:47,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27904 states. [2019-11-15 21:05:47,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27904 states to 27904 states and 83918 transitions. [2019-11-15 21:05:47,710 INFO L78 Accepts]: Start accepts. Automaton has 27904 states and 83918 transitions. Word has length 80 [2019-11-15 21:05:47,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:47,710 INFO L462 AbstractCegarLoop]: Abstraction has 27904 states and 83918 transitions. [2019-11-15 21:05:47,710 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:05:47,710 INFO L276 IsEmpty]: Start isEmpty. Operand 27904 states and 83918 transitions. [2019-11-15 21:05:47,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:05:47,733 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:47,733 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:47,733 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:47,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:47,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1754114099, now seen corresponding path program 1 times [2019-11-15 21:05:47,733 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:47,733 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188123478] [2019-11-15 21:05:47,734 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:47,734 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:47,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:47,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:47,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:47,789 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188123478] [2019-11-15 21:05:47,790 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:47,790 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:05:47,790 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [442961754] [2019-11-15 21:05:47,790 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:05:47,791 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:47,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:05:47,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:05:47,791 INFO L87 Difference]: Start difference. First operand 27904 states and 83918 transitions. Second operand 4 states. [2019-11-15 21:05:48,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:48,113 INFO L93 Difference]: Finished difference Result 32638 states and 96773 transitions. [2019-11-15 21:05:48,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:05:48,113 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2019-11-15 21:05:48,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:48,157 INFO L225 Difference]: With dead ends: 32638 [2019-11-15 21:05:48,157 INFO L226 Difference]: Without dead ends: 32164 [2019-11-15 21:05:48,158 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:48,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32164 states. [2019-11-15 21:05:48,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32164 to 28431. [2019-11-15 21:05:48,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28431 states. [2019-11-15 21:05:48,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28431 states to 28431 states and 85636 transitions. [2019-11-15 21:05:48,540 INFO L78 Accepts]: Start accepts. Automaton has 28431 states and 85636 transitions. Word has length 80 [2019-11-15 21:05:48,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:48,540 INFO L462 AbstractCegarLoop]: Abstraction has 28431 states and 85636 transitions. [2019-11-15 21:05:48,540 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:05:48,540 INFO L276 IsEmpty]: Start isEmpty. Operand 28431 states and 85636 transitions. [2019-11-15 21:05:48,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:05:48,561 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:48,562 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:48,562 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:48,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:48,562 INFO L82 PathProgramCache]: Analyzing trace with hash -1579239180, now seen corresponding path program 1 times [2019-11-15 21:05:48,562 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:48,563 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118583305] [2019-11-15 21:05:48,563 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:48,563 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:48,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:48,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:48,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:48,628 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118583305] [2019-11-15 21:05:48,629 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:48,629 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:05:48,629 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1927068461] [2019-11-15 21:05:48,629 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:05:48,630 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:48,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:05:48,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:48,630 INFO L87 Difference]: Start difference. First operand 28431 states and 85636 transitions. Second operand 5 states. [2019-11-15 21:05:48,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:48,678 INFO L93 Difference]: Finished difference Result 3531 states and 8394 transitions. [2019-11-15 21:05:48,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:05:48,679 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-11-15 21:05:48,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:48,683 INFO L225 Difference]: With dead ends: 3531 [2019-11-15 21:05:48,683 INFO L226 Difference]: Without dead ends: 2962 [2019-11-15 21:05:48,683 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:48,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2962 states. [2019-11-15 21:05:48,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2962 to 2541. [2019-11-15 21:05:48,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2541 states. [2019-11-15 21:05:48,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2541 states to 2541 states and 6014 transitions. [2019-11-15 21:05:48,717 INFO L78 Accepts]: Start accepts. Automaton has 2541 states and 6014 transitions. Word has length 80 [2019-11-15 21:05:48,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:48,717 INFO L462 AbstractCegarLoop]: Abstraction has 2541 states and 6014 transitions. [2019-11-15 21:05:48,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:05:48,717 INFO L276 IsEmpty]: Start isEmpty. Operand 2541 states and 6014 transitions. [2019-11-15 21:05:48,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 21:05:48,720 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:48,720 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:48,720 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:48,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:48,721 INFO L82 PathProgramCache]: Analyzing trace with hash 1132480631, now seen corresponding path program 1 times [2019-11-15 21:05:48,721 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:48,721 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800997669] [2019-11-15 21:05:48,721 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:48,721 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:48,722 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:48,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:48,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:48,806 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800997669] [2019-11-15 21:05:48,806 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:48,807 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:05:48,807 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [34538637] [2019-11-15 21:05:48,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:05:48,807 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:48,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:05:48,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:48,808 INFO L87 Difference]: Start difference. First operand 2541 states and 6014 transitions. Second operand 6 states. [2019-11-15 21:05:49,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:49,040 INFO L93 Difference]: Finished difference Result 2919 states and 6808 transitions. [2019-11-15 21:05:49,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 21:05:49,040 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-11-15 21:05:49,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:49,043 INFO L225 Difference]: With dead ends: 2919 [2019-11-15 21:05:49,044 INFO L226 Difference]: Without dead ends: 2919 [2019-11-15 21:05:49,045 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 21:05:49,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2919 states. [2019-11-15 21:05:49,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2919 to 2417. [2019-11-15 21:05:49,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2417 states. [2019-11-15 21:05:49,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2417 states to 2417 states and 5720 transitions. [2019-11-15 21:05:49,078 INFO L78 Accepts]: Start accepts. Automaton has 2417 states and 5720 transitions. Word has length 93 [2019-11-15 21:05:49,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:49,078 INFO L462 AbstractCegarLoop]: Abstraction has 2417 states and 5720 transitions. [2019-11-15 21:05:49,078 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:05:49,078 INFO L276 IsEmpty]: Start isEmpty. Operand 2417 states and 5720 transitions. [2019-11-15 21:05:49,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 21:05:49,081 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:49,081 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:49,081 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:49,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:49,082 INFO L82 PathProgramCache]: Analyzing trace with hash 83990807, now seen corresponding path program 1 times [2019-11-15 21:05:49,082 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:49,082 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246875929] [2019-11-15 21:05:49,082 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:49,082 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:49,082 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:49,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:49,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:49,149 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246875929] [2019-11-15 21:05:49,149 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:49,150 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:05:49,150 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [913926842] [2019-11-15 21:05:49,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:05:49,150 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:49,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:05:49,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:49,151 INFO L87 Difference]: Start difference. First operand 2417 states and 5720 transitions. Second operand 5 states. [2019-11-15 21:05:49,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:49,328 INFO L93 Difference]: Finished difference Result 2561 states and 6020 transitions. [2019-11-15 21:05:49,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:05:49,328 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2019-11-15 21:05:49,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:49,331 INFO L225 Difference]: With dead ends: 2561 [2019-11-15 21:05:49,331 INFO L226 Difference]: Without dead ends: 2543 [2019-11-15 21:05:49,332 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:49,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2543 states. [2019-11-15 21:05:49,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2543 to 2005. [2019-11-15 21:05:49,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2005 states. [2019-11-15 21:05:49,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2005 states to 2005 states and 4759 transitions. [2019-11-15 21:05:49,360 INFO L78 Accepts]: Start accepts. Automaton has 2005 states and 4759 transitions. Word has length 93 [2019-11-15 21:05:49,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:49,361 INFO L462 AbstractCegarLoop]: Abstraction has 2005 states and 4759 transitions. [2019-11-15 21:05:49,361 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:05:49,361 INFO L276 IsEmpty]: Start isEmpty. Operand 2005 states and 4759 transitions. [2019-11-15 21:05:49,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 21:05:49,363 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:49,363 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:49,364 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:49,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:49,364 INFO L82 PathProgramCache]: Analyzing trace with hash 1328755288, now seen corresponding path program 1 times [2019-11-15 21:05:49,364 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:49,365 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796951249] [2019-11-15 21:05:49,365 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:49,365 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:49,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:49,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:49,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:49,485 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796951249] [2019-11-15 21:05:49,485 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:49,485 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:05:49,485 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [624691232] [2019-11-15 21:05:49,486 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:05:49,486 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:49,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:05:49,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:05:49,487 INFO L87 Difference]: Start difference. First operand 2005 states and 4759 transitions. Second operand 7 states. [2019-11-15 21:05:49,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:49,580 INFO L93 Difference]: Finished difference Result 3297 states and 7918 transitions. [2019-11-15 21:05:49,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:05:49,580 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2019-11-15 21:05:49,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:49,582 INFO L225 Difference]: With dead ends: 3297 [2019-11-15 21:05:49,582 INFO L226 Difference]: Without dead ends: 1478 [2019-11-15 21:05:49,583 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:05:49,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1478 states. [2019-11-15 21:05:49,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1478 to 1398. [2019-11-15 21:05:49,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1398 states. [2019-11-15 21:05:49,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1398 states to 1398 states and 3354 transitions. [2019-11-15 21:05:49,602 INFO L78 Accepts]: Start accepts. Automaton has 1398 states and 3354 transitions. Word has length 93 [2019-11-15 21:05:49,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:49,602 INFO L462 AbstractCegarLoop]: Abstraction has 1398 states and 3354 transitions. [2019-11-15 21:05:49,602 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:05:49,602 INFO L276 IsEmpty]: Start isEmpty. Operand 1398 states and 3354 transitions. [2019-11-15 21:05:49,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 21:05:49,604 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:49,604 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:49,605 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:49,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:49,605 INFO L82 PathProgramCache]: Analyzing trace with hash -523972012, now seen corresponding path program 1 times [2019-11-15 21:05:49,605 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:49,605 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330066300] [2019-11-15 21:05:49,606 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:49,606 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:49,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:49,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:49,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:49,670 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330066300] [2019-11-15 21:05:49,670 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:49,670 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:05:49,670 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850144225] [2019-11-15 21:05:49,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:05:49,671 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:49,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:05:49,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:05:49,671 INFO L87 Difference]: Start difference. First operand 1398 states and 3354 transitions. Second operand 5 states. [2019-11-15 21:05:49,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:49,825 INFO L93 Difference]: Finished difference Result 1637 states and 3851 transitions. [2019-11-15 21:05:49,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:05:49,825 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2019-11-15 21:05:49,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:49,827 INFO L225 Difference]: With dead ends: 1637 [2019-11-15 21:05:49,828 INFO L226 Difference]: Without dead ends: 1619 [2019-11-15 21:05:49,828 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:49,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1619 states. [2019-11-15 21:05:49,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1619 to 1403. [2019-11-15 21:05:49,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1403 states. [2019-11-15 21:05:49,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1403 states to 1403 states and 3364 transitions. [2019-11-15 21:05:49,848 INFO L78 Accepts]: Start accepts. Automaton has 1403 states and 3364 transitions. Word has length 93 [2019-11-15 21:05:49,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:49,849 INFO L462 AbstractCegarLoop]: Abstraction has 1403 states and 3364 transitions. [2019-11-15 21:05:49,849 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:05:49,849 INFO L276 IsEmpty]: Start isEmpty. Operand 1403 states and 3364 transitions. [2019-11-15 21:05:49,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 21:05:49,851 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:49,851 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:49,851 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:49,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:49,852 INFO L82 PathProgramCache]: Analyzing trace with hash 2070254805, now seen corresponding path program 1 times [2019-11-15 21:05:49,852 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:49,852 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8744420] [2019-11-15 21:05:49,852 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:49,852 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:49,852 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:49,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:49,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:49,950 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [8744420] [2019-11-15 21:05:49,950 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:49,950 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:05:49,950 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117095855] [2019-11-15 21:05:49,951 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:05:49,952 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:49,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:05:49,953 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:49,953 INFO L87 Difference]: Start difference. First operand 1403 states and 3364 transitions. Second operand 6 states. [2019-11-15 21:05:50,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:50,126 INFO L93 Difference]: Finished difference Result 1589 states and 3764 transitions. [2019-11-15 21:05:50,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:05:50,127 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-11-15 21:05:50,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:50,129 INFO L225 Difference]: With dead ends: 1589 [2019-11-15 21:05:50,129 INFO L226 Difference]: Without dead ends: 1589 [2019-11-15 21:05:50,129 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:05:50,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1589 states. [2019-11-15 21:05:50,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1589 to 1379. [2019-11-15 21:05:50,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1379 states. [2019-11-15 21:05:50,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1379 states to 1379 states and 3316 transitions. [2019-11-15 21:05:50,150 INFO L78 Accepts]: Start accepts. Automaton has 1379 states and 3316 transitions. Word has length 93 [2019-11-15 21:05:50,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:50,150 INFO L462 AbstractCegarLoop]: Abstraction has 1379 states and 3316 transitions. [2019-11-15 21:05:50,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:05:50,151 INFO L276 IsEmpty]: Start isEmpty. Operand 1379 states and 3316 transitions. [2019-11-15 21:05:50,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 21:05:50,152 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:50,153 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:50,153 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:50,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:50,153 INFO L82 PathProgramCache]: Analyzing trace with hash 1674083446, now seen corresponding path program 2 times [2019-11-15 21:05:50,154 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:50,154 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1799475215] [2019-11-15 21:05:50,154 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:50,154 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:50,154 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:50,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:05:50,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:05:50,327 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1799475215] [2019-11-15 21:05:50,327 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:05:50,328 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 21:05:50,328 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027848471] [2019-11-15 21:05:50,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 21:05:50,328 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:05:50,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 21:05:50,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:05:50,329 INFO L87 Difference]: Start difference. First operand 1379 states and 3316 transitions. Second operand 12 states. [2019-11-15 21:05:50,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:05:50,605 INFO L93 Difference]: Finished difference Result 2516 states and 6135 transitions. [2019-11-15 21:05:50,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 21:05:50,605 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 93 [2019-11-15 21:05:50,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:05:50,607 INFO L225 Difference]: With dead ends: 2516 [2019-11-15 21:05:50,608 INFO L226 Difference]: Without dead ends: 1877 [2019-11-15 21:05:50,608 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 21:05:50,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1877 states. [2019-11-15 21:05:50,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1877 to 1769. [2019-11-15 21:05:50,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1769 states. [2019-11-15 21:05:50,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1769 states to 1769 states and 4191 transitions. [2019-11-15 21:05:50,631 INFO L78 Accepts]: Start accepts. Automaton has 1769 states and 4191 transitions. Word has length 93 [2019-11-15 21:05:50,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:05:50,632 INFO L462 AbstractCegarLoop]: Abstraction has 1769 states and 4191 transitions. [2019-11-15 21:05:50,632 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 21:05:50,632 INFO L276 IsEmpty]: Start isEmpty. Operand 1769 states and 4191 transitions. [2019-11-15 21:05:50,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 21:05:50,634 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:05:50,634 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:05:50,634 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:05:50,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:05:50,635 INFO L82 PathProgramCache]: Analyzing trace with hash -228635942, now seen corresponding path program 3 times [2019-11-15 21:05:50,635 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:05:50,635 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378397486] [2019-11-15 21:05:50,635 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:50,635 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:05:50,636 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:05:50,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:05:50,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:05:50,739 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 21:05:50,740 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 21:05:50,900 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 21:05:50,903 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 09:05:50 BasicIcfg [2019-11-15 21:05:50,903 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 21:05:50,903 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 21:05:50,903 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 21:05:50,904 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 21:05:50,904 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:05:06" (3/4) ... [2019-11-15 21:05:50,912 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 21:05:51,059 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_6851caa1-597a-4a1e-a1d9-03137c67a3ca/bin/uautomizer/witness.graphml [2019-11-15 21:05:51,059 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 21:05:51,062 INFO L168 Benchmark]: Toolchain (without parser) took 46454.92 ms. Allocated memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: 3.6 GB). Free memory was 944.7 MB in the beginning and 2.7 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-11-15 21:05:51,062 INFO L168 Benchmark]: CDTParser took 0.41 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:05:51,063 INFO L168 Benchmark]: CACSL2BoogieTranslator took 662.60 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.8 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -153.8 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-11-15 21:05:51,064 INFO L168 Benchmark]: Boogie Procedure Inliner took 60.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-15 21:05:51,065 INFO L168 Benchmark]: Boogie Preprocessor took 33.22 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:05:51,065 INFO L168 Benchmark]: RCFGBuilder took 734.75 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.0 MB). Peak memory consumption was 48.0 MB. Max. memory is 11.5 GB. [2019-11-15 21:05:51,066 INFO L168 Benchmark]: TraceAbstraction took 44803.52 ms. Allocated memory was 1.2 GB in the beginning and 4.6 GB in the end (delta: 3.5 GB). Free memory was 1.0 GB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-11-15 21:05:51,066 INFO L168 Benchmark]: Witness Printer took 155.99 ms. Allocated memory is still 4.6 GB. Free memory was 2.8 GB in the beginning and 2.7 GB in the end (delta: 92.0 MB). Peak memory consumption was 92.0 MB. Max. memory is 11.5 GB. [2019-11-15 21:05:51,068 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.41 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 662.60 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.8 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -153.8 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 60.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.22 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 734.75 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.0 MB). Peak memory consumption was 48.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 44803.52 ms. Allocated memory was 1.2 GB in the beginning and 4.6 GB in the end (delta: 3.5 GB). Free memory was 1.0 GB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. * Witness Printer took 155.99 ms. Allocated memory is still 4.6 GB. Free memory was 2.8 GB in the beginning and 2.7 GB in the end (delta: 92.0 MB). Peak memory consumption was 92.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L695] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L696] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] 0 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] 0 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L701] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L702] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L703] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L707] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L708] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L709] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L710] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L711] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L712] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L713] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L714] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L776] 0 pthread_t t2473; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] FCALL, FORK 0 pthread_create(&t2473, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 1 y$w_buff1 = y$w_buff0 [L721] 1 y$w_buff0 = 2 [L722] 1 y$w_buff1_used = y$w_buff0_used [L723] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L778] 0 pthread_t t2474; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2474, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L725] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L726] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L727] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L728] 1 y$r_buff0_thd1 = (_Bool)1 [L731] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L748] 2 x = 2 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L735] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L754] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L736] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L737] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L741] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L758] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L761] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L786] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 y$flush_delayed = weak$$choice2 [L795] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L797] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L802] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y = y$flush_delayed ? y$mem_tmp : y [L805] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 174 locations, 3 error locations. Result: UNSAFE, OverallTime: 44.6s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 22.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9737 SDtfs, 11052 SDslu, 22808 SDs, 0 SdLazy, 10814 SolverSat, 717 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 386 GetRequests, 104 SyntacticMatches, 20 SemanticMatches, 262 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 606 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76084occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 16.6s AutomataMinimizationTime, 34 MinimizatonAttempts, 157161 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 2597 NumberOfCodeBlocks, 2597 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 2470 ConstructedInterpolants, 0 QuantifiedInterpolants, 422700 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...