./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe029_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe029_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash eff86fe4110cf0b56af359bea2f58358a83b929a ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:13:34,437 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:13:34,438 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:13:34,448 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:13:34,448 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:13:34,449 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:13:34,451 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:13:34,453 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:13:34,454 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:13:34,455 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:13:34,456 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:13:34,457 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:13:34,458 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:13:34,459 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:13:34,459 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:13:34,460 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:13:34,461 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:13:34,462 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:13:34,463 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:13:34,465 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:13:34,467 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:13:34,467 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:13:34,468 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:13:34,469 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:13:34,471 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:13:34,472 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:13:34,472 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:13:34,473 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:13:34,477 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:13:34,478 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:13:34,479 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:13:34,480 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:13:34,481 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:13:34,481 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:13:34,482 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:13:34,489 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:13:34,490 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:13:34,490 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:13:34,490 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:13:34,491 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:13:34,495 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:13:34,495 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:13:34,509 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:13:34,511 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:13:34,514 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:13:34,514 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:13:34,515 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:13:34,515 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:13:34,515 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:13:34,515 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:13:34,516 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:13:34,516 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:13:34,517 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:13:34,517 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:13:34,518 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:13:34,518 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:13:34,518 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:13:34,518 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:13:34,519 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:13:34,519 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:13:34,519 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:13:34,520 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:13:34,521 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:13:34,522 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:13:34,523 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:13:34,523 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:13:34,523 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:13:34,523 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:13:34,524 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:13:34,524 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:13:34,524 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> eff86fe4110cf0b56af359bea2f58358a83b929a [2019-11-15 20:13:34,572 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:13:34,582 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:13:34,589 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:13:34,590 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:13:34,590 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:13:34,591 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe029_rmo.oepc.i [2019-11-15 20:13:34,642 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/data/3b40e7110/4ad9f26d371b4138a873a89a35610856/FLAGfede5c9fb [2019-11-15 20:13:35,140 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:13:35,167 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/sv-benchmarks/c/pthread-wmm/safe029_rmo.oepc.i [2019-11-15 20:13:35,183 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/data/3b40e7110/4ad9f26d371b4138a873a89a35610856/FLAGfede5c9fb [2019-11-15 20:13:35,675 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/data/3b40e7110/4ad9f26d371b4138a873a89a35610856 [2019-11-15 20:13:35,678 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:13:35,679 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:13:35,680 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:13:35,681 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:13:35,683 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:13:35,684 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:13:35" (1/1) ... [2019-11-15 20:13:35,687 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1eafad64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:35, skipping insertion in model container [2019-11-15 20:13:35,687 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:13:35" (1/1) ... [2019-11-15 20:13:35,694 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:13:35,753 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:13:36,190 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:13:36,201 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:13:36,256 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:13:36,326 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:13:36,327 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36 WrapperNode [2019-11-15 20:13:36,327 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:13:36,328 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:13:36,328 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:13:36,328 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:13:36,336 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,354 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,387 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:13:36,388 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:13:36,388 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:13:36,388 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:13:36,397 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,398 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,402 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,402 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,411 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,415 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,419 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... [2019-11-15 20:13:36,423 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:13:36,424 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:13:36,424 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:13:36,424 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:13:36,425 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:13:36,474 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 20:13:36,474 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 20:13:36,475 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 20:13:36,475 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 20:13:36,475 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 20:13:36,475 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 20:13:36,475 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 20:13:36,476 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 20:13:36,476 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 20:13:36,476 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:13:36,477 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:13:36,478 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 20:13:37,069 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:13:37,069 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 20:13:37,070 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:13:37 BoogieIcfgContainer [2019-11-15 20:13:37,071 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:13:37,072 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:13:37,072 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:13:37,074 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:13:37,074 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:13:35" (1/3) ... [2019-11-15 20:13:37,075 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@313e5e1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:13:37, skipping insertion in model container [2019-11-15 20:13:37,075 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:13:36" (2/3) ... [2019-11-15 20:13:37,075 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@313e5e1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:13:37, skipping insertion in model container [2019-11-15 20:13:37,076 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:13:37" (3/3) ... [2019-11-15 20:13:37,079 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_rmo.oepc.i [2019-11-15 20:13:37,132 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,132 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,132 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,132 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,132 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,133 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,133 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,133 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,133 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,134 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,134 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,134 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,134 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,134 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,134 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,135 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,135 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,135 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,135 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,135 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,135 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,136 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,136 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,136 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,136 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,136 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,137 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,137 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,137 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,137 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,138 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,138 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,138 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,138 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,139 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,139 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,139 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,139 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,140 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,140 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,140 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,141 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,141 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,141 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,141 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,142 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,143 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,143 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,143 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,144 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,144 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,144 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,144 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,144 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,144 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,145 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,145 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,146 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,146 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,146 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,146 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,146 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,147 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,147 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:13:37,152 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 20:13:37,152 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:13:37,159 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 20:13:37,171 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 20:13:37,190 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:13:37,190 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:13:37,191 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:13:37,191 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:13:37,191 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:13:37,191 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:13:37,191 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:13:37,192 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:13:37,203 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 138 places, 176 transitions [2019-11-15 20:13:38,747 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22508 states. [2019-11-15 20:13:38,749 INFO L276 IsEmpty]: Start isEmpty. Operand 22508 states. [2019-11-15 20:13:38,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-11-15 20:13:38,758 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:38,759 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:38,763 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:38,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:38,768 INFO L82 PathProgramCache]: Analyzing trace with hash -564804312, now seen corresponding path program 1 times [2019-11-15 20:13:38,776 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:38,777 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411473095] [2019-11-15 20:13:38,777 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:38,778 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:38,778 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:38,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:39,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:39,075 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411473095] [2019-11-15 20:13:39,076 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:39,076 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:13:39,076 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057395229] [2019-11-15 20:13:39,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:13:39,081 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:39,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:13:39,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:13:39,096 INFO L87 Difference]: Start difference. First operand 22508 states. Second operand 4 states. [2019-11-15 20:13:39,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:39,617 INFO L93 Difference]: Finished difference Result 23452 states and 91769 transitions. [2019-11-15 20:13:39,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:13:39,619 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-11-15 20:13:39,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:39,817 INFO L225 Difference]: With dead ends: 23452 [2019-11-15 20:13:39,817 INFO L226 Difference]: Without dead ends: 21276 [2019-11-15 20:13:39,819 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:13:40,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21276 states. [2019-11-15 20:13:40,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21276 to 21276. [2019-11-15 20:13:40,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21276 states. [2019-11-15 20:13:40,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21276 states to 21276 states and 83793 transitions. [2019-11-15 20:13:40,958 INFO L78 Accepts]: Start accepts. Automaton has 21276 states and 83793 transitions. Word has length 31 [2019-11-15 20:13:40,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:40,959 INFO L462 AbstractCegarLoop]: Abstraction has 21276 states and 83793 transitions. [2019-11-15 20:13:40,959 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:13:40,959 INFO L276 IsEmpty]: Start isEmpty. Operand 21276 states and 83793 transitions. [2019-11-15 20:13:40,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-11-15 20:13:40,969 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:40,969 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:40,970 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:40,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:40,970 INFO L82 PathProgramCache]: Analyzing trace with hash 1206913622, now seen corresponding path program 1 times [2019-11-15 20:13:40,971 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:40,971 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549792036] [2019-11-15 20:13:40,971 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:40,971 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:40,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:41,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:41,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:41,110 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549792036] [2019-11-15 20:13:41,110 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:41,111 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:13:41,111 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [740598133] [2019-11-15 20:13:41,112 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:13:41,112 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:41,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:13:41,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:13:41,114 INFO L87 Difference]: Start difference. First operand 21276 states and 83793 transitions. Second operand 5 states. [2019-11-15 20:13:42,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:42,179 INFO L93 Difference]: Finished difference Result 34710 states and 129089 transitions. [2019-11-15 20:13:42,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:13:42,179 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-11-15 20:13:42,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:42,322 INFO L225 Difference]: With dead ends: 34710 [2019-11-15 20:13:42,322 INFO L226 Difference]: Without dead ends: 34566 [2019-11-15 20:13:42,323 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:13:42,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34566 states. [2019-11-15 20:13:43,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34566 to 33066. [2019-11-15 20:13:43,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33066 states. [2019-11-15 20:13:43,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33066 states to 33066 states and 123977 transitions. [2019-11-15 20:13:43,661 INFO L78 Accepts]: Start accepts. Automaton has 33066 states and 123977 transitions. Word has length 42 [2019-11-15 20:13:43,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:43,664 INFO L462 AbstractCegarLoop]: Abstraction has 33066 states and 123977 transitions. [2019-11-15 20:13:43,664 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:13:43,664 INFO L276 IsEmpty]: Start isEmpty. Operand 33066 states and 123977 transitions. [2019-11-15 20:13:43,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-15 20:13:43,672 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:43,672 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:43,672 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:43,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:43,673 INFO L82 PathProgramCache]: Analyzing trace with hash -1177190009, now seen corresponding path program 1 times [2019-11-15 20:13:43,673 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:43,673 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2071500709] [2019-11-15 20:13:43,674 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:43,674 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:43,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:43,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:43,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:43,794 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2071500709] [2019-11-15 20:13:43,794 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:43,794 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:13:43,794 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [177268356] [2019-11-15 20:13:43,795 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:13:43,795 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:43,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:13:43,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:13:43,796 INFO L87 Difference]: Start difference. First operand 33066 states and 123977 transitions. Second operand 5 states. [2019-11-15 20:13:44,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:44,699 INFO L93 Difference]: Finished difference Result 40218 states and 148646 transitions. [2019-11-15 20:13:44,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:13:44,700 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-15 20:13:44,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:44,862 INFO L225 Difference]: With dead ends: 40218 [2019-11-15 20:13:44,862 INFO L226 Difference]: Without dead ends: 40058 [2019-11-15 20:13:44,863 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:13:45,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40058 states. [2019-11-15 20:13:45,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40058 to 34639. [2019-11-15 20:13:45,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34639 states. [2019-11-15 20:13:45,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34639 states to 34639 states and 129273 transitions. [2019-11-15 20:13:45,835 INFO L78 Accepts]: Start accepts. Automaton has 34639 states and 129273 transitions. Word has length 43 [2019-11-15 20:13:45,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:45,836 INFO L462 AbstractCegarLoop]: Abstraction has 34639 states and 129273 transitions. [2019-11-15 20:13:45,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:13:45,836 INFO L276 IsEmpty]: Start isEmpty. Operand 34639 states and 129273 transitions. [2019-11-15 20:13:45,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-11-15 20:13:45,852 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:45,852 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:45,852 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:45,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:45,853 INFO L82 PathProgramCache]: Analyzing trace with hash -1468049762, now seen corresponding path program 1 times [2019-11-15 20:13:45,853 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:45,853 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105472675] [2019-11-15 20:13:45,853 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:45,854 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:45,854 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:45,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:45,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:45,936 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105472675] [2019-11-15 20:13:45,937 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:45,937 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:13:45,937 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107469540] [2019-11-15 20:13:45,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:13:45,938 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:45,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:13:45,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:13:45,939 INFO L87 Difference]: Start difference. First operand 34639 states and 129273 transitions. Second operand 6 states. [2019-11-15 20:13:47,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:47,363 INFO L93 Difference]: Finished difference Result 45667 states and 166167 transitions. [2019-11-15 20:13:47,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:13:47,363 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 50 [2019-11-15 20:13:47,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:47,519 INFO L225 Difference]: With dead ends: 45667 [2019-11-15 20:13:47,519 INFO L226 Difference]: Without dead ends: 45523 [2019-11-15 20:13:47,520 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:13:47,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45523 states. [2019-11-15 20:13:48,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45523 to 33602. [2019-11-15 20:13:48,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33602 states. [2019-11-15 20:13:48,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33602 states to 33602 states and 125428 transitions. [2019-11-15 20:13:48,319 INFO L78 Accepts]: Start accepts. Automaton has 33602 states and 125428 transitions. Word has length 50 [2019-11-15 20:13:48,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:48,320 INFO L462 AbstractCegarLoop]: Abstraction has 33602 states and 125428 transitions. [2019-11-15 20:13:48,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:13:48,320 INFO L276 IsEmpty]: Start isEmpty. Operand 33602 states and 125428 transitions. [2019-11-15 20:13:48,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-15 20:13:48,351 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:48,351 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:48,352 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:48,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:48,352 INFO L82 PathProgramCache]: Analyzing trace with hash -345936719, now seen corresponding path program 1 times [2019-11-15 20:13:48,352 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:48,352 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879098539] [2019-11-15 20:13:48,353 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:48,353 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:48,353 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:48,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:48,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:48,444 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1879098539] [2019-11-15 20:13:48,444 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:48,444 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:13:48,444 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [592085962] [2019-11-15 20:13:48,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:13:48,445 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:48,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:13:48,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:13:48,446 INFO L87 Difference]: Start difference. First operand 33602 states and 125428 transitions. Second operand 6 states. [2019-11-15 20:13:49,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:49,420 INFO L93 Difference]: Finished difference Result 46074 states and 167861 transitions. [2019-11-15 20:13:49,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:13:49,421 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 57 [2019-11-15 20:13:49,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:49,499 INFO L225 Difference]: With dead ends: 46074 [2019-11-15 20:13:49,499 INFO L226 Difference]: Without dead ends: 45834 [2019-11-15 20:13:49,500 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:13:49,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45834 states. [2019-11-15 20:13:50,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45834 to 39963. [2019-11-15 20:13:50,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39963 states. [2019-11-15 20:13:50,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39963 states to 39963 states and 147352 transitions. [2019-11-15 20:13:50,250 INFO L78 Accepts]: Start accepts. Automaton has 39963 states and 147352 transitions. Word has length 57 [2019-11-15 20:13:50,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:50,250 INFO L462 AbstractCegarLoop]: Abstraction has 39963 states and 147352 transitions. [2019-11-15 20:13:50,250 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:13:50,250 INFO L276 IsEmpty]: Start isEmpty. Operand 39963 states and 147352 transitions. [2019-11-15 20:13:50,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-11-15 20:13:50,285 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:50,285 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:50,285 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:50,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:50,285 INFO L82 PathProgramCache]: Analyzing trace with hash -480456418, now seen corresponding path program 1 times [2019-11-15 20:13:50,286 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:50,286 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156127095] [2019-11-15 20:13:50,286 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:50,286 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:50,286 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:50,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:50,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:50,328 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156127095] [2019-11-15 20:13:50,328 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:50,328 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:13:50,328 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323850138] [2019-11-15 20:13:50,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:13:50,329 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:50,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:13:50,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:13:50,329 INFO L87 Difference]: Start difference. First operand 39963 states and 147352 transitions. Second operand 3 states. [2019-11-15 20:13:50,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:50,540 INFO L93 Difference]: Finished difference Result 50261 states and 182187 transitions. [2019-11-15 20:13:50,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:13:50,540 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-11-15 20:13:50,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:50,633 INFO L225 Difference]: With dead ends: 50261 [2019-11-15 20:13:50,633 INFO L226 Difference]: Without dead ends: 50261 [2019-11-15 20:13:50,634 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:13:50,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50261 states. [2019-11-15 20:13:51,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50261 to 43893. [2019-11-15 20:13:51,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43893 states. [2019-11-15 20:13:51,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43893 states to 43893 states and 160790 transitions. [2019-11-15 20:13:51,905 INFO L78 Accepts]: Start accepts. Automaton has 43893 states and 160790 transitions. Word has length 59 [2019-11-15 20:13:51,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:51,905 INFO L462 AbstractCegarLoop]: Abstraction has 43893 states and 160790 transitions. [2019-11-15 20:13:51,905 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:13:51,905 INFO L276 IsEmpty]: Start isEmpty. Operand 43893 states and 160790 transitions. [2019-11-15 20:13:51,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-11-15 20:13:51,936 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:51,937 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:51,937 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:51,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:51,937 INFO L82 PathProgramCache]: Analyzing trace with hash 1618566875, now seen corresponding path program 1 times [2019-11-15 20:13:51,938 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:51,938 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1587640456] [2019-11-15 20:13:51,938 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:51,938 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:51,938 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:51,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:52,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:52,017 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1587640456] [2019-11-15 20:13:52,017 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:52,017 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:13:52,017 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [543992861] [2019-11-15 20:13:52,018 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:13:52,018 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:52,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:13:52,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:13:52,018 INFO L87 Difference]: Start difference. First operand 43893 states and 160790 transitions. Second operand 7 states. [2019-11-15 20:13:52,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:52,921 INFO L93 Difference]: Finished difference Result 55889 states and 200524 transitions. [2019-11-15 20:13:52,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:13:52,921 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 63 [2019-11-15 20:13:52,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:53,026 INFO L225 Difference]: With dead ends: 55889 [2019-11-15 20:13:53,026 INFO L226 Difference]: Without dead ends: 55649 [2019-11-15 20:13:53,026 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 20:13:53,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55649 states. [2019-11-15 20:13:53,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55649 to 45119. [2019-11-15 20:13:53,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45119 states. [2019-11-15 20:13:53,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45119 states to 45119 states and 164957 transitions. [2019-11-15 20:13:53,811 INFO L78 Accepts]: Start accepts. Automaton has 45119 states and 164957 transitions. Word has length 63 [2019-11-15 20:13:53,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:53,811 INFO L462 AbstractCegarLoop]: Abstraction has 45119 states and 164957 transitions. [2019-11-15 20:13:53,811 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:13:53,811 INFO L276 IsEmpty]: Start isEmpty. Operand 45119 states and 164957 transitions. [2019-11-15 20:13:53,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 20:13:53,844 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:53,844 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:53,844 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:53,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:53,845 INFO L82 PathProgramCache]: Analyzing trace with hash 543755656, now seen corresponding path program 1 times [2019-11-15 20:13:53,845 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:53,845 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196866671] [2019-11-15 20:13:53,845 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:53,845 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:53,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:53,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:53,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:53,936 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [196866671] [2019-11-15 20:13:53,936 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:53,936 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:13:53,936 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364408467] [2019-11-15 20:13:53,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:13:53,937 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:53,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:13:53,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:13:53,937 INFO L87 Difference]: Start difference. First operand 45119 states and 164957 transitions. Second operand 7 states. [2019-11-15 20:13:55,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:55,496 INFO L93 Difference]: Finished difference Result 55103 states and 197701 transitions. [2019-11-15 20:13:55,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:13:55,496 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-15 20:13:55,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:55,600 INFO L225 Difference]: With dead ends: 55103 [2019-11-15 20:13:55,600 INFO L226 Difference]: Without dead ends: 54903 [2019-11-15 20:13:55,600 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 20:13:55,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54903 states. [2019-11-15 20:13:56,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54903 to 45997. [2019-11-15 20:13:56,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45997 states. [2019-11-15 20:13:56,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45997 states to 45997 states and 167828 transitions. [2019-11-15 20:13:56,379 INFO L78 Accepts]: Start accepts. Automaton has 45997 states and 167828 transitions. Word has length 64 [2019-11-15 20:13:56,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:56,379 INFO L462 AbstractCegarLoop]: Abstraction has 45997 states and 167828 transitions. [2019-11-15 20:13:56,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:13:56,379 INFO L276 IsEmpty]: Start isEmpty. Operand 45997 states and 167828 transitions. [2019-11-15 20:13:56,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 20:13:56,408 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:56,408 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:56,408 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:56,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:56,409 INFO L82 PathProgramCache]: Analyzing trace with hash 1344094873, now seen corresponding path program 1 times [2019-11-15 20:13:56,409 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:56,409 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891445443] [2019-11-15 20:13:56,409 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:56,409 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:56,409 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:56,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:56,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:56,504 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1891445443] [2019-11-15 20:13:56,505 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:56,505 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:13:56,505 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [921905792] [2019-11-15 20:13:56,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:13:56,505 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:56,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:13:56,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:13:56,506 INFO L87 Difference]: Start difference. First operand 45997 states and 167828 transitions. Second operand 6 states. [2019-11-15 20:13:57,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:13:57,189 INFO L93 Difference]: Finished difference Result 65557 states and 237355 transitions. [2019-11-15 20:13:57,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:13:57,189 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-11-15 20:13:57,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:13:57,311 INFO L225 Difference]: With dead ends: 65557 [2019-11-15 20:13:57,311 INFO L226 Difference]: Without dead ends: 64913 [2019-11-15 20:13:57,311 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:13:57,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64913 states. [2019-11-15 20:13:58,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64913 to 56047. [2019-11-15 20:13:58,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56047 states. [2019-11-15 20:13:59,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56047 states to 56047 states and 204358 transitions. [2019-11-15 20:13:59,152 INFO L78 Accepts]: Start accepts. Automaton has 56047 states and 204358 transitions. Word has length 66 [2019-11-15 20:13:59,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:13:59,152 INFO L462 AbstractCegarLoop]: Abstraction has 56047 states and 204358 transitions. [2019-11-15 20:13:59,152 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:13:59,152 INFO L276 IsEmpty]: Start isEmpty. Operand 56047 states and 204358 transitions. [2019-11-15 20:13:59,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 20:13:59,198 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:13:59,198 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:13:59,198 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:13:59,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:13:59,199 INFO L82 PathProgramCache]: Analyzing trace with hash -1989258406, now seen corresponding path program 1 times [2019-11-15 20:13:59,199 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:13:59,199 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261606594] [2019-11-15 20:13:59,199 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:59,199 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:13:59,199 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:13:59,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:13:59,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:13:59,288 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261606594] [2019-11-15 20:13:59,288 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:13:59,288 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:13:59,288 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [304463352] [2019-11-15 20:13:59,289 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:13:59,289 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:13:59,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:13:59,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:13:59,289 INFO L87 Difference]: Start difference. First operand 56047 states and 204358 transitions. Second operand 7 states. [2019-11-15 20:14:00,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:00,219 INFO L93 Difference]: Finished difference Result 83035 states and 292786 transitions. [2019-11-15 20:14:00,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:14:00,219 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 20:14:00,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:00,370 INFO L225 Difference]: With dead ends: 83035 [2019-11-15 20:14:00,371 INFO L226 Difference]: Without dead ends: 83035 [2019-11-15 20:14:00,371 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:14:00,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83035 states. [2019-11-15 20:14:01,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83035 to 76084. [2019-11-15 20:14:01,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76084 states. [2019-11-15 20:14:01,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76084 states to 76084 states and 270653 transitions. [2019-11-15 20:14:01,628 INFO L78 Accepts]: Start accepts. Automaton has 76084 states and 270653 transitions. Word has length 66 [2019-11-15 20:14:01,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:01,628 INFO L462 AbstractCegarLoop]: Abstraction has 76084 states and 270653 transitions. [2019-11-15 20:14:01,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:14:01,629 INFO L276 IsEmpty]: Start isEmpty. Operand 76084 states and 270653 transitions. [2019-11-15 20:14:01,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 20:14:01,694 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:01,694 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:01,695 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:01,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:01,695 INFO L82 PathProgramCache]: Analyzing trace with hash -744493925, now seen corresponding path program 1 times [2019-11-15 20:14:01,695 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:01,695 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141491259] [2019-11-15 20:14:01,695 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:01,696 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:01,696 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:01,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:01,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:01,761 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141491259] [2019-11-15 20:14:01,761 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:01,762 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:14:01,762 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1326620256] [2019-11-15 20:14:01,762 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:14:01,762 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:01,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:14:01,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:14:01,762 INFO L87 Difference]: Start difference. First operand 76084 states and 270653 transitions. Second operand 4 states. [2019-11-15 20:14:01,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:01,843 INFO L93 Difference]: Finished difference Result 17229 states and 54531 transitions. [2019-11-15 20:14:01,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:14:01,844 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-11-15 20:14:01,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:01,874 INFO L225 Difference]: With dead ends: 17229 [2019-11-15 20:14:01,875 INFO L226 Difference]: Without dead ends: 16751 [2019-11-15 20:14:01,875 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:14:01,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16751 states. [2019-11-15 20:14:02,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16751 to 16739. [2019-11-15 20:14:02,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16739 states. [2019-11-15 20:14:02,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16739 states to 16739 states and 53026 transitions. [2019-11-15 20:14:02,083 INFO L78 Accepts]: Start accepts. Automaton has 16739 states and 53026 transitions. Word has length 66 [2019-11-15 20:14:02,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:02,083 INFO L462 AbstractCegarLoop]: Abstraction has 16739 states and 53026 transitions. [2019-11-15 20:14:02,083 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:14:02,083 INFO L276 IsEmpty]: Start isEmpty. Operand 16739 states and 53026 transitions. [2019-11-15 20:14:02,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 20:14:02,094 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:02,094 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:02,094 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:02,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:02,094 INFO L82 PathProgramCache]: Analyzing trace with hash 263914028, now seen corresponding path program 1 times [2019-11-15 20:14:02,094 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:02,095 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237989523] [2019-11-15 20:14:02,095 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:02,095 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:02,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:02,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:02,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:02,215 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1237989523] [2019-11-15 20:14:02,215 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:02,215 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:14:02,215 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923015285] [2019-11-15 20:14:02,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:14:02,216 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:02,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:14:02,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:14:02,216 INFO L87 Difference]: Start difference. First operand 16739 states and 53026 transitions. Second operand 4 states. [2019-11-15 20:14:03,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:03,667 INFO L93 Difference]: Finished difference Result 22103 states and 69107 transitions. [2019-11-15 20:14:03,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:14:03,668 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2019-11-15 20:14:03,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:03,708 INFO L225 Difference]: With dead ends: 22103 [2019-11-15 20:14:03,708 INFO L226 Difference]: Without dead ends: 22103 [2019-11-15 20:14:03,708 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:14:03,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22103 states. [2019-11-15 20:14:03,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22103 to 17615. [2019-11-15 20:14:03,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17615 states. [2019-11-15 20:14:03,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17615 states to 17615 states and 55585 transitions. [2019-11-15 20:14:03,967 INFO L78 Accepts]: Start accepts. Automaton has 17615 states and 55585 transitions. Word has length 76 [2019-11-15 20:14:03,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:03,967 INFO L462 AbstractCegarLoop]: Abstraction has 17615 states and 55585 transitions. [2019-11-15 20:14:03,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:14:03,967 INFO L276 IsEmpty]: Start isEmpty. Operand 17615 states and 55585 transitions. [2019-11-15 20:14:03,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 20:14:03,980 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:03,981 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:03,981 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:03,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:03,981 INFO L82 PathProgramCache]: Analyzing trace with hash 9177483, now seen corresponding path program 1 times [2019-11-15 20:14:03,981 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:03,981 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624797649] [2019-11-15 20:14:03,981 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:03,981 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:03,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:03,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:04,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:04,079 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624797649] [2019-11-15 20:14:04,080 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:04,080 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:14:04,080 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284172724] [2019-11-15 20:14:04,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:14:04,080 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:04,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:14:04,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:14:04,081 INFO L87 Difference]: Start difference. First operand 17615 states and 55585 transitions. Second operand 8 states. [2019-11-15 20:14:05,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:05,069 INFO L93 Difference]: Finished difference Result 19709 states and 61661 transitions. [2019-11-15 20:14:05,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 20:14:05,069 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 76 [2019-11-15 20:14:05,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:05,095 INFO L225 Difference]: With dead ends: 19709 [2019-11-15 20:14:05,095 INFO L226 Difference]: Without dead ends: 19661 [2019-11-15 20:14:05,096 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-15 20:14:05,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19661 states. [2019-11-15 20:14:05,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19661 to 15533. [2019-11-15 20:14:05,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15533 states. [2019-11-15 20:14:05,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15533 states to 15533 states and 49319 transitions. [2019-11-15 20:14:05,304 INFO L78 Accepts]: Start accepts. Automaton has 15533 states and 49319 transitions. Word has length 76 [2019-11-15 20:14:05,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:05,305 INFO L462 AbstractCegarLoop]: Abstraction has 15533 states and 49319 transitions. [2019-11-15 20:14:05,305 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:14:05,305 INFO L276 IsEmpty]: Start isEmpty. Operand 15533 states and 49319 transitions. [2019-11-15 20:14:05,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-15 20:14:05,315 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:05,315 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:05,315 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:05,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:05,316 INFO L82 PathProgramCache]: Analyzing trace with hash -760558455, now seen corresponding path program 1 times [2019-11-15 20:14:05,316 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:05,316 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552716985] [2019-11-15 20:14:05,316 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:05,316 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:05,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:05,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:05,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:05,354 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552716985] [2019-11-15 20:14:05,355 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:05,355 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:14:05,355 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255619499] [2019-11-15 20:14:05,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:14:05,355 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:05,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:14:05,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:14:05,356 INFO L87 Difference]: Start difference. First operand 15533 states and 49319 transitions. Second operand 3 states. [2019-11-15 20:14:05,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:05,535 INFO L93 Difference]: Finished difference Result 16797 states and 53032 transitions. [2019-11-15 20:14:05,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:14:05,535 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 77 [2019-11-15 20:14:05,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:05,557 INFO L225 Difference]: With dead ends: 16797 [2019-11-15 20:14:05,557 INFO L226 Difference]: Without dead ends: 16797 [2019-11-15 20:14:05,558 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:14:05,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16797 states. [2019-11-15 20:14:05,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16797 to 16149. [2019-11-15 20:14:05,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16149 states. [2019-11-15 20:14:05,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16149 states to 16149 states and 51133 transitions. [2019-11-15 20:14:05,755 INFO L78 Accepts]: Start accepts. Automaton has 16149 states and 51133 transitions. Word has length 77 [2019-11-15 20:14:05,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:05,756 INFO L462 AbstractCegarLoop]: Abstraction has 16149 states and 51133 transitions. [2019-11-15 20:14:05,756 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:14:05,756 INFO L276 IsEmpty]: Start isEmpty. Operand 16149 states and 51133 transitions. [2019-11-15 20:14:05,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 20:14:05,767 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:05,767 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:05,767 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:05,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:05,767 INFO L82 PathProgramCache]: Analyzing trace with hash -1482177058, now seen corresponding path program 1 times [2019-11-15 20:14:05,767 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:05,767 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773262935] [2019-11-15 20:14:05,768 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:05,768 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:05,768 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:05,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:05,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:05,836 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1773262935] [2019-11-15 20:14:05,836 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:05,837 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:14:05,837 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132812025] [2019-11-15 20:14:05,837 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:14:05,837 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:05,837 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:14:05,837 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:14:05,838 INFO L87 Difference]: Start difference. First operand 16149 states and 51133 transitions. Second operand 4 states. [2019-11-15 20:14:06,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:06,113 INFO L93 Difference]: Finished difference Result 19317 states and 60263 transitions. [2019-11-15 20:14:06,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:14:06,114 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-11-15 20:14:06,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:06,139 INFO L225 Difference]: With dead ends: 19317 [2019-11-15 20:14:06,139 INFO L226 Difference]: Without dead ends: 19317 [2019-11-15 20:14:06,141 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:14:06,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19317 states. [2019-11-15 20:14:06,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19317 to 18294. [2019-11-15 20:14:06,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18294 states. [2019-11-15 20:14:06,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18294 states to 18294 states and 57379 transitions. [2019-11-15 20:14:06,372 INFO L78 Accepts]: Start accepts. Automaton has 18294 states and 57379 transitions. Word has length 78 [2019-11-15 20:14:06,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:06,373 INFO L462 AbstractCegarLoop]: Abstraction has 18294 states and 57379 transitions. [2019-11-15 20:14:06,373 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:14:06,373 INFO L276 IsEmpty]: Start isEmpty. Operand 18294 states and 57379 transitions. [2019-11-15 20:14:06,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 20:14:06,387 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:06,387 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:06,387 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:06,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:06,388 INFO L82 PathProgramCache]: Analyzing trace with hash 877129951, now seen corresponding path program 1 times [2019-11-15 20:14:06,388 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:06,388 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096657742] [2019-11-15 20:14:06,388 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:06,388 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:06,388 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:06,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:06,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:06,443 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096657742] [2019-11-15 20:14:06,443 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:06,443 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:14:06,444 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [624859646] [2019-11-15 20:14:06,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:14:06,444 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:06,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:14:06,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:14:06,445 INFO L87 Difference]: Start difference. First operand 18294 states and 57379 transitions. Second operand 3 states. [2019-11-15 20:14:06,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:06,659 INFO L93 Difference]: Finished difference Result 19637 states and 61302 transitions. [2019-11-15 20:14:06,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:14:06,659 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-11-15 20:14:06,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:06,684 INFO L225 Difference]: With dead ends: 19637 [2019-11-15 20:14:06,685 INFO L226 Difference]: Without dead ends: 19637 [2019-11-15 20:14:06,685 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:14:06,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19637 states. [2019-11-15 20:14:06,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19637 to 18974. [2019-11-15 20:14:06,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18974 states. [2019-11-15 20:14:06,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18974 states to 18974 states and 59359 transitions. [2019-11-15 20:14:06,911 INFO L78 Accepts]: Start accepts. Automaton has 18974 states and 59359 transitions. Word has length 78 [2019-11-15 20:14:06,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:06,911 INFO L462 AbstractCegarLoop]: Abstraction has 18974 states and 59359 transitions. [2019-11-15 20:14:06,911 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:14:06,912 INFO L276 IsEmpty]: Start isEmpty. Operand 18974 states and 59359 transitions. [2019-11-15 20:14:06,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:14:06,927 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:06,928 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:06,928 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:06,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:06,928 INFO L82 PathProgramCache]: Analyzing trace with hash 1829246556, now seen corresponding path program 1 times [2019-11-15 20:14:06,928 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:06,928 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [681362429] [2019-11-15 20:14:06,929 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:06,929 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:06,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:06,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:07,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:07,021 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [681362429] [2019-11-15 20:14:07,022 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:07,022 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:14:07,022 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786904970] [2019-11-15 20:14:07,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:14:07,022 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:07,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:14:07,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:14:07,022 INFO L87 Difference]: Start difference. First operand 18974 states and 59359 transitions. Second operand 8 states. [2019-11-15 20:14:08,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:08,994 INFO L93 Difference]: Finished difference Result 52656 states and 160090 transitions. [2019-11-15 20:14:08,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-15 20:14:08,995 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-15 20:14:08,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:09,073 INFO L225 Difference]: With dead ends: 52656 [2019-11-15 20:14:09,073 INFO L226 Difference]: Without dead ends: 52239 [2019-11-15 20:14:09,074 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-15 20:14:09,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52239 states. [2019-11-15 20:14:09,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52239 to 28681. [2019-11-15 20:14:09,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28681 states. [2019-11-15 20:14:09,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28681 states to 28681 states and 89257 transitions. [2019-11-15 20:14:09,576 INFO L78 Accepts]: Start accepts. Automaton has 28681 states and 89257 transitions. Word has length 79 [2019-11-15 20:14:09,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:09,576 INFO L462 AbstractCegarLoop]: Abstraction has 28681 states and 89257 transitions. [2019-11-15 20:14:09,577 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:14:09,577 INFO L276 IsEmpty]: Start isEmpty. Operand 28681 states and 89257 transitions. [2019-11-15 20:14:09,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:14:09,600 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:09,600 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:09,601 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:09,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:09,601 INFO L82 PathProgramCache]: Analyzing trace with hash -259342242, now seen corresponding path program 1 times [2019-11-15 20:14:09,601 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:09,601 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308413546] [2019-11-15 20:14:09,601 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:09,601 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:09,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:09,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:09,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:09,715 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [308413546] [2019-11-15 20:14:09,715 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:09,715 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:14:09,715 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1724261282] [2019-11-15 20:14:09,716 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:14:09,716 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:09,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:14:09,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:14:09,717 INFO L87 Difference]: Start difference. First operand 28681 states and 89257 transitions. Second operand 6 states. [2019-11-15 20:14:10,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:10,294 INFO L93 Difference]: Finished difference Result 30406 states and 93750 transitions. [2019-11-15 20:14:10,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:14:10,295 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 79 [2019-11-15 20:14:10,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:10,343 INFO L225 Difference]: With dead ends: 30406 [2019-11-15 20:14:10,343 INFO L226 Difference]: Without dead ends: 30406 [2019-11-15 20:14:10,344 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:14:10,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30406 states. [2019-11-15 20:14:10,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30406 to 29148. [2019-11-15 20:14:10,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29148 states. [2019-11-15 20:14:10,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29148 states to 29148 states and 90159 transitions. [2019-11-15 20:14:10,962 INFO L78 Accepts]: Start accepts. Automaton has 29148 states and 90159 transitions. Word has length 79 [2019-11-15 20:14:10,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:10,962 INFO L462 AbstractCegarLoop]: Abstraction has 29148 states and 90159 transitions. [2019-11-15 20:14:10,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:14:10,962 INFO L276 IsEmpty]: Start isEmpty. Operand 29148 states and 90159 transitions. [2019-11-15 20:14:10,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:14:10,985 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:10,985 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:10,985 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:10,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:10,985 INFO L82 PathProgramCache]: Analyzing trace with hash 2099964767, now seen corresponding path program 1 times [2019-11-15 20:14:10,986 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:10,986 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905323150] [2019-11-15 20:14:10,986 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:10,986 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:10,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:10,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:11,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:11,071 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905323150] [2019-11-15 20:14:11,072 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:11,072 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:14:11,072 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1250122802] [2019-11-15 20:14:11,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:14:11,073 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:11,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:14:11,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:14:11,074 INFO L87 Difference]: Start difference. First operand 29148 states and 90159 transitions. Second operand 7 states. [2019-11-15 20:14:11,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:11,546 INFO L93 Difference]: Finished difference Result 30833 states and 94867 transitions. [2019-11-15 20:14:11,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:14:11,547 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 79 [2019-11-15 20:14:11,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:11,590 INFO L225 Difference]: With dead ends: 30833 [2019-11-15 20:14:11,590 INFO L226 Difference]: Without dead ends: 30833 [2019-11-15 20:14:11,590 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:14:11,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30833 states. [2019-11-15 20:14:11,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30833 to 29511. [2019-11-15 20:14:11,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29511 states. [2019-11-15 20:14:11,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29511 states to 29511 states and 91024 transitions. [2019-11-15 20:14:11,959 INFO L78 Accepts]: Start accepts. Automaton has 29511 states and 91024 transitions. Word has length 79 [2019-11-15 20:14:11,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:11,959 INFO L462 AbstractCegarLoop]: Abstraction has 29511 states and 91024 transitions. [2019-11-15 20:14:11,959 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:14:11,959 INFO L276 IsEmpty]: Start isEmpty. Operand 29511 states and 91024 transitions. [2019-11-15 20:14:11,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:14:11,983 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:11,983 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:11,984 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:11,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:11,984 INFO L82 PathProgramCache]: Analyzing trace with hash -1865236768, now seen corresponding path program 1 times [2019-11-15 20:14:11,984 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:11,984 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [872831601] [2019-11-15 20:14:11,985 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:11,985 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:11,985 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:11,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:12,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:12,030 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [872831601] [2019-11-15 20:14:12,030 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:12,031 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:14:12,031 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1193088682] [2019-11-15 20:14:12,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:14:12,031 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:12,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:14:12,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:14:12,032 INFO L87 Difference]: Start difference. First operand 29511 states and 91024 transitions. Second operand 3 states. [2019-11-15 20:14:12,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:12,115 INFO L93 Difference]: Finished difference Result 22464 states and 68729 transitions. [2019-11-15 20:14:12,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:14:12,116 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 20:14:12,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:12,144 INFO L225 Difference]: With dead ends: 22464 [2019-11-15 20:14:12,144 INFO L226 Difference]: Without dead ends: 22464 [2019-11-15 20:14:12,144 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:14:12,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22464 states. [2019-11-15 20:14:12,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22464 to 21650. [2019-11-15 20:14:12,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21650 states. [2019-11-15 20:14:12,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21650 states to 21650 states and 66413 transitions. [2019-11-15 20:14:12,404 INFO L78 Accepts]: Start accepts. Automaton has 21650 states and 66413 transitions. Word has length 79 [2019-11-15 20:14:12,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:12,404 INFO L462 AbstractCegarLoop]: Abstraction has 21650 states and 66413 transitions. [2019-11-15 20:14:12,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:14:12,405 INFO L276 IsEmpty]: Start isEmpty. Operand 21650 states and 66413 transitions. [2019-11-15 20:14:12,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:14:12,422 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:12,422 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:12,422 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:12,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:12,423 INFO L82 PathProgramCache]: Analyzing trace with hash -565864143, now seen corresponding path program 1 times [2019-11-15 20:14:12,423 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:12,423 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [487561490] [2019-11-15 20:14:12,423 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:12,423 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:12,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:12,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:12,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:12,504 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [487561490] [2019-11-15 20:14:12,505 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:12,505 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:14:12,505 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198639844] [2019-11-15 20:14:12,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:14:12,505 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:12,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:14:12,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:14:12,506 INFO L87 Difference]: Start difference. First operand 21650 states and 66413 transitions. Second operand 5 states. [2019-11-15 20:14:12,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:12,637 INFO L93 Difference]: Finished difference Result 31338 states and 95665 transitions. [2019-11-15 20:14:12,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:14:12,638 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 79 [2019-11-15 20:14:12,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:12,679 INFO L225 Difference]: With dead ends: 31338 [2019-11-15 20:14:12,679 INFO L226 Difference]: Without dead ends: 31338 [2019-11-15 20:14:12,680 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:14:12,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31338 states. [2019-11-15 20:14:12,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31338 to 20557. [2019-11-15 20:14:12,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20557 states. [2019-11-15 20:14:12,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20557 states to 20557 states and 61826 transitions. [2019-11-15 20:14:12,970 INFO L78 Accepts]: Start accepts. Automaton has 20557 states and 61826 transitions. Word has length 79 [2019-11-15 20:14:12,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:12,970 INFO L462 AbstractCegarLoop]: Abstraction has 20557 states and 61826 transitions. [2019-11-15 20:14:12,970 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:14:12,970 INFO L276 IsEmpty]: Start isEmpty. Operand 20557 states and 61826 transitions. [2019-11-15 20:14:12,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:14:12,986 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:12,987 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:12,987 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:12,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:12,987 INFO L82 PathProgramCache]: Analyzing trace with hash 1159616754, now seen corresponding path program 1 times [2019-11-15 20:14:12,987 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:12,988 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1829395523] [2019-11-15 20:14:12,988 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:12,988 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:12,988 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:13,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:13,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:13,030 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1829395523] [2019-11-15 20:14:13,030 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:13,030 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:14:13,030 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [969559616] [2019-11-15 20:14:13,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:14:13,031 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:13,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:14:13,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:14:13,031 INFO L87 Difference]: Start difference. First operand 20557 states and 61826 transitions. Second operand 3 states. [2019-11-15 20:14:13,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:13,155 INFO L93 Difference]: Finished difference Result 19258 states and 57345 transitions. [2019-11-15 20:14:13,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:14:13,155 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 20:14:13,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:13,186 INFO L225 Difference]: With dead ends: 19258 [2019-11-15 20:14:13,186 INFO L226 Difference]: Without dead ends: 19204 [2019-11-15 20:14:13,186 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:14:13,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19204 states. [2019-11-15 20:14:13,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19204 to 18325. [2019-11-15 20:14:13,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18325 states. [2019-11-15 20:14:13,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18325 states to 18325 states and 54823 transitions. [2019-11-15 20:14:13,431 INFO L78 Accepts]: Start accepts. Automaton has 18325 states and 54823 transitions. Word has length 79 [2019-11-15 20:14:13,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:13,431 INFO L462 AbstractCegarLoop]: Abstraction has 18325 states and 54823 transitions. [2019-11-15 20:14:13,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:14:13,432 INFO L276 IsEmpty]: Start isEmpty. Operand 18325 states and 54823 transitions. [2019-11-15 20:14:13,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:14:13,451 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:13,451 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:13,451 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:13,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:13,452 INFO L82 PathProgramCache]: Analyzing trace with hash 1404910931, now seen corresponding path program 1 times [2019-11-15 20:14:13,452 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:13,452 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1736525913] [2019-11-15 20:14:13,452 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:13,452 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:13,452 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:13,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:13,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:13,519 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1736525913] [2019-11-15 20:14:13,520 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:13,520 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:14:13,520 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1756073753] [2019-11-15 20:14:13,523 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:14:13,523 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:13,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:14:13,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:14:13,523 INFO L87 Difference]: Start difference. First operand 18325 states and 54823 transitions. Second operand 6 states. [2019-11-15 20:14:14,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:14,164 INFO L93 Difference]: Finished difference Result 34663 states and 104987 transitions. [2019-11-15 20:14:14,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:14:14,166 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 20:14:14,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:14,210 INFO L225 Difference]: With dead ends: 34663 [2019-11-15 20:14:14,211 INFO L226 Difference]: Without dead ends: 34663 [2019-11-15 20:14:14,211 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:14:14,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34663 states. [2019-11-15 20:14:14,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34663 to 19231. [2019-11-15 20:14:14,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19231 states. [2019-11-15 20:14:14,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19231 states to 19231 states and 57296 transitions. [2019-11-15 20:14:14,514 INFO L78 Accepts]: Start accepts. Automaton has 19231 states and 57296 transitions. Word has length 80 [2019-11-15 20:14:14,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:14,514 INFO L462 AbstractCegarLoop]: Abstraction has 19231 states and 57296 transitions. [2019-11-15 20:14:14,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:14:14,514 INFO L276 IsEmpty]: Start isEmpty. Operand 19231 states and 57296 transitions. [2019-11-15 20:14:14,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:14:14,531 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:14,531 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:14,531 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:14,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:14,531 INFO L82 PathProgramCache]: Analyzing trace with hash -605192910, now seen corresponding path program 1 times [2019-11-15 20:14:14,532 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:14,532 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145919433] [2019-11-15 20:14:14,532 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:14,532 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:14,532 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:14,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:14,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:14,622 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [145919433] [2019-11-15 20:14:14,622 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:14,622 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:14:14,622 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1886558431] [2019-11-15 20:14:14,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:14:14,623 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:14,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:14:14,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:14:14,624 INFO L87 Difference]: Start difference. First operand 19231 states and 57296 transitions. Second operand 7 states. [2019-11-15 20:14:16,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:16,371 INFO L93 Difference]: Finished difference Result 38950 states and 115419 transitions. [2019-11-15 20:14:16,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-15 20:14:16,372 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-15 20:14:16,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:16,421 INFO L225 Difference]: With dead ends: 38950 [2019-11-15 20:14:16,421 INFO L226 Difference]: Without dead ends: 38629 [2019-11-15 20:14:16,423 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=95, Invalid=211, Unknown=0, NotChecked=0, Total=306 [2019-11-15 20:14:16,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38629 states. [2019-11-15 20:14:16,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38629 to 28051. [2019-11-15 20:14:16,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28051 states. [2019-11-15 20:14:17,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28051 states to 28051 states and 84569 transitions. [2019-11-15 20:14:17,104 INFO L78 Accepts]: Start accepts. Automaton has 28051 states and 84569 transitions. Word has length 80 [2019-11-15 20:14:17,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:17,104 INFO L462 AbstractCegarLoop]: Abstraction has 28051 states and 84569 transitions. [2019-11-15 20:14:17,104 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:14:17,104 INFO L276 IsEmpty]: Start isEmpty. Operand 28051 states and 84569 transitions. [2019-11-15 20:14:17,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:14:17,123 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:17,124 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:17,124 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:17,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:17,124 INFO L82 PathProgramCache]: Analyzing trace with hash 356421107, now seen corresponding path program 1 times [2019-11-15 20:14:17,125 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:17,125 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756576596] [2019-11-15 20:14:17,125 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:17,125 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:17,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:17,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:17,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:17,240 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756576596] [2019-11-15 20:14:17,240 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:17,241 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:14:17,241 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1497384983] [2019-11-15 20:14:17,241 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:14:17,241 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:17,241 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:14:17,242 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:14:17,242 INFO L87 Difference]: Start difference. First operand 28051 states and 84569 transitions. Second operand 6 states. [2019-11-15 20:14:17,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:17,595 INFO L93 Difference]: Finished difference Result 29345 states and 88235 transitions. [2019-11-15 20:14:17,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:14:17,596 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 20:14:17,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:17,633 INFO L225 Difference]: With dead ends: 29345 [2019-11-15 20:14:17,633 INFO L226 Difference]: Without dead ends: 29345 [2019-11-15 20:14:17,634 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:14:17,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29345 states. [2019-11-15 20:14:17,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29345 to 27945. [2019-11-15 20:14:17,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27945 states. [2019-11-15 20:14:17,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27945 states to 27945 states and 84195 transitions. [2019-11-15 20:14:17,977 INFO L78 Accepts]: Start accepts. Automaton has 27945 states and 84195 transitions. Word has length 80 [2019-11-15 20:14:17,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:17,977 INFO L462 AbstractCegarLoop]: Abstraction has 27945 states and 84195 transitions. [2019-11-15 20:14:17,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:14:17,977 INFO L276 IsEmpty]: Start isEmpty. Operand 27945 states and 84195 transitions. [2019-11-15 20:14:17,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:14:17,996 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:17,996 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:17,996 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:17,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:17,997 INFO L82 PathProgramCache]: Analyzing trace with hash -530749356, now seen corresponding path program 1 times [2019-11-15 20:14:17,997 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:17,997 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308822500] [2019-11-15 20:14:17,997 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:17,997 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:17,997 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:18,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:18,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:18,058 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308822500] [2019-11-15 20:14:18,058 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:18,058 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:14:18,059 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1515339386] [2019-11-15 20:14:18,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:14:18,059 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:18,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:14:18,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:14:18,060 INFO L87 Difference]: Start difference. First operand 27945 states and 84195 transitions. Second operand 5 states. [2019-11-15 20:14:18,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:18,515 INFO L93 Difference]: Finished difference Result 35941 states and 107634 transitions. [2019-11-15 20:14:18,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:14:18,516 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-11-15 20:14:18,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:18,580 INFO L225 Difference]: With dead ends: 35941 [2019-11-15 20:14:18,580 INFO L226 Difference]: Without dead ends: 35941 [2019-11-15 20:14:18,580 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:14:18,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35941 states. [2019-11-15 20:14:19,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35941 to 27904. [2019-11-15 20:14:19,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27904 states. [2019-11-15 20:14:19,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27904 states to 27904 states and 83918 transitions. [2019-11-15 20:14:19,098 INFO L78 Accepts]: Start accepts. Automaton has 27904 states and 83918 transitions. Word has length 80 [2019-11-15 20:14:19,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:19,099 INFO L462 AbstractCegarLoop]: Abstraction has 27904 states and 83918 transitions. [2019-11-15 20:14:19,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:14:19,099 INFO L276 IsEmpty]: Start isEmpty. Operand 27904 states and 83918 transitions. [2019-11-15 20:14:19,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:14:19,129 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:19,129 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:19,130 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:19,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:19,130 INFO L82 PathProgramCache]: Analyzing trace with hash 1754114099, now seen corresponding path program 1 times [2019-11-15 20:14:19,130 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:19,130 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015089679] [2019-11-15 20:14:19,131 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:19,131 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:19,131 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:19,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:19,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:19,192 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2015089679] [2019-11-15 20:14:19,192 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:19,192 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:14:19,193 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [392142923] [2019-11-15 20:14:19,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:14:19,193 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:19,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:14:19,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:14:19,195 INFO L87 Difference]: Start difference. First operand 27904 states and 83918 transitions. Second operand 4 states. [2019-11-15 20:14:19,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:19,563 INFO L93 Difference]: Finished difference Result 32638 states and 96773 transitions. [2019-11-15 20:14:19,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:14:19,564 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2019-11-15 20:14:19,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:19,604 INFO L225 Difference]: With dead ends: 32638 [2019-11-15 20:14:19,604 INFO L226 Difference]: Without dead ends: 32164 [2019-11-15 20:14:19,605 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:14:19,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32164 states. [2019-11-15 20:14:19,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32164 to 28431. [2019-11-15 20:14:19,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28431 states. [2019-11-15 20:14:19,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28431 states to 28431 states and 85636 transitions. [2019-11-15 20:14:19,966 INFO L78 Accepts]: Start accepts. Automaton has 28431 states and 85636 transitions. Word has length 80 [2019-11-15 20:14:19,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:19,966 INFO L462 AbstractCegarLoop]: Abstraction has 28431 states and 85636 transitions. [2019-11-15 20:14:19,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:14:19,966 INFO L276 IsEmpty]: Start isEmpty. Operand 28431 states and 85636 transitions. [2019-11-15 20:14:19,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:14:19,986 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:19,986 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:19,986 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:19,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:19,986 INFO L82 PathProgramCache]: Analyzing trace with hash -1579239180, now seen corresponding path program 1 times [2019-11-15 20:14:19,986 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:19,986 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [847665900] [2019-11-15 20:14:19,986 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:19,986 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:19,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:19,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:20,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:20,050 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [847665900] [2019-11-15 20:14:20,051 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:20,051 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:14:20,051 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959966325] [2019-11-15 20:14:20,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:14:20,051 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:20,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:14:20,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:14:20,052 INFO L87 Difference]: Start difference. First operand 28431 states and 85636 transitions. Second operand 5 states. [2019-11-15 20:14:20,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:20,102 INFO L93 Difference]: Finished difference Result 3531 states and 8394 transitions. [2019-11-15 20:14:20,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:14:20,102 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-11-15 20:14:20,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:20,106 INFO L225 Difference]: With dead ends: 3531 [2019-11-15 20:14:20,106 INFO L226 Difference]: Without dead ends: 2962 [2019-11-15 20:14:20,106 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:14:20,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2962 states. [2019-11-15 20:14:20,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2962 to 2541. [2019-11-15 20:14:20,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2541 states. [2019-11-15 20:14:20,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2541 states to 2541 states and 6014 transitions. [2019-11-15 20:14:20,139 INFO L78 Accepts]: Start accepts. Automaton has 2541 states and 6014 transitions. Word has length 80 [2019-11-15 20:14:20,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:20,140 INFO L462 AbstractCegarLoop]: Abstraction has 2541 states and 6014 transitions. [2019-11-15 20:14:20,140 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:14:20,140 INFO L276 IsEmpty]: Start isEmpty. Operand 2541 states and 6014 transitions. [2019-11-15 20:14:20,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 20:14:20,142 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:20,143 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:20,143 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:20,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:20,143 INFO L82 PathProgramCache]: Analyzing trace with hash 417222268, now seen corresponding path program 1 times [2019-11-15 20:14:20,143 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:20,144 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [480544946] [2019-11-15 20:14:20,144 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:20,144 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:20,144 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:20,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:20,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:20,266 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [480544946] [2019-11-15 20:14:20,267 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:20,267 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:14:20,267 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19969546] [2019-11-15 20:14:20,267 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:14:20,267 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:20,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:14:20,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:14:20,268 INFO L87 Difference]: Start difference. First operand 2541 states and 6014 transitions. Second operand 7 states. [2019-11-15 20:14:20,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:20,710 INFO L93 Difference]: Finished difference Result 3550 states and 8184 transitions. [2019-11-15 20:14:20,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 20:14:20,711 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2019-11-15 20:14:20,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:20,713 INFO L225 Difference]: With dead ends: 3550 [2019-11-15 20:14:20,714 INFO L226 Difference]: Without dead ends: 3522 [2019-11-15 20:14:20,714 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-11-15 20:14:20,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3522 states. [2019-11-15 20:14:20,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3522 to 2638. [2019-11-15 20:14:20,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2638 states. [2019-11-15 20:14:20,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2638 states to 2638 states and 6209 transitions. [2019-11-15 20:14:20,738 INFO L78 Accepts]: Start accepts. Automaton has 2638 states and 6209 transitions. Word has length 93 [2019-11-15 20:14:20,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:20,739 INFO L462 AbstractCegarLoop]: Abstraction has 2638 states and 6209 transitions. [2019-11-15 20:14:20,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:14:20,739 INFO L276 IsEmpty]: Start isEmpty. Operand 2638 states and 6209 transitions. [2019-11-15 20:14:20,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 20:14:20,740 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:20,741 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:20,741 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:20,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:20,741 INFO L82 PathProgramCache]: Analyzing trace with hash -469948195, now seen corresponding path program 1 times [2019-11-15 20:14:20,741 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:20,741 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767665336] [2019-11-15 20:14:20,742 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:20,742 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:20,742 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:20,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:20,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:20,810 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767665336] [2019-11-15 20:14:20,810 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:20,810 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:14:20,811 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [141941072] [2019-11-15 20:14:20,811 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:14:20,811 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:20,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:14:20,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:14:20,812 INFO L87 Difference]: Start difference. First operand 2638 states and 6209 transitions. Second operand 6 states. [2019-11-15 20:14:21,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:21,093 INFO L93 Difference]: Finished difference Result 2899 states and 6744 transitions. [2019-11-15 20:14:21,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 20:14:21,093 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-11-15 20:14:21,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:21,096 INFO L225 Difference]: With dead ends: 2899 [2019-11-15 20:14:21,096 INFO L226 Difference]: Without dead ends: 2899 [2019-11-15 20:14:21,097 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:14:21,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2899 states. [2019-11-15 20:14:21,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2899 to 2417. [2019-11-15 20:14:21,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2417 states. [2019-11-15 20:14:21,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2417 states to 2417 states and 5706 transitions. [2019-11-15 20:14:21,127 INFO L78 Accepts]: Start accepts. Automaton has 2417 states and 5706 transitions. Word has length 93 [2019-11-15 20:14:21,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:21,127 INFO L462 AbstractCegarLoop]: Abstraction has 2417 states and 5706 transitions. [2019-11-15 20:14:21,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:14:21,128 INFO L276 IsEmpty]: Start isEmpty. Operand 2417 states and 5706 transitions. [2019-11-15 20:14:21,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 20:14:21,130 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:21,130 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:21,131 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:21,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:21,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1518438019, now seen corresponding path program 1 times [2019-11-15 20:14:21,131 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:21,132 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1135331814] [2019-11-15 20:14:21,132 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:21,132 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:21,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:21,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:21,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:21,204 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1135331814] [2019-11-15 20:14:21,205 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:21,206 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:14:21,206 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240925771] [2019-11-15 20:14:21,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:14:21,206 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:21,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:14:21,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:14:21,207 INFO L87 Difference]: Start difference. First operand 2417 states and 5706 transitions. Second operand 5 states. [2019-11-15 20:14:21,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:21,405 INFO L93 Difference]: Finished difference Result 2561 states and 6006 transitions. [2019-11-15 20:14:21,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:14:21,405 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2019-11-15 20:14:21,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:21,408 INFO L225 Difference]: With dead ends: 2561 [2019-11-15 20:14:21,408 INFO L226 Difference]: Without dead ends: 2543 [2019-11-15 20:14:21,409 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:14:21,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2543 states. [2019-11-15 20:14:21,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2543 to 2077. [2019-11-15 20:14:21,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2077 states. [2019-11-15 20:14:21,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2077 states to 2077 states and 4904 transitions. [2019-11-15 20:14:21,435 INFO L78 Accepts]: Start accepts. Automaton has 2077 states and 4904 transitions. Word has length 93 [2019-11-15 20:14:21,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:21,436 INFO L462 AbstractCegarLoop]: Abstraction has 2077 states and 4904 transitions. [2019-11-15 20:14:21,436 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:14:21,436 INFO L276 IsEmpty]: Start isEmpty. Operand 2077 states and 4904 transitions. [2019-11-15 20:14:21,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 20:14:21,438 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:21,438 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:21,439 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:21,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:21,439 INFO L82 PathProgramCache]: Analyzing trace with hash -273673538, now seen corresponding path program 1 times [2019-11-15 20:14:21,439 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:21,441 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608853684] [2019-11-15 20:14:21,441 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:21,441 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:21,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:21,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:21,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:21,565 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608853684] [2019-11-15 20:14:21,565 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:21,565 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:14:21,566 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973003923] [2019-11-15 20:14:21,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:14:21,566 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:21,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:14:21,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:14:21,567 INFO L87 Difference]: Start difference. First operand 2077 states and 4904 transitions. Second operand 7 states. [2019-11-15 20:14:21,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:21,655 INFO L93 Difference]: Finished difference Result 3369 states and 8056 transitions. [2019-11-15 20:14:21,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:14:21,655 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2019-11-15 20:14:21,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:21,656 INFO L225 Difference]: With dead ends: 3369 [2019-11-15 20:14:21,656 INFO L226 Difference]: Without dead ends: 1478 [2019-11-15 20:14:21,657 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:14:21,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1478 states. [2019-11-15 20:14:21,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1478 to 1398. [2019-11-15 20:14:21,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1398 states. [2019-11-15 20:14:21,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1398 states to 1398 states and 3347 transitions. [2019-11-15 20:14:21,669 INFO L78 Accepts]: Start accepts. Automaton has 1398 states and 3347 transitions. Word has length 93 [2019-11-15 20:14:21,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:21,669 INFO L462 AbstractCegarLoop]: Abstraction has 1398 states and 3347 transitions. [2019-11-15 20:14:21,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:14:21,669 INFO L276 IsEmpty]: Start isEmpty. Operand 1398 states and 3347 transitions. [2019-11-15 20:14:21,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 20:14:21,670 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:21,670 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:21,670 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:21,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:21,670 INFO L82 PathProgramCache]: Analyzing trace with hash -2053333964, now seen corresponding path program 1 times [2019-11-15 20:14:21,671 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:21,671 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524374666] [2019-11-15 20:14:21,671 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:21,671 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:21,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:21,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:21,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:21,720 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524374666] [2019-11-15 20:14:21,721 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:21,721 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:14:21,721 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980496503] [2019-11-15 20:14:21,721 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:14:21,722 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:21,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:14:21,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:14:21,722 INFO L87 Difference]: Start difference. First operand 1398 states and 3347 transitions. Second operand 5 states. [2019-11-15 20:14:21,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:21,888 INFO L93 Difference]: Finished difference Result 1637 states and 3844 transitions. [2019-11-15 20:14:21,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:14:21,888 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2019-11-15 20:14:21,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:21,890 INFO L225 Difference]: With dead ends: 1637 [2019-11-15 20:14:21,890 INFO L226 Difference]: Without dead ends: 1619 [2019-11-15 20:14:21,890 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:14:21,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1619 states. [2019-11-15 20:14:21,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1619 to 1403. [2019-11-15 20:14:21,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1403 states. [2019-11-15 20:14:21,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1403 states to 1403 states and 3357 transitions. [2019-11-15 20:14:21,909 INFO L78 Accepts]: Start accepts. Automaton has 1403 states and 3357 transitions. Word has length 93 [2019-11-15 20:14:21,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:21,909 INFO L462 AbstractCegarLoop]: Abstraction has 1403 states and 3357 transitions. [2019-11-15 20:14:21,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:14:21,909 INFO L276 IsEmpty]: Start isEmpty. Operand 1403 states and 3357 transitions. [2019-11-15 20:14:21,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 20:14:21,911 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:21,911 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:21,911 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:21,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:21,912 INFO L82 PathProgramCache]: Analyzing trace with hash 540892853, now seen corresponding path program 1 times [2019-11-15 20:14:21,912 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:21,912 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032940606] [2019-11-15 20:14:21,912 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:21,913 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:21,913 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:21,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:21,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:21,990 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032940606] [2019-11-15 20:14:21,991 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:21,991 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:14:21,991 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959263043] [2019-11-15 20:14:21,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:14:21,991 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:21,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:14:21,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:14:21,992 INFO L87 Difference]: Start difference. First operand 1403 states and 3357 transitions. Second operand 6 states. [2019-11-15 20:14:22,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:22,167 INFO L93 Difference]: Finished difference Result 1589 states and 3750 transitions. [2019-11-15 20:14:22,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:14:22,167 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-11-15 20:14:22,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:22,169 INFO L225 Difference]: With dead ends: 1589 [2019-11-15 20:14:22,169 INFO L226 Difference]: Without dead ends: 1589 [2019-11-15 20:14:22,170 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:14:22,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1589 states. [2019-11-15 20:14:22,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1589 to 1379. [2019-11-15 20:14:22,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1379 states. [2019-11-15 20:14:22,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1379 states to 1379 states and 3309 transitions. [2019-11-15 20:14:22,187 INFO L78 Accepts]: Start accepts. Automaton has 1379 states and 3309 transitions. Word has length 93 [2019-11-15 20:14:22,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:22,187 INFO L462 AbstractCegarLoop]: Abstraction has 1379 states and 3309 transitions. [2019-11-15 20:14:22,187 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:14:22,187 INFO L276 IsEmpty]: Start isEmpty. Operand 1379 states and 3309 transitions. [2019-11-15 20:14:22,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 20:14:22,188 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:22,189 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:22,189 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:22,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:22,189 INFO L82 PathProgramCache]: Analyzing trace with hash 1985727126, now seen corresponding path program 2 times [2019-11-15 20:14:22,190 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:22,190 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294875360] [2019-11-15 20:14:22,190 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:22,190 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:22,190 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:22,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:14:22,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:14:22,384 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294875360] [2019-11-15 20:14:22,385 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:14:22,385 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 20:14:22,385 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965741624] [2019-11-15 20:14:22,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 20:14:22,386 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:14:22,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 20:14:22,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:14:22,386 INFO L87 Difference]: Start difference. First operand 1379 states and 3309 transitions. Second operand 12 states. [2019-11-15 20:14:22,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:14:22,601 INFO L93 Difference]: Finished difference Result 2516 states and 6121 transitions. [2019-11-15 20:14:22,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 20:14:22,601 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 93 [2019-11-15 20:14:22,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:14:22,603 INFO L225 Difference]: With dead ends: 2516 [2019-11-15 20:14:22,603 INFO L226 Difference]: Without dead ends: 1877 [2019-11-15 20:14:22,603 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 20:14:22,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1877 states. [2019-11-15 20:14:22,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1877 to 1769. [2019-11-15 20:14:22,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1769 states. [2019-11-15 20:14:22,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1769 states to 1769 states and 4177 transitions. [2019-11-15 20:14:22,617 INFO L78 Accepts]: Start accepts. Automaton has 1769 states and 4177 transitions. Word has length 93 [2019-11-15 20:14:22,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:14:22,618 INFO L462 AbstractCegarLoop]: Abstraction has 1769 states and 4177 transitions. [2019-11-15 20:14:22,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 20:14:22,618 INFO L276 IsEmpty]: Start isEmpty. Operand 1769 states and 4177 transitions. [2019-11-15 20:14:22,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 20:14:22,619 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:14:22,619 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:14:22,619 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:14:22,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:14:22,619 INFO L82 PathProgramCache]: Analyzing trace with hash 83007738, now seen corresponding path program 3 times [2019-11-15 20:14:22,619 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:14:22,619 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872316987] [2019-11-15 20:14:22,620 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:22,620 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:14:22,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:14:22,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:14:22,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:14:22,744 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:14:22,745 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:14:22,891 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 20:14:22,893 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:14:22 BasicIcfg [2019-11-15 20:14:22,893 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:14:22,893 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:14:22,893 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:14:22,893 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:14:22,894 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:13:37" (3/4) ... [2019-11-15 20:14:22,896 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:14:23,070 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_7fae2ae4-fd99-4c00-aa67-270d9d09f086/bin/uautomizer/witness.graphml [2019-11-15 20:14:23,070 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:14:23,072 INFO L168 Benchmark]: Toolchain (without parser) took 47392.69 ms. Allocated memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: 4.0 GB). Free memory was 939.3 MB in the beginning and 2.5 GB in the end (delta: -1.6 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. [2019-11-15 20:14:23,073 INFO L168 Benchmark]: CDTParser took 0.46 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:14:23,073 INFO L168 Benchmark]: CACSL2BoogieTranslator took 647.28 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 163.6 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -188.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-11-15 20:14:23,073 INFO L168 Benchmark]: Boogie Procedure Inliner took 59.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.5 MB). Peak memory consumption was 6.5 MB. Max. memory is 11.5 GB. [2019-11-15 20:14:23,074 INFO L168 Benchmark]: Boogie Preprocessor took 35.80 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:14:23,074 INFO L168 Benchmark]: RCFGBuilder took 646.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 53.3 MB). Peak memory consumption was 53.3 MB. Max. memory is 11.5 GB. [2019-11-15 20:14:23,074 INFO L168 Benchmark]: TraceAbstraction took 45821.34 ms. Allocated memory was 1.2 GB in the beginning and 5.0 GB in the end (delta: 3.8 GB). Free memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. [2019-11-15 20:14:23,075 INFO L168 Benchmark]: Witness Printer took 177.42 ms. Allocated memory is still 5.0 GB. Free memory was 2.5 GB in the beginning and 2.5 GB in the end (delta: 21.3 MB). Peak memory consumption was 21.3 MB. Max. memory is 11.5 GB. [2019-11-15 20:14:23,077 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.46 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 647.28 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 163.6 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -188.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 59.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.5 MB). Peak memory consumption was 6.5 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 35.80 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 646.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 53.3 MB). Peak memory consumption was 53.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 45821.34 ms. Allocated memory was 1.2 GB in the beginning and 5.0 GB in the end (delta: 3.8 GB). Free memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. * Witness Printer took 177.42 ms. Allocated memory is still 5.0 GB. Free memory was 2.5 GB in the beginning and 2.5 GB in the end (delta: 21.3 MB). Peak memory consumption was 21.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L695] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L696] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] 0 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] 0 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L701] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L702] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L703] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L707] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L708] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L709] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L710] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L711] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L712] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L713] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L714] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L776] 0 pthread_t t2481; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] FCALL, FORK 0 pthread_create(&t2481, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 1 y$w_buff1 = y$w_buff0 [L721] 1 y$w_buff0 = 2 [L722] 1 y$w_buff1_used = y$w_buff0_used [L723] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L778] 0 pthread_t t2482; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2482, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L725] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L726] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L727] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L728] 1 y$r_buff0_thd1 = (_Bool)1 [L731] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L748] 2 x = 2 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L735] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L754] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L736] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L737] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L741] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L758] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L761] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L786] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 y$flush_delayed = weak$$choice2 [L795] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L797] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L802] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y = y$flush_delayed ? y$mem_tmp : y [L805] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 174 locations, 3 error locations. Result: UNSAFE, OverallTime: 45.7s, OverallIterations: 36, TraceHistogramMax: 1, AutomataDifference: 22.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9986 SDtfs, 11165 SDslu, 23505 SDs, 0 SdLazy, 11176 SolverSat, 734 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 11.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 400 GetRequests, 107 SyntacticMatches, 20 SemanticMatches, 273 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 2.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76084occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 16.9s AutomataMinimizationTime, 35 MinimizatonAttempts, 157953 StatesRemovedByMinimization, 34 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 2690 NumberOfCodeBlocks, 2690 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 2562 ConstructedInterpolants, 0 QuantifiedInterpolants, 443124 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 35 InterpolantComputations, 35 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...