./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3915ac96bf19657900740412bd5789f6788284da .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 19:44:11,692 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 19:44:11,694 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 19:44:11,708 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 19:44:11,708 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 19:44:11,710 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 19:44:11,712 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 19:44:11,721 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 19:44:11,725 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 19:44:11,729 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 19:44:11,730 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 19:44:11,732 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 19:44:11,732 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 19:44:11,734 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 19:44:11,735 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 19:44:11,736 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 19:44:11,737 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 19:44:11,738 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 19:44:11,740 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 19:44:11,743 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 19:44:11,746 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 19:44:11,748 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 19:44:11,751 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 19:44:11,751 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 19:44:11,754 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 19:44:11,755 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 19:44:11,755 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 19:44:11,757 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 19:44:11,757 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 19:44:11,758 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 19:44:11,758 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 19:44:11,758 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 19:44:11,759 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 19:44:11,759 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 19:44:11,761 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 19:44:11,761 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 19:44:11,762 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 19:44:11,762 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 19:44:11,762 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 19:44:11,763 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 19:44:11,763 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 19:44:11,764 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 19:44:11,788 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 19:44:11,789 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 19:44:11,790 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 19:44:11,790 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 19:44:11,790 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 19:44:11,790 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 19:44:11,790 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 19:44:11,791 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 19:44:11,791 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 19:44:11,791 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 19:44:11,791 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 19:44:11,791 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 19:44:11,792 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 19:44:11,792 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 19:44:11,792 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 19:44:11,792 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 19:44:11,792 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 19:44:11,793 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 19:44:11,793 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 19:44:11,793 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 19:44:11,793 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 19:44:11,793 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 19:44:11,794 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 19:44:11,794 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 19:44:11,794 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 19:44:11,794 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 19:44:11,795 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 19:44:11,795 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 19:44:11,795 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3915ac96bf19657900740412bd5789f6788284da [2019-11-15 19:44:11,839 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 19:44:11,851 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 19:44:11,854 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 19:44:11,855 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 19:44:11,856 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 19:44:11,857 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i [2019-11-15 19:44:11,918 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/data/48feffbe4/e69df93c54874664b2069883b8c29c64/FLAGf9b5be81d [2019-11-15 19:44:12,364 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 19:44:12,364 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i [2019-11-15 19:44:12,382 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/data/48feffbe4/e69df93c54874664b2069883b8c29c64/FLAGf9b5be81d [2019-11-15 19:44:12,758 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/data/48feffbe4/e69df93c54874664b2069883b8c29c64 [2019-11-15 19:44:12,762 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 19:44:12,763 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 19:44:12,764 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 19:44:12,764 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 19:44:12,767 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 19:44:12,768 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 07:44:12" (1/1) ... [2019-11-15 19:44:12,771 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@42ea8cd1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:12, skipping insertion in model container [2019-11-15 19:44:12,771 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 07:44:12" (1/1) ... [2019-11-15 19:44:12,777 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 19:44:12,823 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 19:44:13,345 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 19:44:13,359 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 19:44:13,438 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 19:44:13,538 INFO L192 MainTranslator]: Completed translation [2019-11-15 19:44:13,539 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13 WrapperNode [2019-11-15 19:44:13,539 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 19:44:13,539 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 19:44:13,540 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 19:44:13,540 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 19:44:13,548 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,588 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,636 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 19:44:13,636 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 19:44:13,636 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 19:44:13,636 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 19:44:13,653 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,653 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,666 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,667 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,694 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,708 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,711 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... [2019-11-15 19:44:13,716 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 19:44:13,717 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 19:44:13,717 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 19:44:13,717 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 19:44:13,718 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 19:44:13,782 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 19:44:13,783 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 19:44:13,783 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 19:44:13,783 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 19:44:13,784 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 19:44:13,784 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 19:44:13,785 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 19:44:13,785 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 19:44:13,785 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 19:44:13,785 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 19:44:13,787 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 19:44:13,791 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 19:44:14,457 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 19:44:14,458 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 19:44:14,459 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 07:44:14 BoogieIcfgContainer [2019-11-15 19:44:14,459 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 19:44:14,460 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 19:44:14,460 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 19:44:14,463 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 19:44:14,463 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 07:44:12" (1/3) ... [2019-11-15 19:44:14,464 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@17fd31f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 07:44:14, skipping insertion in model container [2019-11-15 19:44:14,464 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 07:44:13" (2/3) ... [2019-11-15 19:44:14,464 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@17fd31f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 07:44:14, skipping insertion in model container [2019-11-15 19:44:14,465 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 07:44:14" (3/3) ... [2019-11-15 19:44:14,469 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_rmo.opt.i [2019-11-15 19:44:14,515 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,515 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,515 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,516 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,516 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,516 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,516 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,516 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,517 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,517 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,517 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,517 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,518 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,518 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,518 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,518 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,518 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,518 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,521 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,521 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,521 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,521 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,522 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,522 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,522 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,522 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,522 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,523 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,523 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,523 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,523 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,523 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,523 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,524 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,524 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,524 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,524 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,524 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,525 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,525 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,525 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,525 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,525 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,525 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,527 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,527 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,527 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,527 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 19:44:14,538 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 19:44:14,539 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 19:44:14,547 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 19:44:14,560 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 19:44:14,578 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 19:44:14,579 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 19:44:14,579 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 19:44:14,579 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 19:44:14,579 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 19:44:14,579 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 19:44:14,580 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 19:44:14,580 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 19:44:14,600 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 138 places, 176 transitions [2019-11-15 19:44:16,270 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22492 states. [2019-11-15 19:44:16,272 INFO L276 IsEmpty]: Start isEmpty. Operand 22492 states. [2019-11-15 19:44:16,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-15 19:44:16,285 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:16,286 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:16,289 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:16,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:16,293 INFO L82 PathProgramCache]: Analyzing trace with hash 379878024, now seen corresponding path program 1 times [2019-11-15 19:44:16,300 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:16,301 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148900161] [2019-11-15 19:44:16,301 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:16,301 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:16,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:16,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:16,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:16,617 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1148900161] [2019-11-15 19:44:16,618 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:16,618 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:44:16,618 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679687936] [2019-11-15 19:44:16,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:44:16,622 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:16,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:44:16,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:16,638 INFO L87 Difference]: Start difference. First operand 22492 states. Second operand 4 states. [2019-11-15 19:44:17,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:17,186 INFO L93 Difference]: Finished difference Result 23444 states and 91745 transitions. [2019-11-15 19:44:17,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 19:44:17,188 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-11-15 19:44:17,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:17,440 INFO L225 Difference]: With dead ends: 23444 [2019-11-15 19:44:17,440 INFO L226 Difference]: Without dead ends: 21268 [2019-11-15 19:44:17,442 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:17,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21268 states. [2019-11-15 19:44:18,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21268 to 21268. [2019-11-15 19:44:18,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21268 states. [2019-11-15 19:44:18,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21268 states to 21268 states and 83769 transitions. [2019-11-15 19:44:18,616 INFO L78 Accepts]: Start accepts. Automaton has 21268 states and 83769 transitions. Word has length 35 [2019-11-15 19:44:18,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:18,616 INFO L462 AbstractCegarLoop]: Abstraction has 21268 states and 83769 transitions. [2019-11-15 19:44:18,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:44:18,617 INFO L276 IsEmpty]: Start isEmpty. Operand 21268 states and 83769 transitions. [2019-11-15 19:44:18,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-11-15 19:44:18,624 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:18,624 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:18,624 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:18,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:18,625 INFO L82 PathProgramCache]: Analyzing trace with hash -1392166447, now seen corresponding path program 1 times [2019-11-15 19:44:18,625 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:18,625 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31903800] [2019-11-15 19:44:18,625 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:18,625 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:18,625 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:18,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:18,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:18,733 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31903800] [2019-11-15 19:44:18,734 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:18,734 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 19:44:18,734 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1569998029] [2019-11-15 19:44:18,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 19:44:18,735 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:18,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 19:44:18,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:18,736 INFO L87 Difference]: Start difference. First operand 21268 states and 83769 transitions. Second operand 5 states. [2019-11-15 19:44:19,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:19,469 INFO L93 Difference]: Finished difference Result 34702 states and 129061 transitions. [2019-11-15 19:44:19,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 19:44:19,470 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-11-15 19:44:19,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:19,608 INFO L225 Difference]: With dead ends: 34702 [2019-11-15 19:44:19,608 INFO L226 Difference]: Without dead ends: 34558 [2019-11-15 19:44:19,609 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:44:19,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34558 states. [2019-11-15 19:44:20,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34558 to 33058. [2019-11-15 19:44:20,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33058 states. [2019-11-15 19:44:20,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33058 states to 33058 states and 123949 transitions. [2019-11-15 19:44:20,939 INFO L78 Accepts]: Start accepts. Automaton has 33058 states and 123949 transitions. Word has length 42 [2019-11-15 19:44:20,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:20,940 INFO L462 AbstractCegarLoop]: Abstraction has 33058 states and 123949 transitions. [2019-11-15 19:44:20,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 19:44:20,940 INFO L276 IsEmpty]: Start isEmpty. Operand 33058 states and 123949 transitions. [2019-11-15 19:44:20,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-15 19:44:20,947 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:20,947 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:20,947 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:20,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:20,948 INFO L82 PathProgramCache]: Analyzing trace with hash -791986806, now seen corresponding path program 1 times [2019-11-15 19:44:20,948 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:20,948 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110422412] [2019-11-15 19:44:20,948 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:20,949 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:20,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:20,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:21,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:21,083 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [110422412] [2019-11-15 19:44:21,083 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:21,083 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 19:44:21,084 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [858007968] [2019-11-15 19:44:21,084 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 19:44:21,084 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:21,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 19:44:21,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:21,085 INFO L87 Difference]: Start difference. First operand 33058 states and 123949 transitions. Second operand 5 states. [2019-11-15 19:44:21,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:21,987 INFO L93 Difference]: Finished difference Result 40210 states and 148618 transitions. [2019-11-15 19:44:21,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 19:44:21,988 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-15 19:44:21,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:22,114 INFO L225 Difference]: With dead ends: 40210 [2019-11-15 19:44:22,114 INFO L226 Difference]: Without dead ends: 40050 [2019-11-15 19:44:22,115 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:44:22,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40050 states. [2019-11-15 19:44:22,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40050 to 34631. [2019-11-15 19:44:22,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34631 states. [2019-11-15 19:44:22,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34631 states to 34631 states and 129245 transitions. [2019-11-15 19:44:22,964 INFO L78 Accepts]: Start accepts. Automaton has 34631 states and 129245 transitions. Word has length 43 [2019-11-15 19:44:22,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:22,964 INFO L462 AbstractCegarLoop]: Abstraction has 34631 states and 129245 transitions. [2019-11-15 19:44:22,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 19:44:22,965 INFO L276 IsEmpty]: Start isEmpty. Operand 34631 states and 129245 transitions. [2019-11-15 19:44:22,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-11-15 19:44:22,975 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:22,975 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:22,975 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:22,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:22,976 INFO L82 PathProgramCache]: Analyzing trace with hash 944186895, now seen corresponding path program 1 times [2019-11-15 19:44:22,976 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:22,976 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467788100] [2019-11-15 19:44:22,976 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:22,977 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:22,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:22,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:23,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:23,076 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467788100] [2019-11-15 19:44:23,076 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:23,077 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:44:23,077 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577272523] [2019-11-15 19:44:23,077 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:44:23,077 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:23,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:44:23,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:23,078 INFO L87 Difference]: Start difference. First operand 34631 states and 129245 transitions. Second operand 6 states. [2019-11-15 19:44:23,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:23,886 INFO L93 Difference]: Finished difference Result 45659 states and 166139 transitions. [2019-11-15 19:44:23,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 19:44:23,887 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 50 [2019-11-15 19:44:23,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:24,563 INFO L225 Difference]: With dead ends: 45659 [2019-11-15 19:44:24,563 INFO L226 Difference]: Without dead ends: 45515 [2019-11-15 19:44:24,565 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 19:44:24,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45515 states. [2019-11-15 19:44:25,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45515 to 33594. [2019-11-15 19:44:25,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33594 states. [2019-11-15 19:44:25,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33594 states to 33594 states and 125400 transitions. [2019-11-15 19:44:25,228 INFO L78 Accepts]: Start accepts. Automaton has 33594 states and 125400 transitions. Word has length 50 [2019-11-15 19:44:25,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:25,229 INFO L462 AbstractCegarLoop]: Abstraction has 33594 states and 125400 transitions. [2019-11-15 19:44:25,229 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:44:25,229 INFO L276 IsEmpty]: Start isEmpty. Operand 33594 states and 125400 transitions. [2019-11-15 19:44:25,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-15 19:44:25,251 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:25,251 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:25,252 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:25,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:25,252 INFO L82 PathProgramCache]: Analyzing trace with hash 2101076912, now seen corresponding path program 1 times [2019-11-15 19:44:25,252 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:25,253 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136772051] [2019-11-15 19:44:25,253 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:25,253 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:25,253 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:25,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:25,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:25,296 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136772051] [2019-11-15 19:44:25,296 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:25,296 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 19:44:25,297 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [775715335] [2019-11-15 19:44:25,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 19:44:25,297 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:25,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 19:44:25,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:25,297 INFO L87 Difference]: Start difference. First operand 33594 states and 125400 transitions. Second operand 3 states. [2019-11-15 19:44:25,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:25,509 INFO L93 Difference]: Finished difference Result 36895 states and 137091 transitions. [2019-11-15 19:44:25,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 19:44:25,509 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 57 [2019-11-15 19:44:25,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:25,570 INFO L225 Difference]: With dead ends: 36895 [2019-11-15 19:44:25,570 INFO L226 Difference]: Without dead ends: 36895 [2019-11-15 19:44:25,570 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:26,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36895 states. [2019-11-15 19:44:26,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36895 to 36301. [2019-11-15 19:44:26,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36301 states. [2019-11-15 19:44:26,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36301 states to 36301 states and 135069 transitions. [2019-11-15 19:44:26,878 INFO L78 Accepts]: Start accepts. Automaton has 36301 states and 135069 transitions. Word has length 57 [2019-11-15 19:44:26,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:26,878 INFO L462 AbstractCegarLoop]: Abstraction has 36301 states and 135069 transitions. [2019-11-15 19:44:26,878 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 19:44:26,878 INFO L276 IsEmpty]: Start isEmpty. Operand 36301 states and 135069 transitions. [2019-11-15 19:44:26,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-15 19:44:26,900 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:26,900 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:26,900 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:26,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:26,901 INFO L82 PathProgramCache]: Analyzing trace with hash 747767215, now seen corresponding path program 1 times [2019-11-15 19:44:26,901 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:26,901 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214810467] [2019-11-15 19:44:26,901 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:26,901 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:26,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:26,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:26,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:26,986 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [214810467] [2019-11-15 19:44:26,986 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:26,986 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:44:26,986 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187232919] [2019-11-15 19:44:26,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:44:26,987 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:26,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:44:26,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:26,987 INFO L87 Difference]: Start difference. First operand 36301 states and 135069 transitions. Second operand 6 states. [2019-11-15 19:44:27,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:27,595 INFO L93 Difference]: Finished difference Result 49087 states and 178537 transitions. [2019-11-15 19:44:27,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 19:44:27,596 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 57 [2019-11-15 19:44:27,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:27,698 INFO L225 Difference]: With dead ends: 49087 [2019-11-15 19:44:27,699 INFO L226 Difference]: Without dead ends: 48847 [2019-11-15 19:44:27,699 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 19:44:27,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48847 states. [2019-11-15 19:44:28,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48847 to 42913. [2019-11-15 19:44:28,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42913 states. [2019-11-15 19:44:28,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42913 states to 42913 states and 157817 transitions. [2019-11-15 19:44:28,410 INFO L78 Accepts]: Start accepts. Automaton has 42913 states and 157817 transitions. Word has length 57 [2019-11-15 19:44:28,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:28,411 INFO L462 AbstractCegarLoop]: Abstraction has 42913 states and 157817 transitions. [2019-11-15 19:44:28,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:44:28,411 INFO L276 IsEmpty]: Start isEmpty. Operand 42913 states and 157817 transitions. [2019-11-15 19:44:28,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-11-15 19:44:28,443 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:28,443 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:28,444 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:28,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:28,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1861127999, now seen corresponding path program 1 times [2019-11-15 19:44:28,444 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:28,444 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981662824] [2019-11-15 19:44:28,444 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:28,444 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:28,444 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:28,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:28,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:28,524 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981662824] [2019-11-15 19:44:28,524 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:28,524 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 19:44:28,525 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1826187053] [2019-11-15 19:44:28,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 19:44:28,527 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:28,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 19:44:28,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:28,528 INFO L87 Difference]: Start difference. First operand 42913 states and 157817 transitions. Second operand 3 states. [2019-11-15 19:44:29,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:29,486 INFO L93 Difference]: Finished difference Result 53211 states and 192652 transitions. [2019-11-15 19:44:29,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 19:44:29,486 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-11-15 19:44:29,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:29,578 INFO L225 Difference]: With dead ends: 53211 [2019-11-15 19:44:29,578 INFO L226 Difference]: Without dead ends: 53211 [2019-11-15 19:44:29,579 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:29,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53211 states. [2019-11-15 19:44:30,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53211 to 46771. [2019-11-15 19:44:30,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46771 states. [2019-11-15 19:44:30,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46771 states to 46771 states and 171039 transitions. [2019-11-15 19:44:30,350 INFO L78 Accepts]: Start accepts. Automaton has 46771 states and 171039 transitions. Word has length 59 [2019-11-15 19:44:30,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:30,350 INFO L462 AbstractCegarLoop]: Abstraction has 46771 states and 171039 transitions. [2019-11-15 19:44:30,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 19:44:30,351 INFO L276 IsEmpty]: Start isEmpty. Operand 46771 states and 171039 transitions. [2019-11-15 19:44:30,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-11-15 19:44:30,385 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:30,385 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:30,385 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:30,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:30,386 INFO L82 PathProgramCache]: Analyzing trace with hash -1336008671, now seen corresponding path program 1 times [2019-11-15 19:44:30,386 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:30,386 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609776170] [2019-11-15 19:44:30,386 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:30,386 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:30,387 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:30,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:30,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:30,487 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1609776170] [2019-11-15 19:44:30,488 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:30,488 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 19:44:30,488 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725191515] [2019-11-15 19:44:30,490 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 19:44:30,491 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:30,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 19:44:30,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:30,491 INFO L87 Difference]: Start difference. First operand 46771 states and 171039 transitions. Second operand 7 states. [2019-11-15 19:44:31,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:31,522 INFO L93 Difference]: Finished difference Result 58902 states and 211200 transitions. [2019-11-15 19:44:31,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 19:44:31,522 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 63 [2019-11-15 19:44:31,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:31,625 INFO L225 Difference]: With dead ends: 58902 [2019-11-15 19:44:31,625 INFO L226 Difference]: Without dead ends: 58662 [2019-11-15 19:44:31,625 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 19:44:31,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58662 states. [2019-11-15 19:44:35,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58662 to 48069. [2019-11-15 19:44:35,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48069 states. [2019-11-15 19:44:35,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48069 states to 48069 states and 175422 transitions. [2019-11-15 19:44:35,216 INFO L78 Accepts]: Start accepts. Automaton has 48069 states and 175422 transitions. Word has length 63 [2019-11-15 19:44:35,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:35,216 INFO L462 AbstractCegarLoop]: Abstraction has 48069 states and 175422 transitions. [2019-11-15 19:44:35,216 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 19:44:35,216 INFO L276 IsEmpty]: Start isEmpty. Operand 48069 states and 175422 transitions. [2019-11-15 19:44:35,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 19:44:35,243 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:35,243 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:35,243 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:35,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:35,244 INFO L82 PathProgramCache]: Analyzing trace with hash -401202828, now seen corresponding path program 1 times [2019-11-15 19:44:35,244 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:35,244 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605460084] [2019-11-15 19:44:35,244 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:35,244 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:35,244 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:35,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:35,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:35,361 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605460084] [2019-11-15 19:44:35,362 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:35,362 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 19:44:35,362 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051894306] [2019-11-15 19:44:35,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 19:44:35,363 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:35,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 19:44:35,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:35,363 INFO L87 Difference]: Start difference. First operand 48069 states and 175422 transitions. Second operand 7 states. [2019-11-15 19:44:36,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:36,379 INFO L93 Difference]: Finished difference Result 58053 states and 208166 transitions. [2019-11-15 19:44:36,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 19:44:36,380 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-15 19:44:36,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:36,485 INFO L225 Difference]: With dead ends: 58053 [2019-11-15 19:44:36,485 INFO L226 Difference]: Without dead ends: 57853 [2019-11-15 19:44:36,485 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 19:44:36,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57853 states. [2019-11-15 19:44:37,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57853 to 48947. [2019-11-15 19:44:37,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48947 states. [2019-11-15 19:44:37,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48947 states to 48947 states and 178293 transitions. [2019-11-15 19:44:37,308 INFO L78 Accepts]: Start accepts. Automaton has 48947 states and 178293 transitions. Word has length 64 [2019-11-15 19:44:37,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:37,309 INFO L462 AbstractCegarLoop]: Abstraction has 48947 states and 178293 transitions. [2019-11-15 19:44:37,309 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 19:44:37,309 INFO L276 IsEmpty]: Start isEmpty. Operand 48947 states and 178293 transitions. [2019-11-15 19:44:37,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 19:44:37,347 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:37,347 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:37,347 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:37,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:37,348 INFO L82 PathProgramCache]: Analyzing trace with hash -182823054, now seen corresponding path program 1 times [2019-11-15 19:44:37,348 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:37,348 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979921389] [2019-11-15 19:44:37,348 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:37,349 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:37,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:37,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:37,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:37,474 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979921389] [2019-11-15 19:44:37,474 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:37,474 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 19:44:37,475 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801539352] [2019-11-15 19:44:37,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 19:44:37,475 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:37,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 19:44:37,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:37,476 INFO L87 Difference]: Start difference. First operand 48947 states and 178293 transitions. Second operand 7 states. [2019-11-15 19:44:38,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:38,438 INFO L93 Difference]: Finished difference Result 78799 states and 276302 transitions. [2019-11-15 19:44:38,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 19:44:38,438 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 19:44:38,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:38,570 INFO L225 Difference]: With dead ends: 78799 [2019-11-15 19:44:38,570 INFO L226 Difference]: Without dead ends: 78799 [2019-11-15 19:44:38,571 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 19:44:39,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78799 states. [2019-11-15 19:44:40,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78799 to 71293. [2019-11-15 19:44:40,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71293 states. [2019-11-15 19:44:40,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71293 states to 71293 states and 252134 transitions. [2019-11-15 19:44:40,481 INFO L78 Accepts]: Start accepts. Automaton has 71293 states and 252134 transitions. Word has length 66 [2019-11-15 19:44:40,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:40,481 INFO L462 AbstractCegarLoop]: Abstraction has 71293 states and 252134 transitions. [2019-11-15 19:44:40,481 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 19:44:40,481 INFO L276 IsEmpty]: Start isEmpty. Operand 71293 states and 252134 transitions. [2019-11-15 19:44:40,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 19:44:40,545 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:40,545 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:40,545 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:40,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:40,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1061941427, now seen corresponding path program 1 times [2019-11-15 19:44:40,546 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:40,546 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278401630] [2019-11-15 19:44:40,546 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:40,546 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:40,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:40,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:40,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:40,622 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278401630] [2019-11-15 19:44:40,622 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:40,622 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:44:40,622 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479274394] [2019-11-15 19:44:40,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:44:40,622 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:40,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:44:40,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:40,623 INFO L87 Difference]: Start difference. First operand 71293 states and 252134 transitions. Second operand 4 states. [2019-11-15 19:44:40,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:40,693 INFO L93 Difference]: Finished difference Result 15853 states and 50021 transitions. [2019-11-15 19:44:40,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:44:40,694 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-11-15 19:44:40,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:40,712 INFO L225 Difference]: With dead ends: 15853 [2019-11-15 19:44:40,712 INFO L226 Difference]: Without dead ends: 15375 [2019-11-15 19:44:40,713 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:40,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15375 states. [2019-11-15 19:44:40,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15375 to 15363. [2019-11-15 19:44:40,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15363 states. [2019-11-15 19:44:40,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15363 states to 15363 states and 48516 transitions. [2019-11-15 19:44:40,892 INFO L78 Accepts]: Start accepts. Automaton has 15363 states and 48516 transitions. Word has length 66 [2019-11-15 19:44:40,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:40,892 INFO L462 AbstractCegarLoop]: Abstraction has 15363 states and 48516 transitions. [2019-11-15 19:44:40,892 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:44:40,892 INFO L276 IsEmpty]: Start isEmpty. Operand 15363 states and 48516 transitions. [2019-11-15 19:44:40,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 19:44:40,902 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:40,902 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:40,903 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:40,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:40,903 INFO L82 PathProgramCache]: Analyzing trace with hash 300629220, now seen corresponding path program 1 times [2019-11-15 19:44:40,903 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:40,904 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210521157] [2019-11-15 19:44:40,904 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:40,904 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:40,904 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:40,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:40,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:40,966 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210521157] [2019-11-15 19:44:40,966 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:40,966 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:44:40,966 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677488457] [2019-11-15 19:44:40,966 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:44:40,966 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:40,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:44:40,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:40,967 INFO L87 Difference]: Start difference. First operand 15363 states and 48516 transitions. Second operand 4 states. [2019-11-15 19:44:41,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:41,216 INFO L93 Difference]: Finished difference Result 20070 states and 62647 transitions. [2019-11-15 19:44:41,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:44:41,216 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2019-11-15 19:44:41,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:41,241 INFO L225 Difference]: With dead ends: 20070 [2019-11-15 19:44:41,241 INFO L226 Difference]: Without dead ends: 20070 [2019-11-15 19:44:41,241 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:41,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20070 states. [2019-11-15 19:44:41,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20070 to 16200. [2019-11-15 19:44:41,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16200 states. [2019-11-15 19:44:41,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16200 states to 16200 states and 50965 transitions. [2019-11-15 19:44:41,447 INFO L78 Accepts]: Start accepts. Automaton has 16200 states and 50965 transitions. Word has length 76 [2019-11-15 19:44:41,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:41,448 INFO L462 AbstractCegarLoop]: Abstraction has 16200 states and 50965 transitions. [2019-11-15 19:44:41,448 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:44:41,448 INFO L276 IsEmpty]: Start isEmpty. Operand 16200 states and 50965 transitions. [2019-11-15 19:44:41,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 19:44:41,458 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:41,458 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:41,458 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:41,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:41,458 INFO L82 PathProgramCache]: Analyzing trace with hash 1290657156, now seen corresponding path program 1 times [2019-11-15 19:44:41,458 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:41,458 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357337976] [2019-11-15 19:44:41,458 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:41,459 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:41,459 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:41,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:41,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:41,553 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [357337976] [2019-11-15 19:44:41,553 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:41,553 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 19:44:41,554 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1720914739] [2019-11-15 19:44:41,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 19:44:41,554 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:41,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 19:44:41,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:44:41,555 INFO L87 Difference]: Start difference. First operand 16200 states and 50965 transitions. Second operand 8 states. [2019-11-15 19:44:42,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:42,578 INFO L93 Difference]: Finished difference Result 18348 states and 57194 transitions. [2019-11-15 19:44:42,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 19:44:42,579 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 76 [2019-11-15 19:44:42,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:42,607 INFO L225 Difference]: With dead ends: 18348 [2019-11-15 19:44:42,607 INFO L226 Difference]: Without dead ends: 18300 [2019-11-15 19:44:42,607 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-15 19:44:42,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18300 states. [2019-11-15 19:44:42,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18300 to 14079. [2019-11-15 19:44:42,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14079 states. [2019-11-15 19:44:42,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14079 states to 14079 states and 44586 transitions. [2019-11-15 19:44:42,796 INFO L78 Accepts]: Start accepts. Automaton has 14079 states and 44586 transitions. Word has length 76 [2019-11-15 19:44:42,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:42,796 INFO L462 AbstractCegarLoop]: Abstraction has 14079 states and 44586 transitions. [2019-11-15 19:44:42,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 19:44:42,796 INFO L276 IsEmpty]: Start isEmpty. Operand 14079 states and 44586 transitions. [2019-11-15 19:44:42,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-15 19:44:42,805 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:42,806 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:42,806 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:42,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:42,806 INFO L82 PathProgramCache]: Analyzing trace with hash -91760962, now seen corresponding path program 1 times [2019-11-15 19:44:42,806 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:42,806 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832460224] [2019-11-15 19:44:42,806 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:42,806 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:42,806 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:42,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:42,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:42,847 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832460224] [2019-11-15 19:44:42,847 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:42,847 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 19:44:42,848 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649924163] [2019-11-15 19:44:42,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 19:44:42,848 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:42,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 19:44:42,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:42,849 INFO L87 Difference]: Start difference. First operand 14079 states and 44586 transitions. Second operand 3 states. [2019-11-15 19:44:43,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:43,099 INFO L93 Difference]: Finished difference Result 15115 states and 47655 transitions. [2019-11-15 19:44:43,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 19:44:43,100 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 77 [2019-11-15 19:44:43,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:43,125 INFO L225 Difference]: With dead ends: 15115 [2019-11-15 19:44:43,125 INFO L226 Difference]: Without dead ends: 15115 [2019-11-15 19:44:43,126 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:43,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15115 states. [2019-11-15 19:44:43,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15115 to 14581. [2019-11-15 19:44:43,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14581 states. [2019-11-15 19:44:43,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14581 states to 14581 states and 46078 transitions. [2019-11-15 19:44:43,815 INFO L78 Accepts]: Start accepts. Automaton has 14581 states and 46078 transitions. Word has length 77 [2019-11-15 19:44:43,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:43,815 INFO L462 AbstractCegarLoop]: Abstraction has 14581 states and 46078 transitions. [2019-11-15 19:44:43,816 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 19:44:43,816 INFO L276 IsEmpty]: Start isEmpty. Operand 14581 states and 46078 transitions. [2019-11-15 19:44:43,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 19:44:43,831 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:43,831 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:43,832 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:43,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:43,832 INFO L82 PathProgramCache]: Analyzing trace with hash 2098836392, now seen corresponding path program 1 times [2019-11-15 19:44:43,832 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:43,832 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345592955] [2019-11-15 19:44:43,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:43,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:43,833 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:43,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:43,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:43,884 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1345592955] [2019-11-15 19:44:43,884 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:43,884 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:44:43,884 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [892174211] [2019-11-15 19:44:43,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:44:43,885 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:43,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:44:43,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:43,885 INFO L87 Difference]: Start difference. First operand 14581 states and 46078 transitions. Second operand 4 states. [2019-11-15 19:44:44,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:44,156 INFO L93 Difference]: Finished difference Result 17952 states and 55817 transitions. [2019-11-15 19:44:44,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 19:44:44,156 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-11-15 19:44:44,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:44,178 INFO L225 Difference]: With dead ends: 17952 [2019-11-15 19:44:44,178 INFO L226 Difference]: Without dead ends: 17952 [2019-11-15 19:44:44,178 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:44,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17952 states. [2019-11-15 19:44:44,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17952 to 16884. [2019-11-15 19:44:44,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16884 states. [2019-11-15 19:44:44,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16884 states to 16884 states and 52804 transitions. [2019-11-15 19:44:44,380 INFO L78 Accepts]: Start accepts. Automaton has 16884 states and 52804 transitions. Word has length 78 [2019-11-15 19:44:44,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:44,381 INFO L462 AbstractCegarLoop]: Abstraction has 16884 states and 52804 transitions. [2019-11-15 19:44:44,381 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:44:44,381 INFO L276 IsEmpty]: Start isEmpty. Operand 16884 states and 52804 transitions. [2019-11-15 19:44:44,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 19:44:44,393 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:44,393 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:44,394 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:44,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:44,394 INFO L82 PathProgramCache]: Analyzing trace with hash 163176105, now seen corresponding path program 1 times [2019-11-15 19:44:44,394 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:44,394 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855956820] [2019-11-15 19:44:44,394 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:44,394 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:44,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:44,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:44,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:44,436 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855956820] [2019-11-15 19:44:44,436 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:44,436 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 19:44:44,436 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034641159] [2019-11-15 19:44:44,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 19:44:44,437 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:44,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 19:44:44,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:44,437 INFO L87 Difference]: Start difference. First operand 16884 states and 52804 transitions. Second operand 3 states. [2019-11-15 19:44:44,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:44,670 INFO L93 Difference]: Finished difference Result 17987 states and 56059 transitions. [2019-11-15 19:44:44,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 19:44:44,670 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-11-15 19:44:44,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:44,691 INFO L225 Difference]: With dead ends: 17987 [2019-11-15 19:44:44,691 INFO L226 Difference]: Without dead ends: 17987 [2019-11-15 19:44:44,691 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:44,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17987 states. [2019-11-15 19:44:44,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17987 to 17442. [2019-11-15 19:44:44,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17442 states. [2019-11-15 19:44:44,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17442 states to 17442 states and 54446 transitions. [2019-11-15 19:44:44,904 INFO L78 Accepts]: Start accepts. Automaton has 17442 states and 54446 transitions. Word has length 78 [2019-11-15 19:44:44,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:44,905 INFO L462 AbstractCegarLoop]: Abstraction has 17442 states and 54446 transitions. [2019-11-15 19:44:44,905 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 19:44:44,905 INFO L276 IsEmpty]: Start isEmpty. Operand 17442 states and 54446 transitions. [2019-11-15 19:44:44,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 19:44:44,923 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:44,924 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:44,924 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:44,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:44,924 INFO L82 PathProgramCache]: Analyzing trace with hash 427843535, now seen corresponding path program 1 times [2019-11-15 19:44:44,925 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:44,925 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551374157] [2019-11-15 19:44:44,925 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:44,925 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:44,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:44,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:44,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:44,982 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1551374157] [2019-11-15 19:44:44,982 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:44,982 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:44:44,982 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1789837127] [2019-11-15 19:44:44,982 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:44:44,983 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:44,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:44:44,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:44,983 INFO L87 Difference]: Start difference. First operand 17442 states and 54446 transitions. Second operand 4 states. [2019-11-15 19:44:45,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:45,492 INFO L93 Difference]: Finished difference Result 23252 states and 71542 transitions. [2019-11-15 19:44:45,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:44:45,493 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 19:44:45,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:45,520 INFO L225 Difference]: With dead ends: 23252 [2019-11-15 19:44:45,520 INFO L226 Difference]: Without dead ends: 23252 [2019-11-15 19:44:45,520 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:45,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23252 states. [2019-11-15 19:44:45,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23252 to 21138. [2019-11-15 19:44:45,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21138 states. [2019-11-15 19:44:45,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21138 states to 21138 states and 65488 transitions. [2019-11-15 19:44:45,774 INFO L78 Accepts]: Start accepts. Automaton has 21138 states and 65488 transitions. Word has length 79 [2019-11-15 19:44:45,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:45,775 INFO L462 AbstractCegarLoop]: Abstraction has 21138 states and 65488 transitions. [2019-11-15 19:44:45,775 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:44:45,775 INFO L276 IsEmpty]: Start isEmpty. Operand 21138 states and 65488 transitions. [2019-11-15 19:44:45,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 19:44:45,790 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:45,791 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:45,791 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:45,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:45,791 INFO L82 PathProgramCache]: Analyzing trace with hash -884545204, now seen corresponding path program 1 times [2019-11-15 19:44:45,791 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:45,791 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235818833] [2019-11-15 19:44:45,791 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:45,791 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:45,792 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:45,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:45,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:45,869 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1235818833] [2019-11-15 19:44:45,870 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:45,870 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 19:44:45,870 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [599611607] [2019-11-15 19:44:45,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 19:44:45,871 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:45,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 19:44:45,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:45,872 INFO L87 Difference]: Start difference. First operand 21138 states and 65488 transitions. Second operand 7 states. [2019-11-15 19:44:46,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:46,791 INFO L93 Difference]: Finished difference Result 34601 states and 104712 transitions. [2019-11-15 19:44:46,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 19:44:46,792 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 79 [2019-11-15 19:44:46,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:46,834 INFO L225 Difference]: With dead ends: 34601 [2019-11-15 19:44:46,834 INFO L226 Difference]: Without dead ends: 34601 [2019-11-15 19:44:46,834 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=169, Unknown=0, NotChecked=0, Total=240 [2019-11-15 19:44:46,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34601 states. [2019-11-15 19:44:47,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34601 to 21744. [2019-11-15 19:44:47,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21744 states. [2019-11-15 19:44:47,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21744 states to 21744 states and 66465 transitions. [2019-11-15 19:44:47,149 INFO L78 Accepts]: Start accepts. Automaton has 21744 states and 66465 transitions. Word has length 79 [2019-11-15 19:44:47,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:47,149 INFO L462 AbstractCegarLoop]: Abstraction has 21744 states and 66465 transitions. [2019-11-15 19:44:47,149 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 19:44:47,149 INFO L276 IsEmpty]: Start isEmpty. Operand 21744 states and 66465 transitions. [2019-11-15 19:44:47,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 19:44:47,165 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:47,165 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:47,165 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:47,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:47,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1889423534, now seen corresponding path program 1 times [2019-11-15 19:44:47,165 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:47,166 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572273848] [2019-11-15 19:44:47,166 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:47,166 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:47,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:47,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:47,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:47,260 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [572273848] [2019-11-15 19:44:47,261 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:47,261 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:44:47,261 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [138208600] [2019-11-15 19:44:47,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:44:47,261 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:47,262 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:44:47,262 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:47,262 INFO L87 Difference]: Start difference. First operand 21744 states and 66465 transitions. Second operand 6 states. [2019-11-15 19:44:47,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:47,716 INFO L93 Difference]: Finished difference Result 22014 states and 67109 transitions. [2019-11-15 19:44:47,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 19:44:47,716 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 79 [2019-11-15 19:44:47,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:47,749 INFO L225 Difference]: With dead ends: 22014 [2019-11-15 19:44:47,750 INFO L226 Difference]: Without dead ends: 22014 [2019-11-15 19:44:47,750 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 19:44:47,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22014 states. [2019-11-15 19:44:47,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22014 to 21268. [2019-11-15 19:44:47,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21268 states. [2019-11-15 19:44:47,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21268 states to 21268 states and 65098 transitions. [2019-11-15 19:44:47,993 INFO L78 Accepts]: Start accepts. Automaton has 21268 states and 65098 transitions. Word has length 79 [2019-11-15 19:44:47,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:47,993 INFO L462 AbstractCegarLoop]: Abstraction has 21268 states and 65098 transitions. [2019-11-15 19:44:47,993 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:44:47,993 INFO L276 IsEmpty]: Start isEmpty. Operand 21268 states and 65098 transitions. [2019-11-15 19:44:48,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 19:44:48,009 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:48,009 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:48,009 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:48,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:48,009 INFO L82 PathProgramCache]: Analyzing trace with hash -455243507, now seen corresponding path program 1 times [2019-11-15 19:44:48,009 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:48,009 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140551685] [2019-11-15 19:44:48,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:48,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:48,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:48,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:48,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:48,059 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140551685] [2019-11-15 19:44:48,059 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:48,059 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 19:44:48,059 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1571284442] [2019-11-15 19:44:48,060 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 19:44:48,060 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:48,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 19:44:48,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:48,060 INFO L87 Difference]: Start difference. First operand 21268 states and 65098 transitions. Second operand 3 states. [2019-11-15 19:44:48,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:48,195 INFO L93 Difference]: Finished difference Result 18193 states and 55053 transitions. [2019-11-15 19:44:48,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 19:44:48,195 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 19:44:48,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:48,224 INFO L225 Difference]: With dead ends: 18193 [2019-11-15 19:44:48,224 INFO L226 Difference]: Without dead ends: 18193 [2019-11-15 19:44:48,224 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 19:44:48,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18193 states. [2019-11-15 19:44:48,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18193 to 16116. [2019-11-15 19:44:48,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16116 states. [2019-11-15 19:44:48,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16116 states to 16116 states and 49132 transitions. [2019-11-15 19:44:48,454 INFO L78 Accepts]: Start accepts. Automaton has 16116 states and 49132 transitions. Word has length 79 [2019-11-15 19:44:48,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:48,455 INFO L462 AbstractCegarLoop]: Abstraction has 16116 states and 49132 transitions. [2019-11-15 19:44:48,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 19:44:48,455 INFO L276 IsEmpty]: Start isEmpty. Operand 16116 states and 49132 transitions. [2019-11-15 19:44:48,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 19:44:48,464 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:48,465 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:48,465 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:48,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:48,465 INFO L82 PathProgramCache]: Analyzing trace with hash -1363211691, now seen corresponding path program 1 times [2019-11-15 19:44:48,465 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:48,465 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494163218] [2019-11-15 19:44:48,465 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:48,466 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:48,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:48,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:48,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:48,554 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [494163218] [2019-11-15 19:44:48,554 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:48,554 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:44:48,555 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812042120] [2019-11-15 19:44:48,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:44:48,555 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:48,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:44:48,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:48,556 INFO L87 Difference]: Start difference. First operand 16116 states and 49132 transitions. Second operand 6 states. [2019-11-15 19:44:49,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:49,176 INFO L93 Difference]: Finished difference Result 29957 states and 90109 transitions. [2019-11-15 19:44:49,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 19:44:49,177 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 19:44:49,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:49,214 INFO L225 Difference]: With dead ends: 29957 [2019-11-15 19:44:49,214 INFO L226 Difference]: Without dead ends: 29699 [2019-11-15 19:44:49,214 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=76, Unknown=0, NotChecked=0, Total=110 [2019-11-15 19:44:49,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29699 states. [2019-11-15 19:44:49,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29699 to 24938. [2019-11-15 19:44:49,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24938 states. [2019-11-15 19:44:49,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24938 states to 24938 states and 75885 transitions. [2019-11-15 19:44:49,556 INFO L78 Accepts]: Start accepts. Automaton has 24938 states and 75885 transitions. Word has length 80 [2019-11-15 19:44:49,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:49,556 INFO L462 AbstractCegarLoop]: Abstraction has 24938 states and 75885 transitions. [2019-11-15 19:44:49,556 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:44:49,556 INFO L276 IsEmpty]: Start isEmpty. Operand 24938 states and 75885 transitions. [2019-11-15 19:44:49,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 19:44:49,573 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:49,573 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:49,574 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:49,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:49,574 INFO L82 PathProgramCache]: Analyzing trace with hash -118447210, now seen corresponding path program 1 times [2019-11-15 19:44:49,574 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:49,574 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213587946] [2019-11-15 19:44:49,575 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:49,575 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:49,575 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:49,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:49,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:49,636 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213587946] [2019-11-15 19:44:49,637 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:49,637 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 19:44:49,637 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1244269756] [2019-11-15 19:44:49,637 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 19:44:49,638 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:49,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 19:44:49,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:49,638 INFO L87 Difference]: Start difference. First operand 24938 states and 75885 transitions. Second operand 5 states. [2019-11-15 19:44:49,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:49,688 INFO L93 Difference]: Finished difference Result 3230 states and 7878 transitions. [2019-11-15 19:44:49,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 19:44:49,689 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-11-15 19:44:49,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:49,692 INFO L225 Difference]: With dead ends: 3230 [2019-11-15 19:44:49,692 INFO L226 Difference]: Without dead ends: 2808 [2019-11-15 19:44:49,692 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:49,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2808 states. [2019-11-15 19:44:49,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2808 to 2723. [2019-11-15 19:44:49,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2723 states. [2019-11-15 19:44:49,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2723 states to 2723 states and 6581 transitions. [2019-11-15 19:44:49,724 INFO L78 Accepts]: Start accepts. Automaton has 2723 states and 6581 transitions. Word has length 80 [2019-11-15 19:44:49,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:49,724 INFO L462 AbstractCegarLoop]: Abstraction has 2723 states and 6581 transitions. [2019-11-15 19:44:49,725 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 19:44:49,725 INFO L276 IsEmpty]: Start isEmpty. Operand 2723 states and 6581 transitions. [2019-11-15 19:44:49,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:49,727 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:49,728 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:49,728 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:49,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:49,728 INFO L82 PathProgramCache]: Analyzing trace with hash 1369448498, now seen corresponding path program 1 times [2019-11-15 19:44:49,728 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:49,728 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311922778] [2019-11-15 19:44:49,728 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:49,729 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:49,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:49,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:49,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:49,838 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311922778] [2019-11-15 19:44:49,838 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:49,839 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:44:49,839 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1085473050] [2019-11-15 19:44:49,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:44:49,841 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:49,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:44:49,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:49,842 INFO L87 Difference]: Start difference. First operand 2723 states and 6581 transitions. Second operand 6 states. [2019-11-15 19:44:49,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:49,957 INFO L93 Difference]: Finished difference Result 2965 states and 7040 transitions. [2019-11-15 19:44:49,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 19:44:49,958 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-11-15 19:44:49,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:49,960 INFO L225 Difference]: With dead ends: 2965 [2019-11-15 19:44:49,960 INFO L226 Difference]: Without dead ends: 2937 [2019-11-15 19:44:49,960 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:49,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2937 states. [2019-11-15 19:44:49,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2937 to 2759. [2019-11-15 19:44:49,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2759 states. [2019-11-15 19:44:49,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2759 states to 2759 states and 6610 transitions. [2019-11-15 19:44:49,983 INFO L78 Accepts]: Start accepts. Automaton has 2759 states and 6610 transitions. Word has length 93 [2019-11-15 19:44:49,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:49,983 INFO L462 AbstractCegarLoop]: Abstraction has 2759 states and 6610 transitions. [2019-11-15 19:44:49,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:44:49,983 INFO L276 IsEmpty]: Start isEmpty. Operand 2759 states and 6610 transitions. [2019-11-15 19:44:49,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:49,985 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:49,986 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:49,986 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:49,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:49,986 INFO L82 PathProgramCache]: Analyzing trace with hash -566211789, now seen corresponding path program 1 times [2019-11-15 19:44:49,986 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:49,986 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495944937] [2019-11-15 19:44:49,987 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:49,987 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:49,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:50,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:50,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:50,106 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495944937] [2019-11-15 19:44:50,106 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:50,106 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:44:50,106 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358204067] [2019-11-15 19:44:50,107 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:44:50,107 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:50,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:44:50,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:50,108 INFO L87 Difference]: Start difference. First operand 2759 states and 6610 transitions. Second operand 6 states. [2019-11-15 19:44:50,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:50,316 INFO L93 Difference]: Finished difference Result 3115 states and 7308 transitions. [2019-11-15 19:44:50,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 19:44:50,316 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-11-15 19:44:50,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:50,319 INFO L225 Difference]: With dead ends: 3115 [2019-11-15 19:44:50,319 INFO L226 Difference]: Without dead ends: 3115 [2019-11-15 19:44:50,319 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 19:44:50,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3115 states. [2019-11-15 19:44:50,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3115 to 2853. [2019-11-15 19:44:50,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2853 states. [2019-11-15 19:44:50,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2853 states to 2853 states and 6787 transitions. [2019-11-15 19:44:50,354 INFO L78 Accepts]: Start accepts. Automaton has 2853 states and 6787 transitions. Word has length 93 [2019-11-15 19:44:50,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:50,354 INFO L462 AbstractCegarLoop]: Abstraction has 2853 states and 6787 transitions. [2019-11-15 19:44:50,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:44:50,354 INFO L276 IsEmpty]: Start isEmpty. Operand 2853 states and 6787 transitions. [2019-11-15 19:44:50,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:50,362 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:50,362 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:50,362 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:50,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:50,363 INFO L82 PathProgramCache]: Analyzing trace with hash -236446028, now seen corresponding path program 1 times [2019-11-15 19:44:50,363 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:50,363 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [734240603] [2019-11-15 19:44:50,363 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:50,364 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:50,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:50,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:50,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:50,436 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [734240603] [2019-11-15 19:44:50,437 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:50,437 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:44:50,437 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1095551465] [2019-11-15 19:44:50,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:44:50,438 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:50,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:44:50,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:50,438 INFO L87 Difference]: Start difference. First operand 2853 states and 6787 transitions. Second operand 4 states. [2019-11-15 19:44:50,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:50,530 INFO L93 Difference]: Finished difference Result 2763 states and 6541 transitions. [2019-11-15 19:44:50,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:44:50,531 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2019-11-15 19:44:50,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:50,534 INFO L225 Difference]: With dead ends: 2763 [2019-11-15 19:44:50,534 INFO L226 Difference]: Without dead ends: 2763 [2019-11-15 19:44:50,534 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:50,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2763 states. [2019-11-15 19:44:50,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2763 to 2708. [2019-11-15 19:44:50,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2708 states. [2019-11-15 19:44:50,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2708 states to 2708 states and 6424 transitions. [2019-11-15 19:44:50,589 INFO L78 Accepts]: Start accepts. Automaton has 2708 states and 6424 transitions. Word has length 93 [2019-11-15 19:44:50,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:50,589 INFO L462 AbstractCegarLoop]: Abstraction has 2708 states and 6424 transitions. [2019-11-15 19:44:50,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:44:50,590 INFO L276 IsEmpty]: Start isEmpty. Operand 2708 states and 6424 transitions. [2019-11-15 19:44:50,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:50,593 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:50,593 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:50,593 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:50,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:50,594 INFO L82 PathProgramCache]: Analyzing trace with hash 1765266963, now seen corresponding path program 1 times [2019-11-15 19:44:50,594 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:50,594 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818794314] [2019-11-15 19:44:50,594 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:50,594 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:50,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:50,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:50,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:50,682 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818794314] [2019-11-15 19:44:50,682 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:50,682 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 19:44:50,683 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [502457484] [2019-11-15 19:44:50,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 19:44:50,683 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:50,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 19:44:50,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:50,684 INFO L87 Difference]: Start difference. First operand 2708 states and 6424 transitions. Second operand 5 states. [2019-11-15 19:44:50,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:50,883 INFO L93 Difference]: Finished difference Result 3221 states and 7648 transitions. [2019-11-15 19:44:50,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 19:44:50,884 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2019-11-15 19:44:50,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:50,887 INFO L225 Difference]: With dead ends: 3221 [2019-11-15 19:44:50,887 INFO L226 Difference]: Without dead ends: 3203 [2019-11-15 19:44:50,887 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:50,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3203 states. [2019-11-15 19:44:50,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3203 to 2734. [2019-11-15 19:44:50,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2734 states. [2019-11-15 19:44:50,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2734 states to 2734 states and 6540 transitions. [2019-11-15 19:44:50,924 INFO L78 Accepts]: Start accepts. Automaton has 2734 states and 6540 transitions. Word has length 93 [2019-11-15 19:44:50,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:50,924 INFO L462 AbstractCegarLoop]: Abstraction has 2734 states and 6540 transitions. [2019-11-15 19:44:50,924 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 19:44:50,924 INFO L276 IsEmpty]: Start isEmpty. Operand 2734 states and 6540 transitions. [2019-11-15 19:44:50,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:50,927 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:50,927 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:50,928 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:50,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:50,928 INFO L82 PathProgramCache]: Analyzing trace with hash -1284935852, now seen corresponding path program 1 times [2019-11-15 19:44:50,928 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:50,928 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468021419] [2019-11-15 19:44:50,929 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:50,929 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:50,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:50,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:51,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:51,050 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468021419] [2019-11-15 19:44:51,050 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:51,050 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 19:44:51,050 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143545428] [2019-11-15 19:44:51,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 19:44:51,051 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:51,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 19:44:51,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:51,051 INFO L87 Difference]: Start difference. First operand 2734 states and 6540 transitions. Second operand 7 states. [2019-11-15 19:44:51,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:51,140 INFO L93 Difference]: Finished difference Result 4732 states and 11427 transitions. [2019-11-15 19:44:51,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 19:44:51,140 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2019-11-15 19:44:51,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:51,143 INFO L225 Difference]: With dead ends: 4732 [2019-11-15 19:44:51,143 INFO L226 Difference]: Without dead ends: 2076 [2019-11-15 19:44:51,143 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-11-15 19:44:51,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2076 states. [2019-11-15 19:44:51,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2076 to 1974. [2019-11-15 19:44:51,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1974 states. [2019-11-15 19:44:51,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1974 states to 1974 states and 4799 transitions. [2019-11-15 19:44:51,167 INFO L78 Accepts]: Start accepts. Automaton has 1974 states and 4799 transitions. Word has length 93 [2019-11-15 19:44:51,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:51,167 INFO L462 AbstractCegarLoop]: Abstraction has 1974 states and 4799 transitions. [2019-11-15 19:44:51,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 19:44:51,168 INFO L276 IsEmpty]: Start isEmpty. Operand 1974 states and 4799 transitions. [2019-11-15 19:44:51,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:51,170 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:51,170 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:51,170 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:51,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:51,171 INFO L82 PathProgramCache]: Analyzing trace with hash -1227114648, now seen corresponding path program 1 times [2019-11-15 19:44:51,171 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:51,171 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263699766] [2019-11-15 19:44:51,172 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:51,172 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:51,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:51,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:51,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:51,221 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1263699766] [2019-11-15 19:44:51,221 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:51,221 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 19:44:51,221 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315133090] [2019-11-15 19:44:51,222 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 19:44:51,222 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:51,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 19:44:51,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 19:44:51,223 INFO L87 Difference]: Start difference. First operand 1974 states and 4799 transitions. Second operand 4 states. [2019-11-15 19:44:51,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:51,253 INFO L93 Difference]: Finished difference Result 1397 states and 3331 transitions. [2019-11-15 19:44:51,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:44:51,253 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2019-11-15 19:44:51,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:51,255 INFO L225 Difference]: With dead ends: 1397 [2019-11-15 19:44:51,255 INFO L226 Difference]: Without dead ends: 1397 [2019-11-15 19:44:51,255 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:51,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1397 states. [2019-11-15 19:44:51,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1397 to 1344. [2019-11-15 19:44:51,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1344 states. [2019-11-15 19:44:51,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1344 states to 1344 states and 3228 transitions. [2019-11-15 19:44:51,272 INFO L78 Accepts]: Start accepts. Automaton has 1344 states and 3228 transitions. Word has length 93 [2019-11-15 19:44:51,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:51,272 INFO L462 AbstractCegarLoop]: Abstraction has 1344 states and 3228 transitions. [2019-11-15 19:44:51,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 19:44:51,272 INFO L276 IsEmpty]: Start isEmpty. Operand 1344 states and 3228 transitions. [2019-11-15 19:44:51,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:51,274 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:51,274 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:51,274 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:51,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:51,275 INFO L82 PathProgramCache]: Analyzing trace with hash -1343581530, now seen corresponding path program 1 times [2019-11-15 19:44:51,275 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:51,275 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [368327468] [2019-11-15 19:44:51,275 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:51,275 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:51,276 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:51,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:51,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:51,330 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [368327468] [2019-11-15 19:44:51,330 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:51,330 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 19:44:51,331 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1361840688] [2019-11-15 19:44:51,331 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 19:44:51,331 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:51,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 19:44:51,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 19:44:51,332 INFO L87 Difference]: Start difference. First operand 1344 states and 3228 transitions. Second operand 5 states. [2019-11-15 19:44:51,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:51,489 INFO L93 Difference]: Finished difference Result 1609 states and 3780 transitions. [2019-11-15 19:44:51,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 19:44:51,490 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2019-11-15 19:44:51,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:51,491 INFO L225 Difference]: With dead ends: 1609 [2019-11-15 19:44:51,492 INFO L226 Difference]: Without dead ends: 1591 [2019-11-15 19:44:51,492 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:51,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1591 states. [2019-11-15 19:44:51,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1591 to 1361. [2019-11-15 19:44:51,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1361 states. [2019-11-15 19:44:51,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1361 states to 1361 states and 3262 transitions. [2019-11-15 19:44:51,510 INFO L78 Accepts]: Start accepts. Automaton has 1361 states and 3262 transitions. Word has length 93 [2019-11-15 19:44:51,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:51,510 INFO L462 AbstractCegarLoop]: Abstraction has 1361 states and 3262 transitions. [2019-11-15 19:44:51,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 19:44:51,511 INFO L276 IsEmpty]: Start isEmpty. Operand 1361 states and 3262 transitions. [2019-11-15 19:44:51,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:51,512 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:51,512 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:51,513 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:51,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:51,513 INFO L82 PathProgramCache]: Analyzing trace with hash 801948648, now seen corresponding path program 1 times [2019-11-15 19:44:51,513 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:51,513 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92745662] [2019-11-15 19:44:51,513 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:51,514 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:51,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:51,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:51,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:51,616 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92745662] [2019-11-15 19:44:51,616 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:51,617 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:44:51,617 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1487930040] [2019-11-15 19:44:51,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:44:51,617 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:51,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:44:51,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:51,618 INFO L87 Difference]: Start difference. First operand 1361 states and 3262 transitions. Second operand 6 states. [2019-11-15 19:44:51,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:51,855 INFO L93 Difference]: Finished difference Result 1431 states and 3383 transitions. [2019-11-15 19:44:51,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 19:44:51,856 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-11-15 19:44:51,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:51,857 INFO L225 Difference]: With dead ends: 1431 [2019-11-15 19:44:51,857 INFO L226 Difference]: Without dead ends: 1431 [2019-11-15 19:44:51,858 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-11-15 19:44:51,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1431 states. [2019-11-15 19:44:51,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1431 to 1396. [2019-11-15 19:44:51,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1396 states. [2019-11-15 19:44:51,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1396 states to 1396 states and 3321 transitions. [2019-11-15 19:44:51,875 INFO L78 Accepts]: Start accepts. Automaton has 1396 states and 3321 transitions. Word has length 93 [2019-11-15 19:44:51,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:51,875 INFO L462 AbstractCegarLoop]: Abstraction has 1396 states and 3321 transitions. [2019-11-15 19:44:51,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:44:51,876 INFO L276 IsEmpty]: Start isEmpty. Operand 1396 states and 3321 transitions. [2019-11-15 19:44:51,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:51,877 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:51,877 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:51,878 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:51,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:51,879 INFO L82 PathProgramCache]: Analyzing trace with hash 1131714409, now seen corresponding path program 1 times [2019-11-15 19:44:51,879 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:51,879 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020698640] [2019-11-15 19:44:51,879 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:51,879 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:51,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:51,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:51,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:51,978 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1020698640] [2019-11-15 19:44:51,980 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:51,980 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 19:44:51,980 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1097040403] [2019-11-15 19:44:51,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 19:44:51,981 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:51,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 19:44:51,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:51,981 INFO L87 Difference]: Start difference. First operand 1396 states and 3321 transitions. Second operand 6 states. [2019-11-15 19:44:52,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:52,260 INFO L93 Difference]: Finished difference Result 1568 states and 3671 transitions. [2019-11-15 19:44:52,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 19:44:52,261 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-11-15 19:44:52,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:52,262 INFO L225 Difference]: With dead ends: 1568 [2019-11-15 19:44:52,263 INFO L226 Difference]: Without dead ends: 1568 [2019-11-15 19:44:52,263 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 19:44:52,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1568 states. [2019-11-15 19:44:52,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1568 to 1380. [2019-11-15 19:44:52,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1380 states. [2019-11-15 19:44:52,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1380 states to 1380 states and 3289 transitions. [2019-11-15 19:44:52,280 INFO L78 Accepts]: Start accepts. Automaton has 1380 states and 3289 transitions. Word has length 93 [2019-11-15 19:44:52,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:52,280 INFO L462 AbstractCegarLoop]: Abstraction has 1380 states and 3289 transitions. [2019-11-15 19:44:52,281 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 19:44:52,281 INFO L276 IsEmpty]: Start isEmpty. Operand 1380 states and 3289 transitions. [2019-11-15 19:44:52,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:52,282 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:52,282 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:52,283 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:52,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:52,283 INFO L82 PathProgramCache]: Analyzing trace with hash -431791101, now seen corresponding path program 1 times [2019-11-15 19:44:52,284 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:52,285 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092328789] [2019-11-15 19:44:52,286 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:52,286 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:52,286 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:52,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:52,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:52,434 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1092328789] [2019-11-15 19:44:52,434 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:52,435 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 19:44:52,435 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1289063931] [2019-11-15 19:44:52,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 19:44:52,435 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:52,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 19:44:52,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 19:44:52,436 INFO L87 Difference]: Start difference. First operand 1380 states and 3289 transitions. Second operand 7 states. [2019-11-15 19:44:52,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:52,716 INFO L93 Difference]: Finished difference Result 1454 states and 3415 transitions. [2019-11-15 19:44:52,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 19:44:52,716 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2019-11-15 19:44:52,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:52,718 INFO L225 Difference]: With dead ends: 1454 [2019-11-15 19:44:52,718 INFO L226 Difference]: Without dead ends: 1442 [2019-11-15 19:44:52,718 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=83, Unknown=0, NotChecked=0, Total=132 [2019-11-15 19:44:52,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1442 states. [2019-11-15 19:44:52,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1442 to 1386. [2019-11-15 19:44:52,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1386 states. [2019-11-15 19:44:52,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1386 states to 1386 states and 3294 transitions. [2019-11-15 19:44:52,736 INFO L78 Accepts]: Start accepts. Automaton has 1386 states and 3294 transitions. Word has length 93 [2019-11-15 19:44:52,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:52,736 INFO L462 AbstractCegarLoop]: Abstraction has 1386 states and 3294 transitions. [2019-11-15 19:44:52,737 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 19:44:52,737 INFO L276 IsEmpty]: Start isEmpty. Operand 1386 states and 3294 transitions. [2019-11-15 19:44:52,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:52,738 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:52,739 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:52,739 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:52,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:52,739 INFO L82 PathProgramCache]: Analyzing trace with hash -880487740, now seen corresponding path program 2 times [2019-11-15 19:44:52,739 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:52,739 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1837807294] [2019-11-15 19:44:52,740 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:52,740 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:52,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:52,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 19:44:52,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 19:44:52,920 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1837807294] [2019-11-15 19:44:52,920 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 19:44:52,920 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 19:44:52,920 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1865686947] [2019-11-15 19:44:52,920 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 19:44:52,921 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 19:44:52,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 19:44:52,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 19:44:52,922 INFO L87 Difference]: Start difference. First operand 1386 states and 3294 transitions. Second operand 12 states. [2019-11-15 19:44:53,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 19:44:53,219 INFO L93 Difference]: Finished difference Result 2588 states and 6225 transitions. [2019-11-15 19:44:53,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 19:44:53,220 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 93 [2019-11-15 19:44:53,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 19:44:53,223 INFO L225 Difference]: With dead ends: 2588 [2019-11-15 19:44:53,223 INFO L226 Difference]: Without dead ends: 1949 [2019-11-15 19:44:53,223 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 19:44:53,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1949 states. [2019-11-15 19:44:53,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1949 to 1837. [2019-11-15 19:44:53,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1837 states. [2019-11-15 19:44:53,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1837 states to 1837 states and 4277 transitions. [2019-11-15 19:44:53,245 INFO L78 Accepts]: Start accepts. Automaton has 1837 states and 4277 transitions. Word has length 93 [2019-11-15 19:44:53,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 19:44:53,245 INFO L462 AbstractCegarLoop]: Abstraction has 1837 states and 4277 transitions. [2019-11-15 19:44:53,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 19:44:53,246 INFO L276 IsEmpty]: Start isEmpty. Operand 1837 states and 4277 transitions. [2019-11-15 19:44:53,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 19:44:53,247 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 19:44:53,248 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 19:44:53,248 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 19:44:53,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 19:44:53,248 INFO L82 PathProgramCache]: Analyzing trace with hash -1394134806, now seen corresponding path program 3 times [2019-11-15 19:44:53,249 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 19:44:53,249 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340257887] [2019-11-15 19:44:53,250 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:53,250 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 19:44:53,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 19:44:53,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 19:44:53,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 19:44:53,358 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 19:44:53,358 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 19:44:53,516 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 19:44:53,519 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 07:44:53 BasicIcfg [2019-11-15 19:44:53,519 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 19:44:53,519 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 19:44:53,519 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 19:44:53,519 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 19:44:53,520 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 07:44:14" (3/4) ... [2019-11-15 19:44:53,522 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 19:44:53,652 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_33bed4e2-48e1-4024-ba5c-2a603bf0c45c/bin/uautomizer/witness.graphml [2019-11-15 19:44:53,653 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 19:44:53,655 INFO L168 Benchmark]: Toolchain (without parser) took 40890.96 ms. Allocated memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: 3.9 GB). Free memory was 943.4 MB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. [2019-11-15 19:44:53,655 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 19:44:53,656 INFO L168 Benchmark]: CACSL2BoogieTranslator took 774.95 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.1 MB). Free memory was 943.4 MB in the beginning and 1.1 GB in the end (delta: -117.1 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-11-15 19:44:53,656 INFO L168 Benchmark]: Boogie Procedure Inliner took 96.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2019-11-15 19:44:53,656 INFO L168 Benchmark]: Boogie Preprocessor took 80.53 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 19:44:53,657 INFO L168 Benchmark]: RCFGBuilder took 742.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.5 MB). Peak memory consumption was 50.5 MB. Max. memory is 11.5 GB. [2019-11-15 19:44:53,658 INFO L168 Benchmark]: TraceAbstraction took 39058.60 ms. Allocated memory was 1.1 GB in the beginning and 4.9 GB in the end (delta: 3.8 GB). Free memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 1.1 GB. Max. memory is 11.5 GB. [2019-11-15 19:44:53,659 INFO L168 Benchmark]: Witness Printer took 133.84 ms. Allocated memory is still 4.9 GB. Free memory was 3.6 GB in the beginning and 3.6 GB in the end (delta: 78.1 MB). Peak memory consumption was 78.1 MB. Max. memory is 11.5 GB. [2019-11-15 19:44:53,661 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 774.95 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.1 MB). Free memory was 943.4 MB in the beginning and 1.1 GB in the end (delta: -117.1 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 96.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 80.53 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 742.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.5 MB). Peak memory consumption was 50.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 39058.60 ms. Allocated memory was 1.1 GB in the beginning and 4.9 GB in the end (delta: 3.8 GB). Free memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 1.1 GB. Max. memory is 11.5 GB. * Witness Printer took 133.84 ms. Allocated memory is still 4.9 GB. Free memory was 3.6 GB in the beginning and 3.6 GB in the end (delta: 78.1 MB). Peak memory consumption was 78.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L695] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L696] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] 0 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L699] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L700] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L701] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L702] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L703] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L704] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L705] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L706] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L707] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L708] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L709] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L710] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L711] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L712] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L714] 0 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L715] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L716] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L776] 0 pthread_t t2483; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L777] FCALL, FORK 0 pthread_create(&t2483, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 0 pthread_t t2484; VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t2484, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L740] 2 x$w_buff1 = x$w_buff0 [L741] 2 x$w_buff0 = 2 [L742] 2 x$w_buff1_used = x$w_buff0_used [L743] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L745] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L746] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L747] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L748] 2 x$r_buff0_thd2 = (_Bool)1 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L720] 1 y = 2 [L723] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L754] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L755] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L755] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L726] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=2] [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=2] [L726] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L727] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L727] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L728] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L729] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L729] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L756] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L757] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L757] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L758] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L758] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L761] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L786] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L787] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L788] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L788] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L789] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L789] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 x$flush_delayed = weak$$choice2 [L795] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L797] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L797] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L798] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L798] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L799] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L799] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L800] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L801] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L802] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L802] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L804] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L804] 0 x = x$flush_delayed ? x$mem_tmp : x [L805] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 174 locations, 3 error locations. Result: UNSAFE, OverallTime: 38.9s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 16.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8432 SDtfs, 8606 SDslu, 18865 SDs, 0 SdLazy, 8029 SolverSat, 499 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 351 GetRequests, 97 SyntacticMatches, 18 SemanticMatches, 236 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 456 ImplicationChecksByTransitivity, 2.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=71293occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 16.4s AutomataMinimizationTime, 33 MinimizatonAttempts, 93443 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 2579 NumberOfCodeBlocks, 2579 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 2453 ConstructedInterpolants, 0 QuantifiedInterpolants, 459623 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...