./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin000_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin000_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f3e9905a2a565e1fb32661f72d4d744a6945510d ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 22:59:31,257 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 22:59:31,259 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 22:59:31,275 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 22:59:31,275 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 22:59:31,277 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 22:59:31,279 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 22:59:31,289 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 22:59:31,294 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 22:59:31,298 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 22:59:31,300 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 22:59:31,302 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 22:59:31,303 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 22:59:31,305 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 22:59:31,306 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 22:59:31,307 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 22:59:31,308 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 22:59:31,310 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 22:59:31,313 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 22:59:31,317 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 22:59:31,321 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 22:59:31,323 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 22:59:31,325 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 22:59:31,326 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 22:59:31,329 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 22:59:31,329 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 22:59:31,329 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 22:59:31,331 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 22:59:31,331 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 22:59:31,332 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 22:59:31,333 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 22:59:31,333 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 22:59:31,334 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 22:59:31,335 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 22:59:31,336 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 22:59:31,337 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 22:59:31,338 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 22:59:31,338 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 22:59:31,338 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 22:59:31,339 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 22:59:31,340 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 22:59:31,341 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 22:59:31,368 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 22:59:31,380 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 22:59:31,381 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 22:59:31,381 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 22:59:31,382 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 22:59:31,382 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 22:59:31,382 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 22:59:31,383 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 22:59:31,383 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 22:59:31,383 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 22:59:31,383 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 22:59:31,384 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 22:59:31,384 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 22:59:31,384 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 22:59:31,384 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 22:59:31,385 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 22:59:31,385 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 22:59:31,385 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 22:59:31,385 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 22:59:31,386 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 22:59:31,386 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 22:59:31,386 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 22:59:31,386 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 22:59:31,387 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 22:59:31,388 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 22:59:31,388 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 22:59:31,389 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 22:59:31,389 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 22:59:31,389 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f3e9905a2a565e1fb32661f72d4d744a6945510d [2019-11-15 22:59:31,425 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 22:59:31,440 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 22:59:31,444 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 22:59:31,445 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 22:59:31,446 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 22:59:31,447 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/thin000_power.opt.i [2019-11-15 22:59:31,503 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/data/c3c86a2e8/0ae00d2f87d14308b325d2e88da79dbe/FLAGd26d5c49f [2019-11-15 22:59:32,002 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 22:59:32,003 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/sv-benchmarks/c/pthread-wmm/thin000_power.opt.i [2019-11-15 22:59:32,020 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/data/c3c86a2e8/0ae00d2f87d14308b325d2e88da79dbe/FLAGd26d5c49f [2019-11-15 22:59:32,312 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/data/c3c86a2e8/0ae00d2f87d14308b325d2e88da79dbe [2019-11-15 22:59:32,316 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 22:59:32,317 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 22:59:32,324 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 22:59:32,324 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 22:59:32,328 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 22:59:32,329 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 10:59:32" (1/1) ... [2019-11-15 22:59:32,331 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@11f1b5ce and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:32, skipping insertion in model container [2019-11-15 22:59:32,332 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 10:59:32" (1/1) ... [2019-11-15 22:59:32,340 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 22:59:32,399 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 22:59:32,971 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 22:59:32,985 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 22:59:33,085 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 22:59:33,166 INFO L192 MainTranslator]: Completed translation [2019-11-15 22:59:33,167 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33 WrapperNode [2019-11-15 22:59:33,167 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 22:59:33,168 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 22:59:33,168 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 22:59:33,168 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 22:59:33,176 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,195 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,222 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 22:59:33,223 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 22:59:33,223 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 22:59:33,223 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 22:59:33,235 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,236 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,242 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,242 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,271 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,277 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,296 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... [2019-11-15 22:59:33,310 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 22:59:33,311 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 22:59:33,311 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 22:59:33,311 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 22:59:33,316 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 22:59:33,399 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-11-15 22:59:33,399 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 22:59:33,399 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 22:59:33,400 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 22:59:33,400 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 22:59:33,401 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 22:59:33,401 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 22:59:33,401 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 22:59:33,402 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 22:59:33,402 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-11-15 22:59:33,404 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 22:59:33,404 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 22:59:33,404 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 22:59:33,406 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 22:59:34,484 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 22:59:34,484 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 22:59:34,485 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:59:34 BoogieIcfgContainer [2019-11-15 22:59:34,486 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 22:59:34,487 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 22:59:34,487 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 22:59:34,490 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 22:59:34,490 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 10:59:32" (1/3) ... [2019-11-15 22:59:34,491 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@52b1a0c8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 10:59:34, skipping insertion in model container [2019-11-15 22:59:34,491 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:59:33" (2/3) ... [2019-11-15 22:59:34,492 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@52b1a0c8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 10:59:34, skipping insertion in model container [2019-11-15 22:59:34,492 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:59:34" (3/3) ... [2019-11-15 22:59:34,494 INFO L109 eAbstractionObserver]: Analyzing ICFG thin000_power.opt.i [2019-11-15 22:59:34,591 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,591 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,591 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,592 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,592 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,592 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,599 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,600 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,600 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,600 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,601 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,601 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,601 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,602 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,602 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,602 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,602 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,602 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,603 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,603 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,603 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,603 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,603 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,603 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,604 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,604 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,604 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,604 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,604 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,604 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,604 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,605 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,605 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,605 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,605 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,605 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,606 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,608 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,609 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,609 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,609 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,609 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,609 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,609 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,609 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,609 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,610 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,610 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,610 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,610 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,611 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,611 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,611 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,611 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,611 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,612 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,612 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,612 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,612 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,613 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,613 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,613 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,613 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,614 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,614 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,614 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,614 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,615 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,631 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,631 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,632 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,632 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,632 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,632 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,632 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,633 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,633 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,633 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,633 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,633 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,634 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,634 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,634 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,634 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,634 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,635 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,635 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,635 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,635 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,636 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,636 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,636 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,636 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,637 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,637 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,637 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,638 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,638 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,638 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,638 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,639 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,639 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,639 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,639 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,640 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,640 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,640 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,640 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,641 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,641 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,641 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,642 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,642 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,642 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,642 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,643 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,643 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,643 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,643 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,644 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,644 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,644 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,645 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,645 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,645 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,645 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,646 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,646 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,646 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,646 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,647 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,647 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,647 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,647 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,648 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,648 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,648 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,648 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,649 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,649 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,649 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,650 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,650 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,650 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,650 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,650 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,651 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,651 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,651 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,651 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,652 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,652 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,652 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,653 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,653 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,653 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,653 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,654 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,654 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,654 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,654 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,655 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,655 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,655 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,655 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,655 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,656 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,656 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,656 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,656 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,657 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,657 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,657 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,657 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,658 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,658 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,658 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,659 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,659 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,675 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,676 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,676 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,676 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,676 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,677 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,677 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,677 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,677 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,678 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,678 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,678 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,678 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,679 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,679 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,679 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,679 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,680 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,680 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,680 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,680 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,681 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,681 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,681 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,681 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,682 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,682 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,682 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,682 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,683 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,683 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,683 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,683 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,683 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,684 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,684 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,684 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,684 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,685 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,685 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,685 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,685 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,686 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,686 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,686 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,686 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,687 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,687 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,687 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,687 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:59:34,696 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 22:59:34,697 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 22:59:34,705 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 22:59:34,724 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 22:59:34,755 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 22:59:34,756 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 22:59:34,756 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 22:59:34,756 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 22:59:34,756 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 22:59:34,757 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 22:59:34,757 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 22:59:34,757 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 22:59:34,783 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 198 places, 257 transitions [2019-11-15 22:59:40,243 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 61566 states. [2019-11-15 22:59:40,244 INFO L276 IsEmpty]: Start isEmpty. Operand 61566 states. [2019-11-15 22:59:40,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-15 22:59:40,252 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:59:40,252 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:59:40,254 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:59:40,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:59:40,259 INFO L82 PathProgramCache]: Analyzing trace with hash -1293688045, now seen corresponding path program 1 times [2019-11-15 22:59:40,265 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:59:40,265 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2059881493] [2019-11-15 22:59:40,265 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:59:40,265 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:59:40,266 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:59:40,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:59:40,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:59:40,509 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2059881493] [2019-11-15 22:59:40,509 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:59:40,509 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:59:40,510 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [749745735] [2019-11-15 22:59:40,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:59:40,514 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:59:40,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:59:40,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:59:40,531 INFO L87 Difference]: Start difference. First operand 61566 states. Second operand 4 states. [2019-11-15 22:59:41,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:59:41,856 INFO L93 Difference]: Finished difference Result 63246 states and 248045 transitions. [2019-11-15 22:59:41,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 22:59:41,857 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2019-11-15 22:59:41,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:59:42,247 INFO L225 Difference]: With dead ends: 63246 [2019-11-15 22:59:42,248 INFO L226 Difference]: Without dead ends: 50190 [2019-11-15 22:59:42,249 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:59:42,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50190 states. [2019-11-15 22:59:44,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50190 to 50190. [2019-11-15 22:59:44,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50190 states. [2019-11-15 22:59:44,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50190 states to 50190 states and 198149 transitions. [2019-11-15 22:59:44,783 INFO L78 Accepts]: Start accepts. Automaton has 50190 states and 198149 transitions. Word has length 49 [2019-11-15 22:59:44,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:59:44,784 INFO L462 AbstractCegarLoop]: Abstraction has 50190 states and 198149 transitions. [2019-11-15 22:59:44,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:59:44,784 INFO L276 IsEmpty]: Start isEmpty. Operand 50190 states and 198149 transitions. [2019-11-15 22:59:44,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 22:59:44,795 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:59:44,795 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:59:44,795 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:59:44,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:59:44,796 INFO L82 PathProgramCache]: Analyzing trace with hash 465120393, now seen corresponding path program 1 times [2019-11-15 22:59:44,796 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:59:44,796 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388681367] [2019-11-15 22:59:44,797 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:59:44,797 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:59:44,797 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:59:44,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:59:44,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:59:44,930 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388681367] [2019-11-15 22:59:44,931 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:59:44,931 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:59:44,931 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061049207] [2019-11-15 22:59:44,933 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:59:44,933 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:59:44,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:59:44,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:59:44,934 INFO L87 Difference]: Start difference. First operand 50190 states and 198149 transitions. Second operand 5 states. [2019-11-15 22:59:46,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:59:46,333 INFO L93 Difference]: Finished difference Result 80986 states and 302743 transitions. [2019-11-15 22:59:46,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:59:46,334 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2019-11-15 22:59:46,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:59:46,701 INFO L225 Difference]: With dead ends: 80986 [2019-11-15 22:59:46,702 INFO L226 Difference]: Without dead ends: 80146 [2019-11-15 22:59:46,703 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:59:48,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80146 states. [2019-11-15 22:59:49,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80146 to 77168. [2019-11-15 22:59:49,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77168 states. [2019-11-15 22:59:49,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77168 states to 77168 states and 290103 transitions. [2019-11-15 22:59:49,817 INFO L78 Accepts]: Start accepts. Automaton has 77168 states and 290103 transitions. Word has length 61 [2019-11-15 22:59:49,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:59:49,819 INFO L462 AbstractCegarLoop]: Abstraction has 77168 states and 290103 transitions. [2019-11-15 22:59:49,819 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:59:49,819 INFO L276 IsEmpty]: Start isEmpty. Operand 77168 states and 290103 transitions. [2019-11-15 22:59:49,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-15 22:59:49,832 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:59:49,832 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:59:49,833 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:59:49,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:59:49,833 INFO L82 PathProgramCache]: Analyzing trace with hash -1955238875, now seen corresponding path program 1 times [2019-11-15 22:59:49,834 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:59:49,834 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [613108421] [2019-11-15 22:59:49,835 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:59:49,835 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:59:49,835 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:59:49,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:59:49,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:59:49,996 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [613108421] [2019-11-15 22:59:49,996 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:59:49,996 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:59:49,996 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691841015] [2019-11-15 22:59:49,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:59:49,997 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:59:49,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:59:49,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:59:49,998 INFO L87 Difference]: Start difference. First operand 77168 states and 290103 transitions. Second operand 6 states. [2019-11-15 22:59:52,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:59:52,524 INFO L93 Difference]: Finished difference Result 119435 states and 436396 transitions. [2019-11-15 22:59:52,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 22:59:52,525 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 62 [2019-11-15 22:59:52,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:59:52,848 INFO L225 Difference]: With dead ends: 119435 [2019-11-15 22:59:52,848 INFO L226 Difference]: Without dead ends: 118427 [2019-11-15 22:59:52,849 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2019-11-15 22:59:53,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118427 states. [2019-11-15 22:59:59,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118427 to 85982. [2019-11-15 22:59:59,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85982 states. [2019-11-15 23:00:00,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85982 states to 85982 states and 321009 transitions. [2019-11-15 23:00:00,146 INFO L78 Accepts]: Start accepts. Automaton has 85982 states and 321009 transitions. Word has length 62 [2019-11-15 23:00:00,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:00,147 INFO L462 AbstractCegarLoop]: Abstraction has 85982 states and 321009 transitions. [2019-11-15 23:00:00,147 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:00:00,147 INFO L276 IsEmpty]: Start isEmpty. Operand 85982 states and 321009 transitions. [2019-11-15 23:00:00,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 23:00:00,168 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:00,168 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:00,169 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:00,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:00,169 INFO L82 PathProgramCache]: Analyzing trace with hash -1087915666, now seen corresponding path program 1 times [2019-11-15 23:00:00,169 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:00,170 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622801949] [2019-11-15 23:00:00,170 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:00,170 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:00,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:00,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:00,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:00,247 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1622801949] [2019-11-15 23:00:00,247 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:00,247 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:00:00,248 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385349658] [2019-11-15 23:00:00,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:00:00,248 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:00,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:00:00,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:00,249 INFO L87 Difference]: Start difference. First operand 85982 states and 321009 transitions. Second operand 3 states. [2019-11-15 23:00:00,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:00,766 INFO L93 Difference]: Finished difference Result 113655 states and 419177 transitions. [2019-11-15 23:00:00,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:00:00,767 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-11-15 23:00:00,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:01,033 INFO L225 Difference]: With dead ends: 113655 [2019-11-15 23:00:01,034 INFO L226 Difference]: Without dead ends: 113655 [2019-11-15 23:00:01,034 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:01,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113655 states. [2019-11-15 23:00:03,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113655 to 96017. [2019-11-15 23:00:03,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96017 states. [2019-11-15 23:00:04,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96017 states to 96017 states and 354764 transitions. [2019-11-15 23:00:04,084 INFO L78 Accepts]: Start accepts. Automaton has 96017 states and 354764 transitions. Word has length 64 [2019-11-15 23:00:04,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:04,084 INFO L462 AbstractCegarLoop]: Abstraction has 96017 states and 354764 transitions. [2019-11-15 23:00:04,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:00:04,085 INFO L276 IsEmpty]: Start isEmpty. Operand 96017 states and 354764 transitions. [2019-11-15 23:00:04,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 23:00:04,114 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:04,115 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:04,115 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:04,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:04,115 INFO L82 PathProgramCache]: Analyzing trace with hash 107382563, now seen corresponding path program 1 times [2019-11-15 23:00:04,116 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:04,116 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1064411539] [2019-11-15 23:00:04,116 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:04,116 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:04,116 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:04,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:04,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:04,251 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1064411539] [2019-11-15 23:00:04,251 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:04,251 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:00:04,251 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1305349112] [2019-11-15 23:00:04,252 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:00:04,252 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:04,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:00:04,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:00:04,253 INFO L87 Difference]: Start difference. First operand 96017 states and 354764 transitions. Second operand 7 states. [2019-11-15 23:00:06,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:06,186 INFO L93 Difference]: Finished difference Result 123921 states and 450565 transitions. [2019-11-15 23:00:06,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-11-15 23:00:06,187 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-11-15 23:00:06,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:06,512 INFO L225 Difference]: With dead ends: 123921 [2019-11-15 23:00:06,512 INFO L226 Difference]: Without dead ends: 122969 [2019-11-15 23:00:06,513 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=114, Invalid=348, Unknown=0, NotChecked=0, Total=462 [2019-11-15 23:00:07,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122969 states. [2019-11-15 23:00:09,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122969 to 93225. [2019-11-15 23:00:09,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93225 states. [2019-11-15 23:00:10,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93225 states to 93225 states and 345738 transitions. [2019-11-15 23:00:10,057 INFO L78 Accepts]: Start accepts. Automaton has 93225 states and 345738 transitions. Word has length 68 [2019-11-15 23:00:10,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:10,058 INFO L462 AbstractCegarLoop]: Abstraction has 93225 states and 345738 transitions. [2019-11-15 23:00:10,058 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:00:10,058 INFO L276 IsEmpty]: Start isEmpty. Operand 93225 states and 345738 transitions. [2019-11-15 23:00:10,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:00:10,092 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:10,092 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:10,092 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:10,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:10,092 INFO L82 PathProgramCache]: Analyzing trace with hash 93104040, now seen corresponding path program 1 times [2019-11-15 23:00:10,092 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:10,093 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056807321] [2019-11-15 23:00:10,093 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:10,093 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:10,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:10,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:10,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:10,230 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056807321] [2019-11-15 23:00:10,231 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:10,231 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:00:10,231 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1105203960] [2019-11-15 23:00:10,232 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:00:10,232 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:10,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:00:10,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:00:10,233 INFO L87 Difference]: Start difference. First operand 93225 states and 345738 transitions. Second operand 6 states. [2019-11-15 23:00:11,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:11,655 INFO L93 Difference]: Finished difference Result 117215 states and 426034 transitions. [2019-11-15 23:00:11,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:00:11,656 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2019-11-15 23:00:11,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:11,948 INFO L225 Difference]: With dead ends: 117215 [2019-11-15 23:00:11,948 INFO L226 Difference]: Without dead ends: 116953 [2019-11-15 23:00:11,951 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:00:12,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116953 states. [2019-11-15 23:00:14,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116953 to 113598. [2019-11-15 23:00:14,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113598 states. [2019-11-15 23:00:14,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113598 states to 113598 states and 413906 transitions. [2019-11-15 23:00:14,989 INFO L78 Accepts]: Start accepts. Automaton has 113598 states and 413906 transitions. Word has length 70 [2019-11-15 23:00:14,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:14,990 INFO L462 AbstractCegarLoop]: Abstraction has 113598 states and 413906 transitions. [2019-11-15 23:00:14,990 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:00:14,990 INFO L276 IsEmpty]: Start isEmpty. Operand 113598 states and 413906 transitions. [2019-11-15 23:00:15,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:00:15,024 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:15,024 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:15,025 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:15,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:15,025 INFO L82 PathProgramCache]: Analyzing trace with hash -200298967, now seen corresponding path program 1 times [2019-11-15 23:00:15,025 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:15,026 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302861119] [2019-11-15 23:00:15,026 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:15,026 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:15,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:15,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:15,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:15,120 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1302861119] [2019-11-15 23:00:15,120 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:15,120 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:00:15,120 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1065021999] [2019-11-15 23:00:15,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:00:15,121 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:15,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:00:15,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:00:15,122 INFO L87 Difference]: Start difference. First operand 113598 states and 413906 transitions. Second operand 7 states. [2019-11-15 23:00:16,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:16,912 INFO L93 Difference]: Finished difference Result 162864 states and 574461 transitions. [2019-11-15 23:00:16,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:00:16,913 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 70 [2019-11-15 23:00:16,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:17,294 INFO L225 Difference]: With dead ends: 162864 [2019-11-15 23:00:17,295 INFO L226 Difference]: Without dead ends: 162864 [2019-11-15 23:00:17,295 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:00:18,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162864 states. [2019-11-15 23:00:21,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162864 to 139509. [2019-11-15 23:00:21,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139509 states. [2019-11-15 23:00:21,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139509 states to 139509 states and 498565 transitions. [2019-11-15 23:00:21,472 INFO L78 Accepts]: Start accepts. Automaton has 139509 states and 498565 transitions. Word has length 70 [2019-11-15 23:00:21,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:21,473 INFO L462 AbstractCegarLoop]: Abstraction has 139509 states and 498565 transitions. [2019-11-15 23:00:21,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:00:21,473 INFO L276 IsEmpty]: Start isEmpty. Operand 139509 states and 498565 transitions. [2019-11-15 23:00:21,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:00:21,511 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:21,511 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:21,511 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:21,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:21,512 INFO L82 PathProgramCache]: Analyzing trace with hash -2007753430, now seen corresponding path program 1 times [2019-11-15 23:00:21,512 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:21,512 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945378442] [2019-11-15 23:00:21,513 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:21,513 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:21,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:21,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:21,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:21,584 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945378442] [2019-11-15 23:00:21,584 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:21,585 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:00:21,585 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210575268] [2019-11-15 23:00:21,585 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:00:21,585 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:21,586 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:00:21,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:21,586 INFO L87 Difference]: Start difference. First operand 139509 states and 498565 transitions. Second operand 3 states. [2019-11-15 23:00:22,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:22,095 INFO L93 Difference]: Finished difference Result 112233 states and 398893 transitions. [2019-11-15 23:00:22,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:00:22,095 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2019-11-15 23:00:22,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:22,364 INFO L225 Difference]: With dead ends: 112233 [2019-11-15 23:00:22,365 INFO L226 Difference]: Without dead ends: 112233 [2019-11-15 23:00:22,365 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:22,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112233 states. [2019-11-15 23:00:25,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112233 to 111326. [2019-11-15 23:00:25,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111326 states. [2019-11-15 23:00:25,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111326 states to 111326 states and 396115 transitions. [2019-11-15 23:00:25,729 INFO L78 Accepts]: Start accepts. Automaton has 111326 states and 396115 transitions. Word has length 70 [2019-11-15 23:00:25,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:25,729 INFO L462 AbstractCegarLoop]: Abstraction has 111326 states and 396115 transitions. [2019-11-15 23:00:25,729 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:00:25,730 INFO L276 IsEmpty]: Start isEmpty. Operand 111326 states and 396115 transitions. [2019-11-15 23:00:25,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:00:25,750 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:25,750 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:25,750 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:25,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:25,751 INFO L82 PathProgramCache]: Analyzing trace with hash -1511739026, now seen corresponding path program 1 times [2019-11-15 23:00:25,751 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:25,751 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1671312713] [2019-11-15 23:00:25,751 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:25,752 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:25,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:25,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:25,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:25,841 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1671312713] [2019-11-15 23:00:25,841 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:25,842 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:00:25,842 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1699051584] [2019-11-15 23:00:25,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:00:25,842 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:25,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:00:25,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:00:25,843 INFO L87 Difference]: Start difference. First operand 111326 states and 396115 transitions. Second operand 4 states. [2019-11-15 23:00:25,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:25,942 INFO L93 Difference]: Finished difference Result 17102 states and 53412 transitions. [2019-11-15 23:00:25,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:00:25,943 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-11-15 23:00:25,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:25,976 INFO L225 Difference]: With dead ends: 17102 [2019-11-15 23:00:25,976 INFO L226 Difference]: Without dead ends: 14466 [2019-11-15 23:00:25,977 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:26,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14466 states. [2019-11-15 23:00:26,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14466 to 14414. [2019-11-15 23:00:26,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14414 states. [2019-11-15 23:00:26,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14414 states to 14414 states and 44443 transitions. [2019-11-15 23:00:26,269 INFO L78 Accepts]: Start accepts. Automaton has 14414 states and 44443 transitions. Word has length 70 [2019-11-15 23:00:26,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:26,270 INFO L462 AbstractCegarLoop]: Abstraction has 14414 states and 44443 transitions. [2019-11-15 23:00:26,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:00:26,270 INFO L276 IsEmpty]: Start isEmpty. Operand 14414 states and 44443 transitions. [2019-11-15 23:00:26,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 23:00:26,276 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:26,276 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:26,276 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:26,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:26,277 INFO L82 PathProgramCache]: Analyzing trace with hash -1518532732, now seen corresponding path program 1 times [2019-11-15 23:00:26,277 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:26,277 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274148219] [2019-11-15 23:00:26,277 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:26,278 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:26,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:26,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:26,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:26,360 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1274148219] [2019-11-15 23:00:26,360 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:26,360 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:00:26,361 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540542955] [2019-11-15 23:00:26,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:00:26,362 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:26,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:00:26,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:00:26,362 INFO L87 Difference]: Start difference. First operand 14414 states and 44443 transitions. Second operand 4 states. [2019-11-15 23:00:26,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:26,621 INFO L93 Difference]: Finished difference Result 15730 states and 48359 transitions. [2019-11-15 23:00:26,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:00:26,622 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2019-11-15 23:00:26,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:26,654 INFO L225 Difference]: With dead ends: 15730 [2019-11-15 23:00:26,655 INFO L226 Difference]: Without dead ends: 15730 [2019-11-15 23:00:26,661 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:26,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15730 states. [2019-11-15 23:00:26,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15730 to 15322. [2019-11-15 23:00:26,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15322 states. [2019-11-15 23:00:26,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15322 states to 15322 states and 47101 transitions. [2019-11-15 23:00:26,983 INFO L78 Accepts]: Start accepts. Automaton has 15322 states and 47101 transitions. Word has length 76 [2019-11-15 23:00:26,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:26,984 INFO L462 AbstractCegarLoop]: Abstraction has 15322 states and 47101 transitions. [2019-11-15 23:00:26,984 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:00:26,984 INFO L276 IsEmpty]: Start isEmpty. Operand 15322 states and 47101 transitions. [2019-11-15 23:00:26,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 23:00:26,990 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:26,990 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:26,990 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:26,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:26,991 INFO L82 PathProgramCache]: Analyzing trace with hash 224277603, now seen corresponding path program 1 times [2019-11-15 23:00:26,991 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:26,993 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73447275] [2019-11-15 23:00:26,993 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:26,993 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:26,993 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:27,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:27,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:27,151 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [73447275] [2019-11-15 23:00:27,151 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:27,151 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:00:27,151 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953791580] [2019-11-15 23:00:27,152 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:00:27,152 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:27,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:00:27,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:27,153 INFO L87 Difference]: Start difference. First operand 15322 states and 47101 transitions. Second operand 5 states. [2019-11-15 23:00:27,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:27,281 INFO L93 Difference]: Finished difference Result 15844 states and 48444 transitions. [2019-11-15 23:00:27,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:00:27,282 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2019-11-15 23:00:27,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:27,320 INFO L225 Difference]: With dead ends: 15844 [2019-11-15 23:00:27,320 INFO L226 Difference]: Without dead ends: 15844 [2019-11-15 23:00:27,321 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:27,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15844 states. [2019-11-15 23:00:27,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15844 to 15670. [2019-11-15 23:00:27,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15670 states. [2019-11-15 23:00:27,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15670 states to 15670 states and 47967 transitions. [2019-11-15 23:00:27,599 INFO L78 Accepts]: Start accepts. Automaton has 15670 states and 47967 transitions. Word has length 76 [2019-11-15 23:00:27,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:27,600 INFO L462 AbstractCegarLoop]: Abstraction has 15670 states and 47967 transitions. [2019-11-15 23:00:27,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:00:27,600 INFO L276 IsEmpty]: Start isEmpty. Operand 15670 states and 47967 transitions. [2019-11-15 23:00:27,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 23:00:27,603 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:27,604 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:27,604 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:27,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:27,604 INFO L82 PathProgramCache]: Analyzing trace with hash 2021228962, now seen corresponding path program 1 times [2019-11-15 23:00:27,605 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:27,605 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077515020] [2019-11-15 23:00:27,605 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:27,605 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:27,605 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:27,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:27,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:27,721 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077515020] [2019-11-15 23:00:27,722 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:27,722 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:00:27,722 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755285653] [2019-11-15 23:00:27,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:00:27,723 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:27,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:00:27,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:00:27,723 INFO L87 Difference]: Start difference. First operand 15670 states and 47967 transitions. Second operand 7 states. [2019-11-15 23:00:28,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:28,318 INFO L93 Difference]: Finished difference Result 19545 states and 58883 transitions. [2019-11-15 23:00:28,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 23:00:28,318 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 76 [2019-11-15 23:00:28,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:28,345 INFO L225 Difference]: With dead ends: 19545 [2019-11-15 23:00:28,345 INFO L226 Difference]: Without dead ends: 19484 [2019-11-15 23:00:28,346 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-11-15 23:00:28,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19484 states. [2019-11-15 23:00:28,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19484 to 17423. [2019-11-15 23:00:28,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17423 states. [2019-11-15 23:00:28,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17423 states to 17423 states and 52978 transitions. [2019-11-15 23:00:28,589 INFO L78 Accepts]: Start accepts. Automaton has 17423 states and 52978 transitions. Word has length 76 [2019-11-15 23:00:28,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:28,589 INFO L462 AbstractCegarLoop]: Abstraction has 17423 states and 52978 transitions. [2019-11-15 23:00:28,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:00:28,589 INFO L276 IsEmpty]: Start isEmpty. Operand 17423 states and 52978 transitions. [2019-11-15 23:00:28,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 23:00:28,596 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:28,596 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:28,596 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:28,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:28,597 INFO L82 PathProgramCache]: Analyzing trace with hash -366442464, now seen corresponding path program 1 times [2019-11-15 23:00:28,597 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:28,597 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180903811] [2019-11-15 23:00:28,597 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:28,597 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:28,597 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:28,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:28,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:28,637 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1180903811] [2019-11-15 23:00:28,638 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:28,638 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:00:28,638 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590478984] [2019-11-15 23:00:28,639 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:00:28,639 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:28,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:00:28,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:28,639 INFO L87 Difference]: Start difference. First operand 17423 states and 52978 transitions. Second operand 3 states. [2019-11-15 23:00:28,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:28,742 INFO L93 Difference]: Finished difference Result 20125 states and 60680 transitions. [2019-11-15 23:00:28,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:00:28,743 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2019-11-15 23:00:28,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:28,776 INFO L225 Difference]: With dead ends: 20125 [2019-11-15 23:00:28,776 INFO L226 Difference]: Without dead ends: 20125 [2019-11-15 23:00:28,777 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:28,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20125 states. [2019-11-15 23:00:28,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20125 to 16881. [2019-11-15 23:00:28,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16881 states. [2019-11-15 23:00:29,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16881 states to 16881 states and 50639 transitions. [2019-11-15 23:00:29,021 INFO L78 Accepts]: Start accepts. Automaton has 16881 states and 50639 transitions. Word has length 82 [2019-11-15 23:00:29,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:29,022 INFO L462 AbstractCegarLoop]: Abstraction has 16881 states and 50639 transitions. [2019-11-15 23:00:29,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:00:29,022 INFO L276 IsEmpty]: Start isEmpty. Operand 16881 states and 50639 transitions. [2019-11-15 23:00:29,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:00:29,029 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:29,029 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:29,030 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:29,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:29,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1049435942, now seen corresponding path program 1 times [2019-11-15 23:00:29,030 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:29,031 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315659776] [2019-11-15 23:00:29,031 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:29,031 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:29,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:29,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:29,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:29,080 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315659776] [2019-11-15 23:00:29,080 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:29,081 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:00:29,081 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400700545] [2019-11-15 23:00:29,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:00:29,081 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:29,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:00:29,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:00:29,082 INFO L87 Difference]: Start difference. First operand 16881 states and 50639 transitions. Second operand 4 states. [2019-11-15 23:00:29,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:29,429 INFO L93 Difference]: Finished difference Result 18654 states and 54992 transitions. [2019-11-15 23:00:29,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:00:29,430 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2019-11-15 23:00:29,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:29,454 INFO L225 Difference]: With dead ends: 18654 [2019-11-15 23:00:29,454 INFO L226 Difference]: Without dead ends: 18654 [2019-11-15 23:00:29,454 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:00:29,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18654 states. [2019-11-15 23:00:29,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18654 to 17760. [2019-11-15 23:00:29,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17760 states. [2019-11-15 23:00:29,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17760 states to 17760 states and 52714 transitions. [2019-11-15 23:00:29,691 INFO L78 Accepts]: Start accepts. Automaton has 17760 states and 52714 transitions. Word has length 84 [2019-11-15 23:00:29,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:29,691 INFO L462 AbstractCegarLoop]: Abstraction has 17760 states and 52714 transitions. [2019-11-15 23:00:29,691 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:00:29,691 INFO L276 IsEmpty]: Start isEmpty. Operand 17760 states and 52714 transitions. [2019-11-15 23:00:29,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:00:29,701 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:29,701 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:29,702 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:29,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:29,702 INFO L82 PathProgramCache]: Analyzing trace with hash 1168322011, now seen corresponding path program 1 times [2019-11-15 23:00:29,702 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:29,702 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596050277] [2019-11-15 23:00:29,703 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:29,703 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:29,703 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:29,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:29,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:29,807 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596050277] [2019-11-15 23:00:29,807 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:29,808 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:00:29,808 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051374364] [2019-11-15 23:00:29,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:00:29,809 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:29,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:00:29,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:00:29,809 INFO L87 Difference]: Start difference. First operand 17760 states and 52714 transitions. Second operand 6 states. [2019-11-15 23:00:30,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:30,335 INFO L93 Difference]: Finished difference Result 18959 states and 55328 transitions. [2019-11-15 23:00:30,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:00:30,335 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2019-11-15 23:00:30,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:30,361 INFO L225 Difference]: With dead ends: 18959 [2019-11-15 23:00:30,361 INFO L226 Difference]: Without dead ends: 18959 [2019-11-15 23:00:30,361 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:00:30,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18959 states. [2019-11-15 23:00:30,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18959 to 18130. [2019-11-15 23:00:30,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18130 states. [2019-11-15 23:00:30,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18130 states to 18130 states and 53275 transitions. [2019-11-15 23:00:30,712 INFO L78 Accepts]: Start accepts. Automaton has 18130 states and 53275 transitions. Word has length 84 [2019-11-15 23:00:30,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:30,712 INFO L462 AbstractCegarLoop]: Abstraction has 18130 states and 53275 transitions. [2019-11-15 23:00:30,712 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:00:30,712 INFO L276 IsEmpty]: Start isEmpty. Operand 18130 states and 53275 transitions. [2019-11-15 23:00:30,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:00:30,722 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:30,722 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:30,722 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:30,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:30,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1881880804, now seen corresponding path program 1 times [2019-11-15 23:00:30,723 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:30,723 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778759048] [2019-11-15 23:00:30,724 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:30,724 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:30,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:30,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:30,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:30,795 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778759048] [2019-11-15 23:00:30,795 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:30,795 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:00:30,796 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629968467] [2019-11-15 23:00:30,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:00:30,796 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:30,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:00:30,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:30,797 INFO L87 Difference]: Start difference. First operand 18130 states and 53275 transitions. Second operand 5 states. [2019-11-15 23:00:31,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:31,243 INFO L93 Difference]: Finished difference Result 21826 states and 63096 transitions. [2019-11-15 23:00:31,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:00:31,244 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2019-11-15 23:00:31,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:31,272 INFO L225 Difference]: With dead ends: 21826 [2019-11-15 23:00:31,272 INFO L226 Difference]: Without dead ends: 21826 [2019-11-15 23:00:31,273 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:00:31,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21826 states. [2019-11-15 23:00:31,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21826 to 20200. [2019-11-15 23:00:31,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20200 states. [2019-11-15 23:00:31,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20200 states to 20200 states and 58391 transitions. [2019-11-15 23:00:31,549 INFO L78 Accepts]: Start accepts. Automaton has 20200 states and 58391 transitions. Word has length 84 [2019-11-15 23:00:31,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:31,549 INFO L462 AbstractCegarLoop]: Abstraction has 20200 states and 58391 transitions. [2019-11-15 23:00:31,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:00:31,549 INFO L276 IsEmpty]: Start isEmpty. Operand 20200 states and 58391 transitions. [2019-11-15 23:00:31,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:00:31,557 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:31,557 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:31,557 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:31,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:31,557 INFO L82 PathProgramCache]: Analyzing trace with hash 1416014139, now seen corresponding path program 1 times [2019-11-15 23:00:31,558 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:31,558 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704623965] [2019-11-15 23:00:31,558 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:31,558 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:31,558 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:31,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:31,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:31,619 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704623965] [2019-11-15 23:00:31,619 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:31,619 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:00:31,619 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709177535] [2019-11-15 23:00:31,620 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:00:31,620 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:31,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:00:31,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:00:31,621 INFO L87 Difference]: Start difference. First operand 20200 states and 58391 transitions. Second operand 4 states. [2019-11-15 23:00:32,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:32,255 INFO L93 Difference]: Finished difference Result 24505 states and 70549 transitions. [2019-11-15 23:00:32,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:00:32,256 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2019-11-15 23:00:32,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:32,289 INFO L225 Difference]: With dead ends: 24505 [2019-11-15 23:00:32,289 INFO L226 Difference]: Without dead ends: 24208 [2019-11-15 23:00:32,289 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:32,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24208 states. [2019-11-15 23:00:32,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24208 to 23080. [2019-11-15 23:00:32,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23080 states. [2019-11-15 23:00:32,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23080 states to 23080 states and 66455 transitions. [2019-11-15 23:00:32,596 INFO L78 Accepts]: Start accepts. Automaton has 23080 states and 66455 transitions. Word has length 84 [2019-11-15 23:00:32,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:32,597 INFO L462 AbstractCegarLoop]: Abstraction has 23080 states and 66455 transitions. [2019-11-15 23:00:32,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:00:32,597 INFO L276 IsEmpty]: Start isEmpty. Operand 23080 states and 66455 transitions. [2019-11-15 23:00:32,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:00:32,604 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:32,605 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:32,605 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:32,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:32,605 INFO L82 PathProgramCache]: Analyzing trace with hash 1122611132, now seen corresponding path program 1 times [2019-11-15 23:00:32,605 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:32,605 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038870145] [2019-11-15 23:00:32,606 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:32,606 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:32,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:32,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:32,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:32,735 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038870145] [2019-11-15 23:00:32,735 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:32,735 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:00:32,735 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [956714120] [2019-11-15 23:00:32,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:00:32,736 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:32,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:00:32,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:00:32,736 INFO L87 Difference]: Start difference. First operand 23080 states and 66455 transitions. Second operand 7 states. [2019-11-15 23:00:33,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:33,414 INFO L93 Difference]: Finished difference Result 32772 states and 91213 transitions. [2019-11-15 23:00:33,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:00:33,415 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 84 [2019-11-15 23:00:33,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:33,456 INFO L225 Difference]: With dead ends: 32772 [2019-11-15 23:00:33,456 INFO L226 Difference]: Without dead ends: 32772 [2019-11-15 23:00:33,457 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2019-11-15 23:00:33,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32772 states. [2019-11-15 23:00:33,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32772 to 27257. [2019-11-15 23:00:33,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27257 states. [2019-11-15 23:00:33,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27257 states to 27257 states and 76177 transitions. [2019-11-15 23:00:33,836 INFO L78 Accepts]: Start accepts. Automaton has 27257 states and 76177 transitions. Word has length 84 [2019-11-15 23:00:33,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:33,836 INFO L462 AbstractCegarLoop]: Abstraction has 27257 states and 76177 transitions. [2019-11-15 23:00:33,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:00:33,836 INFO L276 IsEmpty]: Start isEmpty. Operand 27257 states and 76177 transitions. [2019-11-15 23:00:33,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:00:33,847 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:33,847 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:33,847 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:33,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:33,847 INFO L82 PathProgramCache]: Analyzing trace with hash -684843331, now seen corresponding path program 1 times [2019-11-15 23:00:33,848 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:33,848 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223410946] [2019-11-15 23:00:33,848 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:33,848 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:33,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:33,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:33,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:33,924 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223410946] [2019-11-15 23:00:33,924 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:33,924 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:00:33,924 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [692341194] [2019-11-15 23:00:33,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:00:33,925 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:33,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:00:33,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:33,925 INFO L87 Difference]: Start difference. First operand 27257 states and 76177 transitions. Second operand 5 states. [2019-11-15 23:00:33,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:33,988 INFO L93 Difference]: Finished difference Result 7652 states and 17669 transitions. [2019-11-15 23:00:33,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:00:33,988 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2019-11-15 23:00:33,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:33,996 INFO L225 Difference]: With dead ends: 7652 [2019-11-15 23:00:33,996 INFO L226 Difference]: Without dead ends: 6479 [2019-11-15 23:00:33,996 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:00:34,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6479 states. [2019-11-15 23:00:34,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6479 to 5920. [2019-11-15 23:00:34,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5920 states. [2019-11-15 23:00:34,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5920 states to 5920 states and 13289 transitions. [2019-11-15 23:00:34,055 INFO L78 Accepts]: Start accepts. Automaton has 5920 states and 13289 transitions. Word has length 84 [2019-11-15 23:00:34,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:34,056 INFO L462 AbstractCegarLoop]: Abstraction has 5920 states and 13289 transitions. [2019-11-15 23:00:34,056 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:00:34,056 INFO L276 IsEmpty]: Start isEmpty. Operand 5920 states and 13289 transitions. [2019-11-15 23:00:34,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2019-11-15 23:00:34,060 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:34,060 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:34,060 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:34,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:34,060 INFO L82 PathProgramCache]: Analyzing trace with hash -973912163, now seen corresponding path program 1 times [2019-11-15 23:00:34,060 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:34,061 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012647859] [2019-11-15 23:00:34,061 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:34,061 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:34,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:34,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:34,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:34,109 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012647859] [2019-11-15 23:00:34,109 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:34,110 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:00:34,110 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38207071] [2019-11-15 23:00:34,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:00:34,111 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:34,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:00:34,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:34,111 INFO L87 Difference]: Start difference. First operand 5920 states and 13289 transitions. Second operand 5 states. [2019-11-15 23:00:34,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:34,299 INFO L93 Difference]: Finished difference Result 7176 states and 16129 transitions. [2019-11-15 23:00:34,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:00:34,299 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2019-11-15 23:00:34,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:34,308 INFO L225 Difference]: With dead ends: 7176 [2019-11-15 23:00:34,308 INFO L226 Difference]: Without dead ends: 7176 [2019-11-15 23:00:34,308 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:00:34,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7176 states. [2019-11-15 23:00:34,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7176 to 6397. [2019-11-15 23:00:34,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6397 states. [2019-11-15 23:00:34,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6397 states to 6397 states and 14387 transitions. [2019-11-15 23:00:34,395 INFO L78 Accepts]: Start accepts. Automaton has 6397 states and 14387 transitions. Word has length 88 [2019-11-15 23:00:34,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:34,395 INFO L462 AbstractCegarLoop]: Abstraction has 6397 states and 14387 transitions. [2019-11-15 23:00:34,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:00:34,395 INFO L276 IsEmpty]: Start isEmpty. Operand 6397 states and 14387 transitions. [2019-11-15 23:00:34,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2019-11-15 23:00:34,399 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:34,399 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:34,400 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:34,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:34,400 INFO L82 PathProgramCache]: Analyzing trace with hash 768898172, now seen corresponding path program 1 times [2019-11-15 23:00:34,400 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:34,400 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767723114] [2019-11-15 23:00:34,400 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:34,400 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:34,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:34,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:34,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:34,502 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767723114] [2019-11-15 23:00:34,502 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:34,502 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:00:34,502 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698919255] [2019-11-15 23:00:34,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:00:34,505 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:34,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:00:34,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:00:34,506 INFO L87 Difference]: Start difference. First operand 6397 states and 14387 transitions. Second operand 6 states. [2019-11-15 23:00:34,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:34,995 INFO L93 Difference]: Finished difference Result 8474 states and 19016 transitions. [2019-11-15 23:00:34,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 23:00:34,995 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 88 [2019-11-15 23:00:34,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:35,002 INFO L225 Difference]: With dead ends: 8474 [2019-11-15 23:00:35,002 INFO L226 Difference]: Without dead ends: 8421 [2019-11-15 23:00:35,003 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-15 23:00:35,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8421 states. [2019-11-15 23:00:35,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8421 to 6929. [2019-11-15 23:00:35,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6929 states. [2019-11-15 23:00:35,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6929 states to 6929 states and 15551 transitions. [2019-11-15 23:00:35,087 INFO L78 Accepts]: Start accepts. Automaton has 6929 states and 15551 transitions. Word has length 88 [2019-11-15 23:00:35,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:35,088 INFO L462 AbstractCegarLoop]: Abstraction has 6929 states and 15551 transitions. [2019-11-15 23:00:35,088 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:00:35,088 INFO L276 IsEmpty]: Start isEmpty. Operand 6929 states and 15551 transitions. [2019-11-15 23:00:35,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:00:35,096 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:35,096 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:35,099 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:35,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:35,099 INFO L82 PathProgramCache]: Analyzing trace with hash 104817111, now seen corresponding path program 1 times [2019-11-15 23:00:35,100 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:35,100 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501570755] [2019-11-15 23:00:35,100 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:35,100 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:35,100 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:35,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:35,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:35,193 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501570755] [2019-11-15 23:00:35,194 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:35,194 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:00:35,194 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38164173] [2019-11-15 23:00:35,194 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:00:35,195 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:35,195 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:00:35,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:35,196 INFO L87 Difference]: Start difference. First operand 6929 states and 15551 transitions. Second operand 3 states. [2019-11-15 23:00:35,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:35,424 INFO L93 Difference]: Finished difference Result 8556 states and 18980 transitions. [2019-11-15 23:00:35,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:00:35,424 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 111 [2019-11-15 23:00:35,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:35,434 INFO L225 Difference]: With dead ends: 8556 [2019-11-15 23:00:35,434 INFO L226 Difference]: Without dead ends: 8556 [2019-11-15 23:00:35,435 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:35,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8556 states. [2019-11-15 23:00:35,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8556 to 7125. [2019-11-15 23:00:35,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7125 states. [2019-11-15 23:00:35,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7125 states to 7125 states and 15761 transitions. [2019-11-15 23:00:35,551 INFO L78 Accepts]: Start accepts. Automaton has 7125 states and 15761 transitions. Word has length 111 [2019-11-15 23:00:35,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:35,551 INFO L462 AbstractCegarLoop]: Abstraction has 7125 states and 15761 transitions. [2019-11-15 23:00:35,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:00:35,551 INFO L276 IsEmpty]: Start isEmpty. Operand 7125 states and 15761 transitions. [2019-11-15 23:00:35,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:00:35,559 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:35,559 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:35,560 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:35,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:35,560 INFO L82 PathProgramCache]: Analyzing trace with hash 1089829412, now seen corresponding path program 1 times [2019-11-15 23:00:35,561 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:35,561 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901239901] [2019-11-15 23:00:35,561 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:35,561 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:35,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:35,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:35,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:35,633 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901239901] [2019-11-15 23:00:35,633 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:35,633 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:00:35,633 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [678392262] [2019-11-15 23:00:35,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:00:35,636 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:35,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:00:35,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:00:35,636 INFO L87 Difference]: Start difference. First operand 7125 states and 15761 transitions. Second operand 4 states. [2019-11-15 23:00:35,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:35,767 INFO L93 Difference]: Finished difference Result 7839 states and 17193 transitions. [2019-11-15 23:00:35,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:00:35,767 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 111 [2019-11-15 23:00:35,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:35,776 INFO L225 Difference]: With dead ends: 7839 [2019-11-15 23:00:35,777 INFO L226 Difference]: Without dead ends: 7839 [2019-11-15 23:00:35,777 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:35,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7839 states. [2019-11-15 23:00:35,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7839 to 7176. [2019-11-15 23:00:35,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7176 states. [2019-11-15 23:00:35,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7176 states to 7176 states and 15834 transitions. [2019-11-15 23:00:35,880 INFO L78 Accepts]: Start accepts. Automaton has 7176 states and 15834 transitions. Word has length 111 [2019-11-15 23:00:35,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:35,880 INFO L462 AbstractCegarLoop]: Abstraction has 7176 states and 15834 transitions. [2019-11-15 23:00:35,880 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:00:35,880 INFO L276 IsEmpty]: Start isEmpty. Operand 7176 states and 15834 transitions. [2019-11-15 23:00:35,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:00:35,889 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:35,889 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:35,889 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:35,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:35,890 INFO L82 PathProgramCache]: Analyzing trace with hash 1367550453, now seen corresponding path program 1 times [2019-11-15 23:00:35,890 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:35,890 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905732778] [2019-11-15 23:00:35,890 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:35,891 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:35,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:35,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:35,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:35,989 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905732778] [2019-11-15 23:00:35,989 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:35,990 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:00:35,990 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1963458033] [2019-11-15 23:00:35,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:00:35,990 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:35,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:00:35,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:00:35,992 INFO L87 Difference]: Start difference. First operand 7176 states and 15834 transitions. Second operand 6 states. [2019-11-15 23:00:36,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:36,346 INFO L93 Difference]: Finished difference Result 8570 states and 18844 transitions. [2019-11-15 23:00:36,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:00:36,347 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 113 [2019-11-15 23:00:36,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:36,353 INFO L225 Difference]: With dead ends: 8570 [2019-11-15 23:00:36,353 INFO L226 Difference]: Without dead ends: 8570 [2019-11-15 23:00:36,354 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:00:36,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8570 states. [2019-11-15 23:00:36,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8570 to 7178. [2019-11-15 23:00:36,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7178 states. [2019-11-15 23:00:36,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7178 states to 7178 states and 15825 transitions. [2019-11-15 23:00:36,429 INFO L78 Accepts]: Start accepts. Automaton has 7178 states and 15825 transitions. Word has length 113 [2019-11-15 23:00:36,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:36,429 INFO L462 AbstractCegarLoop]: Abstraction has 7178 states and 15825 transitions. [2019-11-15 23:00:36,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:00:36,429 INFO L276 IsEmpty]: Start isEmpty. Operand 7178 states and 15825 transitions. [2019-11-15 23:00:36,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:00:36,435 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:36,436 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:36,436 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:36,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:36,436 INFO L82 PathProgramCache]: Analyzing trace with hash -642553388, now seen corresponding path program 1 times [2019-11-15 23:00:36,436 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:36,437 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076943105] [2019-11-15 23:00:36,437 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:36,437 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:36,437 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:36,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:36,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:36,505 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076943105] [2019-11-15 23:00:36,505 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:36,506 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:00:36,506 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637716022] [2019-11-15 23:00:36,506 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:00:36,506 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:36,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:00:36,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:00:36,507 INFO L87 Difference]: Start difference. First operand 7178 states and 15825 transitions. Second operand 4 states. [2019-11-15 23:00:36,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:36,887 INFO L93 Difference]: Finished difference Result 8953 states and 19739 transitions. [2019-11-15 23:00:36,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:00:36,888 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2019-11-15 23:00:36,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:36,898 INFO L225 Difference]: With dead ends: 8953 [2019-11-15 23:00:36,898 INFO L226 Difference]: Without dead ends: 8897 [2019-11-15 23:00:36,898 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:36,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8897 states. [2019-11-15 23:00:37,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8897 to 8199. [2019-11-15 23:00:37,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8199 states. [2019-11-15 23:00:37,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8199 states to 8199 states and 18094 transitions. [2019-11-15 23:00:37,017 INFO L78 Accepts]: Start accepts. Automaton has 8199 states and 18094 transitions. Word has length 113 [2019-11-15 23:00:37,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:37,017 INFO L462 AbstractCegarLoop]: Abstraction has 8199 states and 18094 transitions. [2019-11-15 23:00:37,017 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:00:37,017 INFO L276 IsEmpty]: Start isEmpty. Operand 8199 states and 18094 transitions. [2019-11-15 23:00:37,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:00:37,026 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:37,026 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:37,027 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:37,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:37,027 INFO L82 PathProgramCache]: Analyzing trace with hash 319060629, now seen corresponding path program 1 times [2019-11-15 23:00:37,027 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:37,027 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414609366] [2019-11-15 23:00:37,028 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:37,028 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:37,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:37,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:37,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:37,162 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414609366] [2019-11-15 23:00:37,162 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:37,162 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:00:37,162 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [880824814] [2019-11-15 23:00:37,163 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:00:37,163 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:37,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:00:37,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:00:37,164 INFO L87 Difference]: Start difference. First operand 8199 states and 18094 transitions. Second operand 7 states. [2019-11-15 23:00:37,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:37,439 INFO L93 Difference]: Finished difference Result 9323 states and 20511 transitions. [2019-11-15 23:00:37,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:00:37,440 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 113 [2019-11-15 23:00:37,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:37,451 INFO L225 Difference]: With dead ends: 9323 [2019-11-15 23:00:37,451 INFO L226 Difference]: Without dead ends: 9323 [2019-11-15 23:00:37,451 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-11-15 23:00:37,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9323 states. [2019-11-15 23:00:37,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9323 to 7977. [2019-11-15 23:00:37,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7977 states. [2019-11-15 23:00:37,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7977 states to 7977 states and 17499 transitions. [2019-11-15 23:00:37,568 INFO L78 Accepts]: Start accepts. Automaton has 7977 states and 17499 transitions. Word has length 113 [2019-11-15 23:00:37,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:37,568 INFO L462 AbstractCegarLoop]: Abstraction has 7977 states and 17499 transitions. [2019-11-15 23:00:37,568 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:00:37,568 INFO L276 IsEmpty]: Start isEmpty. Operand 7977 states and 17499 transitions. [2019-11-15 23:00:37,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:00:37,577 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:37,578 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:37,578 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:37,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:37,579 INFO L82 PathProgramCache]: Analyzing trace with hash 1563825110, now seen corresponding path program 1 times [2019-11-15 23:00:37,579 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:37,579 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165770514] [2019-11-15 23:00:37,579 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:37,580 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:37,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:37,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:37,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:37,646 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1165770514] [2019-11-15 23:00:37,646 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:37,646 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:00:37,646 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198983522] [2019-11-15 23:00:37,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:00:37,647 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:37,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:00:37,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:37,647 INFO L87 Difference]: Start difference. First operand 7977 states and 17499 transitions. Second operand 3 states. [2019-11-15 23:00:37,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:37,676 INFO L93 Difference]: Finished difference Result 7977 states and 17490 transitions. [2019-11-15 23:00:37,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:00:37,676 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2019-11-15 23:00:37,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:37,685 INFO L225 Difference]: With dead ends: 7977 [2019-11-15 23:00:37,685 INFO L226 Difference]: Without dead ends: 7977 [2019-11-15 23:00:37,685 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:00:37,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7977 states. [2019-11-15 23:00:37,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7977 to 7977. [2019-11-15 23:00:37,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7977 states. [2019-11-15 23:00:37,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7977 states to 7977 states and 17490 transitions. [2019-11-15 23:00:37,792 INFO L78 Accepts]: Start accepts. Automaton has 7977 states and 17490 transitions. Word has length 113 [2019-11-15 23:00:37,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:37,793 INFO L462 AbstractCegarLoop]: Abstraction has 7977 states and 17490 transitions. [2019-11-15 23:00:37,793 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:00:37,793 INFO L276 IsEmpty]: Start isEmpty. Operand 7977 states and 17490 transitions. [2019-11-15 23:00:37,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-11-15 23:00:37,802 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:37,802 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:37,802 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:37,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:37,802 INFO L82 PathProgramCache]: Analyzing trace with hash 807228844, now seen corresponding path program 1 times [2019-11-15 23:00:37,803 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:37,803 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655800791] [2019-11-15 23:00:37,803 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:37,803 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:37,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:37,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:37,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:37,945 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [655800791] [2019-11-15 23:00:37,945 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:37,945 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:00:37,946 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597404932] [2019-11-15 23:00:37,946 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:00:37,946 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:37,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:00:37,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:00:37,947 INFO L87 Difference]: Start difference. First operand 7977 states and 17490 transitions. Second operand 5 states. [2019-11-15 23:00:37,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:37,997 INFO L93 Difference]: Finished difference Result 7977 states and 17481 transitions. [2019-11-15 23:00:37,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:00:37,998 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 115 [2019-11-15 23:00:37,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:38,007 INFO L225 Difference]: With dead ends: 7977 [2019-11-15 23:00:38,007 INFO L226 Difference]: Without dead ends: 7977 [2019-11-15 23:00:38,008 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:00:38,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7977 states. [2019-11-15 23:00:38,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7977 to 7741. [2019-11-15 23:00:38,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7741 states. [2019-11-15 23:00:38,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7741 states to 7741 states and 16954 transitions. [2019-11-15 23:00:38,128 INFO L78 Accepts]: Start accepts. Automaton has 7741 states and 16954 transitions. Word has length 115 [2019-11-15 23:00:38,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:38,129 INFO L462 AbstractCegarLoop]: Abstraction has 7741 states and 16954 transitions. [2019-11-15 23:00:38,129 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:00:38,129 INFO L276 IsEmpty]: Start isEmpty. Operand 7741 states and 16954 transitions. [2019-11-15 23:00:38,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-11-15 23:00:38,139 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:38,140 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:38,140 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:38,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:38,140 INFO L82 PathProgramCache]: Analyzing trace with hash -989722515, now seen corresponding path program 1 times [2019-11-15 23:00:38,141 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:38,141 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032500919] [2019-11-15 23:00:38,141 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:38,141 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:38,141 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:38,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:00:38,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:00:38,301 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032500919] [2019-11-15 23:00:38,301 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:00:38,302 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:00:38,302 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1403298730] [2019-11-15 23:00:38,303 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:00:38,303 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:00:38,303 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:00:38,303 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:00:38,304 INFO L87 Difference]: Start difference. First operand 7741 states and 16954 transitions. Second operand 7 states. [2019-11-15 23:00:38,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:00:38,457 INFO L93 Difference]: Finished difference Result 9106 states and 20075 transitions. [2019-11-15 23:00:38,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:00:38,457 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 115 [2019-11-15 23:00:38,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:00:38,459 INFO L225 Difference]: With dead ends: 9106 [2019-11-15 23:00:38,460 INFO L226 Difference]: Without dead ends: 1508 [2019-11-15 23:00:38,460 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:00:38,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1508 states. [2019-11-15 23:00:38,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1508 to 1508. [2019-11-15 23:00:38,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1508 states. [2019-11-15 23:00:38,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1508 states to 1508 states and 3325 transitions. [2019-11-15 23:00:38,484 INFO L78 Accepts]: Start accepts. Automaton has 1508 states and 3325 transitions. Word has length 115 [2019-11-15 23:00:38,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:00:38,485 INFO L462 AbstractCegarLoop]: Abstraction has 1508 states and 3325 transitions. [2019-11-15 23:00:38,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:00:38,485 INFO L276 IsEmpty]: Start isEmpty. Operand 1508 states and 3325 transitions. [2019-11-15 23:00:38,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-11-15 23:00:38,487 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:00:38,488 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:00:38,488 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:00:38,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:00:38,489 INFO L82 PathProgramCache]: Analyzing trace with hash -1044850689, now seen corresponding path program 2 times [2019-11-15 23:00:38,489 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:00:38,489 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329818817] [2019-11-15 23:00:38,489 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:38,490 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:00:38,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:00:38,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:00:38,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:00:38,660 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 23:00:38,660 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 23:00:38,916 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 23:00:38,917 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 11:00:38 BasicIcfg [2019-11-15 23:00:38,917 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 23:00:38,918 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 23:00:38,918 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 23:00:38,918 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 23:00:38,919 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:59:34" (3/4) ... [2019-11-15 23:00:38,921 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 23:00:39,144 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_3ff8bee5-9062-4b0b-a8e8-de5eb073bea4/bin/uautomizer/witness.graphml [2019-11-15 23:00:39,144 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 23:00:39,148 INFO L168 Benchmark]: Toolchain (without parser) took 66829.01 ms. Allocated memory was 1.0 GB in the beginning and 4.2 GB in the end (delta: 3.2 GB). Free memory was 944.7 MB in the beginning and 2.3 GB in the end (delta: -1.4 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-11-15 23:00:39,148 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:00:39,149 INFO L168 Benchmark]: CACSL2BoogieTranslator took 843.92 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 162.0 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -174.8 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2019-11-15 23:00:39,149 INFO L168 Benchmark]: Boogie Procedure Inliner took 54.63 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:00:39,149 INFO L168 Benchmark]: Boogie Preprocessor took 87.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.5 MB). Peak memory consumption was 6.5 MB. Max. memory is 11.5 GB. [2019-11-15 23:00:39,150 INFO L168 Benchmark]: RCFGBuilder took 1174.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 59.8 MB). Peak memory consumption was 59.8 MB. Max. memory is 11.5 GB. [2019-11-15 23:00:39,152 INFO L168 Benchmark]: TraceAbstraction took 64430.71 ms. Allocated memory was 1.2 GB in the beginning and 4.2 GB in the end (delta: 3.0 GB). Free memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2019-11-15 23:00:39,152 INFO L168 Benchmark]: Witness Printer took 226.73 ms. Allocated memory is still 4.2 GB. Free memory was 2.5 GB in the beginning and 2.3 GB in the end (delta: 107.5 MB). Peak memory consumption was 107.5 MB. Max. memory is 11.5 GB. [2019-11-15 23:00:39,154 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 843.92 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 162.0 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -174.8 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 54.63 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 87.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.5 MB). Peak memory consumption was 6.5 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1174.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 59.8 MB). Peak memory consumption was 59.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 64430.71 ms. Allocated memory was 1.2 GB in the beginning and 4.2 GB in the end (delta: 3.0 GB). Free memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. * Witness Printer took 226.73 ms. Allocated memory is still 4.2 GB. Free memory was 2.5 GB in the beginning and 2.3 GB in the end (delta: 107.5 MB). Peak memory consumption was 107.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L698] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L699] 0 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L705] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L706] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L707] 0 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L708] 0 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L709] 0 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L710] 0 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L711] 0 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L712] 0 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L713] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L714] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L716] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}] [L717] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0] [L718] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0] [L719] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L720] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L721] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L722] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L723] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L724] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L725] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L726] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L727] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L728] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L729] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L730] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L732] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L733] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L734] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L735] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L811] 0 pthread_t t2667; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L812] FCALL, FORK 0 pthread_create(&t2667, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L813] 0 pthread_t t2668; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L814] FCALL, FORK 0 pthread_create(&t2668, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L767] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L768] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L769] 2 x$flush_delayed = weak$$choice2 [L770] EXPR 2 \read(x) [L770] 2 x$mem_tmp = x [L771] 2 weak$$choice1 = __VERIFIER_nondet_bool() [L772] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L772] EXPR 2 \read(x) [L772] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) VAL [!x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L772] 2 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L773] EXPR 2 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))))=0, x={1:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L773] 2 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L774] EXPR 2 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))=0, x={1:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L774] 2 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L775] EXPR 2 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))=0, x={1:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L775] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L776] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={1:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L776] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L777] EXPR 2 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={1:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L777] 2 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L778] EXPR 2 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={1:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 2 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L779] 2 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L780] 2 __unbuffered_p1_EAX$read_delayed_var = &x [L781] EXPR 2 \read(x) [L781] 2 __unbuffered_p1_EAX = x [L782] EXPR 2 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=1, x$flush_delayed ? x$mem_tmp : x=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L782] 2 x = x$flush_delayed ? x$mem_tmp : x [L783] 2 x$flush_delayed = (_Bool)0 [L786] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L739] 1 __unbuffered_p0_EAX = y [L742] 1 x$w_buff1 = x$w_buff0 [L743] 1 x$w_buff0 = 1 [L744] 1 x$w_buff1_used = x$w_buff0_used [L745] 1 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L747] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 1 x$r_buff0_thd1 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L754] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L789] EXPR 2 \read(x) [L789] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x VAL [\read(x)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=1, y=1] [L789] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\read(x)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=1, y=1] [L789] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L790] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L790] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L791] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L755] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L755] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L757] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L757] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L760] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L791] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L792] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L792] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L793] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L793] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L796] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L816] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L820] EXPR 0 \read(x) [L820] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L821] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L821] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L822] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L822] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L823] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L823] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L824] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L824] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L827] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L828] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L828] EXPR 0 \read(*__unbuffered_p1_EAX$read_delayed_var) [L828] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] 0 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L829] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={1:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={1:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 314 locations, 3 error locations. Result: UNSAFE, OverallTime: 64.1s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 20.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10361 SDtfs, 11986 SDslu, 20131 SDs, 0 SdLazy, 7538 SolverSat, 706 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 252 GetRequests, 73 SyntacticMatches, 13 SemanticMatches, 166 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 1.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=139509occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 34.0s AutomataMinimizationTime, 29 MinimizatonAttempts, 134949 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.1s InterpolantComputationTime, 2593 NumberOfCodeBlocks, 2593 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 2449 ConstructedInterpolants, 0 QuantifiedInterpolants, 512415 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...