./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/token_ring.03.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/token_ring.03.cil-1.c -s /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 69fb30bd96659b6c61b59030d7ea8c3053fedc35 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:44:20,525 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:44:20,527 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:44:20,546 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:44:20,547 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:44:20,548 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:44:20,550 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:44:20,561 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:44:20,566 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:44:20,569 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:44:20,570 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:44:20,571 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:44:20,571 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:44:20,572 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:44:20,573 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:44:20,573 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:44:20,574 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:44:20,575 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:44:20,577 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:44:20,578 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:44:20,580 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:44:20,585 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:44:20,588 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:44:20,589 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:44:20,594 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:44:20,595 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:44:20,595 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:44:20,597 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:44:20,597 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:44:20,599 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:44:20,599 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:44:20,600 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:44:20,601 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:44:20,602 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:44:20,605 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:44:20,605 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:44:20,606 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:44:20,607 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:44:20,607 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:44:20,608 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:44:20,608 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:44:20,609 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:44:20,637 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:44:20,637 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:44:20,639 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:44:20,639 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:44:20,639 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:44:20,639 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:44:20,640 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:44:20,640 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:44:20,640 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:44:20,640 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:44:20,640 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:44:20,641 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:44:20,641 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:44:20,641 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:44:20,641 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:44:20,642 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:44:20,642 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:44:20,642 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:44:20,642 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:44:20,643 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:44:20,643 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:44:20,643 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:44:20,643 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:44:20,644 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:44:20,644 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:44:20,644 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:44:20,644 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:44:20,655 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:44:20,655 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 69fb30bd96659b6c61b59030d7ea8c3053fedc35 [2019-11-15 20:44:20,682 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:44:20,695 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:44:20,700 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:44:20,701 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:44:20,701 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:44:20,702 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/../../sv-benchmarks/c/systemc/token_ring.03.cil-1.c [2019-11-15 20:44:20,762 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/data/9669bd507/4424a30c25c847478b1476f8108d137d/FLAGe07e804c1 [2019-11-15 20:44:21,215 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:44:21,216 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/sv-benchmarks/c/systemc/token_ring.03.cil-1.c [2019-11-15 20:44:21,226 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/data/9669bd507/4424a30c25c847478b1476f8108d137d/FLAGe07e804c1 [2019-11-15 20:44:21,727 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/data/9669bd507/4424a30c25c847478b1476f8108d137d [2019-11-15 20:44:21,730 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:44:21,732 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:44:21,733 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:44:21,733 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:44:21,736 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:44:21,737 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:44:21" (1/1) ... [2019-11-15 20:44:21,740 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@69e3e7c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:21, skipping insertion in model container [2019-11-15 20:44:21,741 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:44:21" (1/1) ... [2019-11-15 20:44:21,749 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:44:21,785 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:44:22,110 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:44:22,123 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:44:22,179 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:44:22,202 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:44:22,202 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22 WrapperNode [2019-11-15 20:44:22,203 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:44:22,204 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:44:22,204 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:44:22,204 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:44:22,214 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,222 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,284 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:44:22,285 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:44:22,285 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:44:22,285 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:44:22,294 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,295 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,301 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,312 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,342 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,354 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,358 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... [2019-11-15 20:44:22,364 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:44:22,364 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:44:22,364 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:44:22,364 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:44:22,365 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:44:22,448 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:44:22,448 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:44:23,801 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:44:23,801 INFO L284 CfgBuilder]: Removed 132 assume(true) statements. [2019-11-15 20:44:23,803 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:44:23 BoogieIcfgContainer [2019-11-15 20:44:23,803 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:44:23,804 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:44:23,804 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:44:23,807 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:44:23,807 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:44:21" (1/3) ... [2019-11-15 20:44:23,808 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@391c1171 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:44:23, skipping insertion in model container [2019-11-15 20:44:23,808 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:44:22" (2/3) ... [2019-11-15 20:44:23,811 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@391c1171 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:44:23, skipping insertion in model container [2019-11-15 20:44:23,811 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:44:23" (3/3) ... [2019-11-15 20:44:23,813 INFO L109 eAbstractionObserver]: Analyzing ICFG token_ring.03.cil-1.c [2019-11-15 20:44:23,824 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:44:23,836 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-15 20:44:23,847 INFO L249 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2019-11-15 20:44:23,877 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:44:23,877 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:44:23,877 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:44:23,877 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:44:23,877 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:44:23,878 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:44:23,878 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:44:23,878 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:44:23,904 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states. [2019-11-15 20:44:23,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:23,913 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:23,914 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:23,916 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:23,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:23,922 INFO L82 PathProgramCache]: Analyzing trace with hash -1976596934, now seen corresponding path program 1 times [2019-11-15 20:44:23,929 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:23,929 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125509555] [2019-11-15 20:44:23,930 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:23,930 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:23,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:24,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:24,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:24,092 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1125509555] [2019-11-15 20:44:24,093 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:24,093 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:24,094 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [97721060] [2019-11-15 20:44:24,098 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:24,098 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:24,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:24,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,114 INFO L87 Difference]: Start difference. First operand 316 states. Second operand 3 states. [2019-11-15 20:44:24,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:24,189 INFO L93 Difference]: Finished difference Result 627 states and 979 transitions. [2019-11-15 20:44:24,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:24,191 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:24,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:24,206 INFO L225 Difference]: With dead ends: 627 [2019-11-15 20:44:24,206 INFO L226 Difference]: Without dead ends: 312 [2019-11-15 20:44:24,211 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2019-11-15 20:44:24,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 312. [2019-11-15 20:44:24,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 312 states. [2019-11-15 20:44:24,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 474 transitions. [2019-11-15 20:44:24,279 INFO L78 Accepts]: Start accepts. Automaton has 312 states and 474 transitions. Word has length 61 [2019-11-15 20:44:24,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:24,279 INFO L462 AbstractCegarLoop]: Abstraction has 312 states and 474 transitions. [2019-11-15 20:44:24,280 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:24,280 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 474 transitions. [2019-11-15 20:44:24,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:24,283 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:24,283 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:24,283 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:24,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:24,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1057453112, now seen corresponding path program 1 times [2019-11-15 20:44:24,284 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:24,284 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210580204] [2019-11-15 20:44:24,284 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,285 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:24,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:24,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:24,347 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210580204] [2019-11-15 20:44:24,347 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:24,347 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:24,348 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1355052482] [2019-11-15 20:44:24,349 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:24,350 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:24,350 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:24,350 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,350 INFO L87 Difference]: Start difference. First operand 312 states and 474 transitions. Second operand 3 states. [2019-11-15 20:44:24,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:24,423 INFO L93 Difference]: Finished difference Result 848 states and 1286 transitions. [2019-11-15 20:44:24,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:24,428 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:24,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:24,437 INFO L225 Difference]: With dead ends: 848 [2019-11-15 20:44:24,439 INFO L226 Difference]: Without dead ends: 544 [2019-11-15 20:44:24,441 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 544 states. [2019-11-15 20:44:24,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 544 to 540. [2019-11-15 20:44:24,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-11-15 20:44:24,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 818 transitions. [2019-11-15 20:44:24,496 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 818 transitions. Word has length 61 [2019-11-15 20:44:24,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:24,496 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 818 transitions. [2019-11-15 20:44:24,496 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:24,497 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 818 transitions. [2019-11-15 20:44:24,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:24,499 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:24,499 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:24,500 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:24,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:24,500 INFO L82 PathProgramCache]: Analyzing trace with hash 1933472118, now seen corresponding path program 1 times [2019-11-15 20:44:24,500 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:24,501 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483674196] [2019-11-15 20:44:24,501 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,501 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:24,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:24,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:24,547 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483674196] [2019-11-15 20:44:24,547 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:24,548 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:24,548 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024698462] [2019-11-15 20:44:24,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:24,549 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:24,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:24,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,550 INFO L87 Difference]: Start difference. First operand 540 states and 818 transitions. Second operand 3 states. [2019-11-15 20:44:24,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:24,606 INFO L93 Difference]: Finished difference Result 1071 states and 1623 transitions. [2019-11-15 20:44:24,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:24,607 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:24,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:24,612 INFO L225 Difference]: With dead ends: 1071 [2019-11-15 20:44:24,612 INFO L226 Difference]: Without dead ends: 540 [2019-11-15 20:44:24,614 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-11-15 20:44:24,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-11-15 20:44:24,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-11-15 20:44:24,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 810 transitions. [2019-11-15 20:44:24,682 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 810 transitions. Word has length 61 [2019-11-15 20:44:24,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:24,683 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 810 transitions. [2019-11-15 20:44:24,683 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:24,683 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 810 transitions. [2019-11-15 20:44:24,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:24,693 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:24,694 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:24,694 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:24,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:24,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1494892678, now seen corresponding path program 1 times [2019-11-15 20:44:24,695 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:24,695 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1856974754] [2019-11-15 20:44:24,695 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,696 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:24,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:24,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:24,779 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1856974754] [2019-11-15 20:44:24,779 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:24,780 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:24,780 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038077995] [2019-11-15 20:44:24,781 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:24,782 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:24,783 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:24,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,783 INFO L87 Difference]: Start difference. First operand 540 states and 810 transitions. Second operand 3 states. [2019-11-15 20:44:24,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:24,827 INFO L93 Difference]: Finished difference Result 1070 states and 1606 transitions. [2019-11-15 20:44:24,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:24,828 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:24,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:24,832 INFO L225 Difference]: With dead ends: 1070 [2019-11-15 20:44:24,832 INFO L226 Difference]: Without dead ends: 540 [2019-11-15 20:44:24,834 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-11-15 20:44:24,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-11-15 20:44:24,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-11-15 20:44:24,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 802 transitions. [2019-11-15 20:44:24,866 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 802 transitions. Word has length 61 [2019-11-15 20:44:24,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:24,866 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 802 transitions. [2019-11-15 20:44:24,867 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:24,867 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 802 transitions. [2019-11-15 20:44:24,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:24,868 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:24,868 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:24,869 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:24,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:24,869 INFO L82 PathProgramCache]: Analyzing trace with hash -774201098, now seen corresponding path program 1 times [2019-11-15 20:44:24,870 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:24,870 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723569140] [2019-11-15 20:44:24,870 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,870 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:24,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:24,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:24,952 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723569140] [2019-11-15 20:44:24,953 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:24,953 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:24,953 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118386009] [2019-11-15 20:44:24,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:24,954 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:24,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:24,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:24,954 INFO L87 Difference]: Start difference. First operand 540 states and 802 transitions. Second operand 3 states. [2019-11-15 20:44:25,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:25,002 INFO L93 Difference]: Finished difference Result 1069 states and 1589 transitions. [2019-11-15 20:44:25,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:25,003 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:25,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:25,006 INFO L225 Difference]: With dead ends: 1069 [2019-11-15 20:44:25,007 INFO L226 Difference]: Without dead ends: 540 [2019-11-15 20:44:25,009 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-11-15 20:44:25,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-11-15 20:44:25,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-11-15 20:44:25,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 794 transitions. [2019-11-15 20:44:25,039 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 794 transitions. Word has length 61 [2019-11-15 20:44:25,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:25,039 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 794 transitions. [2019-11-15 20:44:25,039 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:25,040 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 794 transitions. [2019-11-15 20:44:25,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:25,041 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:25,041 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:25,042 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:25,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:25,042 INFO L82 PathProgramCache]: Analyzing trace with hash -196763654, now seen corresponding path program 1 times [2019-11-15 20:44:25,042 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:25,043 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484887069] [2019-11-15 20:44:25,043 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,043 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:25,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:25,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:25,108 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484887069] [2019-11-15 20:44:25,109 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:25,109 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:25,109 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112395347] [2019-11-15 20:44:25,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:25,110 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:25,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:25,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,111 INFO L87 Difference]: Start difference. First operand 540 states and 794 transitions. Second operand 3 states. [2019-11-15 20:44:25,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:25,192 INFO L93 Difference]: Finished difference Result 1068 states and 1572 transitions. [2019-11-15 20:44:25,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:25,194 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:25,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:25,198 INFO L225 Difference]: With dead ends: 1068 [2019-11-15 20:44:25,198 INFO L226 Difference]: Without dead ends: 540 [2019-11-15 20:44:25,201 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-11-15 20:44:25,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-11-15 20:44:25,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-11-15 20:44:25,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 776 transitions. [2019-11-15 20:44:25,243 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 776 transitions. Word has length 61 [2019-11-15 20:44:25,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:25,243 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 776 transitions. [2019-11-15 20:44:25,244 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:25,244 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 776 transitions. [2019-11-15 20:44:25,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:25,246 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:25,246 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:25,246 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:25,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:25,248 INFO L82 PathProgramCache]: Analyzing trace with hash 749500983, now seen corresponding path program 1 times [2019-11-15 20:44:25,248 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:25,248 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851656821] [2019-11-15 20:44:25,249 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,249 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:25,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:25,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:25,354 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851656821] [2019-11-15 20:44:25,355 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:25,355 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:25,355 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467996467] [2019-11-15 20:44:25,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:25,356 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:25,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:25,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,357 INFO L87 Difference]: Start difference. First operand 540 states and 776 transitions. Second operand 3 states. [2019-11-15 20:44:25,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:25,432 INFO L93 Difference]: Finished difference Result 1066 states and 1533 transitions. [2019-11-15 20:44:25,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:25,433 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:25,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:25,437 INFO L225 Difference]: With dead ends: 1066 [2019-11-15 20:44:25,438 INFO L226 Difference]: Without dead ends: 540 [2019-11-15 20:44:25,439 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-11-15 20:44:25,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-11-15 20:44:25,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-11-15 20:44:25,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 758 transitions. [2019-11-15 20:44:25,467 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 758 transitions. Word has length 61 [2019-11-15 20:44:25,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:25,467 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 758 transitions. [2019-11-15 20:44:25,468 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:25,468 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 758 transitions. [2019-11-15 20:44:25,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:25,468 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:25,469 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:25,469 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:25,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:25,469 INFO L82 PathProgramCache]: Analyzing trace with hash 91036916, now seen corresponding path program 1 times [2019-11-15 20:44:25,470 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:25,470 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706591794] [2019-11-15 20:44:25,470 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,470 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:25,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:25,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:25,526 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1706591794] [2019-11-15 20:44:25,526 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:25,526 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:25,526 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1897340029] [2019-11-15 20:44:25,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:25,527 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:25,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:25,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,528 INFO L87 Difference]: Start difference. First operand 540 states and 758 transitions. Second operand 3 states. [2019-11-15 20:44:25,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:25,593 INFO L93 Difference]: Finished difference Result 1065 states and 1496 transitions. [2019-11-15 20:44:25,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:25,594 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:25,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:25,598 INFO L225 Difference]: With dead ends: 1065 [2019-11-15 20:44:25,598 INFO L226 Difference]: Without dead ends: 540 [2019-11-15 20:44:25,600 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-11-15 20:44:25,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-11-15 20:44:25,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-11-15 20:44:25,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 740 transitions. [2019-11-15 20:44:25,631 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 740 transitions. Word has length 61 [2019-11-15 20:44:25,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:25,631 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 740 transitions. [2019-11-15 20:44:25,631 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:25,632 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 740 transitions. [2019-11-15 20:44:25,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:25,632 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:25,633 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:25,633 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:25,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:25,633 INFO L82 PathProgramCache]: Analyzing trace with hash 1080534521, now seen corresponding path program 1 times [2019-11-15 20:44:25,634 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:25,634 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [159506517] [2019-11-15 20:44:25,634 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,634 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,635 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:25,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:25,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:25,707 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [159506517] [2019-11-15 20:44:25,708 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:25,708 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:25,708 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [150969754] [2019-11-15 20:44:25,708 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:25,709 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:25,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:25,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,709 INFO L87 Difference]: Start difference. First operand 540 states and 740 transitions. Second operand 3 states. [2019-11-15 20:44:25,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:25,779 INFO L93 Difference]: Finished difference Result 1067 states and 1463 transitions. [2019-11-15 20:44:25,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:25,780 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:25,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:25,784 INFO L225 Difference]: With dead ends: 1067 [2019-11-15 20:44:25,784 INFO L226 Difference]: Without dead ends: 540 [2019-11-15 20:44:25,785 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-11-15 20:44:25,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-11-15 20:44:25,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-11-15 20:44:25,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 722 transitions. [2019-11-15 20:44:25,814 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 722 transitions. Word has length 61 [2019-11-15 20:44:25,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:25,815 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 722 transitions. [2019-11-15 20:44:25,815 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:25,815 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 722 transitions. [2019-11-15 20:44:25,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 20:44:25,816 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:25,817 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:25,819 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:25,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:25,819 INFO L82 PathProgramCache]: Analyzing trace with hash -507813381, now seen corresponding path program 1 times [2019-11-15 20:44:25,820 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:25,820 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042271507] [2019-11-15 20:44:25,820 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,820 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,820 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:25,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:25,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:25,866 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2042271507] [2019-11-15 20:44:25,867 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:25,867 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:25,868 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835157296] [2019-11-15 20:44:25,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:25,869 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:25,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:25,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,870 INFO L87 Difference]: Start difference. First operand 540 states and 722 transitions. Second operand 3 states. [2019-11-15 20:44:25,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:25,962 INFO L93 Difference]: Finished difference Result 1522 states and 2039 transitions. [2019-11-15 20:44:25,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:25,963 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 20:44:25,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:25,970 INFO L225 Difference]: With dead ends: 1522 [2019-11-15 20:44:25,970 INFO L226 Difference]: Without dead ends: 999 [2019-11-15 20:44:25,972 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:25,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 999 states. [2019-11-15 20:44:26,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 999 to 947. [2019-11-15 20:44:26,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 947 states. [2019-11-15 20:44:26,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 947 states to 947 states and 1256 transitions. [2019-11-15 20:44:26,021 INFO L78 Accepts]: Start accepts. Automaton has 947 states and 1256 transitions. Word has length 61 [2019-11-15 20:44:26,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:26,022 INFO L462 AbstractCegarLoop]: Abstraction has 947 states and 1256 transitions. [2019-11-15 20:44:26,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:26,022 INFO L276 IsEmpty]: Start isEmpty. Operand 947 states and 1256 transitions. [2019-11-15 20:44:26,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-11-15 20:44:26,024 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:26,024 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:26,025 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:26,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:26,025 INFO L82 PathProgramCache]: Analyzing trace with hash -624063038, now seen corresponding path program 1 times [2019-11-15 20:44:26,025 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:26,026 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074938640] [2019-11-15 20:44:26,026 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,026 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:26,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:26,109 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:26,109 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074938640] [2019-11-15 20:44:26,109 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:26,110 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:26,110 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712272701] [2019-11-15 20:44:26,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:26,110 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:26,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:26,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:26,111 INFO L87 Difference]: Start difference. First operand 947 states and 1256 transitions. Second operand 3 states. [2019-11-15 20:44:26,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:26,245 INFO L93 Difference]: Finished difference Result 2713 states and 3613 transitions. [2019-11-15 20:44:26,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:26,246 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2019-11-15 20:44:26,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:26,261 INFO L225 Difference]: With dead ends: 2713 [2019-11-15 20:44:26,261 INFO L226 Difference]: Without dead ends: 1789 [2019-11-15 20:44:26,263 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:26,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1789 states. [2019-11-15 20:44:26,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1789 to 1701. [2019-11-15 20:44:26,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1701 states. [2019-11-15 20:44:26,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1701 states to 1701 states and 2254 transitions. [2019-11-15 20:44:26,359 INFO L78 Accepts]: Start accepts. Automaton has 1701 states and 2254 transitions. Word has length 99 [2019-11-15 20:44:26,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:26,359 INFO L462 AbstractCegarLoop]: Abstraction has 1701 states and 2254 transitions. [2019-11-15 20:44:26,360 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:26,360 INFO L276 IsEmpty]: Start isEmpty. Operand 1701 states and 2254 transitions. [2019-11-15 20:44:26,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-11-15 20:44:26,362 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:26,362 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:26,362 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:26,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:26,363 INFO L82 PathProgramCache]: Analyzing trace with hash 2094346499, now seen corresponding path program 1 times [2019-11-15 20:44:26,363 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:26,363 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682674920] [2019-11-15 20:44:26,363 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,364 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:26,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:26,434 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:26,435 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682674920] [2019-11-15 20:44:26,435 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:26,435 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:44:26,435 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1741095660] [2019-11-15 20:44:26,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:44:26,436 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:26,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:44:26,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:44:26,437 INFO L87 Difference]: Start difference. First operand 1701 states and 2254 transitions. Second operand 5 states. [2019-11-15 20:44:26,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:26,720 INFO L93 Difference]: Finished difference Result 3741 states and 4988 transitions. [2019-11-15 20:44:26,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:44:26,721 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2019-11-15 20:44:26,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:26,734 INFO L225 Difference]: With dead ends: 3741 [2019-11-15 20:44:26,734 INFO L226 Difference]: Without dead ends: 2067 [2019-11-15 20:44:26,737 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:26,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2067 states. [2019-11-15 20:44:26,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2067 to 1707. [2019-11-15 20:44:26,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1707 states. [2019-11-15 20:44:26,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1707 states to 1707 states and 2225 transitions. [2019-11-15 20:44:26,841 INFO L78 Accepts]: Start accepts. Automaton has 1707 states and 2225 transitions. Word has length 99 [2019-11-15 20:44:26,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:26,842 INFO L462 AbstractCegarLoop]: Abstraction has 1707 states and 2225 transitions. [2019-11-15 20:44:26,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:44:26,843 INFO L276 IsEmpty]: Start isEmpty. Operand 1707 states and 2225 transitions. [2019-11-15 20:44:26,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-11-15 20:44:26,845 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:26,845 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:26,845 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:26,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:26,846 INFO L82 PathProgramCache]: Analyzing trace with hash 1569507335, now seen corresponding path program 1 times [2019-11-15 20:44:26,846 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:26,846 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [739582280] [2019-11-15 20:44:26,847 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,847 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,847 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:26,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:26,908 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:26,908 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [739582280] [2019-11-15 20:44:26,908 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:26,909 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:44:26,909 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [165796899] [2019-11-15 20:44:26,909 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:44:26,910 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:26,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:44:26,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:44:26,911 INFO L87 Difference]: Start difference. First operand 1707 states and 2225 transitions. Second operand 5 states. [2019-11-15 20:44:27,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:27,175 INFO L93 Difference]: Finished difference Result 4182 states and 5468 transitions. [2019-11-15 20:44:27,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:44:27,177 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2019-11-15 20:44:27,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:27,192 INFO L225 Difference]: With dead ends: 4182 [2019-11-15 20:44:27,192 INFO L226 Difference]: Without dead ends: 2509 [2019-11-15 20:44:27,196 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:27,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2509 states. [2019-11-15 20:44:27,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2509 to 1719. [2019-11-15 20:44:27,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1719 states. [2019-11-15 20:44:27,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1719 states to 1719 states and 2204 transitions. [2019-11-15 20:44:27,302 INFO L78 Accepts]: Start accepts. Automaton has 1719 states and 2204 transitions. Word has length 99 [2019-11-15 20:44:27,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:27,303 INFO L462 AbstractCegarLoop]: Abstraction has 1719 states and 2204 transitions. [2019-11-15 20:44:27,303 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:44:27,303 INFO L276 IsEmpty]: Start isEmpty. Operand 1719 states and 2204 transitions. [2019-11-15 20:44:27,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-11-15 20:44:27,305 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:27,305 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:27,306 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:27,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:27,306 INFO L82 PathProgramCache]: Analyzing trace with hash -1452084725, now seen corresponding path program 1 times [2019-11-15 20:44:27,306 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:27,306 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073406992] [2019-11-15 20:44:27,306 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:27,307 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:27,307 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:27,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:27,352 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:27,353 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073406992] [2019-11-15 20:44:27,353 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:27,353 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:44:27,353 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837859828] [2019-11-15 20:44:27,354 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:44:27,354 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:27,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:44:27,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:44:27,355 INFO L87 Difference]: Start difference. First operand 1719 states and 2204 transitions. Second operand 5 states. [2019-11-15 20:44:27,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:27,736 INFO L93 Difference]: Finished difference Result 4879 states and 6330 transitions. [2019-11-15 20:44:27,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:44:27,736 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2019-11-15 20:44:27,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:27,756 INFO L225 Difference]: With dead ends: 4879 [2019-11-15 20:44:27,756 INFO L226 Difference]: Without dead ends: 3201 [2019-11-15 20:44:27,760 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:27,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3201 states. [2019-11-15 20:44:27,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3201 to 1743. [2019-11-15 20:44:27,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1743 states. [2019-11-15 20:44:27,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1743 states to 1743 states and 2199 transitions. [2019-11-15 20:44:27,903 INFO L78 Accepts]: Start accepts. Automaton has 1743 states and 2199 transitions. Word has length 99 [2019-11-15 20:44:27,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:27,903 INFO L462 AbstractCegarLoop]: Abstraction has 1743 states and 2199 transitions. [2019-11-15 20:44:27,903 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:44:27,904 INFO L276 IsEmpty]: Start isEmpty. Operand 1743 states and 2199 transitions. [2019-11-15 20:44:27,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-11-15 20:44:27,906 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:27,906 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:27,906 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:27,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:27,907 INFO L82 PathProgramCache]: Analyzing trace with hash -1078857969, now seen corresponding path program 1 times [2019-11-15 20:44:27,907 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:27,907 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842826386] [2019-11-15 20:44:27,907 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:27,907 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:27,908 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:27,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:27,962 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:27,962 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842826386] [2019-11-15 20:44:27,963 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:27,963 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:27,963 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [481160704] [2019-11-15 20:44:27,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:27,964 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:27,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:27,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:27,964 INFO L87 Difference]: Start difference. First operand 1743 states and 2199 transitions. Second operand 3 states. [2019-11-15 20:44:28,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:28,181 INFO L93 Difference]: Finished difference Result 4925 states and 6187 transitions. [2019-11-15 20:44:28,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:28,182 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2019-11-15 20:44:28,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:28,198 INFO L225 Difference]: With dead ends: 4925 [2019-11-15 20:44:28,198 INFO L226 Difference]: Without dead ends: 3231 [2019-11-15 20:44:28,203 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:28,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3231 states. [2019-11-15 20:44:28,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3231 to 3227. [2019-11-15 20:44:28,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3227 states. [2019-11-15 20:44:28,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3227 states to 3227 states and 4009 transitions. [2019-11-15 20:44:28,426 INFO L78 Accepts]: Start accepts. Automaton has 3227 states and 4009 transitions. Word has length 99 [2019-11-15 20:44:28,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:28,427 INFO L462 AbstractCegarLoop]: Abstraction has 3227 states and 4009 transitions. [2019-11-15 20:44:28,427 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:28,427 INFO L276 IsEmpty]: Start isEmpty. Operand 3227 states and 4009 transitions. [2019-11-15 20:44:28,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-11-15 20:44:28,430 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:28,430 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:28,430 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:28,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:28,431 INFO L82 PathProgramCache]: Analyzing trace with hash -1872181795, now seen corresponding path program 1 times [2019-11-15 20:44:28,431 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:28,431 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896033892] [2019-11-15 20:44:28,431 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:28,431 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:28,432 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:28,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:28,480 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:28,483 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1896033892] [2019-11-15 20:44:28,485 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:28,486 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:28,486 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1805386968] [2019-11-15 20:44:28,486 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:28,486 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:28,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:28,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:28,487 INFO L87 Difference]: Start difference. First operand 3227 states and 4009 transitions. Second operand 3 states. [2019-11-15 20:44:28,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:28,933 INFO L93 Difference]: Finished difference Result 9026 states and 11196 transitions. [2019-11-15 20:44:28,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:28,934 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2019-11-15 20:44:28,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:28,968 INFO L225 Difference]: With dead ends: 9026 [2019-11-15 20:44:28,968 INFO L226 Difference]: Without dead ends: 5848 [2019-11-15 20:44:28,974 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:28,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5848 states. [2019-11-15 20:44:29,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5848 to 5844. [2019-11-15 20:44:29,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5844 states. [2019-11-15 20:44:29,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5844 states to 5844 states and 7200 transitions. [2019-11-15 20:44:29,365 INFO L78 Accepts]: Start accepts. Automaton has 5844 states and 7200 transitions. Word has length 100 [2019-11-15 20:44:29,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:29,365 INFO L462 AbstractCegarLoop]: Abstraction has 5844 states and 7200 transitions. [2019-11-15 20:44:29,366 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:29,366 INFO L276 IsEmpty]: Start isEmpty. Operand 5844 states and 7200 transitions. [2019-11-15 20:44:29,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-11-15 20:44:29,369 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:29,370 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:29,370 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:29,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:29,371 INFO L82 PathProgramCache]: Analyzing trace with hash -520796577, now seen corresponding path program 1 times [2019-11-15 20:44:29,371 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:29,371 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299672457] [2019-11-15 20:44:29,371 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:29,371 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:29,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:29,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:29,399 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-11-15 20:44:29,400 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299672457] [2019-11-15 20:44:29,400 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:29,400 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:29,400 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436083001] [2019-11-15 20:44:29,401 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:29,401 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:29,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:29,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:29,402 INFO L87 Difference]: Start difference. First operand 5844 states and 7200 transitions. Second operand 3 states. [2019-11-15 20:44:29,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:29,870 INFO L93 Difference]: Finished difference Result 11596 states and 14298 transitions. [2019-11-15 20:44:29,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:29,871 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2019-11-15 20:44:29,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:29,910 INFO L225 Difference]: With dead ends: 11596 [2019-11-15 20:44:29,910 INFO L226 Difference]: Without dead ends: 5801 [2019-11-15 20:44:29,917 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:29,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5801 states. [2019-11-15 20:44:30,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5801 to 5801. [2019-11-15 20:44:30,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5801 states. [2019-11-15 20:44:30,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5801 states to 5801 states and 7152 transitions. [2019-11-15 20:44:30,276 INFO L78 Accepts]: Start accepts. Automaton has 5801 states and 7152 transitions. Word has length 100 [2019-11-15 20:44:30,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:30,276 INFO L462 AbstractCegarLoop]: Abstraction has 5801 states and 7152 transitions. [2019-11-15 20:44:30,277 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:30,277 INFO L276 IsEmpty]: Start isEmpty. Operand 5801 states and 7152 transitions. [2019-11-15 20:44:30,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-11-15 20:44:30,280 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:30,280 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:30,281 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:30,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:30,281 INFO L82 PathProgramCache]: Analyzing trace with hash 1349787928, now seen corresponding path program 1 times [2019-11-15 20:44:30,281 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:30,282 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1320424803] [2019-11-15 20:44:30,282 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:30,282 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:30,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:30,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:30,334 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:30,334 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1320424803] [2019-11-15 20:44:30,334 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:30,334 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:30,335 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1321991088] [2019-11-15 20:44:30,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:30,335 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:30,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:30,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:30,336 INFO L87 Difference]: Start difference. First operand 5801 states and 7152 transitions. Second operand 3 states. [2019-11-15 20:44:31,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:31,012 INFO L93 Difference]: Finished difference Result 16291 states and 20097 transitions. [2019-11-15 20:44:31,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:31,013 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2019-11-15 20:44:31,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:31,033 INFO L225 Difference]: With dead ends: 16291 [2019-11-15 20:44:31,033 INFO L226 Difference]: Without dead ends: 10539 [2019-11-15 20:44:31,041 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:31,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10539 states. [2019-11-15 20:44:31,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10539 to 10535. [2019-11-15 20:44:31,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10535 states. [2019-11-15 20:44:31,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10535 states to 10535 states and 12941 transitions. [2019-11-15 20:44:31,662 INFO L78 Accepts]: Start accepts. Automaton has 10535 states and 12941 transitions. Word has length 101 [2019-11-15 20:44:31,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:31,662 INFO L462 AbstractCegarLoop]: Abstraction has 10535 states and 12941 transitions. [2019-11-15 20:44:31,663 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:31,663 INFO L276 IsEmpty]: Start isEmpty. Operand 10535 states and 12941 transitions. [2019-11-15 20:44:31,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-11-15 20:44:31,669 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:31,670 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:31,670 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:31,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:31,670 INFO L82 PathProgramCache]: Analyzing trace with hash -1593794150, now seen corresponding path program 1 times [2019-11-15 20:44:31,671 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:31,671 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371573088] [2019-11-15 20:44:31,671 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:31,671 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:31,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:31,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:31,707 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-11-15 20:44:31,707 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [371573088] [2019-11-15 20:44:31,708 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:31,708 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:31,708 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597303585] [2019-11-15 20:44:31,709 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:31,710 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:31,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:31,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:31,710 INFO L87 Difference]: Start difference. First operand 10535 states and 12941 transitions. Second operand 3 states. [2019-11-15 20:44:32,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:32,411 INFO L93 Difference]: Finished difference Result 20979 states and 25783 transitions. [2019-11-15 20:44:32,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:32,412 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2019-11-15 20:44:32,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:32,431 INFO L225 Difference]: With dead ends: 20979 [2019-11-15 20:44:32,431 INFO L226 Difference]: Without dead ends: 10493 [2019-11-15 20:44:32,445 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:32,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10493 states. [2019-11-15 20:44:33,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10493 to 10493. [2019-11-15 20:44:33,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10493 states. [2019-11-15 20:44:33,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10493 states to 10493 states and 12895 transitions. [2019-11-15 20:44:33,091 INFO L78 Accepts]: Start accepts. Automaton has 10493 states and 12895 transitions. Word has length 101 [2019-11-15 20:44:33,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:33,092 INFO L462 AbstractCegarLoop]: Abstraction has 10493 states and 12895 transitions. [2019-11-15 20:44:33,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:33,092 INFO L276 IsEmpty]: Start isEmpty. Operand 10493 states and 12895 transitions. [2019-11-15 20:44:33,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2019-11-15 20:44:33,098 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:33,099 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:33,099 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:33,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:33,099 INFO L82 PathProgramCache]: Analyzing trace with hash 988555220, now seen corresponding path program 1 times [2019-11-15 20:44:33,100 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:33,100 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2082466204] [2019-11-15 20:44:33,100 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:33,100 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:33,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:33,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:33,144 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:33,144 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2082466204] [2019-11-15 20:44:33,144 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:33,145 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:33,145 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221249130] [2019-11-15 20:44:33,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:33,146 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:33,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:33,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:33,147 INFO L87 Difference]: Start difference. First operand 10493 states and 12895 transitions. Second operand 3 states. [2019-11-15 20:44:34,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:34,199 INFO L93 Difference]: Finished difference Result 29982 states and 36689 transitions. [2019-11-15 20:44:34,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:34,200 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 102 [2019-11-15 20:44:34,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:34,239 INFO L225 Difference]: With dead ends: 29982 [2019-11-15 20:44:34,239 INFO L226 Difference]: Without dead ends: 19538 [2019-11-15 20:44:34,257 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:34,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19538 states. [2019-11-15 20:44:35,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19538 to 19538. [2019-11-15 20:44:35,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19538 states. [2019-11-15 20:44:35,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19538 states to 19538 states and 23591 transitions. [2019-11-15 20:44:35,427 INFO L78 Accepts]: Start accepts. Automaton has 19538 states and 23591 transitions. Word has length 102 [2019-11-15 20:44:35,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:35,428 INFO L462 AbstractCegarLoop]: Abstraction has 19538 states and 23591 transitions. [2019-11-15 20:44:35,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:35,428 INFO L276 IsEmpty]: Start isEmpty. Operand 19538 states and 23591 transitions. [2019-11-15 20:44:35,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2019-11-15 20:44:35,447 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:35,447 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:35,448 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:35,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:35,448 INFO L82 PathProgramCache]: Analyzing trace with hash 490924073, now seen corresponding path program 1 times [2019-11-15 20:44:35,448 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:35,449 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501368740] [2019-11-15 20:44:35,449 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:35,449 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:35,449 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:35,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:35,509 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:35,510 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501368740] [2019-11-15 20:44:35,510 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:35,510 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:35,510 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434918746] [2019-11-15 20:44:35,511 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:35,516 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:35,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:35,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:35,517 INFO L87 Difference]: Start difference. First operand 19538 states and 23591 transitions. Second operand 3 states. [2019-11-15 20:44:37,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:37,005 INFO L93 Difference]: Finished difference Result 47674 states and 57563 transitions. [2019-11-15 20:44:37,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:37,006 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 131 [2019-11-15 20:44:37,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:37,061 INFO L225 Difference]: With dead ends: 47674 [2019-11-15 20:44:37,061 INFO L226 Difference]: Without dead ends: 28204 [2019-11-15 20:44:37,085 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:37,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28204 states. [2019-11-15 20:44:38,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28204 to 28072. [2019-11-15 20:44:38,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28072 states. [2019-11-15 20:44:38,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28072 states to 28072 states and 33691 transitions. [2019-11-15 20:44:38,721 INFO L78 Accepts]: Start accepts. Automaton has 28072 states and 33691 transitions. Word has length 131 [2019-11-15 20:44:38,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:38,722 INFO L462 AbstractCegarLoop]: Abstraction has 28072 states and 33691 transitions. [2019-11-15 20:44:38,722 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:38,722 INFO L276 IsEmpty]: Start isEmpty. Operand 28072 states and 33691 transitions. [2019-11-15 20:44:38,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2019-11-15 20:44:38,741 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:38,741 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:38,741 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:38,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:38,742 INFO L82 PathProgramCache]: Analyzing trace with hash 293838688, now seen corresponding path program 1 times [2019-11-15 20:44:38,742 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:38,742 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295652024] [2019-11-15 20:44:38,743 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:38,743 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:38,743 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:38,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:38,804 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:38,804 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295652024] [2019-11-15 20:44:38,805 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:38,805 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:44:38,805 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [783016443] [2019-11-15 20:44:38,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:38,806 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:38,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:38,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:38,807 INFO L87 Difference]: Start difference. First operand 28072 states and 33691 transitions. Second operand 3 states. [2019-11-15 20:44:40,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:40,696 INFO L93 Difference]: Finished difference Result 68432 states and 82087 transitions. [2019-11-15 20:44:40,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:40,697 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 131 [2019-11-15 20:44:40,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:40,741 INFO L225 Difference]: With dead ends: 68432 [2019-11-15 20:44:40,741 INFO L226 Difference]: Without dead ends: 40414 [2019-11-15 20:44:40,758 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:40,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40414 states. [2019-11-15 20:44:42,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40414 to 40218. [2019-11-15 20:44:42,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40218 states. [2019-11-15 20:44:42,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40218 states to 40218 states and 47939 transitions. [2019-11-15 20:44:42,483 INFO L78 Accepts]: Start accepts. Automaton has 40218 states and 47939 transitions. Word has length 131 [2019-11-15 20:44:42,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:42,483 INFO L462 AbstractCegarLoop]: Abstraction has 40218 states and 47939 transitions. [2019-11-15 20:44:42,483 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:42,483 INFO L276 IsEmpty]: Start isEmpty. Operand 40218 states and 47939 transitions. [2019-11-15 20:44:42,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2019-11-15 20:44:42,513 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:42,514 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:42,514 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:42,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:42,515 INFO L82 PathProgramCache]: Analyzing trace with hash 477376696, now seen corresponding path program 1 times [2019-11-15 20:44:42,515 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:42,515 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336860401] [2019-11-15 20:44:42,516 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:42,516 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:42,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:42,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:42,582 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2019-11-15 20:44:42,582 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336860401] [2019-11-15 20:44:42,582 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:42,583 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:42,583 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1061655357] [2019-11-15 20:44:42,585 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:42,585 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:42,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:42,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:42,586 INFO L87 Difference]: Start difference. First operand 40218 states and 47939 transitions. Second operand 3 states. [2019-11-15 20:44:44,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:44,517 INFO L93 Difference]: Finished difference Result 72088 states and 85999 transitions. [2019-11-15 20:44:44,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:44,517 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 147 [2019-11-15 20:44:44,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:44,574 INFO L225 Difference]: With dead ends: 72088 [2019-11-15 20:44:44,575 INFO L226 Difference]: Without dead ends: 41106 [2019-11-15 20:44:44,602 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:44,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41106 states. [2019-11-15 20:44:47,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41106 to 39498. [2019-11-15 20:44:47,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39498 states. [2019-11-15 20:44:47,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39498 states to 39498 states and 46331 transitions. [2019-11-15 20:44:47,141 INFO L78 Accepts]: Start accepts. Automaton has 39498 states and 46331 transitions. Word has length 147 [2019-11-15 20:44:47,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:47,142 INFO L462 AbstractCegarLoop]: Abstraction has 39498 states and 46331 transitions. [2019-11-15 20:44:47,142 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:47,142 INFO L276 IsEmpty]: Start isEmpty. Operand 39498 states and 46331 transitions. [2019-11-15 20:44:47,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-11-15 20:44:47,166 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:47,166 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:47,166 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:47,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:47,167 INFO L82 PathProgramCache]: Analyzing trace with hash 1845088335, now seen corresponding path program 1 times [2019-11-15 20:44:47,167 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:47,167 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064718741] [2019-11-15 20:44:47,167 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:47,168 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:47,168 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:47,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:47,221 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:47,222 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064718741] [2019-11-15 20:44:47,222 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:47,222 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:47,222 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1953076310] [2019-11-15 20:44:47,223 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:47,223 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:47,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:47,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:47,224 INFO L87 Difference]: Start difference. First operand 39498 states and 46331 transitions. Second operand 3 states. [2019-11-15 20:44:48,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:48,785 INFO L93 Difference]: Finished difference Result 62310 states and 73339 transitions. [2019-11-15 20:44:48,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:48,786 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 148 [2019-11-15 20:44:48,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:48,825 INFO L225 Difference]: With dead ends: 62310 [2019-11-15 20:44:48,825 INFO L226 Difference]: Without dead ends: 34906 [2019-11-15 20:44:48,851 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:48,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34906 states. [2019-11-15 20:44:50,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34906 to 34902. [2019-11-15 20:44:50,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34902 states. [2019-11-15 20:44:50,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34902 states to 34902 states and 40863 transitions. [2019-11-15 20:44:50,918 INFO L78 Accepts]: Start accepts. Automaton has 34902 states and 40863 transitions. Word has length 148 [2019-11-15 20:44:50,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:50,918 INFO L462 AbstractCegarLoop]: Abstraction has 34902 states and 40863 transitions. [2019-11-15 20:44:50,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:50,919 INFO L276 IsEmpty]: Start isEmpty. Operand 34902 states and 40863 transitions. [2019-11-15 20:44:50,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-11-15 20:44:50,933 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:50,933 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:50,933 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:50,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:50,934 INFO L82 PathProgramCache]: Analyzing trace with hash 1363817295, now seen corresponding path program 1 times [2019-11-15 20:44:50,934 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:50,934 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785334337] [2019-11-15 20:44:50,935 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:50,935 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:50,935 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:50,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:50,990 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:50,990 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785334337] [2019-11-15 20:44:50,991 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:50,991 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:50,991 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [809274667] [2019-11-15 20:44:50,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:50,992 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:50,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:50,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:50,993 INFO L87 Difference]: Start difference. First operand 34902 states and 40863 transitions. Second operand 3 states. [2019-11-15 20:44:52,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:52,706 INFO L93 Difference]: Finished difference Result 62382 states and 73243 transitions. [2019-11-15 20:44:52,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:52,706 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 148 [2019-11-15 20:44:52,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:52,744 INFO L225 Difference]: With dead ends: 62382 [2019-11-15 20:44:52,744 INFO L226 Difference]: Without dead ends: 34906 [2019-11-15 20:44:52,762 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:52,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34906 states. [2019-11-15 20:44:54,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34906 to 34902. [2019-11-15 20:44:54,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34902 states. [2019-11-15 20:44:54,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34902 states to 34902 states and 40695 transitions. [2019-11-15 20:44:54,534 INFO L78 Accepts]: Start accepts. Automaton has 34902 states and 40695 transitions. Word has length 148 [2019-11-15 20:44:54,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:54,534 INFO L462 AbstractCegarLoop]: Abstraction has 34902 states and 40695 transitions. [2019-11-15 20:44:54,534 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:54,535 INFO L276 IsEmpty]: Start isEmpty. Operand 34902 states and 40695 transitions. [2019-11-15 20:44:54,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-11-15 20:44:54,542 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:54,542 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:54,542 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:54,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:54,542 INFO L82 PathProgramCache]: Analyzing trace with hash -1576151473, now seen corresponding path program 1 times [2019-11-15 20:44:54,543 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:54,543 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937020671] [2019-11-15 20:44:54,543 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:54,543 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:54,543 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:54,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:54,599 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-11-15 20:44:54,600 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937020671] [2019-11-15 20:44:54,600 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:54,600 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:54,600 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1961194214] [2019-11-15 20:44:54,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:54,601 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:54,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:54,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:54,602 INFO L87 Difference]: Start difference. First operand 34902 states and 40695 transitions. Second operand 3 states. [2019-11-15 20:44:55,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:55,677 INFO L93 Difference]: Finished difference Result 58470 states and 68303 transitions. [2019-11-15 20:44:55,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:55,678 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 148 [2019-11-15 20:44:55,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:55,702 INFO L225 Difference]: With dead ends: 58470 [2019-11-15 20:44:55,702 INFO L226 Difference]: Without dead ends: 23658 [2019-11-15 20:44:55,720 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:55,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23658 states. [2019-11-15 20:44:56,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23658 to 23654. [2019-11-15 20:44:56,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23654 states. [2019-11-15 20:44:56,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23654 states to 23654 states and 27459 transitions. [2019-11-15 20:44:56,701 INFO L78 Accepts]: Start accepts. Automaton has 23654 states and 27459 transitions. Word has length 148 [2019-11-15 20:44:56,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:56,701 INFO L462 AbstractCegarLoop]: Abstraction has 23654 states and 27459 transitions. [2019-11-15 20:44:56,701 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:56,701 INFO L276 IsEmpty]: Start isEmpty. Operand 23654 states and 27459 transitions. [2019-11-15 20:44:56,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-11-15 20:44:56,705 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:56,706 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:56,706 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:56,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:56,706 INFO L82 PathProgramCache]: Analyzing trace with hash -954570, now seen corresponding path program 1 times [2019-11-15 20:44:56,707 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:56,707 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650957307] [2019-11-15 20:44:56,707 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:56,707 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:56,707 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:56,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:56,761 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-15 20:44:56,762 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [650957307] [2019-11-15 20:44:56,762 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:56,762 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:56,762 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1113052763] [2019-11-15 20:44:56,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:56,763 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:56,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:56,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:56,764 INFO L87 Difference]: Start difference. First operand 23654 states and 27459 transitions. Second operand 3 states. [2019-11-15 20:44:58,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:58,932 INFO L93 Difference]: Finished difference Result 43106 states and 50305 transitions. [2019-11-15 20:44:58,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:58,933 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 148 [2019-11-15 20:44:58,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:58,961 INFO L225 Difference]: With dead ends: 43106 [2019-11-15 20:44:58,961 INFO L226 Difference]: Without dead ends: 24254 [2019-11-15 20:44:58,974 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:58,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24254 states. [2019-11-15 20:44:59,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24254 to 23534. [2019-11-15 20:44:59,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23534 states. [2019-11-15 20:44:59,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23534 states to 23534 states and 26843 transitions. [2019-11-15 20:44:59,972 INFO L78 Accepts]: Start accepts. Automaton has 23534 states and 26843 transitions. Word has length 148 [2019-11-15 20:44:59,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:59,973 INFO L462 AbstractCegarLoop]: Abstraction has 23534 states and 26843 transitions. [2019-11-15 20:44:59,973 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:59,973 INFO L276 IsEmpty]: Start isEmpty. Operand 23534 states and 26843 transitions. [2019-11-15 20:44:59,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2019-11-15 20:44:59,977 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:59,977 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:59,977 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:59,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:59,978 INFO L82 PathProgramCache]: Analyzing trace with hash 823641312, now seen corresponding path program 1 times [2019-11-15 20:44:59,978 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:59,978 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457376616] [2019-11-15 20:44:59,979 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:59,979 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:59,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:59,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:45:00,042 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-11-15 20:45:00,042 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457376616] [2019-11-15 20:45:00,042 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:45:00,042 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:45:00,042 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [211446320] [2019-11-15 20:45:00,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:45:00,045 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:45:00,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:45:00,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:45:00,046 INFO L87 Difference]: Start difference. First operand 23534 states and 26843 transitions. Second operand 5 states. [2019-11-15 20:45:01,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:45:01,014 INFO L93 Difference]: Finished difference Result 32626 states and 36969 transitions. [2019-11-15 20:45:01,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:45:01,015 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 149 [2019-11-15 20:45:01,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:45:01,019 INFO L225 Difference]: With dead ends: 32626 [2019-11-15 20:45:01,020 INFO L226 Difference]: Without dead ends: 4731 [2019-11-15 20:45:01,031 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:45:01,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4731 states. [2019-11-15 20:45:01,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4731 to 4595. [2019-11-15 20:45:01,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4595 states. [2019-11-15 20:45:01,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4595 states to 4595 states and 4976 transitions. [2019-11-15 20:45:01,241 INFO L78 Accepts]: Start accepts. Automaton has 4595 states and 4976 transitions. Word has length 149 [2019-11-15 20:45:01,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:45:01,241 INFO L462 AbstractCegarLoop]: Abstraction has 4595 states and 4976 transitions. [2019-11-15 20:45:01,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:45:01,241 INFO L276 IsEmpty]: Start isEmpty. Operand 4595 states and 4976 transitions. [2019-11-15 20:45:01,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2019-11-15 20:45:01,244 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:45:01,244 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:45:01,245 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:45:01,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:45:01,245 INFO L82 PathProgramCache]: Analyzing trace with hash 1473194168, now seen corresponding path program 1 times [2019-11-15 20:45:01,246 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:45:01,246 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518456169] [2019-11-15 20:45:01,246 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:01,246 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:01,246 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:45:01,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:45:01,312 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:45:01,312 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518456169] [2019-11-15 20:45:01,312 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:45:01,313 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:45:01,313 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737352638] [2019-11-15 20:45:01,313 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:45:01,314 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:45:01,314 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:45:01,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:45:01,314 INFO L87 Difference]: Start difference. First operand 4595 states and 4976 transitions. Second operand 3 states. [2019-11-15 20:45:01,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:45:01,610 INFO L93 Difference]: Finished difference Result 7852 states and 8519 transitions. [2019-11-15 20:45:01,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:45:01,610 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 214 [2019-11-15 20:45:01,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:45:01,614 INFO L225 Difference]: With dead ends: 7852 [2019-11-15 20:45:01,614 INFO L226 Difference]: Without dead ends: 4595 [2019-11-15 20:45:01,617 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:45:01,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4595 states. [2019-11-15 20:45:01,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4595 to 4595. [2019-11-15 20:45:01,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4595 states. [2019-11-15 20:45:01,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4595 states to 4595 states and 4922 transitions. [2019-11-15 20:45:01,828 INFO L78 Accepts]: Start accepts. Automaton has 4595 states and 4922 transitions. Word has length 214 [2019-11-15 20:45:01,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:45:01,829 INFO L462 AbstractCegarLoop]: Abstraction has 4595 states and 4922 transitions. [2019-11-15 20:45:01,829 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:45:01,829 INFO L276 IsEmpty]: Start isEmpty. Operand 4595 states and 4922 transitions. [2019-11-15 20:45:01,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2019-11-15 20:45:01,832 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:45:01,832 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:45:01,832 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:45:01,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:45:01,833 INFO L82 PathProgramCache]: Analyzing trace with hash 1279770330, now seen corresponding path program 1 times [2019-11-15 20:45:01,833 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:45:01,833 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1208043082] [2019-11-15 20:45:01,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:01,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:01,833 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:45:01,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:45:01,902 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:45:01,903 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1208043082] [2019-11-15 20:45:01,903 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:45:01,903 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:45:01,904 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [59862980] [2019-11-15 20:45:01,904 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:45:01,905 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:45:01,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:45:01,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:45:01,905 INFO L87 Difference]: Start difference. First operand 4595 states and 4922 transitions. Second operand 3 states. [2019-11-15 20:45:02,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:45:02,185 INFO L93 Difference]: Finished difference Result 7385 states and 7926 transitions. [2019-11-15 20:45:02,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:45:02,185 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 217 [2019-11-15 20:45:02,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:45:02,189 INFO L225 Difference]: With dead ends: 7385 [2019-11-15 20:45:02,189 INFO L226 Difference]: Without dead ends: 4595 [2019-11-15 20:45:02,193 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:45:02,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4595 states. [2019-11-15 20:45:02,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4595 to 4595. [2019-11-15 20:45:02,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4595 states. [2019-11-15 20:45:02,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4595 states to 4595 states and 4876 transitions. [2019-11-15 20:45:02,417 INFO L78 Accepts]: Start accepts. Automaton has 4595 states and 4876 transitions. Word has length 217 [2019-11-15 20:45:02,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:45:02,418 INFO L462 AbstractCegarLoop]: Abstraction has 4595 states and 4876 transitions. [2019-11-15 20:45:02,418 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:45:02,418 INFO L276 IsEmpty]: Start isEmpty. Operand 4595 states and 4876 transitions. [2019-11-15 20:45:02,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2019-11-15 20:45:02,421 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:45:02,421 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:45:02,422 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:45:02,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:45:02,422 INFO L82 PathProgramCache]: Analyzing trace with hash -928723252, now seen corresponding path program 1 times [2019-11-15 20:45:02,422 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:45:02,423 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842615890] [2019-11-15 20:45:02,423 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:02,423 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:02,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:45:02,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:45:02,502 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:45:02,502 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842615890] [2019-11-15 20:45:02,502 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:45:02,502 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:45:02,503 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [596692919] [2019-11-15 20:45:02,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:45:02,504 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:45:02,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:45:02,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:45:02,504 INFO L87 Difference]: Start difference. First operand 4595 states and 4876 transitions. Second operand 3 states. [2019-11-15 20:45:02,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:45:02,712 INFO L93 Difference]: Finished difference Result 5891 states and 6255 transitions. [2019-11-15 20:45:02,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:45:02,713 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 220 [2019-11-15 20:45:02,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:45:02,716 INFO L225 Difference]: With dead ends: 5891 [2019-11-15 20:45:02,716 INFO L226 Difference]: Without dead ends: 3680 [2019-11-15 20:45:02,718 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:45:02,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3680 states. [2019-11-15 20:45:02,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3680 to 3680. [2019-11-15 20:45:02,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3680 states. [2019-11-15 20:45:02,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3680 states to 3680 states and 3894 transitions. [2019-11-15 20:45:02,896 INFO L78 Accepts]: Start accepts. Automaton has 3680 states and 3894 transitions. Word has length 220 [2019-11-15 20:45:02,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:45:02,897 INFO L462 AbstractCegarLoop]: Abstraction has 3680 states and 3894 transitions. [2019-11-15 20:45:02,897 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:45:02,897 INFO L276 IsEmpty]: Start isEmpty. Operand 3680 states and 3894 transitions. [2019-11-15 20:45:02,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2019-11-15 20:45:02,899 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:45:02,900 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:45:02,900 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:45:02,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:45:02,900 INFO L82 PathProgramCache]: Analyzing trace with hash -1613896568, now seen corresponding path program 1 times [2019-11-15 20:45:02,901 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:45:02,901 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1865031371] [2019-11-15 20:45:02,901 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:02,901 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:02,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:45:02,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:45:03,189 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-15 20:45:03,190 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1865031371] [2019-11-15 20:45:03,190 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:45:03,190 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:45:03,191 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495084973] [2019-11-15 20:45:03,191 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:45:03,192 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:45:03,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:45:03,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:45:03,192 INFO L87 Difference]: Start difference. First operand 3680 states and 3894 transitions. Second operand 6 states. [2019-11-15 20:45:03,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:45:03,486 INFO L93 Difference]: Finished difference Result 3680 states and 3894 transitions. [2019-11-15 20:45:03,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:45:03,487 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 223 [2019-11-15 20:45:03,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:45:03,490 INFO L225 Difference]: With dead ends: 3680 [2019-11-15 20:45:03,490 INFO L226 Difference]: Without dead ends: 3678 [2019-11-15 20:45:03,491 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:45:03,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3678 states. [2019-11-15 20:45:03,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3678 to 3678. [2019-11-15 20:45:03,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3678 states. [2019-11-15 20:45:03,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3678 states to 3678 states and 3891 transitions. [2019-11-15 20:45:03,745 INFO L78 Accepts]: Start accepts. Automaton has 3678 states and 3891 transitions. Word has length 223 [2019-11-15 20:45:03,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:45:03,746 INFO L462 AbstractCegarLoop]: Abstraction has 3678 states and 3891 transitions. [2019-11-15 20:45:03,746 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:45:03,746 INFO L276 IsEmpty]: Start isEmpty. Operand 3678 states and 3891 transitions. [2019-11-15 20:45:03,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2019-11-15 20:45:03,750 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:45:03,750 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:45:03,756 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:45:03,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:45:03,757 INFO L82 PathProgramCache]: Analyzing trace with hash -1852984938, now seen corresponding path program 1 times [2019-11-15 20:45:03,757 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:45:03,758 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1590272978] [2019-11-15 20:45:03,758 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:03,758 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:03,758 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:45:03,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:45:03,860 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2019-11-15 20:45:03,861 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1590272978] [2019-11-15 20:45:03,861 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:45:03,861 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:45:03,862 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2125655474] [2019-11-15 20:45:03,862 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:45:03,862 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:45:03,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:45:03,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:45:03,863 INFO L87 Difference]: Start difference. First operand 3678 states and 3891 transitions. Second operand 3 states. [2019-11-15 20:45:04,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:45:04,192 INFO L93 Difference]: Finished difference Result 5766 states and 6078 transitions. [2019-11-15 20:45:04,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:45:04,193 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 227 [2019-11-15 20:45:04,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:45:04,197 INFO L225 Difference]: With dead ends: 5766 [2019-11-15 20:45:04,197 INFO L226 Difference]: Without dead ends: 4714 [2019-11-15 20:45:04,199 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:45:04,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4714 states. [2019-11-15 20:45:04,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4714 to 3680. [2019-11-15 20:45:04,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3680 states. [2019-11-15 20:45:04,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3680 states to 3680 states and 3893 transitions. [2019-11-15 20:45:04,396 INFO L78 Accepts]: Start accepts. Automaton has 3680 states and 3893 transitions. Word has length 227 [2019-11-15 20:45:04,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:45:04,396 INFO L462 AbstractCegarLoop]: Abstraction has 3680 states and 3893 transitions. [2019-11-15 20:45:04,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:45:04,397 INFO L276 IsEmpty]: Start isEmpty. Operand 3680 states and 3893 transitions. [2019-11-15 20:45:04,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2019-11-15 20:45:04,400 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:45:04,401 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:45:04,401 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:45:04,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:45:04,402 INFO L82 PathProgramCache]: Analyzing trace with hash -1845395018, now seen corresponding path program 1 times [2019-11-15 20:45:04,402 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:45:04,402 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338772682] [2019-11-15 20:45:04,402 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:04,403 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:45:04,403 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:45:04,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:45:04,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:45:04,556 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:45:04,556 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:45:04,779 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:45:04 BoogieIcfgContainer [2019-11-15 20:45:04,779 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:45:04,779 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:45:04,780 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:45:04,780 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:45:04,781 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:44:23" (3/4) ... [2019-11-15 20:45:04,783 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:45:05,055 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ab8a04c9-86eb-422e-9b41-b264ef49a51e/bin/uautomizer/witness.graphml [2019-11-15 20:45:05,056 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:45:05,059 INFO L168 Benchmark]: Toolchain (without parser) took 43325.88 ms. Allocated memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: 3.9 GB). Free memory was 946.1 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 984.8 MB. Max. memory is 11.5 GB. [2019-11-15 20:45:05,059 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 1.0 GB. Free memory is still 966.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:45:05,060 INFO L168 Benchmark]: CACSL2BoogieTranslator took 470.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 147.3 MB). Free memory was 946.1 MB in the beginning and 1.1 GB in the end (delta: -194.6 MB). Peak memory consumption was 22.2 MB. Max. memory is 11.5 GB. [2019-11-15 20:45:05,060 INFO L168 Benchmark]: Boogie Procedure Inliner took 80.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 11.5 GB. [2019-11-15 20:45:05,061 INFO L168 Benchmark]: Boogie Preprocessor took 79.18 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-11-15 20:45:05,061 INFO L168 Benchmark]: RCFGBuilder took 1438.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 77.6 MB). Peak memory consumption was 77.6 MB. Max. memory is 11.5 GB. [2019-11-15 20:45:05,062 INFO L168 Benchmark]: TraceAbstraction took 40975.15 ms. Allocated memory was 1.2 GB in the beginning and 5.0 GB in the end (delta: 3.8 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 915.4 MB. Max. memory is 11.5 GB. [2019-11-15 20:45:05,062 INFO L168 Benchmark]: Witness Printer took 276.61 ms. Allocated memory is still 5.0 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 25.6 MB). Peak memory consumption was 25.6 MB. Max. memory is 11.5 GB. [2019-11-15 20:45:05,066 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 1.0 GB. Free memory is still 966.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 470.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 147.3 MB). Free memory was 946.1 MB in the beginning and 1.1 GB in the end (delta: -194.6 MB). Peak memory consumption was 22.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 80.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 79.18 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1438.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 77.6 MB). Peak memory consumption was 77.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 40975.15 ms. Allocated memory was 1.2 GB in the beginning and 5.0 GB in the end (delta: 3.8 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 915.4 MB. Max. memory is 11.5 GB. * Witness Printer took 276.61 ms. Allocated memory is still 5.0 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 25.6 MB). Peak memory consumption was 25.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int t3_st ; [L22] int m_i ; [L23] int t1_i ; [L24] int t2_i ; [L25] int t3_i ; [L26] int M_E = 2; [L27] int T1_E = 2; [L28] int T2_E = 2; [L29] int T3_E = 2; [L30] int E_M = 2; [L31] int E_1 = 2; [L32] int E_2 = 2; [L33] int E_3 = 2; [L39] int token ; [L41] int local ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, token=0] [L725] int __retres1 ; [L638] m_i = 1 [L639] t1_i = 1 [L640] t2_i = 1 [L641] t3_i = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L666] int kernel_st ; [L667] int tmp ; [L668] int tmp___0 ; [L672] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L294] COND TRUE m_i == 1 [L295] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L299] COND TRUE t1_i == 1 [L300] t1_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L304] COND TRUE t2_i == 1 [L305] t2_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L309] COND TRUE t3_i == 1 [L310] t3_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L431] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L436] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L441] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L446] COND FALSE !(T3_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L451] COND FALSE !(E_M == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L456] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L461] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L466] COND FALSE !(E_3 == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L210] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L220] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L222] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L531] tmp = is_master_triggered() [L533] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L226] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L229] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L239] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L241] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L539] tmp___0 = is_transmit1_triggered() [L541] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L245] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L248] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L258] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L260] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L547] tmp___1 = is_transmit2_triggered() [L549] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L264] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L267] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L277] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L279] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L555] tmp___2 = is_transmit3_triggered() [L557] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L479] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L484] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L489] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L494] COND FALSE !(T3_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L499] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L504] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L509] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L514] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L680] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L683] kernel_st = 1 [L350] int tmp ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L354] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L319] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L322] COND TRUE m_st == 0 [L323] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L345] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L357] tmp = exists_runnable_thread() [L359] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L364] COND TRUE m_st == 0 [L365] int tmp_ndt_1; [L366] tmp_ndt_1 = __VERIFIER_nondet_int() [L367] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L378] COND TRUE t1_st == 0 [L379] int tmp_ndt_2; [L380] tmp_ndt_2 = __VERIFIER_nondet_int() [L381] COND TRUE \read(tmp_ndt_2) [L383] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L102] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L113] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L115] t1_pc = 1 [L116] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L392] COND TRUE t2_st == 0 [L393] int tmp_ndt_3; [L394] tmp_ndt_3 = __VERIFIER_nondet_int() [L395] COND TRUE \read(tmp_ndt_3) [L397] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L138] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L149] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L151] t2_pc = 1 [L152] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L406] COND TRUE t3_st == 0 [L407] int tmp_ndt_4; [L408] tmp_ndt_4 = __VERIFIER_nondet_int() [L409] COND TRUE \read(tmp_ndt_4) [L411] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L174] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L185] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L187] t3_pc = 1 [L188] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L354] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L319] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L322] COND TRUE m_st == 0 [L323] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L345] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L357] tmp = exists_runnable_thread() [L359] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L364] COND TRUE m_st == 0 [L365] int tmp_ndt_1; [L366] tmp_ndt_1 = __VERIFIER_nondet_int() [L367] COND TRUE \read(tmp_ndt_1) [L369] m_st = 1 [L44] int tmp_var = __VERIFIER_nondet_int(); [L46] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L57] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L60] token = __VERIFIER_nondet_int() [L61] local = token [L62] E_1 = 1 [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L210] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L220] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L222] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L531] tmp = is_master_triggered() [L533] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L226] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L229] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L230] COND TRUE E_1 == 1 [L231] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L241] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L539] tmp___0 = is_transmit1_triggered() [L541] COND TRUE \read(tmp___0) [L542] t1_st = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L245] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L248] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L249] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L258] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L260] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L547] tmp___1 = is_transmit2_triggered() [L549] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L264] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L267] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L268] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L277] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L279] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L555] tmp___2 = is_transmit3_triggered() [L557] COND FALSE !(\read(tmp___2)) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L64] E_1 = 2 [L65] m_pc = 1 [L66] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L378] COND TRUE t1_st == 0 [L379] int tmp_ndt_2; [L380] tmp_ndt_2 = __VERIFIER_nondet_int() [L381] COND TRUE \read(tmp_ndt_2) [L383] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L102] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L105] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L121] token += 1 [L122] E_2 = 1 [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L210] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L211] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L220] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L222] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L531] tmp = is_master_triggered() [L533] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L226] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L229] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L230] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L239] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L241] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L539] tmp___0 = is_transmit1_triggered() [L541] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L245] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L248] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L249] COND TRUE E_2 == 1 [L250] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L260] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L547] tmp___1 = is_transmit2_triggered() [L549] COND TRUE \read(tmp___1) [L550] t2_st = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L264] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L267] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L268] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L277] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L279] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L555] tmp___2 = is_transmit3_triggered() [L557] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L124] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L113] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L115] t1_pc = 1 [L116] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L392] COND TRUE t2_st == 0 [L393] int tmp_ndt_3; [L394] tmp_ndt_3 = __VERIFIER_nondet_int() [L395] COND TRUE \read(tmp_ndt_3) [L397] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L138] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L141] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L157] token += 1 [L158] E_3 = 1 [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L210] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L211] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L220] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L222] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L531] tmp = is_master_triggered() [L533] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L226] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L229] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L230] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L239] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L241] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L539] tmp___0 = is_transmit1_triggered() [L541] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L245] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L248] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L249] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L258] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L260] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L547] tmp___1 = is_transmit2_triggered() [L549] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L264] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L267] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L268] COND TRUE E_3 == 1 [L269] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L279] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L555] tmp___2 = is_transmit3_triggered() [L557] COND TRUE \read(tmp___2) [L558] t3_st = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=-1] [L160] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=-1] [L149] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=-1] [L151] t2_pc = 1 [L152] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=-1] [L406] COND TRUE t3_st == 0 [L407] int tmp_ndt_4; [L408] tmp_ndt_4 = __VERIFIER_nondet_int() [L409] COND TRUE \read(tmp_ndt_4) [L411] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=-1] [L174] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=-1] [L177] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=-1] [L193] token += 1 [L194] E_M = 1 [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L210] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L211] COND TRUE E_M == 1 [L212] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L222] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L531] tmp = is_master_triggered() [L533] COND TRUE \read(tmp) [L534] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L226] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L229] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L230] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L239] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L241] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L539] tmp___0 = is_transmit1_triggered() [L541] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L245] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L248] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L249] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L258] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L260] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L547] tmp___1 = is_transmit2_triggered() [L549] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L264] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L267] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L268] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L277] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L279] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L555] tmp___2 = is_transmit3_triggered() [L557] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L196] E_M = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L185] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L187] t3_pc = 1 [L188] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L354] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L319] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L322] COND TRUE m_st == 0 [L323] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L345] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L357] tmp = exists_runnable_thread() [L359] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L364] COND TRUE m_st == 0 [L365] int tmp_ndt_1; [L366] tmp_ndt_1 = __VERIFIER_nondet_int() [L367] COND TRUE \read(tmp_ndt_1) [L369] m_st = 1 [L44] int tmp_var = __VERIFIER_nondet_int(); [L46] COND FALSE !(m_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L49] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L71] COND FALSE !(token != local + 3) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L76] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L77] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L82] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L83] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L84] COND TRUE tmp_var == 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L10] __VERIFIER_error() VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 316 locations, 2 error locations. Result: UNSAFE, OverallTime: 40.8s, OverallIterations: 34, TraceHistogramMax: 3, AutomataDifference: 20.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 15598 SDtfs, 13593 SDslu, 11009 SDs, 0 SdLazy, 596 SolverSat, 276 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 115 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=40218occurred in iteration=22, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 17.2s AutomataMinimizationTime, 33 MinimizatonAttempts, 6602 StatesRemovedByMinimization, 18 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 4088 NumberOfCodeBlocks, 4088 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 3827 ConstructedInterpolants, 0 QuantifiedInterpolants, 1000323 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 504/504 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...