./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/token_ring.05.cil-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/token_ring.05.cil-2.c -s /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 27d160802d278384ef6d8db395ef2d19702d5645 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:23:53,269 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:23:53,271 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:23:53,286 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:23:53,291 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:23:53,293 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:23:53,296 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:23:53,309 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:23:53,312 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:23:53,315 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:23:53,318 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:23:53,320 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:23:53,321 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:23:53,324 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:23:53,326 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:23:53,328 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:23:53,329 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:23:53,333 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:23:53,337 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:23:53,340 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:23:53,341 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:23:53,343 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:23:53,344 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:23:53,345 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:23:53,348 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:23:53,348 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:23:53,349 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:23:53,350 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:23:53,350 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:23:53,351 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:23:53,352 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:23:53,352 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:23:53,353 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:23:53,354 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:23:53,356 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:23:53,356 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:23:53,357 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:23:53,357 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:23:53,357 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:23:53,358 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:23:53,359 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:23:53,360 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:23:53,377 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:23:53,377 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:23:53,379 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:23:53,379 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:23:53,380 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:23:53,380 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:23:53,380 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:23:53,381 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:23:53,381 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:23:53,381 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:23:53,382 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:23:53,382 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:23:53,382 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:23:53,383 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:23:53,383 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:23:53,383 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:23:53,383 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:23:53,384 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:23:53,384 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:23:53,384 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:23:53,385 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:23:53,385 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:23:53,385 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:23:53,386 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:23:53,386 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:23:53,386 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:23:53,386 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:23:53,387 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:23:53,387 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 27d160802d278384ef6d8db395ef2d19702d5645 [2019-11-15 20:23:53,420 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:23:53,434 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:23:53,438 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:23:53,439 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:23:53,440 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:23:53,441 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/../../sv-benchmarks/c/systemc/token_ring.05.cil-2.c [2019-11-15 20:23:53,533 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/data/b9f2ee1af/e9917e13ab6d45ac942f5023bd151e4d/FLAG0385c4d54 [2019-11-15 20:23:54,179 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:23:54,180 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/sv-benchmarks/c/systemc/token_ring.05.cil-2.c [2019-11-15 20:23:54,197 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/data/b9f2ee1af/e9917e13ab6d45ac942f5023bd151e4d/FLAG0385c4d54 [2019-11-15 20:23:54,384 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/data/b9f2ee1af/e9917e13ab6d45ac942f5023bd151e4d [2019-11-15 20:23:54,388 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:23:54,390 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:23:54,394 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:23:54,395 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:23:54,399 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:23:54,400 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:23:54" (1/1) ... [2019-11-15 20:23:54,403 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@20533aa4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:54, skipping insertion in model container [2019-11-15 20:23:54,403 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:23:54" (1/1) ... [2019-11-15 20:23:54,412 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:23:54,490 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:23:54,976 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:23:54,983 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:23:55,055 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:23:55,105 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:23:55,108 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55 WrapperNode [2019-11-15 20:23:55,109 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:23:55,110 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:23:55,111 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:23:55,111 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:23:55,121 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,133 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,224 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:23:55,225 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:23:55,225 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:23:55,226 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:23:55,239 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,239 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,261 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,274 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,304 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,342 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,347 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... [2019-11-15 20:23:55,357 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:23:55,358 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:23:55,358 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:23:55,358 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:23:55,359 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:23:55,467 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:23:55,468 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:23:57,605 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:23:57,606 INFO L284 CfgBuilder]: Removed 198 assume(true) statements. [2019-11-15 20:23:57,607 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:23:57 BoogieIcfgContainer [2019-11-15 20:23:57,608 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:23:57,609 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:23:57,609 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:23:57,616 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:23:57,616 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:23:54" (1/3) ... [2019-11-15 20:23:57,620 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4194da1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:23:57, skipping insertion in model container [2019-11-15 20:23:57,621 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:23:55" (2/3) ... [2019-11-15 20:23:57,622 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4194da1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:23:57, skipping insertion in model container [2019-11-15 20:23:57,622 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:23:57" (3/3) ... [2019-11-15 20:23:57,624 INFO L109 eAbstractionObserver]: Analyzing ICFG token_ring.05.cil-2.c [2019-11-15 20:23:57,637 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:23:57,650 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-15 20:23:57,665 INFO L249 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2019-11-15 20:23:57,720 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:23:57,720 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:23:57,721 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:23:57,721 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:23:57,721 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:23:57,721 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:23:57,721 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:23:57,722 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:23:57,761 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states. [2019-11-15 20:23:57,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:23:57,773 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:23:57,775 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:23:57,776 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:23:57,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:23:57,784 INFO L82 PathProgramCache]: Analyzing trace with hash -967631064, now seen corresponding path program 1 times [2019-11-15 20:23:57,794 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:23:57,794 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563510975] [2019-11-15 20:23:57,795 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:57,795 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:57,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:23:57,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:23:58,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:23:58,040 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563510975] [2019-11-15 20:23:58,041 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:23:58,042 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:23:58,042 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1536339191] [2019-11-15 20:23:58,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:23:58,048 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:23:58,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:23:58,066 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:58,069 INFO L87 Difference]: Start difference. First operand 540 states. Second operand 3 states. [2019-11-15 20:23:58,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:23:58,182 INFO L93 Difference]: Finished difference Result 1075 states and 1663 transitions. [2019-11-15 20:23:58,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:23:58,193 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:23:58,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:23:58,227 INFO L225 Difference]: With dead ends: 1075 [2019-11-15 20:23:58,227 INFO L226 Difference]: Without dead ends: 536 [2019-11-15 20:23:58,238 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:58,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 536 states. [2019-11-15 20:23:58,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 536 to 536. [2019-11-15 20:23:58,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 536 states. [2019-11-15 20:23:58,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 536 states and 812 transitions. [2019-11-15 20:23:58,353 INFO L78 Accepts]: Start accepts. Automaton has 536 states and 812 transitions. Word has length 83 [2019-11-15 20:23:58,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:23:58,354 INFO L462 AbstractCegarLoop]: Abstraction has 536 states and 812 transitions. [2019-11-15 20:23:58,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:23:58,354 INFO L276 IsEmpty]: Start isEmpty. Operand 536 states and 812 transitions. [2019-11-15 20:23:58,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:23:58,359 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:23:58,360 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:23:58,360 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:23:58,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:23:58,361 INFO L82 PathProgramCache]: Analyzing trace with hash -1207870810, now seen corresponding path program 1 times [2019-11-15 20:23:58,361 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:23:58,362 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154387120] [2019-11-15 20:23:58,362 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:58,362 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:58,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:23:58,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:23:58,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:23:58,488 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [154387120] [2019-11-15 20:23:58,488 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:23:58,488 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:23:58,489 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1440781066] [2019-11-15 20:23:58,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:23:58,491 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:23:58,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:23:58,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:58,492 INFO L87 Difference]: Start difference. First operand 536 states and 812 transitions. Second operand 3 states. [2019-11-15 20:23:58,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:23:58,586 INFO L93 Difference]: Finished difference Result 1480 states and 2236 transitions. [2019-11-15 20:23:58,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:23:58,587 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:23:58,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:23:58,596 INFO L225 Difference]: With dead ends: 1480 [2019-11-15 20:23:58,597 INFO L226 Difference]: Without dead ends: 954 [2019-11-15 20:23:58,599 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:58,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 954 states. [2019-11-15 20:23:58,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 954 to 950. [2019-11-15 20:23:58,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:23:58,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1434 transitions. [2019-11-15 20:23:58,716 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1434 transitions. Word has length 83 [2019-11-15 20:23:58,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:23:58,717 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1434 transitions. [2019-11-15 20:23:58,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:23:58,717 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1434 transitions. [2019-11-15 20:23:58,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:23:58,732 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:23:58,732 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:23:58,733 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:23:58,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:23:58,733 INFO L82 PathProgramCache]: Analyzing trace with hash -258608350, now seen corresponding path program 1 times [2019-11-15 20:23:58,733 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:23:58,734 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [681055752] [2019-11-15 20:23:58,734 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:58,734 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:58,735 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:23:58,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:23:58,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:23:58,874 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [681055752] [2019-11-15 20:23:58,874 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:23:58,874 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:23:58,875 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [591188920] [2019-11-15 20:23:58,875 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:23:58,876 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:23:58,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:23:58,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:58,877 INFO L87 Difference]: Start difference. First operand 950 states and 1434 transitions. Second operand 3 states. [2019-11-15 20:23:58,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:23:58,963 INFO L93 Difference]: Finished difference Result 1889 states and 2851 transitions. [2019-11-15 20:23:58,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:23:58,965 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:23:58,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:23:58,975 INFO L225 Difference]: With dead ends: 1889 [2019-11-15 20:23:58,976 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:23:58,979 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:58,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:23:59,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:23:59,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:23:59,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1426 transitions. [2019-11-15 20:23:59,051 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1426 transitions. Word has length 83 [2019-11-15 20:23:59,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:23:59,051 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1426 transitions. [2019-11-15 20:23:59,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:23:59,051 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1426 transitions. [2019-11-15 20:23:59,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:23:59,054 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:23:59,061 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:23:59,062 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:23:59,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:23:59,062 INFO L82 PathProgramCache]: Analyzing trace with hash -2029102298, now seen corresponding path program 1 times [2019-11-15 20:23:59,062 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:23:59,063 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574249730] [2019-11-15 20:23:59,063 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:59,063 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:59,063 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:23:59,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:23:59,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:23:59,176 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574249730] [2019-11-15 20:23:59,176 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:23:59,177 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:23:59,177 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1088434995] [2019-11-15 20:23:59,177 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:23:59,178 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:23:59,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:23:59,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:59,179 INFO L87 Difference]: Start difference. First operand 950 states and 1426 transitions. Second operand 3 states. [2019-11-15 20:23:59,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:23:59,250 INFO L93 Difference]: Finished difference Result 1888 states and 2834 transitions. [2019-11-15 20:23:59,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:23:59,251 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:23:59,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:23:59,258 INFO L225 Difference]: With dead ends: 1888 [2019-11-15 20:23:59,258 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:23:59,261 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:59,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:23:59,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:23:59,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:23:59,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1418 transitions. [2019-11-15 20:23:59,320 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1418 transitions. Word has length 83 [2019-11-15 20:23:59,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:23:59,321 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1418 transitions. [2019-11-15 20:23:59,321 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:23:59,322 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1418 transitions. [2019-11-15 20:23:59,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:23:59,325 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:23:59,325 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:23:59,325 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:23:59,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:23:59,326 INFO L82 PathProgramCache]: Analyzing trace with hash -2086215006, now seen corresponding path program 1 times [2019-11-15 20:23:59,326 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:23:59,326 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1944975533] [2019-11-15 20:23:59,327 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:59,327 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:59,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:23:59,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:23:59,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:23:59,452 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1944975533] [2019-11-15 20:23:59,452 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:23:59,452 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:23:59,453 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597120391] [2019-11-15 20:23:59,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:23:59,456 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:23:59,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:23:59,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:59,457 INFO L87 Difference]: Start difference. First operand 950 states and 1418 transitions. Second operand 3 states. [2019-11-15 20:23:59,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:23:59,543 INFO L93 Difference]: Finished difference Result 1886 states and 2815 transitions. [2019-11-15 20:23:59,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:23:59,544 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:23:59,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:23:59,551 INFO L225 Difference]: With dead ends: 1886 [2019-11-15 20:23:59,551 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:23:59,554 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:59,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:23:59,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:23:59,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:23:59,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1410 transitions. [2019-11-15 20:23:59,670 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1410 transitions. Word has length 83 [2019-11-15 20:23:59,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:23:59,671 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1410 transitions. [2019-11-15 20:23:59,671 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:23:59,671 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1410 transitions. [2019-11-15 20:23:59,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:23:59,673 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:23:59,673 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:23:59,674 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:23:59,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:23:59,674 INFO L82 PathProgramCache]: Analyzing trace with hash 41097502, now seen corresponding path program 1 times [2019-11-15 20:23:59,675 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:23:59,675 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70574135] [2019-11-15 20:23:59,675 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:59,675 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:59,676 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:23:59,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:23:59,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:23:59,775 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70574135] [2019-11-15 20:23:59,777 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:23:59,777 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:23:59,777 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493308620] [2019-11-15 20:23:59,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:23:59,778 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:23:59,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:23:59,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:59,779 INFO L87 Difference]: Start difference. First operand 950 states and 1410 transitions. Second operand 3 states. [2019-11-15 20:23:59,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:23:59,867 INFO L93 Difference]: Finished difference Result 1885 states and 2798 transitions. [2019-11-15 20:23:59,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:23:59,868 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:23:59,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:23:59,877 INFO L225 Difference]: With dead ends: 1885 [2019-11-15 20:23:59,877 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:23:59,880 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:23:59,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:23:59,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:23:59,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:23:59,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1402 transitions. [2019-11-15 20:23:59,938 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1402 transitions. Word has length 83 [2019-11-15 20:23:59,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:23:59,939 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1402 transitions. [2019-11-15 20:23:59,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:23:59,940 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1402 transitions. [2019-11-15 20:23:59,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:23:59,941 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:23:59,942 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:23:59,942 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:23:59,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:23:59,945 INFO L82 PathProgramCache]: Analyzing trace with hash -451528672, now seen corresponding path program 1 times [2019-11-15 20:23:59,946 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:23:59,946 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674568726] [2019-11-15 20:23:59,947 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:59,947 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:23:59,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:23:59,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:00,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:00,017 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [674568726] [2019-11-15 20:24:00,017 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:00,018 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:00,018 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1432376273] [2019-11-15 20:24:00,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:00,019 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:00,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:00,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,020 INFO L87 Difference]: Start difference. First operand 950 states and 1402 transitions. Second operand 3 states. [2019-11-15 20:24:00,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:00,134 INFO L93 Difference]: Finished difference Result 1884 states and 2781 transitions. [2019-11-15 20:24:00,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:00,135 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:24:00,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:00,142 INFO L225 Difference]: With dead ends: 1884 [2019-11-15 20:24:00,143 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:24:00,145 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:24:00,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:24:00,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:24:00,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1380 transitions. [2019-11-15 20:24:00,210 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1380 transitions. Word has length 83 [2019-11-15 20:24:00,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:00,210 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1380 transitions. [2019-11-15 20:24:00,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:00,211 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1380 transitions. [2019-11-15 20:24:00,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:24:00,212 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:00,212 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:00,212 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:00,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:00,213 INFO L82 PathProgramCache]: Analyzing trace with hash 713295197, now seen corresponding path program 1 times [2019-11-15 20:24:00,213 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:00,214 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443783771] [2019-11-15 20:24:00,214 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:00,214 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:00,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:00,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:00,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:00,285 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443783771] [2019-11-15 20:24:00,285 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:00,286 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:00,286 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438973071] [2019-11-15 20:24:00,286 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:00,287 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:00,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:00,287 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,287 INFO L87 Difference]: Start difference. First operand 950 states and 1380 transitions. Second operand 3 states. [2019-11-15 20:24:00,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:00,396 INFO L93 Difference]: Finished difference Result 1883 states and 2736 transitions. [2019-11-15 20:24:00,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:00,397 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:24:00,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:00,405 INFO L225 Difference]: With dead ends: 1883 [2019-11-15 20:24:00,405 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:24:00,409 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:24:00,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:24:00,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:24:00,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1358 transitions. [2019-11-15 20:24:00,467 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1358 transitions. Word has length 83 [2019-11-15 20:24:00,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:00,467 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1358 transitions. [2019-11-15 20:24:00,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:00,468 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1358 transitions. [2019-11-15 20:24:00,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:24:00,469 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:00,469 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:00,469 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:00,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:00,471 INFO L82 PathProgramCache]: Analyzing trace with hash 2103165025, now seen corresponding path program 1 times [2019-11-15 20:24:00,472 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:00,472 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273052287] [2019-11-15 20:24:00,472 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:00,472 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:00,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:00,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:00,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:00,512 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273052287] [2019-11-15 20:24:00,513 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:00,513 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:00,513 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899576770] [2019-11-15 20:24:00,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:00,514 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:00,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:00,515 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,515 INFO L87 Difference]: Start difference. First operand 950 states and 1358 transitions. Second operand 3 states. [2019-11-15 20:24:00,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:00,632 INFO L93 Difference]: Finished difference Result 1882 states and 2691 transitions. [2019-11-15 20:24:00,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:00,633 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:24:00,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:00,639 INFO L225 Difference]: With dead ends: 1882 [2019-11-15 20:24:00,640 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:24:00,642 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:24:00,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:24:00,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:24:00,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1336 transitions. [2019-11-15 20:24:00,695 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1336 transitions. Word has length 83 [2019-11-15 20:24:00,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:00,695 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1336 transitions. [2019-11-15 20:24:00,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:00,695 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1336 transitions. [2019-11-15 20:24:00,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:24:00,697 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:00,697 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:00,700 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:00,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:00,701 INFO L82 PathProgramCache]: Analyzing trace with hash 845256222, now seen corresponding path program 1 times [2019-11-15 20:24:00,701 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:00,702 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035178481] [2019-11-15 20:24:00,702 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:00,702 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:00,702 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:00,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:00,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:00,748 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035178481] [2019-11-15 20:24:00,749 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:00,750 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:00,750 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125276142] [2019-11-15 20:24:00,750 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:00,751 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:00,751 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:00,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,752 INFO L87 Difference]: Start difference. First operand 950 states and 1336 transitions. Second operand 3 states. [2019-11-15 20:24:00,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:00,865 INFO L93 Difference]: Finished difference Result 1881 states and 2646 transitions. [2019-11-15 20:24:00,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:00,866 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:24:00,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:00,873 INFO L225 Difference]: With dead ends: 1881 [2019-11-15 20:24:00,873 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:24:00,880 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:24:00,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:24:00,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:24:00,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1314 transitions. [2019-11-15 20:24:00,933 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1314 transitions. Word has length 83 [2019-11-15 20:24:00,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:00,934 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1314 transitions. [2019-11-15 20:24:00,934 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:00,934 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1314 transitions. [2019-11-15 20:24:00,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:24:00,935 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:00,935 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:00,936 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:00,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:00,936 INFO L82 PathProgramCache]: Analyzing trace with hash 1865695778, now seen corresponding path program 1 times [2019-11-15 20:24:00,936 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:00,936 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214913172] [2019-11-15 20:24:00,937 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:00,937 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:00,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:00,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:00,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:00,977 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214913172] [2019-11-15 20:24:00,977 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:00,977 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:00,978 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936006523] [2019-11-15 20:24:00,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:00,978 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:00,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:00,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:00,979 INFO L87 Difference]: Start difference. First operand 950 states and 1314 transitions. Second operand 3 states. [2019-11-15 20:24:01,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:01,098 INFO L93 Difference]: Finished difference Result 1880 states and 2601 transitions. [2019-11-15 20:24:01,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:01,099 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:24:01,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:01,106 INFO L225 Difference]: With dead ends: 1880 [2019-11-15 20:24:01,106 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:24:01,108 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:01,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:24:01,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:24:01,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:24:01,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1292 transitions. [2019-11-15 20:24:01,165 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1292 transitions. Word has length 83 [2019-11-15 20:24:01,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:01,168 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1292 transitions. [2019-11-15 20:24:01,168 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:01,168 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1292 transitions. [2019-11-15 20:24:01,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:24:01,169 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:01,169 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:01,170 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:01,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:01,170 INFO L82 PathProgramCache]: Analyzing trace with hash 1915494495, now seen corresponding path program 1 times [2019-11-15 20:24:01,170 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:01,171 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [321297642] [2019-11-15 20:24:01,171 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:01,171 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:01,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:01,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:01,241 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:01,241 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [321297642] [2019-11-15 20:24:01,241 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:01,242 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:01,242 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [117347852] [2019-11-15 20:24:01,242 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:01,242 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:01,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:01,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:01,243 INFO L87 Difference]: Start difference. First operand 950 states and 1292 transitions. Second operand 3 states. [2019-11-15 20:24:01,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:01,304 INFO L93 Difference]: Finished difference Result 1887 states and 2565 transitions. [2019-11-15 20:24:01,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:01,305 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:24:01,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:01,312 INFO L225 Difference]: With dead ends: 1887 [2019-11-15 20:24:01,312 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:24:01,314 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:01,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:24:01,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:24:01,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:24:01,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1284 transitions. [2019-11-15 20:24:01,384 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1284 transitions. Word has length 83 [2019-11-15 20:24:01,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:01,385 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1284 transitions. [2019-11-15 20:24:01,385 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:01,385 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1284 transitions. [2019-11-15 20:24:01,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:24:01,386 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:01,387 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:01,387 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:01,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:01,387 INFO L82 PathProgramCache]: Analyzing trace with hash 110056161, now seen corresponding path program 1 times [2019-11-15 20:24:01,388 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:01,388 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484210788] [2019-11-15 20:24:01,388 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:01,388 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:01,389 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:01,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:01,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:01,461 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [484210788] [2019-11-15 20:24:01,461 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:01,461 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:01,462 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1444606591] [2019-11-15 20:24:01,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:01,463 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:01,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:01,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:01,464 INFO L87 Difference]: Start difference. First operand 950 states and 1284 transitions. Second operand 3 states. [2019-11-15 20:24:01,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:01,578 INFO L93 Difference]: Finished difference Result 1879 states and 2541 transitions. [2019-11-15 20:24:01,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:01,578 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:24:01,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:01,586 INFO L225 Difference]: With dead ends: 1879 [2019-11-15 20:24:01,587 INFO L226 Difference]: Without dead ends: 950 [2019-11-15 20:24:01,589 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:01,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-11-15 20:24:01,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-11-15 20:24:01,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-11-15 20:24:01,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1262 transitions. [2019-11-15 20:24:01,659 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1262 transitions. Word has length 83 [2019-11-15 20:24:01,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:01,661 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1262 transitions. [2019-11-15 20:24:01,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:01,661 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1262 transitions. [2019-11-15 20:24:01,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:24:01,662 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:01,663 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:01,663 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:01,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:01,663 INFO L82 PathProgramCache]: Analyzing trace with hash -1169807517, now seen corresponding path program 1 times [2019-11-15 20:24:01,664 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:01,664 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812366209] [2019-11-15 20:24:01,664 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:01,664 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:01,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:01,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:01,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:01,797 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812366209] [2019-11-15 20:24:01,797 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:01,797 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:01,798 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73613258] [2019-11-15 20:24:01,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:01,798 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:01,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:01,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:01,799 INFO L87 Difference]: Start difference. First operand 950 states and 1262 transitions. Second operand 3 states. [2019-11-15 20:24:01,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:01,945 INFO L93 Difference]: Finished difference Result 2718 states and 3617 transitions. [2019-11-15 20:24:01,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:01,946 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-15 20:24:01,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:01,960 INFO L225 Difference]: With dead ends: 2718 [2019-11-15 20:24:01,960 INFO L226 Difference]: Without dead ends: 1791 [2019-11-15 20:24:01,963 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:01,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1791 states. [2019-11-15 20:24:02,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1791 to 1711. [2019-11-15 20:24:02,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1711 states. [2019-11-15 20:24:02,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1711 states to 1711 states and 2262 transitions. [2019-11-15 20:24:02,071 INFO L78 Accepts]: Start accepts. Automaton has 1711 states and 2262 transitions. Word has length 83 [2019-11-15 20:24:02,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:02,071 INFO L462 AbstractCegarLoop]: Abstraction has 1711 states and 2262 transitions. [2019-11-15 20:24:02,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:02,072 INFO L276 IsEmpty]: Start isEmpty. Operand 1711 states and 2262 transitions. [2019-11-15 20:24:02,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-15 20:24:02,074 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:02,075 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:02,075 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:02,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:02,076 INFO L82 PathProgramCache]: Analyzing trace with hash 797868130, now seen corresponding path program 1 times [2019-11-15 20:24:02,076 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:02,076 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [838947090] [2019-11-15 20:24:02,076 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:02,076 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:02,077 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:02,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:02,169 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:02,170 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [838947090] [2019-11-15 20:24:02,170 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:02,170 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:24:02,170 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1208239429] [2019-11-15 20:24:02,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:24:02,171 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:02,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:24:02,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:24:02,172 INFO L87 Difference]: Start difference. First operand 1711 states and 2262 transitions. Second operand 5 states. [2019-11-15 20:24:02,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:02,463 INFO L93 Difference]: Finished difference Result 3853 states and 5137 transitions. [2019-11-15 20:24:02,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:24:02,464 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-11-15 20:24:02,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:02,478 INFO L225 Difference]: With dead ends: 3853 [2019-11-15 20:24:02,478 INFO L226 Difference]: Without dead ends: 2169 [2019-11-15 20:24:02,482 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:24:02,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2169 states. [2019-11-15 20:24:02,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2169 to 1717. [2019-11-15 20:24:02,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1717 states. [2019-11-15 20:24:02,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1717 states to 1717 states and 2241 transitions. [2019-11-15 20:24:02,619 INFO L78 Accepts]: Start accepts. Automaton has 1717 states and 2241 transitions. Word has length 135 [2019-11-15 20:24:02,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:02,620 INFO L462 AbstractCegarLoop]: Abstraction has 1717 states and 2241 transitions. [2019-11-15 20:24:02,620 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:24:02,620 INFO L276 IsEmpty]: Start isEmpty. Operand 1717 states and 2241 transitions. [2019-11-15 20:24:02,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-15 20:24:02,623 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:02,623 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:02,623 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:02,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:02,624 INFO L82 PathProgramCache]: Analyzing trace with hash -256235162, now seen corresponding path program 1 times [2019-11-15 20:24:02,624 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:02,624 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1691850756] [2019-11-15 20:24:02,625 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:02,625 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:02,625 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:02,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:02,701 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:02,707 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1691850756] [2019-11-15 20:24:02,710 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:02,710 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:24:02,711 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551748236] [2019-11-15 20:24:02,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:24:02,712 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:02,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:24:02,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:24:02,713 INFO L87 Difference]: Start difference. First operand 1717 states and 2241 transitions. Second operand 5 states. [2019-11-15 20:24:03,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:03,035 INFO L93 Difference]: Finished difference Result 3936 states and 5175 transitions. [2019-11-15 20:24:03,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:24:03,036 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-11-15 20:24:03,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:03,052 INFO L225 Difference]: With dead ends: 3936 [2019-11-15 20:24:03,053 INFO L226 Difference]: Without dead ends: 2253 [2019-11-15 20:24:03,057 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:24:03,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2253 states. [2019-11-15 20:24:03,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2253 to 1723. [2019-11-15 20:24:03,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1723 states. [2019-11-15 20:24:03,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1723 states to 1723 states and 2220 transitions. [2019-11-15 20:24:03,184 INFO L78 Accepts]: Start accepts. Automaton has 1723 states and 2220 transitions. Word has length 135 [2019-11-15 20:24:03,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:03,185 INFO L462 AbstractCegarLoop]: Abstraction has 1723 states and 2220 transitions. [2019-11-15 20:24:03,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:24:03,185 INFO L276 IsEmpty]: Start isEmpty. Operand 1723 states and 2220 transitions. [2019-11-15 20:24:03,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-15 20:24:03,188 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:03,189 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:03,189 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:03,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:03,190 INFO L82 PathProgramCache]: Analyzing trace with hash -1153628440, now seen corresponding path program 1 times [2019-11-15 20:24:03,190 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:03,190 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31757577] [2019-11-15 20:24:03,190 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:03,191 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:03,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:03,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:03,280 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:03,280 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31757577] [2019-11-15 20:24:03,280 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:03,281 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:24:03,281 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094003555] [2019-11-15 20:24:03,282 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:24:03,282 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:03,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:24:03,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:24:03,283 INFO L87 Difference]: Start difference. First operand 1723 states and 2220 transitions. Second operand 5 states. [2019-11-15 20:24:03,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:03,773 INFO L93 Difference]: Finished difference Result 4523 states and 5873 transitions. [2019-11-15 20:24:03,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:24:03,774 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-11-15 20:24:03,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:03,792 INFO L225 Difference]: With dead ends: 4523 [2019-11-15 20:24:03,792 INFO L226 Difference]: Without dead ends: 2841 [2019-11-15 20:24:03,796 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:24:03,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2841 states. [2019-11-15 20:24:03,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2841 to 1735. [2019-11-15 20:24:03,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1735 states. [2019-11-15 20:24:03,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1735 states to 1735 states and 2207 transitions. [2019-11-15 20:24:03,935 INFO L78 Accepts]: Start accepts. Automaton has 1735 states and 2207 transitions. Word has length 135 [2019-11-15 20:24:03,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:03,935 INFO L462 AbstractCegarLoop]: Abstraction has 1735 states and 2207 transitions. [2019-11-15 20:24:03,936 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:24:03,936 INFO L276 IsEmpty]: Start isEmpty. Operand 1735 states and 2207 transitions. [2019-11-15 20:24:03,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-15 20:24:03,939 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:03,939 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:03,939 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:03,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:03,940 INFO L82 PathProgramCache]: Analyzing trace with hash 1106974188, now seen corresponding path program 1 times [2019-11-15 20:24:03,940 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:03,940 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [716179130] [2019-11-15 20:24:03,940 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:03,941 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:03,941 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:03,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:04,011 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:04,011 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [716179130] [2019-11-15 20:24:04,011 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:04,012 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:24:04,012 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1312669923] [2019-11-15 20:24:04,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:24:04,013 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:04,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:24:04,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:24:04,013 INFO L87 Difference]: Start difference. First operand 1735 states and 2207 transitions. Second operand 5 states. [2019-11-15 20:24:04,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:04,398 INFO L93 Difference]: Finished difference Result 4678 states and 5995 transitions. [2019-11-15 20:24:04,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:24:04,399 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-11-15 20:24:04,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:04,419 INFO L225 Difference]: With dead ends: 4678 [2019-11-15 20:24:04,419 INFO L226 Difference]: Without dead ends: 2991 [2019-11-15 20:24:04,423 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:24:04,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2991 states. [2019-11-15 20:24:04,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2991 to 1747. [2019-11-15 20:24:04,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1747 states. [2019-11-15 20:24:04,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1747 states to 1747 states and 2194 transitions. [2019-11-15 20:24:04,582 INFO L78 Accepts]: Start accepts. Automaton has 1747 states and 2194 transitions. Word has length 135 [2019-11-15 20:24:04,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:04,582 INFO L462 AbstractCegarLoop]: Abstraction has 1747 states and 2194 transitions. [2019-11-15 20:24:04,582 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:24:04,583 INFO L276 IsEmpty]: Start isEmpty. Operand 1747 states and 2194 transitions. [2019-11-15 20:24:04,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-15 20:24:04,585 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:04,586 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:04,586 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:04,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:04,587 INFO L82 PathProgramCache]: Analyzing trace with hash -132007952, now seen corresponding path program 1 times [2019-11-15 20:24:04,587 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:04,587 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229430639] [2019-11-15 20:24:04,588 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:04,588 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:04,588 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:04,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:04,679 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:04,680 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229430639] [2019-11-15 20:24:04,680 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:04,681 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:24:04,681 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164313349] [2019-11-15 20:24:04,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:24:04,683 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:04,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:24:04,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:24:04,684 INFO L87 Difference]: Start difference. First operand 1747 states and 2194 transitions. Second operand 5 states. [2019-11-15 20:24:05,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:05,099 INFO L93 Difference]: Finished difference Result 4952 states and 6274 transitions. [2019-11-15 20:24:05,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:24:05,100 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-11-15 20:24:05,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:05,134 INFO L225 Difference]: With dead ends: 4952 [2019-11-15 20:24:05,143 INFO L226 Difference]: Without dead ends: 3267 [2019-11-15 20:24:05,148 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:24:05,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3267 states. [2019-11-15 20:24:05,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3267 to 1759. [2019-11-15 20:24:05,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1759 states. [2019-11-15 20:24:05,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1759 states to 1759 states and 2181 transitions. [2019-11-15 20:24:05,389 INFO L78 Accepts]: Start accepts. Automaton has 1759 states and 2181 transitions. Word has length 135 [2019-11-15 20:24:05,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:05,390 INFO L462 AbstractCegarLoop]: Abstraction has 1759 states and 2181 transitions. [2019-11-15 20:24:05,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:24:05,390 INFO L276 IsEmpty]: Start isEmpty. Operand 1759 states and 2181 transitions. [2019-11-15 20:24:05,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-15 20:24:05,393 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:05,393 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:05,394 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:05,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:05,394 INFO L82 PathProgramCache]: Analyzing trace with hash -1580711948, now seen corresponding path program 1 times [2019-11-15 20:24:05,394 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:05,395 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [465581319] [2019-11-15 20:24:05,395 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:05,395 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:05,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:05,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:05,473 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:05,473 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [465581319] [2019-11-15 20:24:05,473 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:05,474 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:05,474 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1950559290] [2019-11-15 20:24:05,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:05,475 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:05,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:05,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:05,476 INFO L87 Difference]: Start difference. First operand 1759 states and 2181 transitions. Second operand 3 states. [2019-11-15 20:24:05,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:05,774 INFO L93 Difference]: Finished difference Result 4879 states and 6029 transitions. [2019-11-15 20:24:05,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:05,775 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 135 [2019-11-15 20:24:05,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:05,784 INFO L225 Difference]: With dead ends: 4879 [2019-11-15 20:24:05,784 INFO L226 Difference]: Without dead ends: 3194 [2019-11-15 20:24:05,788 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:05,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3194 states. [2019-11-15 20:24:06,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3194 to 3190. [2019-11-15 20:24:06,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3190 states. [2019-11-15 20:24:06,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3190 states to 3190 states and 3915 transitions. [2019-11-15 20:24:06,045 INFO L78 Accepts]: Start accepts. Automaton has 3190 states and 3915 transitions. Word has length 135 [2019-11-15 20:24:06,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:06,046 INFO L462 AbstractCegarLoop]: Abstraction has 3190 states and 3915 transitions. [2019-11-15 20:24:06,046 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:06,046 INFO L276 IsEmpty]: Start isEmpty. Operand 3190 states and 3915 transitions. [2019-11-15 20:24:06,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-11-15 20:24:06,051 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:06,051 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:06,052 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:06,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:06,052 INFO L82 PathProgramCache]: Analyzing trace with hash 1007923084, now seen corresponding path program 1 times [2019-11-15 20:24:06,052 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:06,053 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [993528493] [2019-11-15 20:24:06,053 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:06,053 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:06,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:06,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:06,134 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:06,134 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [993528493] [2019-11-15 20:24:06,135 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:06,135 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:06,135 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486015007] [2019-11-15 20:24:06,136 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:06,137 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:06,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:06,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:06,137 INFO L87 Difference]: Start difference. First operand 3190 states and 3915 transitions. Second operand 3 states. [2019-11-15 20:24:06,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:06,636 INFO L93 Difference]: Finished difference Result 9050 states and 11084 transitions. [2019-11-15 20:24:06,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:06,636 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 136 [2019-11-15 20:24:06,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:06,651 INFO L225 Difference]: With dead ends: 9050 [2019-11-15 20:24:06,652 INFO L226 Difference]: Without dead ends: 5934 [2019-11-15 20:24:06,659 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:06,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5934 states. [2019-11-15 20:24:07,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5934 to 5930. [2019-11-15 20:24:07,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5930 states. [2019-11-15 20:24:07,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5930 states to 5930 states and 7232 transitions. [2019-11-15 20:24:07,236 INFO L78 Accepts]: Start accepts. Automaton has 5930 states and 7232 transitions. Word has length 136 [2019-11-15 20:24:07,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:07,237 INFO L462 AbstractCegarLoop]: Abstraction has 5930 states and 7232 transitions. [2019-11-15 20:24:07,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:07,237 INFO L276 IsEmpty]: Start isEmpty. Operand 5930 states and 7232 transitions. [2019-11-15 20:24:07,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-11-15 20:24:07,243 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:07,243 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:07,244 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:07,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:07,244 INFO L82 PathProgramCache]: Analyzing trace with hash 463050510, now seen corresponding path program 1 times [2019-11-15 20:24:07,244 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:07,245 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [364559266] [2019-11-15 20:24:07,245 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:07,245 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:07,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:07,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:07,281 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-11-15 20:24:07,282 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [364559266] [2019-11-15 20:24:07,282 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:07,282 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:07,282 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917704131] [2019-11-15 20:24:07,283 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:07,284 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:07,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:07,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:07,284 INFO L87 Difference]: Start difference. First operand 5930 states and 7232 transitions. Second operand 3 states. [2019-11-15 20:24:07,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:07,718 INFO L93 Difference]: Finished difference Result 11718 states and 14302 transitions. [2019-11-15 20:24:07,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:07,719 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 136 [2019-11-15 20:24:07,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:07,732 INFO L225 Difference]: With dead ends: 11718 [2019-11-15 20:24:07,733 INFO L226 Difference]: Without dead ends: 5862 [2019-11-15 20:24:07,742 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:07,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5862 states. [2019-11-15 20:24:08,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5862 to 5862. [2019-11-15 20:24:08,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5862 states. [2019-11-15 20:24:08,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5862 states to 5862 states and 7154 transitions. [2019-11-15 20:24:08,229 INFO L78 Accepts]: Start accepts. Automaton has 5862 states and 7154 transitions. Word has length 136 [2019-11-15 20:24:08,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:08,229 INFO L462 AbstractCegarLoop]: Abstraction has 5862 states and 7154 transitions. [2019-11-15 20:24:08,230 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:08,230 INFO L276 IsEmpty]: Start isEmpty. Operand 5862 states and 7154 transitions. [2019-11-15 20:24:08,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-11-15 20:24:08,236 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:08,236 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:08,236 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:08,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:08,238 INFO L82 PathProgramCache]: Analyzing trace with hash -622903665, now seen corresponding path program 1 times [2019-11-15 20:24:08,238 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:08,238 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169233489] [2019-11-15 20:24:08,238 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:08,239 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:08,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:08,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:08,412 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:08,413 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169233489] [2019-11-15 20:24:08,413 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:08,413 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:08,413 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [962281177] [2019-11-15 20:24:08,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:08,415 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:08,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:08,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:08,416 INFO L87 Difference]: Start difference. First operand 5862 states and 7154 transitions. Second operand 3 states. [2019-11-15 20:24:09,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:09,295 INFO L93 Difference]: Finished difference Result 16721 states and 20393 transitions. [2019-11-15 20:24:09,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:09,296 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 137 [2019-11-15 20:24:09,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:09,335 INFO L225 Difference]: With dead ends: 16721 [2019-11-15 20:24:09,336 INFO L226 Difference]: Without dead ends: 10933 [2019-11-15 20:24:09,349 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:09,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10933 states. [2019-11-15 20:24:10,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10933 to 10929. [2019-11-15 20:24:10,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10929 states. [2019-11-15 20:24:10,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10929 states to 10929 states and 13293 transitions. [2019-11-15 20:24:10,233 INFO L78 Accepts]: Start accepts. Automaton has 10929 states and 13293 transitions. Word has length 137 [2019-11-15 20:24:10,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:10,234 INFO L462 AbstractCegarLoop]: Abstraction has 10929 states and 13293 transitions. [2019-11-15 20:24:10,234 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:10,235 INFO L276 IsEmpty]: Start isEmpty. Operand 10929 states and 13293 transitions. [2019-11-15 20:24:10,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-11-15 20:24:10,247 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:10,247 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:10,248 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:10,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:10,248 INFO L82 PathProgramCache]: Analyzing trace with hash -1167776239, now seen corresponding path program 1 times [2019-11-15 20:24:10,249 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:10,249 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025129036] [2019-11-15 20:24:10,249 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:10,250 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:10,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:10,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:10,308 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-11-15 20:24:10,309 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025129036] [2019-11-15 20:24:10,309 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:10,310 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:10,310 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346617241] [2019-11-15 20:24:10,311 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:10,311 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:10,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:10,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:10,312 INFO L87 Difference]: Start difference. First operand 10929 states and 13293 transitions. Second operand 3 states. [2019-11-15 20:24:11,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:11,143 INFO L93 Difference]: Finished difference Result 21717 states and 26427 transitions. [2019-11-15 20:24:11,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:11,143 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 137 [2019-11-15 20:24:11,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:11,160 INFO L225 Difference]: With dead ends: 21717 [2019-11-15 20:24:11,160 INFO L226 Difference]: Without dead ends: 10862 [2019-11-15 20:24:11,176 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:11,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10862 states. [2019-11-15 20:24:11,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10862 to 10862. [2019-11-15 20:24:11,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10862 states. [2019-11-15 20:24:11,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10862 states to 10862 states and 13217 transitions. [2019-11-15 20:24:11,809 INFO L78 Accepts]: Start accepts. Automaton has 10862 states and 13217 transitions. Word has length 137 [2019-11-15 20:24:11,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:11,810 INFO L462 AbstractCegarLoop]: Abstraction has 10862 states and 13217 transitions. [2019-11-15 20:24:11,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:11,810 INFO L276 IsEmpty]: Start isEmpty. Operand 10862 states and 13217 transitions. [2019-11-15 20:24:11,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2019-11-15 20:24:11,817 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:11,817 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:11,818 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:11,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:11,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1460610289, now seen corresponding path program 1 times [2019-11-15 20:24:11,819 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:11,819 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335396592] [2019-11-15 20:24:11,819 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:11,819 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:11,820 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:11,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:11,885 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:11,886 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335396592] [2019-11-15 20:24:11,886 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:11,886 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:11,887 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [362106278] [2019-11-15 20:24:11,887 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:11,888 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:11,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:11,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:11,888 INFO L87 Difference]: Start difference. First operand 10862 states and 13217 transitions. Second operand 3 states. [2019-11-15 20:24:13,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:13,507 INFO L93 Difference]: Finished difference Result 31292 states and 38062 transitions. [2019-11-15 20:24:13,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:13,508 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2019-11-15 20:24:13,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:13,535 INFO L225 Difference]: With dead ends: 31292 [2019-11-15 20:24:13,536 INFO L226 Difference]: Without dead ends: 20504 [2019-11-15 20:24:13,552 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:13,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20504 states. [2019-11-15 20:24:15,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20504 to 20084. [2019-11-15 20:24:15,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20084 states. [2019-11-15 20:24:15,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20084 states to 20084 states and 24370 transitions. [2019-11-15 20:24:15,253 INFO L78 Accepts]: Start accepts. Automaton has 20084 states and 24370 transitions. Word has length 138 [2019-11-15 20:24:15,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:15,253 INFO L462 AbstractCegarLoop]: Abstraction has 20084 states and 24370 transitions. [2019-11-15 20:24:15,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:15,254 INFO L276 IsEmpty]: Start isEmpty. Operand 20084 states and 24370 transitions. [2019-11-15 20:24:15,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2019-11-15 20:24:15,266 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:15,267 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:15,267 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:15,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:15,268 INFO L82 PathProgramCache]: Analyzing trace with hash -78955983, now seen corresponding path program 1 times [2019-11-15 20:24:15,268 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:15,268 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352035743] [2019-11-15 20:24:15,269 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:15,269 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:15,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:15,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:15,310 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-11-15 20:24:15,311 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352035743] [2019-11-15 20:24:15,311 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:15,311 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:15,312 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623049759] [2019-11-15 20:24:15,312 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:15,313 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:15,313 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:15,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:15,313 INFO L87 Difference]: Start difference. First operand 20084 states and 24370 transitions. Second operand 3 states. [2019-11-15 20:24:16,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:16,475 INFO L93 Difference]: Finished difference Result 40047 states and 48604 transitions. [2019-11-15 20:24:16,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:16,476 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2019-11-15 20:24:16,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:16,498 INFO L225 Difference]: With dead ends: 40047 [2019-11-15 20:24:16,499 INFO L226 Difference]: Without dead ends: 20018 [2019-11-15 20:24:16,518 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:16,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20018 states. [2019-11-15 20:24:18,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20018 to 20018. [2019-11-15 20:24:18,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20018 states. [2019-11-15 20:24:18,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20018 states to 20018 states and 24296 transitions. [2019-11-15 20:24:18,107 INFO L78 Accepts]: Start accepts. Automaton has 20018 states and 24296 transitions. Word has length 138 [2019-11-15 20:24:18,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:18,107 INFO L462 AbstractCegarLoop]: Abstraction has 20018 states and 24296 transitions. [2019-11-15 20:24:18,107 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:18,107 INFO L276 IsEmpty]: Start isEmpty. Operand 20018 states and 24296 transitions. [2019-11-15 20:24:18,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-11-15 20:24:18,117 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:18,117 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:18,117 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:18,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:18,118 INFO L82 PathProgramCache]: Analyzing trace with hash 1660502314, now seen corresponding path program 1 times [2019-11-15 20:24:18,118 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:18,119 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1547717318] [2019-11-15 20:24:18,119 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:18,119 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:18,119 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:18,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:18,191 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:18,192 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1547717318] [2019-11-15 20:24:18,192 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:18,192 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:18,193 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1955772636] [2019-11-15 20:24:18,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:18,193 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:18,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:18,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:18,194 INFO L87 Difference]: Start difference. First operand 20018 states and 24296 transitions. Second operand 3 states. [2019-11-15 20:24:21,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:21,185 INFO L93 Difference]: Finished difference Result 56835 states and 68987 transitions. [2019-11-15 20:24:21,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:21,186 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 139 [2019-11-15 20:24:21,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:21,230 INFO L225 Difference]: With dead ends: 56835 [2019-11-15 20:24:21,230 INFO L226 Difference]: Without dead ends: 36891 [2019-11-15 20:24:21,247 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:21,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36891 states. [2019-11-15 20:24:23,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36891 to 36887. [2019-11-15 20:24:23,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36887 states. [2019-11-15 20:24:23,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36887 states to 36887 states and 44695 transitions. [2019-11-15 20:24:23,868 INFO L78 Accepts]: Start accepts. Automaton has 36887 states and 44695 transitions. Word has length 139 [2019-11-15 20:24:23,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:23,868 INFO L462 AbstractCegarLoop]: Abstraction has 36887 states and 44695 transitions. [2019-11-15 20:24:23,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:23,869 INFO L276 IsEmpty]: Start isEmpty. Operand 36887 states and 44695 transitions. [2019-11-15 20:24:23,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-11-15 20:24:23,884 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:23,884 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:23,884 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:23,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:23,885 INFO L82 PathProgramCache]: Analyzing trace with hash 1115629740, now seen corresponding path program 1 times [2019-11-15 20:24:23,885 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:23,886 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697126842] [2019-11-15 20:24:23,886 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:23,886 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:23,886 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:23,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:23,929 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-11-15 20:24:23,929 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697126842] [2019-11-15 20:24:23,930 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:23,930 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:23,930 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1779338262] [2019-11-15 20:24:23,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:23,931 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:23,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:23,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:23,932 INFO L87 Difference]: Start difference. First operand 36887 states and 44695 transitions. Second operand 3 states. [2019-11-15 20:24:26,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:26,086 INFO L93 Difference]: Finished difference Result 73635 states and 89237 transitions. [2019-11-15 20:24:26,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:26,086 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 139 [2019-11-15 20:24:26,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:26,125 INFO L225 Difference]: With dead ends: 73635 [2019-11-15 20:24:26,126 INFO L226 Difference]: Without dead ends: 36822 [2019-11-15 20:24:26,161 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:26,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36822 states. [2019-11-15 20:24:29,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36822 to 36822. [2019-11-15 20:24:29,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36822 states. [2019-11-15 20:24:29,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36822 states to 36822 states and 44623 transitions. [2019-11-15 20:24:29,144 INFO L78 Accepts]: Start accepts. Automaton has 36822 states and 44623 transitions. Word has length 139 [2019-11-15 20:24:29,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:29,145 INFO L462 AbstractCegarLoop]: Abstraction has 36822 states and 44623 transitions. [2019-11-15 20:24:29,145 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:29,145 INFO L276 IsEmpty]: Start isEmpty. Operand 36822 states and 44623 transitions. [2019-11-15 20:24:29,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-11-15 20:24:29,159 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:29,159 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:29,160 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:29,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:29,160 INFO L82 PathProgramCache]: Analyzing trace with hash -1562919338, now seen corresponding path program 1 times [2019-11-15 20:24:29,161 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:29,161 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015069977] [2019-11-15 20:24:29,161 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:29,161 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:29,161 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:29,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:29,229 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:29,229 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015069977] [2019-11-15 20:24:29,230 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:29,230 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:29,230 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1999354685] [2019-11-15 20:24:29,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:29,231 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:29,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:29,232 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:29,232 INFO L87 Difference]: Start difference. First operand 36822 states and 44623 transitions. Second operand 3 states. [2019-11-15 20:24:33,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:33,571 INFO L93 Difference]: Finished difference Result 106480 states and 128661 transitions. [2019-11-15 20:24:33,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:33,571 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 140 [2019-11-15 20:24:33,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:33,638 INFO L225 Difference]: With dead ends: 106480 [2019-11-15 20:24:33,638 INFO L226 Difference]: Without dead ends: 53418 [2019-11-15 20:24:33,671 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:33,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53418 states. [2019-11-15 20:24:37,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53418 to 53418. [2019-11-15 20:24:37,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53418 states. [2019-11-15 20:24:37,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53418 states to 53418 states and 64412 transitions. [2019-11-15 20:24:37,197 INFO L78 Accepts]: Start accepts. Automaton has 53418 states and 64412 transitions. Word has length 140 [2019-11-15 20:24:37,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:37,198 INFO L462 AbstractCegarLoop]: Abstraction has 53418 states and 64412 transitions. [2019-11-15 20:24:37,198 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:37,198 INFO L276 IsEmpty]: Start isEmpty. Operand 53418 states and 64412 transitions. [2019-11-15 20:24:37,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2019-11-15 20:24:37,234 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:37,235 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:37,235 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:37,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:37,236 INFO L82 PathProgramCache]: Analyzing trace with hash -1472853732, now seen corresponding path program 1 times [2019-11-15 20:24:37,236 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:37,236 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632503192] [2019-11-15 20:24:37,236 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:37,236 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:37,236 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:37,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:37,366 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:24:37,366 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632503192] [2019-11-15 20:24:37,366 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:37,366 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:24:37,367 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149884502] [2019-11-15 20:24:37,367 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:37,367 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:37,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:37,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:37,368 INFO L87 Difference]: Start difference. First operand 53418 states and 64412 transitions. Second operand 3 states. [2019-11-15 20:24:41,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:41,960 INFO L93 Difference]: Finished difference Result 123134 states and 148256 transitions. [2019-11-15 20:24:41,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:41,960 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 181 [2019-11-15 20:24:41,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:42,044 INFO L225 Difference]: With dead ends: 123134 [2019-11-15 20:24:42,044 INFO L226 Difference]: Without dead ends: 69773 [2019-11-15 20:24:42,095 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:42,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69773 states. [2019-11-15 20:24:46,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69773 to 69581. [2019-11-15 20:24:46,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69581 states. [2019-11-15 20:24:46,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69581 states to 69581 states and 83394 transitions. [2019-11-15 20:24:46,742 INFO L78 Accepts]: Start accepts. Automaton has 69581 states and 83394 transitions. Word has length 181 [2019-11-15 20:24:46,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:24:46,743 INFO L462 AbstractCegarLoop]: Abstraction has 69581 states and 83394 transitions. [2019-11-15 20:24:46,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:24:46,744 INFO L276 IsEmpty]: Start isEmpty. Operand 69581 states and 83394 transitions. [2019-11-15 20:24:46,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2019-11-15 20:24:46,773 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:24:46,774 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:24:46,774 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:24:46,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:24:46,775 INFO L82 PathProgramCache]: Analyzing trace with hash 614314275, now seen corresponding path program 1 times [2019-11-15 20:24:46,775 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:24:46,775 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490323384] [2019-11-15 20:24:46,776 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:46,776 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:24:46,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:24:46,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:24:46,855 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-11-15 20:24:46,855 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490323384] [2019-11-15 20:24:46,855 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:24:46,856 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:24:46,856 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2040992247] [2019-11-15 20:24:46,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:24:46,857 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:24:46,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:24:46,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:46,858 INFO L87 Difference]: Start difference. First operand 69581 states and 83394 transitions. Second operand 3 states. [2019-11-15 20:24:51,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:24:51,661 INFO L93 Difference]: Finished difference Result 138159 states and 165318 transitions. [2019-11-15 20:24:51,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:24:51,662 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 201 [2019-11-15 20:24:51,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:24:51,741 INFO L225 Difference]: With dead ends: 138159 [2019-11-15 20:24:51,741 INFO L226 Difference]: Without dead ends: 68651 [2019-11-15 20:24:51,783 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:24:51,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68651 states. [2019-11-15 20:25:00,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68651 to 68651. [2019-11-15 20:25:00,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68651 states. [2019-11-15 20:25:00,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68651 states to 68651 states and 81362 transitions. [2019-11-15 20:25:00,509 INFO L78 Accepts]: Start accepts. Automaton has 68651 states and 81362 transitions. Word has length 201 [2019-11-15 20:25:00,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:25:00,510 INFO L462 AbstractCegarLoop]: Abstraction has 68651 states and 81362 transitions. [2019-11-15 20:25:00,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:25:00,510 INFO L276 IsEmpty]: Start isEmpty. Operand 68651 states and 81362 transitions. [2019-11-15 20:25:00,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2019-11-15 20:25:00,536 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:25:00,537 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:25:00,537 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:25:00,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:25:00,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1781198288, now seen corresponding path program 1 times [2019-11-15 20:25:00,538 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:25:00,538 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150961945] [2019-11-15 20:25:00,539 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:00,539 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:00,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:25:00,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:25:00,628 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:25:00,629 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150961945] [2019-11-15 20:25:00,629 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:25:00,630 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:25:00,630 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712658638] [2019-11-15 20:25:00,631 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:25:00,631 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:25:00,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:25:00,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:25:00,632 INFO L87 Difference]: Start difference. First operand 68651 states and 81362 transitions. Second operand 3 states. [2019-11-15 20:25:05,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:25:05,124 INFO L93 Difference]: Finished difference Result 121255 states and 144068 transitions. [2019-11-15 20:25:05,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:25:05,124 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 202 [2019-11-15 20:25:05,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:25:05,209 INFO L225 Difference]: With dead ends: 121255 [2019-11-15 20:25:05,210 INFO L226 Difference]: Without dead ends: 68655 [2019-11-15 20:25:05,244 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:25:05,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68655 states. [2019-11-15 20:25:09,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68655 to 68651. [2019-11-15 20:25:09,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68651 states. [2019-11-15 20:25:09,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68651 states to 68651 states and 81260 transitions. [2019-11-15 20:25:09,413 INFO L78 Accepts]: Start accepts. Automaton has 68651 states and 81260 transitions. Word has length 202 [2019-11-15 20:25:09,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:25:09,414 INFO L462 AbstractCegarLoop]: Abstraction has 68651 states and 81260 transitions. [2019-11-15 20:25:09,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:25:09,414 INFO L276 IsEmpty]: Start isEmpty. Operand 68651 states and 81260 transitions. [2019-11-15 20:25:09,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2019-11-15 20:25:09,458 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:25:09,459 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:25:09,459 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:25:09,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:25:09,460 INFO L82 PathProgramCache]: Analyzing trace with hash -1995337667, now seen corresponding path program 1 times [2019-11-15 20:25:09,460 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:25:09,461 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185872998] [2019-11-15 20:25:09,461 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:09,461 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:09,461 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:25:09,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:25:09,609 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2019-11-15 20:25:09,610 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185872998] [2019-11-15 20:25:09,610 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:25:09,611 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:25:09,611 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862325170] [2019-11-15 20:25:09,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:25:09,612 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:25:09,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:25:09,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:25:09,613 INFO L87 Difference]: Start difference. First operand 68651 states and 81260 transitions. Second operand 3 states. [2019-11-15 20:25:15,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:25:15,270 INFO L93 Difference]: Finished difference Result 152007 states and 179689 transitions. [2019-11-15 20:25:15,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:25:15,270 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 243 [2019-11-15 20:25:15,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:25:15,383 INFO L225 Difference]: With dead ends: 152007 [2019-11-15 20:25:15,383 INFO L226 Difference]: Without dead ends: 83406 [2019-11-15 20:25:15,451 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:25:15,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83406 states. [2019-11-15 20:25:21,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83406 to 83150. [2019-11-15 20:25:21,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83150 states. [2019-11-15 20:25:21,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83150 states to 83150 states and 97938 transitions. [2019-11-15 20:25:21,482 INFO L78 Accepts]: Start accepts. Automaton has 83150 states and 97938 transitions. Word has length 243 [2019-11-15 20:25:21,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:25:21,483 INFO L462 AbstractCegarLoop]: Abstraction has 83150 states and 97938 transitions. [2019-11-15 20:25:21,483 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:25:21,484 INFO L276 IsEmpty]: Start isEmpty. Operand 83150 states and 97938 transitions. [2019-11-15 20:25:21,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2019-11-15 20:25:21,523 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:25:21,523 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:25:21,523 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:25:21,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:25:21,524 INFO L82 PathProgramCache]: Analyzing trace with hash -92954994, now seen corresponding path program 1 times [2019-11-15 20:25:21,524 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:25:21,524 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221980673] [2019-11-15 20:25:21,524 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:21,524 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:21,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:25:21,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:25:21,617 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:25:21,617 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221980673] [2019-11-15 20:25:21,617 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:25:21,618 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:25:21,618 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [757361904] [2019-11-15 20:25:21,619 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:25:21,619 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:25:21,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:25:21,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:25:21,620 INFO L87 Difference]: Start difference. First operand 83150 states and 97938 transitions. Second operand 3 states. [2019-11-15 20:25:27,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:25:27,200 INFO L93 Difference]: Finished difference Result 151732 states and 179122 transitions. [2019-11-15 20:25:27,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:25:27,201 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 246 [2019-11-15 20:25:27,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:25:27,291 INFO L225 Difference]: With dead ends: 151732 [2019-11-15 20:25:27,291 INFO L226 Difference]: Without dead ends: 83154 [2019-11-15 20:25:27,326 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:25:27,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83154 states. [2019-11-15 20:25:32,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83154 to 83150. [2019-11-15 20:25:32,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83150 states. [2019-11-15 20:25:32,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83150 states to 83150 states and 97792 transitions. [2019-11-15 20:25:32,674 INFO L78 Accepts]: Start accepts. Automaton has 83150 states and 97792 transitions. Word has length 246 [2019-11-15 20:25:32,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:25:32,675 INFO L462 AbstractCegarLoop]: Abstraction has 83150 states and 97792 transitions. [2019-11-15 20:25:32,675 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:25:32,675 INFO L276 IsEmpty]: Start isEmpty. Operand 83150 states and 97792 transitions. [2019-11-15 20:25:32,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2019-11-15 20:25:32,710 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:25:32,711 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:25:32,711 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:25:32,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:25:32,711 INFO L82 PathProgramCache]: Analyzing trace with hash -331946524, now seen corresponding path program 1 times [2019-11-15 20:25:32,712 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:25:32,712 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953091774] [2019-11-15 20:25:32,712 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:32,712 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:32,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:25:32,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:25:32,814 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:25:32,815 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953091774] [2019-11-15 20:25:32,815 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:25:32,815 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:25:32,815 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [405110339] [2019-11-15 20:25:32,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:25:32,816 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:25:32,817 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:25:32,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:25:32,817 INFO L87 Difference]: Start difference. First operand 83150 states and 97792 transitions. Second operand 3 states. [2019-11-15 20:25:38,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:25:38,407 INFO L93 Difference]: Finished difference Result 151856 states and 178956 transitions. [2019-11-15 20:25:38,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:25:38,414 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 246 [2019-11-15 20:25:38,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:25:38,501 INFO L225 Difference]: With dead ends: 151856 [2019-11-15 20:25:38,502 INFO L226 Difference]: Without dead ends: 83278 [2019-11-15 20:25:38,539 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:25:38,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83278 states. [2019-11-15 20:25:47,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83278 to 83150. [2019-11-15 20:25:47,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83150 states. [2019-11-15 20:25:47,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83150 states to 83150 states and 96448 transitions. [2019-11-15 20:25:47,879 INFO L78 Accepts]: Start accepts. Automaton has 83150 states and 96448 transitions. Word has length 246 [2019-11-15 20:25:47,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:25:47,880 INFO L462 AbstractCegarLoop]: Abstraction has 83150 states and 96448 transitions. [2019-11-15 20:25:47,880 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:25:47,880 INFO L276 IsEmpty]: Start isEmpty. Operand 83150 states and 96448 transitions. [2019-11-15 20:25:47,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2019-11-15 20:25:47,919 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:25:47,919 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:25:47,919 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:25:47,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:25:47,920 INFO L82 PathProgramCache]: Analyzing trace with hash 1718247822, now seen corresponding path program 1 times [2019-11-15 20:25:47,920 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:25:47,920 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397186277] [2019-11-15 20:25:47,920 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:47,920 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:25:47,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:25:47,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:25:48,040 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-15 20:25:48,040 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397186277] [2019-11-15 20:25:48,041 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:25:48,041 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:25:48,041 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391671304] [2019-11-15 20:25:48,042 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:25:48,042 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:25:48,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:25:48,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:25:48,043 INFO L87 Difference]: Start difference. First operand 83150 states and 96448 transitions. Second operand 5 states. [2019-11-15 20:25:57,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:25:57,414 INFO L93 Difference]: Finished difference Result 213778 states and 249756 transitions. [2019-11-15 20:25:57,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:25:57,415 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 249 [2019-11-15 20:25:57,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:25:57,569 INFO L225 Difference]: With dead ends: 213778 [2019-11-15 20:25:57,569 INFO L226 Difference]: Without dead ends: 130682 [2019-11-15 20:25:57,609 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:25:57,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130682 states. [2019-11-15 20:26:03,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130682 to 83534. [2019-11-15 20:26:03,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83534 states. [2019-11-15 20:26:04,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83534 states to 83534 states and 95647 transitions. [2019-11-15 20:26:04,067 INFO L78 Accepts]: Start accepts. Automaton has 83534 states and 95647 transitions. Word has length 249 [2019-11-15 20:26:04,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:26:04,067 INFO L462 AbstractCegarLoop]: Abstraction has 83534 states and 95647 transitions. [2019-11-15 20:26:04,067 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:26:04,067 INFO L276 IsEmpty]: Start isEmpty. Operand 83534 states and 95647 transitions. [2019-11-15 20:26:04,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 290 [2019-11-15 20:26:04,109 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:26:04,110 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:26:04,110 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:26:04,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:26:04,110 INFO L82 PathProgramCache]: Analyzing trace with hash -582486225, now seen corresponding path program 1 times [2019-11-15 20:26:04,110 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:26:04,111 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1530091466] [2019-11-15 20:26:04,111 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:26:04,111 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:26:04,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:26:04,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:26:04,264 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2019-11-15 20:26:04,264 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1530091466] [2019-11-15 20:26:04,265 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:26:04,265 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:26:04,265 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767897427] [2019-11-15 20:26:04,266 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:26:04,266 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:26:04,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:26:04,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:26:04,267 INFO L87 Difference]: Start difference. First operand 83534 states and 95647 transitions. Second operand 3 states. [2019-11-15 20:26:11,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:26:11,942 INFO L93 Difference]: Finished difference Result 180296 states and 206239 transitions. [2019-11-15 20:26:11,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:26:11,943 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 289 [2019-11-15 20:26:11,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:26:12,067 INFO L225 Difference]: With dead ends: 180296 [2019-11-15 20:26:12,067 INFO L226 Difference]: Without dead ends: 96805 [2019-11-15 20:26:12,122 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:26:12,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96805 states. [2019-11-15 20:26:19,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96805 to 96485. [2019-11-15 20:26:19,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96485 states. [2019-11-15 20:26:19,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96485 states to 96485 states and 110061 transitions. [2019-11-15 20:26:19,369 INFO L78 Accepts]: Start accepts. Automaton has 96485 states and 110061 transitions. Word has length 289 [2019-11-15 20:26:19,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:26:19,370 INFO L462 AbstractCegarLoop]: Abstraction has 96485 states and 110061 transitions. [2019-11-15 20:26:19,370 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:26:19,370 INFO L276 IsEmpty]: Start isEmpty. Operand 96485 states and 110061 transitions. [2019-11-15 20:26:19,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 293 [2019-11-15 20:26:19,433 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:26:19,434 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:26:19,434 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:26:19,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:26:19,434 INFO L82 PathProgramCache]: Analyzing trace with hash -423262633, now seen corresponding path program 1 times [2019-11-15 20:26:19,435 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:26:19,435 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1232072189] [2019-11-15 20:26:19,435 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:26:19,435 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:26:19,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:26:19,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:26:19,549 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:26:19,549 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1232072189] [2019-11-15 20:26:19,549 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:26:19,550 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:26:19,550 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207307981] [2019-11-15 20:26:19,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:26:19,551 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:26:19,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:26:19,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:26:19,552 INFO L87 Difference]: Start difference. First operand 96485 states and 110061 transitions. Second operand 3 states. [2019-11-15 20:26:27,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:26:27,024 INFO L93 Difference]: Finished difference Result 179951 states and 205635 transitions. [2019-11-15 20:26:27,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:26:27,025 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 292 [2019-11-15 20:26:27,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:26:27,152 INFO L225 Difference]: With dead ends: 179951 [2019-11-15 20:26:27,152 INFO L226 Difference]: Without dead ends: 96489 [2019-11-15 20:26:27,195 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:26:27,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96489 states. [2019-11-15 20:26:34,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96489 to 96485. [2019-11-15 20:26:34,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96485 states. [2019-11-15 20:26:34,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96485 states to 96485 states and 109853 transitions. [2019-11-15 20:26:34,406 INFO L78 Accepts]: Start accepts. Automaton has 96485 states and 109853 transitions. Word has length 292 [2019-11-15 20:26:34,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:26:34,407 INFO L462 AbstractCegarLoop]: Abstraction has 96485 states and 109853 transitions. [2019-11-15 20:26:34,407 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:26:34,407 INFO L276 IsEmpty]: Start isEmpty. Operand 96485 states and 109853 transitions. [2019-11-15 20:26:34,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2019-11-15 20:26:34,470 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:26:34,471 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:26:34,471 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:26:34,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:26:34,472 INFO L82 PathProgramCache]: Analyzing trace with hash -1162176953, now seen corresponding path program 1 times [2019-11-15 20:26:34,473 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:26:34,473 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505275500] [2019-11-15 20:26:34,473 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:26:34,474 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:26:34,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:26:34,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:26:34,658 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-11-15 20:26:34,658 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505275500] [2019-11-15 20:26:34,658 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:26:34,659 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:26:34,659 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301941181] [2019-11-15 20:26:34,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:26:34,660 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:26:34,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:26:34,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:26:34,661 INFO L87 Difference]: Start difference. First operand 96485 states and 109853 transitions. Second operand 3 states. [2019-11-15 20:26:46,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:26:46,337 INFO L93 Difference]: Finished difference Result 204741 states and 232803 transitions. [2019-11-15 20:26:46,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:26:46,338 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 334 [2019-11-15 20:26:46,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:26:46,484 INFO L225 Difference]: With dead ends: 204741 [2019-11-15 20:26:46,484 INFO L226 Difference]: Without dead ends: 108292 [2019-11-15 20:26:46,550 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:26:46,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108292 states. [2019-11-15 20:26:54,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108292 to 107908. [2019-11-15 20:26:54,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107908 states. [2019-11-15 20:26:54,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107908 states to 107908 states and 122379 transitions. [2019-11-15 20:26:54,444 INFO L78 Accepts]: Start accepts. Automaton has 107908 states and 122379 transitions. Word has length 334 [2019-11-15 20:26:54,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:26:54,445 INFO L462 AbstractCegarLoop]: Abstraction has 107908 states and 122379 transitions. [2019-11-15 20:26:54,445 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:26:54,445 INFO L276 IsEmpty]: Start isEmpty. Operand 107908 states and 122379 transitions. [2019-11-15 20:26:54,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2019-11-15 20:26:54,519 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:26:54,520 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:26:54,520 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:26:54,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:26:54,520 INFO L82 PathProgramCache]: Analyzing trace with hash -978666524, now seen corresponding path program 1 times [2019-11-15 20:26:54,521 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:26:54,521 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1739405312] [2019-11-15 20:26:54,521 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:26:54,521 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:26:54,521 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:26:54,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:26:54,658 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:26:54,658 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1739405312] [2019-11-15 20:26:54,659 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:26:54,659 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:26:54,659 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1407078595] [2019-11-15 20:26:54,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:26:54,660 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:26:54,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:26:54,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:26:54,661 INFO L87 Difference]: Start difference. First operand 107908 states and 122379 transitions. Second operand 3 states. [2019-11-15 20:27:03,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:03,248 INFO L93 Difference]: Finished difference Result 204326 states and 232161 transitions. [2019-11-15 20:27:03,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:03,249 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 337 [2019-11-15 20:27:03,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:03,386 INFO L225 Difference]: With dead ends: 204326 [2019-11-15 20:27:03,387 INFO L226 Difference]: Without dead ends: 107912 [2019-11-15 20:27:03,436 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:03,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107912 states. [2019-11-15 20:27:10,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107912 to 107908. [2019-11-15 20:27:10,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107908 states. [2019-11-15 20:27:11,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107908 states to 107908 states and 122067 transitions. [2019-11-15 20:27:11,069 INFO L78 Accepts]: Start accepts. Automaton has 107908 states and 122067 transitions. Word has length 337 [2019-11-15 20:27:11,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:11,069 INFO L462 AbstractCegarLoop]: Abstraction has 107908 states and 122067 transitions. [2019-11-15 20:27:11,069 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:11,070 INFO L276 IsEmpty]: Start isEmpty. Operand 107908 states and 122067 transitions. [2019-11-15 20:27:11,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 380 [2019-11-15 20:27:11,121 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:11,121 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:11,121 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:11,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:11,122 INFO L82 PathProgramCache]: Analyzing trace with hash 660132916, now seen corresponding path program 1 times [2019-11-15 20:27:11,122 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:11,122 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [447178511] [2019-11-15 20:27:11,122 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:11,122 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:11,122 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:11,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:11,304 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-11-15 20:27:11,305 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [447178511] [2019-11-15 20:27:11,305 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:11,305 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-15 20:27:11,305 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [504808071] [2019-11-15 20:27:11,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:27:11,306 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:11,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:27:11,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:11,307 INFO L87 Difference]: Start difference. First operand 107908 states and 122067 transitions. Second operand 3 states. [2019-11-15 20:27:20,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:20,412 INFO L93 Difference]: Finished difference Result 226138 states and 255399 transitions. [2019-11-15 20:27:20,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:20,413 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 379 [2019-11-15 20:27:20,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:20,554 INFO L225 Difference]: With dead ends: 226138 [2019-11-15 20:27:20,554 INFO L226 Difference]: Without dead ends: 118259 [2019-11-15 20:27:20,614 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:20,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118259 states. [2019-11-15 20:27:29,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118259 to 117811. [2019-11-15 20:27:29,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117811 states. [2019-11-15 20:27:29,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117811 states to 117811 states and 132721 transitions. [2019-11-15 20:27:29,882 INFO L78 Accepts]: Start accepts. Automaton has 117811 states and 132721 transitions. Word has length 379 [2019-11-15 20:27:29,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:29,883 INFO L462 AbstractCegarLoop]: Abstraction has 117811 states and 132721 transitions. [2019-11-15 20:27:29,883 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:29,883 INFO L276 IsEmpty]: Start isEmpty. Operand 117811 states and 132721 transitions. [2019-11-15 20:27:29,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 383 [2019-11-15 20:27:29,951 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:29,951 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:29,951 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:29,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:29,952 INFO L82 PathProgramCache]: Analyzing trace with hash 176006994, now seen corresponding path program 1 times [2019-11-15 20:27:29,952 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:29,952 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056142747] [2019-11-15 20:27:29,953 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:29,953 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:29,953 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:29,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:30,142 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-11-15 20:27:30,142 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056142747] [2019-11-15 20:27:30,143 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:30,143 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:27:30,143 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1741330045] [2019-11-15 20:27:30,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:27:30,144 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:30,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:27:30,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:30,145 INFO L87 Difference]: Start difference. First operand 117811 states and 132721 transitions. Second operand 3 states. [2019-11-15 20:27:32,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:32,984 INFO L93 Difference]: Finished difference Result 141218 states and 158629 transitions. [2019-11-15 20:27:32,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:32,984 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 382 [2019-11-15 20:27:32,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:33,008 INFO L225 Difference]: With dead ends: 141218 [2019-11-15 20:27:33,009 INFO L226 Difference]: Without dead ends: 20186 [2019-11-15 20:27:33,071 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:33,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-11-15 20:27:34,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-11-15 20:27:34,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-11-15 20:27:34,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21827 transitions. [2019-11-15 20:27:34,481 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21827 transitions. Word has length 382 [2019-11-15 20:27:34,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:34,481 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21827 transitions. [2019-11-15 20:27:34,481 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:34,481 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21827 transitions. [2019-11-15 20:27:34,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 384 [2019-11-15 20:27:34,504 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:34,504 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:34,505 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:34,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:34,505 INFO L82 PathProgramCache]: Analyzing trace with hash 1861356732, now seen corresponding path program 1 times [2019-11-15 20:27:34,505 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:34,505 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304709348] [2019-11-15 20:27:34,506 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:34,506 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:34,506 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:34,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:34,701 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:27:34,702 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304709348] [2019-11-15 20:27:34,702 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:34,703 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:27:34,703 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [491621576] [2019-11-15 20:27:34,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:27:34,704 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:34,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:27:34,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:34,705 INFO L87 Difference]: Start difference. First operand 20186 states and 21827 transitions. Second operand 3 states. [2019-11-15 20:27:36,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:36,580 INFO L93 Difference]: Finished difference Result 33147 states and 35901 transitions. [2019-11-15 20:27:36,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:36,581 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 383 [2019-11-15 20:27:36,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:36,605 INFO L225 Difference]: With dead ends: 33147 [2019-11-15 20:27:36,605 INFO L226 Difference]: Without dead ends: 20186 [2019-11-15 20:27:36,619 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:36,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-11-15 20:27:38,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-11-15 20:27:38,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-11-15 20:27:38,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21675 transitions. [2019-11-15 20:27:38,100 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21675 transitions. Word has length 383 [2019-11-15 20:27:38,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:38,100 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21675 transitions. [2019-11-15 20:27:38,101 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:38,101 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21675 transitions. [2019-11-15 20:27:38,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 389 [2019-11-15 20:27:38,118 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:38,119 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:38,119 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:38,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:38,119 INFO L82 PathProgramCache]: Analyzing trace with hash 914909407, now seen corresponding path program 1 times [2019-11-15 20:27:38,119 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:38,120 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922871931] [2019-11-15 20:27:38,120 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:38,120 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:38,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:38,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:38,306 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:27:38,307 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922871931] [2019-11-15 20:27:38,307 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:38,308 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:27:38,308 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [283358428] [2019-11-15 20:27:38,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:27:38,309 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:38,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:27:38,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:38,310 INFO L87 Difference]: Start difference. First operand 20186 states and 21675 transitions. Second operand 3 states. [2019-11-15 20:27:39,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:39,773 INFO L93 Difference]: Finished difference Result 31679 states and 34063 transitions. [2019-11-15 20:27:39,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:39,774 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 388 [2019-11-15 20:27:39,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:39,793 INFO L225 Difference]: With dead ends: 31679 [2019-11-15 20:27:39,793 INFO L226 Difference]: Without dead ends: 20186 [2019-11-15 20:27:39,802 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:39,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-11-15 20:27:41,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-11-15 20:27:41,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-11-15 20:27:41,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21535 transitions. [2019-11-15 20:27:41,535 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21535 transitions. Word has length 388 [2019-11-15 20:27:41,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:41,536 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21535 transitions. [2019-11-15 20:27:41,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:41,536 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21535 transitions. [2019-11-15 20:27:41,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 394 [2019-11-15 20:27:41,553 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:41,554 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:41,554 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:41,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:41,555 INFO L82 PathProgramCache]: Analyzing trace with hash -946028452, now seen corresponding path program 1 times [2019-11-15 20:27:41,555 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:41,555 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774405410] [2019-11-15 20:27:41,555 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:41,555 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:41,555 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:41,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:41,728 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:27:41,729 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774405410] [2019-11-15 20:27:41,729 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:41,729 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:27:41,729 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677956942] [2019-11-15 20:27:41,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:27:41,730 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:41,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:27:41,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:41,731 INFO L87 Difference]: Start difference. First operand 20186 states and 21535 transitions. Second operand 3 states. [2019-11-15 20:27:43,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:43,198 INFO L93 Difference]: Finished difference Result 30560 states and 32647 transitions. [2019-11-15 20:27:43,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:43,199 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 393 [2019-11-15 20:27:43,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:43,219 INFO L225 Difference]: With dead ends: 30560 [2019-11-15 20:27:43,219 INFO L226 Difference]: Without dead ends: 20186 [2019-11-15 20:27:43,230 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:43,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-11-15 20:27:44,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-11-15 20:27:44,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-11-15 20:27:44,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21404 transitions. [2019-11-15 20:27:44,663 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21404 transitions. Word has length 393 [2019-11-15 20:27:44,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:44,663 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21404 transitions. [2019-11-15 20:27:44,664 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:44,664 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21404 transitions. [2019-11-15 20:27:44,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 399 [2019-11-15 20:27:44,680 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:44,680 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:44,680 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:44,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:44,681 INFO L82 PathProgramCache]: Analyzing trace with hash -1833719307, now seen corresponding path program 1 times [2019-11-15 20:27:44,681 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:44,681 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336433033] [2019-11-15 20:27:44,681 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:44,681 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:44,681 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:44,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:44,850 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-15 20:27:44,851 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336433033] [2019-11-15 20:27:44,851 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:44,851 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:27:44,851 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592553125] [2019-11-15 20:27:44,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:27:44,852 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:44,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:27:44,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:44,853 INFO L87 Difference]: Start difference. First operand 20186 states and 21404 transitions. Second operand 3 states. [2019-11-15 20:27:46,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:46,684 INFO L93 Difference]: Finished difference Result 30625 states and 32533 transitions. [2019-11-15 20:27:46,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:46,685 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 398 [2019-11-15 20:27:46,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:46,703 INFO L225 Difference]: With dead ends: 30625 [2019-11-15 20:27:46,703 INFO L226 Difference]: Without dead ends: 20264 [2019-11-15 20:27:46,711 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:46,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20264 states. [2019-11-15 20:27:48,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20264 to 20186. [2019-11-15 20:27:48,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-11-15 20:27:48,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21272 transitions. [2019-11-15 20:27:48,148 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21272 transitions. Word has length 398 [2019-11-15 20:27:48,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:48,148 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21272 transitions. [2019-11-15 20:27:48,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:48,148 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21272 transitions. [2019-11-15 20:27:48,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 403 [2019-11-15 20:27:48,165 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:48,165 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:48,165 INFO L410 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:48,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:48,166 INFO L82 PathProgramCache]: Analyzing trace with hash 1021388863, now seen corresponding path program 1 times [2019-11-15 20:27:48,166 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:48,166 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757523843] [2019-11-15 20:27:48,166 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:48,166 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:48,167 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:48,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:48,349 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:27:48,349 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757523843] [2019-11-15 20:27:48,349 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:48,350 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:27:48,350 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135806519] [2019-11-15 20:27:48,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:27:48,351 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:48,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:27:48,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:48,352 INFO L87 Difference]: Start difference. First operand 20186 states and 21272 transitions. Second operand 3 states. [2019-11-15 20:27:49,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:49,925 INFO L93 Difference]: Finished difference Result 35999 states and 37931 transitions. [2019-11-15 20:27:49,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:49,925 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 402 [2019-11-15 20:27:49,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:49,945 INFO L225 Difference]: With dead ends: 35999 [2019-11-15 20:27:49,945 INFO L226 Difference]: Without dead ends: 20186 [2019-11-15 20:27:49,959 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:49,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-11-15 20:27:51,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-11-15 20:27:51,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-11-15 20:27:51,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21096 transitions. [2019-11-15 20:27:51,608 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21096 transitions. Word has length 402 [2019-11-15 20:27:51,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:51,608 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21096 transitions. [2019-11-15 20:27:51,608 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:51,608 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21096 transitions. [2019-11-15 20:27:51,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 408 [2019-11-15 20:27:51,625 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:51,625 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:51,625 INFO L410 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:51,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:51,626 INFO L82 PathProgramCache]: Analyzing trace with hash -846459542, now seen corresponding path program 1 times [2019-11-15 20:27:51,626 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:51,626 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594762734] [2019-11-15 20:27:51,626 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:51,626 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:51,626 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:51,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:52,251 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-15 20:27:52,252 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594762734] [2019-11-15 20:27:52,252 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:52,252 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:27:52,252 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781258054] [2019-11-15 20:27:52,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:27:52,253 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:52,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:27:52,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:27:52,253 INFO L87 Difference]: Start difference. First operand 20186 states and 21096 transitions. Second operand 8 states. [2019-11-15 20:27:54,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:54,224 INFO L93 Difference]: Finished difference Result 20186 states and 21096 transitions. [2019-11-15 20:27:54,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:27:54,225 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 407 [2019-11-15 20:27:54,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:54,246 INFO L225 Difference]: With dead ends: 20186 [2019-11-15 20:27:54,246 INFO L226 Difference]: Without dead ends: 20184 [2019-11-15 20:27:54,252 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:27:54,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20184 states. [2019-11-15 20:27:55,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20184 to 20184. [2019-11-15 20:27:55,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20184 states. [2019-11-15 20:27:55,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20184 states to 20184 states and 21093 transitions. [2019-11-15 20:27:55,868 INFO L78 Accepts]: Start accepts. Automaton has 20184 states and 21093 transitions. Word has length 407 [2019-11-15 20:27:55,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:55,869 INFO L462 AbstractCegarLoop]: Abstraction has 20184 states and 21093 transitions. [2019-11-15 20:27:55,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:27:55,869 INFO L276 IsEmpty]: Start isEmpty. Operand 20184 states and 21093 transitions. [2019-11-15 20:27:55,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 412 [2019-11-15 20:27:55,887 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:55,888 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:55,888 INFO L410 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:55,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:55,889 INFO L82 PathProgramCache]: Analyzing trace with hash -256593416, now seen corresponding path program 1 times [2019-11-15 20:27:55,889 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:55,890 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [756099936] [2019-11-15 20:27:55,890 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:55,890 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:55,890 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:55,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:27:56,079 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2019-11-15 20:27:56,079 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [756099936] [2019-11-15 20:27:56,080 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:27:56,080 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:27:56,080 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631736329] [2019-11-15 20:27:56,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:27:56,081 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:27:56,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:27:56,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:56,082 INFO L87 Difference]: Start difference. First operand 20184 states and 21093 transitions. Second operand 3 states. [2019-11-15 20:27:57,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:27:57,845 INFO L93 Difference]: Finished difference Result 24560 states and 25612 transitions. [2019-11-15 20:27:57,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:27:57,845 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 411 [2019-11-15 20:27:57,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:27:57,866 INFO L225 Difference]: With dead ends: 24560 [2019-11-15 20:27:57,866 INFO L226 Difference]: Without dead ends: 22364 [2019-11-15 20:27:57,872 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:27:57,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22364 states. [2019-11-15 20:27:59,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22364 to 20186. [2019-11-15 20:27:59,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-11-15 20:27:59,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21095 transitions. [2019-11-15 20:27:59,450 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21095 transitions. Word has length 411 [2019-11-15 20:27:59,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:27:59,451 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21095 transitions. [2019-11-15 20:27:59,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:27:59,452 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21095 transitions. [2019-11-15 20:27:59,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 413 [2019-11-15 20:27:59,470 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:27:59,470 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:27:59,471 INFO L410 AbstractCegarLoop]: === Iteration 50 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:27:59,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:27:59,471 INFO L82 PathProgramCache]: Analyzing trace with hash 398102070, now seen corresponding path program 1 times [2019-11-15 20:27:59,471 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:27:59,471 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786571552] [2019-11-15 20:27:59,471 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:59,471 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:27:59,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:27:59,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:27:59,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:27:59,930 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:27:59,930 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:28:00,391 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:28:00 BoogieIcfgContainer [2019-11-15 20:28:00,391 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:28:00,392 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:28:00,392 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:28:00,392 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:28:00,393 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:23:57" (3/4) ... [2019-11-15 20:28:00,396 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:28:00,905 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_97ae67d1-8fb4-4393-a723-c095d6cd0894/bin/uautomizer/witness.graphml [2019-11-15 20:28:00,906 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:28:00,909 INFO L168 Benchmark]: Toolchain (without parser) took 246518.35 ms. Allocated memory was 1.0 GB in the beginning and 6.0 GB in the end (delta: 5.0 GB). Free memory was 950.2 MB in the beginning and 1.9 GB in the end (delta: -931.9 MB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. [2019-11-15 20:28:00,909 INFO L168 Benchmark]: CDTParser took 0.33 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:28:00,910 INFO L168 Benchmark]: CACSL2BoogieTranslator took 715.59 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.7 MB). Free memory was 950.2 MB in the beginning and 1.1 GB in the end (delta: -166.2 MB). Peak memory consumption was 24.6 MB. Max. memory is 11.5 GB. [2019-11-15 20:28:00,911 INFO L168 Benchmark]: Boogie Procedure Inliner took 114.96 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. [2019-11-15 20:28:00,911 INFO L168 Benchmark]: Boogie Preprocessor took 132.46 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:28:00,912 INFO L168 Benchmark]: RCFGBuilder took 2249.94 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 986.5 MB in the end (delta: 122.8 MB). Peak memory consumption was 122.8 MB. Max. memory is 11.5 GB. [2019-11-15 20:28:00,913 INFO L168 Benchmark]: TraceAbstraction took 242782.64 ms. Allocated memory was 1.2 GB in the beginning and 6.0 GB in the end (delta: 4.8 GB). Free memory was 986.5 MB in the beginning and 2.0 GB in the end (delta: -998.7 MB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-11-15 20:28:00,913 INFO L168 Benchmark]: Witness Printer took 514.13 ms. Allocated memory is still 6.0 GB. Free memory was 2.0 GB in the beginning and 1.9 GB in the end (delta: 103.2 MB). Peak memory consumption was 103.2 MB. Max. memory is 11.5 GB. [2019-11-15 20:28:00,916 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 715.59 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.7 MB). Free memory was 950.2 MB in the beginning and 1.1 GB in the end (delta: -166.2 MB). Peak memory consumption was 24.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 114.96 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 132.46 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 2249.94 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 986.5 MB in the end (delta: 122.8 MB). Peak memory consumption was 122.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 242782.64 ms. Allocated memory was 1.2 GB in the beginning and 6.0 GB in the end (delta: 4.8 GB). Free memory was 986.5 MB in the beginning and 2.0 GB in the end (delta: -998.7 MB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 514.13 ms. Allocated memory is still 6.0 GB. Free memory was 2.0 GB in the beginning and 1.9 GB in the end (delta: 103.2 MB). Peak memory consumption was 103.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int t4_pc = 0; [L19] int t5_pc = 0; [L20] int m_st ; [L21] int t1_st ; [L22] int t2_st ; [L23] int t3_st ; [L24] int t4_st ; [L25] int t5_st ; [L26] int m_i ; [L27] int t1_i ; [L28] int t2_i ; [L29] int t3_i ; [L30] int t4_i ; [L31] int t5_i ; [L32] int M_E = 2; [L33] int T1_E = 2; [L34] int T2_E = 2; [L35] int T3_E = 2; [L36] int T4_E = 2; [L37] int T5_E = 2; [L38] int E_M = 2; [L39] int E_1 = 2; [L40] int E_2 = 2; [L41] int E_3 = 2; [L42] int E_4 = 2; [L43] int E_5 = 2; [L51] int token ; [L53] int local ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0, T5_E=2, t5_i=0, t5_pc=0, t5_st=0, token=0] [L975] int __retres1 ; [L886] m_i = 1 [L887] t1_i = 1 [L888] t2_i = 1 [L889] t3_i = 1 [L890] t4_i = 1 [L891] t5_i = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L916] int kernel_st ; [L917] int tmp ; [L918] int tmp___0 ; [L922] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L416] COND TRUE m_i == 1 [L417] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L421] COND TRUE t1_i == 1 [L422] t1_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L426] COND TRUE t2_i == 1 [L427] t2_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L431] COND TRUE t3_i == 1 [L432] t3_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L436] COND TRUE t4_i == 1 [L437] t4_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L441] COND TRUE t5_i == 1 [L442] t5_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L601] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L606] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L611] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L616] COND FALSE !(T3_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L621] COND FALSE !(T4_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L626] COND FALSE !(T5_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L631] COND FALSE !(E_M == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L636] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L641] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L646] COND FALSE !(E_3 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L651] COND FALSE !(E_4 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L656] COND FALSE !(E_5 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L294] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L304] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L313] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L332] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L351] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L361] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L370] COND FALSE !(t4_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L380] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L389] COND FALSE !(t5_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L399] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L669] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L674] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L679] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L684] COND FALSE !(T3_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L689] COND FALSE !(T4_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L694] COND FALSE !(T5_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L699] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L704] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L709] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L714] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L719] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L724] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L930] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L933] kernel_st = 1 [L492] int tmp ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L496] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L451] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L454] COND TRUE m_st == 0 [L455] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L487] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L499] tmp = exists_runnable_thread() [L501] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L506] COND TRUE m_st == 0 [L507] int tmp_ndt_1; [L508] tmp_ndt_1 = __VERIFIER_nondet_int() [L509] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L520] COND TRUE t1_st == 0 [L521] int tmp_ndt_2; [L522] tmp_ndt_2 = __VERIFIER_nondet_int() [L523] COND TRUE \read(tmp_ndt_2) [L525] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L114] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L125] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L127] t1_pc = 1 [L128] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L534] COND TRUE t2_st == 0 [L535] int tmp_ndt_3; [L536] tmp_ndt_3 = __VERIFIER_nondet_int() [L537] COND TRUE \read(tmp_ndt_3) [L539] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L150] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L161] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L163] t2_pc = 1 [L164] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L548] COND TRUE t3_st == 0 [L549] int tmp_ndt_4; [L550] tmp_ndt_4 = __VERIFIER_nondet_int() [L551] COND TRUE \read(tmp_ndt_4) [L553] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L186] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L197] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L199] t3_pc = 1 [L200] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L562] COND TRUE t4_st == 0 [L563] int tmp_ndt_5; [L564] tmp_ndt_5 = __VERIFIER_nondet_int() [L565] COND TRUE \read(tmp_ndt_5) [L567] t4_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L222] COND TRUE t4_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L233] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L235] t4_pc = 1 [L236] t4_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L576] COND TRUE t5_st == 0 [L577] int tmp_ndt_6; [L578] tmp_ndt_6 = __VERIFIER_nondet_int() [L579] COND TRUE \read(tmp_ndt_6) [L581] t5_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1, token=0] [L258] COND TRUE t5_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1, token=0] [L269] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1, token=0] [L271] t5_pc = 1 [L272] t5_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L496] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L451] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L454] COND TRUE m_st == 0 [L455] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L487] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L499] tmp = exists_runnable_thread() [L501] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L506] COND TRUE m_st == 0 [L507] int tmp_ndt_1; [L508] tmp_ndt_1 = __VERIFIER_nondet_int() [L509] COND TRUE \read(tmp_ndt_1) [L511] m_st = 1 [L56] int tmp_var = __VERIFIER_nondet_int(); [L58] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L69] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L72] token = __VERIFIER_nondet_int() [L73] local = token [L74] E_1 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L294] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L304] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L306] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L310] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L313] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L314] COND TRUE E_1 == 1 [L315] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L325] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L751] tmp___0 = is_transmit1_triggered() [L753] COND TRUE \read(tmp___0) [L754] t1_st = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L329] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L332] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L333] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L342] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L344] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L348] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L351] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L352] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L361] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L363] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L367] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L370] COND TRUE t4_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L371] COND FALSE !(E_4 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L380] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L382] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L386] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L389] COND TRUE t5_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L390] COND FALSE !(E_5 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L399] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L401] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L76] E_1 = 2 [L77] m_pc = 1 [L78] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L520] COND TRUE t1_st == 0 [L521] int tmp_ndt_2; [L522] tmp_ndt_2 = __VERIFIER_nondet_int() [L523] COND TRUE \read(tmp_ndt_2) [L525] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L114] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L117] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L133] token += 1 [L134] E_2 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L295] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L304] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L306] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L310] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L323] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L325] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L329] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L333] COND TRUE E_2 == 1 [L334] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L344] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L759] tmp___1 = is_transmit2_triggered() [L761] COND TRUE \read(tmp___1) [L762] t2_st = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L348] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L352] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L361] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L363] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L367] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L371] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L380] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L382] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L386] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L390] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L399] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L401] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L136] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L125] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L127] t1_pc = 1 [L128] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L534] COND TRUE t2_st == 0 [L535] int tmp_ndt_3; [L536] tmp_ndt_3 = __VERIFIER_nondet_int() [L537] COND TRUE \read(tmp_ndt_3) [L539] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L150] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L153] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L169] token += 1 [L170] E_3 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L295] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L304] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L333] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L352] COND TRUE E_3 == 1 [L353] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L767] tmp___2 = is_transmit3_triggered() [L769] COND TRUE \read(tmp___2) [L770] t3_st = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L371] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L380] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L390] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L399] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L172] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L161] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L163] t2_pc = 1 [L164] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L548] COND TRUE t3_st == 0 [L549] int tmp_ndt_4; [L550] tmp_ndt_4 = __VERIFIER_nondet_int() [L551] COND TRUE \read(tmp_ndt_4) [L553] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L186] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L189] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L205] token += 1 [L206] E_4 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L295] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L304] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L333] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L352] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L361] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L371] COND TRUE E_4 == 1 [L372] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L775] tmp___3 = is_transmit4_triggered() [L777] COND TRUE \read(tmp___3) [L778] t4_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L390] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L399] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L208] E_4 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L197] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L199] t3_pc = 1 [L200] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L562] COND TRUE t4_st == 0 [L563] int tmp_ndt_5; [L564] tmp_ndt_5 = __VERIFIER_nondet_int() [L565] COND TRUE \read(tmp_ndt_5) [L567] t4_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L222] COND FALSE !(t4_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L225] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L241] token += 1 [L242] E_5 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L295] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L304] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L333] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L352] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L361] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L371] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L380] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L390] COND TRUE E_5 == 1 [L391] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L783] tmp___4 = is_transmit5_triggered() [L785] COND TRUE \read(tmp___4) [L786] t5_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0, token=-1] [L244] E_5 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0, token=-1] [L233] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0, token=-1] [L235] t4_pc = 1 [L236] t4_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=0, token=-1] [L576] COND TRUE t5_st == 0 [L577] int tmp_ndt_6; [L578] tmp_ndt_6 = __VERIFIER_nondet_int() [L579] COND TRUE \read(tmp_ndt_6) [L581] t5_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=-1] [L258] COND FALSE !(t5_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=-1] [L261] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=-1] [L277] token += 1 [L278] E_M = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L295] COND TRUE E_M == 1 [L296] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L743] tmp = is_master_triggered() [L745] COND TRUE \read(tmp) [L746] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L333] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L352] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L361] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L371] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L380] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L390] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L399] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L280] E_M = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L269] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L271] t5_pc = 1 [L272] t5_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L496] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L451] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L454] COND TRUE m_st == 0 [L455] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L487] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L499] tmp = exists_runnable_thread() [L501] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L506] COND TRUE m_st == 0 [L507] int tmp_ndt_1; [L508] tmp_ndt_1 = __VERIFIER_nondet_int() [L509] COND TRUE \read(tmp_ndt_1) [L511] m_st = 1 [L56] int tmp_var = __VERIFIER_nondet_int(); [L58] COND FALSE !(m_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L61] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L83] COND FALSE !(token != local + 5) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L88] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L89] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L94] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L95] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L96] COND TRUE tmp_var == 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L10] __VERIFIER_error() VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 540 locations, 2 error locations. Result: UNSAFE, OverallTime: 242.6s, OverallIterations: 50, TraceHistogramMax: 3, AutomataDifference: 121.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 39010 SDtfs, 34584 SDslu, 28927 SDs, 0 SdLazy, 1041 SolverSat, 476 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 171 GetRequests, 92 SyntacticMatches, 1 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=117811occurred in iteration=41, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 113.3s AutomataMinimizationTime, 49 MinimizatonAttempts, 56508 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 9987 NumberOfCodeBlocks, 9987 NumberOfCodeBlocksAsserted, 50 NumberOfCheckSat, 9526 ConstructedInterpolants, 0 QuantifiedInterpolants, 4457844 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 49 InterpolantComputations, 49 PerfectInterpolantSequences, 984/984 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...