./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/systemc/transmitter.02.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 30f4e4ab Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/systemc/transmitter.02.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0c244c639ec9718adcbacffa967b748c52a23cd0 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-30f4e4a [2019-11-28 00:28:34,237 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 00:28:34,240 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 00:28:34,252 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 00:28:34,252 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 00:28:34,254 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 00:28:34,255 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 00:28:34,257 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 00:28:34,259 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 00:28:34,260 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 00:28:34,261 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 00:28:34,262 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 00:28:34,263 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 00:28:34,264 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 00:28:34,266 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 00:28:34,267 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 00:28:34,269 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 00:28:34,271 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 00:28:34,273 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 00:28:34,275 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 00:28:34,276 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 00:28:34,278 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 00:28:34,279 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 00:28:34,280 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 00:28:34,282 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 00:28:34,283 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 00:28:34,283 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 00:28:34,284 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 00:28:34,285 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 00:28:34,286 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 00:28:34,286 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 00:28:34,287 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 00:28:34,288 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 00:28:34,289 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 00:28:34,290 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 00:28:34,290 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 00:28:34,291 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 00:28:34,291 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 00:28:34,291 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 00:28:34,292 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 00:28:34,293 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 00:28:34,294 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 00:28:34,310 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 00:28:34,310 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 00:28:34,311 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 00:28:34,312 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 00:28:34,312 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 00:28:34,312 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 00:28:34,313 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 00:28:34,313 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 00:28:34,313 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 00:28:34,313 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 00:28:34,314 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 00:28:34,314 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 00:28:34,314 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 00:28:34,315 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 00:28:34,315 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 00:28:34,315 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 00:28:34,315 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 00:28:34,316 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 00:28:34,316 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 00:28:34,316 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 00:28:34,317 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 00:28:34,317 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 00:28:34,317 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 00:28:34,318 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 00:28:34,318 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 00:28:34,318 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 00:28:34,318 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 00:28:34,319 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 00:28:34,319 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0c244c639ec9718adcbacffa967b748c52a23cd0 [2019-11-28 00:28:34,610 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 00:28:34,623 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 00:28:34,626 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 00:28:34,628 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 00:28:34,628 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 00:28:34,629 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/transmitter.02.cil.c [2019-11-28 00:28:34,701 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b69fcd8f8/966fea554ff04ef7962071c3e8f97414/FLAG0e447b3eb [2019-11-28 00:28:35,172 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 00:28:35,173 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/transmitter.02.cil.c [2019-11-28 00:28:35,182 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b69fcd8f8/966fea554ff04ef7962071c3e8f97414/FLAG0e447b3eb [2019-11-28 00:28:35,509 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b69fcd8f8/966fea554ff04ef7962071c3e8f97414 [2019-11-28 00:28:35,512 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 00:28:35,514 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 00:28:35,515 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 00:28:35,515 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 00:28:35,519 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 00:28:35,519 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:35,522 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@600cef8d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35, skipping insertion in model container [2019-11-28 00:28:35,523 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:35,530 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 00:28:35,577 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 00:28:35,790 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 00:28:35,798 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 00:28:35,900 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 00:28:35,921 INFO L208 MainTranslator]: Completed translation [2019-11-28 00:28:35,921 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35 WrapperNode [2019-11-28 00:28:35,922 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 00:28:35,922 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 00:28:35,922 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 00:28:35,922 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 00:28:35,929 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:35,936 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:35,974 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 00:28:35,975 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 00:28:35,975 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 00:28:35,975 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 00:28:35,986 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:35,986 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:35,989 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:35,989 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:36,003 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:36,030 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:36,037 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... [2019-11-28 00:28:36,047 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 00:28:36,047 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 00:28:36,048 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 00:28:36,050 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 00:28:36,051 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 00:28:36,123 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 00:28:36,124 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 00:28:36,830 INFO L292 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 00:28:36,831 INFO L297 CfgBuilder]: Removed 94 assume(true) statements. [2019-11-28 00:28:36,832 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:28:36 BoogieIcfgContainer [2019-11-28 00:28:36,832 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 00:28:36,833 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 00:28:36,834 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 00:28:36,837 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 00:28:36,837 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 12:28:35" (1/3) ... [2019-11-28 00:28:36,838 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c6f65c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:28:36, skipping insertion in model container [2019-11-28 00:28:36,838 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:35" (2/3) ... [2019-11-28 00:28:36,838 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c6f65c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:28:36, skipping insertion in model container [2019-11-28 00:28:36,839 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:28:36" (3/3) ... [2019-11-28 00:28:36,840 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.02.cil.c [2019-11-28 00:28:36,851 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 00:28:36,858 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-11-28 00:28:36,871 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-11-28 00:28:36,900 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 00:28:36,901 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 00:28:36,901 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 00:28:36,901 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 00:28:36,902 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 00:28:36,902 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 00:28:36,902 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 00:28:36,902 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 00:28:36,925 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states. [2019-11-28 00:28:36,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 00:28:36,934 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:36,935 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:36,936 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:36,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:36,942 INFO L82 PathProgramCache]: Analyzing trace with hash 550865253, now seen corresponding path program 1 times [2019-11-28 00:28:36,951 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:36,952 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827997453] [2019-11-28 00:28:36,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:37,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:37,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:37,102 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827997453] [2019-11-28 00:28:37,103 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:37,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:37,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777993744] [2019-11-28 00:28:37,111 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:37,111 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:37,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:37,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,129 INFO L87 Difference]: Start difference. First operand 192 states. Second operand 3 states. [2019-11-28 00:28:37,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:37,223 INFO L93 Difference]: Finished difference Result 379 states and 595 transitions. [2019-11-28 00:28:37,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:37,226 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 00:28:37,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:37,252 INFO L225 Difference]: With dead ends: 379 [2019-11-28 00:28:37,253 INFO L226 Difference]: Without dead ends: 188 [2019-11-28 00:28:37,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2019-11-28 00:28:37,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 188. [2019-11-28 00:28:37,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2019-11-28 00:28:37,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 283 transitions. [2019-11-28 00:28:37,326 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 283 transitions. Word has length 49 [2019-11-28 00:28:37,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:37,327 INFO L462 AbstractCegarLoop]: Abstraction has 188 states and 283 transitions. [2019-11-28 00:28:37,327 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:37,327 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 283 transitions. [2019-11-28 00:28:37,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 00:28:37,329 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:37,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:37,330 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:37,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:37,331 INFO L82 PathProgramCache]: Analyzing trace with hash -342621085, now seen corresponding path program 1 times [2019-11-28 00:28:37,331 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:37,332 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539101512] [2019-11-28 00:28:37,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:37,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:37,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:37,408 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539101512] [2019-11-28 00:28:37,408 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:37,408 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 00:28:37,409 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [894279349] [2019-11-28 00:28:37,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:37,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:37,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:37,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,414 INFO L87 Difference]: Start difference. First operand 188 states and 283 transitions. Second operand 3 states. [2019-11-28 00:28:37,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:37,531 INFO L93 Difference]: Finished difference Result 498 states and 749 transitions. [2019-11-28 00:28:37,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:37,531 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 00:28:37,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:37,534 INFO L225 Difference]: With dead ends: 498 [2019-11-28 00:28:37,535 INFO L226 Difference]: Without dead ends: 317 [2019-11-28 00:28:37,537 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2019-11-28 00:28:37,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 315. [2019-11-28 00:28:37,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 00:28:37,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 467 transitions. [2019-11-28 00:28:37,569 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 467 transitions. Word has length 49 [2019-11-28 00:28:37,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:37,570 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 467 transitions. [2019-11-28 00:28:37,571 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:37,571 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 467 transitions. [2019-11-28 00:28:37,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 00:28:37,574 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:37,574 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:37,574 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:37,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:37,575 INFO L82 PathProgramCache]: Analyzing trace with hash -2057662813, now seen corresponding path program 1 times [2019-11-28 00:28:37,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:37,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877994373] [2019-11-28 00:28:37,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:37,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:37,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:37,645 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [877994373] [2019-11-28 00:28:37,646 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:37,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 00:28:37,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795949592] [2019-11-28 00:28:37,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:37,648 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:37,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:37,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,650 INFO L87 Difference]: Start difference. First operand 315 states and 467 transitions. Second operand 3 states. [2019-11-28 00:28:37,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:37,684 INFO L93 Difference]: Finished difference Result 622 states and 923 transitions. [2019-11-28 00:28:37,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:37,685 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 00:28:37,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:37,687 INFO L225 Difference]: With dead ends: 622 [2019-11-28 00:28:37,687 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 00:28:37,689 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 00:28:37,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-11-28 00:28:37,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 00:28:37,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 459 transitions. [2019-11-28 00:28:37,714 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 459 transitions. Word has length 49 [2019-11-28 00:28:37,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:37,714 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 459 transitions. [2019-11-28 00:28:37,714 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:37,714 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 459 transitions. [2019-11-28 00:28:37,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 00:28:37,716 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:37,716 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:37,716 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:37,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:37,717 INFO L82 PathProgramCache]: Analyzing trace with hash 796507235, now seen corresponding path program 1 times [2019-11-28 00:28:37,717 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:37,718 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1736719211] [2019-11-28 00:28:37,718 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:37,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:37,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:37,761 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1736719211] [2019-11-28 00:28:37,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:37,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 00:28:37,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2099396859] [2019-11-28 00:28:37,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:37,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:37,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:37,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,764 INFO L87 Difference]: Start difference. First operand 315 states and 459 transitions. Second operand 3 states. [2019-11-28 00:28:37,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:37,797 INFO L93 Difference]: Finished difference Result 621 states and 906 transitions. [2019-11-28 00:28:37,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:37,798 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 00:28:37,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:37,800 INFO L225 Difference]: With dead ends: 621 [2019-11-28 00:28:37,800 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 00:28:37,801 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 00:28:37,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-11-28 00:28:37,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 00:28:37,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 451 transitions. [2019-11-28 00:28:37,821 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 451 transitions. Word has length 49 [2019-11-28 00:28:37,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:37,822 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 451 transitions. [2019-11-28 00:28:37,822 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:37,822 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 451 transitions. [2019-11-28 00:28:37,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 00:28:37,823 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:37,824 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:37,824 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:37,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:37,824 INFO L82 PathProgramCache]: Analyzing trace with hash -773990749, now seen corresponding path program 1 times [2019-11-28 00:28:37,825 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:37,825 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021119757] [2019-11-28 00:28:37,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:37,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:37,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:37,882 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021119757] [2019-11-28 00:28:37,883 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:37,883 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 00:28:37,883 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [174853239] [2019-11-28 00:28:37,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:37,884 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:37,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:37,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,885 INFO L87 Difference]: Start difference. First operand 315 states and 451 transitions. Second operand 3 states. [2019-11-28 00:28:37,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:37,942 INFO L93 Difference]: Finished difference Result 620 states and 889 transitions. [2019-11-28 00:28:37,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:37,943 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 00:28:37,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:37,948 INFO L225 Difference]: With dead ends: 620 [2019-11-28 00:28:37,948 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 00:28:37,949 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:37,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 00:28:37,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-11-28 00:28:37,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 00:28:37,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 437 transitions. [2019-11-28 00:28:37,971 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 437 transitions. Word has length 49 [2019-11-28 00:28:37,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:37,973 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 437 transitions. [2019-11-28 00:28:37,973 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:37,973 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 437 transitions. [2019-11-28 00:28:37,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 00:28:37,975 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:37,976 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:37,976 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:37,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:37,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1210649628, now seen corresponding path program 1 times [2019-11-28 00:28:37,978 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:37,978 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302403126] [2019-11-28 00:28:37,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:38,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:38,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:38,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302403126] [2019-11-28 00:28:38,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:38,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 00:28:38,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717587270] [2019-11-28 00:28:38,056 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:38,058 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:38,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:38,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,060 INFO L87 Difference]: Start difference. First operand 315 states and 437 transitions. Second operand 3 states. [2019-11-28 00:28:38,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:38,110 INFO L93 Difference]: Finished difference Result 619 states and 860 transitions. [2019-11-28 00:28:38,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:38,111 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 00:28:38,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:38,113 INFO L225 Difference]: With dead ends: 619 [2019-11-28 00:28:38,113 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 00:28:38,114 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 00:28:38,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-11-28 00:28:38,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 00:28:38,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 423 transitions. [2019-11-28 00:28:38,133 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 423 transitions. Word has length 49 [2019-11-28 00:28:38,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:38,133 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 423 transitions. [2019-11-28 00:28:38,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:38,134 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 423 transitions. [2019-11-28 00:28:38,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 00:28:38,134 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:38,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:38,135 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:38,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:38,136 INFO L82 PathProgramCache]: Analyzing trace with hash 217882148, now seen corresponding path program 1 times [2019-11-28 00:28:38,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:38,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173092652] [2019-11-28 00:28:38,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:38,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:38,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:38,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173092652] [2019-11-28 00:28:38,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:38,183 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:38,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [868627602] [2019-11-28 00:28:38,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:38,184 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:38,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:38,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,184 INFO L87 Difference]: Start difference. First operand 315 states and 423 transitions. Second operand 3 states. [2019-11-28 00:28:38,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:38,272 INFO L93 Difference]: Finished difference Result 870 states and 1162 transitions. [2019-11-28 00:28:38,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:38,273 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 00:28:38,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:38,277 INFO L225 Difference]: With dead ends: 870 [2019-11-28 00:28:38,277 INFO L226 Difference]: Without dead ends: 592 [2019-11-28 00:28:38,278 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2019-11-28 00:28:38,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 556. [2019-11-28 00:28:38,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 556 states. [2019-11-28 00:28:38,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 731 transitions. [2019-11-28 00:28:38,317 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 731 transitions. Word has length 49 [2019-11-28 00:28:38,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:38,318 INFO L462 AbstractCegarLoop]: Abstraction has 556 states and 731 transitions. [2019-11-28 00:28:38,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:38,319 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 731 transitions. [2019-11-28 00:28:38,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-11-28 00:28:38,320 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:38,320 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:38,320 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:38,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:38,321 INFO L82 PathProgramCache]: Analyzing trace with hash -397727545, now seen corresponding path program 1 times [2019-11-28 00:28:38,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:38,322 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502994784] [2019-11-28 00:28:38,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:38,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:38,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:38,409 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1502994784] [2019-11-28 00:28:38,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:38,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:38,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [5553617] [2019-11-28 00:28:38,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:38,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:38,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:38,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,413 INFO L87 Difference]: Start difference. First operand 556 states and 731 transitions. Second operand 3 states. [2019-11-28 00:28:38,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:38,524 INFO L93 Difference]: Finished difference Result 1454 states and 1913 transitions. [2019-11-28 00:28:38,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:38,525 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2019-11-28 00:28:38,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:38,532 INFO L225 Difference]: With dead ends: 1454 [2019-11-28 00:28:38,533 INFO L226 Difference]: Without dead ends: 968 [2019-11-28 00:28:38,534 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 968 states. [2019-11-28 00:28:38,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 968 to 926. [2019-11-28 00:28:38,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 926 states. [2019-11-28 00:28:38,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 926 states to 926 states and 1204 transitions. [2019-11-28 00:28:38,591 INFO L78 Accepts]: Start accepts. Automaton has 926 states and 1204 transitions. Word has length 50 [2019-11-28 00:28:38,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:38,591 INFO L462 AbstractCegarLoop]: Abstraction has 926 states and 1204 transitions. [2019-11-28 00:28:38,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:38,592 INFO L276 IsEmpty]: Start isEmpty. Operand 926 states and 1204 transitions. [2019-11-28 00:28:38,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 00:28:38,593 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:38,593 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:38,593 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:38,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:38,594 INFO L82 PathProgramCache]: Analyzing trace with hash 765911831, now seen corresponding path program 1 times [2019-11-28 00:28:38,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:38,595 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262697314] [2019-11-28 00:28:38,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:38,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:38,655 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:38,655 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262697314] [2019-11-28 00:28:38,655 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:38,655 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 00:28:38,656 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [176987139] [2019-11-28 00:28:38,656 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:38,656 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:38,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:38,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,659 INFO L87 Difference]: Start difference. First operand 926 states and 1204 transitions. Second operand 3 states. [2019-11-28 00:28:38,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:38,794 INFO L93 Difference]: Finished difference Result 2626 states and 3421 transitions. [2019-11-28 00:28:38,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:38,795 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-11-28 00:28:38,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:38,804 INFO L225 Difference]: With dead ends: 2626 [2019-11-28 00:28:38,804 INFO L226 Difference]: Without dead ends: 1750 [2019-11-28 00:28:38,807 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1750 states. [2019-11-28 00:28:38,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1750 to 1734. [2019-11-28 00:28:38,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1734 states. [2019-11-28 00:28:38,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1734 states to 1734 states and 2234 transitions. [2019-11-28 00:28:38,931 INFO L78 Accepts]: Start accepts. Automaton has 1734 states and 2234 transitions. Word has length 51 [2019-11-28 00:28:38,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:38,932 INFO L462 AbstractCegarLoop]: Abstraction has 1734 states and 2234 transitions. [2019-11-28 00:28:38,932 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:38,932 INFO L276 IsEmpty]: Start isEmpty. Operand 1734 states and 2234 transitions. [2019-11-28 00:28:38,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-28 00:28:38,933 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:38,934 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:38,934 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:38,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:38,935 INFO L82 PathProgramCache]: Analyzing trace with hash -1533277321, now seen corresponding path program 1 times [2019-11-28 00:28:38,935 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:38,935 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508263892] [2019-11-28 00:28:38,935 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:38,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:38,994 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:38,994 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508263892] [2019-11-28 00:28:38,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:38,995 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:38,995 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857624625] [2019-11-28 00:28:38,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:38,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:38,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:38,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:38,997 INFO L87 Difference]: Start difference. First operand 1734 states and 2234 transitions. Second operand 3 states. [2019-11-28 00:28:39,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:39,173 INFO L93 Difference]: Finished difference Result 5068 states and 6521 transitions. [2019-11-28 00:28:39,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:39,175 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-11-28 00:28:39,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:39,192 INFO L225 Difference]: With dead ends: 5068 [2019-11-28 00:28:39,192 INFO L226 Difference]: Without dead ends: 3402 [2019-11-28 00:28:39,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:39,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3402 states. [2019-11-28 00:28:39,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3402 to 3402. [2019-11-28 00:28:39,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3402 states. [2019-11-28 00:28:39,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3402 states to 3402 states and 4340 transitions. [2019-11-28 00:28:39,355 INFO L78 Accepts]: Start accepts. Automaton has 3402 states and 4340 transitions. Word has length 66 [2019-11-28 00:28:39,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:39,358 INFO L462 AbstractCegarLoop]: Abstraction has 3402 states and 4340 transitions. [2019-11-28 00:28:39,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:39,359 INFO L276 IsEmpty]: Start isEmpty. Operand 3402 states and 4340 transitions. [2019-11-28 00:28:39,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-28 00:28:39,367 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:39,367 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:39,367 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:39,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:39,368 INFO L82 PathProgramCache]: Analyzing trace with hash -883662481, now seen corresponding path program 1 times [2019-11-28 00:28:39,368 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:39,368 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1523824560] [2019-11-28 00:28:39,369 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:39,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:39,439 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 00:28:39,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1523824560] [2019-11-28 00:28:39,440 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:39,440 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 00:28:39,441 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476805236] [2019-11-28 00:28:39,441 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 00:28:39,441 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:39,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 00:28:39,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 00:28:39,442 INFO L87 Difference]: Start difference. First operand 3402 states and 4340 transitions. Second operand 5 states. [2019-11-28 00:28:39,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:39,868 INFO L93 Difference]: Finished difference Result 10802 states and 13699 transitions. [2019-11-28 00:28:39,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 00:28:39,869 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2019-11-28 00:28:39,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:39,903 INFO L225 Difference]: With dead ends: 10802 [2019-11-28 00:28:39,903 INFO L226 Difference]: Without dead ends: 7492 [2019-11-28 00:28:39,910 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 00:28:39,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7492 states. [2019-11-28 00:28:40,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7492 to 3546. [2019-11-28 00:28:40,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3546 states. [2019-11-28 00:28:40,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3546 states to 3546 states and 4448 transitions. [2019-11-28 00:28:40,235 INFO L78 Accepts]: Start accepts. Automaton has 3546 states and 4448 transitions. Word has length 89 [2019-11-28 00:28:40,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:40,235 INFO L462 AbstractCegarLoop]: Abstraction has 3546 states and 4448 transitions. [2019-11-28 00:28:40,235 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 00:28:40,236 INFO L276 IsEmpty]: Start isEmpty. Operand 3546 states and 4448 transitions. [2019-11-28 00:28:40,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-28 00:28:40,239 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:40,239 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:40,239 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:40,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:40,240 INFO L82 PathProgramCache]: Analyzing trace with hash -305176077, now seen corresponding path program 1 times [2019-11-28 00:28:40,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:40,240 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947852985] [2019-11-28 00:28:40,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:40,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:40,311 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 00:28:40,312 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947852985] [2019-11-28 00:28:40,312 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:40,312 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:40,313 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [624337052] [2019-11-28 00:28:40,313 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:40,313 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:40,314 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:40,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:40,314 INFO L87 Difference]: Start difference. First operand 3546 states and 4448 transitions. Second operand 3 states. [2019-11-28 00:28:40,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:40,644 INFO L93 Difference]: Finished difference Result 10194 states and 12806 transitions. [2019-11-28 00:28:40,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:40,645 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-11-28 00:28:40,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:40,679 INFO L225 Difference]: With dead ends: 10194 [2019-11-28 00:28:40,680 INFO L226 Difference]: Without dead ends: 6712 [2019-11-28 00:28:40,687 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:40,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6712 states. [2019-11-28 00:28:40,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6712 to 6494. [2019-11-28 00:28:40,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6494 states. [2019-11-28 00:28:41,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6494 states to 6494 states and 8084 transitions. [2019-11-28 00:28:41,001 INFO L78 Accepts]: Start accepts. Automaton has 6494 states and 8084 transitions. Word has length 89 [2019-11-28 00:28:41,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:41,002 INFO L462 AbstractCegarLoop]: Abstraction has 6494 states and 8084 transitions. [2019-11-28 00:28:41,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:41,002 INFO L276 IsEmpty]: Start isEmpty. Operand 6494 states and 8084 transitions. [2019-11-28 00:28:41,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-28 00:28:41,006 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:41,007 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:41,007 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:41,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:41,008 INFO L82 PathProgramCache]: Analyzing trace with hash -1278665036, now seen corresponding path program 1 times [2019-11-28 00:28:41,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:41,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962694590] [2019-11-28 00:28:41,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:41,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:41,052 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 00:28:41,053 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962694590] [2019-11-28 00:28:41,053 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:41,053 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 00:28:41,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119108878] [2019-11-28 00:28:41,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 00:28:41,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:41,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 00:28:41,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 00:28:41,055 INFO L87 Difference]: Start difference. First operand 6494 states and 8084 transitions. Second operand 5 states. [2019-11-28 00:28:41,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:41,602 INFO L93 Difference]: Finished difference Result 15348 states and 19199 transitions. [2019-11-28 00:28:41,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 00:28:41,603 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2019-11-28 00:28:41,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:41,637 INFO L225 Difference]: With dead ends: 15348 [2019-11-28 00:28:41,637 INFO L226 Difference]: Without dead ends: 8934 [2019-11-28 00:28:41,647 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 00:28:41,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8934 states. [2019-11-28 00:28:41,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8934 to 6542. [2019-11-28 00:28:41,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6542 states. [2019-11-28 00:28:41,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6542 states to 6542 states and 8000 transitions. [2019-11-28 00:28:41,987 INFO L78 Accepts]: Start accepts. Automaton has 6542 states and 8000 transitions. Word has length 89 [2019-11-28 00:28:41,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:41,987 INFO L462 AbstractCegarLoop]: Abstraction has 6542 states and 8000 transitions. [2019-11-28 00:28:41,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 00:28:41,988 INFO L276 IsEmpty]: Start isEmpty. Operand 6542 states and 8000 transitions. [2019-11-28 00:28:41,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-28 00:28:41,992 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:41,992 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:41,992 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:41,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:41,993 INFO L82 PathProgramCache]: Analyzing trace with hash 211800632, now seen corresponding path program 1 times [2019-11-28 00:28:41,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:41,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706645578] [2019-11-28 00:28:41,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:42,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:42,029 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:42,030 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1706645578] [2019-11-28 00:28:42,030 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:42,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:42,030 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346687430] [2019-11-28 00:28:42,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:42,031 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:42,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:42,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:42,032 INFO L87 Difference]: Start difference. First operand 6542 states and 8000 transitions. Second operand 3 states. [2019-11-28 00:28:42,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:42,305 INFO L93 Difference]: Finished difference Result 9812 states and 12049 transitions. [2019-11-28 00:28:42,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:42,306 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-11-28 00:28:42,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:42,320 INFO L225 Difference]: With dead ends: 9812 [2019-11-28 00:28:42,320 INFO L226 Difference]: Without dead ends: 6542 [2019-11-28 00:28:42,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:42,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6542 states. [2019-11-28 00:28:42,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6542 to 6512. [2019-11-28 00:28:42,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6512 states. [2019-11-28 00:28:42,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6512 states to 6512 states and 7866 transitions. [2019-11-28 00:28:42,688 INFO L78 Accepts]: Start accepts. Automaton has 6512 states and 7866 transitions. Word has length 89 [2019-11-28 00:28:42,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:42,689 INFO L462 AbstractCegarLoop]: Abstraction has 6512 states and 7866 transitions. [2019-11-28 00:28:42,689 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:42,689 INFO L276 IsEmpty]: Start isEmpty. Operand 6512 states and 7866 transitions. [2019-11-28 00:28:42,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-11-28 00:28:42,695 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:42,695 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:42,696 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:42,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:42,696 INFO L82 PathProgramCache]: Analyzing trace with hash -974468191, now seen corresponding path program 1 times [2019-11-28 00:28:42,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:42,698 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1883476141] [2019-11-28 00:28:42,698 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:42,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:42,758 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 00:28:42,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1883476141] [2019-11-28 00:28:42,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:42,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 00:28:42,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731329226] [2019-11-28 00:28:42,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 00:28:42,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:42,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 00:28:42,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 00:28:42,761 INFO L87 Difference]: Start difference. First operand 6512 states and 7866 transitions. Second operand 5 states. [2019-11-28 00:28:43,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:43,148 INFO L93 Difference]: Finished difference Result 12634 states and 15323 transitions. [2019-11-28 00:28:43,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 00:28:43,149 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-11-28 00:28:43,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:43,166 INFO L225 Difference]: With dead ends: 12634 [2019-11-28 00:28:43,166 INFO L226 Difference]: Without dead ends: 6178 [2019-11-28 00:28:43,176 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 00:28:43,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6178 states. [2019-11-28 00:28:43,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6178 to 4920. [2019-11-28 00:28:43,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4920 states. [2019-11-28 00:28:43,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4920 states to 4920 states and 5854 transitions. [2019-11-28 00:28:43,411 INFO L78 Accepts]: Start accepts. Automaton has 4920 states and 5854 transitions. Word has length 90 [2019-11-28 00:28:43,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:43,412 INFO L462 AbstractCegarLoop]: Abstraction has 4920 states and 5854 transitions. [2019-11-28 00:28:43,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 00:28:43,412 INFO L276 IsEmpty]: Start isEmpty. Operand 4920 states and 5854 transitions. [2019-11-28 00:28:43,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-28 00:28:43,415 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:43,415 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:43,416 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:43,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:43,416 INFO L82 PathProgramCache]: Analyzing trace with hash 724986355, now seen corresponding path program 1 times [2019-11-28 00:28:43,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:43,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425023964] [2019-11-28 00:28:43,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:43,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:43,448 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:43,449 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1425023964] [2019-11-28 00:28:43,451 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:43,452 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:43,452 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [769422365] [2019-11-28 00:28:43,452 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:43,452 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:43,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:43,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:43,453 INFO L87 Difference]: Start difference. First operand 4920 states and 5854 transitions. Second operand 3 states. [2019-11-28 00:28:43,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:43,796 INFO L93 Difference]: Finished difference Result 9778 states and 11642 transitions. [2019-11-28 00:28:43,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:43,797 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2019-11-28 00:28:43,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:43,805 INFO L225 Difference]: With dead ends: 9778 [2019-11-28 00:28:43,805 INFO L226 Difference]: Without dead ends: 4190 [2019-11-28 00:28:43,811 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:43,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4190 states. [2019-11-28 00:28:43,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4190 to 4186. [2019-11-28 00:28:43,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4186 states. [2019-11-28 00:28:44,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4186 states to 4186 states and 4930 transitions. [2019-11-28 00:28:44,007 INFO L78 Accepts]: Start accepts. Automaton has 4186 states and 4930 transitions. Word has length 92 [2019-11-28 00:28:44,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:44,007 INFO L462 AbstractCegarLoop]: Abstraction has 4186 states and 4930 transitions. [2019-11-28 00:28:44,007 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:44,008 INFO L276 IsEmpty]: Start isEmpty. Operand 4186 states and 4930 transitions. [2019-11-28 00:28:44,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-11-28 00:28:44,011 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:44,012 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:44,012 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:44,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:44,012 INFO L82 PathProgramCache]: Analyzing trace with hash 2141342848, now seen corresponding path program 1 times [2019-11-28 00:28:44,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:44,013 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328432193] [2019-11-28 00:28:44,013 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:44,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:44,047 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 00:28:44,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1328432193] [2019-11-28 00:28:44,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:44,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:44,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641681346] [2019-11-28 00:28:44,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:44,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:44,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:44,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:44,050 INFO L87 Difference]: Start difference. First operand 4186 states and 4930 transitions. Second operand 3 states. [2019-11-28 00:28:44,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:44,237 INFO L93 Difference]: Finished difference Result 8752 states and 10233 transitions. [2019-11-28 00:28:44,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:44,238 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 116 [2019-11-28 00:28:44,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:44,244 INFO L225 Difference]: With dead ends: 8752 [2019-11-28 00:28:44,244 INFO L226 Difference]: Without dead ends: 2868 [2019-11-28 00:28:44,251 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:44,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2868 states. [2019-11-28 00:28:44,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2868 to 2790. [2019-11-28 00:28:44,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2790 states. [2019-11-28 00:28:44,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2790 states to 2790 states and 3146 transitions. [2019-11-28 00:28:44,408 INFO L78 Accepts]: Start accepts. Automaton has 2790 states and 3146 transitions. Word has length 116 [2019-11-28 00:28:44,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:44,409 INFO L462 AbstractCegarLoop]: Abstraction has 2790 states and 3146 transitions. [2019-11-28 00:28:44,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:44,409 INFO L276 IsEmpty]: Start isEmpty. Operand 2790 states and 3146 transitions. [2019-11-28 00:28:44,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-11-28 00:28:44,412 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:44,413 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:44,413 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:44,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:44,414 INFO L82 PathProgramCache]: Analyzing trace with hash 1717534558, now seen corresponding path program 1 times [2019-11-28 00:28:44,414 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:44,414 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383222744] [2019-11-28 00:28:44,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:44,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 00:28:44,451 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 00:28:44,452 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383222744] [2019-11-28 00:28:44,452 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 00:28:44,452 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 00:28:44,453 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1867389505] [2019-11-28 00:28:44,453 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 00:28:44,453 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 00:28:44,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 00:28:44,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:44,454 INFO L87 Difference]: Start difference. First operand 2790 states and 3146 transitions. Second operand 3 states. [2019-11-28 00:28:44,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 00:28:44,571 INFO L93 Difference]: Finished difference Result 3172 states and 3583 transitions. [2019-11-28 00:28:44,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 00:28:44,572 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2019-11-28 00:28:44,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 00:28:44,574 INFO L225 Difference]: With dead ends: 3172 [2019-11-28 00:28:44,574 INFO L226 Difference]: Without dead ends: 2470 [2019-11-28 00:28:44,576 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 00:28:44,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2470 states. [2019-11-28 00:28:44,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2470 to 2470. [2019-11-28 00:28:44,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2470 states. [2019-11-28 00:28:44,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2470 states to 2470 states and 2766 transitions. [2019-11-28 00:28:44,718 INFO L78 Accepts]: Start accepts. Automaton has 2470 states and 2766 transitions. Word has length 117 [2019-11-28 00:28:44,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 00:28:44,719 INFO L462 AbstractCegarLoop]: Abstraction has 2470 states and 2766 transitions. [2019-11-28 00:28:44,719 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 00:28:44,719 INFO L276 IsEmpty]: Start isEmpty. Operand 2470 states and 2766 transitions. [2019-11-28 00:28:44,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-11-28 00:28:44,724 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 00:28:44,724 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 00:28:44,724 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 00:28:44,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 00:28:44,725 INFO L82 PathProgramCache]: Analyzing trace with hash -692010475, now seen corresponding path program 1 times [2019-11-28 00:28:44,726 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 00:28:44,726 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660846415] [2019-11-28 00:28:44,726 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 00:28:44,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 00:28:44,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 00:28:44,811 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 00:28:44,812 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 00:28:44,926 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 12:28:44 BoogieIcfgContainer [2019-11-28 00:28:44,927 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 00:28:44,927 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 00:28:44,927 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 00:28:44,928 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 00:28:44,928 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:28:36" (3/4) ... [2019-11-28 00:28:44,931 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 00:28:45,094 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 00:28:45,094 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 00:28:45,096 INFO L168 Benchmark]: Toolchain (without parser) took 9582.32 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 537.9 MB). Free memory was 952.3 MB in the beginning and 896.6 MB in the end (delta: 55.7 MB). Peak memory consumption was 593.6 MB. Max. memory is 11.5 GB. [2019-11-28 00:28:45,097 INFO L168 Benchmark]: CDTParser took 0.26 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 00:28:45,097 INFO L168 Benchmark]: CACSL2BoogieTranslator took 407.00 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -180.8 MB). Peak memory consumption was 20.4 MB. Max. memory is 11.5 GB. [2019-11-28 00:28:45,098 INFO L168 Benchmark]: Boogie Procedure Inliner took 52.33 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 00:28:45,098 INFO L168 Benchmark]: Boogie Preprocessor took 72.17 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 8.2 MB). Peak memory consumption was 8.2 MB. Max. memory is 11.5 GB. [2019-11-28 00:28:45,098 INFO L168 Benchmark]: RCFGBuilder took 785.17 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. [2019-11-28 00:28:45,099 INFO L168 Benchmark]: TraceAbstraction took 8093.29 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 394.8 MB). Free memory was 1.1 GB in the beginning and 910.5 MB in the end (delta: 163.7 MB). Peak memory consumption was 558.5 MB. Max. memory is 11.5 GB. [2019-11-28 00:28:45,099 INFO L168 Benchmark]: Witness Printer took 166.94 ms. Allocated memory is still 1.6 GB. Free memory was 910.5 MB in the beginning and 896.6 MB in the end (delta: 13.9 MB). Peak memory consumption was 13.9 MB. Max. memory is 11.5 GB. [2019-11-28 00:28:45,101 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 407.00 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -180.8 MB). Peak memory consumption was 20.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 52.33 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 72.17 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 8.2 MB). Peak memory consumption was 8.2 MB. Max. memory is 11.5 GB. * RCFGBuilder took 785.17 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 8093.29 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 394.8 MB). Free memory was 1.1 GB in the beginning and 910.5 MB in the end (delta: 163.7 MB). Peak memory consumption was 558.5 MB. Max. memory is 11.5 GB. * Witness Printer took 166.94 ms. Allocated memory is still 1.6 GB. Free memory was 910.5 MB in the beginning and 896.6 MB in the end (delta: 13.9 MB). Peak memory consumption was 13.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int t2_i ; [L24] int M_E = 2; [L25] int T1_E = 2; [L26] int T2_E = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; VAL [E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L563] int __retres1 ; [L477] m_i = 1 [L478] t1_i = 1 [L479] t2_i = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L504] int kernel_st ; [L505] int tmp ; [L506] int tmp___0 ; [L510] kernel_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L211] COND TRUE m_i == 1 [L212] m_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L216] COND TRUE t1_i == 1 [L217] t1_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L221] COND TRUE t2_i == 1 [L222] t2_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L324] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L329] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L334] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L339] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L344] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L146] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L156] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L158] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L162] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L165] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L175] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L177] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L181] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L184] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L194] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L196] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L357] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L362] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L367] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L372] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L377] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L518] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L521] kernel_st = 1 [L257] int tmp ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L261] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L231] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L252] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L78] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L89] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L113] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L124] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L126] t2_pc = 1 [L127] t2_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L261] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L231] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L252] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND TRUE \read(tmp_ndt_1) [L276] m_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L37] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L48] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L51] E_1 = 1 [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND TRUE E_1 == 1 [L167] __retres1 = 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] tmp___0 = is_transmit1_triggered() [L403] COND TRUE \read(tmp___0) [L404] t1_st = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L194] __retres1 = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L53] E_1 = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L56] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L58] m_pc = 1 [L59] m_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L78] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L81] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L97] E_2 = 1 [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L147] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L175] __retres1 = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND TRUE E_2 == 1 [L186] __retres1 = 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] tmp___1 = is_transmit2_triggered() [L411] COND TRUE \read(tmp___1) [L412] t2_st = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L99] E_2 = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L89] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L113] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L116] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L11] __VERIFIER_error() VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 192 locations, 1 error locations. Result: UNSAFE, OverallTime: 7.9s, OverallIterations: 19, TraceHistogramMax: 2, AutomataDifference: 3.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5274 SDtfs, 4949 SDslu, 4000 SDs, 0 SdLazy, 329 SolverSat, 161 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 66 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6542occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.6s AutomataMinimizationTime, 18 MinimizatonAttempts, 8022 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 1399 NumberOfCodeBlocks, 1399 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 1263 ConstructedInterpolants, 0 QuantifiedInterpolants, 148665 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 126/126 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...