./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/bist_cell.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 30f4e4ab Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/bist_cell.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bb52621d262b2a79ebd79f9601fb8103d2f4f11e ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.1.24-30f4e4a [2019-11-28 03:44:58,217 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 03:44:58,219 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 03:44:58,232 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 03:44:58,233 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 03:44:58,234 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 03:44:58,235 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 03:44:58,238 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 03:44:58,240 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 03:44:58,241 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 03:44:58,242 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 03:44:58,243 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 03:44:58,244 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 03:44:58,245 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 03:44:58,246 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 03:44:58,247 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 03:44:58,248 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 03:44:58,249 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 03:44:58,251 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 03:44:58,253 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 03:44:58,255 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 03:44:58,256 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 03:44:58,258 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 03:44:58,259 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 03:44:58,261 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 03:44:58,262 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 03:44:58,262 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 03:44:58,263 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 03:44:58,264 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 03:44:58,265 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 03:44:58,265 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 03:44:58,266 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 03:44:58,267 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 03:44:58,268 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 03:44:58,269 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 03:44:58,270 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 03:44:58,270 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 03:44:58,271 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 03:44:58,271 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 03:44:58,272 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 03:44:58,273 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 03:44:58,274 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2019-11-28 03:44:58,299 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 03:44:58,299 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 03:44:58,302 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 03:44:58,302 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 03:44:58,303 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 03:44:58,303 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2019-11-28 03:44:58,303 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2019-11-28 03:44:58,303 INFO L138 SettingsManager]: * Use old map elimination=false [2019-11-28 03:44:58,304 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2019-11-28 03:44:58,304 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2019-11-28 03:44:58,305 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2019-11-28 03:44:58,305 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 03:44:58,306 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 03:44:58,306 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2019-11-28 03:44:58,307 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 03:44:58,307 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 03:44:58,307 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 03:44:58,307 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2019-11-28 03:44:58,308 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2019-11-28 03:44:58,308 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2019-11-28 03:44:58,309 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 03:44:58,309 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 03:44:58,309 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2019-11-28 03:44:58,309 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 03:44:58,310 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2019-11-28 03:44:58,310 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 03:44:58,310 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 03:44:58,310 INFO L138 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2019-11-28 03:44:58,311 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 03:44:58,311 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 03:44:58,311 INFO L138 SettingsManager]: * Dump automata to the following directory=/home/matthias/ultimate/dump/auto [2019-11-28 03:44:58,314 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2019-11-28 03:44:58,314 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bb52621d262b2a79ebd79f9601fb8103d2f4f11e [2019-11-28 03:44:58,644 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 03:44:58,657 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 03:44:58,660 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 03:44:58,662 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 03:44:58,662 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 03:44:58,663 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/bist_cell.cil.c [2019-11-28 03:44:58,743 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c1b0001d5/21f8c2709eb54421b04ac3ce7ff039b5/FLAG4c3ae7a89 [2019-11-28 03:44:59,208 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 03:44:59,209 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/bist_cell.cil.c [2019-11-28 03:44:59,227 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c1b0001d5/21f8c2709eb54421b04ac3ce7ff039b5/FLAG4c3ae7a89 [2019-11-28 03:44:59,562 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c1b0001d5/21f8c2709eb54421b04ac3ce7ff039b5 [2019-11-28 03:44:59,565 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 03:44:59,567 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 03:44:59,568 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 03:44:59,568 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 03:44:59,571 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 03:44:59,572 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:44:59,575 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1a4fc736 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59, skipping insertion in model container [2019-11-28 03:44:59,576 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:44:59,583 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 03:44:59,615 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 03:44:59,849 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 03:44:59,863 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 03:44:59,904 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 03:44:59,925 INFO L208 MainTranslator]: Completed translation [2019-11-28 03:44:59,926 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59 WrapperNode [2019-11-28 03:44:59,926 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 03:44:59,927 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 03:44:59,927 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 03:44:59,927 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 03:44:59,992 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,005 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,044 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 03:45:00,045 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 03:45:00,045 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 03:45:00,045 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 03:45:00,054 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,054 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,057 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,057 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,063 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,072 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,075 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... [2019-11-28 03:45:00,079 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 03:45:00,080 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 03:45:00,080 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 03:45:00,081 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 03:45:00,082 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:00,160 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 03:45:00,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 03:45:00,770 INFO L292 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 03:45:00,771 INFO L297 CfgBuilder]: Removed 64 assume(true) statements. [2019-11-28 03:45:00,772 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:45:00 BoogieIcfgContainer [2019-11-28 03:45:00,773 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 03:45:00,773 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2019-11-28 03:45:00,774 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2019-11-28 03:45:00,778 INFO L275 PluginConnector]: BuchiAutomizer initialized [2019-11-28 03:45:00,779 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2019-11-28 03:45:00,779 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.11 03:44:59" (1/3) ... [2019-11-28 03:45:00,781 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@17eee6bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 03:45:00, skipping insertion in model container [2019-11-28 03:45:00,781 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2019-11-28 03:45:00,781 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:44:59" (2/3) ... [2019-11-28 03:45:00,782 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@17eee6bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 03:45:00, skipping insertion in model container [2019-11-28 03:45:00,782 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2019-11-28 03:45:00,782 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:45:00" (3/3) ... [2019-11-28 03:45:00,784 INFO L371 chiAutomizerObserver]: Analyzing ICFG bist_cell.cil.c [2019-11-28 03:45:00,834 INFO L356 BuchiCegarLoop]: Interprodecural is true [2019-11-28 03:45:00,834 INFO L357 BuchiCegarLoop]: Hoare is false [2019-11-28 03:45:00,834 INFO L358 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2019-11-28 03:45:00,835 INFO L359 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 03:45:00,835 INFO L360 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 03:45:00,835 INFO L361 BuchiCegarLoop]: Difference is false [2019-11-28 03:45:00,836 INFO L362 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 03:45:00,836 INFO L365 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2019-11-28 03:45:00,855 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 107 states. [2019-11-28 03:45:00,887 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:00,887 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:00,888 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:00,899 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:00,899 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:00,900 INFO L424 BuchiCegarLoop]: ======== Iteration 1============ [2019-11-28 03:45:00,900 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 107 states. [2019-11-28 03:45:00,907 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:00,907 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:00,907 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:00,909 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:00,910 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:00,919 INFO L794 eck$LassoCheckResult]: Stem: 88#ULTIMATE.startENTRYtrue ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 12#L-1true havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 39#L480true havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 44#L202true assume !(1 == ~b0_req_up~0); 30#L202-1true assume !(1 == ~b1_req_up~0); 80#L209true assume !(1 == ~d0_req_up~0); 35#L216true assume !(1 == ~d1_req_up~0); 87#L223true assume !(1 == ~z_req_up~0); 4#L230true assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 70#L245-1true assume !(0 == ~b0_ev~0); 82#L311-1true assume !(0 == ~b1_ev~0); 97#L316-1true assume !(0 == ~d0_ev~0); 8#L321-1true assume !(0 == ~d1_ev~0); 36#L326-1true assume !(0 == ~z_ev~0); 55#L331-1true havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 60#L97true assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 61#L119true is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 20#L120true activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 73#L380true assume !(0 != activate_threads_~tmp~1); 77#L380-2true assume !(1 == ~b0_ev~0); 81#L344-1true assume !(1 == ~b1_ev~0); 96#L349-1true assume !(1 == ~d0_ev~0); 6#L354-1true assume !(1 == ~d1_ev~0); 34#L359-1true assume !(1 == ~z_ev~0); 49#L422-1true [2019-11-28 03:45:00,921 INFO L796 eck$LassoCheckResult]: Loop: 49#L422-1true assume !false; 105#L423true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 7#L285true assume false; 48#L301true start_simulation_~kernel_st~0 := 2; 29#L202-2true assume !(1 == ~b0_req_up~0); 28#L202-3true assume !(1 == ~b1_req_up~0); 78#L209-1true assume !(1 == ~d0_req_up~0); 33#L216-1true assume !(1 == ~d1_req_up~0); 68#L223-1true assume !(1 == ~z_req_up~0); 3#L230-1true start_simulation_~kernel_st~0 := 3; 84#L311-2true assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 72#L311-4true assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 93#L316-3true assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 102#L321-3true assume !(0 == ~d1_ev~0); 24#L326-3true assume 0 == ~z_ev~0;~z_ev~0 := 1; 47#L331-3true havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 58#L97-1true assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 59#L119-1true is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 18#L120-1true activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 63#L380-3true assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 66#L380-5true assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 85#L344-3true assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 98#L349-3true assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 11#L354-3true assume !(1 == ~d1_ev~0); 23#L359-3true assume 1 == ~z_ev~0;~z_ev~0 := 2; 45#L364-3true havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 104#L258-1true assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 38#L265-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 101#L266-1true stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 51#L397true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 95#L404true stop_simulation_#res := stop_simulation_~__retres2~0; 69#L405true start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 27#L439true assume !(0 != start_simulation_~tmp~3); 49#L422-1true [2019-11-28 03:45:00,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:00,929 INFO L82 PathProgramCache]: Analyzing trace with hash 201072121, now seen corresponding path program 1 times [2019-11-28 03:45:00,939 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:00,939 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955764532] [2019-11-28 03:45:00,940 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,093 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [955764532] [2019-11-28 03:45:01,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,095 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:01,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [714948174] [2019-11-28 03:45:01,102 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:01,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,103 INFO L82 PathProgramCache]: Analyzing trace with hash -503786151, now seen corresponding path program 1 times [2019-11-28 03:45:01,103 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,104 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1401708439] [2019-11-28 03:45:01,104 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1401708439] [2019-11-28 03:45:01,120 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,120 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 03:45:01,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1548418441] [2019-11-28 03:45:01,123 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:01,124 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:01,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:01,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:01,143 INFO L87 Difference]: Start difference. First operand 107 states. Second operand 3 states. [2019-11-28 03:45:01,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:01,197 INFO L93 Difference]: Finished difference Result 107 states and 173 transitions. [2019-11-28 03:45:01,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:01,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 107 states and 173 transitions. [2019-11-28 03:45:01,207 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,213 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 107 states to 101 states and 167 transitions. [2019-11-28 03:45:01,215 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:01,215 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:01,216 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 167 transitions. [2019-11-28 03:45:01,217 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:01,218 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2019-11-28 03:45:01,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 167 transitions. [2019-11-28 03:45:01,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:01,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:01,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 167 transitions. [2019-11-28 03:45:01,273 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2019-11-28 03:45:01,273 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2019-11-28 03:45:01,275 INFO L424 BuchiCegarLoop]: ======== Iteration 2============ [2019-11-28 03:45:01,275 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 167 transitions. [2019-11-28 03:45:01,284 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,284 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:01,285 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:01,290 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,291 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,292 INFO L794 eck$LassoCheckResult]: Stem: 319#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 241#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 242#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 282#L202 assume 1 == ~b0_req_up~0; 286#L127 assume !(~b0_val~0 != ~b0_val_t~0); 294#L127-2 ~b0_req_up~0 := 0; 273#L202-1 assume !(1 == ~b1_req_up~0); 250#L209 assume !(1 == ~d0_req_up~0); 278#L216 assume !(1 == ~d1_req_up~0); 275#L223 assume !(1 == ~z_req_up~0); 225#L230 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 226#L245-1 assume !(0 == ~b0_ev~0); 309#L311-1 assume !(0 == ~b1_ev~0); 317#L316-1 assume !(0 == ~d0_ev~0); 233#L321-1 assume !(0 == ~d1_ev~0); 234#L326-1 assume !(0 == ~z_ev~0); 279#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 296#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 256#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 257#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 258#L380 assume !(0 != activate_threads_~tmp~1); 312#L380-2 assume !(1 == ~b0_ev~0); 313#L344-1 assume !(1 == ~b1_ev~0); 316#L349-1 assume !(1 == ~d0_ev~0); 229#L354-1 assume !(1 == ~d1_ev~0); 230#L359-1 assume !(1 == ~z_ev~0); 268#L422-1 [2019-11-28 03:45:01,293 INFO L796 eck$LassoCheckResult]: Loop: 268#L422-1 assume !false; 290#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 231#L285 assume !false; 232#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 285#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 283#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 243#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 244#L280 assume !(0 != eval_~tmp___0~0); 289#L301 start_simulation_~kernel_st~0 := 2; 271#L202-2 assume !(1 == ~b0_req_up~0); 269#L202-3 assume !(1 == ~b1_req_up~0); 270#L209-1 assume !(1 == ~d0_req_up~0); 277#L216-1 assume !(1 == ~d1_req_up~0); 228#L223-1 assume !(1 == ~z_req_up~0); 223#L230-1 start_simulation_~kernel_st~0 := 3; 224#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 310#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 311#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 322#L321-3 assume !(0 == ~d1_ev~0); 262#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 263#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 288#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 252#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 253#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 254#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 303#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 305#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 318#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 239#L354-3 assume !(1 == ~d1_ev~0); 240#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 261#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 287#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 280#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 281#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 292#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 293#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 308#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 267#L439 assume !(0 != start_simulation_~tmp~3); 268#L422-1 [2019-11-28 03:45:01,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,294 INFO L82 PathProgramCache]: Analyzing trace with hash 987671025, now seen corresponding path program 1 times [2019-11-28 03:45:01,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866252933] [2019-11-28 03:45:01,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [866252933] [2019-11-28 03:45:01,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:01,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593764017] [2019-11-28 03:45:01,394 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:01,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,394 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 1 times [2019-11-28 03:45:01,395 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273377025] [2019-11-28 03:45:01,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,471 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [273377025] [2019-11-28 03:45:01,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:01,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505820058] [2019-11-28 03:45:01,473 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:01,473 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:01,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:01,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:01,475 INFO L87 Difference]: Start difference. First operand 101 states and 167 transitions. cyclomatic complexity: 67 Second operand 3 states. [2019-11-28 03:45:01,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:01,513 INFO L93 Difference]: Finished difference Result 101 states and 166 transitions. [2019-11-28 03:45:01,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:01,515 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 166 transitions. [2019-11-28 03:45:01,517 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,518 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 166 transitions. [2019-11-28 03:45:01,519 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:01,519 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:01,520 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 166 transitions. [2019-11-28 03:45:01,521 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:01,521 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2019-11-28 03:45:01,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 166 transitions. [2019-11-28 03:45:01,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:01,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:01,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 166 transitions. [2019-11-28 03:45:01,528 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2019-11-28 03:45:01,529 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2019-11-28 03:45:01,529 INFO L424 BuchiCegarLoop]: ======== Iteration 3============ [2019-11-28 03:45:01,529 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 166 transitions. [2019-11-28 03:45:01,531 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,531 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:01,531 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:01,533 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,533 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,534 INFO L794 eck$LassoCheckResult]: Stem: 530#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 452#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 453#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 493#L202 assume 1 == ~b0_req_up~0; 497#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 505#L127-2 ~b0_req_up~0 := 0; 484#L202-1 assume !(1 == ~b1_req_up~0); 461#L209 assume !(1 == ~d0_req_up~0); 489#L216 assume !(1 == ~d1_req_up~0); 486#L223 assume !(1 == ~z_req_up~0); 436#L230 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 437#L245-1 assume !(0 == ~b0_ev~0); 520#L311-1 assume !(0 == ~b1_ev~0); 528#L316-1 assume !(0 == ~d0_ev~0); 444#L321-1 assume !(0 == ~d1_ev~0); 445#L326-1 assume !(0 == ~z_ev~0); 490#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 507#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 467#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 468#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 469#L380 assume !(0 != activate_threads_~tmp~1); 523#L380-2 assume !(1 == ~b0_ev~0); 524#L344-1 assume !(1 == ~b1_ev~0); 527#L349-1 assume !(1 == ~d0_ev~0); 440#L354-1 assume !(1 == ~d1_ev~0); 441#L359-1 assume !(1 == ~z_ev~0); 479#L422-1 [2019-11-28 03:45:01,534 INFO L796 eck$LassoCheckResult]: Loop: 479#L422-1 assume !false; 501#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 442#L285 assume !false; 443#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 496#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 494#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 454#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 455#L280 assume !(0 != eval_~tmp___0~0); 500#L301 start_simulation_~kernel_st~0 := 2; 482#L202-2 assume !(1 == ~b0_req_up~0); 480#L202-3 assume !(1 == ~b1_req_up~0); 481#L209-1 assume !(1 == ~d0_req_up~0); 488#L216-1 assume !(1 == ~d1_req_up~0); 439#L223-1 assume !(1 == ~z_req_up~0); 434#L230-1 start_simulation_~kernel_st~0 := 3; 435#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 521#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 522#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 533#L321-3 assume !(0 == ~d1_ev~0); 473#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 474#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 499#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 463#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 464#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 465#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 514#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 516#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 529#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 450#L354-3 assume !(1 == ~d1_ev~0); 451#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 472#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 498#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 491#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 492#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 503#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 504#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 519#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 478#L439 assume !(0 != start_simulation_~tmp~3); 479#L422-1 [2019-11-28 03:45:01,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,535 INFO L82 PathProgramCache]: Analyzing trace with hash 768816307, now seen corresponding path program 1 times [2019-11-28 03:45:01,535 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,536 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296038744] [2019-11-28 03:45:01,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296038744] [2019-11-28 03:45:01,590 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:01,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [770809572] [2019-11-28 03:45:01,590 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:01,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,591 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 2 times [2019-11-28 03:45:01,592 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,592 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532510894] [2019-11-28 03:45:01,592 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,640 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532510894] [2019-11-28 03:45:01,640 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,641 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:01,641 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653776617] [2019-11-28 03:45:01,641 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:01,642 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:01,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:01,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:01,642 INFO L87 Difference]: Start difference. First operand 101 states and 166 transitions. cyclomatic complexity: 66 Second operand 3 states. [2019-11-28 03:45:01,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:01,661 INFO L93 Difference]: Finished difference Result 101 states and 165 transitions. [2019-11-28 03:45:01,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:01,662 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 165 transitions. [2019-11-28 03:45:01,664 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,665 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 165 transitions. [2019-11-28 03:45:01,665 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:01,666 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:01,666 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 165 transitions. [2019-11-28 03:45:01,667 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:01,667 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2019-11-28 03:45:01,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 165 transitions. [2019-11-28 03:45:01,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:01,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:01,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 165 transitions. [2019-11-28 03:45:01,673 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2019-11-28 03:45:01,674 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2019-11-28 03:45:01,674 INFO L424 BuchiCegarLoop]: ======== Iteration 4============ [2019-11-28 03:45:01,674 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 165 transitions. [2019-11-28 03:45:01,675 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,675 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:01,675 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:01,676 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,677 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,677 INFO L794 eck$LassoCheckResult]: Stem: 741#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 663#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 664#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 704#L202 assume 1 == ~b0_req_up~0; 708#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 716#L127-2 ~b0_req_up~0 := 0; 695#L202-1 assume 1 == ~b1_req_up~0; 681#L142 assume !(~b1_val~0 != ~b1_val_t~0); 671#L142-2 ~b1_req_up~0 := 0; 672#L209 assume !(1 == ~d0_req_up~0); 700#L216 assume !(1 == ~d1_req_up~0); 697#L223 assume !(1 == ~z_req_up~0); 647#L230 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 648#L245-1 assume !(0 == ~b0_ev~0); 731#L311-1 assume !(0 == ~b1_ev~0); 739#L316-1 assume !(0 == ~d0_ev~0); 655#L321-1 assume !(0 == ~d1_ev~0); 656#L326-1 assume !(0 == ~z_ev~0); 701#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 718#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 678#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 679#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 680#L380 assume !(0 != activate_threads_~tmp~1); 734#L380-2 assume !(1 == ~b0_ev~0); 735#L344-1 assume !(1 == ~b1_ev~0); 738#L349-1 assume !(1 == ~d0_ev~0); 651#L354-1 assume !(1 == ~d1_ev~0); 652#L359-1 assume !(1 == ~z_ev~0); 690#L422-1 [2019-11-28 03:45:01,677 INFO L796 eck$LassoCheckResult]: Loop: 690#L422-1 assume !false; 712#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 653#L285 assume !false; 654#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 707#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 705#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 665#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 666#L280 assume !(0 != eval_~tmp___0~0); 711#L301 start_simulation_~kernel_st~0 := 2; 693#L202-2 assume !(1 == ~b0_req_up~0); 691#L202-3 assume !(1 == ~b1_req_up~0); 692#L209-1 assume !(1 == ~d0_req_up~0); 699#L216-1 assume !(1 == ~d1_req_up~0); 650#L223-1 assume !(1 == ~z_req_up~0); 645#L230-1 start_simulation_~kernel_st~0 := 3; 646#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 732#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 733#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 744#L321-3 assume !(0 == ~d1_ev~0); 684#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 685#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 710#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 674#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 675#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 676#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 725#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 727#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 740#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 661#L354-3 assume !(1 == ~d1_ev~0); 662#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 683#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 709#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 702#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 703#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 714#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 715#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 730#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 689#L439 assume !(0 != start_simulation_~tmp~3); 690#L422-1 [2019-11-28 03:45:01,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,678 INFO L82 PathProgramCache]: Analyzing trace with hash -1003190981, now seen corresponding path program 1 times [2019-11-28 03:45:01,678 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,678 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661746066] [2019-11-28 03:45:01,679 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661746066] [2019-11-28 03:45:01,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:01,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1998791780] [2019-11-28 03:45:01,714 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:01,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,714 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 3 times [2019-11-28 03:45:01,714 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,717 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751953224] [2019-11-28 03:45:01,717 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,790 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1751953224] [2019-11-28 03:45:01,790 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,790 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:01,792 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740753295] [2019-11-28 03:45:01,792 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:01,793 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:01,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:01,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:01,793 INFO L87 Difference]: Start difference. First operand 101 states and 165 transitions. cyclomatic complexity: 65 Second operand 3 states. [2019-11-28 03:45:01,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:01,820 INFO L93 Difference]: Finished difference Result 101 states and 164 transitions. [2019-11-28 03:45:01,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:01,825 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 164 transitions. [2019-11-28 03:45:01,826 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,827 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 164 transitions. [2019-11-28 03:45:01,828 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:01,828 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:01,828 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 164 transitions. [2019-11-28 03:45:01,832 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:01,832 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2019-11-28 03:45:01,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 164 transitions. [2019-11-28 03:45:01,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:01,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:01,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 164 transitions. [2019-11-28 03:45:01,841 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2019-11-28 03:45:01,841 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2019-11-28 03:45:01,841 INFO L424 BuchiCegarLoop]: ======== Iteration 5============ [2019-11-28 03:45:01,841 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 164 transitions. [2019-11-28 03:45:01,842 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,842 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:01,843 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:01,844 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,844 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,844 INFO L794 eck$LassoCheckResult]: Stem: 952#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 874#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 875#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 915#L202 assume 1 == ~b0_req_up~0; 920#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 927#L127-2 ~b0_req_up~0 := 0; 906#L202-1 assume 1 == ~b1_req_up~0; 892#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 884#L142-2 ~b1_req_up~0 := 0; 885#L209 assume !(1 == ~d0_req_up~0); 911#L216 assume !(1 == ~d1_req_up~0); 908#L223 assume !(1 == ~z_req_up~0); 858#L230 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 859#L245-1 assume !(0 == ~b0_ev~0); 942#L311-1 assume !(0 == ~b1_ev~0); 950#L316-1 assume !(0 == ~d0_ev~0); 866#L321-1 assume !(0 == ~d1_ev~0); 867#L326-1 assume !(0 == ~z_ev~0); 912#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 929#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 889#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 890#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 891#L380 assume !(0 != activate_threads_~tmp~1); 945#L380-2 assume !(1 == ~b0_ev~0); 946#L344-1 assume !(1 == ~b1_ev~0); 949#L349-1 assume !(1 == ~d0_ev~0); 862#L354-1 assume !(1 == ~d1_ev~0); 863#L359-1 assume !(1 == ~z_ev~0); 901#L422-1 [2019-11-28 03:45:01,844 INFO L796 eck$LassoCheckResult]: Loop: 901#L422-1 assume !false; 923#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 864#L285 assume !false; 865#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 918#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 916#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 876#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 877#L280 assume !(0 != eval_~tmp___0~0); 922#L301 start_simulation_~kernel_st~0 := 2; 904#L202-2 assume !(1 == ~b0_req_up~0); 902#L202-3 assume !(1 == ~b1_req_up~0); 903#L209-1 assume !(1 == ~d0_req_up~0); 910#L216-1 assume !(1 == ~d1_req_up~0); 861#L223-1 assume !(1 == ~z_req_up~0); 856#L230-1 start_simulation_~kernel_st~0 := 3; 857#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 943#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 944#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 955#L321-3 assume !(0 == ~d1_ev~0); 895#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 896#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 921#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 883#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 886#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 887#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 936#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 938#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 951#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 872#L354-3 assume !(1 == ~d1_ev~0); 873#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 894#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 919#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 913#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 914#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 925#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 926#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 941#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 900#L439 assume !(0 != start_simulation_~tmp~3); 901#L422-1 [2019-11-28 03:45:01,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,845 INFO L82 PathProgramCache]: Analyzing trace with hash -1425892807, now seen corresponding path program 1 times [2019-11-28 03:45:01,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1059216007] [2019-11-28 03:45:01,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,877 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1059216007] [2019-11-28 03:45:01,877 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,877 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:01,878 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1997527163] [2019-11-28 03:45:01,878 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:01,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,878 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 4 times [2019-11-28 03:45:01,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1874298701] [2019-11-28 03:45:01,879 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,925 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1874298701] [2019-11-28 03:45:01,925 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,925 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:01,925 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282973976] [2019-11-28 03:45:01,926 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:01,926 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:01,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:01,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:01,927 INFO L87 Difference]: Start difference. First operand 101 states and 164 transitions. cyclomatic complexity: 64 Second operand 3 states. [2019-11-28 03:45:01,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:01,943 INFO L93 Difference]: Finished difference Result 101 states and 163 transitions. [2019-11-28 03:45:01,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:01,944 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 163 transitions. [2019-11-28 03:45:01,946 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,947 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 163 transitions. [2019-11-28 03:45:01,947 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:01,948 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:01,948 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 163 transitions. [2019-11-28 03:45:01,949 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:01,949 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2019-11-28 03:45:01,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 163 transitions. [2019-11-28 03:45:01,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:01,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:01,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 163 transitions. [2019-11-28 03:45:01,954 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2019-11-28 03:45:01,955 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2019-11-28 03:45:01,955 INFO L424 BuchiCegarLoop]: ======== Iteration 6============ [2019-11-28 03:45:01,955 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 163 transitions. [2019-11-28 03:45:01,956 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:01,956 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:01,956 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:01,957 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,958 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:01,958 INFO L794 eck$LassoCheckResult]: Stem: 1163#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1085#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1086#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1126#L202 assume 1 == ~b0_req_up~0; 1131#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1138#L127-2 ~b0_req_up~0 := 0; 1117#L202-1 assume 1 == ~b1_req_up~0; 1103#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1095#L142-2 ~b1_req_up~0 := 0; 1096#L209 assume 1 == ~d0_req_up~0; 1150#L157 assume !(~d0_val~0 != ~d0_val_t~0); 1148#L157-2 ~d0_req_up~0 := 0; 1122#L216 assume !(1 == ~d1_req_up~0); 1119#L223 assume !(1 == ~z_req_up~0); 1069#L230 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1070#L245-1 assume !(0 == ~b0_ev~0); 1153#L311-1 assume !(0 == ~b1_ev~0); 1161#L316-1 assume !(0 == ~d0_ev~0); 1077#L321-1 assume !(0 == ~d1_ev~0); 1078#L326-1 assume !(0 == ~z_ev~0); 1123#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1140#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1100#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1101#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1102#L380 assume !(0 != activate_threads_~tmp~1); 1156#L380-2 assume !(1 == ~b0_ev~0); 1157#L344-1 assume !(1 == ~b1_ev~0); 1160#L349-1 assume !(1 == ~d0_ev~0); 1073#L354-1 assume !(1 == ~d1_ev~0); 1074#L359-1 assume !(1 == ~z_ev~0); 1112#L422-1 [2019-11-28 03:45:01,958 INFO L796 eck$LassoCheckResult]: Loop: 1112#L422-1 assume !false; 1134#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1075#L285 assume !false; 1076#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1129#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1127#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1087#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1088#L280 assume !(0 != eval_~tmp___0~0); 1133#L301 start_simulation_~kernel_st~0 := 2; 1115#L202-2 assume !(1 == ~b0_req_up~0); 1113#L202-3 assume !(1 == ~b1_req_up~0); 1114#L209-1 assume !(1 == ~d0_req_up~0); 1121#L216-1 assume !(1 == ~d1_req_up~0); 1072#L223-1 assume !(1 == ~z_req_up~0); 1067#L230-1 start_simulation_~kernel_st~0 := 3; 1068#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1154#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1155#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1166#L321-3 assume !(0 == ~d1_ev~0); 1106#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1107#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1132#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1094#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1097#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1098#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1147#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1149#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1162#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1083#L354-3 assume !(1 == ~d1_ev~0); 1084#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1105#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1130#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1124#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1125#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1136#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1137#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1152#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1111#L439 assume !(0 != start_simulation_~tmp~3); 1112#L422-1 [2019-11-28 03:45:01,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,959 INFO L82 PathProgramCache]: Analyzing trace with hash -665750479, now seen corresponding path program 1 times [2019-11-28 03:45:01,959 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,959 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539136157] [2019-11-28 03:45:01,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:01,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:01,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1539136157] [2019-11-28 03:45:01,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:01,987 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:01,987 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1512484584] [2019-11-28 03:45:01,987 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:01,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:01,988 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 5 times [2019-11-28 03:45:01,988 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:01,989 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451989346] [2019-11-28 03:45:01,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:01,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,031 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [451989346] [2019-11-28 03:45:02,031 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,032 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1661245285] [2019-11-28 03:45:02,032 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,033 INFO L87 Difference]: Start difference. First operand 101 states and 163 transitions. cyclomatic complexity: 63 Second operand 3 states. [2019-11-28 03:45:02,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,059 INFO L93 Difference]: Finished difference Result 101 states and 162 transitions. [2019-11-28 03:45:02,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,060 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 162 transitions. [2019-11-28 03:45:02,061 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:02,062 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 162 transitions. [2019-11-28 03:45:02,063 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:02,066 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:02,066 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 162 transitions. [2019-11-28 03:45:02,067 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,067 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2019-11-28 03:45:02,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 162 transitions. [2019-11-28 03:45:02,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:02,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:02,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 162 transitions. [2019-11-28 03:45:02,076 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2019-11-28 03:45:02,076 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2019-11-28 03:45:02,077 INFO L424 BuchiCegarLoop]: ======== Iteration 7============ [2019-11-28 03:45:02,077 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 162 transitions. [2019-11-28 03:45:02,078 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:02,078 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,079 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,080 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,080 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,080 INFO L794 eck$LassoCheckResult]: Stem: 1374#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1296#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1297#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1337#L202 assume 1 == ~b0_req_up~0; 1341#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1349#L127-2 ~b0_req_up~0 := 0; 1328#L202-1 assume 1 == ~b1_req_up~0; 1314#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1304#L142-2 ~b1_req_up~0 := 0; 1305#L209 assume 1 == ~d0_req_up~0; 1361#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1359#L157-2 ~d0_req_up~0 := 0; 1333#L216 assume !(1 == ~d1_req_up~0); 1330#L223 assume !(1 == ~z_req_up~0); 1280#L230 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1281#L245-1 assume !(0 == ~b0_ev~0); 1364#L311-1 assume !(0 == ~b1_ev~0); 1372#L316-1 assume !(0 == ~d0_ev~0); 1288#L321-1 assume !(0 == ~d1_ev~0); 1289#L326-1 assume !(0 == ~z_ev~0); 1334#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1351#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1311#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1312#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1313#L380 assume !(0 != activate_threads_~tmp~1); 1367#L380-2 assume !(1 == ~b0_ev~0); 1368#L344-1 assume !(1 == ~b1_ev~0); 1371#L349-1 assume !(1 == ~d0_ev~0); 1284#L354-1 assume !(1 == ~d1_ev~0); 1285#L359-1 assume !(1 == ~z_ev~0); 1323#L422-1 [2019-11-28 03:45:02,081 INFO L796 eck$LassoCheckResult]: Loop: 1323#L422-1 assume !false; 1345#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1286#L285 assume !false; 1287#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1340#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1338#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1298#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1299#L280 assume !(0 != eval_~tmp___0~0); 1344#L301 start_simulation_~kernel_st~0 := 2; 1326#L202-2 assume !(1 == ~b0_req_up~0); 1324#L202-3 assume !(1 == ~b1_req_up~0); 1325#L209-1 assume !(1 == ~d0_req_up~0); 1332#L216-1 assume !(1 == ~d1_req_up~0); 1283#L223-1 assume !(1 == ~z_req_up~0); 1278#L230-1 start_simulation_~kernel_st~0 := 3; 1279#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1365#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1366#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1377#L321-3 assume !(0 == ~d1_ev~0); 1317#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1318#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1343#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1307#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1308#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1309#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1358#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1360#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1373#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1294#L354-3 assume !(1 == ~d1_ev~0); 1295#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1316#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1342#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1335#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1336#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1347#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1348#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1363#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1322#L439 assume !(0 != start_simulation_~tmp~3); 1323#L422-1 [2019-11-28 03:45:02,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,081 INFO L82 PathProgramCache]: Analyzing trace with hash 151897971, now seen corresponding path program 1 times [2019-11-28 03:45:02,082 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,082 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52230781] [2019-11-28 03:45:02,082 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,118 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [52230781] [2019-11-28 03:45:02,118 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,118 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1269474882] [2019-11-28 03:45:02,119 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,120 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 6 times [2019-11-28 03:45:02,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,121 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568144539] [2019-11-28 03:45:02,121 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568144539] [2019-11-28 03:45:02,158 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,158 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,159 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435190348] [2019-11-28 03:45:02,159 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,159 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,160 INFO L87 Difference]: Start difference. First operand 101 states and 162 transitions. cyclomatic complexity: 62 Second operand 3 states. [2019-11-28 03:45:02,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,180 INFO L93 Difference]: Finished difference Result 101 states and 161 transitions. [2019-11-28 03:45:02,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,181 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 161 transitions. [2019-11-28 03:45:02,182 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:02,183 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 161 transitions. [2019-11-28 03:45:02,183 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:02,184 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:02,184 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 161 transitions. [2019-11-28 03:45:02,184 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,184 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2019-11-28 03:45:02,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 161 transitions. [2019-11-28 03:45:02,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:02,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:02,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 161 transitions. [2019-11-28 03:45:02,189 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2019-11-28 03:45:02,189 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2019-11-28 03:45:02,189 INFO L424 BuchiCegarLoop]: ======== Iteration 8============ [2019-11-28 03:45:02,189 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 161 transitions. [2019-11-28 03:45:02,190 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:02,191 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,191 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,192 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,192 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,192 INFO L794 eck$LassoCheckResult]: Stem: 1585#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1507#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1508#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1548#L202 assume 1 == ~b0_req_up~0; 1552#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1560#L127-2 ~b0_req_up~0 := 0; 1539#L202-1 assume 1 == ~b1_req_up~0; 1525#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1515#L142-2 ~b1_req_up~0 := 0; 1516#L209 assume 1 == ~d0_req_up~0; 1572#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1570#L157-2 ~d0_req_up~0 := 0; 1544#L216 assume 1 == ~d1_req_up~0; 1542#L172 assume !(~d1_val~0 != ~d1_val_t~0); 1540#L172-2 ~d1_req_up~0 := 0; 1541#L223 assume !(1 == ~z_req_up~0); 1491#L230 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1492#L245-1 assume !(0 == ~b0_ev~0); 1575#L311-1 assume !(0 == ~b1_ev~0); 1583#L316-1 assume !(0 == ~d0_ev~0); 1499#L321-1 assume !(0 == ~d1_ev~0); 1500#L326-1 assume !(0 == ~z_ev~0); 1545#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1562#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1522#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1523#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1524#L380 assume !(0 != activate_threads_~tmp~1); 1578#L380-2 assume !(1 == ~b0_ev~0); 1579#L344-1 assume !(1 == ~b1_ev~0); 1582#L349-1 assume !(1 == ~d0_ev~0); 1495#L354-1 assume !(1 == ~d1_ev~0); 1496#L359-1 assume !(1 == ~z_ev~0); 1534#L422-1 [2019-11-28 03:45:02,192 INFO L796 eck$LassoCheckResult]: Loop: 1534#L422-1 assume !false; 1556#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1497#L285 assume !false; 1498#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1551#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1549#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1509#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1510#L280 assume !(0 != eval_~tmp___0~0); 1555#L301 start_simulation_~kernel_st~0 := 2; 1537#L202-2 assume !(1 == ~b0_req_up~0); 1535#L202-3 assume !(1 == ~b1_req_up~0); 1536#L209-1 assume !(1 == ~d0_req_up~0); 1543#L216-1 assume !(1 == ~d1_req_up~0); 1494#L223-1 assume !(1 == ~z_req_up~0); 1489#L230-1 start_simulation_~kernel_st~0 := 3; 1490#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1576#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1577#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1588#L321-3 assume !(0 == ~d1_ev~0); 1528#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1529#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1554#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1518#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1519#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1520#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1569#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1571#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1584#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1505#L354-3 assume !(1 == ~d1_ev~0); 1506#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1527#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1553#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1546#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1547#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1558#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1559#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1574#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1533#L439 assume !(0 != start_simulation_~tmp~3); 1534#L422-1 [2019-11-28 03:45:02,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,193 INFO L82 PathProgramCache]: Analyzing trace with hash -650688005, now seen corresponding path program 1 times [2019-11-28 03:45:02,193 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,193 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296290168] [2019-11-28 03:45:02,194 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296290168] [2019-11-28 03:45:02,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503049775] [2019-11-28 03:45:02,220 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,221 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 7 times [2019-11-28 03:45:02,221 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,221 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831087966] [2019-11-28 03:45:02,221 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831087966] [2019-11-28 03:45:02,259 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,259 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,259 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1891020989] [2019-11-28 03:45:02,260 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,261 INFO L87 Difference]: Start difference. First operand 101 states and 161 transitions. cyclomatic complexity: 61 Second operand 3 states. [2019-11-28 03:45:02,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,275 INFO L93 Difference]: Finished difference Result 101 states and 160 transitions. [2019-11-28 03:45:02,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,276 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 160 transitions. [2019-11-28 03:45:02,277 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:02,278 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 160 transitions. [2019-11-28 03:45:02,278 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:02,279 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:02,279 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 160 transitions. [2019-11-28 03:45:02,279 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,279 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2019-11-28 03:45:02,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 160 transitions. [2019-11-28 03:45:02,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:02,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:02,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 160 transitions. [2019-11-28 03:45:02,283 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2019-11-28 03:45:02,284 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2019-11-28 03:45:02,284 INFO L424 BuchiCegarLoop]: ======== Iteration 9============ [2019-11-28 03:45:02,284 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 160 transitions. [2019-11-28 03:45:02,285 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:02,285 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,285 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,286 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,286 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,286 INFO L794 eck$LassoCheckResult]: Stem: 1796#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1718#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1719#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1759#L202 assume 1 == ~b0_req_up~0; 1763#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1771#L127-2 ~b0_req_up~0 := 0; 1750#L202-1 assume 1 == ~b1_req_up~0; 1736#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1726#L142-2 ~b1_req_up~0 := 0; 1727#L209 assume 1 == ~d0_req_up~0; 1783#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1781#L157-2 ~d0_req_up~0 := 0; 1755#L216 assume 1 == ~d1_req_up~0; 1753#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 1751#L172-2 ~d1_req_up~0 := 0; 1752#L223 assume !(1 == ~z_req_up~0); 1702#L230 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1703#L245-1 assume !(0 == ~b0_ev~0); 1786#L311-1 assume !(0 == ~b1_ev~0); 1794#L316-1 assume !(0 == ~d0_ev~0); 1710#L321-1 assume !(0 == ~d1_ev~0); 1711#L326-1 assume !(0 == ~z_ev~0); 1756#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1773#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1733#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1734#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1735#L380 assume !(0 != activate_threads_~tmp~1); 1789#L380-2 assume !(1 == ~b0_ev~0); 1790#L344-1 assume !(1 == ~b1_ev~0); 1793#L349-1 assume !(1 == ~d0_ev~0); 1706#L354-1 assume !(1 == ~d1_ev~0); 1707#L359-1 assume !(1 == ~z_ev~0); 1745#L422-1 [2019-11-28 03:45:02,287 INFO L796 eck$LassoCheckResult]: Loop: 1745#L422-1 assume !false; 1767#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1708#L285 assume !false; 1709#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1762#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1760#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1720#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1721#L280 assume !(0 != eval_~tmp___0~0); 1766#L301 start_simulation_~kernel_st~0 := 2; 1748#L202-2 assume !(1 == ~b0_req_up~0); 1746#L202-3 assume !(1 == ~b1_req_up~0); 1747#L209-1 assume !(1 == ~d0_req_up~0); 1754#L216-1 assume !(1 == ~d1_req_up~0); 1705#L223-1 assume !(1 == ~z_req_up~0); 1700#L230-1 start_simulation_~kernel_st~0 := 3; 1701#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1787#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1788#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1799#L321-3 assume !(0 == ~d1_ev~0); 1739#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1740#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1765#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1729#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1730#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1731#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1780#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1782#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1795#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1716#L354-3 assume !(1 == ~d1_ev~0); 1717#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1738#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1764#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1757#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1758#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1769#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1770#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1785#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1744#L439 assume !(0 != start_simulation_~tmp~3); 1745#L422-1 [2019-11-28 03:45:02,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,287 INFO L82 PathProgramCache]: Analyzing trace with hash 1038255737, now seen corresponding path program 1 times [2019-11-28 03:45:02,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024835308] [2019-11-28 03:45:02,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,312 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2024835308] [2019-11-28 03:45:02,312 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,312 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,313 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1655286526] [2019-11-28 03:45:02,313 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,314 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 8 times [2019-11-28 03:45:02,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [754941036] [2019-11-28 03:45:02,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,350 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [754941036] [2019-11-28 03:45:02,350 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,350 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,350 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594909680] [2019-11-28 03:45:02,351 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,351 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,352 INFO L87 Difference]: Start difference. First operand 101 states and 160 transitions. cyclomatic complexity: 60 Second operand 3 states. [2019-11-28 03:45:02,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,362 INFO L93 Difference]: Finished difference Result 101 states and 159 transitions. [2019-11-28 03:45:02,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,363 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 159 transitions. [2019-11-28 03:45:02,365 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:02,366 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 159 transitions. [2019-11-28 03:45:02,366 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2019-11-28 03:45:02,367 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2019-11-28 03:45:02,367 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 159 transitions. [2019-11-28 03:45:02,367 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,367 INFO L688 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2019-11-28 03:45:02,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 159 transitions. [2019-11-28 03:45:02,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2019-11-28 03:45:02,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-11-28 03:45:02,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 159 transitions. [2019-11-28 03:45:02,371 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2019-11-28 03:45:02,371 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2019-11-28 03:45:02,371 INFO L424 BuchiCegarLoop]: ======== Iteration 10============ [2019-11-28 03:45:02,372 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 159 transitions. [2019-11-28 03:45:02,373 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2019-11-28 03:45:02,373 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,373 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,374 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,374 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,375 INFO L794 eck$LassoCheckResult]: Stem: 2007#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1929#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1930#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1970#L202 assume 1 == ~b0_req_up~0; 1974#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1982#L127-2 ~b0_req_up~0 := 0; 1961#L202-1 assume 1 == ~b1_req_up~0; 1947#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1937#L142-2 ~b1_req_up~0 := 0; 1938#L209 assume 1 == ~d0_req_up~0; 1994#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1992#L157-2 ~d0_req_up~0 := 0; 1966#L216 assume 1 == ~d1_req_up~0; 1964#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 1962#L172-2 ~d1_req_up~0 := 0; 1963#L223 assume !(1 == ~z_req_up~0); 1913#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 1914#L245-1 assume !(0 == ~b0_ev~0); 1997#L311-1 assume !(0 == ~b1_ev~0); 2005#L316-1 assume !(0 == ~d0_ev~0); 1921#L321-1 assume !(0 == ~d1_ev~0); 1922#L326-1 assume !(0 == ~z_ev~0); 1967#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1984#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1944#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1945#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1946#L380 assume !(0 != activate_threads_~tmp~1); 2000#L380-2 assume !(1 == ~b0_ev~0); 2001#L344-1 assume !(1 == ~b1_ev~0); 2004#L349-1 assume !(1 == ~d0_ev~0); 1917#L354-1 assume !(1 == ~d1_ev~0); 1918#L359-1 assume !(1 == ~z_ev~0); 1956#L422-1 [2019-11-28 03:45:02,375 INFO L796 eck$LassoCheckResult]: Loop: 1956#L422-1 assume !false; 1978#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1919#L285 assume !false; 1920#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1973#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1971#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1931#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1932#L280 assume !(0 != eval_~tmp___0~0); 1977#L301 start_simulation_~kernel_st~0 := 2; 1959#L202-2 assume !(1 == ~b0_req_up~0); 1957#L202-3 assume !(1 == ~b1_req_up~0); 1958#L209-1 assume !(1 == ~d0_req_up~0); 1965#L216-1 assume !(1 == ~d1_req_up~0); 1916#L223-1 assume !(1 == ~z_req_up~0); 1911#L230-1 start_simulation_~kernel_st~0 := 3; 1912#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1998#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1999#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2010#L321-3 assume !(0 == ~d1_ev~0); 1950#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1951#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1976#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1940#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1941#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1942#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1991#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1993#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2006#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1927#L354-3 assume !(1 == ~d1_ev~0); 1928#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1949#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1975#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1968#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1969#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1980#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1981#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1996#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1955#L439 assume !(0 != start_simulation_~tmp~3); 1956#L422-1 [2019-11-28 03:45:02,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,376 INFO L82 PathProgramCache]: Analyzing trace with hash 17187383, now seen corresponding path program 1 times [2019-11-28 03:45:02,376 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,376 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052954808] [2019-11-28 03:45:02,377 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052954808] [2019-11-28 03:45:02,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,401 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1567850397] [2019-11-28 03:45:02,401 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,402 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 9 times [2019-11-28 03:45:02,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285426651] [2019-11-28 03:45:02,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285426651] [2019-11-28 03:45:02,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,440 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759359328] [2019-11-28 03:45:02,440 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,440 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,441 INFO L87 Difference]: Start difference. First operand 101 states and 159 transitions. cyclomatic complexity: 59 Second operand 3 states. [2019-11-28 03:45:02,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,474 INFO L93 Difference]: Finished difference Result 116 states and 181 transitions. [2019-11-28 03:45:02,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,475 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 116 states and 181 transitions. [2019-11-28 03:45:02,476 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 79 [2019-11-28 03:45:02,478 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 116 states to 116 states and 181 transitions. [2019-11-28 03:45:02,478 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116 [2019-11-28 03:45:02,478 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116 [2019-11-28 03:45:02,479 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 181 transitions. [2019-11-28 03:45:02,479 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,479 INFO L688 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2019-11-28 03:45:02,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 181 transitions. [2019-11-28 03:45:02,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2019-11-28 03:45:02,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2019-11-28 03:45:02,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 181 transitions. [2019-11-28 03:45:02,484 INFO L711 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2019-11-28 03:45:02,484 INFO L591 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2019-11-28 03:45:02,484 INFO L424 BuchiCegarLoop]: ======== Iteration 11============ [2019-11-28 03:45:02,484 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 181 transitions. [2019-11-28 03:45:02,485 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 79 [2019-11-28 03:45:02,486 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,486 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,487 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,487 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,487 INFO L794 eck$LassoCheckResult]: Stem: 2235#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2155#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2156#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2196#L202 assume 1 == ~b0_req_up~0; 2201#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2209#L127-2 ~b0_req_up~0 := 0; 2187#L202-1 assume 1 == ~b1_req_up~0; 2173#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2165#L142-2 ~b1_req_up~0 := 0; 2166#L209 assume 1 == ~d0_req_up~0; 2221#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2219#L157-2 ~d0_req_up~0 := 0; 2192#L216 assume 1 == ~d1_req_up~0; 2190#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2188#L172-2 ~d1_req_up~0 := 0; 2189#L223 assume !(1 == ~z_req_up~0); 2139#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2140#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2224#L311-1 assume !(0 == ~b1_ev~0); 2232#L316-1 assume !(0 == ~d0_ev~0); 2150#L321-1 assume !(0 == ~d1_ev~0); 2151#L326-1 assume !(0 == ~z_ev~0); 2193#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2212#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2170#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2171#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2172#L380 assume !(0 != activate_threads_~tmp~1); 2227#L380-2 assume !(1 == ~b0_ev~0); 2228#L344-1 assume !(1 == ~b1_ev~0); 2231#L349-1 assume !(1 == ~d0_ev~0); 2143#L354-1 assume !(1 == ~d1_ev~0); 2144#L359-1 assume !(1 == ~z_ev~0); 2182#L422-1 [2019-11-28 03:45:02,488 INFO L796 eck$LassoCheckResult]: Loop: 2182#L422-1 assume !false; 2204#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2145#L285 assume !false; 2146#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2199#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2197#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2157#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 2158#L280 assume !(0 != eval_~tmp___0~0); 2203#L301 start_simulation_~kernel_st~0 := 2; 2185#L202-2 assume !(1 == ~b0_req_up~0); 2183#L202-3 assume !(1 == ~b1_req_up~0); 2184#L209-1 assume !(1 == ~d0_req_up~0); 2191#L216-1 assume !(1 == ~d1_req_up~0); 2142#L223-1 assume !(1 == ~z_req_up~0); 2137#L230-1 start_simulation_~kernel_st~0 := 3; 2138#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2225#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2226#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2238#L321-3 assume !(0 == ~d1_ev~0); 2176#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2177#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2202#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2164#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2167#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2168#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2218#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2220#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2234#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2153#L354-3 assume !(1 == ~d1_ev~0); 2154#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2175#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2200#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2194#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2195#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 2206#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2207#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 2223#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 2181#L439 assume !(0 != start_simulation_~tmp~3); 2182#L422-1 [2019-11-28 03:45:02,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,488 INFO L82 PathProgramCache]: Analyzing trace with hash 1297051061, now seen corresponding path program 1 times [2019-11-28 03:45:02,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696095645] [2019-11-28 03:45:02,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,512 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696095645] [2019-11-28 03:45:02,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,512 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1311145789] [2019-11-28 03:45:02,513 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 10 times [2019-11-28 03:45:02,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,515 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036636466] [2019-11-28 03:45:02,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,543 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1036636466] [2019-11-28 03:45:02,543 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,543 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,544 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396117291] [2019-11-28 03:45:02,544 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,544 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,545 INFO L87 Difference]: Start difference. First operand 116 states and 181 transitions. cyclomatic complexity: 66 Second operand 3 states. [2019-11-28 03:45:02,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,571 INFO L93 Difference]: Finished difference Result 141 states and 218 transitions. [2019-11-28 03:45:02,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,572 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 218 transitions. [2019-11-28 03:45:02,574 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2019-11-28 03:45:02,575 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 141 states and 218 transitions. [2019-11-28 03:45:02,575 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 141 [2019-11-28 03:45:02,575 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 141 [2019-11-28 03:45:02,576 INFO L73 IsDeterministic]: Start isDeterministic. Operand 141 states and 218 transitions. [2019-11-28 03:45:02,576 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,576 INFO L688 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2019-11-28 03:45:02,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states and 218 transitions. [2019-11-28 03:45:02,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2019-11-28 03:45:02,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2019-11-28 03:45:02,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 218 transitions. [2019-11-28 03:45:02,580 INFO L711 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2019-11-28 03:45:02,581 INFO L591 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2019-11-28 03:45:02,581 INFO L424 BuchiCegarLoop]: ======== Iteration 12============ [2019-11-28 03:45:02,581 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 141 states and 218 transitions. [2019-11-28 03:45:02,582 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2019-11-28 03:45:02,582 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,582 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,583 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,583 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,584 INFO L794 eck$LassoCheckResult]: Stem: 2504#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2421#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2422#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2465#L202 assume 1 == ~b0_req_up~0; 2470#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2478#L127-2 ~b0_req_up~0 := 0; 2456#L202-1 assume 1 == ~b1_req_up~0; 2440#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2432#L142-2 ~b1_req_up~0 := 0; 2433#L209 assume 1 == ~d0_req_up~0; 2490#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2488#L157-2 ~d0_req_up~0 := 0; 2461#L216 assume 1 == ~d1_req_up~0; 2459#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2457#L172-2 ~d1_req_up~0 := 0; 2458#L223 assume !(1 == ~z_req_up~0); 2405#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2406#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2493#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2502#L316-1 assume !(0 == ~d0_ev~0); 2416#L321-1 assume !(0 == ~d1_ev~0); 2417#L326-1 assume !(0 == ~z_ev~0); 2462#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2480#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2437#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2438#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2439#L380 assume !(0 != activate_threads_~tmp~1); 2496#L380-2 assume !(1 == ~b0_ev~0); 2497#L344-1 assume !(1 == ~b1_ev~0); 2501#L349-1 assume !(1 == ~d0_ev~0); 2409#L354-1 assume !(1 == ~d1_ev~0); 2410#L359-1 assume !(1 == ~z_ev~0); 2449#L422-1 [2019-11-28 03:45:02,584 INFO L796 eck$LassoCheckResult]: Loop: 2449#L422-1 assume !false; 2473#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2411#L285 assume !false; 2412#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2468#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2466#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2423#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 2424#L280 assume !(0 != eval_~tmp___0~0); 2472#L301 start_simulation_~kernel_st~0 := 2; 2453#L202-2 assume !(1 == ~b0_req_up~0); 2455#L202-3 assume !(1 == ~b1_req_up~0); 2528#L209-1 assume !(1 == ~d0_req_up~0); 2522#L216-1 assume !(1 == ~d1_req_up~0); 2516#L223-1 assume !(1 == ~z_req_up~0); 2513#L230-1 start_simulation_~kernel_st~0 := 3; 2512#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2510#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2495#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2507#L321-3 assume !(0 == ~d1_ev~0); 2443#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2444#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2471#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2431#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2434#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2435#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2487#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2489#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2503#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2419#L354-3 assume !(1 == ~d1_ev~0); 2420#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2442#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2469#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2463#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2464#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 2475#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2476#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 2492#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 2448#L439 assume !(0 != start_simulation_~tmp~3); 2449#L422-1 [2019-11-28 03:45:02,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,585 INFO L82 PathProgramCache]: Analyzing trace with hash -1986798985, now seen corresponding path program 1 times [2019-11-28 03:45:02,585 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,585 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415929531] [2019-11-28 03:45:02,586 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,606 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415929531] [2019-11-28 03:45:02,606 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,606 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,606 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [935844537] [2019-11-28 03:45:02,606 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,607 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 11 times [2019-11-28 03:45:02,607 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,608 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801104997] [2019-11-28 03:45:02,608 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,635 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801104997] [2019-11-28 03:45:02,635 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,636 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1148768863] [2019-11-28 03:45:02,636 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,636 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,637 INFO L87 Difference]: Start difference. First operand 141 states and 218 transitions. cyclomatic complexity: 78 Second operand 3 states. [2019-11-28 03:45:02,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,668 INFO L93 Difference]: Finished difference Result 180 states and 275 transitions. [2019-11-28 03:45:02,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,669 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 180 states and 275 transitions. [2019-11-28 03:45:02,671 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 143 [2019-11-28 03:45:02,672 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 180 states to 180 states and 275 transitions. [2019-11-28 03:45:02,673 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 180 [2019-11-28 03:45:02,673 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 180 [2019-11-28 03:45:02,673 INFO L73 IsDeterministic]: Start isDeterministic. Operand 180 states and 275 transitions. [2019-11-28 03:45:02,674 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,674 INFO L688 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2019-11-28 03:45:02,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states and 275 transitions. [2019-11-28 03:45:02,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2019-11-28 03:45:02,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2019-11-28 03:45:02,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 275 transitions. [2019-11-28 03:45:02,679 INFO L711 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2019-11-28 03:45:02,679 INFO L591 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2019-11-28 03:45:02,679 INFO L424 BuchiCegarLoop]: ======== Iteration 13============ [2019-11-28 03:45:02,679 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 180 states and 275 transitions. [2019-11-28 03:45:02,681 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 143 [2019-11-28 03:45:02,681 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,681 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,682 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,682 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,683 INFO L794 eck$LassoCheckResult]: Stem: 2835#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2751#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2752#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2794#L202 assume 1 == ~b0_req_up~0; 2799#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2807#L127-2 ~b0_req_up~0 := 0; 2785#L202-1 assume 1 == ~b1_req_up~0; 2770#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2760#L142-2 ~b1_req_up~0 := 0; 2761#L209 assume 1 == ~d0_req_up~0; 2820#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2818#L157-2 ~d0_req_up~0 := 0; 2790#L216 assume 1 == ~d1_req_up~0; 2788#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2786#L172-2 ~d1_req_up~0 := 0; 2787#L223 assume !(1 == ~z_req_up~0); 2735#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2736#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2823#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2833#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2743#L321-1 assume !(0 == ~d1_ev~0); 2744#L326-1 assume !(0 == ~z_ev~0); 2791#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2809#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2767#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2768#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2769#L380 assume !(0 != activate_threads_~tmp~1); 2826#L380-2 assume !(1 == ~b0_ev~0); 2827#L344-1 assume !(1 == ~b1_ev~0); 2832#L349-1 assume !(1 == ~d0_ev~0); 2739#L354-1 assume !(1 == ~d1_ev~0); 2740#L359-1 assume !(1 == ~z_ev~0); 2779#L422-1 [2019-11-28 03:45:02,683 INFO L796 eck$LassoCheckResult]: Loop: 2779#L422-1 assume !false; 2802#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2741#L285 assume !false; 2742#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2797#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2795#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2753#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 2754#L280 assume !(0 != eval_~tmp___0~0); 2801#L301 start_simulation_~kernel_st~0 := 2; 2782#L202-2 assume !(1 == ~b0_req_up~0); 2784#L202-3 assume !(1 == ~b1_req_up~0); 2862#L209-1 assume !(1 == ~d0_req_up~0); 2856#L216-1 assume !(1 == ~d1_req_up~0); 2850#L223-1 assume !(1 == ~z_req_up~0); 2847#L230-1 start_simulation_~kernel_st~0 := 3; 2844#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2842#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2840#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2838#L321-3 assume !(0 == ~d1_ev~0); 2773#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2774#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2800#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2763#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2764#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2765#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2817#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2819#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2834#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2749#L354-3 assume !(1 == ~d1_ev~0); 2750#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2772#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2798#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2792#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2793#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 2804#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2805#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 2822#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 2778#L439 assume !(0 != start_simulation_~tmp~3); 2779#L422-1 [2019-11-28 03:45:02,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1399992971, now seen corresponding path program 1 times [2019-11-28 03:45:02,684 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,684 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966161505] [2019-11-28 03:45:02,685 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,705 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [966161505] [2019-11-28 03:45:02,705 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,706 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,706 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896455217] [2019-11-28 03:45:02,706 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,707 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 12 times [2019-11-28 03:45:02,707 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,707 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437422555] [2019-11-28 03:45:02,707 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437422555] [2019-11-28 03:45:02,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1548865466] [2019-11-28 03:45:02,735 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,736 INFO L87 Difference]: Start difference. First operand 180 states and 275 transitions. cyclomatic complexity: 96 Second operand 3 states. [2019-11-28 03:45:02,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,761 INFO L93 Difference]: Finished difference Result 235 states and 352 transitions. [2019-11-28 03:45:02,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,761 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 235 states and 352 transitions. [2019-11-28 03:45:02,763 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 198 [2019-11-28 03:45:02,765 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 235 states to 235 states and 352 transitions. [2019-11-28 03:45:02,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 235 [2019-11-28 03:45:02,766 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 235 [2019-11-28 03:45:02,766 INFO L73 IsDeterministic]: Start isDeterministic. Operand 235 states and 352 transitions. [2019-11-28 03:45:02,767 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,767 INFO L688 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2019-11-28 03:45:02,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states and 352 transitions. [2019-11-28 03:45:02,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235. [2019-11-28 03:45:02,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2019-11-28 03:45:02,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 352 transitions. [2019-11-28 03:45:02,772 INFO L711 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2019-11-28 03:45:02,772 INFO L591 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2019-11-28 03:45:02,772 INFO L424 BuchiCegarLoop]: ======== Iteration 14============ [2019-11-28 03:45:02,773 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 235 states and 352 transitions. [2019-11-28 03:45:02,774 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 198 [2019-11-28 03:45:02,774 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,775 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,776 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,776 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,776 INFO L794 eck$LassoCheckResult]: Stem: 3265#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 3177#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 3178#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 3222#L202 assume 1 == ~b0_req_up~0; 3227#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 3235#L127-2 ~b0_req_up~0 := 0; 3212#L202-1 assume 1 == ~b1_req_up~0; 3196#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 3188#L142-2 ~b1_req_up~0 := 0; 3189#L209 assume 1 == ~d0_req_up~0; 3248#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 3246#L157-2 ~d0_req_up~0 := 0; 3218#L216 assume 1 == ~d1_req_up~0; 3215#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 3213#L172-2 ~d1_req_up~0 := 0; 3214#L223 assume !(1 == ~z_req_up~0); 3159#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 3160#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3251#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3261#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3167#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 3168#L326-1 assume !(0 == ~z_ev~0); 3219#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3237#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3193#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3194#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 3195#L380 assume !(0 != activate_threads_~tmp~1); 3254#L380-2 assume !(1 == ~b0_ev~0); 3255#L344-1 assume !(1 == ~b1_ev~0); 3260#L349-1 assume !(1 == ~d0_ev~0); 3163#L354-1 assume !(1 == ~d1_ev~0); 3164#L359-1 assume !(1 == ~z_ev~0); 3205#L422-1 [2019-11-28 03:45:02,776 INFO L796 eck$LassoCheckResult]: Loop: 3205#L422-1 assume !false; 3230#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 3165#L285 assume !false; 3166#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3225#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3223#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3179#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 3180#L280 assume !(0 != eval_~tmp___0~0); 3229#L301 start_simulation_~kernel_st~0 := 2; 3209#L202-2 assume !(1 == ~b0_req_up~0); 3211#L202-3 assume !(1 == ~b1_req_up~0); 3311#L209-1 assume !(1 == ~d0_req_up~0); 3312#L216-1 assume !(1 == ~d1_req_up~0); 3340#L223-1 assume !(1 == ~z_req_up~0); 3389#L230-1 start_simulation_~kernel_st~0 := 3; 3287#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3279#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3273#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3269#L321-3 assume !(0 == ~d1_ev~0); 3199#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 3200#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3228#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3187#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3190#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 3191#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 3242#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 3247#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 3264#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 3175#L354-3 assume !(1 == ~d1_ev~0); 3176#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 3197#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3226#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3220#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3221#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 3232#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3233#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 3250#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 3204#L439 assume !(0 != start_simulation_~tmp~3); 3205#L422-1 [2019-11-28 03:45:02,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,777 INFO L82 PathProgramCache]: Analyzing trace with hash -1658158409, now seen corresponding path program 1 times [2019-11-28 03:45:02,777 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,778 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388720445] [2019-11-28 03:45:02,778 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,798 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388720445] [2019-11-28 03:45:02,798 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,798 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1252844337] [2019-11-28 03:45:02,799 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,799 INFO L82 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 13 times [2019-11-28 03:45:02,799 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,799 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734017370] [2019-11-28 03:45:02,799 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734017370] [2019-11-28 03:45:02,845 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,845 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,845 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835244339] [2019-11-28 03:45:02,845 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,846 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,846 INFO L87 Difference]: Start difference. First operand 235 states and 352 transitions. cyclomatic complexity: 118 Second operand 3 states. [2019-11-28 03:45:02,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,877 INFO L93 Difference]: Finished difference Result 253 states and 374 transitions. [2019-11-28 03:45:02,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,877 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 253 states and 374 transitions. [2019-11-28 03:45:02,880 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 219 [2019-11-28 03:45:02,882 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 253 states to 253 states and 374 transitions. [2019-11-28 03:45:02,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 253 [2019-11-28 03:45:02,883 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 253 [2019-11-28 03:45:02,883 INFO L73 IsDeterministic]: Start isDeterministic. Operand 253 states and 374 transitions. [2019-11-28 03:45:02,884 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:02,884 INFO L688 BuchiCegarLoop]: Abstraction has 253 states and 374 transitions. [2019-11-28 03:45:02,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states and 374 transitions. [2019-11-28 03:45:02,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 253. [2019-11-28 03:45:02,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253 states. [2019-11-28 03:45:02,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253 states to 253 states and 374 transitions. [2019-11-28 03:45:02,890 INFO L711 BuchiCegarLoop]: Abstraction has 253 states and 374 transitions. [2019-11-28 03:45:02,891 INFO L591 BuchiCegarLoop]: Abstraction has 253 states and 374 transitions. [2019-11-28 03:45:02,891 INFO L424 BuchiCegarLoop]: ======== Iteration 15============ [2019-11-28 03:45:02,891 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 253 states and 374 transitions. [2019-11-28 03:45:02,893 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 219 [2019-11-28 03:45:02,893 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:02,893 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:02,894 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,894 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:02,895 INFO L794 eck$LassoCheckResult]: Stem: 3758#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 3673#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 3674#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 3716#L202 assume 1 == ~b0_req_up~0; 3721#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 3729#L127-2 ~b0_req_up~0 := 0; 3705#L202-1 assume 1 == ~b1_req_up~0; 3690#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 3684#L142-2 ~b1_req_up~0 := 0; 3685#L209 assume 1 == ~d0_req_up~0; 3741#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 3739#L157-2 ~d0_req_up~0 := 0; 3712#L216 assume 1 == ~d1_req_up~0; 3708#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 3706#L172-2 ~d1_req_up~0 := 0; 3707#L223 assume !(1 == ~z_req_up~0); 3656#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 3657#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3745#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3754#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3664#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 3665#L326-1 assume !(0 == ~z_ev~0); 3713#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3731#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3734#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3688#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 3689#L380 assume !(0 != activate_threads_~tmp~1); 3748#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 3749#L344-1 assume !(1 == ~b1_ev~0); 3753#L349-1 assume !(1 == ~d0_ev~0); 3660#L354-1 assume !(1 == ~d1_ev~0); 3661#L359-1 assume !(1 == ~z_ev~0); 3699#L422-1 [2019-11-28 03:45:02,895 INFO L796 eck$LassoCheckResult]: Loop: 3699#L422-1 assume !false; 3724#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 3662#L285 assume !false; 3663#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3719#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3717#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3675#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 3676#L280 assume !(0 != eval_~tmp___0~0); 3723#L301 start_simulation_~kernel_st~0 := 2; 3702#L202-2 assume !(1 == ~b0_req_up~0); 3704#L202-3 assume !(1 == ~b1_req_up~0); 3795#L209-1 assume !(1 == ~d0_req_up~0); 3793#L216-1 assume !(1 == ~d1_req_up~0); 3788#L223-1 assume !(1 == ~z_req_up~0); 3783#L230-1 start_simulation_~kernel_st~0 := 3; 3780#L311-2 assume !(0 == ~b0_ev~0); 3777#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3773#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3768#L321-3 assume !(0 == ~d1_ev~0); 3767#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 3766#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3765#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3733#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3686#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 3687#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 3735#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 3740#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 3757#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 3671#L354-3 assume !(1 == ~d1_ev~0); 3672#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 3691#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3720#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3714#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3715#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 3726#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3727#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 3744#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 3698#L439 assume !(0 != start_simulation_~tmp~3); 3699#L422-1 [2019-11-28 03:45:02,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,896 INFO L82 PathProgramCache]: Analyzing trace with hash -1660005451, now seen corresponding path program 1 times [2019-11-28 03:45:02,896 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,896 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [710298111] [2019-11-28 03:45:02,897 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,927 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [710298111] [2019-11-28 03:45:02,927 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,927 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:02,927 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169845482] [2019-11-28 03:45:02,928 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:02,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:02,928 INFO L82 PathProgramCache]: Analyzing trace with hash 763502474, now seen corresponding path program 1 times [2019-11-28 03:45:02,929 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:02,929 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526929525] [2019-11-28 03:45:02,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:02,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:02,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:02,961 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526929525] [2019-11-28 03:45:02,961 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:02,961 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:02,962 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [379183405] [2019-11-28 03:45:02,962 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:02,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:02,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:02,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:02,963 INFO L87 Difference]: Start difference. First operand 253 states and 374 transitions. cyclomatic complexity: 122 Second operand 3 states. [2019-11-28 03:45:02,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:02,993 INFO L93 Difference]: Finished difference Result 281 states and 413 transitions. [2019-11-28 03:45:02,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:02,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 281 states and 413 transitions. [2019-11-28 03:45:02,997 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 247 [2019-11-28 03:45:03,000 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 281 states to 281 states and 413 transitions. [2019-11-28 03:45:03,000 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 281 [2019-11-28 03:45:03,001 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 281 [2019-11-28 03:45:03,001 INFO L73 IsDeterministic]: Start isDeterministic. Operand 281 states and 413 transitions. [2019-11-28 03:45:03,002 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:03,002 INFO L688 BuchiCegarLoop]: Abstraction has 281 states and 413 transitions. [2019-11-28 03:45:03,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 281 states and 413 transitions. [2019-11-28 03:45:03,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 281 to 281. [2019-11-28 03:45:03,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281 states. [2019-11-28 03:45:03,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 413 transitions. [2019-11-28 03:45:03,009 INFO L711 BuchiCegarLoop]: Abstraction has 281 states and 413 transitions. [2019-11-28 03:45:03,009 INFO L591 BuchiCegarLoop]: Abstraction has 281 states and 413 transitions. [2019-11-28 03:45:03,010 INFO L424 BuchiCegarLoop]: ======== Iteration 16============ [2019-11-28 03:45:03,010 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 281 states and 413 transitions. [2019-11-28 03:45:03,012 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 247 [2019-11-28 03:45:03,012 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:03,012 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:03,014 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,014 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,015 INFO L794 eck$LassoCheckResult]: Stem: 4298#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 4216#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 4217#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 4258#L202 assume 1 == ~b0_req_up~0; 4263#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 4271#L127-2 ~b0_req_up~0 := 0; 4248#L202-1 assume 1 == ~b1_req_up~0; 4233#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 4227#L142-2 ~b1_req_up~0 := 0; 4228#L209 assume 1 == ~d0_req_up~0; 4283#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 4281#L157-2 ~d0_req_up~0 := 0; 4254#L216 assume 1 == ~d1_req_up~0; 4251#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 4249#L172-2 ~d1_req_up~0 := 0; 4250#L223 assume !(1 == ~z_req_up~0); 4199#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 4200#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4286#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4296#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4207#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4208#L326-1 assume !(0 == ~z_ev~0); 4255#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4273#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4276#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4231#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 4232#L380 assume !(0 != activate_threads_~tmp~1); 4289#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4290#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4295#L349-1 assume !(1 == ~d0_ev~0); 4203#L354-1 assume !(1 == ~d1_ev~0); 4204#L359-1 assume !(1 == ~z_ev~0); 4242#L422-1 [2019-11-28 03:45:03,015 INFO L796 eck$LassoCheckResult]: Loop: 4242#L422-1 assume !false; 4266#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 4205#L285 assume !false; 4206#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4261#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4259#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4218#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 4219#L280 assume !(0 != eval_~tmp___0~0); 4265#L301 start_simulation_~kernel_st~0 := 2; 4245#L202-2 assume !(1 == ~b0_req_up~0); 4247#L202-3 assume !(1 == ~b1_req_up~0); 4382#L209-1 assume !(1 == ~d0_req_up~0); 4377#L216-1 assume !(1 == ~d1_req_up~0); 4371#L223-1 assume !(1 == ~z_req_up~0); 4368#L230-1 start_simulation_~kernel_st~0 := 3; 4366#L311-2 assume !(0 == ~b0_ev~0); 4362#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4337#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4330#L321-3 assume !(0 == ~d1_ev~0); 4327#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 4324#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4322#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4275#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4229#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 4230#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4277#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4282#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4297#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4214#L354-3 assume !(1 == ~d1_ev~0); 4215#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 4234#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4262#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4256#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4257#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 4268#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4269#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 4285#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 4241#L439 assume !(0 != start_simulation_~tmp~3); 4242#L422-1 [2019-11-28 03:45:03,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,015 INFO L82 PathProgramCache]: Analyzing trace with hash -1660065033, now seen corresponding path program 1 times [2019-11-28 03:45:03,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,016 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041365324] [2019-11-28 03:45:03,016 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:03,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:03,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2041365324] [2019-11-28 03:45:03,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:03,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:03,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [545202373] [2019-11-28 03:45:03,056 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:03,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,057 INFO L82 PathProgramCache]: Analyzing trace with hash 763502474, now seen corresponding path program 2 times [2019-11-28 03:45:03,057 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533821743] [2019-11-28 03:45:03,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:03,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:03,090 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533821743] [2019-11-28 03:45:03,090 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:03,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:03,091 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45499281] [2019-11-28 03:45:03,091 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:03,091 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:03,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:03,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:03,093 INFO L87 Difference]: Start difference. First operand 281 states and 413 transitions. cyclomatic complexity: 133 Second operand 3 states. [2019-11-28 03:45:03,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:03,122 INFO L93 Difference]: Finished difference Result 323 states and 472 transitions. [2019-11-28 03:45:03,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:03,123 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 323 states and 472 transitions. [2019-11-28 03:45:03,142 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 289 [2019-11-28 03:45:03,145 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 323 states to 323 states and 472 transitions. [2019-11-28 03:45:03,145 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 323 [2019-11-28 03:45:03,146 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 323 [2019-11-28 03:45:03,146 INFO L73 IsDeterministic]: Start isDeterministic. Operand 323 states and 472 transitions. [2019-11-28 03:45:03,147 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:03,147 INFO L688 BuchiCegarLoop]: Abstraction has 323 states and 472 transitions. [2019-11-28 03:45:03,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states and 472 transitions. [2019-11-28 03:45:03,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 323. [2019-11-28 03:45:03,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2019-11-28 03:45:03,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 472 transitions. [2019-11-28 03:45:03,153 INFO L711 BuchiCegarLoop]: Abstraction has 323 states and 472 transitions. [2019-11-28 03:45:03,154 INFO L591 BuchiCegarLoop]: Abstraction has 323 states and 472 transitions. [2019-11-28 03:45:03,154 INFO L424 BuchiCegarLoop]: ======== Iteration 17============ [2019-11-28 03:45:03,154 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 323 states and 472 transitions. [2019-11-28 03:45:03,156 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 289 [2019-11-28 03:45:03,156 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:03,156 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:03,157 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,158 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,158 INFO L794 eck$LassoCheckResult]: Stem: 4916#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 4829#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 4830#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 4870#L202 assume 1 == ~b0_req_up~0; 4875#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 4884#L127-2 ~b0_req_up~0 := 0; 4861#L202-1 assume 1 == ~b1_req_up~0; 4846#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 4840#L142-2 ~b1_req_up~0 := 0; 4841#L209 assume 1 == ~d0_req_up~0; 4898#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 4896#L157-2 ~d0_req_up~0 := 0; 4866#L216 assume 1 == ~d1_req_up~0; 4864#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 4862#L172-2 ~d1_req_up~0 := 0; 4863#L223 assume !(1 == ~z_req_up~0); 4812#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 4813#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4901#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4913#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4820#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4821#L326-1 assume !(0 == ~z_ev~0); 4867#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4887#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4891#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4844#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 4845#L380 assume !(0 != activate_threads_~tmp~1); 4904#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4907#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4912#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4816#L354-1 assume !(1 == ~d1_ev~0); 4817#L359-1 assume !(1 == ~z_ev~0); 4855#L422-1 [2019-11-28 03:45:03,158 INFO L796 eck$LassoCheckResult]: Loop: 4855#L422-1 assume !false; 4879#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 4818#L285 assume !false; 4819#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4873#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4871#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4831#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 4832#L280 assume !(0 != eval_~tmp___0~0); 4878#L301 start_simulation_~kernel_st~0 := 2; 4858#L202-2 assume !(1 == ~b0_req_up~0); 4860#L202-3 assume !(1 == ~b1_req_up~0); 5001#L209-1 assume !(1 == ~d0_req_up~0); 4997#L216-1 assume !(1 == ~d1_req_up~0); 4998#L223-1 assume !(1 == ~z_req_up~0); 5051#L230-1 start_simulation_~kernel_st~0 := 3; 5049#L311-2 assume !(0 == ~b0_ev~0); 5042#L311-4 assume !(0 == ~b1_ev~0); 5038#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5031#L321-3 assume !(0 == ~d1_ev~0); 5028#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 5026#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5024#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4954#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4953#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 4951#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4948#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4947#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4915#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4827#L354-3 assume !(1 == ~d1_ev~0); 4828#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 4847#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4874#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4868#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4869#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 4881#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4882#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 4900#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 4854#L439 assume !(0 != start_simulation_~tmp~3); 4855#L422-1 [2019-11-28 03:45:03,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,159 INFO L82 PathProgramCache]: Analyzing trace with hash -1660066955, now seen corresponding path program 1 times [2019-11-28 03:45:03,159 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,160 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866308929] [2019-11-28 03:45:03,160 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:03,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:03,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866308929] [2019-11-28 03:45:03,179 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:03,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:03,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967525731] [2019-11-28 03:45:03,180 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:03,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,180 INFO L82 PathProgramCache]: Analyzing trace with hash 982357192, now seen corresponding path program 1 times [2019-11-28 03:45:03,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,181 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [350378336] [2019-11-28 03:45:03,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:03,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:03,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [350378336] [2019-11-28 03:45:03,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:03,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:03,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [123117508] [2019-11-28 03:45:03,203 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:03,204 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:03,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:03,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:03,205 INFO L87 Difference]: Start difference. First operand 323 states and 472 transitions. cyclomatic complexity: 150 Second operand 3 states. [2019-11-28 03:45:03,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:03,228 INFO L93 Difference]: Finished difference Result 393 states and 571 transitions. [2019-11-28 03:45:03,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:03,229 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 393 states and 571 transitions. [2019-11-28 03:45:03,232 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 359 [2019-11-28 03:45:03,235 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 393 states to 393 states and 571 transitions. [2019-11-28 03:45:03,235 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 393 [2019-11-28 03:45:03,236 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 393 [2019-11-28 03:45:03,236 INFO L73 IsDeterministic]: Start isDeterministic. Operand 393 states and 571 transitions. [2019-11-28 03:45:03,237 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:03,237 INFO L688 BuchiCegarLoop]: Abstraction has 393 states and 571 transitions. [2019-11-28 03:45:03,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states and 571 transitions. [2019-11-28 03:45:03,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2019-11-28 03:45:03,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 393 states. [2019-11-28 03:45:03,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 571 transitions. [2019-11-28 03:45:03,245 INFO L711 BuchiCegarLoop]: Abstraction has 393 states and 571 transitions. [2019-11-28 03:45:03,245 INFO L591 BuchiCegarLoop]: Abstraction has 393 states and 571 transitions. [2019-11-28 03:45:03,245 INFO L424 BuchiCegarLoop]: ======== Iteration 18============ [2019-11-28 03:45:03,245 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 393 states and 571 transitions. [2019-11-28 03:45:03,248 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 359 [2019-11-28 03:45:03,248 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:03,248 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:03,249 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,249 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,250 INFO L794 eck$LassoCheckResult]: Stem: 5639#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 5554#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 5555#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 5594#L202 assume 1 == ~b0_req_up~0; 5598#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 5607#L127-2 ~b0_req_up~0 := 0; 5585#L202-1 assume 1 == ~b1_req_up~0; 5571#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 5563#L142-2 ~b1_req_up~0 := 0; 5564#L209 assume 1 == ~d0_req_up~0; 5621#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 5619#L157-2 ~d0_req_up~0 := 0; 5590#L216 assume 1 == ~d1_req_up~0; 5588#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 5586#L172-2 ~d1_req_up~0 := 0; 5587#L223 assume !(1 == ~z_req_up~0); 5537#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 5538#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 5624#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 5636#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5545#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 5546#L326-1 assume !(0 == ~z_ev~0); 5591#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5610#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5614#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5569#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 5570#L380 assume !(0 != activate_threads_~tmp~1); 5627#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5629#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5635#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5541#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 5542#L359-1 assume !(1 == ~z_ev~0); 5580#L422-1 [2019-11-28 03:45:03,250 INFO L796 eck$LassoCheckResult]: Loop: 5580#L422-1 assume !false; 5602#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 5543#L285 assume !false; 5544#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5597#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5595#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5556#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 5557#L280 assume !(0 != eval_~tmp___0~0); 5601#L301 start_simulation_~kernel_st~0 := 2; 5583#L202-2 assume !(1 == ~b0_req_up~0); 5581#L202-3 assume !(1 == ~b1_req_up~0); 5582#L209-1 assume !(1 == ~d0_req_up~0); 5697#L216-1 assume !(1 == ~d1_req_up~0); 5694#L223-1 assume !(1 == ~z_req_up~0); 5690#L230-1 start_simulation_~kernel_st~0 := 3; 5687#L311-2 assume !(0 == ~b0_ev~0); 5684#L311-4 assume !(0 == ~b1_ev~0); 5680#L316-3 assume !(0 == ~d0_ev~0); 5677#L321-3 assume !(0 == ~d1_ev~0); 5676#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 5674#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5672#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5664#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5662#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 5660#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5657#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5654#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5650#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5643#L354-3 assume !(1 == ~d1_ev~0); 5553#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 5573#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5599#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5592#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5593#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 5604#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5605#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 5623#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 5579#L439 assume !(0 != start_simulation_~tmp~3); 5580#L422-1 [2019-11-28 03:45:03,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,251 INFO L82 PathProgramCache]: Analyzing trace with hash -1660067017, now seen corresponding path program 1 times [2019-11-28 03:45:03,251 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,251 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014421037] [2019-11-28 03:45:03,251 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:03,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:03,281 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014421037] [2019-11-28 03:45:03,281 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:03,281 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:03,281 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435799237] [2019-11-28 03:45:03,282 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:03,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,282 INFO L82 PathProgramCache]: Analyzing trace with hash 1405059018, now seen corresponding path program 1 times [2019-11-28 03:45:03,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1031344927] [2019-11-28 03:45:03,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:03,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:03,307 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1031344927] [2019-11-28 03:45:03,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:03,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:03,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1658316724] [2019-11-28 03:45:03,308 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:03,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:03,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 03:45:03,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 03:45:03,309 INFO L87 Difference]: Start difference. First operand 393 states and 571 transitions. cyclomatic complexity: 179 Second operand 5 states. [2019-11-28 03:45:03,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:03,362 INFO L93 Difference]: Finished difference Result 647 states and 939 transitions. [2019-11-28 03:45:03,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 03:45:03,363 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 647 states and 939 transitions. [2019-11-28 03:45:03,367 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 613 [2019-11-28 03:45:03,371 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 647 states to 647 states and 939 transitions. [2019-11-28 03:45:03,372 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 647 [2019-11-28 03:45:03,373 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 647 [2019-11-28 03:45:03,373 INFO L73 IsDeterministic]: Start isDeterministic. Operand 647 states and 939 transitions. [2019-11-28 03:45:03,374 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:03,374 INFO L688 BuchiCegarLoop]: Abstraction has 647 states and 939 transitions. [2019-11-28 03:45:03,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 647 states and 939 transitions. [2019-11-28 03:45:03,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 647 to 393. [2019-11-28 03:45:03,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 393 states. [2019-11-28 03:45:03,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 555 transitions. [2019-11-28 03:45:03,383 INFO L711 BuchiCegarLoop]: Abstraction has 393 states and 555 transitions. [2019-11-28 03:45:03,383 INFO L591 BuchiCegarLoop]: Abstraction has 393 states and 555 transitions. [2019-11-28 03:45:03,383 INFO L424 BuchiCegarLoop]: ======== Iteration 19============ [2019-11-28 03:45:03,383 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 393 states and 555 transitions. [2019-11-28 03:45:03,385 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 359 [2019-11-28 03:45:03,386 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:03,386 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:03,387 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,387 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,388 INFO L794 eck$LassoCheckResult]: Stem: 6698#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 6610#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 6611#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 6652#L202 assume 1 == ~b0_req_up~0; 6657#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 6665#L127-2 ~b0_req_up~0 := 0; 6642#L202-1 assume 1 == ~b1_req_up~0; 6627#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 6621#L142-2 ~b1_req_up~0 := 0; 6622#L209 assume 1 == ~d0_req_up~0; 6680#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 6677#L157-2 ~d0_req_up~0 := 0; 6648#L216 assume 1 == ~d1_req_up~0; 6645#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 6643#L172-2 ~d1_req_up~0 := 0; 6644#L223 assume !(1 == ~z_req_up~0); 6592#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 6593#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 6683#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 6693#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 6603#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 6604#L326-1 assume !(0 == ~z_ev~0); 6649#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 6668#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 6672#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6625#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 6626#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 6686#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 6688#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 6692#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6596#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 6597#L359-1 assume !(1 == ~z_ev~0); 6636#L422-1 [2019-11-28 03:45:03,388 INFO L796 eck$LassoCheckResult]: Loop: 6636#L422-1 assume !false; 6660#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 6598#L285 assume !false; 6599#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6655#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6653#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6612#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 6613#L280 assume !(0 != eval_~tmp___0~0); 6659#L301 start_simulation_~kernel_st~0 := 2; 6639#L202-2 assume !(1 == ~b0_req_up~0); 6641#L202-3 assume !(1 == ~b1_req_up~0); 6818#L209-1 assume !(1 == ~d0_req_up~0); 6813#L216-1 assume !(1 == ~d1_req_up~0); 6809#L223-1 assume !(1 == ~z_req_up~0); 6806#L230-1 start_simulation_~kernel_st~0 := 3; 6803#L311-2 assume !(0 == ~b0_ev~0); 6800#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 6801#L316-3 assume !(0 == ~d0_ev~0); 6805#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 6787#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 6733#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 6727#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 6728#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6735#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 6731#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 6718#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 6711#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 6710#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6608#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 6609#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 6628#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6656#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6650#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6651#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 6662#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 6663#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 6682#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 6635#L439 assume !(0 != start_simulation_~tmp~3); 6636#L422-1 [2019-11-28 03:45:03,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,388 INFO L82 PathProgramCache]: Analyzing trace with hash -1717325319, now seen corresponding path program 1 times [2019-11-28 03:45:03,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,389 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955090559] [2019-11-28 03:45:03,389 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:03,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:03,427 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:03,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,428 INFO L82 PathProgramCache]: Analyzing trace with hash -1898087536, now seen corresponding path program 1 times [2019-11-28 03:45:03,428 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1827280937] [2019-11-28 03:45:03,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:03,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:03,450 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1827280937] [2019-11-28 03:45:03,450 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:03,451 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 03:45:03,451 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639482254] [2019-11-28 03:45:03,451 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:03,451 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:03,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 03:45:03,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 03:45:03,452 INFO L87 Difference]: Start difference. First operand 393 states and 555 transitions. cyclomatic complexity: 163 Second operand 5 states. [2019-11-28 03:45:03,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:03,516 INFO L93 Difference]: Finished difference Result 426 states and 602 transitions. [2019-11-28 03:45:03,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 03:45:03,517 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 602 transitions. [2019-11-28 03:45:03,520 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 392 [2019-11-28 03:45:03,523 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 426 states and 602 transitions. [2019-11-28 03:45:03,523 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 426 [2019-11-28 03:45:03,524 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 426 [2019-11-28 03:45:03,524 INFO L73 IsDeterministic]: Start isDeterministic. Operand 426 states and 602 transitions. [2019-11-28 03:45:03,525 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2019-11-28 03:45:03,525 INFO L688 BuchiCegarLoop]: Abstraction has 426 states and 602 transitions. [2019-11-28 03:45:03,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states and 602 transitions. [2019-11-28 03:45:03,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 396. [2019-11-28 03:45:03,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 396 states. [2019-11-28 03:45:03,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 558 transitions. [2019-11-28 03:45:03,534 INFO L711 BuchiCegarLoop]: Abstraction has 396 states and 558 transitions. [2019-11-28 03:45:03,535 INFO L591 BuchiCegarLoop]: Abstraction has 396 states and 558 transitions. [2019-11-28 03:45:03,535 INFO L424 BuchiCegarLoop]: ======== Iteration 20============ [2019-11-28 03:45:03,535 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 396 states and 558 transitions. [2019-11-28 03:45:03,538 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 362 [2019-11-28 03:45:03,538 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:03,538 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:03,539 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,539 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:03,540 INFO L794 eck$LassoCheckResult]: Stem: 7529#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 7444#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 7445#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 7485#L202 assume 1 == ~b0_req_up~0; 7491#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 7499#L127-2 ~b0_req_up~0 := 0; 7476#L202-1 assume 1 == ~b1_req_up~0; 7461#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 7455#L142-2 ~b1_req_up~0 := 0; 7456#L209 assume 1 == ~d0_req_up~0; 7514#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 7512#L157-2 ~d0_req_up~0 := 0; 7481#L216 assume 1 == ~d1_req_up~0; 7479#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 7477#L172-2 ~d1_req_up~0 := 0; 7478#L223 assume !(1 == ~z_req_up~0); 7427#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 7428#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 7517#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 7526#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 7435#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 7436#L326-1 assume !(0 == ~z_ev~0); 7482#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7502#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7507#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 7459#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 7460#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7520#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7521#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7525#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 7431#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 7432#L359-1 assume !(1 == ~z_ev~0); 7470#L422-1 [2019-11-28 03:45:03,540 INFO L796 eck$LassoCheckResult]: Loop: 7470#L422-1 assume !false; 7494#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 7433#L285 assume !false; 7434#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7489#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 7486#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 7487#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 7543#L280 assume !(0 != eval_~tmp___0~0); 7493#L301 start_simulation_~kernel_st~0 := 2; 7473#L202-2 assume !(1 == ~b0_req_up~0); 7475#L202-3 assume !(1 == ~b1_req_up~0); 7664#L209-1 assume !(1 == ~d0_req_up~0); 7660#L216-1 assume !(1 == ~d1_req_up~0); 7661#L223-1 assume !(1 == ~z_req_up~0); 7668#L230-1 start_simulation_~kernel_st~0 := 3; 7623#L311-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 7624#L311-4 assume !(0 == ~b1_ev~0); 7719#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 7718#L321-3 assume !(0 == ~d1_ev~0); 7716#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 7713#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7589#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7587#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 7585#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 7581#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7553#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7547#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7544#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 7542#L354-3 assume !(1 == ~d1_ev~0); 7443#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 7462#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7490#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 7483#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 7484#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 7496#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 7497#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 7516#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 7469#L439 assume !(0 != start_simulation_~tmp~3); 7470#L422-1 [2019-11-28 03:45:03,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,540 INFO L82 PathProgramCache]: Analyzing trace with hash -1717325319, now seen corresponding path program 2 times [2019-11-28 03:45:03,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,541 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156773013] [2019-11-28 03:45:03,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:03,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:03,564 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:03,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,565 INFO L82 PathProgramCache]: Analyzing trace with hash 543812228, now seen corresponding path program 1 times [2019-11-28 03:45:03,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,566 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572092368] [2019-11-28 03:45:03,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:03,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:03,595 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:03,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:03,595 INFO L82 PathProgramCache]: Analyzing trace with hash -877632900, now seen corresponding path program 1 times [2019-11-28 03:45:03,595 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:03,596 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1850224383] [2019-11-28 03:45:03,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:03,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:03,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:03,634 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1850224383] [2019-11-28 03:45:03,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:03,634 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:03,634 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474501635] [2019-11-28 03:45:03,889 WARN L192 SmtUtils]: Spent 247.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 82 [2019-11-28 03:45:04,001 INFO L210 LassoAnalysis]: Preferences: [2019-11-28 03:45:04,002 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-11-28 03:45:04,002 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-11-28 03:45:04,002 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-11-28 03:45:04,002 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2019-11-28 03:45:04,003 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:04,003 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-11-28 03:45:04,003 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-11-28 03:45:04,003 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration20_Loop [2019-11-28 03:45:04,004 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-11-28 03:45:04,004 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-11-28 03:45:04,037 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,047 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,050 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,056 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,062 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,064 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,068 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,071 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,075 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,077 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,083 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,086 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,089 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,098 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,101 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,109 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,111 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,116 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,118 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,124 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,129 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,132 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,134 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,442 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-11-28 03:45:04,443 INFO L404 LassoAnalysis]: Checking for nontermination... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:04,457 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-11-28 03:45:04,457 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-11-28 03:45:04,469 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2019-11-28 03:45:04,469 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~d1_ev~0=3} Honda state: {~d1_ev~0=3} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:04,482 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-11-28 03:45:04,482 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-11-28 03:45:04,490 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2019-11-28 03:45:04,490 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_stop_simulation_~__retres2~0=0} Honda state: {ULTIMATE.start_stop_simulation_~__retres2~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:04,503 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-11-28 03:45:04,504 INFO L160 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:04,567 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2019-11-28 03:45:04,567 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-11-28 03:45:04,584 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2019-11-28 03:45:04,587 INFO L210 LassoAnalysis]: Preferences: [2019-11-28 03:45:04,587 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-11-28 03:45:04,587 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-11-28 03:45:04,588 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-11-28 03:45:04,588 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2019-11-28 03:45:04,588 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:04,588 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-11-28 03:45:04,588 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-11-28 03:45:04,588 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration20_Loop [2019-11-28 03:45:04,589 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-11-28 03:45:04,589 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-11-28 03:45:04,592 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,624 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,675 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,678 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,687 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,693 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,699 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,703 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,706 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,710 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,714 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,717 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,721 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,731 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,739 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,742 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,744 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,749 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,751 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,754 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,759 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,761 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:04,763 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:05,016 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-11-28 03:45:05,022 INFO L489 LassoAnalysis]: Using template 'affine'. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:05,037 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-11-28 03:45:05,039 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-11-28 03:45:05,039 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-11-28 03:45:05,040 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-11-28 03:45:05,040 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-11-28 03:45:05,040 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-11-28 03:45:05,042 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-11-28 03:45:05,042 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-11-28 03:45:05,045 INFO L522 LassoAnalysis]: Proving termination failed for this template and these settings. [MP z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Exception during sending of exit command (exit): Broken pipe No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:05,051 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-11-28 03:45:05,052 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-11-28 03:45:05,053 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-11-28 03:45:05,053 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-11-28 03:45:05,053 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2019-11-28 03:45:05,053 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-11-28 03:45:05,054 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2019-11-28 03:45:05,054 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-11-28 03:45:05,056 INFO L522 LassoAnalysis]: Proving termination failed for this template and these settings. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:05,066 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-11-28 03:45:05,069 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-11-28 03:45:05,069 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-11-28 03:45:05,069 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-11-28 03:45:05,069 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-11-28 03:45:05,069 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-11-28 03:45:05,070 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-11-28 03:45:05,070 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-11-28 03:45:05,073 INFO L522 LassoAnalysis]: Proving termination failed for this template and these settings. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2019-11-28 03:45:05,089 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-11-28 03:45:05,090 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-11-28 03:45:05,091 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-11-28 03:45:05,091 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-11-28 03:45:05,091 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-11-28 03:45:05,091 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-11-28 03:45:05,093 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-11-28 03:45:05,093 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:05,098 INFO L522 LassoAnalysis]: Proving termination failed for this template and these settings. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:05,120 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-11-28 03:45:05,122 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-11-28 03:45:05,122 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-11-28 03:45:05,123 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-11-28 03:45:05,123 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-11-28 03:45:05,123 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-11-28 03:45:05,125 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-11-28 03:45:05,126 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-11-28 03:45:05,129 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2019-11-28 03:45:05,140 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2019-11-28 03:45:05,140 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:05,149 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2019-11-28 03:45:05,150 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2019-11-28 03:45:05,150 INFO L510 LassoAnalysis]: Proved termination. [2019-11-28 03:45:05,151 INFO L512 LassoAnalysis]: Termination argument consisting of: Ranking function f(~b0_ev~0) = -1*~b0_ev~0 + 1 Supporting invariants [] [2019-11-28 03:45:05,155 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2019-11-28 03:45:05,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:05,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:05,272 INFO L255 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 2 conjunts are in the unsatisfiable core [2019-11-28 03:45:05,281 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-28 03:45:05,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:05,319 INFO L255 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 4 conjunts are in the unsatisfiable core [2019-11-28 03:45:05,321 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-28 03:45:05,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:05,372 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2019-11-28 03:45:05,373 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 396 states and 558 transitions. cyclomatic complexity: 163 Second operand 5 states. [2019-11-28 03:45:05,508 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 396 states and 558 transitions. cyclomatic complexity: 163. Second operand 5 states. Result 1350 states and 1928 transitions. Complement of second has 5 states. [2019-11-28 03:45:05,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2019-11-28 03:45:05,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2019-11-28 03:45:05,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 252 transitions. [2019-11-28 03:45:05,513 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 252 transitions. Stem has 32 letters. Loop has 38 letters. [2019-11-28 03:45:05,516 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-11-28 03:45:05,516 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 252 transitions. Stem has 70 letters. Loop has 38 letters. [2019-11-28 03:45:05,520 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-11-28 03:45:05,520 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 252 transitions. Stem has 32 letters. Loop has 76 letters. [2019-11-28 03:45:05,522 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-11-28 03:45:05,522 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1350 states and 1928 transitions. [2019-11-28 03:45:05,536 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 937 [2019-11-28 03:45:05,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1350 states to 1278 states and 1828 transitions. [2019-11-28 03:45:05,545 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 972 [2019-11-28 03:45:05,546 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 977 [2019-11-28 03:45:05,546 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1278 states and 1828 transitions. [2019-11-28 03:45:05,548 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-11-28 03:45:05,548 INFO L688 BuchiCegarLoop]: Abstraction has 1278 states and 1828 transitions. [2019-11-28 03:45:05,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1278 states and 1828 transitions. [2019-11-28 03:45:05,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1278 to 911. [2019-11-28 03:45:05,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 911 states. [2019-11-28 03:45:05,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 911 states to 911 states and 1301 transitions. [2019-11-28 03:45:05,594 INFO L711 BuchiCegarLoop]: Abstraction has 911 states and 1301 transitions. [2019-11-28 03:45:05,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:05,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:05,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:05,595 INFO L87 Difference]: Start difference. First operand 911 states and 1301 transitions. Second operand 3 states. [2019-11-28 03:45:05,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:05,621 INFO L93 Difference]: Finished difference Result 969 states and 1379 transitions. [2019-11-28 03:45:05,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:05,622 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 969 states and 1379 transitions. [2019-11-28 03:45:05,629 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 613 [2019-11-28 03:45:05,635 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 969 states to 969 states and 1379 transitions. [2019-11-28 03:45:05,635 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 648 [2019-11-28 03:45:05,636 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 648 [2019-11-28 03:45:05,636 INFO L73 IsDeterministic]: Start isDeterministic. Operand 969 states and 1379 transitions. [2019-11-28 03:45:05,636 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-11-28 03:45:05,636 INFO L688 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2019-11-28 03:45:05,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states and 1379 transitions. [2019-11-28 03:45:05,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 969. [2019-11-28 03:45:05,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 969 states. [2019-11-28 03:45:05,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1379 transitions. [2019-11-28 03:45:05,654 INFO L711 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2019-11-28 03:45:05,654 INFO L591 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2019-11-28 03:45:05,655 INFO L424 BuchiCegarLoop]: ======== Iteration 21============ [2019-11-28 03:45:05,655 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 969 states and 1379 transitions. [2019-11-28 03:45:05,660 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 613 [2019-11-28 03:45:05,661 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:05,661 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:05,662 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:05,662 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:05,662 INFO L794 eck$LassoCheckResult]: Stem: 11480#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 11317#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 11318#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 11392#L202 assume 1 == ~b0_req_up~0; 11402#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 11422#L127-2 ~b0_req_up~0 := 0; 11375#L202-1 assume 1 == ~b1_req_up~0; 11345#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 11333#L142-2 ~b1_req_up~0 := 0; 11334#L209 assume 1 == ~d0_req_up~0; 11450#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 11446#L157-2 ~d0_req_up~0 := 0; 11386#L216 assume 1 == ~d1_req_up~0; 11378#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 11376#L172-2 ~d1_req_up~0 := 0; 11377#L223 assume !(1 == ~z_req_up~0); 11288#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 11289#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 11457#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 11472#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 11300#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 11301#L326-1 assume !(0 == ~z_ev~0); 11387#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 11427#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 11435#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 11343#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 11344#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 11462#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 11465#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 11471#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 11294#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 11295#L359-1 assume 1 == ~z_ev~0;~z_ev~0 := 2; 11384#L422-1 [2019-11-28 03:45:05,663 INFO L796 eck$LassoCheckResult]: Loop: 11384#L422-1 assume !false; 11413#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 11296#L285 assume !false; 11297#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11512#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 11513#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11527#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 11528#L280 assume 0 != eval_~tmp___0~0; 11509#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 11510#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 11428#L42 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 11324#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 11396#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 11876#L63-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 11445#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 11360#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 11868#L285 assume !false; 11867#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11866#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 11865#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11864#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 11862#L280 assume !(0 != eval_~tmp___0~0); 11861#L301 start_simulation_~kernel_st~0 := 2; 11370#L202-2 assume !(1 == ~b0_req_up~0); 11372#L202-3 assume !(1 == ~b1_req_up~0); 11853#L209-1 assume !(1 == ~d0_req_up~0); 11840#L216-1 assume !(1 == ~d1_req_up~0); 11834#L223-1 assume !(1 == ~z_req_up~0); 11831#L230-1 start_simulation_~kernel_st~0 := 3; 11828#L311-2 assume !(0 == ~b0_ev~0); 11824#L311-4 assume !(0 == ~b1_ev~0); 11820#L316-3 assume !(0 == ~d0_ev~0); 11816#L321-3 assume !(0 == ~d1_ev~0); 11814#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 11812#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 11809#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 11810#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 12002#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 12000#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 11996#L380-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 11784#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 11783#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 11766#L354-3 assume !(1 == ~d1_ev~0); 11767#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 11759#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11760#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 11388#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11389#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 11417#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 11418#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 11751#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 11752#L439 assume !(0 != start_simulation_~tmp~3); 11384#L422-1 [2019-11-28 03:45:05,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:05,663 INFO L82 PathProgramCache]: Analyzing trace with hash -1717325321, now seen corresponding path program 1 times [2019-11-28 03:45:05,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:05,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427673153] [2019-11-28 03:45:05,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:05,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:05,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:05,706 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427673153] [2019-11-28 03:45:05,707 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:05,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 03:45:05,707 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980276270] [2019-11-28 03:45:05,707 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-11-28 03:45:05,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:05,708 INFO L82 PathProgramCache]: Analyzing trace with hash -696899428, now seen corresponding path program 1 times [2019-11-28 03:45:05,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:05,708 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294766623] [2019-11-28 03:45:05,708 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:05,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:05,735 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:05,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294766623] [2019-11-28 03:45:05,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:05,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 03:45:05,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203379941] [2019-11-28 03:45:05,736 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:05,736 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:05,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:05,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:05,737 INFO L87 Difference]: Start difference. First operand 969 states and 1379 transitions. cyclomatic complexity: 413 Second operand 3 states. [2019-11-28 03:45:05,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:05,777 INFO L93 Difference]: Finished difference Result 1921 states and 2691 transitions. [2019-11-28 03:45:05,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:05,778 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1921 states and 2691 transitions. [2019-11-28 03:45:05,793 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1226 [2019-11-28 03:45:05,806 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1921 states to 1921 states and 2691 transitions. [2019-11-28 03:45:05,806 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1279 [2019-11-28 03:45:05,808 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1279 [2019-11-28 03:45:05,808 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1921 states and 2691 transitions. [2019-11-28 03:45:05,808 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-11-28 03:45:05,808 INFO L688 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2019-11-28 03:45:05,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1921 states and 2691 transitions. [2019-11-28 03:45:05,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1921 to 1921. [2019-11-28 03:45:05,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1921 states. [2019-11-28 03:45:05,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1921 states to 1921 states and 2691 transitions. [2019-11-28 03:45:05,843 INFO L711 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2019-11-28 03:45:05,843 INFO L591 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2019-11-28 03:45:05,843 INFO L424 BuchiCegarLoop]: ======== Iteration 22============ [2019-11-28 03:45:05,843 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1921 states and 2691 transitions. [2019-11-28 03:45:05,852 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1226 [2019-11-28 03:45:05,852 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:05,852 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:05,853 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:05,853 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:05,854 INFO L794 eck$LassoCheckResult]: Stem: 14381#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 14216#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 14217#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 14292#L202 assume 1 == ~b0_req_up~0; 14305#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 14323#L127-2 ~b0_req_up~0 := 0; 14276#L202-1 assume 1 == ~b1_req_up~0; 14244#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 14236#L142-2 ~b1_req_up~0 := 0; 14237#L209 assume 1 == ~d0_req_up~0; 14350#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 14345#L157-2 ~d0_req_up~0 := 0; 14286#L216 assume 1 == ~d1_req_up~0; 14279#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 14277#L172-2 ~d1_req_up~0 := 0; 14278#L223 assume !(1 == ~z_req_up~0); 14186#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 14187#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 14358#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 14375#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 14198#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 14199#L326-1 assume !(0 == ~z_ev~0); 14287#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 14601#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 14600#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 14599#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 14598#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 14597#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 14596#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 14595#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 14594#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 14593#L359-1 assume !(1 == ~z_ev~0); 14583#L422-1 assume !false; 14584#L423 [2019-11-28 03:45:05,854 INFO L796 eck$LassoCheckResult]: Loop: 14584#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 15355#L285 assume !false; 15364#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 15362#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 15321#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 15361#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 15359#L280 assume 0 != eval_~tmp___0~0; 15357#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 15328#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 15351#L42 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 15345#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 15341#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 15339#L63-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 15336#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 15326#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 15324#L285 assume !false; 15323#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 15320#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 15319#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 15317#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 15315#L280 assume !(0 != eval_~tmp___0~0); 15313#L301 start_simulation_~kernel_st~0 := 2; 15311#L202-2 assume !(1 == ~b0_req_up~0); 15312#L202-3 assume !(1 == ~b1_req_up~0); 15439#L209-1 assume !(1 == ~d0_req_up~0); 15436#L216-1 assume !(1 == ~d1_req_up~0); 15398#L223-1 assume !(1 == ~z_req_up~0); 15395#L230-1 start_simulation_~kernel_st~0 := 3; 15392#L311-2 assume !(0 == ~b0_ev~0); 15389#L311-4 assume !(0 == ~b1_ev~0); 15387#L316-3 assume !(0 == ~d0_ev~0); 15384#L321-3 assume !(0 == ~d1_ev~0); 15383#L326-3 assume !(0 == ~z_ev~0); 15381#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 15379#L97-1 assume !(1 == ~b0_ev~0); 15376#L101-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 15377#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 15499#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 15498#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 15497#L380-5 assume !(1 == ~b0_ev~0); 15492#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 15490#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 15393#L354-3 assume !(1 == ~d1_ev~0); 15391#L359-3 assume !(1 == ~z_ev~0); 14977#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 15386#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 15348#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 15382#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 15380#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 15378#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 15375#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 15372#L439 assume !(0 != start_simulation_~tmp~3); 15369#L422-1 assume !false; 14584#L423 [2019-11-28 03:45:05,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:05,854 INFO L82 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 1 times [2019-11-28 03:45:05,855 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:05,855 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745447724] [2019-11-28 03:45:05,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:05,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:05,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:05,873 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:05,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:05,873 INFO L82 PathProgramCache]: Analyzing trace with hash 100562712, now seen corresponding path program 1 times [2019-11-28 03:45:05,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:05,874 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195945103] [2019-11-28 03:45:05,874 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:05,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:05,893 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:05,893 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195945103] [2019-11-28 03:45:05,893 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:05,893 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 03:45:05,894 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1682814192] [2019-11-28 03:45:05,894 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:05,894 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:05,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 03:45:05,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 03:45:05,894 INFO L87 Difference]: Start difference. First operand 1921 states and 2691 transitions. cyclomatic complexity: 773 Second operand 4 states. [2019-11-28 03:45:05,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:05,950 INFO L93 Difference]: Finished difference Result 5567 states and 7751 transitions. [2019-11-28 03:45:05,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 03:45:05,950 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5567 states and 7751 transitions. [2019-11-28 03:45:05,991 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3618 [2019-11-28 03:45:06,031 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5567 states to 5567 states and 7751 transitions. [2019-11-28 03:45:06,031 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3671 [2019-11-28 03:45:06,035 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3671 [2019-11-28 03:45:06,036 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5567 states and 7751 transitions. [2019-11-28 03:45:06,042 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-11-28 03:45:06,042 INFO L688 BuchiCegarLoop]: Abstraction has 5567 states and 7751 transitions. [2019-11-28 03:45:06,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5567 states and 7751 transitions. [2019-11-28 03:45:06,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5567 to 1939. [2019-11-28 03:45:06,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1939 states. [2019-11-28 03:45:06,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1939 states to 1939 states and 2709 transitions. [2019-11-28 03:45:06,098 INFO L711 BuchiCegarLoop]: Abstraction has 1939 states and 2709 transitions. [2019-11-28 03:45:06,098 INFO L591 BuchiCegarLoop]: Abstraction has 1939 states and 2709 transitions. [2019-11-28 03:45:06,098 INFO L424 BuchiCegarLoop]: ======== Iteration 23============ [2019-11-28 03:45:06,098 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1939 states and 2709 transitions. [2019-11-28 03:45:06,104 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1238 [2019-11-28 03:45:06,105 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:06,105 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:06,106 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:06,106 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:06,106 INFO L794 eck$LassoCheckResult]: Stem: 21896#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 21708#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 21709#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 21787#L202 assume 1 == ~b0_req_up~0; 21802#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 21820#L127-2 ~b0_req_up~0 := 0; 21771#L202-1 assume 1 == ~b1_req_up~0; 21736#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 21728#L142-2 ~b1_req_up~0 := 0; 21729#L209 assume 1 == ~d0_req_up~0; 21854#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 21850#L157-2 ~d0_req_up~0 := 0; 21781#L216 assume 1 == ~d1_req_up~0; 21774#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 21772#L172-2 ~d1_req_up~0 := 0; 21773#L223 assume !(1 == ~z_req_up~0); 21681#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 21682#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 21862#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 21884#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 21697#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 21698#L326-1 assume !(0 == ~z_ev~0); 21782#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 21836#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 21837#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 21734#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 21735#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 21871#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 21872#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 21918#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 21919#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 21779#L359-1 assume !(1 == ~z_ev~0); 21780#L422-1 assume !false; 22117#L423 [2019-11-28 03:45:06,107 INFO L796 eck$LassoCheckResult]: Loop: 22117#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 22661#L285 assume !false; 22666#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 22665#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 22640#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 22664#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 22663#L280 assume 0 != eval_~tmp___0~0; 22662#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 22647#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 22660#L42 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 22658#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 22657#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 22655#L63-2 assume 0 != method1_~s2~0; 22651#L70 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 22649#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 22645#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 22643#L285 assume !false; 22642#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 22639#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 22638#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 22636#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 22634#L280 assume !(0 != eval_~tmp___0~0); 22633#L301 start_simulation_~kernel_st~0 := 2; 22631#L202-2 assume !(1 == ~b0_req_up~0); 22627#L202-3 assume !(1 == ~b1_req_up~0); 22624#L209-1 assume !(1 == ~d0_req_up~0); 22605#L216-1 assume !(1 == ~d1_req_up~0); 22599#L223-1 assume !(1 == ~z_req_up~0); 22600#L230-1 start_simulation_~kernel_st~0 := 3; 22761#L311-2 assume !(0 == ~b0_ev~0); 22759#L311-4 assume !(0 == ~b1_ev~0); 22756#L316-3 assume !(0 == ~d0_ev~0); 22753#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 22754#L326-3 assume !(0 == ~z_ev~0); 22823#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 22822#L97-1 assume !(1 == ~b0_ev~0); 22820#L101-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 22821#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 22864#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 22863#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 22861#L380-5 assume !(1 == ~b0_ev~0); 22729#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 22692#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 22690#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 22687#L359-3 assume !(1 == ~z_ev~0); 22685#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 22684#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 22680#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 22681#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 22678#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 22676#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 22674#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 22672#L439 assume !(0 != start_simulation_~tmp~3); 22670#L422-1 assume !false; 22117#L423 [2019-11-28 03:45:06,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:06,107 INFO L82 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 2 times [2019-11-28 03:45:06,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:06,107 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165571562] [2019-11-28 03:45:06,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:06,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:06,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:06,124 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:06,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:06,124 INFO L82 PathProgramCache]: Analyzing trace with hash 1567847802, now seen corresponding path program 1 times [2019-11-28 03:45:06,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:06,125 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296721423] [2019-11-28 03:45:06,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:06,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:06,144 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:06,144 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296721423] [2019-11-28 03:45:06,145 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:06,145 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 03:45:06,145 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1269267373] [2019-11-28 03:45:06,145 INFO L811 eck$LassoCheckResult]: loop already infeasible [2019-11-28 03:45:06,145 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:06,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 03:45:06,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 03:45:06,146 INFO L87 Difference]: Start difference. First operand 1939 states and 2709 transitions. cyclomatic complexity: 773 Second operand 3 states. [2019-11-28 03:45:06,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:06,168 INFO L93 Difference]: Finished difference Result 2427 states and 3403 transitions. [2019-11-28 03:45:06,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 03:45:06,169 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2427 states and 3403 transitions. [2019-11-28 03:45:06,181 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1588 [2019-11-28 03:45:06,197 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2427 states to 2427 states and 3403 transitions. [2019-11-28 03:45:06,197 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1641 [2019-11-28 03:45:06,199 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1641 [2019-11-28 03:45:06,199 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2427 states and 3403 transitions. [2019-11-28 03:45:06,200 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-11-28 03:45:06,200 INFO L688 BuchiCegarLoop]: Abstraction has 2427 states and 3403 transitions. [2019-11-28 03:45:06,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2427 states and 3403 transitions. [2019-11-28 03:45:06,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2427 to 2295. [2019-11-28 03:45:06,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2295 states. [2019-11-28 03:45:06,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2295 states to 2295 states and 3205 transitions. [2019-11-28 03:45:06,239 INFO L711 BuchiCegarLoop]: Abstraction has 2295 states and 3205 transitions. [2019-11-28 03:45:06,239 INFO L591 BuchiCegarLoop]: Abstraction has 2295 states and 3205 transitions. [2019-11-28 03:45:06,239 INFO L424 BuchiCegarLoop]: ======== Iteration 24============ [2019-11-28 03:45:06,240 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2295 states and 3205 transitions. [2019-11-28 03:45:06,248 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1500 [2019-11-28 03:45:06,248 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:06,248 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:06,250 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:06,250 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:06,250 INFO L794 eck$LassoCheckResult]: Stem: 26251#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 26080#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 26081#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 26160#L202 assume 1 == ~b0_req_up~0; 26171#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 26190#L127-2 ~b0_req_up~0 := 0; 26144#L202-1 assume 1 == ~b1_req_up~0; 26108#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 26100#L142-2 ~b1_req_up~0 := 0; 26101#L209 assume 1 == ~d0_req_up~0; 26216#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 26213#L157-2 ~d0_req_up~0 := 0; 26154#L216 assume 1 == ~d1_req_up~0; 26147#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 26145#L172-2 ~d1_req_up~0 := 0; 26146#L223 assume !(1 == ~z_req_up~0); 26053#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 26054#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 26222#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 26241#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 26069#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 26070#L326-1 assume !(0 == ~z_ev~0); 26155#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 26635#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 26634#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 26633#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 26632#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 26631#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 26630#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 26629#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 26628#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 26624#L359-1 assume !(1 == ~z_ev~0); 26302#L422-1 assume !false; 26303#L423 [2019-11-28 03:45:06,250 INFO L796 eck$LassoCheckResult]: Loop: 26303#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 27987#L285 assume !false; 28000#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 27997#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 27101#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 27995#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 27992#L280 assume 0 != eval_~tmp___0~0; 27990#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 27108#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 27794#L42 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 27791#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 27789#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 27786#L63-2 assume 0 != method1_~s2~0; 27778#L70 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 27340#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 27107#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 27105#L285 assume !false; 27103#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 27100#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 27098#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 27096#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 27092#L280 assume !(0 != eval_~tmp___0~0); 27090#L301 start_simulation_~kernel_st~0 := 2; 27082#L202-2 assume !(1 == ~b0_req_up~0); 27078#L202-3 assume !(1 == ~b1_req_up~0); 27075#L209-1 assume !(1 == ~d0_req_up~0); 27067#L216-1 assume !(1 == ~d1_req_up~0); 27061#L223-1 assume 1 == ~z_req_up~0; 27051#L187-3 assume !(~z_val~0 != ~z_val_t~0); 27049#L187-5 ~z_req_up~0 := 0; 27047#L230-1 start_simulation_~kernel_st~0 := 3; 27045#L311-2 assume !(0 == ~b0_ev~0); 27041#L311-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 27042#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 27171#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 27172#L326-3 assume !(0 == ~z_ev~0); 28271#L331-3 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 28270#L97-1 assume !(1 == ~b0_ev~0); 26287#L101-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 26288#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 28268#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 26204#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 26205#L380-5 assume !(1 == ~b0_ev~0); 26214#L344-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 26244#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 26948#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 26109#L359-3 assume !(1 == ~z_ev~0); 26110#L364-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 28219#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 27126#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 28215#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 28211#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 28042#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 28039#L405 start_simulation_#t~ret4 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 28008#L439 assume !(0 != start_simulation_~tmp~3); 28005#L422-1 assume !false; 26303#L423 [2019-11-28 03:45:06,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:06,251 INFO L82 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 3 times [2019-11-28 03:45:06,251 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:06,251 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052804253] [2019-11-28 03:45:06,251 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:06,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:06,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:06,268 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:06,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:06,268 INFO L82 PathProgramCache]: Analyzing trace with hash -543572622, now seen corresponding path program 1 times [2019-11-28 03:45:06,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:06,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602630148] [2019-11-28 03:45:06,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:06,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:06,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:06,287 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:06,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:06,288 INFO L82 PathProgramCache]: Analyzing trace with hash 559227473, now seen corresponding path program 1 times [2019-11-28 03:45:06,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:06,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676100099] [2019-11-28 03:45:06,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:06,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:06,339 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 03:45:06,339 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676100099] [2019-11-28 03:45:06,339 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 03:45:06,340 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 03:45:06,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258113620] [2019-11-28 03:45:06,784 WARN L192 SmtUtils]: Spent 440.00 ms on a formula simplification. DAG size of input: 130 DAG size of output: 114 [2019-11-28 03:45:06,894 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 84 [2019-11-28 03:45:06,896 INFO L210 LassoAnalysis]: Preferences: [2019-11-28 03:45:06,896 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-11-28 03:45:06,896 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-11-28 03:45:06,896 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-11-28 03:45:06,896 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2019-11-28 03:45:06,897 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:06,897 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-11-28 03:45:06,897 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-11-28 03:45:06,897 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration24_Loop [2019-11-28 03:45:06,897 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-11-28 03:45:06,897 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-11-28 03:45:06,900 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,906 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,908 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,913 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,916 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,921 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,923 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,926 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,932 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,937 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,940 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,942 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,945 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,950 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,952 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,958 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,961 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,964 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,968 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,970 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,978 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,979 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,982 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,984 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,986 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:06,995 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,000 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,003 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,006 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,371 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-11-28 03:45:07,371 INFO L404 LassoAnalysis]: Checking for nontermination... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2019-11-28 03:45:07,388 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-11-28 03:45:07,388 INFO L160 nArgumentSynthesizer]: Using integer mode. Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:07,393 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2019-11-28 03:45:07,393 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~b0_ev~0=3} Honda state: {~b0_ev~0=3} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:07,405 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-11-28 03:45:07,406 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-11-28 03:45:07,409 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2019-11-28 03:45:07,409 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_stop_simulation_#t~ret3=0} Honda state: {ULTIMATE.start_stop_simulation_#t~ret3=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2019-11-28 03:45:07,419 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-11-28 03:45:07,420 INFO L160 nArgumentSynthesizer]: Using integer mode. Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2019-11-28 03:45:07,431 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2019-11-28 03:45:07,431 INFO L160 nArgumentSynthesizer]: Using integer mode. Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:07,437 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2019-11-28 03:45:07,439 INFO L210 LassoAnalysis]: Preferences: [2019-11-28 03:45:07,440 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-11-28 03:45:07,440 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-11-28 03:45:07,440 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-11-28 03:45:07,440 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2019-11-28 03:45:07,440 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:07,440 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-11-28 03:45:07,440 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-11-28 03:45:07,440 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration24_Loop [2019-11-28 03:45:07,441 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-11-28 03:45:07,441 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-11-28 03:45:07,443 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,454 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,455 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,460 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,462 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,467 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,470 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,472 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,477 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,482 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,485 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,489 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,491 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,494 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,504 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,510 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,516 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,519 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,522 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,524 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,527 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,531 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,534 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,538 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,543 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,546 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,554 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,562 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,565 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-11-28 03:45:07,938 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-11-28 03:45:07,938 INFO L489 LassoAnalysis]: Using template 'affine'. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2019-11-28 03:45:07,963 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-11-28 03:45:07,965 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-11-28 03:45:07,965 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-11-28 03:45:07,965 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-11-28 03:45:07,965 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2019-11-28 03:45:07,965 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-11-28 03:45:07,966 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2019-11-28 03:45:07,967 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:07,970 INFO L522 LassoAnalysis]: Proving termination failed for this template and these settings. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:07,984 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-11-28 03:45:07,985 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-11-28 03:45:07,986 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-11-28 03:45:07,986 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-11-28 03:45:07,986 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-11-28 03:45:07,986 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-11-28 03:45:07,988 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-11-28 03:45:07,988 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-11-28 03:45:07,990 INFO L522 LassoAnalysis]: Proving termination failed for this template and these settings. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:08,003 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-11-28 03:45:08,005 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-11-28 03:45:08,006 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-11-28 03:45:08,006 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-11-28 03:45:08,006 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-11-28 03:45:08,006 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-11-28 03:45:08,009 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-11-28 03:45:08,009 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-11-28 03:45:08,013 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2019-11-28 03:45:08,016 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2019-11-28 03:45:08,016 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2019-11-28 03:45:08,030 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2019-11-28 03:45:08,030 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2019-11-28 03:45:08,030 INFO L510 LassoAnalysis]: Proved termination. [2019-11-28 03:45:08,030 INFO L512 LassoAnalysis]: Termination argument consisting of: Ranking function f(~d1_ev~0) = -1*~d1_ev~0 + 1 Supporting invariants [] [2019-11-28 03:45:08,033 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed Waiting until toolchain timeout for monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-11-28 03:45:08,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:08,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:08,080 INFO L255 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 2 conjunts are in the unsatisfiable core [2019-11-28 03:45:08,089 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-28 03:45:08,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 03:45:08,111 INFO L255 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2019-11-28 03:45:08,114 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-28 03:45:08,135 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-11-28 03:45:08,135 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2019-11-28 03:45:08,135 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 2295 states and 3205 transitions. cyclomatic complexity: 913 Second operand 5 states. [2019-11-28 03:45:08,187 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 2295 states and 3205 transitions. cyclomatic complexity: 913. Second operand 5 states. Result 6026 states and 8457 transitions. Complement of second has 5 states. [2019-11-28 03:45:08,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2019-11-28 03:45:08,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2019-11-28 03:45:08,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 148 transitions. [2019-11-28 03:45:08,189 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 148 transitions. Stem has 33 letters. Loop has 56 letters. [2019-11-28 03:45:08,189 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-11-28 03:45:08,190 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 148 transitions. Stem has 89 letters. Loop has 56 letters. [2019-11-28 03:45:08,190 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-11-28 03:45:08,190 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 148 transitions. Stem has 33 letters. Loop has 112 letters. [2019-11-28 03:45:08,191 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-11-28 03:45:08,191 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6026 states and 8457 transitions. [2019-11-28 03:45:08,222 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2512 [2019-11-28 03:45:08,262 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6026 states to 5694 states and 7981 transitions. [2019-11-28 03:45:08,262 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2579 [2019-11-28 03:45:08,266 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2590 [2019-11-28 03:45:08,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5694 states and 7981 transitions. [2019-11-28 03:45:08,270 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-11-28 03:45:08,270 INFO L688 BuchiCegarLoop]: Abstraction has 5694 states and 7981 transitions. [2019-11-28 03:45:08,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5694 states and 7981 transitions. [2019-11-28 03:45:08,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5694 to 5683. [2019-11-28 03:45:08,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5683 states. [2019-11-28 03:45:08,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5683 states to 5683 states and 7970 transitions. [2019-11-28 03:45:08,387 INFO L711 BuchiCegarLoop]: Abstraction has 5683 states and 7970 transitions. [2019-11-28 03:45:08,387 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 03:45:08,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 03:45:08,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 03:45:08,388 INFO L87 Difference]: Start difference. First operand 5683 states and 7970 transitions. Second operand 4 states. [2019-11-28 03:45:08,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 03:45:08,425 INFO L93 Difference]: Finished difference Result 5683 states and 7952 transitions. [2019-11-28 03:45:08,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 03:45:08,426 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5683 states and 7952 transitions. [2019-11-28 03:45:08,454 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2512 [2019-11-28 03:45:08,484 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5683 states to 5683 states and 7952 transitions. [2019-11-28 03:45:08,484 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2579 [2019-11-28 03:45:08,487 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2579 [2019-11-28 03:45:08,487 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5683 states and 7952 transitions. [2019-11-28 03:45:08,490 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-11-28 03:45:08,491 INFO L688 BuchiCegarLoop]: Abstraction has 5683 states and 7952 transitions. [2019-11-28 03:45:08,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5683 states and 7952 transitions. [2019-11-28 03:45:08,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5683 to 5683. [2019-11-28 03:45:08,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5683 states. [2019-11-28 03:45:08,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5683 states to 5683 states and 7952 transitions. [2019-11-28 03:45:08,585 INFO L711 BuchiCegarLoop]: Abstraction has 5683 states and 7952 transitions. [2019-11-28 03:45:08,585 INFO L591 BuchiCegarLoop]: Abstraction has 5683 states and 7952 transitions. [2019-11-28 03:45:08,585 INFO L424 BuchiCegarLoop]: ======== Iteration 25============ [2019-11-28 03:45:08,585 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5683 states and 7952 transitions. [2019-11-28 03:45:08,603 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2512 [2019-11-28 03:45:08,604 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-11-28 03:45:08,604 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-11-28 03:45:08,604 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:08,604 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 03:45:08,605 INFO L794 eck$LassoCheckResult]: Stem: 46230#ULTIMATE.startENTRY ~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 46060#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 46061#L480 havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 46140#L202 assume 1 == ~b0_req_up~0; 46150#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 46168#L127-2 ~b0_req_up~0 := 0; 46123#L202-1 assume 1 == ~b1_req_up~0; 46088#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 46080#L142-2 ~b1_req_up~0 := 0; 46081#L209 assume 1 == ~d0_req_up~0; 46198#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 46194#L157-2 ~d0_req_up~0 := 0; 46134#L216 assume 1 == ~d1_req_up~0; 46126#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 46124#L172-2 ~d1_req_up~0 := 0; 46125#L223 assume !(1 == ~z_req_up~0); 46033#L230 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 46034#L245-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 46204#L311-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 46223#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 46049#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 46050#L326-1 assume !(0 == ~z_ev~0); 46135#L331-1 havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 46173#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 46183#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 46184#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 46209#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 46210#L380-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 46221#L344-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 46222#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 46246#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 46132#L359-1 assume !(1 == ~z_ev~0); 46133#L422-1 assume !false; 47585#L423 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 49815#L285 [2019-11-28 03:45:08,605 INFO L796 eck$LassoCheckResult]: Loop: 49815#L285 assume !false; 49826#L276 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 49824#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 49705#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 49821#L266 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 49819#L280 assume 0 != eval_~tmp___0~0; 49817#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 49713#L289 assume !(0 != eval_~tmp~0); 49815#L285 [2019-11-28 03:45:08,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:08,605 INFO L82 PathProgramCache]: Analyzing trace with hash -1082183973, now seen corresponding path program 1 times [2019-11-28 03:45:08,605 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:08,605 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083249607] [2019-11-28 03:45:08,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:08,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:08,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:08,620 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:08,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:08,621 INFO L82 PathProgramCache]: Analyzing trace with hash 1768213899, now seen corresponding path program 1 times [2019-11-28 03:45:08,621 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:08,621 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633129518] [2019-11-28 03:45:08,621 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:08,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:08,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:08,626 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:08,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 03:45:08,627 INFO L82 PathProgramCache]: Analyzing trace with hash -937655707, now seen corresponding path program 1 times [2019-11-28 03:45:08,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 03:45:08,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520924538] [2019-11-28 03:45:08,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 03:45:08,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:08,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 03:45:08,644 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 03:45:09,330 WARN L192 SmtUtils]: Spent 640.00 ms on a formula simplification. DAG size of input: 160 DAG size of output: 142 [2019-11-28 03:45:09,442 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.11 03:45:09 BoogieIcfgContainer [2019-11-28 03:45:09,442 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2019-11-28 03:45:09,443 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 03:45:09,443 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 03:45:09,443 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 03:45:09,444 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:45:00" (3/4) ... [2019-11-28 03:45:09,447 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2019-11-28 03:45:09,511 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 03:45:09,511 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 03:45:09,513 INFO L168 Benchmark]: Toolchain (without parser) took 9946.36 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 324.0 MB). Free memory was 960.4 MB in the beginning and 972.1 MB in the end (delta: -11.7 MB). Peak memory consumption was 312.3 MB. Max. memory is 11.5 GB. [2019-11-28 03:45:09,513 INFO L168 Benchmark]: CDTParser took 0.26 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 03:45:09,514 INFO L168 Benchmark]: CACSL2BoogieTranslator took 358.44 ms. Allocated memory is still 1.0 GB. Free memory was 960.4 MB in the beginning and 944.3 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2019-11-28 03:45:09,514 INFO L168 Benchmark]: Boogie Procedure Inliner took 117.91 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 944.3 MB in the beginning and 1.1 GB in the end (delta: -184.3 MB). Peak memory consumption was 9.7 MB. Max. memory is 11.5 GB. [2019-11-28 03:45:09,515 INFO L168 Benchmark]: Boogie Preprocessor took 35.05 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 03:45:09,515 INFO L168 Benchmark]: RCFGBuilder took 692.70 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. [2019-11-28 03:45:09,515 INFO L168 Benchmark]: BuchiAutomizer took 8669.00 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 185.6 MB). Free memory was 1.1 GB in the beginning and 972.1 MB in the end (delta: 111.9 MB). Peak memory consumption was 297.4 MB. Max. memory is 11.5 GB. [2019-11-28 03:45:09,516 INFO L168 Benchmark]: Witness Printer took 68.35 ms. Allocated memory is still 1.4 GB. Free memory is still 972.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 03:45:09,518 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 358.44 ms. Allocated memory is still 1.0 GB. Free memory was 960.4 MB in the beginning and 944.3 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 117.91 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 944.3 MB in the beginning and 1.1 GB in the end (delta: -184.3 MB). Peak memory consumption was 9.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 35.05 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 692.70 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. * BuchiAutomizer took 8669.00 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 185.6 MB). Free memory was 1.1 GB in the beginning and 972.1 MB in the end (delta: 111.9 MB). Peak memory consumption was 297.4 MB. Max. memory is 11.5 GB. * Witness Printer took 68.35 ms. Allocated memory is still 1.4 GB. Free memory is still 972.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 26 terminating modules (24 trivial, 2 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -1 * b0_ev + 1 and consists of 3 locations. One deterministic module has affine ranking function -1 * d1_ev + 1 and consists of 3 locations. 24 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 5683 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 8.5s and 25 iterations. TraceHistogramMax:2. Analysis of lassos took 5.9s. Construction of modules took 0.4s. Büchi inclusion checks took 0.8s. Highest rank in rank-based complementation 3. Minimization of det autom 19. Minimization of nondet autom 7. Automata minimization 0.5s AutomataMinimizationTime, 26 MinimizatonAttempts, 4422 StatesRemovedByMinimization, 6 NontrivialMinimizations. Non-live state removal took 0.4s Buchi closure took 0.0s. Biggest automaton had 5683 states and ocurred in iteration 24. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 6/6 HoareTripleCheckerStatistics: 4145 SDtfs, 1728 SDslu, 4013 SDs, 0 SdLazy, 302 SolverSat, 72 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time LassoAnalysisResults: nont1 unkn0 SFLI3 SFLT0 conc0 concLT2 SILN0 SILU0 SILI19 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital106 mio100 ax100 hnf100 lsp10 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq209 hnf86 smp100 dnf189 smp57 tf109 neg96 sie108 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 9ms VariablesStem: 0 VariablesLoop: 1 DisjunctsStem: 1 DisjunctsLoop: 2 SupportingInvariants: 0 MotzkinApplications: 4 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 4 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 2 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.1s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 275]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@79278984=0, b1_val_t=1, \result=0, d0_val=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@4947ed5a=0, __retres1=1, z_val=0, tmp=0, b0_val_t=1, kernel_st=1, d1_ev=2, comp_m1_i=0, b1_val=1, d1_req_up=0, tmp___0=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7d43ebb3=0, z_val_t=0, b1_req_up=0, __retres1=1, d0_ev=2, z_ev=2, tmp=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@21ba5af3=0, b1_ev=2, comp_m1_st=0, b0_req_up=0, z_req_up=0, \result=1, d1_val=1, b0_ev=2, tmp=1, d0_val_t=1, d1_val_t=1, b0_val=1, __retres1=0, d0_req_up=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 275]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L14] int b0_val ; [L15] int b0_val_t ; [L16] int b0_ev ; [L17] int b0_req_up ; [L18] int b1_val ; [L19] int b1_val_t ; [L20] int b1_ev ; [L21] int b1_req_up ; [L22] int d0_val ; [L23] int d0_val_t ; [L24] int d0_ev ; [L25] int d0_req_up ; [L26] int d1_val ; [L27] int d1_val_t ; [L28] int d1_ev ; [L29] int d1_req_up ; [L30] int z_val ; [L31] int z_val_t ; [L32] int z_ev ; [L33] int z_req_up ; [L34] int comp_m1_st ; [L35] int comp_m1_i ; [L484] int __retres1 ; [L455] b0_val = 0 [L456] b0_ev = 2 [L457] b0_req_up = 0 [L458] b1_val = 0 [L459] b1_ev = 2 [L460] b1_req_up = 0 [L461] d0_val = 0 [L462] d0_ev = 2 [L463] d0_req_up = 0 [L464] d1_val = 0 [L465] d1_ev = 2 [L466] d1_req_up = 0 [L467] z_val = 0 [L468] z_ev = 2 [L469] z_req_up = 0 [L470] b0_val_t = 1 [L471] b0_req_up = 1 [L472] b1_val_t = 1 [L473] b1_req_up = 1 [L474] d0_val_t = 1 [L475] d0_req_up = 1 [L476] d1_val_t = 1 [L477] d1_req_up = 1 [L478] comp_m1_i = 0 [L409] int kernel_st ; [L410] int tmp ; [L414] kernel_st = 0 [L202] COND TRUE (int )b0_req_up == 1 [L127] COND TRUE (int )b0_val != (int )b0_val_t [L128] b0_val = b0_val_t [L129] b0_ev = 0 [L133] b0_req_up = 0 [L209] COND TRUE (int )b1_req_up == 1 [L142] COND TRUE (int )b1_val != (int )b1_val_t [L143] b1_val = b1_val_t [L144] b1_ev = 0 [L148] b1_req_up = 0 [L216] COND TRUE (int )d0_req_up == 1 [L157] COND TRUE (int )d0_val != (int )d0_val_t [L158] d0_val = d0_val_t [L159] d0_ev = 0 [L163] d0_req_up = 0 [L223] COND TRUE (int )d1_req_up == 1 [L172] COND TRUE (int )d1_val != (int )d1_val_t [L173] d1_val = d1_val_t [L174] d1_ev = 0 [L178] d1_req_up = 0 [L230] COND FALSE !((int )z_req_up == 1) [L245] COND FALSE !((int )comp_m1_i == 1) [L248] comp_m1_st = 2 [L311] COND TRUE (int )b0_ev == 0 [L312] b0_ev = 1 [L316] COND TRUE (int )b1_ev == 0 [L317] b1_ev = 1 [L321] COND TRUE (int )d0_ev == 0 [L322] d0_ev = 1 [L326] COND TRUE (int )d1_ev == 0 [L327] d1_ev = 1 [L331] COND FALSE !((int )z_ev == 0) [L374] int tmp ; [L94] int __retres1 ; [L97] COND TRUE (int )b0_ev == 1 [L98] __retres1 = 1 [L120] return (__retres1); [L378] tmp = is_method1_triggered() [L380] COND TRUE \read(tmp) [L381] comp_m1_st = 0 [L344] COND TRUE (int )b0_ev == 1 [L345] b0_ev = 2 [L349] COND TRUE (int )b1_ev == 1 [L350] b1_ev = 2 [L354] COND TRUE (int )d0_ev == 1 [L355] d0_ev = 2 [L359] COND TRUE (int )d1_ev == 1 [L360] d1_ev = 2 [L364] COND FALSE !((int )z_ev == 1) [L422] COND TRUE 1 [L425] kernel_st = 1 [L270] int tmp ; [L271] int tmp___0 ; Loop: [L275] COND TRUE 1 [L255] int __retres1 ; [L258] COND TRUE (int )comp_m1_st == 0 [L259] __retres1 = 1 [L266] return (__retres1); [L278] tmp___0 = exists_runnable_thread() [L280] COND TRUE \read(tmp___0) [L285] COND TRUE (int )comp_m1_st == 0 [L287] tmp = __VERIFIER_nondet_int() [L289] COND FALSE !(\read(tmp)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! Received shutdown request...