./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix031_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix031_pso.oepc.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1ca871fcb394143f3e78707b860cbdb77f0f565b ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:11:27,373 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:11:27,375 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:11:27,387 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:11:27,387 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:11:27,388 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:11:27,390 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:11:27,392 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:11:27,394 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:11:27,395 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:11:27,396 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:11:27,398 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:11:27,398 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:11:27,399 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:11:27,400 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:11:27,402 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:11:27,403 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:11:27,404 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:11:27,406 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:11:27,409 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:11:27,411 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:11:27,412 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:11:27,413 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:11:27,414 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:11:27,418 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:11:27,422 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:11:27,422 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:11:27,423 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:11:27,424 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:11:27,425 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:11:27,425 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:11:27,426 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:11:27,427 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:11:27,428 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:11:27,430 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:11:27,430 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:11:27,431 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:11:27,431 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:11:27,432 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:11:27,433 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:11:27,434 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:11:27,435 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:11:27,456 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:11:27,459 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:11:27,461 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:11:27,462 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:11:27,462 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:11:27,463 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:11:27,463 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:11:27,463 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:11:27,464 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:11:27,464 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:11:27,465 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:11:27,466 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:11:27,466 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:11:27,467 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:11:27,467 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:11:27,467 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:11:27,467 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:11:27,468 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:11:27,468 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:11:27,468 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:11:27,469 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:11:27,469 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:11:27,470 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:11:27,470 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:11:27,470 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:11:27,471 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:11:27,471 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:11:27,471 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:11:27,471 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:11:27,472 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1ca871fcb394143f3e78707b860cbdb77f0f565b [2019-11-28 18:11:27,783 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:11:27,804 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:11:27,809 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:11:27,811 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:11:27,812 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:11:27,813 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix031_pso.oepc.i [2019-11-28 18:11:27,890 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/44ac06bd7/87f61a17ec1940358145aa50c2eca748/FLAG782201783 [2019-11-28 18:11:28,489 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:11:28,493 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix031_pso.oepc.i [2019-11-28 18:11:28,510 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/44ac06bd7/87f61a17ec1940358145aa50c2eca748/FLAG782201783 [2019-11-28 18:11:28,769 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/44ac06bd7/87f61a17ec1940358145aa50c2eca748 [2019-11-28 18:11:28,772 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:11:28,774 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:11:28,776 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:11:28,776 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:11:28,780 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:11:28,781 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:11:28" (1/1) ... [2019-11-28 18:11:28,784 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@21aba202 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:28, skipping insertion in model container [2019-11-28 18:11:28,785 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:11:28" (1/1) ... [2019-11-28 18:11:28,792 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:11:28,837 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:11:29,387 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:11:29,400 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:11:29,488 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:11:29,558 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:11:29,559 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29 WrapperNode [2019-11-28 18:11:29,559 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:11:29,561 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:11:29,561 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:11:29,562 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:11:29,571 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,594 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,627 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:11:29,628 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:11:29,628 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:11:29,628 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:11:29,637 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,637 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,641 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,642 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,653 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,658 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,662 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... [2019-11-28 18:11:29,668 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:11:29,669 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:11:29,669 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:11:29,669 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:11:29,671 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:11:29,736 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:11:29,737 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:11:29,737 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:11:29,737 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:11:29,737 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:11:29,738 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:11:29,739 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:11:29,739 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:11:29,739 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:11:29,740 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:11:29,740 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:11:29,742 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:11:30,457 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:11:30,458 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:11:30,459 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:11:30 BoogieIcfgContainer [2019-11-28 18:11:30,459 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:11:30,461 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:11:30,462 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:11:30,470 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:11:30,471 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:11:28" (1/3) ... [2019-11-28 18:11:30,472 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5db6cf88 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:11:30, skipping insertion in model container [2019-11-28 18:11:30,472 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:29" (2/3) ... [2019-11-28 18:11:30,472 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5db6cf88 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:11:30, skipping insertion in model container [2019-11-28 18:11:30,473 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:11:30" (3/3) ... [2019-11-28 18:11:30,474 INFO L109 eAbstractionObserver]: Analyzing ICFG mix031_pso.oepc.i [2019-11-28 18:11:30,485 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:11:30,486 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:11:30,494 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:11:30,495 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:11:30,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,533 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,533 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,533 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,534 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,534 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,536 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,536 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,536 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,536 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,537 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,537 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,537 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,537 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,538 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,538 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,538 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,538 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,539 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,539 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,539 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,539 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,543 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,543 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,550 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,550 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,550 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,551 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,551 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,552 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,552 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,552 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,559 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,559 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,559 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,560 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,560 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,560 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,561 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,561 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,561 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,562 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,567 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,568 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,568 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,568 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,569 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,569 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,570 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,570 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,572 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,573 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,574 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,574 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,582 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,582 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,583 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,584 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,584 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,584 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,593 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,594 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,594 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,594 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,595 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,595 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,595 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:30,614 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:11:30,633 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:11:30,633 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:11:30,634 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:11:30,634 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:11:30,634 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:11:30,634 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:11:30,634 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:11:30,634 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:11:30,653 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 151 places, 185 transitions [2019-11-28 18:11:30,655 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 151 places, 185 transitions [2019-11-28 18:11:30,753 INFO L134 PetriNetUnfolder]: 41/183 cut-off events. [2019-11-28 18:11:30,753 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:11:30,770 INFO L76 FinitePrefix]: Finished finitePrefix Result has 190 conditions, 183 events. 41/183 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 575 event pairs. 6/146 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:11:30,792 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 151 places, 185 transitions [2019-11-28 18:11:30,841 INFO L134 PetriNetUnfolder]: 41/183 cut-off events. [2019-11-28 18:11:30,841 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:11:30,848 INFO L76 FinitePrefix]: Finished finitePrefix Result has 190 conditions, 183 events. 41/183 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 575 event pairs. 6/146 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:11:30,866 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12056 [2019-11-28 18:11:30,867 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:11:36,076 WARN L192 SmtUtils]: Spent 252.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-11-28 18:11:36,200 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2019-11-28 18:11:36,224 INFO L206 etLargeBlockEncoding]: Checked pairs total: 55357 [2019-11-28 18:11:36,225 INFO L214 etLargeBlockEncoding]: Total number of compositions: 107 [2019-11-28 18:11:36,229 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 77 places, 89 transitions [2019-11-28 18:11:36,724 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8640 states. [2019-11-28 18:11:36,727 INFO L276 IsEmpty]: Start isEmpty. Operand 8640 states. [2019-11-28 18:11:36,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-11-28 18:11:36,734 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:36,735 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-11-28 18:11:36,736 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:36,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:36,743 INFO L82 PathProgramCache]: Analyzing trace with hash 801135, now seen corresponding path program 1 times [2019-11-28 18:11:36,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:36,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963187494] [2019-11-28 18:11:36,755 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:36,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:36,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:36,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963187494] [2019-11-28 18:11:36,993 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:36,994 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:11:36,994 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [176969239] [2019-11-28 18:11:37,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:37,000 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:37,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:37,017 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:37,019 INFO L87 Difference]: Start difference. First operand 8640 states. Second operand 3 states. [2019-11-28 18:11:37,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:37,289 INFO L93 Difference]: Finished difference Result 8472 states and 28002 transitions. [2019-11-28 18:11:37,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:37,291 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-11-28 18:11:37,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:37,379 INFO L225 Difference]: With dead ends: 8472 [2019-11-28 18:11:37,380 INFO L226 Difference]: Without dead ends: 7980 [2019-11-28 18:11:37,381 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:37,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7980 states. [2019-11-28 18:11:37,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7980 to 7980. [2019-11-28 18:11:37,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7980 states. [2019-11-28 18:11:37,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7980 states to 7980 states and 26329 transitions. [2019-11-28 18:11:37,819 INFO L78 Accepts]: Start accepts. Automaton has 7980 states and 26329 transitions. Word has length 3 [2019-11-28 18:11:37,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:37,820 INFO L462 AbstractCegarLoop]: Abstraction has 7980 states and 26329 transitions. [2019-11-28 18:11:37,820 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:37,821 INFO L276 IsEmpty]: Start isEmpty. Operand 7980 states and 26329 transitions. [2019-11-28 18:11:37,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:11:37,825 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:37,825 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:37,825 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:37,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:37,826 INFO L82 PathProgramCache]: Analyzing trace with hash -337363797, now seen corresponding path program 1 times [2019-11-28 18:11:37,826 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:37,827 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [617064005] [2019-11-28 18:11:37,827 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:37,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:37,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:37,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [617064005] [2019-11-28 18:11:37,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:37,908 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:11:37,908 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [565472418] [2019-11-28 18:11:37,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:37,911 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:37,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:37,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:37,912 INFO L87 Difference]: Start difference. First operand 7980 states and 26329 transitions. Second operand 3 states. [2019-11-28 18:11:37,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:37,972 INFO L93 Difference]: Finished difference Result 1284 states and 2972 transitions. [2019-11-28 18:11:37,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:37,974 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-11-28 18:11:37,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:37,982 INFO L225 Difference]: With dead ends: 1284 [2019-11-28 18:11:37,982 INFO L226 Difference]: Without dead ends: 1284 [2019-11-28 18:11:37,983 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:37,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1284 states. [2019-11-28 18:11:38,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1284 to 1284. [2019-11-28 18:11:38,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1284 states. [2019-11-28 18:11:38,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1284 states to 1284 states and 2972 transitions. [2019-11-28 18:11:38,033 INFO L78 Accepts]: Start accepts. Automaton has 1284 states and 2972 transitions. Word has length 11 [2019-11-28 18:11:38,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:38,033 INFO L462 AbstractCegarLoop]: Abstraction has 1284 states and 2972 transitions. [2019-11-28 18:11:38,034 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:38,034 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 2972 transitions. [2019-11-28 18:11:38,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:11:38,042 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:38,043 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:38,043 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:38,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:38,044 INFO L82 PathProgramCache]: Analyzing trace with hash 254708639, now seen corresponding path program 1 times [2019-11-28 18:11:38,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:38,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [320674298] [2019-11-28 18:11:38,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:38,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:38,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:38,172 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [320674298] [2019-11-28 18:11:38,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:38,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:38,172 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19863281] [2019-11-28 18:11:38,174 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:38,175 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:38,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:38,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:38,175 INFO L87 Difference]: Start difference. First operand 1284 states and 2972 transitions. Second operand 3 states. [2019-11-28 18:11:38,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:38,253 INFO L93 Difference]: Finished difference Result 1993 states and 4593 transitions. [2019-11-28 18:11:38,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:38,254 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-11-28 18:11:38,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:38,266 INFO L225 Difference]: With dead ends: 1993 [2019-11-28 18:11:38,266 INFO L226 Difference]: Without dead ends: 1993 [2019-11-28 18:11:38,266 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:38,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1993 states. [2019-11-28 18:11:38,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1993 to 1444. [2019-11-28 18:11:38,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1444 states. [2019-11-28 18:11:38,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 3429 transitions. [2019-11-28 18:11:38,321 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 3429 transitions. Word has length 14 [2019-11-28 18:11:38,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:38,322 INFO L462 AbstractCegarLoop]: Abstraction has 1444 states and 3429 transitions. [2019-11-28 18:11:38,322 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:38,322 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 3429 transitions. [2019-11-28 18:11:38,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:11:38,325 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:38,325 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:38,325 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:38,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:38,326 INFO L82 PathProgramCache]: Analyzing trace with hash 254810970, now seen corresponding path program 1 times [2019-11-28 18:11:38,326 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:38,327 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922489400] [2019-11-28 18:11:38,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:38,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:38,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:38,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922489400] [2019-11-28 18:11:38,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:38,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:11:38,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869198816] [2019-11-28 18:11:38,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:38,459 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:38,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:38,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:38,460 INFO L87 Difference]: Start difference. First operand 1444 states and 3429 transitions. Second operand 4 states. [2019-11-28 18:11:38,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:38,741 INFO L93 Difference]: Finished difference Result 1803 states and 4159 transitions. [2019-11-28 18:11:38,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:38,741 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:11:38,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:38,752 INFO L225 Difference]: With dead ends: 1803 [2019-11-28 18:11:38,752 INFO L226 Difference]: Without dead ends: 1803 [2019-11-28 18:11:38,752 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:38,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1803 states. [2019-11-28 18:11:38,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1803 to 1739. [2019-11-28 18:11:38,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1739 states. [2019-11-28 18:11:38,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1739 states to 1739 states and 4035 transitions. [2019-11-28 18:11:38,800 INFO L78 Accepts]: Start accepts. Automaton has 1739 states and 4035 transitions. Word has length 14 [2019-11-28 18:11:38,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:38,801 INFO L462 AbstractCegarLoop]: Abstraction has 1739 states and 4035 transitions. [2019-11-28 18:11:38,801 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:38,801 INFO L276 IsEmpty]: Start isEmpty. Operand 1739 states and 4035 transitions. [2019-11-28 18:11:38,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:11:38,802 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:38,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:38,802 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:38,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:38,803 INFO L82 PathProgramCache]: Analyzing trace with hash 32652836, now seen corresponding path program 1 times [2019-11-28 18:11:38,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:38,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553866940] [2019-11-28 18:11:38,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:38,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:38,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:38,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553866940] [2019-11-28 18:11:38,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:38,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:11:38,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281697915] [2019-11-28 18:11:38,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:38,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:38,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:38,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:38,915 INFO L87 Difference]: Start difference. First operand 1739 states and 4035 transitions. Second operand 4 states. [2019-11-28 18:11:39,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:39,098 INFO L93 Difference]: Finished difference Result 2116 states and 4835 transitions. [2019-11-28 18:11:39,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:39,098 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:11:39,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:39,110 INFO L225 Difference]: With dead ends: 2116 [2019-11-28 18:11:39,110 INFO L226 Difference]: Without dead ends: 2116 [2019-11-28 18:11:39,110 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:39,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2116 states. [2019-11-28 18:11:39,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2116 to 1856. [2019-11-28 18:11:39,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1856 states. [2019-11-28 18:11:39,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1856 states to 1856 states and 4299 transitions. [2019-11-28 18:11:39,155 INFO L78 Accepts]: Start accepts. Automaton has 1856 states and 4299 transitions. Word has length 14 [2019-11-28 18:11:39,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:39,156 INFO L462 AbstractCegarLoop]: Abstraction has 1856 states and 4299 transitions. [2019-11-28 18:11:39,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:39,156 INFO L276 IsEmpty]: Start isEmpty. Operand 1856 states and 4299 transitions. [2019-11-28 18:11:39,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:11:39,159 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:39,159 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:39,159 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:39,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:39,160 INFO L82 PathProgramCache]: Analyzing trace with hash 1595600556, now seen corresponding path program 1 times [2019-11-28 18:11:39,160 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:39,161 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695136385] [2019-11-28 18:11:39,161 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:39,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:39,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:39,345 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695136385] [2019-11-28 18:11:39,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:39,345 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:39,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128880154] [2019-11-28 18:11:39,346 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:39,346 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:39,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:39,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:39,348 INFO L87 Difference]: Start difference. First operand 1856 states and 4299 transitions. Second operand 5 states. [2019-11-28 18:11:39,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:39,687 INFO L93 Difference]: Finished difference Result 2383 states and 5349 transitions. [2019-11-28 18:11:39,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:11:39,688 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-11-28 18:11:39,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:39,702 INFO L225 Difference]: With dead ends: 2383 [2019-11-28 18:11:39,702 INFO L226 Difference]: Without dead ends: 2383 [2019-11-28 18:11:39,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:39,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2383 states. [2019-11-28 18:11:39,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2383 to 2127. [2019-11-28 18:11:39,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2127 states. [2019-11-28 18:11:39,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2127 states to 2127 states and 4855 transitions. [2019-11-28 18:11:39,768 INFO L78 Accepts]: Start accepts. Automaton has 2127 states and 4855 transitions. Word has length 25 [2019-11-28 18:11:39,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:39,769 INFO L462 AbstractCegarLoop]: Abstraction has 2127 states and 4855 transitions. [2019-11-28 18:11:39,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:39,769 INFO L276 IsEmpty]: Start isEmpty. Operand 2127 states and 4855 transitions. [2019-11-28 18:11:39,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:11:39,772 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:39,772 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:39,772 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:39,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:39,773 INFO L82 PathProgramCache]: Analyzing trace with hash 1878239565, now seen corresponding path program 1 times [2019-11-28 18:11:39,773 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:39,773 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [755310668] [2019-11-28 18:11:39,773 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:39,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:39,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:39,923 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [755310668] [2019-11-28 18:11:39,923 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:39,923 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:11:39,924 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121565294] [2019-11-28 18:11:39,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:39,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:39,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:39,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:39,925 INFO L87 Difference]: Start difference. First operand 2127 states and 4855 transitions. Second operand 5 states. [2019-11-28 18:11:40,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:40,476 INFO L93 Difference]: Finished difference Result 3026 states and 6768 transitions. [2019-11-28 18:11:40,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:11:40,477 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-11-28 18:11:40,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:40,485 INFO L225 Difference]: With dead ends: 3026 [2019-11-28 18:11:40,486 INFO L226 Difference]: Without dead ends: 3026 [2019-11-28 18:11:40,486 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:40,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3026 states. [2019-11-28 18:11:40,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3026 to 2608. [2019-11-28 18:11:40,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2608 states. [2019-11-28 18:11:40,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2608 states to 2608 states and 5926 transitions. [2019-11-28 18:11:40,545 INFO L78 Accepts]: Start accepts. Automaton has 2608 states and 5926 transitions. Word has length 26 [2019-11-28 18:11:40,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:40,545 INFO L462 AbstractCegarLoop]: Abstraction has 2608 states and 5926 transitions. [2019-11-28 18:11:40,545 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:40,546 INFO L276 IsEmpty]: Start isEmpty. Operand 2608 states and 5926 transitions. [2019-11-28 18:11:40,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:11:40,549 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:40,550 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:40,550 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:40,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:40,550 INFO L82 PathProgramCache]: Analyzing trace with hash 532711466, now seen corresponding path program 1 times [2019-11-28 18:11:40,551 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:40,551 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995106609] [2019-11-28 18:11:40,551 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:40,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:40,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:40,635 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995106609] [2019-11-28 18:11:40,636 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:40,636 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:40,636 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182221579] [2019-11-28 18:11:40,636 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:40,637 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:40,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:40,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:40,637 INFO L87 Difference]: Start difference. First operand 2608 states and 5926 transitions. Second operand 5 states. [2019-11-28 18:11:40,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:40,897 INFO L93 Difference]: Finished difference Result 3110 states and 6917 transitions. [2019-11-28 18:11:40,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:11:40,898 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-11-28 18:11:40,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:40,906 INFO L225 Difference]: With dead ends: 3110 [2019-11-28 18:11:40,906 INFO L226 Difference]: Without dead ends: 3110 [2019-11-28 18:11:40,906 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:40,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3110 states. [2019-11-28 18:11:40,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3110 to 2543. [2019-11-28 18:11:40,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2543 states. [2019-11-28 18:11:40,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2543 states to 2543 states and 5786 transitions. [2019-11-28 18:11:40,963 INFO L78 Accepts]: Start accepts. Automaton has 2543 states and 5786 transitions. Word has length 26 [2019-11-28 18:11:40,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:40,963 INFO L462 AbstractCegarLoop]: Abstraction has 2543 states and 5786 transitions. [2019-11-28 18:11:40,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:40,964 INFO L276 IsEmpty]: Start isEmpty. Operand 2543 states and 5786 transitions. [2019-11-28 18:11:40,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-28 18:11:40,968 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:40,968 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:40,968 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:40,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:40,969 INFO L82 PathProgramCache]: Analyzing trace with hash 898927989, now seen corresponding path program 1 times [2019-11-28 18:11:40,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:40,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980388158] [2019-11-28 18:11:40,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:40,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:41,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:41,023 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [980388158] [2019-11-28 18:11:41,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:41,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:41,024 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694396053] [2019-11-28 18:11:41,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:41,025 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:41,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:41,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:41,025 INFO L87 Difference]: Start difference. First operand 2543 states and 5786 transitions. Second operand 4 states. [2019-11-28 18:11:41,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:41,042 INFO L93 Difference]: Finished difference Result 1421 states and 3096 transitions. [2019-11-28 18:11:41,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:11:41,042 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2019-11-28 18:11:41,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:41,048 INFO L225 Difference]: With dead ends: 1421 [2019-11-28 18:11:41,048 INFO L226 Difference]: Without dead ends: 1421 [2019-11-28 18:11:41,048 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:41,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1421 states. [2019-11-28 18:11:41,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1421 to 1326. [2019-11-28 18:11:41,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1326 states. [2019-11-28 18:11:41,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1326 states to 1326 states and 2921 transitions. [2019-11-28 18:11:41,074 INFO L78 Accepts]: Start accepts. Automaton has 1326 states and 2921 transitions. Word has length 27 [2019-11-28 18:11:41,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:41,075 INFO L462 AbstractCegarLoop]: Abstraction has 1326 states and 2921 transitions. [2019-11-28 18:11:41,075 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:41,075 INFO L276 IsEmpty]: Start isEmpty. Operand 1326 states and 2921 transitions. [2019-11-28 18:11:41,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:11:41,082 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:41,082 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:41,082 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:41,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:41,083 INFO L82 PathProgramCache]: Analyzing trace with hash -1928456464, now seen corresponding path program 1 times [2019-11-28 18:11:41,083 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:41,084 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1380438056] [2019-11-28 18:11:41,084 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:41,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:41,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:41,192 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1380438056] [2019-11-28 18:11:41,192 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:41,192 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:11:41,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [704387308] [2019-11-28 18:11:41,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:11:41,193 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:41,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:11:41,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:41,194 INFO L87 Difference]: Start difference. First operand 1326 states and 2921 transitions. Second operand 6 states. [2019-11-28 18:11:41,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:41,823 INFO L93 Difference]: Finished difference Result 1733 states and 3717 transitions. [2019-11-28 18:11:41,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:11:41,824 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-28 18:11:41,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:41,830 INFO L225 Difference]: With dead ends: 1733 [2019-11-28 18:11:41,830 INFO L226 Difference]: Without dead ends: 1733 [2019-11-28 18:11:41,830 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:11:41,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1733 states. [2019-11-28 18:11:41,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1733 to 1380. [2019-11-28 18:11:41,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1380 states. [2019-11-28 18:11:41,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1380 states to 1380 states and 3033 transitions. [2019-11-28 18:11:41,861 INFO L78 Accepts]: Start accepts. Automaton has 1380 states and 3033 transitions. Word has length 51 [2019-11-28 18:11:41,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:41,863 INFO L462 AbstractCegarLoop]: Abstraction has 1380 states and 3033 transitions. [2019-11-28 18:11:41,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:11:41,863 INFO L276 IsEmpty]: Start isEmpty. Operand 1380 states and 3033 transitions. [2019-11-28 18:11:41,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:11:41,867 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:41,867 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:41,867 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:41,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:41,868 INFO L82 PathProgramCache]: Analyzing trace with hash -429236970, now seen corresponding path program 2 times [2019-11-28 18:11:41,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:41,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295127330] [2019-11-28 18:11:41,869 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:41,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:41,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:41,952 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295127330] [2019-11-28 18:11:41,952 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:41,952 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:11:41,952 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589514327] [2019-11-28 18:11:41,953 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:41,953 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:41,953 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:41,953 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:41,953 INFO L87 Difference]: Start difference. First operand 1380 states and 3033 transitions. Second operand 5 states. [2019-11-28 18:11:42,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:42,303 INFO L93 Difference]: Finished difference Result 1527 states and 3302 transitions. [2019-11-28 18:11:42,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:11:42,304 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-11-28 18:11:42,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:42,308 INFO L225 Difference]: With dead ends: 1527 [2019-11-28 18:11:42,309 INFO L226 Difference]: Without dead ends: 1527 [2019-11-28 18:11:42,309 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:42,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1527 states. [2019-11-28 18:11:42,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1527 to 1384. [2019-11-28 18:11:42,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1384 states. [2019-11-28 18:11:42,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1384 states to 1384 states and 3043 transitions. [2019-11-28 18:11:42,339 INFO L78 Accepts]: Start accepts. Automaton has 1384 states and 3043 transitions. Word has length 51 [2019-11-28 18:11:42,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:42,339 INFO L462 AbstractCegarLoop]: Abstraction has 1384 states and 3043 transitions. [2019-11-28 18:11:42,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:42,340 INFO L276 IsEmpty]: Start isEmpty. Operand 1384 states and 3043 transitions. [2019-11-28 18:11:42,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:11:42,344 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:42,344 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:42,344 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:42,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:42,345 INFO L82 PathProgramCache]: Analyzing trace with hash 1980585546, now seen corresponding path program 3 times [2019-11-28 18:11:42,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:42,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072873567] [2019-11-28 18:11:42,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:42,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:42,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:42,467 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1072873567] [2019-11-28 18:11:42,468 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:42,468 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:11:42,468 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320705932] [2019-11-28 18:11:42,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:42,469 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:42,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:42,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:42,470 INFO L87 Difference]: Start difference. First operand 1384 states and 3043 transitions. Second operand 3 states. [2019-11-28 18:11:42,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:42,486 INFO L93 Difference]: Finished difference Result 1383 states and 3041 transitions. [2019-11-28 18:11:42,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:42,487 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-11-28 18:11:42,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:42,491 INFO L225 Difference]: With dead ends: 1383 [2019-11-28 18:11:42,491 INFO L226 Difference]: Without dead ends: 1383 [2019-11-28 18:11:42,491 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:42,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1383 states. [2019-11-28 18:11:42,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1383 to 1153. [2019-11-28 18:11:42,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1153 states. [2019-11-28 18:11:42,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1153 states to 1153 states and 2598 transitions. [2019-11-28 18:11:42,517 INFO L78 Accepts]: Start accepts. Automaton has 1153 states and 2598 transitions. Word has length 51 [2019-11-28 18:11:42,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:42,517 INFO L462 AbstractCegarLoop]: Abstraction has 1153 states and 2598 transitions. [2019-11-28 18:11:42,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:42,518 INFO L276 IsEmpty]: Start isEmpty. Operand 1153 states and 2598 transitions. [2019-11-28 18:11:42,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:11:42,521 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:42,521 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:42,521 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:42,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:42,522 INFO L82 PathProgramCache]: Analyzing trace with hash -1913367860, now seen corresponding path program 1 times [2019-11-28 18:11:42,522 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:42,523 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293391498] [2019-11-28 18:11:42,523 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:42,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:42,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:42,715 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293391498] [2019-11-28 18:11:42,715 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:42,716 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:11:42,716 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055296160] [2019-11-28 18:11:42,716 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-28 18:11:42,716 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:42,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-28 18:11:42,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:11:42,717 INFO L87 Difference]: Start difference. First operand 1153 states and 2598 transitions. Second operand 8 states. [2019-11-28 18:11:43,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:43,521 INFO L93 Difference]: Finished difference Result 2642 states and 6136 transitions. [2019-11-28 18:11:43,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:11:43,522 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2019-11-28 18:11:43,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:43,528 INFO L225 Difference]: With dead ends: 2642 [2019-11-28 18:11:43,528 INFO L226 Difference]: Without dead ends: 2272 [2019-11-28 18:11:43,533 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:11:43,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2272 states. [2019-11-28 18:11:43,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2272 to 1329. [2019-11-28 18:11:43,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1329 states. [2019-11-28 18:11:43,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1329 states to 1329 states and 3064 transitions. [2019-11-28 18:11:43,586 INFO L78 Accepts]: Start accepts. Automaton has 1329 states and 3064 transitions. Word has length 52 [2019-11-28 18:11:43,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:43,588 INFO L462 AbstractCegarLoop]: Abstraction has 1329 states and 3064 transitions. [2019-11-28 18:11:43,588 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-28 18:11:43,588 INFO L276 IsEmpty]: Start isEmpty. Operand 1329 states and 3064 transitions. [2019-11-28 18:11:43,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:11:43,592 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:43,593 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:43,593 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:43,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:43,593 INFO L82 PathProgramCache]: Analyzing trace with hash -1625817020, now seen corresponding path program 2 times [2019-11-28 18:11:43,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:43,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852553391] [2019-11-28 18:11:43,595 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:43,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:43,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:43,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852553391] [2019-11-28 18:11:43,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:43,763 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-28 18:11:43,763 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1897897872] [2019-11-28 18:11:43,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-28 18:11:43,764 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:43,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-28 18:11:43,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:11:43,765 INFO L87 Difference]: Start difference. First operand 1329 states and 3064 transitions. Second operand 8 states. [2019-11-28 18:11:44,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:44,473 INFO L93 Difference]: Finished difference Result 1750 states and 3866 transitions. [2019-11-28 18:11:44,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:11:44,474 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2019-11-28 18:11:44,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:44,479 INFO L225 Difference]: With dead ends: 1750 [2019-11-28 18:11:44,480 INFO L226 Difference]: Without dead ends: 1750 [2019-11-28 18:11:44,482 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:11:44,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1750 states. [2019-11-28 18:11:44,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1750 to 1105. [2019-11-28 18:11:44,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1105 states. [2019-11-28 18:11:44,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1105 states to 1105 states and 2473 transitions. [2019-11-28 18:11:44,507 INFO L78 Accepts]: Start accepts. Automaton has 1105 states and 2473 transitions. Word has length 52 [2019-11-28 18:11:44,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:44,507 INFO L462 AbstractCegarLoop]: Abstraction has 1105 states and 2473 transitions. [2019-11-28 18:11:44,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-28 18:11:44,508 INFO L276 IsEmpty]: Start isEmpty. Operand 1105 states and 2473 transitions. [2019-11-28 18:11:44,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:11:44,511 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:44,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:44,511 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:44,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:44,512 INFO L82 PathProgramCache]: Analyzing trace with hash -1110999850, now seen corresponding path program 3 times [2019-11-28 18:11:44,512 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:44,513 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409639499] [2019-11-28 18:11:44,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:44,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:44,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:44,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409639499] [2019-11-28 18:11:44,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:44,634 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:44,634 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1625950147] [2019-11-28 18:11:44,634 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:44,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:44,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:44,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:44,635 INFO L87 Difference]: Start difference. First operand 1105 states and 2473 transitions. Second operand 4 states. [2019-11-28 18:11:44,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:44,693 INFO L93 Difference]: Finished difference Result 1394 states and 3068 transitions. [2019-11-28 18:11:44,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:44,694 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 52 [2019-11-28 18:11:44,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:44,697 INFO L225 Difference]: With dead ends: 1394 [2019-11-28 18:11:44,698 INFO L226 Difference]: Without dead ends: 1394 [2019-11-28 18:11:44,698 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:44,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1394 states. [2019-11-28 18:11:44,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1394 to 1120. [2019-11-28 18:11:44,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1120 states. [2019-11-28 18:11:44,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1120 states to 1120 states and 2514 transitions. [2019-11-28 18:11:44,721 INFO L78 Accepts]: Start accepts. Automaton has 1120 states and 2514 transitions. Word has length 52 [2019-11-28 18:11:44,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:44,722 INFO L462 AbstractCegarLoop]: Abstraction has 1120 states and 2514 transitions. [2019-11-28 18:11:44,722 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:44,722 INFO L276 IsEmpty]: Start isEmpty. Operand 1120 states and 2514 transitions. [2019-11-28 18:11:44,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:44,725 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:44,725 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:44,726 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:44,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:44,726 INFO L82 PathProgramCache]: Analyzing trace with hash 1717636000, now seen corresponding path program 1 times [2019-11-28 18:11:44,727 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:44,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167460150] [2019-11-28 18:11:44,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:44,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:44,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:44,769 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167460150] [2019-11-28 18:11:44,770 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:44,770 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:11:44,770 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1321966583] [2019-11-28 18:11:44,770 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:44,770 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:44,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:44,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:44,771 INFO L87 Difference]: Start difference. First operand 1120 states and 2514 transitions. Second operand 4 states. [2019-11-28 18:11:44,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:44,973 INFO L93 Difference]: Finished difference Result 1750 states and 3886 transitions. [2019-11-28 18:11:44,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:44,974 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-11-28 18:11:44,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:44,977 INFO L225 Difference]: With dead ends: 1750 [2019-11-28 18:11:44,977 INFO L226 Difference]: Without dead ends: 1750 [2019-11-28 18:11:44,977 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:44,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1750 states. [2019-11-28 18:11:44,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1750 to 1191. [2019-11-28 18:11:44,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1191 states. [2019-11-28 18:11:45,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1191 states to 1191 states and 2696 transitions. [2019-11-28 18:11:45,002 INFO L78 Accepts]: Start accepts. Automaton has 1191 states and 2696 transitions. Word has length 53 [2019-11-28 18:11:45,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:45,003 INFO L462 AbstractCegarLoop]: Abstraction has 1191 states and 2696 transitions. [2019-11-28 18:11:45,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:45,003 INFO L276 IsEmpty]: Start isEmpty. Operand 1191 states and 2696 transitions. [2019-11-28 18:11:45,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:45,006 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:45,007 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:45,007 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:45,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:45,007 INFO L82 PathProgramCache]: Analyzing trace with hash -1264660564, now seen corresponding path program 1 times [2019-11-28 18:11:45,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:45,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711754717] [2019-11-28 18:11:45,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:45,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:45,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:45,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711754717] [2019-11-28 18:11:45,090 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:45,090 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:11:45,090 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351110177] [2019-11-28 18:11:45,090 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:45,090 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:45,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:45,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:45,092 INFO L87 Difference]: Start difference. First operand 1191 states and 2696 transitions. Second operand 5 states. [2019-11-28 18:11:45,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:45,406 INFO L93 Difference]: Finished difference Result 1393 states and 3089 transitions. [2019-11-28 18:11:45,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:11:45,406 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-11-28 18:11:45,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:45,409 INFO L225 Difference]: With dead ends: 1393 [2019-11-28 18:11:45,409 INFO L226 Difference]: Without dead ends: 1393 [2019-11-28 18:11:45,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:45,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1393 states. [2019-11-28 18:11:45,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1393 to 1102. [2019-11-28 18:11:45,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1102 states. [2019-11-28 18:11:45,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1102 states to 1102 states and 2436 transitions. [2019-11-28 18:11:45,430 INFO L78 Accepts]: Start accepts. Automaton has 1102 states and 2436 transitions. Word has length 53 [2019-11-28 18:11:45,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:45,430 INFO L462 AbstractCegarLoop]: Abstraction has 1102 states and 2436 transitions. [2019-11-28 18:11:45,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:45,431 INFO L276 IsEmpty]: Start isEmpty. Operand 1102 states and 2436 transitions. [2019-11-28 18:11:45,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:45,434 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:45,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:45,435 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:45,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:45,435 INFO L82 PathProgramCache]: Analyzing trace with hash -1633231102, now seen corresponding path program 1 times [2019-11-28 18:11:45,435 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:45,436 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [175515245] [2019-11-28 18:11:45,436 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:45,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:45,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:45,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [175515245] [2019-11-28 18:11:45,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:45,839 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:11:45,839 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1098829688] [2019-11-28 18:11:45,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-11-28 18:11:45,840 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:45,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-11-28 18:11:45,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:11:45,841 INFO L87 Difference]: Start difference. First operand 1102 states and 2436 transitions. Second operand 11 states. [2019-11-28 18:11:46,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:46,545 INFO L93 Difference]: Finished difference Result 2451 states and 5302 transitions. [2019-11-28 18:11:46,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:11:46,546 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 53 [2019-11-28 18:11:46,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:46,548 INFO L225 Difference]: With dead ends: 2451 [2019-11-28 18:11:46,548 INFO L226 Difference]: Without dead ends: 1307 [2019-11-28 18:11:46,549 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=89, Invalid=217, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:11:46,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1307 states. [2019-11-28 18:11:46,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1307 to 1157. [2019-11-28 18:11:46,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1157 states. [2019-11-28 18:11:46,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1157 states to 1157 states and 2487 transitions. [2019-11-28 18:11:46,570 INFO L78 Accepts]: Start accepts. Automaton has 1157 states and 2487 transitions. Word has length 53 [2019-11-28 18:11:46,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:46,571 INFO L462 AbstractCegarLoop]: Abstraction has 1157 states and 2487 transitions. [2019-11-28 18:11:46,571 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-11-28 18:11:46,571 INFO L276 IsEmpty]: Start isEmpty. Operand 1157 states and 2487 transitions. [2019-11-28 18:11:46,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:46,574 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:46,574 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:46,575 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:46,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:46,575 INFO L82 PathProgramCache]: Analyzing trace with hash -517102320, now seen corresponding path program 1 times [2019-11-28 18:11:46,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:46,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073280043] [2019-11-28 18:11:46,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:46,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:46,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:46,627 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073280043] [2019-11-28 18:11:46,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:46,628 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:46,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813089509] [2019-11-28 18:11:46,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:46,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:46,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:46,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:46,629 INFO L87 Difference]: Start difference. First operand 1157 states and 2487 transitions. Second operand 3 states. [2019-11-28 18:11:46,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:46,720 INFO L93 Difference]: Finished difference Result 1479 states and 3154 transitions. [2019-11-28 18:11:46,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:46,721 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:11:46,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:46,723 INFO L225 Difference]: With dead ends: 1479 [2019-11-28 18:11:46,724 INFO L226 Difference]: Without dead ends: 1479 [2019-11-28 18:11:46,724 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:46,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1479 states. [2019-11-28 18:11:46,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1479 to 1116. [2019-11-28 18:11:46,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1116 states. [2019-11-28 18:11:46,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1116 states to 1116 states and 2392 transitions. [2019-11-28 18:11:46,747 INFO L78 Accepts]: Start accepts. Automaton has 1116 states and 2392 transitions. Word has length 53 [2019-11-28 18:11:46,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:46,747 INFO L462 AbstractCegarLoop]: Abstraction has 1116 states and 2392 transitions. [2019-11-28 18:11:46,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:46,748 INFO L276 IsEmpty]: Start isEmpty. Operand 1116 states and 2392 transitions. [2019-11-28 18:11:46,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:46,750 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:46,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:46,751 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:46,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:46,751 INFO L82 PathProgramCache]: Analyzing trace with hash 300048924, now seen corresponding path program 2 times [2019-11-28 18:11:46,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:46,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [289293401] [2019-11-28 18:11:46,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:46,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:46,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:46,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [289293401] [2019-11-28 18:11:46,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:46,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-28 18:11:46,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [426565319] [2019-11-28 18:11:46,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-28 18:11:46,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:46,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-28 18:11:46,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:11:46,960 INFO L87 Difference]: Start difference. First operand 1116 states and 2392 transitions. Second operand 9 states. [2019-11-28 18:11:47,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:47,417 INFO L93 Difference]: Finished difference Result 1602 states and 3345 transitions. [2019-11-28 18:11:47,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:11:47,417 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 53 [2019-11-28 18:11:47,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:47,421 INFO L225 Difference]: With dead ends: 1602 [2019-11-28 18:11:47,421 INFO L226 Difference]: Without dead ends: 1475 [2019-11-28 18:11:47,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:11:47,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1475 states. [2019-11-28 18:11:47,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1475 to 1139. [2019-11-28 18:11:47,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1139 states. [2019-11-28 18:11:47,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1139 states to 1139 states and 2435 transitions. [2019-11-28 18:11:47,440 INFO L78 Accepts]: Start accepts. Automaton has 1139 states and 2435 transitions. Word has length 53 [2019-11-28 18:11:47,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:47,441 INFO L462 AbstractCegarLoop]: Abstraction has 1139 states and 2435 transitions. [2019-11-28 18:11:47,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-28 18:11:47,441 INFO L276 IsEmpty]: Start isEmpty. Operand 1139 states and 2435 transitions. [2019-11-28 18:11:47,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:47,444 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:47,444 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:47,444 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:47,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:47,445 INFO L82 PathProgramCache]: Analyzing trace with hash -997940984, now seen corresponding path program 3 times [2019-11-28 18:11:47,445 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:47,445 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529504104] [2019-11-28 18:11:47,445 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:47,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:47,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:47,572 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529504104] [2019-11-28 18:11:47,572 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:47,573 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-28 18:11:47,573 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029130592] [2019-11-28 18:11:47,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-28 18:11:47,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:47,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-28 18:11:47,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:11:47,574 INFO L87 Difference]: Start difference. First operand 1139 states and 2435 transitions. Second operand 9 states. [2019-11-28 18:11:48,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:48,068 INFO L93 Difference]: Finished difference Result 1666 states and 3436 transitions. [2019-11-28 18:11:48,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:11:48,069 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 53 [2019-11-28 18:11:48,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:48,071 INFO L225 Difference]: With dead ends: 1666 [2019-11-28 18:11:48,071 INFO L226 Difference]: Without dead ends: 1644 [2019-11-28 18:11:48,072 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=132, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:11:48,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1644 states. [2019-11-28 18:11:48,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1644 to 1031. [2019-11-28 18:11:48,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1031 states. [2019-11-28 18:11:48,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1031 states to 1031 states and 2157 transitions. [2019-11-28 18:11:48,092 INFO L78 Accepts]: Start accepts. Automaton has 1031 states and 2157 transitions. Word has length 53 [2019-11-28 18:11:48,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:48,092 INFO L462 AbstractCegarLoop]: Abstraction has 1031 states and 2157 transitions. [2019-11-28 18:11:48,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-28 18:11:48,093 INFO L276 IsEmpty]: Start isEmpty. Operand 1031 states and 2157 transitions. [2019-11-28 18:11:48,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:48,095 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:48,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:48,096 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:48,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:48,096 INFO L82 PathProgramCache]: Analyzing trace with hash 937493738, now seen corresponding path program 2 times [2019-11-28 18:11:48,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:48,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419545540] [2019-11-28 18:11:48,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:48,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:48,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:48,205 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419545540] [2019-11-28 18:11:48,205 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:48,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:11:48,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691255372] [2019-11-28 18:11:48,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:48,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:48,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:48,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:48,207 INFO L87 Difference]: Start difference. First operand 1031 states and 2157 transitions. Second operand 5 states. [2019-11-28 18:11:48,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:48,235 INFO L93 Difference]: Finished difference Result 1168 states and 2414 transitions. [2019-11-28 18:11:48,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:48,236 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-11-28 18:11:48,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:48,237 INFO L225 Difference]: With dead ends: 1168 [2019-11-28 18:11:48,237 INFO L226 Difference]: Without dead ends: 577 [2019-11-28 18:11:48,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:48,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 577 states. [2019-11-28 18:11:48,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 577 to 577. [2019-11-28 18:11:48,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 577 states. [2019-11-28 18:11:48,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 577 states to 577 states and 1214 transitions. [2019-11-28 18:11:48,247 INFO L78 Accepts]: Start accepts. Automaton has 577 states and 1214 transitions. Word has length 53 [2019-11-28 18:11:48,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:48,247 INFO L462 AbstractCegarLoop]: Abstraction has 577 states and 1214 transitions. [2019-11-28 18:11:48,247 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:48,248 INFO L276 IsEmpty]: Start isEmpty. Operand 577 states and 1214 transitions. [2019-11-28 18:11:48,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:48,249 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:48,249 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:48,250 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:48,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:48,250 INFO L82 PathProgramCache]: Analyzing trace with hash 821991690, now seen corresponding path program 4 times [2019-11-28 18:11:48,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:48,251 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606972049] [2019-11-28 18:11:48,251 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:48,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:48,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:48,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1606972049] [2019-11-28 18:11:48,374 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:48,374 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:11:48,374 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1468568751] [2019-11-28 18:11:48,375 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:11:48,375 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:48,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:11:48,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:48,376 INFO L87 Difference]: Start difference. First operand 577 states and 1214 transitions. Second operand 7 states. [2019-11-28 18:11:48,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:48,626 INFO L93 Difference]: Finished difference Result 1917 states and 3912 transitions. [2019-11-28 18:11:48,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-28 18:11:48,627 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2019-11-28 18:11:48,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:48,628 INFO L225 Difference]: With dead ends: 1917 [2019-11-28 18:11:48,628 INFO L226 Difference]: Without dead ends: 1219 [2019-11-28 18:11:48,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-11-28 18:11:48,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1219 states. [2019-11-28 18:11:48,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1219 to 609. [2019-11-28 18:11:48,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 609 states. [2019-11-28 18:11:48,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 1263 transitions. [2019-11-28 18:11:48,640 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 1263 transitions. Word has length 53 [2019-11-28 18:11:48,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:48,641 INFO L462 AbstractCegarLoop]: Abstraction has 609 states and 1263 transitions. [2019-11-28 18:11:48,641 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:11:48,641 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 1263 transitions. [2019-11-28 18:11:48,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:48,643 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:48,643 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:48,644 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:48,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:48,644 INFO L82 PathProgramCache]: Analyzing trace with hash 813658986, now seen corresponding path program 5 times [2019-11-28 18:11:48,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:48,645 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973401639] [2019-11-28 18:11:48,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:48,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:48,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:48,761 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973401639] [2019-11-28 18:11:48,761 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:48,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:11:48,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [319395992] [2019-11-28 18:11:48,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:48,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:48,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:48,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:48,764 INFO L87 Difference]: Start difference. First operand 609 states and 1263 transitions. Second operand 5 states. [2019-11-28 18:11:48,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:48,832 INFO L93 Difference]: Finished difference Result 599 states and 1234 transitions. [2019-11-28 18:11:48,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:11:48,833 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-11-28 18:11:48,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:48,835 INFO L225 Difference]: With dead ends: 599 [2019-11-28 18:11:48,835 INFO L226 Difference]: Without dead ends: 599 [2019-11-28 18:11:48,836 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:48,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 599 states. [2019-11-28 18:11:48,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 599 to 558. [2019-11-28 18:11:48,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 558 states. [2019-11-28 18:11:48,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 558 states to 558 states and 1147 transitions. [2019-11-28 18:11:48,850 INFO L78 Accepts]: Start accepts. Automaton has 558 states and 1147 transitions. Word has length 53 [2019-11-28 18:11:48,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:48,850 INFO L462 AbstractCegarLoop]: Abstraction has 558 states and 1147 transitions. [2019-11-28 18:11:48,850 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:48,850 INFO L276 IsEmpty]: Start isEmpty. Operand 558 states and 1147 transitions. [2019-11-28 18:11:48,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:48,852 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:48,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:48,852 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:48,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:48,853 INFO L82 PathProgramCache]: Analyzing trace with hash -779576130, now seen corresponding path program 1 times [2019-11-28 18:11:48,853 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:48,854 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343962776] [2019-11-28 18:11:48,854 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:48,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:48,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:48,977 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343962776] [2019-11-28 18:11:48,977 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:48,977 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:11:48,978 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795111579] [2019-11-28 18:11:48,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:11:48,978 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:48,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:11:48,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:48,979 INFO L87 Difference]: Start difference. First operand 558 states and 1147 transitions. Second operand 7 states. [2019-11-28 18:11:49,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:49,156 INFO L93 Difference]: Finished difference Result 1472 states and 2932 transitions. [2019-11-28 18:11:49,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:11:49,157 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2019-11-28 18:11:49,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:49,159 INFO L225 Difference]: With dead ends: 1472 [2019-11-28 18:11:49,159 INFO L226 Difference]: Without dead ends: 1119 [2019-11-28 18:11:49,159 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:11:49,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1119 states. [2019-11-28 18:11:49,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1119 to 527. [2019-11-28 18:11:49,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 527 states. [2019-11-28 18:11:49,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 527 states to 527 states and 1075 transitions. [2019-11-28 18:11:49,173 INFO L78 Accepts]: Start accepts. Automaton has 527 states and 1075 transitions. Word has length 53 [2019-11-28 18:11:49,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:49,173 INFO L462 AbstractCegarLoop]: Abstraction has 527 states and 1075 transitions. [2019-11-28 18:11:49,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:11:49,174 INFO L276 IsEmpty]: Start isEmpty. Operand 527 states and 1075 transitions. [2019-11-28 18:11:49,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:49,175 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:49,176 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:49,176 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:49,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:49,176 INFO L82 PathProgramCache]: Analyzing trace with hash -1691396374, now seen corresponding path program 2 times [2019-11-28 18:11:49,177 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:49,177 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492105502] [2019-11-28 18:11:49,177 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:49,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:11:49,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:11:49,303 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:11:49,303 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:11:49,307 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] ULTIMATE.startENTRY-->L814: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= (store .cse0 |v_ULTIMATE.start_main_~#t837~0.base_35| 1) |v_#valid_63|) (= 0 v_~a$w_buff1~0_316) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t837~0.base_35| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t837~0.base_35|) |v_ULTIMATE.start_main_~#t837~0.offset_23| 0))) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_cnt~0_62) (= v_~z~0_11 0) (= 0 v_~a$read_delayed~0_7) (= 0 |v_ULTIMATE.start_main_~#t837~0.offset_23|) (= v_~y~0_90 0) (= 0 v_~a$r_buff1_thd2~0_271) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t837~0.base_35|)) (= v_~__unbuffered_p1_EBX~0_60 0) (= v_~a$flush_delayed~0_23 0) (= v_~main$tmp_guard1~0_43 0) (< 0 |v_#StackHeapBarrier_15|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t837~0.base_35| 4)) (= 0 v_~a$w_buff0_used~0_830) (= 0 v_~a$w_buff1_used~0_501) (= 0 |v_#NULL.base_4|) (= v_~x~0_85 0) (= 0 v_~a$r_buff1_thd1~0_132) (= 0 v_~weak$$choice0~0_11) (= 0 v_~a$r_buff0_thd1~0_236) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t837~0.base_35|) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~a$r_buff0_thd2~0_373) (= |v_#NULL.offset_4| 0) (= v_~__unbuffered_p0_EBX~0_115 0) (= v_~a$mem_tmp~0_14 0) (= v_~weak$$choice2~0_107 0) (= v_~a~0_150 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~a$r_buff1_thd0~0_178 0) (= v_~a$r_buff0_thd0~0_163 0) (= v_~a$w_buff0~0_518 0) (= 0 v_~__unbuffered_p1_EAX~0_46) (= 0 v_~__unbuffered_p0_EAX~0_117))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_271, ULTIMATE.start_main_~#t838~0.offset=|v_ULTIMATE.start_main_~#t838~0.offset_16|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_373, #NULL.offset=|v_#NULL.offset_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ULTIMATE.start_main_~#t838~0.base=|v_ULTIMATE.start_main_~#t838~0.base_27|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_163, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_87|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ULTIMATE.start_main_~#t837~0.base=|v_ULTIMATE.start_main_~#t837~0.base_35|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ~a~0=v_~a~0_150, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_117, ~a$w_buff1~0=v_~a$w_buff1~0_316, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, #length=|v_#length_15|, ~y~0=v_~y~0_90, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_60, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_115, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_132, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_830, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_236, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_4|, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_95|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_87|, ~a$w_buff0~0=v_~a$w_buff0~0_518, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_178, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ULTIMATE.start_main_~#t837~0.offset=|v_ULTIMATE.start_main_~#t837~0.offset_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_19|, ~z~0=v_~z~0_11, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_501, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~x~0=v_~x~0_85, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$read_delayed~0, ~a$r_buff1_thd2~0, ULTIMATE.start_main_~#t838~0.offset, ~a$r_buff0_thd2~0, #NULL.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_~#t838~0.base, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t837~0.base, ~a$mem_tmp~0, ~a~0, ~__unbuffered_p0_EAX~0, ~a$w_buff1~0, ~__unbuffered_p1_EAX~0, #length, ~y~0, ~__unbuffered_p1_EBX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite40, ~a$w_buff0~0, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t837~0.offset, ULTIMATE.start_main_#t~nondet39, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~x~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-11-28 18:11:49,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] P0ENTRY-->L4-3: Formula: (and (= (ite (not (and (not (= 0 (mod ~a$w_buff0_used~0_Out1492932492 256))) (not (= (mod ~a$w_buff1_used~0_Out1492932492 256) 0)))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1492932492|) (= P0Thread1of1ForFork0_~arg.offset_Out1492932492 |P0Thread1of1ForFork0_#in~arg.offset_In1492932492|) (= ~a$w_buff0_used~0_Out1492932492 1) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1492932492)) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1492932492| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1492932492) (= ~a$w_buff0~0_Out1492932492 1) (= |P0Thread1of1ForFork0_#in~arg.base_In1492932492| P0Thread1of1ForFork0_~arg.base_Out1492932492) (= ~a$w_buff0_used~0_In1492932492 ~a$w_buff1_used~0_Out1492932492) (= ~a$w_buff0~0_In1492932492 ~a$w_buff1~0_Out1492932492)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1492932492|, ~a$w_buff0~0=~a$w_buff0~0_In1492932492, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1492932492|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1492932492} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1492932492|, ~a$w_buff1~0=~a$w_buff1~0_Out1492932492, ~a$w_buff0~0=~a$w_buff0~0_Out1492932492, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1492932492, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1492932492|, ~a$w_buff0_used~0=~a$w_buff0_used~0_Out1492932492, ~a$w_buff1_used~0=~a$w_buff1_used~0_Out1492932492, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out1492932492, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1492932492|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out1492932492} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~a$w_buff0_used~0, ~a$w_buff1_used~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-11-28 18:11:49,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L814-1-->L816: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t838~0.base_10| 4)) (= (select |v_#valid_20| |v_ULTIMATE.start_main_~#t838~0.base_10|) 0) (not (= |v_ULTIMATE.start_main_~#t838~0.base_10| 0)) (= 0 |v_ULTIMATE.start_main_~#t838~0.offset_9|) (= |v_#valid_19| (store |v_#valid_20| |v_ULTIMATE.start_main_~#t838~0.base_10| 1)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t838~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t838~0.base_10|) |v_ULTIMATE.start_main_~#t838~0.offset_9| 1)) |v_#memory_int_7|) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t838~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_20|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_19|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_~#t838~0.offset=|v_ULTIMATE.start_main_~#t838~0.offset_9|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_9|, ULTIMATE.start_main_~#t838~0.base=|v_ULTIMATE.start_main_~#t838~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t838~0.offset, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t838~0.base] because there is no mapped edge [2019-11-28 18:11:49,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L783-->L783-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1269752360 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite23_In1269752360| |P1Thread1of1ForFork1_#t~ite23_Out1269752360|) (not .cse0) (= |P1Thread1of1ForFork1_#t~ite24_Out1269752360| ~a$w_buff1_used~0_In1269752360)) (and (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1269752360 256)))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1269752360 256))) (= 0 (mod ~a$w_buff0_used~0_In1269752360 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In1269752360 256))))) .cse0 (= ~a$w_buff1_used~0_In1269752360 |P1Thread1of1ForFork1_#t~ite23_Out1269752360|) (= |P1Thread1of1ForFork1_#t~ite24_Out1269752360| |P1Thread1of1ForFork1_#t~ite23_Out1269752360|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1269752360, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1269752360, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_In1269752360|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1269752360, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1269752360, ~weak$$choice2~0=~weak$$choice2~0_In1269752360} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1269752360, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_Out1269752360|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1269752360, P1Thread1of1ForFork1_#t~ite24=|P1Thread1of1ForFork1_#t~ite24_Out1269752360|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1269752360, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1269752360, ~weak$$choice2~0=~weak$$choice2~0_In1269752360} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite23, P1Thread1of1ForFork1_#t~ite24] because there is no mapped edge [2019-11-28 18:11:49,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L784-->L785: Formula: (and (not (= (mod v_~weak$$choice2~0_38 256) 0)) (= v_~a$r_buff0_thd2~0_146 v_~a$r_buff0_thd2~0_147)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_147, ~weak$$choice2~0=v_~weak$$choice2~0_38} OutVars{~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_6|, ~weak$$choice2~0=v_~weak$$choice2~0_38, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_13|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_10|} AuxVars[] AssignedVars[~a$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite27, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-11-28 18:11:49,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-578824192 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-578824192 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out-578824192| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-578824192| ~a$w_buff0_used~0_In-578824192)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-578824192, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-578824192} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-578824192|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-578824192, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-578824192} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:11:49,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L754-->L754-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1170814014 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1170814014 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1170814014 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In1170814014 256) 0))) (or (and (= ~a$w_buff1_used~0_In1170814014 |P0Thread1of1ForFork0_#t~ite6_Out1170814014|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out1170814014| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1170814014, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1170814014, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1170814014, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1170814014} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1170814014|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1170814014, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1170814014, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1170814014, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1170814014} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:11:49,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L755-->L756: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-348260229 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_In-348260229 ~a$r_buff0_thd1~0_Out-348260229)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-348260229 256)))) (or (and .cse0 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-348260229) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-348260229, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-348260229} OutVars{P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-348260229|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-348260229, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-348260229} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:11:49,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In2127422513 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In2127422513 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In2127422513 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In2127422513 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out2127422513| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out2127422513| ~a$r_buff1_thd1~0_In2127422513) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2127422513, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2127422513, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2127422513, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2127422513} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2127422513, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out2127422513|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2127422513, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2127422513, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2127422513} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:11:49,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L756-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:11:49,319 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L787-->L791: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_14 256))) (= v_~a~0_48 v_~a$mem_tmp~0_7) (= v_~a$flush_delayed~0_13 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_14} OutVars{~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_13, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_11|} AuxVars[] AssignedVars[~a~0, ~a$flush_delayed~0, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-11-28 18:11:49,319 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L791-2-->L791-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork1_#t~ite33_Out-2114873591| |P1Thread1of1ForFork1_#t~ite32_Out-2114873591|)) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-2114873591 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-2114873591 256) 0))) (or (and (not .cse0) .cse1 (= ~a$w_buff1~0_In-2114873591 |P1Thread1of1ForFork1_#t~ite32_Out-2114873591|) (not .cse2)) (and .cse1 (or .cse2 .cse0) (= ~a~0_In-2114873591 |P1Thread1of1ForFork1_#t~ite32_Out-2114873591|)))) InVars {~a~0=~a~0_In-2114873591, ~a$w_buff1~0=~a$w_buff1~0_In-2114873591, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2114873591, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2114873591} OutVars{~a~0=~a~0_In-2114873591, ~a$w_buff1~0=~a$w_buff1~0_In-2114873591, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2114873591, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out-2114873591|, P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out-2114873591|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2114873591} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-11-28 18:11:49,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L792-->L792-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-743309003 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-743309003 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite34_Out-743309003|) (not .cse1)) (and (= ~a$w_buff0_used~0_In-743309003 |P1Thread1of1ForFork1_#t~ite34_Out-743309003|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-743309003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-743309003} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out-743309003|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-743309003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-743309003} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-11-28 18:11:49,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L793-->L793-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-849936052 256))) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-849936052 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-849936052 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-849936052 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-849936052 |P1Thread1of1ForFork1_#t~ite35_Out-849936052|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite35_Out-849936052| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-849936052, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-849936052, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-849936052, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-849936052} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-849936052, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-849936052, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-849936052, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out-849936052|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-849936052} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-11-28 18:11:49,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L794-->L794-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-807490732 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-807490732 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite36_Out-807490732| 0) (not .cse0) (not .cse1)) (and (= ~a$r_buff0_thd2~0_In-807490732 |P1Thread1of1ForFork1_#t~ite36_Out-807490732|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-807490732, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-807490732} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-807490732, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-807490732, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-807490732|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-11-28 18:11:49,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L795-->L795-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-789785369 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-789785369 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-789785369 256))) (.cse3 (= (mod ~a$r_buff1_thd2~0_In-789785369 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite37_Out-789785369|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$r_buff1_thd2~0_In-789785369 |P1Thread1of1ForFork1_#t~ite37_Out-789785369|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-789785369, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-789785369, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-789785369, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-789785369} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-789785369, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-789785369, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-789785369, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-789785369, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out-789785369|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:11:49,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L795-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite37_22| v_~a$r_buff1_thd2~0_110) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_110, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:11:49,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L816-1-->L822: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_7|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-11-28 18:11:49,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L822-2-->L822-4: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd0~0_In-650327422 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-650327422 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite40_Out-650327422| ~a~0_In-650327422) (or .cse0 .cse1)) (and (not .cse1) (= ~a$w_buff1~0_In-650327422 |ULTIMATE.start_main_#t~ite40_Out-650327422|) (not .cse0)))) InVars {~a~0=~a~0_In-650327422, ~a$w_buff1~0=~a$w_buff1~0_In-650327422, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-650327422, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-650327422} OutVars{~a~0=~a~0_In-650327422, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-650327422|, ~a$w_buff1~0=~a$w_buff1~0_In-650327422, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-650327422, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-650327422} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:11:49,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L822-4-->L823: Formula: (= v_~a~0_26 |v_ULTIMATE.start_main_#t~ite40_17|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_17|} OutVars{~a~0=v_~a~0_26, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:11:49,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In658200225 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In658200225 256)))) (or (and (= |ULTIMATE.start_main_#t~ite42_Out658200225| ~a$w_buff0_used~0_In658200225) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite42_Out658200225|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In658200225, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In658200225} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In658200225, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In658200225, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out658200225|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:11:49,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L824-->L824-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In388661137 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In388661137 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In388661137 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In388661137 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite43_Out388661137|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In388661137 |ULTIMATE.start_main_#t~ite43_Out388661137|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In388661137, ~a$w_buff0_used~0=~a$w_buff0_used~0_In388661137, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In388661137, ~a$w_buff1_used~0=~a$w_buff1_used~0_In388661137} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In388661137, ~a$w_buff0_used~0=~a$w_buff0_used~0_In388661137, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In388661137, ~a$w_buff1_used~0=~a$w_buff1_used~0_In388661137, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out388661137|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-11-28 18:11:49,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1951311288 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1951311288 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-1951311288| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite44_Out-1951311288| ~a$r_buff0_thd0~0_In-1951311288) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1951311288, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1951311288} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1951311288, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1951311288, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1951311288|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:11:49,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L826-->L826-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-159420647 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-159420647 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-159420647 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-159420647 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite45_Out-159420647| ~a$r_buff1_thd0~0_In-159420647)) (and (= 0 |ULTIMATE.start_main_#t~ite45_Out-159420647|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-159420647, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-159420647, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-159420647, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-159420647} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-159420647, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-159420647, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-159420647, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-159420647, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-159420647|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-11-28 18:11:49,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L826-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~a$r_buff1_thd0~0_147 |v_ULTIMATE.start_main_#t~ite45_39|) (= v_~main$tmp_guard1~0_18 (ite (= (ite (not (and (= v_~__unbuffered_p1_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_86 0) (= 1 v_~__unbuffered_p1_EAX~0_18) (= 1 v_~__unbuffered_p0_EAX~0_88))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_147, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:11:49,394 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:11:49 BasicIcfg [2019-11-28 18:11:49,394 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:11:49,395 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:11:49,395 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:11:49,395 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:11:49,396 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:11:30" (3/4) ... [2019-11-28 18:11:49,399 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:11:49,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] ULTIMATE.startENTRY-->L814: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= (store .cse0 |v_ULTIMATE.start_main_~#t837~0.base_35| 1) |v_#valid_63|) (= 0 v_~a$w_buff1~0_316) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t837~0.base_35| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t837~0.base_35|) |v_ULTIMATE.start_main_~#t837~0.offset_23| 0))) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_cnt~0_62) (= v_~z~0_11 0) (= 0 v_~a$read_delayed~0_7) (= 0 |v_ULTIMATE.start_main_~#t837~0.offset_23|) (= v_~y~0_90 0) (= 0 v_~a$r_buff1_thd2~0_271) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t837~0.base_35|)) (= v_~__unbuffered_p1_EBX~0_60 0) (= v_~a$flush_delayed~0_23 0) (= v_~main$tmp_guard1~0_43 0) (< 0 |v_#StackHeapBarrier_15|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t837~0.base_35| 4)) (= 0 v_~a$w_buff0_used~0_830) (= 0 v_~a$w_buff1_used~0_501) (= 0 |v_#NULL.base_4|) (= v_~x~0_85 0) (= 0 v_~a$r_buff1_thd1~0_132) (= 0 v_~weak$$choice0~0_11) (= 0 v_~a$r_buff0_thd1~0_236) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t837~0.base_35|) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~a$r_buff0_thd2~0_373) (= |v_#NULL.offset_4| 0) (= v_~__unbuffered_p0_EBX~0_115 0) (= v_~a$mem_tmp~0_14 0) (= v_~weak$$choice2~0_107 0) (= v_~a~0_150 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~a$r_buff1_thd0~0_178 0) (= v_~a$r_buff0_thd0~0_163 0) (= v_~a$w_buff0~0_518 0) (= 0 v_~__unbuffered_p1_EAX~0_46) (= 0 v_~__unbuffered_p0_EAX~0_117))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_271, ULTIMATE.start_main_~#t838~0.offset=|v_ULTIMATE.start_main_~#t838~0.offset_16|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_373, #NULL.offset=|v_#NULL.offset_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ULTIMATE.start_main_~#t838~0.base=|v_ULTIMATE.start_main_~#t838~0.base_27|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_163, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_87|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ULTIMATE.start_main_~#t837~0.base=|v_ULTIMATE.start_main_~#t837~0.base_35|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ~a~0=v_~a~0_150, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_117, ~a$w_buff1~0=v_~a$w_buff1~0_316, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, #length=|v_#length_15|, ~y~0=v_~y~0_90, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_60, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_115, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_132, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_830, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_236, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_4|, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_95|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_87|, ~a$w_buff0~0=v_~a$w_buff0~0_518, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_178, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ULTIMATE.start_main_~#t837~0.offset=|v_ULTIMATE.start_main_~#t837~0.offset_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_19|, ~z~0=v_~z~0_11, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_501, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~x~0=v_~x~0_85, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$read_delayed~0, ~a$r_buff1_thd2~0, ULTIMATE.start_main_~#t838~0.offset, ~a$r_buff0_thd2~0, #NULL.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_~#t838~0.base, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t837~0.base, ~a$mem_tmp~0, ~a~0, ~__unbuffered_p0_EAX~0, ~a$w_buff1~0, ~__unbuffered_p1_EAX~0, #length, ~y~0, ~__unbuffered_p1_EBX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite40, ~a$w_buff0~0, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t837~0.offset, ULTIMATE.start_main_#t~nondet39, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~x~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-11-28 18:11:49,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] P0ENTRY-->L4-3: Formula: (and (= (ite (not (and (not (= 0 (mod ~a$w_buff0_used~0_Out1492932492 256))) (not (= (mod ~a$w_buff1_used~0_Out1492932492 256) 0)))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1492932492|) (= P0Thread1of1ForFork0_~arg.offset_Out1492932492 |P0Thread1of1ForFork0_#in~arg.offset_In1492932492|) (= ~a$w_buff0_used~0_Out1492932492 1) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1492932492)) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1492932492| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1492932492) (= ~a$w_buff0~0_Out1492932492 1) (= |P0Thread1of1ForFork0_#in~arg.base_In1492932492| P0Thread1of1ForFork0_~arg.base_Out1492932492) (= ~a$w_buff0_used~0_In1492932492 ~a$w_buff1_used~0_Out1492932492) (= ~a$w_buff0~0_In1492932492 ~a$w_buff1~0_Out1492932492)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1492932492|, ~a$w_buff0~0=~a$w_buff0~0_In1492932492, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1492932492|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1492932492} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1492932492|, ~a$w_buff1~0=~a$w_buff1~0_Out1492932492, ~a$w_buff0~0=~a$w_buff0~0_Out1492932492, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1492932492, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1492932492|, ~a$w_buff0_used~0=~a$w_buff0_used~0_Out1492932492, ~a$w_buff1_used~0=~a$w_buff1_used~0_Out1492932492, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out1492932492, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1492932492|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out1492932492} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~a$w_buff0_used~0, ~a$w_buff1_used~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-11-28 18:11:49,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L814-1-->L816: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t838~0.base_10| 4)) (= (select |v_#valid_20| |v_ULTIMATE.start_main_~#t838~0.base_10|) 0) (not (= |v_ULTIMATE.start_main_~#t838~0.base_10| 0)) (= 0 |v_ULTIMATE.start_main_~#t838~0.offset_9|) (= |v_#valid_19| (store |v_#valid_20| |v_ULTIMATE.start_main_~#t838~0.base_10| 1)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t838~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t838~0.base_10|) |v_ULTIMATE.start_main_~#t838~0.offset_9| 1)) |v_#memory_int_7|) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t838~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_20|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_19|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_~#t838~0.offset=|v_ULTIMATE.start_main_~#t838~0.offset_9|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_9|, ULTIMATE.start_main_~#t838~0.base=|v_ULTIMATE.start_main_~#t838~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t838~0.offset, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t838~0.base] because there is no mapped edge [2019-11-28 18:11:49,405 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L783-->L783-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1269752360 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite23_In1269752360| |P1Thread1of1ForFork1_#t~ite23_Out1269752360|) (not .cse0) (= |P1Thread1of1ForFork1_#t~ite24_Out1269752360| ~a$w_buff1_used~0_In1269752360)) (and (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1269752360 256)))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1269752360 256))) (= 0 (mod ~a$w_buff0_used~0_In1269752360 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In1269752360 256))))) .cse0 (= ~a$w_buff1_used~0_In1269752360 |P1Thread1of1ForFork1_#t~ite23_Out1269752360|) (= |P1Thread1of1ForFork1_#t~ite24_Out1269752360| |P1Thread1of1ForFork1_#t~ite23_Out1269752360|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1269752360, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1269752360, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_In1269752360|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1269752360, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1269752360, ~weak$$choice2~0=~weak$$choice2~0_In1269752360} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1269752360, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_Out1269752360|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1269752360, P1Thread1of1ForFork1_#t~ite24=|P1Thread1of1ForFork1_#t~ite24_Out1269752360|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1269752360, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1269752360, ~weak$$choice2~0=~weak$$choice2~0_In1269752360} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite23, P1Thread1of1ForFork1_#t~ite24] because there is no mapped edge [2019-11-28 18:11:49,406 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L784-->L785: Formula: (and (not (= (mod v_~weak$$choice2~0_38 256) 0)) (= v_~a$r_buff0_thd2~0_146 v_~a$r_buff0_thd2~0_147)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_147, ~weak$$choice2~0=v_~weak$$choice2~0_38} OutVars{~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_6|, ~weak$$choice2~0=v_~weak$$choice2~0_38, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_13|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_10|} AuxVars[] AssignedVars[~a$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite27, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-11-28 18:11:49,408 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-578824192 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-578824192 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out-578824192| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-578824192| ~a$w_buff0_used~0_In-578824192)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-578824192, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-578824192} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-578824192|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-578824192, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-578824192} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:11:49,408 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L754-->L754-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1170814014 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1170814014 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1170814014 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In1170814014 256) 0))) (or (and (= ~a$w_buff1_used~0_In1170814014 |P0Thread1of1ForFork0_#t~ite6_Out1170814014|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out1170814014| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1170814014, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1170814014, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1170814014, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1170814014} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1170814014|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1170814014, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1170814014, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1170814014, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1170814014} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:11:49,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L755-->L756: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-348260229 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_In-348260229 ~a$r_buff0_thd1~0_Out-348260229)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-348260229 256)))) (or (and .cse0 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-348260229) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-348260229, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-348260229} OutVars{P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-348260229|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-348260229, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-348260229} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:11:49,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In2127422513 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In2127422513 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In2127422513 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In2127422513 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out2127422513| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out2127422513| ~a$r_buff1_thd1~0_In2127422513) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2127422513, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2127422513, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2127422513, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2127422513} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2127422513, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out2127422513|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2127422513, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2127422513, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2127422513} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:11:49,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L756-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:11:49,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L787-->L791: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_14 256))) (= v_~a~0_48 v_~a$mem_tmp~0_7) (= v_~a$flush_delayed~0_13 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_14} OutVars{~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_13, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_11|} AuxVars[] AssignedVars[~a~0, ~a$flush_delayed~0, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-11-28 18:11:49,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L791-2-->L791-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork1_#t~ite33_Out-2114873591| |P1Thread1of1ForFork1_#t~ite32_Out-2114873591|)) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-2114873591 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-2114873591 256) 0))) (or (and (not .cse0) .cse1 (= ~a$w_buff1~0_In-2114873591 |P1Thread1of1ForFork1_#t~ite32_Out-2114873591|) (not .cse2)) (and .cse1 (or .cse2 .cse0) (= ~a~0_In-2114873591 |P1Thread1of1ForFork1_#t~ite32_Out-2114873591|)))) InVars {~a~0=~a~0_In-2114873591, ~a$w_buff1~0=~a$w_buff1~0_In-2114873591, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2114873591, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2114873591} OutVars{~a~0=~a~0_In-2114873591, ~a$w_buff1~0=~a$w_buff1~0_In-2114873591, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2114873591, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out-2114873591|, P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out-2114873591|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2114873591} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-11-28 18:11:49,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L792-->L792-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-743309003 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-743309003 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite34_Out-743309003|) (not .cse1)) (and (= ~a$w_buff0_used~0_In-743309003 |P1Thread1of1ForFork1_#t~ite34_Out-743309003|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-743309003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-743309003} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out-743309003|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-743309003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-743309003} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-11-28 18:11:49,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L793-->L793-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-849936052 256))) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-849936052 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-849936052 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-849936052 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-849936052 |P1Thread1of1ForFork1_#t~ite35_Out-849936052|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite35_Out-849936052| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-849936052, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-849936052, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-849936052, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-849936052} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-849936052, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-849936052, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-849936052, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out-849936052|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-849936052} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-11-28 18:11:49,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L794-->L794-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-807490732 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-807490732 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite36_Out-807490732| 0) (not .cse0) (not .cse1)) (and (= ~a$r_buff0_thd2~0_In-807490732 |P1Thread1of1ForFork1_#t~ite36_Out-807490732|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-807490732, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-807490732} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-807490732, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-807490732, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-807490732|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-11-28 18:11:49,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L795-->L795-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-789785369 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-789785369 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-789785369 256))) (.cse3 (= (mod ~a$r_buff1_thd2~0_In-789785369 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite37_Out-789785369|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$r_buff1_thd2~0_In-789785369 |P1Thread1of1ForFork1_#t~ite37_Out-789785369|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-789785369, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-789785369, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-789785369, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-789785369} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-789785369, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-789785369, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-789785369, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-789785369, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out-789785369|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:11:49,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L795-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite37_22| v_~a$r_buff1_thd2~0_110) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_110, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:11:49,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L816-1-->L822: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_7|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-11-28 18:11:49,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L822-2-->L822-4: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd0~0_In-650327422 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-650327422 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite40_Out-650327422| ~a~0_In-650327422) (or .cse0 .cse1)) (and (not .cse1) (= ~a$w_buff1~0_In-650327422 |ULTIMATE.start_main_#t~ite40_Out-650327422|) (not .cse0)))) InVars {~a~0=~a~0_In-650327422, ~a$w_buff1~0=~a$w_buff1~0_In-650327422, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-650327422, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-650327422} OutVars{~a~0=~a~0_In-650327422, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-650327422|, ~a$w_buff1~0=~a$w_buff1~0_In-650327422, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-650327422, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-650327422} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:11:49,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L822-4-->L823: Formula: (= v_~a~0_26 |v_ULTIMATE.start_main_#t~ite40_17|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_17|} OutVars{~a~0=v_~a~0_26, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:11:49,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In658200225 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In658200225 256)))) (or (and (= |ULTIMATE.start_main_#t~ite42_Out658200225| ~a$w_buff0_used~0_In658200225) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite42_Out658200225|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In658200225, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In658200225} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In658200225, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In658200225, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out658200225|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:11:49,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L824-->L824-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In388661137 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In388661137 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In388661137 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In388661137 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite43_Out388661137|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In388661137 |ULTIMATE.start_main_#t~ite43_Out388661137|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In388661137, ~a$w_buff0_used~0=~a$w_buff0_used~0_In388661137, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In388661137, ~a$w_buff1_used~0=~a$w_buff1_used~0_In388661137} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In388661137, ~a$w_buff0_used~0=~a$w_buff0_used~0_In388661137, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In388661137, ~a$w_buff1_used~0=~a$w_buff1_used~0_In388661137, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out388661137|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-11-28 18:11:49,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1951311288 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1951311288 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-1951311288| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite44_Out-1951311288| ~a$r_buff0_thd0~0_In-1951311288) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1951311288, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1951311288} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1951311288, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1951311288, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1951311288|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:11:49,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L826-->L826-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-159420647 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-159420647 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-159420647 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-159420647 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite45_Out-159420647| ~a$r_buff1_thd0~0_In-159420647)) (and (= 0 |ULTIMATE.start_main_#t~ite45_Out-159420647|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-159420647, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-159420647, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-159420647, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-159420647} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-159420647, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-159420647, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-159420647, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-159420647, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-159420647|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-11-28 18:11:49,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L826-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~a$r_buff1_thd0~0_147 |v_ULTIMATE.start_main_#t~ite45_39|) (= v_~main$tmp_guard1~0_18 (ite (= (ite (not (and (= v_~__unbuffered_p1_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_86 0) (= 1 v_~__unbuffered_p1_EAX~0_18) (= 1 v_~__unbuffered_p0_EAX~0_88))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_147, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:11:49,500 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:11:49,501 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:11:49,503 INFO L168 Benchmark]: Toolchain (without parser) took 20728.54 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 456.1 MB). Free memory was 955.0 MB in the beginning and 824.3 MB in the end (delta: 130.7 MB). Peak memory consumption was 586.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:49,503 INFO L168 Benchmark]: CDTParser took 1.00 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:11:49,504 INFO L168 Benchmark]: CACSL2BoogieTranslator took 784.96 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 139.5 MB). Free memory was 949.6 MB in the beginning and 1.1 GB in the end (delta: -157.7 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:49,505 INFO L168 Benchmark]: Boogie Procedure Inliner took 66.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:49,505 INFO L168 Benchmark]: Boogie Preprocessor took 40.53 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:11:49,505 INFO L168 Benchmark]: RCFGBuilder took 790.49 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:49,506 INFO L168 Benchmark]: TraceAbstraction took 18932.97 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 316.7 MB). Free memory was 1.1 GB in the beginning and 836.5 MB in the end (delta: 219.5 MB). Peak memory consumption was 536.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:49,506 INFO L168 Benchmark]: Witness Printer took 106.12 ms. Allocated memory is still 1.5 GB. Free memory was 836.5 MB in the beginning and 824.3 MB in the end (delta: 12.2 MB). Peak memory consumption was 12.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:49,509 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.00 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 784.96 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 139.5 MB). Free memory was 949.6 MB in the beginning and 1.1 GB in the end (delta: -157.7 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 66.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 40.53 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 790.49 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18932.97 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 316.7 MB). Free memory was 1.1 GB in the beginning and 836.5 MB in the end (delta: 219.5 MB). Peak memory consumption was 536.1 MB. Max. memory is 11.5 GB. * Witness Printer took 106.12 ms. Allocated memory is still 1.5 GB. Free memory was 836.5 MB in the beginning and 824.3 MB in the end (delta: 12.2 MB). Peak memory consumption was 12.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.5s, 151 ProgramPointsBefore, 77 ProgramPointsAfterwards, 185 TransitionsBefore, 89 TransitionsAfterwards, 12056 CoEnabledTransitionPairs, 8 FixpointIterations, 33 TrivialSequentialCompositions, 40 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 5174 VarBasedMoverChecksPositive, 220 VarBasedMoverChecksNegative, 43 SemBasedMoverChecksPositive, 239 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.8s, 0 MoverChecksTotal, 55357 CheckedPairsTotal, 107 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L814] FCALL, FORK 0 pthread_create(&t837, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L816] FCALL, FORK 0 pthread_create(&t838, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L738] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L739] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L740] 1 a$r_buff0_thd1 = (_Bool)1 [L743] 1 x = 1 [L746] 1 __unbuffered_p0_EAX = x [L749] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L766] 2 y = 1 [L769] 2 z = 1 [L772] 2 __unbuffered_p1_EAX = z [L775] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L776] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L777] 2 a$flush_delayed = weak$$choice2 [L778] 2 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=1] [L779] EXPR 2 !a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=1] [L779] 2 a = !a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1) [L780] EXPR 2 weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0))=1, x=1, y=1, z=1] [L780] 2 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0)) [L752] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=1] [L781] EXPR 2 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L781] 2 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1)) [L782] EXPR 2 weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used))=1, x=1, y=1, z=1] [L782] 2 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used)) [L783] 2 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L785] EXPR 2 weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L785] 2 a$r_buff1_thd2 = weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L786] 2 __unbuffered_p1_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=1] [L752] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L753] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L754] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L791] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=1] [L791] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L792] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L793] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L794] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L822] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=1] [L823] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L824] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L825] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 145 locations, 2 error locations. Result: UNSAFE, OverallTime: 18.6s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 7.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3230 SDtfs, 3812 SDslu, 6762 SDs, 0 SdLazy, 4812 SolverSat, 204 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 207 GetRequests, 44 SyntacticMatches, 22 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8640occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.1s AutomataMinimizationTime, 25 MinimizatonAttempts, 8352 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 1052 NumberOfCodeBlocks, 1052 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 974 ConstructedInterpolants, 0 QuantifiedInterpolants, 300739 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...