./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix031_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix031_rmo.oepc.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b1c13a629685f920d5ce9018248d0b9f939b2481 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:11:33,111 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:11:33,114 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:11:33,134 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:11:33,135 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:11:33,137 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:11:33,139 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:11:33,153 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:11:33,156 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:11:33,157 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:11:33,158 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:11:33,159 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:11:33,160 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:11:33,161 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:11:33,162 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:11:33,163 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:11:33,164 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:11:33,165 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:11:33,167 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:11:33,169 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:11:33,170 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:11:33,172 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:11:33,173 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:11:33,174 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:11:33,176 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:11:33,177 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:11:33,178 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:11:33,179 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:11:33,180 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:11:33,182 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:11:33,183 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:11:33,184 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:11:33,185 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:11:33,185 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:11:33,187 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:11:33,190 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:11:33,191 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:11:33,192 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:11:33,192 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:11:33,193 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:11:33,197 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:11:33,199 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:11:33,222 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:11:33,223 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:11:33,225 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:11:33,226 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:11:33,226 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:11:33,226 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:11:33,227 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:11:33,227 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:11:33,227 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:11:33,228 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:11:33,229 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:11:33,229 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:11:33,230 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:11:33,230 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:11:33,230 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:11:33,231 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:11:33,231 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:11:33,231 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:11:33,232 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:11:33,232 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:11:33,233 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:11:33,233 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:11:33,233 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:11:33,234 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:11:33,234 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:11:33,234 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:11:33,234 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:11:33,235 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:11:33,235 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:11:33,235 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b1c13a629685f920d5ce9018248d0b9f939b2481 [2019-11-28 18:11:33,571 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:11:33,590 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:11:33,594 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:11:33,596 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:11:33,597 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:11:33,598 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix031_rmo.oepc.i [2019-11-28 18:11:33,675 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/93b8564a4/fe48c0a5937b4ecd833465e0fb5a5a5b/FLAG9190314a2 [2019-11-28 18:11:34,254 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:11:34,258 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix031_rmo.oepc.i [2019-11-28 18:11:34,284 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/93b8564a4/fe48c0a5937b4ecd833465e0fb5a5a5b/FLAG9190314a2 [2019-11-28 18:11:34,543 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/93b8564a4/fe48c0a5937b4ecd833465e0fb5a5a5b [2019-11-28 18:11:34,546 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:11:34,548 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:11:34,549 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:11:34,549 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:11:34,552 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:11:34,553 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:11:34" (1/1) ... [2019-11-28 18:11:34,555 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a89df04 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:34, skipping insertion in model container [2019-11-28 18:11:34,556 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:11:34" (1/1) ... [2019-11-28 18:11:34,562 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:11:34,625 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:11:35,150 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:11:35,169 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:11:35,275 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:11:35,359 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:11:35,360 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35 WrapperNode [2019-11-28 18:11:35,360 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:11:35,361 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:11:35,361 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:11:35,361 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:11:35,368 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,393 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,424 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:11:35,425 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:11:35,425 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:11:35,425 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:11:35,436 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,436 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,441 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,442 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,453 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,458 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,462 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... [2019-11-28 18:11:35,467 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:11:35,467 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:11:35,468 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:11:35,468 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:11:35,469 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:11:35,523 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:11:35,524 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:11:35,524 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:11:35,524 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:11:35,525 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:11:35,525 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:11:35,525 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:11:35,526 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:11:35,526 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:11:35,527 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:11:35,528 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:11:35,530 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:11:36,227 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:11:36,228 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:11:36,229 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:11:36 BoogieIcfgContainer [2019-11-28 18:11:36,229 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:11:36,231 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:11:36,231 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:11:36,234 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:11:36,235 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:11:34" (1/3) ... [2019-11-28 18:11:36,236 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6aca76ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:11:36, skipping insertion in model container [2019-11-28 18:11:36,236 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:11:35" (2/3) ... [2019-11-28 18:11:36,237 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6aca76ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:11:36, skipping insertion in model container [2019-11-28 18:11:36,237 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:11:36" (3/3) ... [2019-11-28 18:11:36,239 INFO L109 eAbstractionObserver]: Analyzing ICFG mix031_rmo.oepc.i [2019-11-28 18:11:36,251 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:11:36,252 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:11:36,264 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:11:36,266 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:11:36,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,304 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,305 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,305 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,306 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,306 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,308 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,308 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,308 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,311 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,311 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,311 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,312 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,312 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,312 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,313 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,313 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,313 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,314 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,314 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,314 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,315 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,315 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,316 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,317 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,317 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,317 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,318 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,318 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,318 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,318 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,319 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,319 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,323 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,323 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,323 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,324 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,324 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,324 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,325 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,326 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,327 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,328 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,328 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,328 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,329 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,329 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,329 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,330 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,330 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,330 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,331 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,331 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,331 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,332 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,332 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,332 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,332 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,333 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,333 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,333 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,337 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,337 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,337 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,338 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,338 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,338 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,342 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,342 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,342 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,342 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,343 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,343 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,343 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,344 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,344 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,344 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,344 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,345 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,345 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,345 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,346 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,346 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,346 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,346 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,347 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,347 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,347 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,348 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,348 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,348 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,348 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,349 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,349 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,349 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,350 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,350 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,350 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,351 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,351 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,351 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,352 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,352 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,352 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:11:36,372 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:11:36,391 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:11:36,391 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:11:36,392 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:11:36,392 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:11:36,392 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:11:36,392 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:11:36,392 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:11:36,393 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:11:36,416 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 151 places, 185 transitions [2019-11-28 18:11:36,419 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 151 places, 185 transitions [2019-11-28 18:11:36,511 INFO L134 PetriNetUnfolder]: 41/183 cut-off events. [2019-11-28 18:11:36,512 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:11:36,528 INFO L76 FinitePrefix]: Finished finitePrefix Result has 190 conditions, 183 events. 41/183 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 575 event pairs. 6/146 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:11:36,553 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 151 places, 185 transitions [2019-11-28 18:11:36,643 INFO L134 PetriNetUnfolder]: 41/183 cut-off events. [2019-11-28 18:11:36,644 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:11:36,651 INFO L76 FinitePrefix]: Finished finitePrefix Result has 190 conditions, 183 events. 41/183 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 575 event pairs. 6/146 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:11:36,674 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12056 [2019-11-28 18:11:36,675 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:11:42,057 WARN L192 SmtUtils]: Spent 310.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-11-28 18:11:42,178 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2019-11-28 18:11:42,199 INFO L206 etLargeBlockEncoding]: Checked pairs total: 55357 [2019-11-28 18:11:42,200 INFO L214 etLargeBlockEncoding]: Total number of compositions: 107 [2019-11-28 18:11:42,204 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 77 places, 89 transitions [2019-11-28 18:11:42,753 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8640 states. [2019-11-28 18:11:42,757 INFO L276 IsEmpty]: Start isEmpty. Operand 8640 states. [2019-11-28 18:11:42,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-11-28 18:11:42,765 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:42,767 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-11-28 18:11:42,767 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:42,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:42,777 INFO L82 PathProgramCache]: Analyzing trace with hash 801135, now seen corresponding path program 1 times [2019-11-28 18:11:42,791 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:42,792 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124029440] [2019-11-28 18:11:42,792 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:42,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:43,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:43,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124029440] [2019-11-28 18:11:43,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:43,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:11:43,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008553799] [2019-11-28 18:11:43,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:43,040 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:43,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:43,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:43,060 INFO L87 Difference]: Start difference. First operand 8640 states. Second operand 3 states. [2019-11-28 18:11:43,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:43,319 INFO L93 Difference]: Finished difference Result 8472 states and 28002 transitions. [2019-11-28 18:11:43,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:43,321 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-11-28 18:11:43,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:43,410 INFO L225 Difference]: With dead ends: 8472 [2019-11-28 18:11:43,411 INFO L226 Difference]: Without dead ends: 7980 [2019-11-28 18:11:43,412 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:43,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7980 states. [2019-11-28 18:11:43,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7980 to 7980. [2019-11-28 18:11:43,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7980 states. [2019-11-28 18:11:43,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7980 states to 7980 states and 26329 transitions. [2019-11-28 18:11:43,821 INFO L78 Accepts]: Start accepts. Automaton has 7980 states and 26329 transitions. Word has length 3 [2019-11-28 18:11:43,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:43,821 INFO L462 AbstractCegarLoop]: Abstraction has 7980 states and 26329 transitions. [2019-11-28 18:11:43,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:43,822 INFO L276 IsEmpty]: Start isEmpty. Operand 7980 states and 26329 transitions. [2019-11-28 18:11:43,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:11:43,825 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:43,826 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:43,826 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:43,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:43,827 INFO L82 PathProgramCache]: Analyzing trace with hash -337363797, now seen corresponding path program 1 times [2019-11-28 18:11:43,827 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:43,827 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473930314] [2019-11-28 18:11:43,828 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:43,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:43,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:43,899 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1473930314] [2019-11-28 18:11:43,900 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:43,900 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:11:43,900 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28385626] [2019-11-28 18:11:43,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:43,902 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:43,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:43,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:43,903 INFO L87 Difference]: Start difference. First operand 7980 states and 26329 transitions. Second operand 3 states. [2019-11-28 18:11:43,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:43,932 INFO L93 Difference]: Finished difference Result 1284 states and 2972 transitions. [2019-11-28 18:11:43,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:43,933 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-11-28 18:11:43,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:43,941 INFO L225 Difference]: With dead ends: 1284 [2019-11-28 18:11:43,941 INFO L226 Difference]: Without dead ends: 1284 [2019-11-28 18:11:43,942 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:43,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1284 states. [2019-11-28 18:11:43,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1284 to 1284. [2019-11-28 18:11:43,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1284 states. [2019-11-28 18:11:43,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1284 states to 1284 states and 2972 transitions. [2019-11-28 18:11:43,974 INFO L78 Accepts]: Start accepts. Automaton has 1284 states and 2972 transitions. Word has length 11 [2019-11-28 18:11:43,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:43,975 INFO L462 AbstractCegarLoop]: Abstraction has 1284 states and 2972 transitions. [2019-11-28 18:11:43,975 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:43,975 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 2972 transitions. [2019-11-28 18:11:43,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:11:43,977 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:43,977 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:43,978 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:43,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:43,978 INFO L82 PathProgramCache]: Analyzing trace with hash 254708639, now seen corresponding path program 1 times [2019-11-28 18:11:43,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:43,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682799472] [2019-11-28 18:11:43,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:44,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:44,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:44,045 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1682799472] [2019-11-28 18:11:44,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:44,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:44,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420113825] [2019-11-28 18:11:44,046 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:44,046 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:44,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:44,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:44,046 INFO L87 Difference]: Start difference. First operand 1284 states and 2972 transitions. Second operand 3 states. [2019-11-28 18:11:44,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:44,128 INFO L93 Difference]: Finished difference Result 1993 states and 4593 transitions. [2019-11-28 18:11:44,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:44,129 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-11-28 18:11:44,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:44,142 INFO L225 Difference]: With dead ends: 1993 [2019-11-28 18:11:44,142 INFO L226 Difference]: Without dead ends: 1993 [2019-11-28 18:11:44,143 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:44,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1993 states. [2019-11-28 18:11:44,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1993 to 1444. [2019-11-28 18:11:44,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1444 states. [2019-11-28 18:11:44,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 3429 transitions. [2019-11-28 18:11:44,192 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 3429 transitions. Word has length 14 [2019-11-28 18:11:44,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:44,192 INFO L462 AbstractCegarLoop]: Abstraction has 1444 states and 3429 transitions. [2019-11-28 18:11:44,192 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:44,193 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 3429 transitions. [2019-11-28 18:11:44,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:11:44,194 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:44,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:44,194 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:44,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:44,195 INFO L82 PathProgramCache]: Analyzing trace with hash 254810970, now seen corresponding path program 1 times [2019-11-28 18:11:44,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:44,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647097733] [2019-11-28 18:11:44,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:44,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:44,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:44,310 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1647097733] [2019-11-28 18:11:44,310 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:44,310 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:11:44,310 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122319045] [2019-11-28 18:11:44,311 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:44,312 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:44,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:44,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:44,312 INFO L87 Difference]: Start difference. First operand 1444 states and 3429 transitions. Second operand 4 states. [2019-11-28 18:11:44,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:44,533 INFO L93 Difference]: Finished difference Result 1803 states and 4159 transitions. [2019-11-28 18:11:44,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:44,534 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:11:44,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:44,544 INFO L225 Difference]: With dead ends: 1803 [2019-11-28 18:11:44,544 INFO L226 Difference]: Without dead ends: 1803 [2019-11-28 18:11:44,545 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:44,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1803 states. [2019-11-28 18:11:44,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1803 to 1739. [2019-11-28 18:11:44,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1739 states. [2019-11-28 18:11:44,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1739 states to 1739 states and 4035 transitions. [2019-11-28 18:11:44,591 INFO L78 Accepts]: Start accepts. Automaton has 1739 states and 4035 transitions. Word has length 14 [2019-11-28 18:11:44,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:44,591 INFO L462 AbstractCegarLoop]: Abstraction has 1739 states and 4035 transitions. [2019-11-28 18:11:44,591 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:44,591 INFO L276 IsEmpty]: Start isEmpty. Operand 1739 states and 4035 transitions. [2019-11-28 18:11:44,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:11:44,592 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:44,593 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:44,593 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:44,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:44,593 INFO L82 PathProgramCache]: Analyzing trace with hash 32652836, now seen corresponding path program 1 times [2019-11-28 18:11:44,593 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:44,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [595048055] [2019-11-28 18:11:44,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:44,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:44,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:44,665 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [595048055] [2019-11-28 18:11:44,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:44,665 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:11:44,666 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896103098] [2019-11-28 18:11:44,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:44,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:44,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:44,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:44,667 INFO L87 Difference]: Start difference. First operand 1739 states and 4035 transitions. Second operand 4 states. [2019-11-28 18:11:44,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:44,900 INFO L93 Difference]: Finished difference Result 2116 states and 4835 transitions. [2019-11-28 18:11:44,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:44,901 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:11:44,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:44,916 INFO L225 Difference]: With dead ends: 2116 [2019-11-28 18:11:44,917 INFO L226 Difference]: Without dead ends: 2116 [2019-11-28 18:11:44,917 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:44,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2116 states. [2019-11-28 18:11:45,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2116 to 1856. [2019-11-28 18:11:45,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1856 states. [2019-11-28 18:11:45,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1856 states to 1856 states and 4299 transitions. [2019-11-28 18:11:45,040 INFO L78 Accepts]: Start accepts. Automaton has 1856 states and 4299 transitions. Word has length 14 [2019-11-28 18:11:45,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:45,041 INFO L462 AbstractCegarLoop]: Abstraction has 1856 states and 4299 transitions. [2019-11-28 18:11:45,042 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:45,042 INFO L276 IsEmpty]: Start isEmpty. Operand 1856 states and 4299 transitions. [2019-11-28 18:11:45,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:11:45,046 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:45,047 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:45,047 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:45,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:45,047 INFO L82 PathProgramCache]: Analyzing trace with hash 1595600556, now seen corresponding path program 1 times [2019-11-28 18:11:45,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:45,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269890411] [2019-11-28 18:11:45,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:45,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:45,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:45,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [269890411] [2019-11-28 18:11:45,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:45,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:45,125 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1606178342] [2019-11-28 18:11:45,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:45,125 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:45,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:45,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:45,127 INFO L87 Difference]: Start difference. First operand 1856 states and 4299 transitions. Second operand 5 states. [2019-11-28 18:11:45,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:45,405 INFO L93 Difference]: Finished difference Result 2383 states and 5349 transitions. [2019-11-28 18:11:45,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:11:45,406 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-11-28 18:11:45,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:45,438 INFO L225 Difference]: With dead ends: 2383 [2019-11-28 18:11:45,438 INFO L226 Difference]: Without dead ends: 2383 [2019-11-28 18:11:45,439 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:45,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2383 states. [2019-11-28 18:11:45,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2383 to 2127. [2019-11-28 18:11:45,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2127 states. [2019-11-28 18:11:45,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2127 states to 2127 states and 4855 transitions. [2019-11-28 18:11:45,507 INFO L78 Accepts]: Start accepts. Automaton has 2127 states and 4855 transitions. Word has length 25 [2019-11-28 18:11:45,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:45,508 INFO L462 AbstractCegarLoop]: Abstraction has 2127 states and 4855 transitions. [2019-11-28 18:11:45,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:45,508 INFO L276 IsEmpty]: Start isEmpty. Operand 2127 states and 4855 transitions. [2019-11-28 18:11:45,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:11:45,512 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:45,512 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:45,512 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:45,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:45,512 INFO L82 PathProgramCache]: Analyzing trace with hash 1878239565, now seen corresponding path program 1 times [2019-11-28 18:11:45,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:45,513 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564745748] [2019-11-28 18:11:45,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:45,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:45,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:45,646 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564745748] [2019-11-28 18:11:45,646 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:45,646 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:11:45,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118581186] [2019-11-28 18:11:45,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:45,647 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:45,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:45,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:45,648 INFO L87 Difference]: Start difference. First operand 2127 states and 4855 transitions. Second operand 5 states. [2019-11-28 18:11:46,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:46,159 INFO L93 Difference]: Finished difference Result 3026 states and 6768 transitions. [2019-11-28 18:11:46,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:11:46,159 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-11-28 18:11:46,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:46,167 INFO L225 Difference]: With dead ends: 3026 [2019-11-28 18:11:46,168 INFO L226 Difference]: Without dead ends: 3026 [2019-11-28 18:11:46,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:46,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3026 states. [2019-11-28 18:11:46,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3026 to 2608. [2019-11-28 18:11:46,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2608 states. [2019-11-28 18:11:46,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2608 states to 2608 states and 5926 transitions. [2019-11-28 18:11:46,227 INFO L78 Accepts]: Start accepts. Automaton has 2608 states and 5926 transitions. Word has length 26 [2019-11-28 18:11:46,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:46,227 INFO L462 AbstractCegarLoop]: Abstraction has 2608 states and 5926 transitions. [2019-11-28 18:11:46,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:46,227 INFO L276 IsEmpty]: Start isEmpty. Operand 2608 states and 5926 transitions. [2019-11-28 18:11:46,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:11:46,231 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:46,231 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:46,231 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:46,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:46,231 INFO L82 PathProgramCache]: Analyzing trace with hash 532711466, now seen corresponding path program 1 times [2019-11-28 18:11:46,232 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:46,232 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [716713910] [2019-11-28 18:11:46,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:46,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:46,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:46,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [716713910] [2019-11-28 18:11:46,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:46,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:46,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1892007772] [2019-11-28 18:11:46,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:46,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:46,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:46,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:46,307 INFO L87 Difference]: Start difference. First operand 2608 states and 5926 transitions. Second operand 5 states. [2019-11-28 18:11:46,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:46,567 INFO L93 Difference]: Finished difference Result 3110 states and 6917 transitions. [2019-11-28 18:11:46,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:11:46,568 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-11-28 18:11:46,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:46,575 INFO L225 Difference]: With dead ends: 3110 [2019-11-28 18:11:46,575 INFO L226 Difference]: Without dead ends: 3110 [2019-11-28 18:11:46,576 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:46,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3110 states. [2019-11-28 18:11:46,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3110 to 2543. [2019-11-28 18:11:46,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2543 states. [2019-11-28 18:11:46,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2543 states to 2543 states and 5786 transitions. [2019-11-28 18:11:46,631 INFO L78 Accepts]: Start accepts. Automaton has 2543 states and 5786 transitions. Word has length 26 [2019-11-28 18:11:46,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:46,632 INFO L462 AbstractCegarLoop]: Abstraction has 2543 states and 5786 transitions. [2019-11-28 18:11:46,632 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:46,632 INFO L276 IsEmpty]: Start isEmpty. Operand 2543 states and 5786 transitions. [2019-11-28 18:11:46,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-28 18:11:46,635 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:46,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:46,636 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:46,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:46,636 INFO L82 PathProgramCache]: Analyzing trace with hash 898927989, now seen corresponding path program 1 times [2019-11-28 18:11:46,636 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:46,637 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64882126] [2019-11-28 18:11:46,637 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:46,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:46,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:46,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64882126] [2019-11-28 18:11:46,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:46,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:46,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [599400792] [2019-11-28 18:11:46,685 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:46,685 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:46,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:46,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:46,685 INFO L87 Difference]: Start difference. First operand 2543 states and 5786 transitions. Second operand 4 states. [2019-11-28 18:11:46,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:46,706 INFO L93 Difference]: Finished difference Result 1421 states and 3096 transitions. [2019-11-28 18:11:46,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:11:46,707 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2019-11-28 18:11:46,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:46,711 INFO L225 Difference]: With dead ends: 1421 [2019-11-28 18:11:46,711 INFO L226 Difference]: Without dead ends: 1421 [2019-11-28 18:11:46,711 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:46,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1421 states. [2019-11-28 18:11:46,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1421 to 1326. [2019-11-28 18:11:46,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1326 states. [2019-11-28 18:11:46,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1326 states to 1326 states and 2921 transitions. [2019-11-28 18:11:46,737 INFO L78 Accepts]: Start accepts. Automaton has 1326 states and 2921 transitions. Word has length 27 [2019-11-28 18:11:46,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:46,738 INFO L462 AbstractCegarLoop]: Abstraction has 1326 states and 2921 transitions. [2019-11-28 18:11:46,738 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:46,738 INFO L276 IsEmpty]: Start isEmpty. Operand 1326 states and 2921 transitions. [2019-11-28 18:11:46,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:11:46,742 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:46,742 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:46,742 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:46,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:46,743 INFO L82 PathProgramCache]: Analyzing trace with hash -1928456464, now seen corresponding path program 1 times [2019-11-28 18:11:46,743 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:46,744 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774286896] [2019-11-28 18:11:46,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:46,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:46,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:46,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1774286896] [2019-11-28 18:11:46,843 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:46,843 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:11:46,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493096244] [2019-11-28 18:11:46,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:11:46,844 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:46,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:11:46,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:46,845 INFO L87 Difference]: Start difference. First operand 1326 states and 2921 transitions. Second operand 6 states. [2019-11-28 18:11:47,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:47,413 INFO L93 Difference]: Finished difference Result 1733 states and 3717 transitions. [2019-11-28 18:11:47,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:11:47,414 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-28 18:11:47,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:47,418 INFO L225 Difference]: With dead ends: 1733 [2019-11-28 18:11:47,419 INFO L226 Difference]: Without dead ends: 1733 [2019-11-28 18:11:47,419 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:11:47,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1733 states. [2019-11-28 18:11:47,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1733 to 1380. [2019-11-28 18:11:47,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1380 states. [2019-11-28 18:11:47,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1380 states to 1380 states and 3033 transitions. [2019-11-28 18:11:47,448 INFO L78 Accepts]: Start accepts. Automaton has 1380 states and 3033 transitions. Word has length 51 [2019-11-28 18:11:47,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:47,449 INFO L462 AbstractCegarLoop]: Abstraction has 1380 states and 3033 transitions. [2019-11-28 18:11:47,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:11:47,450 INFO L276 IsEmpty]: Start isEmpty. Operand 1380 states and 3033 transitions. [2019-11-28 18:11:47,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:11:47,461 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:47,461 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:47,461 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:47,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:47,462 INFO L82 PathProgramCache]: Analyzing trace with hash -429236970, now seen corresponding path program 2 times [2019-11-28 18:11:47,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:47,464 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [20858306] [2019-11-28 18:11:47,464 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:47,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:47,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:47,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [20858306] [2019-11-28 18:11:47,603 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:47,603 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:11:47,603 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1295583596] [2019-11-28 18:11:47,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:47,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:47,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:47,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:47,606 INFO L87 Difference]: Start difference. First operand 1380 states and 3033 transitions. Second operand 5 states. [2019-11-28 18:11:47,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:47,829 INFO L93 Difference]: Finished difference Result 1527 states and 3302 transitions. [2019-11-28 18:11:47,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:11:47,830 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-11-28 18:11:47,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:47,834 INFO L225 Difference]: With dead ends: 1527 [2019-11-28 18:11:47,834 INFO L226 Difference]: Without dead ends: 1527 [2019-11-28 18:11:47,834 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:47,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1527 states. [2019-11-28 18:11:47,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1527 to 1384. [2019-11-28 18:11:47,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1384 states. [2019-11-28 18:11:47,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1384 states to 1384 states and 3043 transitions. [2019-11-28 18:11:47,862 INFO L78 Accepts]: Start accepts. Automaton has 1384 states and 3043 transitions. Word has length 51 [2019-11-28 18:11:47,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:47,865 INFO L462 AbstractCegarLoop]: Abstraction has 1384 states and 3043 transitions. [2019-11-28 18:11:47,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:47,865 INFO L276 IsEmpty]: Start isEmpty. Operand 1384 states and 3043 transitions. [2019-11-28 18:11:47,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:11:47,869 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:47,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:47,870 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:47,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:47,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1980585546, now seen corresponding path program 3 times [2019-11-28 18:11:47,871 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:47,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [782243465] [2019-11-28 18:11:47,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:47,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:48,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:48,025 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [782243465] [2019-11-28 18:11:48,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:48,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:11:48,026 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137956238] [2019-11-28 18:11:48,027 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:11:48,027 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:48,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:11:48,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:48,028 INFO L87 Difference]: Start difference. First operand 1384 states and 3043 transitions. Second operand 3 states. [2019-11-28 18:11:48,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:48,043 INFO L93 Difference]: Finished difference Result 1383 states and 3041 transitions. [2019-11-28 18:11:48,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:48,044 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-11-28 18:11:48,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:48,047 INFO L225 Difference]: With dead ends: 1383 [2019-11-28 18:11:48,047 INFO L226 Difference]: Without dead ends: 1383 [2019-11-28 18:11:48,048 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:11:48,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1383 states. [2019-11-28 18:11:48,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1383 to 1153. [2019-11-28 18:11:48,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1153 states. [2019-11-28 18:11:48,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1153 states to 1153 states and 2598 transitions. [2019-11-28 18:11:48,072 INFO L78 Accepts]: Start accepts. Automaton has 1153 states and 2598 transitions. Word has length 51 [2019-11-28 18:11:48,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:48,072 INFO L462 AbstractCegarLoop]: Abstraction has 1153 states and 2598 transitions. [2019-11-28 18:11:48,073 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:11:48,073 INFO L276 IsEmpty]: Start isEmpty. Operand 1153 states and 2598 transitions. [2019-11-28 18:11:48,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:11:48,076 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:48,076 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:48,076 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:48,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:48,077 INFO L82 PathProgramCache]: Analyzing trace with hash -1913367860, now seen corresponding path program 1 times [2019-11-28 18:11:48,077 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:48,078 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1884466285] [2019-11-28 18:11:48,078 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:48,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:48,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:48,247 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1884466285] [2019-11-28 18:11:48,248 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:48,248 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:11:48,248 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [749192832] [2019-11-28 18:11:48,249 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:48,249 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:48,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:48,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:48,250 INFO L87 Difference]: Start difference. First operand 1153 states and 2598 transitions. Second operand 5 states. [2019-11-28 18:11:48,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:48,280 INFO L93 Difference]: Finished difference Result 1983 states and 4507 transitions. [2019-11-28 18:11:48,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:48,281 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-28 18:11:48,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:48,283 INFO L225 Difference]: With dead ends: 1983 [2019-11-28 18:11:48,283 INFO L226 Difference]: Without dead ends: 899 [2019-11-28 18:11:48,284 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:48,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 899 states. [2019-11-28 18:11:48,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 899 to 899. [2019-11-28 18:11:48,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 899 states. [2019-11-28 18:11:48,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 899 states to 899 states and 2039 transitions. [2019-11-28 18:11:48,302 INFO L78 Accepts]: Start accepts. Automaton has 899 states and 2039 transitions. Word has length 52 [2019-11-28 18:11:48,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:48,302 INFO L462 AbstractCegarLoop]: Abstraction has 899 states and 2039 transitions. [2019-11-28 18:11:48,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:48,302 INFO L276 IsEmpty]: Start isEmpty. Operand 899 states and 2039 transitions. [2019-11-28 18:11:48,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:11:48,304 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:48,305 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:48,305 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:48,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:48,305 INFO L82 PathProgramCache]: Analyzing trace with hash -511128040, now seen corresponding path program 2 times [2019-11-28 18:11:48,306 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:48,306 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1442054812] [2019-11-28 18:11:48,306 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:48,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:48,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:48,402 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1442054812] [2019-11-28 18:11:48,402 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:48,402 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:11:48,402 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962818484] [2019-11-28 18:11:48,403 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:11:48,403 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:48,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:11:48,404 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:48,404 INFO L87 Difference]: Start difference. First operand 899 states and 2039 transitions. Second operand 7 states. [2019-11-28 18:11:48,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:48,664 INFO L93 Difference]: Finished difference Result 2481 states and 5320 transitions. [2019-11-28 18:11:48,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-28 18:11:48,665 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:11:48,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:48,669 INFO L225 Difference]: With dead ends: 2481 [2019-11-28 18:11:48,669 INFO L226 Difference]: Without dead ends: 1665 [2019-11-28 18:11:48,669 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-11-28 18:11:48,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1665 states. [2019-11-28 18:11:48,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1665 to 937. [2019-11-28 18:11:48,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 937 states. [2019-11-28 18:11:48,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 937 states to 937 states and 2098 transitions. [2019-11-28 18:11:48,690 INFO L78 Accepts]: Start accepts. Automaton has 937 states and 2098 transitions. Word has length 52 [2019-11-28 18:11:48,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:48,690 INFO L462 AbstractCegarLoop]: Abstraction has 937 states and 2098 transitions. [2019-11-28 18:11:48,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:11:48,691 INFO L276 IsEmpty]: Start isEmpty. Operand 937 states and 2098 transitions. [2019-11-28 18:11:48,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:11:48,693 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:48,693 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:48,694 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:48,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:48,694 INFO L82 PathProgramCache]: Analyzing trace with hash 505389010, now seen corresponding path program 3 times [2019-11-28 18:11:48,694 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:48,695 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311694740] [2019-11-28 18:11:48,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:48,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:48,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:48,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311694740] [2019-11-28 18:11:48,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:48,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-28 18:11:48,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019028095] [2019-11-28 18:11:48,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-28 18:11:48,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:48,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-28 18:11:48,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:11:48,861 INFO L87 Difference]: Start difference. First operand 937 states and 2098 transitions. Second operand 9 states. [2019-11-28 18:11:49,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:49,565 INFO L93 Difference]: Finished difference Result 1241 states and 2613 transitions. [2019-11-28 18:11:49,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:11:49,566 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 52 [2019-11-28 18:11:49,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:49,569 INFO L225 Difference]: With dead ends: 1241 [2019-11-28 18:11:49,569 INFO L226 Difference]: Without dead ends: 1241 [2019-11-28 18:11:49,570 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:11:49,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1241 states. [2019-11-28 18:11:49,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1241 to 742. [2019-11-28 18:11:49,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 742 states. [2019-11-28 18:11:49,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 742 states to 742 states and 1594 transitions. [2019-11-28 18:11:49,588 INFO L78 Accepts]: Start accepts. Automaton has 742 states and 1594 transitions. Word has length 52 [2019-11-28 18:11:49,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:49,589 INFO L462 AbstractCegarLoop]: Abstraction has 742 states and 1594 transitions. [2019-11-28 18:11:49,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-28 18:11:49,589 INFO L276 IsEmpty]: Start isEmpty. Operand 742 states and 1594 transitions. [2019-11-28 18:11:49,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:11:49,592 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:49,592 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:49,592 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:49,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:49,593 INFO L82 PathProgramCache]: Analyzing trace with hash 1643675972, now seen corresponding path program 4 times [2019-11-28 18:11:49,593 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:49,593 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92011868] [2019-11-28 18:11:49,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:49,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:49,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:49,707 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92011868] [2019-11-28 18:11:49,709 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:49,709 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:11:49,710 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587670606] [2019-11-28 18:11:49,710 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:49,710 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:49,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:49,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:49,711 INFO L87 Difference]: Start difference. First operand 742 states and 1594 transitions. Second operand 4 states. [2019-11-28 18:11:49,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:49,771 INFO L93 Difference]: Finished difference Result 906 states and 1922 transitions. [2019-11-28 18:11:49,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:11:49,772 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 52 [2019-11-28 18:11:49,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:49,774 INFO L225 Difference]: With dead ends: 906 [2019-11-28 18:11:49,774 INFO L226 Difference]: Without dead ends: 906 [2019-11-28 18:11:49,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:49,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 906 states. [2019-11-28 18:11:49,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 906 to 756. [2019-11-28 18:11:49,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 756 states. [2019-11-28 18:11:49,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 756 states to 756 states and 1625 transitions. [2019-11-28 18:11:49,790 INFO L78 Accepts]: Start accepts. Automaton has 756 states and 1625 transitions. Word has length 52 [2019-11-28 18:11:49,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:49,791 INFO L462 AbstractCegarLoop]: Abstraction has 756 states and 1625 transitions. [2019-11-28 18:11:49,791 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:49,791 INFO L276 IsEmpty]: Start isEmpty. Operand 756 states and 1625 transitions. [2019-11-28 18:11:49,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:49,793 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:49,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:49,794 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:49,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:49,794 INFO L82 PathProgramCache]: Analyzing trace with hash -122108504, now seen corresponding path program 1 times [2019-11-28 18:11:49,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:49,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843535623] [2019-11-28 18:11:49,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:49,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:49,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:49,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843535623] [2019-11-28 18:11:49,856 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:49,856 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:11:49,857 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1737955667] [2019-11-28 18:11:49,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:11:49,857 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:49,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:11:49,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:11:49,859 INFO L87 Difference]: Start difference. First operand 756 states and 1625 transitions. Second operand 4 states. [2019-11-28 18:11:50,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:50,098 INFO L93 Difference]: Finished difference Result 1229 states and 2639 transitions. [2019-11-28 18:11:50,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:50,099 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-11-28 18:11:50,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:50,102 INFO L225 Difference]: With dead ends: 1229 [2019-11-28 18:11:50,103 INFO L226 Difference]: Without dead ends: 1229 [2019-11-28 18:11:50,103 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:50,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1229 states. [2019-11-28 18:11:50,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1229 to 831. [2019-11-28 18:11:50,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 831 states. [2019-11-28 18:11:50,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 831 states to 831 states and 1810 transitions. [2019-11-28 18:11:50,127 INFO L78 Accepts]: Start accepts. Automaton has 831 states and 1810 transitions. Word has length 53 [2019-11-28 18:11:50,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:50,128 INFO L462 AbstractCegarLoop]: Abstraction has 831 states and 1810 transitions. [2019-11-28 18:11:50,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:11:50,129 INFO L276 IsEmpty]: Start isEmpty. Operand 831 states and 1810 transitions. [2019-11-28 18:11:50,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:50,132 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:50,133 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:50,133 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:50,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:50,134 INFO L82 PathProgramCache]: Analyzing trace with hash 1190562228, now seen corresponding path program 1 times [2019-11-28 18:11:50,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:50,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1777487812] [2019-11-28 18:11:50,135 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:50,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:50,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:50,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1777487812] [2019-11-28 18:11:50,293 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:50,293 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:11:50,294 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876938584] [2019-11-28 18:11:50,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:11:50,294 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:50,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:11:50,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:50,295 INFO L87 Difference]: Start difference. First operand 831 states and 1810 transitions. Second operand 5 states. [2019-11-28 18:11:50,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:50,620 INFO L93 Difference]: Finished difference Result 929 states and 1983 transitions. [2019-11-28 18:11:50,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:11:50,620 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-11-28 18:11:50,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:50,623 INFO L225 Difference]: With dead ends: 929 [2019-11-28 18:11:50,624 INFO L226 Difference]: Without dead ends: 929 [2019-11-28 18:11:50,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:11:50,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 929 states. [2019-11-28 18:11:50,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 929 to 741. [2019-11-28 18:11:50,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 741 states. [2019-11-28 18:11:50,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 1582 transitions. [2019-11-28 18:11:50,639 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 1582 transitions. Word has length 53 [2019-11-28 18:11:50,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:50,640 INFO L462 AbstractCegarLoop]: Abstraction has 741 states and 1582 transitions. [2019-11-28 18:11:50,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:11:50,640 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 1582 transitions. [2019-11-28 18:11:50,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:50,642 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:50,643 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:50,643 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:50,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:50,644 INFO L82 PathProgramCache]: Analyzing trace with hash 821991690, now seen corresponding path program 1 times [2019-11-28 18:11:50,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:50,644 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [531528418] [2019-11-28 18:11:50,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:50,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:50,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:50,792 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [531528418] [2019-11-28 18:11:50,792 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:50,792 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:11:50,793 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1260856828] [2019-11-28 18:11:50,793 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:11:50,793 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:50,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:11:50,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:50,794 INFO L87 Difference]: Start difference. First operand 741 states and 1582 transitions. Second operand 7 states. [2019-11-28 18:11:51,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:51,031 INFO L93 Difference]: Finished difference Result 1884 states and 3885 transitions. [2019-11-28 18:11:51,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:11:51,032 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2019-11-28 18:11:51,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:51,036 INFO L225 Difference]: With dead ends: 1884 [2019-11-28 18:11:51,036 INFO L226 Difference]: Without dead ends: 1534 [2019-11-28 18:11:51,037 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:11:51,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2019-11-28 18:11:51,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 709. [2019-11-28 18:11:51,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 709 states. [2019-11-28 18:11:51,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 709 states to 709 states and 1500 transitions. [2019-11-28 18:11:51,054 INFO L78 Accepts]: Start accepts. Automaton has 709 states and 1500 transitions. Word has length 53 [2019-11-28 18:11:51,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:51,055 INFO L462 AbstractCegarLoop]: Abstraction has 709 states and 1500 transitions. [2019-11-28 18:11:51,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:11:51,055 INFO L276 IsEmpty]: Start isEmpty. Operand 709 states and 1500 transitions. [2019-11-28 18:11:51,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:51,057 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:51,057 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:51,057 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:51,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:51,058 INFO L82 PathProgramCache]: Analyzing trace with hash 813658986, now seen corresponding path program 2 times [2019-11-28 18:11:51,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:51,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [858177356] [2019-11-28 18:11:51,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:51,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:11:51,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:11:51,205 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [858177356] [2019-11-28 18:11:51,205 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:11:51,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:11:51,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1130095323] [2019-11-28 18:11:51,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:11:51,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:11:51,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:11:51,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:11:51,207 INFO L87 Difference]: Start difference. First operand 709 states and 1500 transitions. Second operand 6 states. [2019-11-28 18:11:51,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:11:51,274 INFO L93 Difference]: Finished difference Result 696 states and 1457 transitions. [2019-11-28 18:11:51,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:11:51,275 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-28 18:11:51,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:11:51,277 INFO L225 Difference]: With dead ends: 696 [2019-11-28 18:11:51,277 INFO L226 Difference]: Without dead ends: 696 [2019-11-28 18:11:51,277 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:11:51,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 696 states. [2019-11-28 18:11:51,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 696 to 571. [2019-11-28 18:11:51,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 571 states. [2019-11-28 18:11:51,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 571 states to 571 states and 1188 transitions. [2019-11-28 18:11:51,288 INFO L78 Accepts]: Start accepts. Automaton has 571 states and 1188 transitions. Word has length 53 [2019-11-28 18:11:51,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:11:51,289 INFO L462 AbstractCegarLoop]: Abstraction has 571 states and 1188 transitions. [2019-11-28 18:11:51,289 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:11:51,289 INFO L276 IsEmpty]: Start isEmpty. Operand 571 states and 1188 transitions. [2019-11-28 18:11:51,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:11:51,291 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:11:51,291 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:11:51,291 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:11:51,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:11:51,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1691396374, now seen corresponding path program 1 times [2019-11-28 18:11:51,292 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:11:51,292 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489990358] [2019-11-28 18:11:51,292 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:11:51,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:11:51,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:11:51,424 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:11:51,424 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:11:51,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] ULTIMATE.startENTRY-->L814: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_316) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_cnt~0_62) (= v_~z~0_11 0) (= 0 v_~a$read_delayed~0_7) (= (store .cse0 |v_ULTIMATE.start_main_~#t841~0.base_35| 1) |v_#valid_63|) (= v_~y~0_90 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t841~0.base_35| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t841~0.base_35|) |v_ULTIMATE.start_main_~#t841~0.offset_23| 0)) |v_#memory_int_13|) (= 0 v_~a$r_buff1_thd2~0_271) (= v_~__unbuffered_p1_EBX~0_60 0) (= v_~a$flush_delayed~0_23 0) (= v_~main$tmp_guard1~0_43 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~a$w_buff0_used~0_830) (= 0 v_~a$w_buff1_used~0_501) (= 0 |v_#NULL.base_4|) (= (select .cse0 |v_ULTIMATE.start_main_~#t841~0.base_35|) 0) (= v_~x~0_85 0) (= 0 v_~a$r_buff1_thd1~0_132) (= 0 v_~weak$$choice0~0_11) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t841~0.base_35| 4) |v_#length_15|) (= 0 v_~a$r_buff0_thd1~0_236) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t841~0.base_35|) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~a$r_buff0_thd2~0_373) (= |v_#NULL.offset_4| 0) (= v_~__unbuffered_p0_EBX~0_115 0) (= v_~a$mem_tmp~0_14 0) (= v_~weak$$choice2~0_107 0) (= |v_ULTIMATE.start_main_~#t841~0.offset_23| 0) (= v_~a~0_150 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~a$r_buff1_thd0~0_178 0) (= v_~a$r_buff0_thd0~0_163 0) (= v_~a$w_buff0~0_518 0) (= 0 v_~__unbuffered_p1_EAX~0_46) (= 0 v_~__unbuffered_p0_EAX~0_117))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_271, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_373, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_~#t842~0.offset=|v_ULTIMATE.start_main_~#t842~0.offset_16|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_163, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_87|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ~a~0=v_~a~0_150, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_117, ~a$w_buff1~0=v_~a$w_buff1~0_316, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, ULTIMATE.start_main_~#t841~0.base=|v_ULTIMATE.start_main_~#t841~0.base_35|, #length=|v_#length_15|, ULTIMATE.start_main_~#t841~0.offset=|v_ULTIMATE.start_main_~#t841~0.offset_23|, ~y~0=v_~y~0_90, ULTIMATE.start_main_~#t842~0.base=|v_ULTIMATE.start_main_~#t842~0.base_27|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_60, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_115, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_132, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_830, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_236, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_4|, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_95|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_87|, ~a$w_buff0~0=v_~a$w_buff0~0_518, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_178, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_19|, ~z~0=v_~z~0_11, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_501, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~x~0=v_~x~0_85, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$read_delayed~0, ~a$r_buff1_thd2~0, ~a$r_buff0_thd2~0, #NULL.offset, ULTIMATE.start_main_~#t842~0.offset, ~main$tmp_guard1~0, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~a$mem_tmp~0, ~a~0, ~__unbuffered_p0_EAX~0, ~a$w_buff1~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t841~0.base, #length, ULTIMATE.start_main_~#t841~0.offset, ~y~0, ULTIMATE.start_main_~#t842~0.base, ~__unbuffered_p1_EBX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite40, ~a$w_buff0~0, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~x~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-11-28 18:11:51,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] P0ENTRY-->L4-3: Formula: (and (= 1 ~a$w_buff0~0_Out-49949964) (= P0Thread1of1ForFork0_~arg.base_Out-49949964 |P0Thread1of1ForFork0_#in~arg.base_In-49949964|) (= 1 ~a$w_buff0_used~0_Out-49949964) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-49949964| (ite (not (and (not (= 0 (mod ~a$w_buff0_used~0_Out-49949964 256))) (not (= 0 (mod ~a$w_buff1_used~0_Out-49949964 256))))) 1 0)) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-49949964)) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-49949964| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-49949964) (= ~a$w_buff0~0_In-49949964 ~a$w_buff1~0_Out-49949964) (= |P0Thread1of1ForFork0_#in~arg.offset_In-49949964| P0Thread1of1ForFork0_~arg.offset_Out-49949964) (= ~a$w_buff0_used~0_In-49949964 ~a$w_buff1_used~0_Out-49949964)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-49949964|, ~a$w_buff0~0=~a$w_buff0~0_In-49949964, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-49949964|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-49949964} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-49949964|, ~a$w_buff1~0=~a$w_buff1~0_Out-49949964, ~a$w_buff0~0=~a$w_buff0~0_Out-49949964, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-49949964, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-49949964|, ~a$w_buff0_used~0=~a$w_buff0_used~0_Out-49949964, ~a$w_buff1_used~0=~a$w_buff1_used~0_Out-49949964, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-49949964, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-49949964|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-49949964} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~a$w_buff0_used~0, ~a$w_buff1_used~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-11-28 18:11:51,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L814-1-->L816: Formula: (and (not (= |v_ULTIMATE.start_main_~#t842~0.base_10| 0)) (= (select |v_#valid_20| |v_ULTIMATE.start_main_~#t842~0.base_10|) 0) (= (store |v_#valid_20| |v_ULTIMATE.start_main_~#t842~0.base_10| 1) |v_#valid_19|) (= |v_ULTIMATE.start_main_~#t842~0.offset_9| 0) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t842~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t842~0.base_10|) |v_ULTIMATE.start_main_~#t842~0.offset_9| 1))) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t842~0.base_10| 4) |v_#length_9|) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t842~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_20|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t842~0.base=|v_ULTIMATE.start_main_~#t842~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_19|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, ULTIMATE.start_main_~#t842~0.offset=|v_ULTIMATE.start_main_~#t842~0.offset_9|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t842~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t842~0.offset, #length] because there is no mapped edge [2019-11-28 18:11:51,438 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L783-->L783-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1517891735 256) 0))) (or (and .cse0 (= |P1Thread1of1ForFork1_#t~ite23_Out1517891735| |P1Thread1of1ForFork1_#t~ite24_Out1517891735|) (= |P1Thread1of1ForFork1_#t~ite23_Out1517891735| ~a$w_buff1_used~0_In1517891735) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1517891735 256)))) (or (and (= 0 (mod ~a$r_buff1_thd2~0_In1517891735 256)) .cse1) (and (= 0 (mod ~a$w_buff1_used~0_In1517891735 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In1517891735 256))))) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite24_Out1517891735| ~a$w_buff1_used~0_In1517891735) (= |P1Thread1of1ForFork1_#t~ite23_In1517891735| |P1Thread1of1ForFork1_#t~ite23_Out1517891735|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1517891735, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1517891735, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_In1517891735|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1517891735, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1517891735, ~weak$$choice2~0=~weak$$choice2~0_In1517891735} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1517891735, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_Out1517891735|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1517891735, P1Thread1of1ForFork1_#t~ite24=|P1Thread1of1ForFork1_#t~ite24_Out1517891735|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1517891735, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1517891735, ~weak$$choice2~0=~weak$$choice2~0_In1517891735} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite23, P1Thread1of1ForFork1_#t~ite24] because there is no mapped edge [2019-11-28 18:11:51,439 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L784-->L785: Formula: (and (not (= (mod v_~weak$$choice2~0_38 256) 0)) (= v_~a$r_buff0_thd2~0_146 v_~a$r_buff0_thd2~0_147)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_147, ~weak$$choice2~0=v_~weak$$choice2~0_38} OutVars{~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_6|, ~weak$$choice2~0=v_~weak$$choice2~0_38, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_13|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_10|} AuxVars[] AssignedVars[~a$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite27, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-11-28 18:11:51,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In386326579 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In386326579 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out386326579| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out386326579| ~a$w_buff0_used~0_In386326579) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In386326579, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In386326579} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out386326579|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In386326579, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In386326579} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:11:51,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd1~0_In1107196091 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In1107196091 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1107196091 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1107196091 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1107196091|)) (and (= ~a$w_buff1_used~0_In1107196091 |P0Thread1of1ForFork0_#t~ite6_Out1107196091|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1107196091, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1107196091, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1107196091, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1107196091} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1107196091|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1107196091, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1107196091, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1107196091, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1107196091} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:11:51,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L755-->L756: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1910044590 256))) (.cse2 (= ~a$r_buff0_thd1~0_In-1910044590 ~a$r_buff0_thd1~0_Out-1910044590)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-1910044590 256)))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out-1910044590 0)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1910044590, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1910044590} OutVars{P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1910044590|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1910044590, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1910044590} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:11:51,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L756-->L756-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In1141536520 256))) (.cse2 (= (mod ~a$r_buff1_thd1~0_In1141536520 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In1141536520 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1141536520 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1141536520|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd1~0_In1141536520 |P0Thread1of1ForFork0_#t~ite8_Out1141536520|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1141536520, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1141536520, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1141536520, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1141536520} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1141536520, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1141536520|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1141536520, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1141536520, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1141536520} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:11:51,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L756-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:11:51,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L787-->L791: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_14 256))) (= v_~a~0_48 v_~a$mem_tmp~0_7) (= v_~a$flush_delayed~0_13 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_14} OutVars{~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_13, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_11|} AuxVars[] AssignedVars[~a~0, ~a$flush_delayed~0, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-11-28 18:11:51,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L791-2-->L791-5: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-145810194 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-145810194 256))) (.cse1 (= |P1Thread1of1ForFork1_#t~ite32_Out-145810194| |P1Thread1of1ForFork1_#t~ite33_Out-145810194|))) (or (and (= ~a$w_buff1~0_In-145810194 |P1Thread1of1ForFork1_#t~ite32_Out-145810194|) (not .cse0) .cse1 (not .cse2)) (and (or .cse2 .cse0) .cse1 (= |P1Thread1of1ForFork1_#t~ite32_Out-145810194| ~a~0_In-145810194)))) InVars {~a~0=~a~0_In-145810194, ~a$w_buff1~0=~a$w_buff1~0_In-145810194, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-145810194, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-145810194} OutVars{~a~0=~a~0_In-145810194, ~a$w_buff1~0=~a$w_buff1~0_In-145810194, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-145810194, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out-145810194|, P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out-145810194|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-145810194} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-11-28 18:11:51,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L792-->L792-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1088211368 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1088211368 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite34_Out1088211368| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite34_Out1088211368| ~a$w_buff0_used~0_In1088211368) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1088211368, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1088211368} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out1088211368|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1088211368, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1088211368} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-11-28 18:11:51,446 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L793-->L793-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1685970664 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1685970664 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1685970664 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-1685970664 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite35_Out-1685970664|)) (and (or .cse3 .cse2) (= ~a$w_buff1_used~0_In-1685970664 |P1Thread1of1ForFork1_#t~ite35_Out-1685970664|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1685970664, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1685970664, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1685970664, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1685970664} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1685970664, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1685970664, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1685970664, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out-1685970664|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1685970664} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-11-28 18:11:51,447 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L794-->L794-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1062606240 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1062606240 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite36_Out1062606240| ~a$r_buff0_thd2~0_In1062606240)) (and (= |P1Thread1of1ForFork1_#t~ite36_Out1062606240| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1062606240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1062606240} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1062606240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1062606240, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out1062606240|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-11-28 18:11:51,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L795-->L795-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-197358245 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-197358245 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-197358245 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-197358245 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite37_Out-197358245| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite37_Out-197358245| ~a$r_buff1_thd2~0_In-197358245) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-197358245, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-197358245, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-197358245, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-197358245} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-197358245, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-197358245, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-197358245, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-197358245, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out-197358245|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:11:51,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L795-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite37_22| v_~a$r_buff1_thd2~0_110) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_110, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:11:51,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L816-1-->L822: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_7|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-11-28 18:11:51,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L822-2-->L822-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In1365375978 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In1365375978 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite40_Out1365375978| ~a~0_In1365375978)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite40_Out1365375978| ~a$w_buff1~0_In1365375978)))) InVars {~a~0=~a~0_In1365375978, ~a$w_buff1~0=~a$w_buff1~0_In1365375978, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1365375978, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1365375978} OutVars{~a~0=~a~0_In1365375978, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1365375978|, ~a$w_buff1~0=~a$w_buff1~0_In1365375978, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1365375978, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1365375978} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:11:51,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L822-4-->L823: Formula: (= v_~a~0_26 |v_ULTIMATE.start_main_#t~ite40_17|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_17|} OutVars{~a~0=v_~a~0_26, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:11:51,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-350752480 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-350752480 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite42_Out-350752480|)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-350752480 |ULTIMATE.start_main_#t~ite42_Out-350752480|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-350752480, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-350752480} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-350752480, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-350752480, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-350752480|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:11:51,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1623700344 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1623700344 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1623700344 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd0~0_In-1623700344 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite43_Out-1623700344|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-1623700344 |ULTIMATE.start_main_#t~ite43_Out-1623700344|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1623700344, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1623700344, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1623700344, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1623700344} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1623700344, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1623700344, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1623700344, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1623700344, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1623700344|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-11-28 18:11:51,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1255162485 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1255162485 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out-1255162485| ~a$r_buff0_thd0~0_In-1255162485)) (and (= |ULTIMATE.start_main_#t~ite44_Out-1255162485| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1255162485, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1255162485} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1255162485, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1255162485, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1255162485|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:11:51,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L826-->L826-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In564732023 256))) (.cse3 (= (mod ~a$r_buff1_thd0~0_In564732023 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In564732023 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In564732023 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out564732023| ~a$r_buff1_thd0~0_In564732023) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite45_Out564732023| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In564732023, ~a$w_buff0_used~0=~a$w_buff0_used~0_In564732023, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In564732023, ~a$w_buff1_used~0=~a$w_buff1_used~0_In564732023} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In564732023, ~a$w_buff0_used~0=~a$w_buff0_used~0_In564732023, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In564732023, ~a$w_buff1_used~0=~a$w_buff1_used~0_In564732023, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out564732023|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-11-28 18:11:51,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L826-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~a$r_buff1_thd0~0_147 |v_ULTIMATE.start_main_#t~ite45_39|) (= v_~main$tmp_guard1~0_18 (ite (= (ite (not (and (= v_~__unbuffered_p1_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_86 0) (= 1 v_~__unbuffered_p1_EAX~0_18) (= 1 v_~__unbuffered_p0_EAX~0_88))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_147, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:11:51,566 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:11:51 BasicIcfg [2019-11-28 18:11:51,567 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:11:51,568 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:11:51,568 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:11:51,568 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:11:51,569 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:11:36" (3/4) ... [2019-11-28 18:11:51,575 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:11:51,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] ULTIMATE.startENTRY-->L814: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_316) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_cnt~0_62) (= v_~z~0_11 0) (= 0 v_~a$read_delayed~0_7) (= (store .cse0 |v_ULTIMATE.start_main_~#t841~0.base_35| 1) |v_#valid_63|) (= v_~y~0_90 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t841~0.base_35| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t841~0.base_35|) |v_ULTIMATE.start_main_~#t841~0.offset_23| 0)) |v_#memory_int_13|) (= 0 v_~a$r_buff1_thd2~0_271) (= v_~__unbuffered_p1_EBX~0_60 0) (= v_~a$flush_delayed~0_23 0) (= v_~main$tmp_guard1~0_43 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~a$w_buff0_used~0_830) (= 0 v_~a$w_buff1_used~0_501) (= 0 |v_#NULL.base_4|) (= (select .cse0 |v_ULTIMATE.start_main_~#t841~0.base_35|) 0) (= v_~x~0_85 0) (= 0 v_~a$r_buff1_thd1~0_132) (= 0 v_~weak$$choice0~0_11) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t841~0.base_35| 4) |v_#length_15|) (= 0 v_~a$r_buff0_thd1~0_236) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t841~0.base_35|) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~a$r_buff0_thd2~0_373) (= |v_#NULL.offset_4| 0) (= v_~__unbuffered_p0_EBX~0_115 0) (= v_~a$mem_tmp~0_14 0) (= v_~weak$$choice2~0_107 0) (= |v_ULTIMATE.start_main_~#t841~0.offset_23| 0) (= v_~a~0_150 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~a$r_buff1_thd0~0_178 0) (= v_~a$r_buff0_thd0~0_163 0) (= v_~a$w_buff0~0_518 0) (= 0 v_~__unbuffered_p1_EAX~0_46) (= 0 v_~__unbuffered_p0_EAX~0_117))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_271, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_373, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_~#t842~0.offset=|v_ULTIMATE.start_main_~#t842~0.offset_16|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_163, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_87|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ~a~0=v_~a~0_150, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_117, ~a$w_buff1~0=v_~a$w_buff1~0_316, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, ULTIMATE.start_main_~#t841~0.base=|v_ULTIMATE.start_main_~#t841~0.base_35|, #length=|v_#length_15|, ULTIMATE.start_main_~#t841~0.offset=|v_ULTIMATE.start_main_~#t841~0.offset_23|, ~y~0=v_~y~0_90, ULTIMATE.start_main_~#t842~0.base=|v_ULTIMATE.start_main_~#t842~0.base_27|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_60, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_115, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_132, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_830, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_236, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_4|, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_95|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_87|, ~a$w_buff0~0=v_~a$w_buff0~0_518, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_178, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_19|, ~z~0=v_~z~0_11, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_501, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~x~0=v_~x~0_85, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$read_delayed~0, ~a$r_buff1_thd2~0, ~a$r_buff0_thd2~0, #NULL.offset, ULTIMATE.start_main_~#t842~0.offset, ~main$tmp_guard1~0, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~a$mem_tmp~0, ~a~0, ~__unbuffered_p0_EAX~0, ~a$w_buff1~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t841~0.base, #length, ULTIMATE.start_main_~#t841~0.offset, ~y~0, ULTIMATE.start_main_~#t842~0.base, ~__unbuffered_p1_EBX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite40, ~a$w_buff0~0, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~x~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-11-28 18:11:51,577 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] P0ENTRY-->L4-3: Formula: (and (= 1 ~a$w_buff0~0_Out-49949964) (= P0Thread1of1ForFork0_~arg.base_Out-49949964 |P0Thread1of1ForFork0_#in~arg.base_In-49949964|) (= 1 ~a$w_buff0_used~0_Out-49949964) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-49949964| (ite (not (and (not (= 0 (mod ~a$w_buff0_used~0_Out-49949964 256))) (not (= 0 (mod ~a$w_buff1_used~0_Out-49949964 256))))) 1 0)) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-49949964)) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-49949964| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-49949964) (= ~a$w_buff0~0_In-49949964 ~a$w_buff1~0_Out-49949964) (= |P0Thread1of1ForFork0_#in~arg.offset_In-49949964| P0Thread1of1ForFork0_~arg.offset_Out-49949964) (= ~a$w_buff0_used~0_In-49949964 ~a$w_buff1_used~0_Out-49949964)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-49949964|, ~a$w_buff0~0=~a$w_buff0~0_In-49949964, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-49949964|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-49949964} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-49949964|, ~a$w_buff1~0=~a$w_buff1~0_Out-49949964, ~a$w_buff0~0=~a$w_buff0~0_Out-49949964, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-49949964, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-49949964|, ~a$w_buff0_used~0=~a$w_buff0_used~0_Out-49949964, ~a$w_buff1_used~0=~a$w_buff1_used~0_Out-49949964, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-49949964, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-49949964|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-49949964} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~a$w_buff0_used~0, ~a$w_buff1_used~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-11-28 18:11:51,578 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L814-1-->L816: Formula: (and (not (= |v_ULTIMATE.start_main_~#t842~0.base_10| 0)) (= (select |v_#valid_20| |v_ULTIMATE.start_main_~#t842~0.base_10|) 0) (= (store |v_#valid_20| |v_ULTIMATE.start_main_~#t842~0.base_10| 1) |v_#valid_19|) (= |v_ULTIMATE.start_main_~#t842~0.offset_9| 0) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t842~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t842~0.base_10|) |v_ULTIMATE.start_main_~#t842~0.offset_9| 1))) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t842~0.base_10| 4) |v_#length_9|) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t842~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_20|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t842~0.base=|v_ULTIMATE.start_main_~#t842~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_19|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, ULTIMATE.start_main_~#t842~0.offset=|v_ULTIMATE.start_main_~#t842~0.offset_9|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t842~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t842~0.offset, #length] because there is no mapped edge [2019-11-28 18:11:51,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L783-->L783-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1517891735 256) 0))) (or (and .cse0 (= |P1Thread1of1ForFork1_#t~ite23_Out1517891735| |P1Thread1of1ForFork1_#t~ite24_Out1517891735|) (= |P1Thread1of1ForFork1_#t~ite23_Out1517891735| ~a$w_buff1_used~0_In1517891735) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1517891735 256)))) (or (and (= 0 (mod ~a$r_buff1_thd2~0_In1517891735 256)) .cse1) (and (= 0 (mod ~a$w_buff1_used~0_In1517891735 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In1517891735 256))))) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite24_Out1517891735| ~a$w_buff1_used~0_In1517891735) (= |P1Thread1of1ForFork1_#t~ite23_In1517891735| |P1Thread1of1ForFork1_#t~ite23_Out1517891735|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1517891735, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1517891735, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_In1517891735|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1517891735, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1517891735, ~weak$$choice2~0=~weak$$choice2~0_In1517891735} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1517891735, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_Out1517891735|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1517891735, P1Thread1of1ForFork1_#t~ite24=|P1Thread1of1ForFork1_#t~ite24_Out1517891735|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1517891735, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1517891735, ~weak$$choice2~0=~weak$$choice2~0_In1517891735} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite23, P1Thread1of1ForFork1_#t~ite24] because there is no mapped edge [2019-11-28 18:11:51,587 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L784-->L785: Formula: (and (not (= (mod v_~weak$$choice2~0_38 256) 0)) (= v_~a$r_buff0_thd2~0_146 v_~a$r_buff0_thd2~0_147)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_147, ~weak$$choice2~0=v_~weak$$choice2~0_38} OutVars{~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_6|, ~weak$$choice2~0=v_~weak$$choice2~0_38, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_13|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_10|} AuxVars[] AssignedVars[~a$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite27, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-11-28 18:11:51,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In386326579 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In386326579 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out386326579| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out386326579| ~a$w_buff0_used~0_In386326579) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In386326579, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In386326579} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out386326579|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In386326579, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In386326579} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:11:51,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd1~0_In1107196091 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In1107196091 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1107196091 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1107196091 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1107196091|)) (and (= ~a$w_buff1_used~0_In1107196091 |P0Thread1of1ForFork0_#t~ite6_Out1107196091|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1107196091, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1107196091, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1107196091, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1107196091} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1107196091|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1107196091, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1107196091, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1107196091, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1107196091} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:11:51,591 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L755-->L756: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1910044590 256))) (.cse2 (= ~a$r_buff0_thd1~0_In-1910044590 ~a$r_buff0_thd1~0_Out-1910044590)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-1910044590 256)))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out-1910044590 0)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1910044590, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1910044590} OutVars{P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1910044590|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1910044590, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1910044590} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:11:51,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L756-->L756-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In1141536520 256))) (.cse2 (= (mod ~a$r_buff1_thd1~0_In1141536520 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In1141536520 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1141536520 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1141536520|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd1~0_In1141536520 |P0Thread1of1ForFork0_#t~ite8_Out1141536520|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1141536520, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1141536520, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1141536520, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1141536520} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1141536520, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1141536520|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1141536520, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1141536520, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1141536520} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:11:51,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L756-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:11:51,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L787-->L791: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_14 256))) (= v_~a~0_48 v_~a$mem_tmp~0_7) (= v_~a$flush_delayed~0_13 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_14} OutVars{~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_13, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_11|} AuxVars[] AssignedVars[~a~0, ~a$flush_delayed~0, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-11-28 18:11:51,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L791-2-->L791-5: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-145810194 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-145810194 256))) (.cse1 (= |P1Thread1of1ForFork1_#t~ite32_Out-145810194| |P1Thread1of1ForFork1_#t~ite33_Out-145810194|))) (or (and (= ~a$w_buff1~0_In-145810194 |P1Thread1of1ForFork1_#t~ite32_Out-145810194|) (not .cse0) .cse1 (not .cse2)) (and (or .cse2 .cse0) .cse1 (= |P1Thread1of1ForFork1_#t~ite32_Out-145810194| ~a~0_In-145810194)))) InVars {~a~0=~a~0_In-145810194, ~a$w_buff1~0=~a$w_buff1~0_In-145810194, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-145810194, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-145810194} OutVars{~a~0=~a~0_In-145810194, ~a$w_buff1~0=~a$w_buff1~0_In-145810194, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-145810194, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out-145810194|, P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out-145810194|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-145810194} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-11-28 18:11:51,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L792-->L792-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1088211368 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1088211368 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite34_Out1088211368| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite34_Out1088211368| ~a$w_buff0_used~0_In1088211368) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1088211368, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1088211368} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out1088211368|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1088211368, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1088211368} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-11-28 18:11:51,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L793-->L793-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1685970664 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1685970664 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1685970664 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-1685970664 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite35_Out-1685970664|)) (and (or .cse3 .cse2) (= ~a$w_buff1_used~0_In-1685970664 |P1Thread1of1ForFork1_#t~ite35_Out-1685970664|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1685970664, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1685970664, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1685970664, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1685970664} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1685970664, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1685970664, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1685970664, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out-1685970664|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1685970664} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-11-28 18:11:51,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L794-->L794-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1062606240 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1062606240 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite36_Out1062606240| ~a$r_buff0_thd2~0_In1062606240)) (and (= |P1Thread1of1ForFork1_#t~ite36_Out1062606240| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1062606240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1062606240} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1062606240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1062606240, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out1062606240|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-11-28 18:11:51,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L795-->L795-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-197358245 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-197358245 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-197358245 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-197358245 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite37_Out-197358245| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite37_Out-197358245| ~a$r_buff1_thd2~0_In-197358245) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-197358245, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-197358245, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-197358245, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-197358245} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-197358245, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-197358245, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-197358245, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-197358245, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out-197358245|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:11:51,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L795-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite37_22| v_~a$r_buff1_thd2~0_110) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_110, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:11:51,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L816-1-->L822: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_7|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-11-28 18:11:51,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L822-2-->L822-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In1365375978 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In1365375978 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite40_Out1365375978| ~a~0_In1365375978)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite40_Out1365375978| ~a$w_buff1~0_In1365375978)))) InVars {~a~0=~a~0_In1365375978, ~a$w_buff1~0=~a$w_buff1~0_In1365375978, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1365375978, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1365375978} OutVars{~a~0=~a~0_In1365375978, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1365375978|, ~a$w_buff1~0=~a$w_buff1~0_In1365375978, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1365375978, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1365375978} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:11:51,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L822-4-->L823: Formula: (= v_~a~0_26 |v_ULTIMATE.start_main_#t~ite40_17|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_17|} OutVars{~a~0=v_~a~0_26, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:11:51,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-350752480 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-350752480 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite42_Out-350752480|)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-350752480 |ULTIMATE.start_main_#t~ite42_Out-350752480|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-350752480, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-350752480} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-350752480, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-350752480, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-350752480|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:11:51,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1623700344 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1623700344 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1623700344 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd0~0_In-1623700344 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite43_Out-1623700344|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-1623700344 |ULTIMATE.start_main_#t~ite43_Out-1623700344|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1623700344, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1623700344, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1623700344, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1623700344} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1623700344, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1623700344, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1623700344, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1623700344, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1623700344|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-11-28 18:11:51,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1255162485 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1255162485 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out-1255162485| ~a$r_buff0_thd0~0_In-1255162485)) (and (= |ULTIMATE.start_main_#t~ite44_Out-1255162485| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1255162485, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1255162485} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1255162485, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1255162485, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1255162485|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:11:51,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L826-->L826-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In564732023 256))) (.cse3 (= (mod ~a$r_buff1_thd0~0_In564732023 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In564732023 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In564732023 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out564732023| ~a$r_buff1_thd0~0_In564732023) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite45_Out564732023| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In564732023, ~a$w_buff0_used~0=~a$w_buff0_used~0_In564732023, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In564732023, ~a$w_buff1_used~0=~a$w_buff1_used~0_In564732023} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In564732023, ~a$w_buff0_used~0=~a$w_buff0_used~0_In564732023, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In564732023, ~a$w_buff1_used~0=~a$w_buff1_used~0_In564732023, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out564732023|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-11-28 18:11:51,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L826-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~a$r_buff1_thd0~0_147 |v_ULTIMATE.start_main_#t~ite45_39|) (= v_~main$tmp_guard1~0_18 (ite (= (ite (not (and (= v_~__unbuffered_p1_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_86 0) (= 1 v_~__unbuffered_p1_EAX~0_18) (= 1 v_~__unbuffered_p0_EAX~0_88))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_147, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:11:51,708 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:11:51,711 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:11:51,714 INFO L168 Benchmark]: Toolchain (without parser) took 17165.97 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 373.3 MB). Free memory was 961.7 MB in the beginning and 765.9 MB in the end (delta: 195.8 MB). Peak memory consumption was 569.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:51,714 INFO L168 Benchmark]: CDTParser took 0.88 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:11:51,715 INFO L168 Benchmark]: CACSL2BoogieTranslator took 810.93 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 62.4 MB). Free memory was 956.3 MB in the beginning and 1.0 GB in the end (delta: -71.4 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:51,715 INFO L168 Benchmark]: Boogie Procedure Inliner took 63.78 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:11:51,716 INFO L168 Benchmark]: Boogie Preprocessor took 42.31 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:51,716 INFO L168 Benchmark]: RCFGBuilder took 762.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 973.3 MB in the end (delta: 47.3 MB). Peak memory consumption was 47.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:51,717 INFO L168 Benchmark]: TraceAbstraction took 15336.62 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 310.9 MB). Free memory was 973.3 MB in the beginning and 791.0 MB in the end (delta: 182.2 MB). Peak memory consumption was 493.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:51,717 INFO L168 Benchmark]: Witness Printer took 144.41 ms. Allocated memory is still 1.4 GB. Free memory was 791.0 MB in the beginning and 765.9 MB in the end (delta: 25.1 MB). Peak memory consumption was 25.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:11:51,719 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.88 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 810.93 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 62.4 MB). Free memory was 956.3 MB in the beginning and 1.0 GB in the end (delta: -71.4 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 63.78 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 42.31 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 762.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 973.3 MB in the end (delta: 47.3 MB). Peak memory consumption was 47.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 15336.62 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 310.9 MB). Free memory was 973.3 MB in the beginning and 791.0 MB in the end (delta: 182.2 MB). Peak memory consumption was 493.1 MB. Max. memory is 11.5 GB. * Witness Printer took 144.41 ms. Allocated memory is still 1.4 GB. Free memory was 791.0 MB in the beginning and 765.9 MB in the end (delta: 25.1 MB). Peak memory consumption was 25.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.7s, 151 ProgramPointsBefore, 77 ProgramPointsAfterwards, 185 TransitionsBefore, 89 TransitionsAfterwards, 12056 CoEnabledTransitionPairs, 8 FixpointIterations, 33 TrivialSequentialCompositions, 40 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 5174 VarBasedMoverChecksPositive, 220 VarBasedMoverChecksNegative, 43 SemBasedMoverChecksPositive, 239 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.8s, 0 MoverChecksTotal, 55357 CheckedPairsTotal, 107 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L814] FCALL, FORK 0 pthread_create(&t841, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L816] FCALL, FORK 0 pthread_create(&t842, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L738] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L739] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L740] 1 a$r_buff0_thd1 = (_Bool)1 [L743] 1 x = 1 [L746] 1 __unbuffered_p0_EAX = x [L749] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L766] 2 y = 1 [L769] 2 z = 1 [L772] 2 __unbuffered_p1_EAX = z [L775] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L776] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L777] 2 a$flush_delayed = weak$$choice2 [L778] 2 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L779] EXPR 2 !a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L779] 2 a = !a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1) [L780] EXPR 2 weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0))=1, x=1, y=1, z=1] [L780] 2 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0)) [L752] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L781] EXPR 2 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L781] 2 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1)) [L782] EXPR 2 weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used))=1, x=1, y=1, z=1] [L782] 2 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used)) [L783] 2 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L785] EXPR 2 weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L785] 2 a$r_buff1_thd2 = weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L786] 2 __unbuffered_p1_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L752] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L753] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L754] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L791] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L791] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L792] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L793] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L794] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L822] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L823] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L824] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L825] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 145 locations, 2 error locations. Result: UNSAFE, OverallTime: 15.0s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 4.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2471 SDtfs, 2560 SDslu, 4914 SDs, 0 SdLazy, 3051 SolverSat, 124 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 138 GetRequests, 35 SyntacticMatches, 11 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8640occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.0s AutomataMinimizationTime, 20 MinimizatonAttempts, 5848 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 786 NumberOfCodeBlocks, 786 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 713 ConstructedInterpolants, 0 QuantifiedInterpolants, 166683 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...