./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix041_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix041_power.oepc.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7f42d731525094a6cd35949032977f8d605fc795 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:14:45,168 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:14:45,172 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:14:45,190 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:14:45,191 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:14:45,193 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:14:45,195 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:14:45,205 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:14:45,210 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:14:45,214 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:14:45,215 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:14:45,217 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:14:45,218 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:14:45,220 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:14:45,222 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:14:45,224 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:14:45,225 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:14:45,226 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:14:45,230 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:14:45,235 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:14:45,240 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:14:45,246 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:14:45,247 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:14:45,249 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:14:45,253 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:14:45,254 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:14:45,254 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:14:45,256 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:14:45,257 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:14:45,258 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:14:45,258 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:14:45,259 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:14:45,260 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:14:45,261 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:14:45,263 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:14:45,263 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:14:45,264 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:14:45,265 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:14:45,265 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:14:45,266 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:14:45,267 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:14:45,268 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:14:45,299 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:14:45,300 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:14:45,301 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:14:45,302 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:14:45,302 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:14:45,303 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:14:45,303 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:14:45,303 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:14:45,303 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:14:45,304 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:14:45,305 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:14:45,305 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:14:45,306 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:14:45,306 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:14:45,306 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:14:45,307 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:14:45,307 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:14:45,307 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:14:45,308 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:14:45,308 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:14:45,308 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:14:45,308 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:14:45,309 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:14:45,309 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:14:45,309 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:14:45,310 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:14:45,310 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:14:45,310 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:14:45,310 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:14:45,311 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7f42d731525094a6cd35949032977f8d605fc795 [2019-11-28 18:14:45,625 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:14:45,644 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:14:45,648 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:14:45,652 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:14:45,652 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:14:45,653 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix041_power.oepc.i [2019-11-28 18:14:45,727 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1057dce32/896bb81d2ebe43b687a20ca3e277305a/FLAG326da6577 [2019-11-28 18:14:46,291 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:14:46,292 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix041_power.oepc.i [2019-11-28 18:14:46,306 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1057dce32/896bb81d2ebe43b687a20ca3e277305a/FLAG326da6577 [2019-11-28 18:14:46,521 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1057dce32/896bb81d2ebe43b687a20ca3e277305a [2019-11-28 18:14:46,525 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:14:46,527 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:14:46,529 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:14:46,529 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:14:46,533 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:14:46,534 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:14:46" (1/1) ... [2019-11-28 18:14:46,537 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2dd890cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:46, skipping insertion in model container [2019-11-28 18:14:46,537 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:14:46" (1/1) ... [2019-11-28 18:14:46,545 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:14:46,612 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:14:47,051 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:14:47,063 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:14:47,168 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:14:47,238 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:14:47,239 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47 WrapperNode [2019-11-28 18:14:47,239 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:14:47,240 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:14:47,241 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:14:47,241 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:14:47,250 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,270 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,302 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:14:47,302 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:14:47,303 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:14:47,303 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:14:47,314 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,314 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,319 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,319 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,332 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,338 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,341 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... [2019-11-28 18:14:47,347 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:14:47,347 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:14:47,348 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:14:47,348 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:14:47,349 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:14:47,421 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:14:47,422 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:14:47,422 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:14:47,422 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:14:47,423 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:14:47,423 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:14:47,423 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:14:47,423 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:14:47,424 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:14:47,424 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:14:47,424 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:14:47,426 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:14:48,192 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:14:48,192 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:14:48,194 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:14:48 BoogieIcfgContainer [2019-11-28 18:14:48,194 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:14:48,197 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:14:48,197 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:14:48,201 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:14:48,201 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:14:46" (1/3) ... [2019-11-28 18:14:48,202 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7db26a81 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:14:48, skipping insertion in model container [2019-11-28 18:14:48,203 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:47" (2/3) ... [2019-11-28 18:14:48,203 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7db26a81 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:14:48, skipping insertion in model container [2019-11-28 18:14:48,204 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:14:48" (3/3) ... [2019-11-28 18:14:48,205 INFO L109 eAbstractionObserver]: Analyzing ICFG mix041_power.oepc.i [2019-11-28 18:14:48,216 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:14:48,217 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:14:48,225 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:14:48,226 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:14:48,265 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,266 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,266 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,266 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,267 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,267 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,267 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,268 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,268 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,269 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,269 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,269 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,269 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,270 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,270 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,270 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,271 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,271 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,271 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,271 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,272 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,272 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,272 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,273 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,273 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,273 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,274 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,274 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,274 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,274 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,275 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,275 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,275 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,275 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,277 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,277 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,277 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,277 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,277 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,278 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,278 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,278 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,278 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,280 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,280 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,280 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,285 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,285 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,285 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,285 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,286 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,286 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,286 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,286 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,287 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,287 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,287 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,287 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,288 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,288 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,288 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,288 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,289 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,289 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,289 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,289 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,290 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,290 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,290 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,290 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,292 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,292 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,292 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,292 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,293 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,293 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,293 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,293 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,294 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,294 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,294 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,294 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,299 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,299 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,299 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,299 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,299 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,300 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,300 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,300 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,300 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,301 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,301 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,301 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,301 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,301 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,302 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,302 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,302 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,302 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,303 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,303 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,303 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,303 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,304 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,304 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,304 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,304 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,305 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,305 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,305 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,305 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:48,324 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:14:48,346 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:14:48,346 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:14:48,346 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:14:48,346 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:14:48,347 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:14:48,347 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:14:48,347 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:14:48,347 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:14:48,364 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 148 places, 182 transitions [2019-11-28 18:14:48,367 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-11-28 18:14:48,454 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-11-28 18:14:48,454 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:14:48,471 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 576 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:14:48,496 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-11-28 18:14:48,546 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-11-28 18:14:48,546 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:14:48,555 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 576 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:14:48,576 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12056 [2019-11-28 18:14:48,577 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:14:52,815 WARN L192 SmtUtils]: Spent 269.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-11-28 18:14:52,933 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-11-28 18:14:53,378 INFO L206 etLargeBlockEncoding]: Checked pairs total: 82827 [2019-11-28 18:14:53,379 INFO L214 etLargeBlockEncoding]: Total number of compositions: 110 [2019-11-28 18:14:53,383 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 77 places, 89 transitions [2019-11-28 18:14:54,087 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8640 states. [2019-11-28 18:14:54,091 INFO L276 IsEmpty]: Start isEmpty. Operand 8640 states. [2019-11-28 18:14:54,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-11-28 18:14:54,099 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:54,100 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-11-28 18:14:54,101 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:54,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:54,110 INFO L82 PathProgramCache]: Analyzing trace with hash 792296, now seen corresponding path program 1 times [2019-11-28 18:14:54,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:54,126 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184010100] [2019-11-28 18:14:54,126 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:54,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:54,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:54,522 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184010100] [2019-11-28 18:14:54,523 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:54,524 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:14:54,525 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934130114] [2019-11-28 18:14:54,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:14:54,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:54,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:14:54,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:54,551 INFO L87 Difference]: Start difference. First operand 8640 states. Second operand 3 states. [2019-11-28 18:14:54,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:54,827 INFO L93 Difference]: Finished difference Result 8506 states and 27908 transitions. [2019-11-28 18:14:54,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:14:54,830 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-11-28 18:14:54,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:54,922 INFO L225 Difference]: With dead ends: 8506 [2019-11-28 18:14:54,922 INFO L226 Difference]: Without dead ends: 7522 [2019-11-28 18:14:54,923 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:55,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7522 states. [2019-11-28 18:14:55,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7522 to 7522. [2019-11-28 18:14:55,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7522 states. [2019-11-28 18:14:55,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7522 states to 7522 states and 24586 transitions. [2019-11-28 18:14:55,379 INFO L78 Accepts]: Start accepts. Automaton has 7522 states and 24586 transitions. Word has length 3 [2019-11-28 18:14:55,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:55,380 INFO L462 AbstractCegarLoop]: Abstraction has 7522 states and 24586 transitions. [2019-11-28 18:14:55,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:14:55,381 INFO L276 IsEmpty]: Start isEmpty. Operand 7522 states and 24586 transitions. [2019-11-28 18:14:55,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:14:55,387 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:55,387 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:55,388 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:55,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:55,388 INFO L82 PathProgramCache]: Analyzing trace with hash -476377294, now seen corresponding path program 1 times [2019-11-28 18:14:55,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:55,389 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406574534] [2019-11-28 18:14:55,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:55,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:55,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:55,503 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406574534] [2019-11-28 18:14:55,503 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:55,503 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:14:55,503 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [322247579] [2019-11-28 18:14:55,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:14:55,505 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:55,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:14:55,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:55,506 INFO L87 Difference]: Start difference. First operand 7522 states and 24586 transitions. Second operand 3 states. [2019-11-28 18:14:55,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:55,533 INFO L93 Difference]: Finished difference Result 1232 states and 2827 transitions. [2019-11-28 18:14:55,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:14:55,533 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-11-28 18:14:55,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:55,541 INFO L225 Difference]: With dead ends: 1232 [2019-11-28 18:14:55,541 INFO L226 Difference]: Without dead ends: 1232 [2019-11-28 18:14:55,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:55,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1232 states. [2019-11-28 18:14:55,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1232 to 1232. [2019-11-28 18:14:55,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1232 states. [2019-11-28 18:14:55,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1232 states to 1232 states and 2827 transitions. [2019-11-28 18:14:55,576 INFO L78 Accepts]: Start accepts. Automaton has 1232 states and 2827 transitions. Word has length 11 [2019-11-28 18:14:55,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:55,577 INFO L462 AbstractCegarLoop]: Abstraction has 1232 states and 2827 transitions. [2019-11-28 18:14:55,577 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:14:55,577 INFO L276 IsEmpty]: Start isEmpty. Operand 1232 states and 2827 transitions. [2019-11-28 18:14:55,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:14:55,579 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:55,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:55,579 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:55,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:55,580 INFO L82 PathProgramCache]: Analyzing trace with hash 394534895, now seen corresponding path program 1 times [2019-11-28 18:14:55,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:55,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812897795] [2019-11-28 18:14:55,581 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:55,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:55,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:55,659 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812897795] [2019-11-28 18:14:55,659 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:55,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:14:55,660 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747947276] [2019-11-28 18:14:55,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:14:55,661 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:55,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:14:55,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:55,662 INFO L87 Difference]: Start difference. First operand 1232 states and 2827 transitions. Second operand 3 states. [2019-11-28 18:14:55,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:55,767 INFO L93 Difference]: Finished difference Result 1960 states and 4354 transitions. [2019-11-28 18:14:55,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:14:55,768 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-11-28 18:14:55,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:55,780 INFO L225 Difference]: With dead ends: 1960 [2019-11-28 18:14:55,780 INFO L226 Difference]: Without dead ends: 1960 [2019-11-28 18:14:55,781 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:55,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1960 states. [2019-11-28 18:14:55,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1960 to 1384. [2019-11-28 18:14:55,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1384 states. [2019-11-28 18:14:55,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1384 states to 1384 states and 3137 transitions. [2019-11-28 18:14:55,833 INFO L78 Accepts]: Start accepts. Automaton has 1384 states and 3137 transitions. Word has length 14 [2019-11-28 18:14:55,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:55,834 INFO L462 AbstractCegarLoop]: Abstraction has 1384 states and 3137 transitions. [2019-11-28 18:14:55,834 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:14:55,834 INFO L276 IsEmpty]: Start isEmpty. Operand 1384 states and 3137 transitions. [2019-11-28 18:14:55,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:14:55,839 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:55,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:55,840 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:55,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:55,840 INFO L82 PathProgramCache]: Analyzing trace with hash 304327747, now seen corresponding path program 1 times [2019-11-28 18:14:55,841 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:55,841 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960455288] [2019-11-28 18:14:55,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:55,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:55,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:55,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1960455288] [2019-11-28 18:14:55,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:55,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:14:55,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902623706] [2019-11-28 18:14:55,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:14:55,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:55,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:14:55,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:14:55,960 INFO L87 Difference]: Start difference. First operand 1384 states and 3137 transitions. Second operand 4 states. [2019-11-28 18:14:56,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:56,166 INFO L93 Difference]: Finished difference Result 1706 states and 3795 transitions. [2019-11-28 18:14:56,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:14:56,167 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:14:56,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:56,176 INFO L225 Difference]: With dead ends: 1706 [2019-11-28 18:14:56,176 INFO L226 Difference]: Without dead ends: 1706 [2019-11-28 18:14:56,177 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:14:56,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1706 states. [2019-11-28 18:14:56,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1706 to 1646. [2019-11-28 18:14:56,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1646 states. [2019-11-28 18:14:56,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1646 states to 1646 states and 3679 transitions. [2019-11-28 18:14:56,290 INFO L78 Accepts]: Start accepts. Automaton has 1646 states and 3679 transitions. Word has length 14 [2019-11-28 18:14:56,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:56,291 INFO L462 AbstractCegarLoop]: Abstraction has 1646 states and 3679 transitions. [2019-11-28 18:14:56,291 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:14:56,291 INFO L276 IsEmpty]: Start isEmpty. Operand 1646 states and 3679 transitions. [2019-11-28 18:14:56,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:14:56,292 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:56,292 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:56,292 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:56,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:56,293 INFO L82 PathProgramCache]: Analyzing trace with hash 1071051512, now seen corresponding path program 1 times [2019-11-28 18:14:56,293 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:56,293 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336185290] [2019-11-28 18:14:56,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:56,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:56,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:56,339 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336185290] [2019-11-28 18:14:56,339 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:56,339 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:14:56,339 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1886160896] [2019-11-28 18:14:56,339 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:14:56,340 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:56,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:14:56,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:14:56,340 INFO L87 Difference]: Start difference. First operand 1646 states and 3679 transitions. Second operand 4 states. [2019-11-28 18:14:56,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:56,513 INFO L93 Difference]: Finished difference Result 2032 states and 4499 transitions. [2019-11-28 18:14:56,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:14:56,514 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:14:56,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:56,524 INFO L225 Difference]: With dead ends: 2032 [2019-11-28 18:14:56,525 INFO L226 Difference]: Without dead ends: 2032 [2019-11-28 18:14:56,526 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:14:56,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2032 states. [2019-11-28 18:14:56,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2032 to 1750. [2019-11-28 18:14:56,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1750 states. [2019-11-28 18:14:56,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1750 states to 1750 states and 3922 transitions. [2019-11-28 18:14:56,568 INFO L78 Accepts]: Start accepts. Automaton has 1750 states and 3922 transitions. Word has length 14 [2019-11-28 18:14:56,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:56,568 INFO L462 AbstractCegarLoop]: Abstraction has 1750 states and 3922 transitions. [2019-11-28 18:14:56,568 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:14:56,568 INFO L276 IsEmpty]: Start isEmpty. Operand 1750 states and 3922 transitions. [2019-11-28 18:14:56,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:14:56,571 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:56,572 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:56,572 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:56,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:56,572 INFO L82 PathProgramCache]: Analyzing trace with hash -1681809556, now seen corresponding path program 1 times [2019-11-28 18:14:56,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:56,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158663459] [2019-11-28 18:14:56,573 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:56,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:56,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:56,657 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158663459] [2019-11-28 18:14:56,657 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:56,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:14:56,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073105873] [2019-11-28 18:14:56,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:14:56,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:56,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:14:56,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:14:56,659 INFO L87 Difference]: Start difference. First operand 1750 states and 3922 transitions. Second operand 5 states. [2019-11-28 18:14:56,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:56,912 INFO L93 Difference]: Finished difference Result 2284 states and 4985 transitions. [2019-11-28 18:14:56,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:14:56,912 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-11-28 18:14:56,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:56,933 INFO L225 Difference]: With dead ends: 2284 [2019-11-28 18:14:56,935 INFO L226 Difference]: Without dead ends: 2284 [2019-11-28 18:14:56,937 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:14:56,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2284 states. [2019-11-28 18:14:56,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2284 to 2035. [2019-11-28 18:14:56,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2035 states. [2019-11-28 18:14:56,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2035 states to 2035 states and 4506 transitions. [2019-11-28 18:14:56,984 INFO L78 Accepts]: Start accepts. Automaton has 2035 states and 4506 transitions. Word has length 25 [2019-11-28 18:14:56,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:56,984 INFO L462 AbstractCegarLoop]: Abstraction has 2035 states and 4506 transitions. [2019-11-28 18:14:56,985 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:14:56,985 INFO L276 IsEmpty]: Start isEmpty. Operand 2035 states and 4506 transitions. [2019-11-28 18:14:56,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:14:56,987 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:56,988 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:56,988 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:56,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:56,988 INFO L82 PathProgramCache]: Analyzing trace with hash 968997935, now seen corresponding path program 1 times [2019-11-28 18:14:56,989 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:56,989 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132295431] [2019-11-28 18:14:56,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:57,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:57,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:57,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132295431] [2019-11-28 18:14:57,034 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:57,035 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:14:57,035 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1715662669] [2019-11-28 18:14:57,035 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:14:57,035 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:57,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:14:57,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:57,036 INFO L87 Difference]: Start difference. First operand 2035 states and 4506 transitions. Second operand 3 states. [2019-11-28 18:14:57,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:57,083 INFO L93 Difference]: Finished difference Result 2578 states and 5509 transitions. [2019-11-28 18:14:57,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:14:57,084 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:14:57,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:57,104 INFO L225 Difference]: With dead ends: 2578 [2019-11-28 18:14:57,104 INFO L226 Difference]: Without dead ends: 2578 [2019-11-28 18:14:57,105 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:57,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2578 states. [2019-11-28 18:14:57,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2578 to 1993. [2019-11-28 18:14:57,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1993 states. [2019-11-28 18:14:57,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1993 states to 1993 states and 4274 transitions. [2019-11-28 18:14:57,166 INFO L78 Accepts]: Start accepts. Automaton has 1993 states and 4274 transitions. Word has length 25 [2019-11-28 18:14:57,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:57,166 INFO L462 AbstractCegarLoop]: Abstraction has 1993 states and 4274 transitions. [2019-11-28 18:14:57,166 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:14:57,166 INFO L276 IsEmpty]: Start isEmpty. Operand 1993 states and 4274 transitions. [2019-11-28 18:14:57,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:14:57,169 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:57,169 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:57,169 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:57,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:57,169 INFO L82 PathProgramCache]: Analyzing trace with hash -1274554926, now seen corresponding path program 1 times [2019-11-28 18:14:57,170 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:57,170 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378954078] [2019-11-28 18:14:57,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:57,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:57,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:57,310 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378954078] [2019-11-28 18:14:57,310 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:57,311 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:14:57,311 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282702465] [2019-11-28 18:14:57,311 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:14:57,311 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:57,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:14:57,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:14:57,312 INFO L87 Difference]: Start difference. First operand 1993 states and 4274 transitions. Second operand 5 states. [2019-11-28 18:14:57,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:57,779 INFO L93 Difference]: Finished difference Result 2878 states and 6078 transitions. [2019-11-28 18:14:57,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:14:57,779 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-11-28 18:14:57,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:57,788 INFO L225 Difference]: With dead ends: 2878 [2019-11-28 18:14:57,788 INFO L226 Difference]: Without dead ends: 2878 [2019-11-28 18:14:57,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:14:57,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2878 states. [2019-11-28 18:14:57,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2878 to 2455. [2019-11-28 18:14:57,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2455 states. [2019-11-28 18:14:57,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2455 states to 2455 states and 5239 transitions. [2019-11-28 18:14:57,850 INFO L78 Accepts]: Start accepts. Automaton has 2455 states and 5239 transitions. Word has length 26 [2019-11-28 18:14:57,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:57,850 INFO L462 AbstractCegarLoop]: Abstraction has 2455 states and 5239 transitions. [2019-11-28 18:14:57,850 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:14:57,851 INFO L276 IsEmpty]: Start isEmpty. Operand 2455 states and 5239 transitions. [2019-11-28 18:14:57,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:14:57,854 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:57,854 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:57,855 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:57,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:57,855 INFO L82 PathProgramCache]: Analyzing trace with hash -1286104553, now seen corresponding path program 1 times [2019-11-28 18:14:57,855 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:57,855 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141560641] [2019-11-28 18:14:57,856 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:57,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:57,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:57,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141560641] [2019-11-28 18:14:57,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:57,959 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:14:57,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192788720] [2019-11-28 18:14:57,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:14:57,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:57,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:14:57,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:14:57,961 INFO L87 Difference]: Start difference. First operand 2455 states and 5239 transitions. Second operand 5 states. [2019-11-28 18:14:58,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:58,221 INFO L93 Difference]: Finished difference Result 2934 states and 6185 transitions. [2019-11-28 18:14:58,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:14:58,222 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-11-28 18:14:58,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:58,230 INFO L225 Difference]: With dead ends: 2934 [2019-11-28 18:14:58,230 INFO L226 Difference]: Without dead ends: 2934 [2019-11-28 18:14:58,230 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:14:58,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2934 states. [2019-11-28 18:14:58,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2934 to 2422. [2019-11-28 18:14:58,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2422 states. [2019-11-28 18:14:58,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2422 states to 2422 states and 5163 transitions. [2019-11-28 18:14:58,284 INFO L78 Accepts]: Start accepts. Automaton has 2422 states and 5163 transitions. Word has length 26 [2019-11-28 18:14:58,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:58,285 INFO L462 AbstractCegarLoop]: Abstraction has 2422 states and 5163 transitions. [2019-11-28 18:14:58,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:14:58,285 INFO L276 IsEmpty]: Start isEmpty. Operand 2422 states and 5163 transitions. [2019-11-28 18:14:58,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-28 18:14:58,289 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:58,289 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:58,289 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:58,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:58,289 INFO L82 PathProgramCache]: Analyzing trace with hash -1537408145, now seen corresponding path program 1 times [2019-11-28 18:14:58,290 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:58,290 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704231211] [2019-11-28 18:14:58,290 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:58,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:58,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:58,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704231211] [2019-11-28 18:14:58,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:58,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:14:58,550 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466888531] [2019-11-28 18:14:58,550 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-28 18:14:58,550 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:58,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-28 18:14:58,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:14:58,551 INFO L87 Difference]: Start difference. First operand 2422 states and 5163 transitions. Second operand 8 states. [2019-11-28 18:14:59,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:59,361 INFO L93 Difference]: Finished difference Result 4522 states and 9622 transitions. [2019-11-28 18:14:59,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:14:59,361 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2019-11-28 18:14:59,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:59,370 INFO L225 Difference]: With dead ends: 4522 [2019-11-28 18:14:59,370 INFO L226 Difference]: Without dead ends: 3601 [2019-11-28 18:14:59,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:14:59,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3601 states. [2019-11-28 18:14:59,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3601 to 3490. [2019-11-28 18:14:59,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3490 states. [2019-11-28 18:14:59,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3490 states to 3490 states and 7474 transitions. [2019-11-28 18:14:59,443 INFO L78 Accepts]: Start accepts. Automaton has 3490 states and 7474 transitions. Word has length 27 [2019-11-28 18:14:59,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:59,443 INFO L462 AbstractCegarLoop]: Abstraction has 3490 states and 7474 transitions. [2019-11-28 18:14:59,443 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-28 18:14:59,443 INFO L276 IsEmpty]: Start isEmpty. Operand 3490 states and 7474 transitions. [2019-11-28 18:14:59,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-11-28 18:14:59,449 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:59,449 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:59,449 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:59,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:59,450 INFO L82 PathProgramCache]: Analyzing trace with hash -1804230119, now seen corresponding path program 1 times [2019-11-28 18:14:59,450 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:59,450 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1687860377] [2019-11-28 18:14:59,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:59,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:59,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:59,600 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1687860377] [2019-11-28 18:14:59,600 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:59,600 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:14:59,600 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631696668] [2019-11-28 18:14:59,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:14:59,601 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:59,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:14:59,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:14:59,602 INFO L87 Difference]: Start difference. First operand 3490 states and 7474 transitions. Second operand 4 states. [2019-11-28 18:14:59,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:59,621 INFO L93 Difference]: Finished difference Result 2022 states and 4139 transitions. [2019-11-28 18:14:59,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:14:59,622 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-11-28 18:14:59,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:59,627 INFO L225 Difference]: With dead ends: 2022 [2019-11-28 18:14:59,627 INFO L226 Difference]: Without dead ends: 1979 [2019-11-28 18:14:59,628 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:14:59,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1979 states. [2019-11-28 18:14:59,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1979 to 1221. [2019-11-28 18:14:59,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1221 states. [2019-11-28 18:14:59,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1221 states to 1221 states and 2510 transitions. [2019-11-28 18:14:59,659 INFO L78 Accepts]: Start accepts. Automaton has 1221 states and 2510 transitions. Word has length 28 [2019-11-28 18:14:59,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:14:59,660 INFO L462 AbstractCegarLoop]: Abstraction has 1221 states and 2510 transitions. [2019-11-28 18:14:59,660 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:14:59,660 INFO L276 IsEmpty]: Start isEmpty. Operand 1221 states and 2510 transitions. [2019-11-28 18:14:59,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:14:59,664 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:59,665 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:14:59,665 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:59,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:59,665 INFO L82 PathProgramCache]: Analyzing trace with hash 1370475912, now seen corresponding path program 1 times [2019-11-28 18:14:59,666 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:59,666 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42655622] [2019-11-28 18:14:59,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:59,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:59,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:59,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42655622] [2019-11-28 18:14:59,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:59,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:14:59,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079414764] [2019-11-28 18:14:59,861 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:14:59,862 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:59,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:14:59,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:14:59,863 INFO L87 Difference]: Start difference. First operand 1221 states and 2510 transitions. Second operand 6 states. [2019-11-28 18:15:00,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:00,422 INFO L93 Difference]: Finished difference Result 1600 states and 3225 transitions. [2019-11-28 18:15:00,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:15:00,423 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-28 18:15:00,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:00,428 INFO L225 Difference]: With dead ends: 1600 [2019-11-28 18:15:00,428 INFO L226 Difference]: Without dead ends: 1600 [2019-11-28 18:15:00,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:15:00,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1600 states. [2019-11-28 18:15:00,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1600 to 1284. [2019-11-28 18:15:00,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1284 states. [2019-11-28 18:15:00,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1284 states to 1284 states and 2634 transitions. [2019-11-28 18:15:00,456 INFO L78 Accepts]: Start accepts. Automaton has 1284 states and 2634 transitions. Word has length 51 [2019-11-28 18:15:00,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:00,456 INFO L462 AbstractCegarLoop]: Abstraction has 1284 states and 2634 transitions. [2019-11-28 18:15:00,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:15:00,457 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 2634 transitions. [2019-11-28 18:15:00,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:15:00,460 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:00,460 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:00,460 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:00,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:00,461 INFO L82 PathProgramCache]: Analyzing trace with hash -678347650, now seen corresponding path program 2 times [2019-11-28 18:15:00,461 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:00,461 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730343785] [2019-11-28 18:15:00,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:00,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:00,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:00,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730343785] [2019-11-28 18:15:00,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:00,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:00,575 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905615538] [2019-11-28 18:15:00,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:00,575 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:00,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:00,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:00,577 INFO L87 Difference]: Start difference. First operand 1284 states and 2634 transitions. Second operand 5 states. [2019-11-28 18:15:00,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:00,771 INFO L93 Difference]: Finished difference Result 1413 states and 2867 transitions. [2019-11-28 18:15:00,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:15:00,771 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-11-28 18:15:00,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:00,775 INFO L225 Difference]: With dead ends: 1413 [2019-11-28 18:15:00,775 INFO L226 Difference]: Without dead ends: 1413 [2019-11-28 18:15:00,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:00,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1413 states. [2019-11-28 18:15:00,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1413 to 1292. [2019-11-28 18:15:00,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1292 states. [2019-11-28 18:15:00,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1292 states to 1292 states and 2651 transitions. [2019-11-28 18:15:00,800 INFO L78 Accepts]: Start accepts. Automaton has 1292 states and 2651 transitions. Word has length 51 [2019-11-28 18:15:00,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:00,801 INFO L462 AbstractCegarLoop]: Abstraction has 1292 states and 2651 transitions. [2019-11-28 18:15:00,801 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:00,801 INFO L276 IsEmpty]: Start isEmpty. Operand 1292 states and 2651 transitions. [2019-11-28 18:15:00,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 18:15:00,805 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:00,805 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:00,805 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:00,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:00,806 INFO L82 PathProgramCache]: Analyzing trace with hash 1065259256, now seen corresponding path program 3 times [2019-11-28 18:15:00,806 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:00,806 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [560326737] [2019-11-28 18:15:00,806 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:00,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:00,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:00,912 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [560326737] [2019-11-28 18:15:00,913 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:00,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:00,913 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121961530] [2019-11-28 18:15:00,914 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:00,914 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:00,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:00,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:00,914 INFO L87 Difference]: Start difference. First operand 1292 states and 2651 transitions. Second operand 3 states. [2019-11-28 18:15:00,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:00,931 INFO L93 Difference]: Finished difference Result 1292 states and 2650 transitions. [2019-11-28 18:15:00,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:00,931 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-11-28 18:15:00,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:00,934 INFO L225 Difference]: With dead ends: 1292 [2019-11-28 18:15:00,934 INFO L226 Difference]: Without dead ends: 1292 [2019-11-28 18:15:00,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:00,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1292 states. [2019-11-28 18:15:00,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1292 to 1069. [2019-11-28 18:15:00,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1069 states. [2019-11-28 18:15:00,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1069 states to 1069 states and 2232 transitions. [2019-11-28 18:15:00,954 INFO L78 Accepts]: Start accepts. Automaton has 1069 states and 2232 transitions. Word has length 51 [2019-11-28 18:15:00,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:00,955 INFO L462 AbstractCegarLoop]: Abstraction has 1069 states and 2232 transitions. [2019-11-28 18:15:00,955 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:00,955 INFO L276 IsEmpty]: Start isEmpty. Operand 1069 states and 2232 transitions. [2019-11-28 18:15:00,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:15:00,958 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:00,958 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:00,958 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:00,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:00,959 INFO L82 PathProgramCache]: Analyzing trace with hash -234851773, now seen corresponding path program 1 times [2019-11-28 18:15:00,959 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:00,959 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [338785384] [2019-11-28 18:15:00,959 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:00,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:01,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:01,049 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [338785384] [2019-11-28 18:15:01,049 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:01,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:15:01,050 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592776158] [2019-11-28 18:15:01,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:15:01,050 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:01,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:15:01,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:15:01,051 INFO L87 Difference]: Start difference. First operand 1069 states and 2232 transitions. Second operand 7 states. [2019-11-28 18:15:01,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:01,323 INFO L93 Difference]: Finished difference Result 2936 states and 5976 transitions. [2019-11-28 18:15:01,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:15:01,324 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:15:01,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:01,327 INFO L225 Difference]: With dead ends: 2936 [2019-11-28 18:15:01,327 INFO L226 Difference]: Without dead ends: 1969 [2019-11-28 18:15:01,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:15:01,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1969 states. [2019-11-28 18:15:01,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1969 to 1129. [2019-11-28 18:15:01,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1129 states. [2019-11-28 18:15:01,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1129 states to 1129 states and 2333 transitions. [2019-11-28 18:15:01,357 INFO L78 Accepts]: Start accepts. Automaton has 1129 states and 2333 transitions. Word has length 52 [2019-11-28 18:15:01,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:01,358 INFO L462 AbstractCegarLoop]: Abstraction has 1129 states and 2333 transitions. [2019-11-28 18:15:01,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:15:01,358 INFO L276 IsEmpty]: Start isEmpty. Operand 1129 states and 2333 transitions. [2019-11-28 18:15:01,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:15:01,362 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:01,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:01,362 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:01,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:01,363 INFO L82 PathProgramCache]: Analyzing trace with hash -480319677, now seen corresponding path program 2 times [2019-11-28 18:15:01,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:01,363 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345955541] [2019-11-28 18:15:01,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:01,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:01,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:01,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1345955541] [2019-11-28 18:15:01,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:01,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:15:01,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1386158250] [2019-11-28 18:15:01,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:01,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:01,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:01,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:01,528 INFO L87 Difference]: Start difference. First operand 1129 states and 2333 transitions. Second operand 5 states. [2019-11-28 18:15:01,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:01,597 INFO L93 Difference]: Finished difference Result 1321 states and 2729 transitions. [2019-11-28 18:15:01,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:01,597 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-28 18:15:01,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:01,599 INFO L225 Difference]: With dead ends: 1321 [2019-11-28 18:15:01,599 INFO L226 Difference]: Without dead ends: 1321 [2019-11-28 18:15:01,600 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:01,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1321 states. [2019-11-28 18:15:01,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1321 to 1024. [2019-11-28 18:15:01,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1024 states. [2019-11-28 18:15:01,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1024 states to 1024 states and 2144 transitions. [2019-11-28 18:15:01,618 INFO L78 Accepts]: Start accepts. Automaton has 1024 states and 2144 transitions. Word has length 52 [2019-11-28 18:15:01,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:01,619 INFO L462 AbstractCegarLoop]: Abstraction has 1024 states and 2144 transitions. [2019-11-28 18:15:01,619 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:01,619 INFO L276 IsEmpty]: Start isEmpty. Operand 1024 states and 2144 transitions. [2019-11-28 18:15:01,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:15:01,621 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:01,621 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:01,622 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:01,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:01,622 INFO L82 PathProgramCache]: Analyzing trace with hash -409769665, now seen corresponding path program 1 times [2019-11-28 18:15:01,622 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:01,622 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209408701] [2019-11-28 18:15:01,623 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:01,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:15:01,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:15:01,801 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:15:01,801 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:15:01,806 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] ULTIMATE.startENTRY-->L802: Formula: (let ((.cse0 (store |v_#valid_60| 0 0))) (and (= |v_ULTIMATE.start_main_~#t1089~0.offset_19| 0) (= v_~z$mem_tmp~0_25 0) (= v_~y~0_23 0) (= 0 v_~__unbuffered_cnt~0_55) (= v_~x~0_98 0) (= v_~main$tmp_guard1~0_44 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1089~0.base_27|) (= (store .cse0 |v_ULTIMATE.start_main_~#t1089~0.base_27| 1) |v_#valid_58|) (= v_~z$w_buff1~0_160 0) (= 0 v_~weak$$choice0~0_23) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$r_buff0_thd1~0_174 0) (= v_~z$read_delayed_var~0.offset_7 0) (= 0 v_~__unbuffered_p1_EAX~0_45) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1089~0.base_27|)) (= v_~z$w_buff0~0_252 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1089~0.base_27| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1089~0.base_27|) |v_ULTIMATE.start_main_~#t1089~0.offset_19| 0)) |v_#memory_int_11|) (= v_~z~0_120 0) (= v_~z$r_buff0_thd0~0_134 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~main$tmp_guard0~0_20 0) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$flush_delayed~0_33) (= |v_#NULL.offset_5| 0) (= v_~z$r_buff1_thd2~0_196 0) (= v_~z$r_buff1_thd0~0_144 0) (= 0 v_~weak$$choice2~0_99) (= v_~z$w_buff0_used~0_606 0) (= v_~z$w_buff1_used~0_306 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1089~0.base_27| 4)) (= 0 |v_#NULL.base_5|) (= v_~__unbuffered_p1_EBX~0_43 0) (= v_~z$r_buff0_thd2~0_279 0) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_12|, #length=|v_#length_18|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_196, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_160, #NULL.offset=|v_#NULL.offset_5|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_~#t1090~0.base=|v_ULTIMATE.start_main_~#t1090~0.base_22|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_26|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_370|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_93|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_134, ULTIMATE.start_main_~#t1089~0.offset=|v_ULTIMATE.start_main_~#t1089~0.offset_19|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_45, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_144, #length=|v_#length_17|, ~y~0=v_~y~0_23, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_279, ~z$mem_tmp~0=v_~z$mem_tmp~0_25, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_43, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_606, ~z$w_buff0~0=v_~z$w_buff0~0_252, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_306, ~z$flush_delayed~0=v_~z$flush_delayed~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_20, #NULL.base=|v_#NULL.base_5|, ~weak$$choice0~0=v_~weak$$choice0~0_23, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_24|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_22|, ULTIMATE.start_main_~#t1089~0.base=|v_ULTIMATE.start_main_~#t1089~0.base_27|, ULTIMATE.start_main_~#t1090~0.offset=|v_ULTIMATE.start_main_~#t1090~0.offset_14|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_58|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_18|, ~z~0=v_~z~0_120, ~weak$$choice2~0=v_~weak$$choice2~0_99, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_174, ~x~0=v_~x~0_98} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_~#t1090~0.base, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t1089~0.offset, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ~__unbuffered_p1_EBX~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1089~0.base, ULTIMATE.start_main_~#t1090~0.offset, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ULTIMATE.start_main_#t~nondet38, ~z$read_delayed_var~0.base, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-11-28 18:15:01,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L4-->L740: Formula: (and (= 1 ~z$r_buff0_thd1~0_Out989297146) (= ~x~0_Out989297146 1) (= ~z$r_buff0_thd1~0_In989297146 ~z$r_buff1_thd1~0_Out989297146) (= ~z$r_buff1_thd2~0_Out989297146 ~z$r_buff0_thd2~0_In989297146) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_In989297146)) (= ~z$r_buff0_thd0~0_In989297146 ~z$r_buff1_thd0~0_Out989297146)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In989297146, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_In989297146, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In989297146, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In989297146} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In989297146, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out989297146, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out989297146, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out989297146, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_In989297146, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out989297146, ~x~0=~x~0_Out989297146, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In989297146} AuxVars[] AssignedVars[~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-11-28 18:15:01,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L802-1-->L804: Formula: (and (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1090~0.base_11| 1)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1090~0.base_11|) (= |v_#memory_int_5| (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1090~0.base_11| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1090~0.base_11|) |v_ULTIMATE.start_main_~#t1090~0.offset_10| 1))) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1090~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1090~0.offset_10|) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t1090~0.base_11| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1090~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_6|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1090~0.offset=|v_ULTIMATE.start_main_~#t1090~0.offset_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1090~0.base=|v_ULTIMATE.start_main_~#t1090~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1090~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t1090~0.base] because there is no mapped edge [2019-11-28 18:15:01,812 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L741-->L741-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In486092144 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In486092144 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out486092144| ~z$w_buff0_used~0_In486092144) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out486092144|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In486092144, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In486092144} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out486092144|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In486092144, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In486092144} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:15:01,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L742-->L742-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1041052334 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1041052334 256))) (.cse2 (= (mod ~z$r_buff1_thd1~0_In-1041052334 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1041052334 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1041052334|)) (and (= ~z$w_buff1_used~0_In-1041052334 |P0Thread1of1ForFork0_#t~ite6_Out-1041052334|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1041052334, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1041052334, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1041052334, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1041052334} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1041052334|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1041052334, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1041052334, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1041052334, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1041052334} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:15:01,814 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L743-->L744: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_Out1340679911 ~z$r_buff0_thd1~0_In1340679911)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1340679911 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1340679911 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~z$r_buff0_thd1~0_Out1340679911 0) (not .cse2) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1340679911, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1340679911} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1340679911, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1340679911|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1340679911} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:15:01,814 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L744-->L744-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1028743295 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In1028743295 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1028743295 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In1028743295 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out1028743295| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1028743295| ~z$r_buff1_thd1~0_In1028743295)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1028743295, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1028743295, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1028743295, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1028743295} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1028743295, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1028743295|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1028743295, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1028743295, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1028743295} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:15:01,818 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_32|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_31|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:15:01,819 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L772-->L773: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= v_~z$r_buff0_thd2~0_61 v_~z$r_buff0_thd2~0_60)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_25, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_61} OutVars{P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_5|, ~weak$$choice2~0=v_~weak$$choice2~0_25, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_60, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_5|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite27, ~z$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-11-28 18:15:01,819 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L773-->L773-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1164650855 256)))) (or (and (= ~z$r_buff1_thd2~0_In-1164650855 |P1Thread1of1ForFork1_#t~ite30_Out-1164650855|) (not .cse0) (= |P1Thread1of1ForFork1_#t~ite29_In-1164650855| |P1Thread1of1ForFork1_#t~ite29_Out-1164650855|)) (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-1164650855 256) 0))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1164650855 256))) (and .cse1 (= (mod ~z$w_buff1_used~0_In-1164650855 256) 0)) (= (mod ~z$w_buff0_used~0_In-1164650855 256) 0))) (= |P1Thread1of1ForFork1_#t~ite29_Out-1164650855| ~z$r_buff1_thd2~0_In-1164650855) (= |P1Thread1of1ForFork1_#t~ite29_Out-1164650855| |P1Thread1of1ForFork1_#t~ite30_Out-1164650855|)))) InVars {P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_In-1164650855|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1164650855, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1164650855, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1164650855, ~weak$$choice2~0=~weak$$choice2~0_In-1164650855, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1164650855} OutVars{P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_Out-1164650855|, P1Thread1of1ForFork1_#t~ite30=|P1Thread1of1ForFork1_#t~ite30_Out-1164650855|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1164650855, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1164650855, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1164650855, ~weak$$choice2~0=~weak$$choice2~0_In-1164650855, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1164650855} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29, P1Thread1of1ForFork1_#t~ite30] because there is no mapped edge [2019-11-28 18:15:01,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L775-->L779: Formula: (and (= v_~z~0_27 v_~z$mem_tmp~0_6) (= 0 v_~z$flush_delayed~0_8) (not (= 0 (mod v_~z$flush_delayed~0_9 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_6, ~z$flush_delayed~0=v_~z$flush_delayed~0_9} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_6, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_8, ~z~0=v_~z~0_27} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-11-28 18:15:01,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L779-2-->L779-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In695683056 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In695683056 256) 0))) (or (and (= ~z~0_In695683056 |P1Thread1of1ForFork1_#t~ite32_Out695683056|) (or .cse0 .cse1)) (and (not .cse1) (= ~z$w_buff1~0_In695683056 |P1Thread1of1ForFork1_#t~ite32_Out695683056|) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In695683056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In695683056, ~z$w_buff1~0=~z$w_buff1~0_In695683056, ~z~0=~z~0_In695683056} OutVars{~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In695683056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In695683056, ~z$w_buff1~0=~z$w_buff1~0_In695683056, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out695683056|, ~z~0=~z~0_In695683056} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-11-28 18:15:01,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L779-4-->L780: Formula: (= v_~z~0_39 |v_P1Thread1of1ForFork1_#t~ite32_8|) InVars {P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_8|} OutVars{P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_7|, P1Thread1of1ForFork1_#t~ite33=|v_P1Thread1of1ForFork1_#t~ite33_11|, ~z~0=v_~z~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33, ~z~0] because there is no mapped edge [2019-11-28 18:15:01,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1530224339 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1530224339 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite34_Out-1530224339| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1530224339 |P1Thread1of1ForFork1_#t~ite34_Out-1530224339|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1530224339, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1530224339} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1530224339, P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out-1530224339|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1530224339} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-11-28 18:15:01,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In282342386 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In282342386 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In282342386 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In282342386 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite35_Out282342386|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite35_Out282342386| ~z$w_buff1_used~0_In282342386)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In282342386, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In282342386, ~z$w_buff1_used~0=~z$w_buff1_used~0_In282342386, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In282342386} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In282342386, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In282342386, ~z$w_buff1_used~0=~z$w_buff1_used~0_In282342386, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out282342386|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In282342386} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-11-28 18:15:01,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L782-->L782-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-7211908 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-7211908 256) 0))) (or (and (= ~z$r_buff0_thd2~0_In-7211908 |P1Thread1of1ForFork1_#t~ite36_Out-7211908|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite36_Out-7211908|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-7211908, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-7211908} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-7211908, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-7211908, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-7211908|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-11-28 18:15:01,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L783-->L783-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In299349703 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd2~0_In299349703 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In299349703 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In299349703 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite37_Out299349703| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd2~0_In299349703 |P1Thread1of1ForFork1_#t~ite37_Out299349703|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In299349703, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In299349703, ~z$w_buff1_used~0=~z$w_buff1_used~0_In299349703, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In299349703} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In299349703, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In299349703, ~z$w_buff1_used~0=~z$w_buff1_used~0_In299349703, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In299349703, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out299349703|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:15:01,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L783-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite37_22| v_~z$r_buff1_thd2~0_88) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_28 (+ v_~__unbuffered_cnt~0_29 1)) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_29, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_88, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:15:01,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L804-1-->L810: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_16) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_16} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_16, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-11-28 18:15:01,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L810-2-->L810-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1065128433 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1065128433 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite40_Out1065128433| |ULTIMATE.start_main_#t~ite41_Out1065128433|))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite40_Out1065128433| ~z~0_In1065128433) .cse2) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite40_Out1065128433| ~z$w_buff1~0_In1065128433) (not .cse0) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1065128433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1065128433, ~z$w_buff1~0=~z$w_buff1~0_In1065128433, ~z~0=~z~0_In1065128433} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1065128433|, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1065128433|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1065128433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1065128433, ~z$w_buff1~0=~z$w_buff1~0_In1065128433, ~z~0=~z~0_In1065128433} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:15:01,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In275918280 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In275918280 256)))) (or (and (= ~z$w_buff0_used~0_In275918280 |ULTIMATE.start_main_#t~ite42_Out275918280|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite42_Out275918280| 0) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In275918280, ~z$w_buff0_used~0=~z$w_buff0_used~0_In275918280} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In275918280, ~z$w_buff0_used~0=~z$w_buff0_used~0_In275918280, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out275918280|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:15:01,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L812-->L812-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1993494908 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1993494908 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1993494908 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1993494908 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite43_Out-1993494908| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite43_Out-1993494908| ~z$w_buff1_used~0_In-1993494908) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1993494908, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1993494908, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1993494908, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1993494908} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1993494908, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1993494908, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1993494908, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1993494908, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1993494908|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-11-28 18:15:01,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In869446357 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In869446357 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out869446357| ~z$r_buff0_thd0~0_In869446357) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite44_Out869446357| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869446357, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869446357} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869446357, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869446357, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out869446357|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:15:01,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L814-->L814-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1998560433 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In1998560433 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1998560433 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In1998560433 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out1998560433| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out1998560433| ~z$r_buff1_thd0~0_In1998560433)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1998560433, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1998560433, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1998560433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1998560433} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1998560433, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1998560433, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1998560433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1998560433, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1998560433|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-11-28 18:15:01,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L814-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_14 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~z$r_buff1_thd0~0_107 |v_ULTIMATE.start_main_#t~ite45_60|) (= (ite (= (ite (not (and (= v_~__unbuffered_p1_EBX~0_28 0) (= 1 v_~__unbuffered_p1_EAX~0_28) (= v_~x~0_67 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_22) (= v_ULTIMATE.start___VERIFIER_assert_~expression_14 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_22 256))) InVars {~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_28, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~x~0=v_~x~0_67, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_14, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_28, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_107, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ~x~0=v_~x~0_67, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_59|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:15:01,912 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:15:01 BasicIcfg [2019-11-28 18:15:01,912 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:15:01,912 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:15:01,913 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:15:01,913 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:15:01,913 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:14:48" (3/4) ... [2019-11-28 18:15:01,916 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:15:01,917 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] ULTIMATE.startENTRY-->L802: Formula: (let ((.cse0 (store |v_#valid_60| 0 0))) (and (= |v_ULTIMATE.start_main_~#t1089~0.offset_19| 0) (= v_~z$mem_tmp~0_25 0) (= v_~y~0_23 0) (= 0 v_~__unbuffered_cnt~0_55) (= v_~x~0_98 0) (= v_~main$tmp_guard1~0_44 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1089~0.base_27|) (= (store .cse0 |v_ULTIMATE.start_main_~#t1089~0.base_27| 1) |v_#valid_58|) (= v_~z$w_buff1~0_160 0) (= 0 v_~weak$$choice0~0_23) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$r_buff0_thd1~0_174 0) (= v_~z$read_delayed_var~0.offset_7 0) (= 0 v_~__unbuffered_p1_EAX~0_45) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1089~0.base_27|)) (= v_~z$w_buff0~0_252 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1089~0.base_27| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1089~0.base_27|) |v_ULTIMATE.start_main_~#t1089~0.offset_19| 0)) |v_#memory_int_11|) (= v_~z~0_120 0) (= v_~z$r_buff0_thd0~0_134 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~main$tmp_guard0~0_20 0) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$flush_delayed~0_33) (= |v_#NULL.offset_5| 0) (= v_~z$r_buff1_thd2~0_196 0) (= v_~z$r_buff1_thd0~0_144 0) (= 0 v_~weak$$choice2~0_99) (= v_~z$w_buff0_used~0_606 0) (= v_~z$w_buff1_used~0_306 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1089~0.base_27| 4)) (= 0 |v_#NULL.base_5|) (= v_~__unbuffered_p1_EBX~0_43 0) (= v_~z$r_buff0_thd2~0_279 0) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_12|, #length=|v_#length_18|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_196, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_160, #NULL.offset=|v_#NULL.offset_5|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_~#t1090~0.base=|v_ULTIMATE.start_main_~#t1090~0.base_22|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_26|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_370|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_93|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_134, ULTIMATE.start_main_~#t1089~0.offset=|v_ULTIMATE.start_main_~#t1089~0.offset_19|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_45, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_144, #length=|v_#length_17|, ~y~0=v_~y~0_23, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_279, ~z$mem_tmp~0=v_~z$mem_tmp~0_25, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_43, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_606, ~z$w_buff0~0=v_~z$w_buff0~0_252, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_306, ~z$flush_delayed~0=v_~z$flush_delayed~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_20, #NULL.base=|v_#NULL.base_5|, ~weak$$choice0~0=v_~weak$$choice0~0_23, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_24|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_22|, ULTIMATE.start_main_~#t1089~0.base=|v_ULTIMATE.start_main_~#t1089~0.base_27|, ULTIMATE.start_main_~#t1090~0.offset=|v_ULTIMATE.start_main_~#t1090~0.offset_14|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_58|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_18|, ~z~0=v_~z~0_120, ~weak$$choice2~0=v_~weak$$choice2~0_99, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_174, ~x~0=v_~x~0_98} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_~#t1090~0.base, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t1089~0.offset, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ~__unbuffered_p1_EBX~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1089~0.base, ULTIMATE.start_main_~#t1090~0.offset, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ULTIMATE.start_main_#t~nondet38, ~z$read_delayed_var~0.base, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-11-28 18:15:01,918 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L4-->L740: Formula: (and (= 1 ~z$r_buff0_thd1~0_Out989297146) (= ~x~0_Out989297146 1) (= ~z$r_buff0_thd1~0_In989297146 ~z$r_buff1_thd1~0_Out989297146) (= ~z$r_buff1_thd2~0_Out989297146 ~z$r_buff0_thd2~0_In989297146) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_In989297146)) (= ~z$r_buff0_thd0~0_In989297146 ~z$r_buff1_thd0~0_Out989297146)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In989297146, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_In989297146, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In989297146, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In989297146} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In989297146, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out989297146, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out989297146, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out989297146, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_In989297146, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out989297146, ~x~0=~x~0_Out989297146, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In989297146} AuxVars[] AssignedVars[~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-11-28 18:15:01,918 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L802-1-->L804: Formula: (and (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1090~0.base_11| 1)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1090~0.base_11|) (= |v_#memory_int_5| (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1090~0.base_11| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1090~0.base_11|) |v_ULTIMATE.start_main_~#t1090~0.offset_10| 1))) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1090~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1090~0.offset_10|) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t1090~0.base_11| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1090~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_6|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1090~0.offset=|v_ULTIMATE.start_main_~#t1090~0.offset_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1090~0.base=|v_ULTIMATE.start_main_~#t1090~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1090~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t1090~0.base] because there is no mapped edge [2019-11-28 18:15:01,920 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L741-->L741-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In486092144 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In486092144 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out486092144| ~z$w_buff0_used~0_In486092144) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out486092144|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In486092144, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In486092144} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out486092144|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In486092144, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In486092144} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:15:01,921 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L742-->L742-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1041052334 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1041052334 256))) (.cse2 (= (mod ~z$r_buff1_thd1~0_In-1041052334 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1041052334 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1041052334|)) (and (= ~z$w_buff1_used~0_In-1041052334 |P0Thread1of1ForFork0_#t~ite6_Out-1041052334|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1041052334, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1041052334, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1041052334, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1041052334} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1041052334|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1041052334, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1041052334, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1041052334, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1041052334} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:15:01,921 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L743-->L744: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_Out1340679911 ~z$r_buff0_thd1~0_In1340679911)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1340679911 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1340679911 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~z$r_buff0_thd1~0_Out1340679911 0) (not .cse2) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1340679911, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1340679911} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1340679911, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1340679911|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1340679911} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:15:01,922 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L744-->L744-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1028743295 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In1028743295 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1028743295 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In1028743295 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out1028743295| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1028743295| ~z$r_buff1_thd1~0_In1028743295)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1028743295, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1028743295, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1028743295, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1028743295} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1028743295, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1028743295|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1028743295, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1028743295, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1028743295} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:15:01,925 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_32|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_31|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:15:01,925 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L772-->L773: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= v_~z$r_buff0_thd2~0_61 v_~z$r_buff0_thd2~0_60)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_25, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_61} OutVars{P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_5|, ~weak$$choice2~0=v_~weak$$choice2~0_25, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_60, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_5|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite27, ~z$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-11-28 18:15:01,926 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L773-->L773-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1164650855 256)))) (or (and (= ~z$r_buff1_thd2~0_In-1164650855 |P1Thread1of1ForFork1_#t~ite30_Out-1164650855|) (not .cse0) (= |P1Thread1of1ForFork1_#t~ite29_In-1164650855| |P1Thread1of1ForFork1_#t~ite29_Out-1164650855|)) (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-1164650855 256) 0))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1164650855 256))) (and .cse1 (= (mod ~z$w_buff1_used~0_In-1164650855 256) 0)) (= (mod ~z$w_buff0_used~0_In-1164650855 256) 0))) (= |P1Thread1of1ForFork1_#t~ite29_Out-1164650855| ~z$r_buff1_thd2~0_In-1164650855) (= |P1Thread1of1ForFork1_#t~ite29_Out-1164650855| |P1Thread1of1ForFork1_#t~ite30_Out-1164650855|)))) InVars {P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_In-1164650855|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1164650855, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1164650855, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1164650855, ~weak$$choice2~0=~weak$$choice2~0_In-1164650855, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1164650855} OutVars{P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_Out-1164650855|, P1Thread1of1ForFork1_#t~ite30=|P1Thread1of1ForFork1_#t~ite30_Out-1164650855|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1164650855, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1164650855, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1164650855, ~weak$$choice2~0=~weak$$choice2~0_In-1164650855, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1164650855} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29, P1Thread1of1ForFork1_#t~ite30] because there is no mapped edge [2019-11-28 18:15:01,926 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L775-->L779: Formula: (and (= v_~z~0_27 v_~z$mem_tmp~0_6) (= 0 v_~z$flush_delayed~0_8) (not (= 0 (mod v_~z$flush_delayed~0_9 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_6, ~z$flush_delayed~0=v_~z$flush_delayed~0_9} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_6, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_8, ~z~0=v_~z~0_27} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-11-28 18:15:01,927 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L779-2-->L779-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In695683056 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In695683056 256) 0))) (or (and (= ~z~0_In695683056 |P1Thread1of1ForFork1_#t~ite32_Out695683056|) (or .cse0 .cse1)) (and (not .cse1) (= ~z$w_buff1~0_In695683056 |P1Thread1of1ForFork1_#t~ite32_Out695683056|) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In695683056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In695683056, ~z$w_buff1~0=~z$w_buff1~0_In695683056, ~z~0=~z~0_In695683056} OutVars{~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In695683056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In695683056, ~z$w_buff1~0=~z$w_buff1~0_In695683056, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out695683056|, ~z~0=~z~0_In695683056} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-11-28 18:15:01,927 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L779-4-->L780: Formula: (= v_~z~0_39 |v_P1Thread1of1ForFork1_#t~ite32_8|) InVars {P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_8|} OutVars{P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_7|, P1Thread1of1ForFork1_#t~ite33=|v_P1Thread1of1ForFork1_#t~ite33_11|, ~z~0=v_~z~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33, ~z~0] because there is no mapped edge [2019-11-28 18:15:01,927 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1530224339 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1530224339 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite34_Out-1530224339| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1530224339 |P1Thread1of1ForFork1_#t~ite34_Out-1530224339|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1530224339, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1530224339} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1530224339, P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out-1530224339|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1530224339} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-11-28 18:15:01,928 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In282342386 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In282342386 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In282342386 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In282342386 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite35_Out282342386|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite35_Out282342386| ~z$w_buff1_used~0_In282342386)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In282342386, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In282342386, ~z$w_buff1_used~0=~z$w_buff1_used~0_In282342386, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In282342386} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In282342386, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In282342386, ~z$w_buff1_used~0=~z$w_buff1_used~0_In282342386, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out282342386|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In282342386} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-11-28 18:15:01,929 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L782-->L782-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-7211908 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-7211908 256) 0))) (or (and (= ~z$r_buff0_thd2~0_In-7211908 |P1Thread1of1ForFork1_#t~ite36_Out-7211908|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite36_Out-7211908|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-7211908, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-7211908} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-7211908, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-7211908, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-7211908|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-11-28 18:15:01,929 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L783-->L783-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In299349703 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd2~0_In299349703 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In299349703 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In299349703 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite37_Out299349703| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd2~0_In299349703 |P1Thread1of1ForFork1_#t~ite37_Out299349703|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In299349703, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In299349703, ~z$w_buff1_used~0=~z$w_buff1_used~0_In299349703, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In299349703} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In299349703, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In299349703, ~z$w_buff1_used~0=~z$w_buff1_used~0_In299349703, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In299349703, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out299349703|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:15:01,929 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L783-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite37_22| v_~z$r_buff1_thd2~0_88) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_28 (+ v_~__unbuffered_cnt~0_29 1)) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_29, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_88, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-11-28 18:15:01,930 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L804-1-->L810: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_16) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_16} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_16, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-11-28 18:15:01,930 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L810-2-->L810-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1065128433 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1065128433 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite40_Out1065128433| |ULTIMATE.start_main_#t~ite41_Out1065128433|))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite40_Out1065128433| ~z~0_In1065128433) .cse2) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite40_Out1065128433| ~z$w_buff1~0_In1065128433) (not .cse0) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1065128433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1065128433, ~z$w_buff1~0=~z$w_buff1~0_In1065128433, ~z~0=~z~0_In1065128433} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1065128433|, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1065128433|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1065128433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1065128433, ~z$w_buff1~0=~z$w_buff1~0_In1065128433, ~z~0=~z~0_In1065128433} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-11-28 18:15:01,931 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In275918280 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In275918280 256)))) (or (and (= ~z$w_buff0_used~0_In275918280 |ULTIMATE.start_main_#t~ite42_Out275918280|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite42_Out275918280| 0) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In275918280, ~z$w_buff0_used~0=~z$w_buff0_used~0_In275918280} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In275918280, ~z$w_buff0_used~0=~z$w_buff0_used~0_In275918280, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out275918280|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:15:01,932 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L812-->L812-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1993494908 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1993494908 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1993494908 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1993494908 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite43_Out-1993494908| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite43_Out-1993494908| ~z$w_buff1_used~0_In-1993494908) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1993494908, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1993494908, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1993494908, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1993494908} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1993494908, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1993494908, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1993494908, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1993494908, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1993494908|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-11-28 18:15:01,932 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In869446357 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In869446357 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out869446357| ~z$r_buff0_thd0~0_In869446357) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite44_Out869446357| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869446357, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869446357} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869446357, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869446357, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out869446357|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:15:01,933 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L814-->L814-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1998560433 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In1998560433 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1998560433 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In1998560433 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out1998560433| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out1998560433| ~z$r_buff1_thd0~0_In1998560433)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1998560433, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1998560433, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1998560433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1998560433} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1998560433, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1998560433, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1998560433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1998560433, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1998560433|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-11-28 18:15:01,933 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L814-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_14 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~z$r_buff1_thd0~0_107 |v_ULTIMATE.start_main_#t~ite45_60|) (= (ite (= (ite (not (and (= v_~__unbuffered_p1_EBX~0_28 0) (= 1 v_~__unbuffered_p1_EAX~0_28) (= v_~x~0_67 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_22) (= v_ULTIMATE.start___VERIFIER_assert_~expression_14 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_22 256))) InVars {~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_28, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~x~0=v_~x~0_67, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_14, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_28, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_107, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ~x~0=v_~x~0_67, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_59|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:15:02,009 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:15:02,009 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:15:02,011 INFO L168 Benchmark]: Toolchain (without parser) took 15484.28 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 449.3 MB). Free memory was 956.3 MB in the beginning and 1.0 GB in the end (delta: -49.8 MB). Peak memory consumption was 399.5 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:02,012 INFO L168 Benchmark]: CDTParser took 0.87 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:02,013 INFO L168 Benchmark]: CACSL2BoogieTranslator took 711.32 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 956.3 MB in the beginning and 1.1 GB in the end (delta: -148.8 MB). Peak memory consumption was 26.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:02,013 INFO L168 Benchmark]: Boogie Procedure Inliner took 61.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:02,014 INFO L168 Benchmark]: Boogie Preprocessor took 44.59 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:02,014 INFO L168 Benchmark]: RCFGBuilder took 847.10 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:02,015 INFO L168 Benchmark]: TraceAbstraction took 13714.97 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 307.2 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 35.9 MB). Peak memory consumption was 343.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:02,016 INFO L168 Benchmark]: Witness Printer took 97.09 ms. Allocated memory is still 1.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:02,019 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.87 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 711.32 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 956.3 MB in the beginning and 1.1 GB in the end (delta: -148.8 MB). Peak memory consumption was 26.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 61.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 44.59 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 847.10 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13714.97 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 307.2 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 35.9 MB). Peak memory consumption was 343.1 MB. Max. memory is 11.5 GB. * Witness Printer took 97.09 ms. Allocated memory is still 1.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.0s, 148 ProgramPointsBefore, 77 ProgramPointsAfterwards, 182 TransitionsBefore, 89 TransitionsAfterwards, 12056 CoEnabledTransitionPairs, 13 FixpointIterations, 30 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 25 ChoiceCompositions, 4608 VarBasedMoverChecksPositive, 304 VarBasedMoverChecksNegative, 234 SemBasedMoverChecksPositive, 187 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.4s, 0 MoverChecksTotal, 82827 CheckedPairsTotal, 110 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L802] FCALL, FORK 0 pthread_create(&t1089, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L726] 1 z$w_buff1 = z$w_buff0 [L727] 1 z$w_buff0 = 1 [L728] 1 z$w_buff1_used = z$w_buff0_used [L729] 1 z$w_buff0_used = (_Bool)1 [L740] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L804] FCALL, FORK 0 pthread_create(&t1090, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L754] 2 x = 2 [L757] 2 y = 1 [L760] 2 __unbuffered_p1_EAX = y [L763] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L764] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L765] 2 z$flush_delayed = weak$$choice2 [L766] 2 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] EXPR 2 !z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L740] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L741] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L742] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L767] 2 z = !z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1) [L768] EXPR 2 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0)) [L769] EXPR 2 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L769] 2 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1)) [L770] EXPR 2 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L770] 2 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used)) [L771] EXPR 2 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L771] 2 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L773] 2 z$r_buff1_thd2 = weak$$choice2 ? z$r_buff1_thd2 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$r_buff1_thd2 : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L774] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L781] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L782] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L810] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L811] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L812] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L813] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 142 locations, 2 error locations. Result: UNSAFE, OverallTime: 13.4s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 4.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2261 SDtfs, 1844 SDslu, 4224 SDs, 0 SdLazy, 2411 SolverSat, 80 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 101 GetRequests, 24 SyntacticMatches, 12 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8640occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.1s AutomataMinimizationTime, 16 MinimizatonAttempts, 5353 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 523 NumberOfCodeBlocks, 523 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 454 ConstructedInterpolants, 0 QuantifiedInterpolants, 92818 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...