./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix041_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix041_pso.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c90aabdcb449858b39f307716d76c9a742b2770a ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:14:50,124 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:14:50,127 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:14:50,140 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:14:50,141 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:14:50,142 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:14:50,144 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:14:50,146 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:14:50,148 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:14:50,149 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:14:50,150 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:14:50,151 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:14:50,152 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:14:50,153 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:14:50,154 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:14:50,155 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:14:50,156 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:14:50,157 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:14:50,159 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:14:50,161 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:14:50,163 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:14:50,165 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:14:50,166 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:14:50,167 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:14:50,169 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:14:50,170 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:14:50,170 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:14:50,171 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:14:50,172 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:14:50,173 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:14:50,173 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:14:50,174 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:14:50,175 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:14:50,176 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:14:50,177 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:14:50,177 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:14:50,180 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:14:50,181 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:14:50,181 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:14:50,182 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:14:50,187 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:14:50,188 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:14:50,213 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:14:50,216 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:14:50,217 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:14:50,218 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:14:50,218 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:14:50,219 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:14:50,219 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:14:50,219 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:14:50,219 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:14:50,220 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:14:50,221 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:14:50,221 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:14:50,221 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:14:50,222 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:14:50,222 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:14:50,222 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:14:50,223 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:14:50,223 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:14:50,223 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:14:50,223 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:14:50,224 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:14:50,224 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:14:50,225 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:14:50,225 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:14:50,225 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:14:50,225 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:14:50,226 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:14:50,226 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:14:50,226 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:14:50,226 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c90aabdcb449858b39f307716d76c9a742b2770a [2019-11-28 18:14:50,537 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:14:50,558 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:14:50,564 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:14:50,566 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:14:50,567 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:14:50,567 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix041_pso.opt.i [2019-11-28 18:14:50,658 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d6a450e6b/87ee4d1d27ba4d2f9322deaf81a0b5d2/FLAG60641da9d [2019-11-28 18:14:51,231 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:14:51,232 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix041_pso.opt.i [2019-11-28 18:14:51,252 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d6a450e6b/87ee4d1d27ba4d2f9322deaf81a0b5d2/FLAG60641da9d [2019-11-28 18:14:51,457 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d6a450e6b/87ee4d1d27ba4d2f9322deaf81a0b5d2 [2019-11-28 18:14:51,461 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:14:51,463 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:14:51,464 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:14:51,465 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:14:51,468 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:14:51,470 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:14:51" (1/1) ... [2019-11-28 18:14:51,473 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5aed937a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:51, skipping insertion in model container [2019-11-28 18:14:51,473 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:14:51" (1/1) ... [2019-11-28 18:14:51,480 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:14:51,553 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:14:52,073 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:14:52,086 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:14:52,150 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:14:52,249 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:14:52,250 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52 WrapperNode [2019-11-28 18:14:52,251 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:14:52,252 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:14:52,252 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:14:52,252 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:14:52,262 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,296 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,331 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:14:52,332 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:14:52,332 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:14:52,332 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:14:52,340 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,340 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,345 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,346 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,356 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,360 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,363 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... [2019-11-28 18:14:52,369 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:14:52,370 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:14:52,370 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:14:52,370 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:14:52,371 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:14:52,452 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:14:52,453 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:14:52,453 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:14:52,454 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:14:52,454 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:14:52,455 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:14:52,455 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:14:52,455 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:14:52,455 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:14:52,456 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:14:52,456 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:14:52,459 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:14:53,165 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:14:53,166 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:14:53,167 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:14:53 BoogieIcfgContainer [2019-11-28 18:14:53,167 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:14:53,169 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:14:53,169 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:14:53,173 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:14:53,173 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:14:51" (1/3) ... [2019-11-28 18:14:53,174 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e59c009 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:14:53, skipping insertion in model container [2019-11-28 18:14:53,174 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:14:52" (2/3) ... [2019-11-28 18:14:53,175 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e59c009 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:14:53, skipping insertion in model container [2019-11-28 18:14:53,175 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:14:53" (3/3) ... [2019-11-28 18:14:53,177 INFO L109 eAbstractionObserver]: Analyzing ICFG mix041_pso.opt.i [2019-11-28 18:14:53,188 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:14:53,188 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:14:53,196 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:14:53,197 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:14:53,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,232 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,232 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,232 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,233 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,233 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,233 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,234 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,234 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,234 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,234 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,235 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,235 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,235 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,235 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,236 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,236 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,236 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,237 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,237 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,237 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,238 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,238 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,238 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,239 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,239 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,239 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,239 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,240 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,241 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,241 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,242 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,242 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,242 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,243 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,243 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,243 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:14:53,272 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:14:53,290 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:14:53,290 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:14:53,291 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:14:53,291 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:14:53,291 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:14:53,291 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:14:53,291 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:14:53,291 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:14:53,309 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 148 places, 182 transitions [2019-11-28 18:14:53,311 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-11-28 18:14:53,426 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-11-28 18:14:53,426 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:14:53,442 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:14:53,463 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-11-28 18:14:53,508 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-11-28 18:14:53,508 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:14:53,515 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:14:53,530 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-11-28 18:14:53,532 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:14:57,917 WARN L192 SmtUtils]: Spent 247.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-11-28 18:14:58,050 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-11-28 18:14:58,085 INFO L206 etLargeBlockEncoding]: Checked pairs total: 45620 [2019-11-28 18:14:58,085 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-11-28 18:14:58,089 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 77 places, 88 transitions [2019-11-28 18:14:58,714 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8218 states. [2019-11-28 18:14:58,717 INFO L276 IsEmpty]: Start isEmpty. Operand 8218 states. [2019-11-28 18:14:58,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-11-28 18:14:58,725 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:14:58,726 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-11-28 18:14:58,727 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:14:58,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:14:58,741 INFO L82 PathProgramCache]: Analyzing trace with hash 699456563, now seen corresponding path program 1 times [2019-11-28 18:14:58,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:14:58,757 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067850141] [2019-11-28 18:14:58,758 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:14:59,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:14:59,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:14:59,210 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067850141] [2019-11-28 18:14:59,211 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:14:59,211 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:14:59,212 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1494529605] [2019-11-28 18:14:59,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:14:59,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:14:59,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:14:59,256 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:59,260 INFO L87 Difference]: Start difference. First operand 8218 states. Second operand 3 states. [2019-11-28 18:14:59,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:14:59,580 INFO L93 Difference]: Finished difference Result 8170 states and 26597 transitions. [2019-11-28 18:14:59,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:14:59,583 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-11-28 18:14:59,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:14:59,698 INFO L225 Difference]: With dead ends: 8170 [2019-11-28 18:14:59,700 INFO L226 Difference]: Without dead ends: 8001 [2019-11-28 18:14:59,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:14:59,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8001 states. [2019-11-28 18:15:00,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8001 to 8001. [2019-11-28 18:15:00,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8001 states. [2019-11-28 18:15:00,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8001 states to 8001 states and 26077 transitions. [2019-11-28 18:15:00,160 INFO L78 Accepts]: Start accepts. Automaton has 8001 states and 26077 transitions. Word has length 5 [2019-11-28 18:15:00,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:00,161 INFO L462 AbstractCegarLoop]: Abstraction has 8001 states and 26077 transitions. [2019-11-28 18:15:00,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:00,161 INFO L276 IsEmpty]: Start isEmpty. Operand 8001 states and 26077 transitions. [2019-11-28 18:15:00,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:15:00,166 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:00,167 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:00,167 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:00,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:00,168 INFO L82 PathProgramCache]: Analyzing trace with hash 336736415, now seen corresponding path program 1 times [2019-11-28 18:15:00,168 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:00,168 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400747506] [2019-11-28 18:15:00,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:00,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:00,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:00,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [400747506] [2019-11-28 18:15:00,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:00,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:00,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112869456] [2019-11-28 18:15:00,298 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:00,299 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:00,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:00,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:00,300 INFO L87 Difference]: Start difference. First operand 8001 states and 26077 transitions. Second operand 4 states. [2019-11-28 18:15:00,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:00,712 INFO L93 Difference]: Finished difference Result 12769 states and 39815 transitions. [2019-11-28 18:15:00,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:00,713 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:15:00,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:00,801 INFO L225 Difference]: With dead ends: 12769 [2019-11-28 18:15:00,802 INFO L226 Difference]: Without dead ends: 12762 [2019-11-28 18:15:00,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:00,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12762 states. [2019-11-28 18:15:01,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12762 to 11253. [2019-11-28 18:15:01,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11253 states. [2019-11-28 18:15:01,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11253 states to 11253 states and 35607 transitions. [2019-11-28 18:15:01,294 INFO L78 Accepts]: Start accepts. Automaton has 11253 states and 35607 transitions. Word has length 11 [2019-11-28 18:15:01,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:01,295 INFO L462 AbstractCegarLoop]: Abstraction has 11253 states and 35607 transitions. [2019-11-28 18:15:01,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:01,296 INFO L276 IsEmpty]: Start isEmpty. Operand 11253 states and 35607 transitions. [2019-11-28 18:15:01,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:15:01,298 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:01,299 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:01,299 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:01,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:01,300 INFO L82 PathProgramCache]: Analyzing trace with hash 1460182026, now seen corresponding path program 1 times [2019-11-28 18:15:01,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:01,301 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186073980] [2019-11-28 18:15:01,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:01,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:01,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:01,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [186073980] [2019-11-28 18:15:01,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:01,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:01,540 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [519050909] [2019-11-28 18:15:01,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:01,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:01,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:01,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:01,541 INFO L87 Difference]: Start difference. First operand 11253 states and 35607 transitions. Second operand 4 states. [2019-11-28 18:15:01,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:01,791 INFO L93 Difference]: Finished difference Result 14137 states and 44209 transitions. [2019-11-28 18:15:01,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:01,791 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:15:01,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:01,840 INFO L225 Difference]: With dead ends: 14137 [2019-11-28 18:15:01,841 INFO L226 Difference]: Without dead ends: 14137 [2019-11-28 18:15:01,841 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:01,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14137 states. [2019-11-28 18:15:02,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14137 to 12459. [2019-11-28 18:15:02,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12459 states. [2019-11-28 18:15:02,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12459 states to 12459 states and 39325 transitions. [2019-11-28 18:15:02,303 INFO L78 Accepts]: Start accepts. Automaton has 12459 states and 39325 transitions. Word has length 11 [2019-11-28 18:15:02,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:02,303 INFO L462 AbstractCegarLoop]: Abstraction has 12459 states and 39325 transitions. [2019-11-28 18:15:02,303 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:02,304 INFO L276 IsEmpty]: Start isEmpty. Operand 12459 states and 39325 transitions. [2019-11-28 18:15:02,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:15:02,308 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:02,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:02,309 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:02,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:02,309 INFO L82 PathProgramCache]: Analyzing trace with hash 289140598, now seen corresponding path program 1 times [2019-11-28 18:15:02,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:02,310 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811743655] [2019-11-28 18:15:02,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:02,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:02,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:02,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811743655] [2019-11-28 18:15:02,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:02,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:02,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2125438648] [2019-11-28 18:15:02,413 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:02,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:02,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:02,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:02,414 INFO L87 Difference]: Start difference. First operand 12459 states and 39325 transitions. Second operand 5 states. [2019-11-28 18:15:02,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:02,889 INFO L93 Difference]: Finished difference Result 16999 states and 52476 transitions. [2019-11-28 18:15:02,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:15:02,890 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-11-28 18:15:02,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:02,968 INFO L225 Difference]: With dead ends: 16999 [2019-11-28 18:15:02,969 INFO L226 Difference]: Without dead ends: 16992 [2019-11-28 18:15:02,970 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:15:03,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16992 states. [2019-11-28 18:15:03,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16992 to 12516. [2019-11-28 18:15:03,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12516 states. [2019-11-28 18:15:03,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12516 states to 12516 states and 39375 transitions. [2019-11-28 18:15:03,389 INFO L78 Accepts]: Start accepts. Automaton has 12516 states and 39375 transitions. Word has length 17 [2019-11-28 18:15:03,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:03,390 INFO L462 AbstractCegarLoop]: Abstraction has 12516 states and 39375 transitions. [2019-11-28 18:15:03,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:03,390 INFO L276 IsEmpty]: Start isEmpty. Operand 12516 states and 39375 transitions. [2019-11-28 18:15:03,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:15:03,403 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:03,403 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:03,403 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:03,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:03,404 INFO L82 PathProgramCache]: Analyzing trace with hash 1619137928, now seen corresponding path program 1 times [2019-11-28 18:15:03,404 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:03,404 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341212700] [2019-11-28 18:15:03,404 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:03,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:03,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:03,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341212700] [2019-11-28 18:15:03,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:03,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:03,714 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346145667] [2019-11-28 18:15:03,714 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:03,714 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:03,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:03,715 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:03,715 INFO L87 Difference]: Start difference. First operand 12516 states and 39375 transitions. Second operand 4 states. [2019-11-28 18:15:03,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:03,758 INFO L93 Difference]: Finished difference Result 2110 states and 4812 transitions. [2019-11-28 18:15:03,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:15:03,759 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-11-28 18:15:03,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:03,763 INFO L225 Difference]: With dead ends: 2110 [2019-11-28 18:15:03,763 INFO L226 Difference]: Without dead ends: 1824 [2019-11-28 18:15:03,764 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:03,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1824 states. [2019-11-28 18:15:03,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1824 to 1824. [2019-11-28 18:15:03,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1824 states. [2019-11-28 18:15:03,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1824 states to 1824 states and 4021 transitions. [2019-11-28 18:15:03,801 INFO L78 Accepts]: Start accepts. Automaton has 1824 states and 4021 transitions. Word has length 25 [2019-11-28 18:15:03,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:03,802 INFO L462 AbstractCegarLoop]: Abstraction has 1824 states and 4021 transitions. [2019-11-28 18:15:03,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:03,802 INFO L276 IsEmpty]: Start isEmpty. Operand 1824 states and 4021 transitions. [2019-11-28 18:15:03,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:15:03,808 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:03,808 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:03,808 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:03,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:03,809 INFO L82 PathProgramCache]: Analyzing trace with hash 736634855, now seen corresponding path program 1 times [2019-11-28 18:15:03,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:03,810 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092789989] [2019-11-28 18:15:03,810 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:03,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:03,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:03,930 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1092789989] [2019-11-28 18:15:03,930 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:03,930 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:15:03,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195897567] [2019-11-28 18:15:03,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:03,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:03,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:03,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:03,933 INFO L87 Difference]: Start difference. First operand 1824 states and 4021 transitions. Second operand 5 states. [2019-11-28 18:15:03,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:03,973 INFO L93 Difference]: Finished difference Result 419 states and 767 transitions. [2019-11-28 18:15:03,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:03,974 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:15:03,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:03,975 INFO L225 Difference]: With dead ends: 419 [2019-11-28 18:15:03,975 INFO L226 Difference]: Without dead ends: 373 [2019-11-28 18:15:03,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:15:03,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 373 states. [2019-11-28 18:15:03,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 373 to 338. [2019-11-28 18:15:03,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 338 states. [2019-11-28 18:15:03,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 338 states to 338 states and 612 transitions. [2019-11-28 18:15:03,982 INFO L78 Accepts]: Start accepts. Automaton has 338 states and 612 transitions. Word has length 37 [2019-11-28 18:15:03,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:03,983 INFO L462 AbstractCegarLoop]: Abstraction has 338 states and 612 transitions. [2019-11-28 18:15:03,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:03,983 INFO L276 IsEmpty]: Start isEmpty. Operand 338 states and 612 transitions. [2019-11-28 18:15:03,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:15:03,985 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:03,985 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:03,986 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:03,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:03,986 INFO L82 PathProgramCache]: Analyzing trace with hash -1915125863, now seen corresponding path program 1 times [2019-11-28 18:15:03,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:03,987 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191692075] [2019-11-28 18:15:03,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:04,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:04,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:04,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191692075] [2019-11-28 18:15:04,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:04,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:04,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1622487064] [2019-11-28 18:15:04,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:04,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:04,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:04,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:04,050 INFO L87 Difference]: Start difference. First operand 338 states and 612 transitions. Second operand 3 states. [2019-11-28 18:15:04,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:04,106 INFO L93 Difference]: Finished difference Result 352 states and 630 transitions. [2019-11-28 18:15:04,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:04,107 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:15:04,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:04,108 INFO L225 Difference]: With dead ends: 352 [2019-11-28 18:15:04,108 INFO L226 Difference]: Without dead ends: 352 [2019-11-28 18:15:04,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:04,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2019-11-28 18:15:04,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 348. [2019-11-28 18:15:04,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2019-11-28 18:15:04,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 626 transitions. [2019-11-28 18:15:04,117 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 626 transitions. Word has length 52 [2019-11-28 18:15:04,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:04,119 INFO L462 AbstractCegarLoop]: Abstraction has 348 states and 626 transitions. [2019-11-28 18:15:04,120 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:04,120 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 626 transitions. [2019-11-28 18:15:04,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:15:04,122 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:04,122 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:04,122 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:04,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:04,123 INFO L82 PathProgramCache]: Analyzing trace with hash 1804822393, now seen corresponding path program 1 times [2019-11-28 18:15:04,123 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:04,124 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365875919] [2019-11-28 18:15:04,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:04,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:04,249 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:04,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [365875919] [2019-11-28 18:15:04,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:04,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:04,257 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976899683] [2019-11-28 18:15:04,258 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:04,259 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:04,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:04,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:04,259 INFO L87 Difference]: Start difference. First operand 348 states and 626 transitions. Second operand 3 states. [2019-11-28 18:15:04,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:04,282 INFO L93 Difference]: Finished difference Result 348 states and 613 transitions. [2019-11-28 18:15:04,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:04,283 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:15:04,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:04,284 INFO L225 Difference]: With dead ends: 348 [2019-11-28 18:15:04,284 INFO L226 Difference]: Without dead ends: 348 [2019-11-28 18:15:04,285 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:04,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 348 states. [2019-11-28 18:15:04,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 348 to 348. [2019-11-28 18:15:04,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2019-11-28 18:15:04,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 613 transitions. [2019-11-28 18:15:04,291 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 613 transitions. Word has length 52 [2019-11-28 18:15:04,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:04,292 INFO L462 AbstractCegarLoop]: Abstraction has 348 states and 613 transitions. [2019-11-28 18:15:04,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:04,292 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 613 transitions. [2019-11-28 18:15:04,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:15:04,295 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:04,295 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:04,295 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:04,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:04,296 INFO L82 PathProgramCache]: Analyzing trace with hash 1986059885, now seen corresponding path program 1 times [2019-11-28 18:15:04,296 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:04,296 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [930306165] [2019-11-28 18:15:04,297 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:04,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:04,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:04,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [930306165] [2019-11-28 18:15:04,473 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:04,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:04,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2136669508] [2019-11-28 18:15:04,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:04,475 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:04,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:04,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:04,476 INFO L87 Difference]: Start difference. First operand 348 states and 613 transitions. Second operand 5 states. [2019-11-28 18:15:04,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:04,679 INFO L93 Difference]: Finished difference Result 479 states and 847 transitions. [2019-11-28 18:15:04,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:15:04,684 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-11-28 18:15:04,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:04,686 INFO L225 Difference]: With dead ends: 479 [2019-11-28 18:15:04,686 INFO L226 Difference]: Without dead ends: 479 [2019-11-28 18:15:04,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:04,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2019-11-28 18:15:04,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 426. [2019-11-28 18:15:04,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 426 states. [2019-11-28 18:15:04,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 753 transitions. [2019-11-28 18:15:04,703 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 753 transitions. Word has length 53 [2019-11-28 18:15:04,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:04,703 INFO L462 AbstractCegarLoop]: Abstraction has 426 states and 753 transitions. [2019-11-28 18:15:04,704 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:04,704 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 753 transitions. [2019-11-28 18:15:04,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:15:04,708 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:04,709 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:04,709 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:04,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:04,710 INFO L82 PathProgramCache]: Analyzing trace with hash -2130042739, now seen corresponding path program 2 times [2019-11-28 18:15:04,710 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:04,710 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958679331] [2019-11-28 18:15:04,711 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:04,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:04,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:04,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [958679331] [2019-11-28 18:15:04,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:04,907 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:04,907 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1189086627] [2019-11-28 18:15:04,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:15:04,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:04,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:15:04,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:04,908 INFO L87 Difference]: Start difference. First operand 426 states and 753 transitions. Second operand 6 states. [2019-11-28 18:15:05,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:05,149 INFO L93 Difference]: Finished difference Result 555 states and 972 transitions. [2019-11-28 18:15:05,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:15:05,155 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-28 18:15:05,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:05,156 INFO L225 Difference]: With dead ends: 555 [2019-11-28 18:15:05,156 INFO L226 Difference]: Without dead ends: 555 [2019-11-28 18:15:05,156 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:15:05,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2019-11-28 18:15:05,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 440. [2019-11-28 18:15:05,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 440 states. [2019-11-28 18:15:05,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 440 states to 440 states and 779 transitions. [2019-11-28 18:15:05,164 INFO L78 Accepts]: Start accepts. Automaton has 440 states and 779 transitions. Word has length 53 [2019-11-28 18:15:05,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:05,165 INFO L462 AbstractCegarLoop]: Abstraction has 440 states and 779 transitions. [2019-11-28 18:15:05,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:15:05,165 INFO L276 IsEmpty]: Start isEmpty. Operand 440 states and 779 transitions. [2019-11-28 18:15:05,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:15:05,166 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:05,167 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:05,167 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:05,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:05,167 INFO L82 PathProgramCache]: Analyzing trace with hash -1191623101, now seen corresponding path program 3 times [2019-11-28 18:15:05,167 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:05,168 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674055792] [2019-11-28 18:15:05,168 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:05,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:05,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:05,534 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [674055792] [2019-11-28 18:15:05,534 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:05,534 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:15:05,534 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [657855394] [2019-11-28 18:15:05,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:15:05,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:05,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:15:05,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:15:05,535 INFO L87 Difference]: Start difference. First operand 440 states and 779 transitions. Second operand 12 states. [2019-11-28 18:15:06,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:06,380 INFO L93 Difference]: Finished difference Result 632 states and 1096 transitions. [2019-11-28 18:15:06,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:15:06,381 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 53 [2019-11-28 18:15:06,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:06,382 INFO L225 Difference]: With dead ends: 632 [2019-11-28 18:15:06,382 INFO L226 Difference]: Without dead ends: 632 [2019-11-28 18:15:06,383 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=114, Invalid=348, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:15:06,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 632 states. [2019-11-28 18:15:06,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 632 to 426. [2019-11-28 18:15:06,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 426 states. [2019-11-28 18:15:06,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 743 transitions. [2019-11-28 18:15:06,391 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 743 transitions. Word has length 53 [2019-11-28 18:15:06,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:06,391 INFO L462 AbstractCegarLoop]: Abstraction has 426 states and 743 transitions. [2019-11-28 18:15:06,391 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:15:06,391 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 743 transitions. [2019-11-28 18:15:06,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:15:06,393 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:06,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:06,393 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:06,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:06,393 INFO L82 PathProgramCache]: Analyzing trace with hash -424695835, now seen corresponding path program 4 times [2019-11-28 18:15:06,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:06,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221993662] [2019-11-28 18:15:06,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:06,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:06,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:06,458 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1221993662] [2019-11-28 18:15:06,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:06,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:06,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [80013250] [2019-11-28 18:15:06,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:06,459 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:06,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:06,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:06,460 INFO L87 Difference]: Start difference. First operand 426 states and 743 transitions. Second operand 3 states. [2019-11-28 18:15:06,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:06,497 INFO L93 Difference]: Finished difference Result 425 states and 741 transitions. [2019-11-28 18:15:06,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:06,498 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:15:06,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:06,498 INFO L225 Difference]: With dead ends: 425 [2019-11-28 18:15:06,498 INFO L226 Difference]: Without dead ends: 425 [2019-11-28 18:15:06,499 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:06,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 425 states. [2019-11-28 18:15:06,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 425 to 345. [2019-11-28 18:15:06,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-11-28 18:15:06,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 599 transitions. [2019-11-28 18:15:06,505 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 599 transitions. Word has length 53 [2019-11-28 18:15:06,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:06,505 INFO L462 AbstractCegarLoop]: Abstraction has 345 states and 599 transitions. [2019-11-28 18:15:06,505 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:06,505 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 599 transitions. [2019-11-28 18:15:06,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:15:06,507 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:06,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:06,507 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:06,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:06,507 INFO L82 PathProgramCache]: Analyzing trace with hash -752439480, now seen corresponding path program 1 times [2019-11-28 18:15:06,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:06,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214638486] [2019-11-28 18:15:06,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:06,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:06,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:06,631 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214638486] [2019-11-28 18:15:06,631 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:06,631 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:06,632 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [85909454] [2019-11-28 18:15:06,632 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:15:06,632 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:06,632 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:15:06,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:06,633 INFO L87 Difference]: Start difference. First operand 345 states and 599 transitions. Second operand 6 states. [2019-11-28 18:15:06,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:06,693 INFO L93 Difference]: Finished difference Result 510 states and 877 transitions. [2019-11-28 18:15:06,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:15:06,693 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-11-28 18:15:06,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:06,694 INFO L225 Difference]: With dead ends: 510 [2019-11-28 18:15:06,694 INFO L226 Difference]: Without dead ends: 182 [2019-11-28 18:15:06,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:15:06,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2019-11-28 18:15:06,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2019-11-28 18:15:06,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2019-11-28 18:15:06,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 304 transitions. [2019-11-28 18:15:06,698 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 304 transitions. Word has length 54 [2019-11-28 18:15:06,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:06,698 INFO L462 AbstractCegarLoop]: Abstraction has 182 states and 304 transitions. [2019-11-28 18:15:06,698 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:15:06,698 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 304 transitions. [2019-11-28 18:15:06,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:15:06,699 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:06,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:06,700 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:06,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:06,700 INFO L82 PathProgramCache]: Analyzing trace with hash 516281010, now seen corresponding path program 2 times [2019-11-28 18:15:06,700 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:06,700 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923773281] [2019-11-28 18:15:06,701 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:06,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:15:06,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:15:06,861 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:15:06,861 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:15:06,866 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_46| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$r_buff1_thd2~0_157) (= 0 v_~weak$$choice0~0_14) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1095~0.base_20| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1095~0.base_20|) |v_ULTIMATE.start_main_~#t1095~0.offset_15| 0)) |v_#memory_int_17|) (= |v_#NULL.offset_6| 0) (= v_~x$mem_tmp~0_21 0) (= 0 v_~x$w_buff0~0_235) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~x$w_buff1~0_175) (= 0 v_~x$w_buff1_used~0_360) (= v_~weak$$choice2~0_113 0) (= 0 v_~x$read_delayed~0_5) (= 0 v_~x$r_buff0_thd2~0_211) (= v_~main$tmp_guard1~0_26 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1095~0.base_20| 1) |v_#valid_44|) (= v_~x$r_buff0_thd0~0_331 0) (= |v_ULTIMATE.start_main_~#t1095~0.offset_15| 0) (= v_~x$r_buff1_thd0~0_268 0) (= v_~__unbuffered_p1_EAX~0_126 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~x$r_buff1_thd1~0_198 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1095~0.base_20|)) (= 0 v_~__unbuffered_cnt~0_64) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p1_EBX~0_126) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1095~0.base_20| 4) |v_#length_17|) (= 0 v_~x$w_buff0_used~0_638) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1095~0.base_20|) (= 0 v_~x~0_158) (= v_~x$flush_delayed~0_38 0) (= v_~z~0_80 0) (= v_~y~0_115 0) (= v_~x$r_buff0_thd1~0_118 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_235, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, ~x$flush_delayed~0=v_~x$flush_delayed~0_38, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_30|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_198, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_34|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_~#t1096~0.offset=|v_ULTIMATE.start_main_~#t1096~0.offset_14|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_38|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_126, ULTIMATE.start_main_~#t1096~0.base=|v_ULTIMATE.start_main_~#t1096~0.base_17|, #length=|v_#length_17|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_331, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_35|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_28|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ~x$w_buff1~0=v_~x$w_buff1~0_175, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_24|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_360, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_157, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_29|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_30|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_27|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_28|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64, ~x~0=v_~x~0_158, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_118, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_26|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_45|, ~x$mem_tmp~0=v_~x$mem_tmp~0_21, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_26|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_36|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_26|, ULTIMATE.start_main_~#t1095~0.offset=|v_ULTIMATE.start_main_~#t1095~0.offset_15|, ~y~0=v_~y~0_115, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_126, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_34|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_24|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_34|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_31|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_268, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_211, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_35|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_638, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_17|, ~z~0=v_~z~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_113, ULTIMATE.start_main_~#t1095~0.base=|v_ULTIMATE.start_main_~#t1095~0.base_20|, ~x$read_delayed~0=v_~x$read_delayed~0_5} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t1096~0.offset, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1096~0.base, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1095~0.offset, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t1095~0.base, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:15:06,867 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L789-1-->L791: Formula: (and (= (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1096~0.base_11|) 0) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t1096~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t1096~0.base_11| 0)) (= |v_ULTIMATE.start_main_~#t1096~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1096~0.base_11|) (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1096~0.base_11| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1096~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1096~0.base_11|) |v_ULTIMATE.start_main_~#t1096~0.offset_10| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1096~0.base=|v_ULTIMATE.start_main_~#t1096~0.base_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1096~0.offset=|v_ULTIMATE.start_main_~#t1096~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t1096~0.base, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1096~0.offset] because there is no mapped edge [2019-11-28 18:15:06,867 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [588] [588] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= 1 v_~x$w_buff0_used~0_78) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_78 256))) (not (= (mod v_~x$w_buff1_used~0_47 256) 0)))) 1 0)) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= 2 v_~x$w_buff0~0_19) (= v_~x$w_buff0~0_20 v_~x$w_buff1~0_15) (= v_~x$w_buff1_used~0_47 v_~x$w_buff0_used~0_79) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_79} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, ~x$w_buff0~0=v_~x$w_buff0~0_19, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~x$w_buff1~0=v_~x$w_buff1~0_15, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_47, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_78} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:15:06,869 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L732-2-->L732-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out492054239| |P0Thread1of1ForFork0_#t~ite3_Out492054239|)) (.cse0 (= (mod ~x$w_buff1_used~0_In492054239 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd1~0_In492054239 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out492054239| ~x$w_buff1~0_In492054239)) (and .cse1 (= |P0Thread1of1ForFork0_#t~ite3_Out492054239| ~x~0_In492054239) (or .cse0 .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In492054239, ~x$w_buff1_used~0=~x$w_buff1_used~0_In492054239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In492054239, ~x~0=~x~0_In492054239} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out492054239|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out492054239|, ~x$w_buff1~0=~x$w_buff1~0_In492054239, ~x$w_buff1_used~0=~x$w_buff1_used~0_In492054239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In492054239, ~x~0=~x~0_In492054239} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:15:06,870 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L733-->L733-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1931336835 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1931336835 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1931336835| 0)) (and (= ~x$w_buff0_used~0_In1931336835 |P0Thread1of1ForFork0_#t~ite5_Out1931336835|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1931336835, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1931336835} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1931336835|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1931336835, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1931336835} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:15:06,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L734-->L734-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1101547368 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1101547368 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-1101547368 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1101547368 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1101547368|)) (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1101547368 |P0Thread1of1ForFork0_#t~ite6_Out-1101547368|) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1101547368, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1101547368, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1101547368, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1101547368} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1101547368|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1101547368, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1101547368, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1101547368, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1101547368} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:15:06,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L735-->L735-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-425199434 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-425199434 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-425199434|) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In-425199434 |P0Thread1of1ForFork0_#t~ite7_Out-425199434|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-425199434, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-425199434} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-425199434, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-425199434|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-425199434} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:15:06,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L736-->L736-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In2085927584 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd1~0_In2085927584 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In2085927584 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In2085927584 256)))) (or (and (= ~x$r_buff1_thd1~0_In2085927584 |P0Thread1of1ForFork0_#t~ite8_Out2085927584|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out2085927584|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2085927584, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2085927584, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2085927584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2085927584} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2085927584, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out2085927584|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2085927584, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2085927584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2085927584} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:15:06,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_144 |v_P0Thread1of1ForFork0_#t~ite8_34|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_144} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:15:06,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L767-->L767-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-746641160 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-746641160 256)))) (or (and (= ~x$w_buff0_used~0_In-746641160 |P1Thread1of1ForFork1_#t~ite11_Out-746641160|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-746641160|) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-746641160, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-746641160} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-746641160|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-746641160, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-746641160} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:15:06,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd2~0_In498270154 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In498270154 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In498270154 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In498270154 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out498270154| ~x$w_buff1_used~0_In498270154) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork1_#t~ite12_Out498270154| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In498270154, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In498270154, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In498270154, ~x$w_buff0_used~0=~x$w_buff0_used~0_In498270154} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In498270154, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In498270154, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out498270154|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In498270154, ~x$w_buff0_used~0=~x$w_buff0_used~0_In498270154} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:15:06,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L769-->L770: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-84532440 256))) (.cse1 (= ~x$r_buff0_thd2~0_Out-84532440 ~x$r_buff0_thd2~0_In-84532440)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-84532440 256) 0))) (or (and .cse0 .cse1) (and (not .cse0) (= ~x$r_buff0_thd2~0_Out-84532440 0) (not .cse2)) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-84532440, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-84532440} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-84532440|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-84532440, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-84532440} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:15:06,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1139689080 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In-1139689080 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-1139689080 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-1139689080 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-1139689080 |P1Thread1of1ForFork1_#t~ite14_Out-1139689080|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1139689080| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1139689080, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1139689080, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1139689080, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1139689080} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1139689080, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1139689080, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1139689080, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1139689080|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1139689080} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:15:06,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_134 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_134, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:15:06,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (or (= (mod v_~x$r_buff0_thd0~0_128 256) 0) (= 0 (mod v_~x$w_buff0_used~0_232 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_232} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_232} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:15:06,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L797-2-->L797-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1990601121 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1990601121 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite17_Out-1990601121| ~x$w_buff1~0_In-1990601121) (not .cse0) (not .cse1)) (and (= ~x~0_In-1990601121 |ULTIMATE.start_main_#t~ite17_Out-1990601121|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1990601121, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1990601121, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1990601121, ~x~0=~x~0_In-1990601121} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1990601121|, ~x$w_buff1~0=~x$w_buff1~0_In-1990601121, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1990601121, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1990601121, ~x~0=~x~0_In-1990601121} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:15:06,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L797-4-->L798: Formula: (= v_~x~0_43 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~x~0=v_~x~0_43} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-11-28 18:15:06,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1898047778 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1898047778 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite19_Out-1898047778| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite19_Out-1898047778| ~x$w_buff0_used~0_In-1898047778)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1898047778, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1898047778} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1898047778, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1898047778|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1898047778} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:15:06,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In838530304 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd0~0_In838530304 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In838530304 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In838530304 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out838530304| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite20_Out838530304| ~x$w_buff1_used~0_In838530304) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In838530304, ~x$w_buff1_used~0=~x$w_buff1_used~0_In838530304, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In838530304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In838530304} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In838530304, ~x$w_buff1_used~0=~x$w_buff1_used~0_In838530304, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out838530304|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In838530304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In838530304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:15:06,876 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1764806591 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1764806591 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-1764806591|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In-1764806591 |ULTIMATE.start_main_#t~ite21_Out-1764806591|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1764806591, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1764806591} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1764806591, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1764806591|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1764806591} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:15:06,876 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In-874271580 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-874271580 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-874271580 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-874271580 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In-874271580 |ULTIMATE.start_main_#t~ite22_Out-874271580|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-874271580|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-874271580, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-874271580, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-874271580, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-874271580} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-874271580, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-874271580, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-874271580, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-874271580|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-874271580} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:15:06,878 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L810-->L810-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-483919183 256)))) (or (and (= |ULTIMATE.start_main_#t~ite31_In-483919183| |ULTIMATE.start_main_#t~ite31_Out-483919183|) (not .cse0) (= |ULTIMATE.start_main_#t~ite32_Out-483919183| ~x$w_buff1~0_In-483919183)) (and (= |ULTIMATE.start_main_#t~ite31_Out-483919183| ~x$w_buff1~0_In-483919183) (= |ULTIMATE.start_main_#t~ite31_Out-483919183| |ULTIMATE.start_main_#t~ite32_Out-483919183|) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-483919183 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In-483919183 256)) (and (= (mod ~x$r_buff1_thd0~0_In-483919183 256) 0) .cse1) (and (= (mod ~x$w_buff1_used~0_In-483919183 256) 0) .cse1))) .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-483919183, ~x$w_buff1~0=~x$w_buff1~0_In-483919183, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-483919183, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-483919183, ~weak$$choice2~0=~weak$$choice2~0_In-483919183, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-483919183|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-483919183} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-483919183, ~x$w_buff1~0=~x$w_buff1~0_In-483919183, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-483919183, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-483919183|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-483919183, ~weak$$choice2~0=~weak$$choice2~0_In-483919183, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-483919183|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-483919183} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:15:06,880 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-353045963 256) 0))) (or (and (not .cse0) (= ~x$w_buff1_used~0_In-353045963 |ULTIMATE.start_main_#t~ite38_Out-353045963|) (= |ULTIMATE.start_main_#t~ite37_In-353045963| |ULTIMATE.start_main_#t~ite37_Out-353045963|)) (and .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-353045963 256) 0))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-353045963 256))) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In-353045963 256))) (= (mod ~x$w_buff0_used~0_In-353045963 256) 0))) (= ~x$w_buff1_used~0_In-353045963 |ULTIMATE.start_main_#t~ite37_Out-353045963|) (= |ULTIMATE.start_main_#t~ite37_Out-353045963| |ULTIMATE.start_main_#t~ite38_Out-353045963|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-353045963, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-353045963, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-353045963|, ~weak$$choice2~0=~weak$$choice2~0_In-353045963, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-353045963, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-353045963} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-353045963, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-353045963, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-353045963|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-353045963|, ~weak$$choice2~0=~weak$$choice2~0_In-353045963, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-353045963, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-353045963} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-11-28 18:15:06,880 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [602] [602] L813-->L814: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~x$r_buff0_thd0~0_85 v_~x$r_buff0_thd0~0_84)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_85, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_84, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:15:06,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L816-->L819-1: Formula: (and (= v_~x$mem_tmp~0_16 v_~x~0_122) (not (= 0 (mod v_~x$flush_delayed~0_31 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~x$flush_delayed~0_30 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_31, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_16} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ~x~0=v_~x~0_122, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_27|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:15:06,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:15:07,023 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:15:07 BasicIcfg [2019-11-28 18:15:07,023 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:15:07,024 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:15:07,024 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:15:07,024 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:15:07,025 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:14:53" (3/4) ... [2019-11-28 18:15:07,030 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:15:07,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_46| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$r_buff1_thd2~0_157) (= 0 v_~weak$$choice0~0_14) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1095~0.base_20| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1095~0.base_20|) |v_ULTIMATE.start_main_~#t1095~0.offset_15| 0)) |v_#memory_int_17|) (= |v_#NULL.offset_6| 0) (= v_~x$mem_tmp~0_21 0) (= 0 v_~x$w_buff0~0_235) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~x$w_buff1~0_175) (= 0 v_~x$w_buff1_used~0_360) (= v_~weak$$choice2~0_113 0) (= 0 v_~x$read_delayed~0_5) (= 0 v_~x$r_buff0_thd2~0_211) (= v_~main$tmp_guard1~0_26 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1095~0.base_20| 1) |v_#valid_44|) (= v_~x$r_buff0_thd0~0_331 0) (= |v_ULTIMATE.start_main_~#t1095~0.offset_15| 0) (= v_~x$r_buff1_thd0~0_268 0) (= v_~__unbuffered_p1_EAX~0_126 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~x$r_buff1_thd1~0_198 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1095~0.base_20|)) (= 0 v_~__unbuffered_cnt~0_64) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p1_EBX~0_126) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1095~0.base_20| 4) |v_#length_17|) (= 0 v_~x$w_buff0_used~0_638) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1095~0.base_20|) (= 0 v_~x~0_158) (= v_~x$flush_delayed~0_38 0) (= v_~z~0_80 0) (= v_~y~0_115 0) (= v_~x$r_buff0_thd1~0_118 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_235, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, ~x$flush_delayed~0=v_~x$flush_delayed~0_38, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_30|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_198, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_34|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_~#t1096~0.offset=|v_ULTIMATE.start_main_~#t1096~0.offset_14|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_38|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_126, ULTIMATE.start_main_~#t1096~0.base=|v_ULTIMATE.start_main_~#t1096~0.base_17|, #length=|v_#length_17|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_331, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_35|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_28|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ~x$w_buff1~0=v_~x$w_buff1~0_175, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_24|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_360, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_157, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_29|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_30|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_27|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_28|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64, ~x~0=v_~x~0_158, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_118, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_26|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_45|, ~x$mem_tmp~0=v_~x$mem_tmp~0_21, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_26|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_36|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_26|, ULTIMATE.start_main_~#t1095~0.offset=|v_ULTIMATE.start_main_~#t1095~0.offset_15|, ~y~0=v_~y~0_115, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_126, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_34|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_24|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_34|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_31|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_268, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_211, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_35|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_638, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_17|, ~z~0=v_~z~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_113, ULTIMATE.start_main_~#t1095~0.base=|v_ULTIMATE.start_main_~#t1095~0.base_20|, ~x$read_delayed~0=v_~x$read_delayed~0_5} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t1096~0.offset, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1096~0.base, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1095~0.offset, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t1095~0.base, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:15:07,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L789-1-->L791: Formula: (and (= (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1096~0.base_11|) 0) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t1096~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t1096~0.base_11| 0)) (= |v_ULTIMATE.start_main_~#t1096~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1096~0.base_11|) (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1096~0.base_11| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1096~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1096~0.base_11|) |v_ULTIMATE.start_main_~#t1096~0.offset_10| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1096~0.base=|v_ULTIMATE.start_main_~#t1096~0.base_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1096~0.offset=|v_ULTIMATE.start_main_~#t1096~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t1096~0.base, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1096~0.offset] because there is no mapped edge [2019-11-28 18:15:07,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [588] [588] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= 1 v_~x$w_buff0_used~0_78) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_78 256))) (not (= (mod v_~x$w_buff1_used~0_47 256) 0)))) 1 0)) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= 2 v_~x$w_buff0~0_19) (= v_~x$w_buff0~0_20 v_~x$w_buff1~0_15) (= v_~x$w_buff1_used~0_47 v_~x$w_buff0_used~0_79) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_79} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, ~x$w_buff0~0=v_~x$w_buff0~0_19, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~x$w_buff1~0=v_~x$w_buff1~0_15, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_47, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_78} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:15:07,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L732-2-->L732-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out492054239| |P0Thread1of1ForFork0_#t~ite3_Out492054239|)) (.cse0 (= (mod ~x$w_buff1_used~0_In492054239 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd1~0_In492054239 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out492054239| ~x$w_buff1~0_In492054239)) (and .cse1 (= |P0Thread1of1ForFork0_#t~ite3_Out492054239| ~x~0_In492054239) (or .cse0 .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In492054239, ~x$w_buff1_used~0=~x$w_buff1_used~0_In492054239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In492054239, ~x~0=~x~0_In492054239} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out492054239|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out492054239|, ~x$w_buff1~0=~x$w_buff1~0_In492054239, ~x$w_buff1_used~0=~x$w_buff1_used~0_In492054239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In492054239, ~x~0=~x~0_In492054239} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:15:07,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L733-->L733-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1931336835 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1931336835 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1931336835| 0)) (and (= ~x$w_buff0_used~0_In1931336835 |P0Thread1of1ForFork0_#t~ite5_Out1931336835|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1931336835, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1931336835} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1931336835|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1931336835, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1931336835} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:15:07,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L734-->L734-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1101547368 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1101547368 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-1101547368 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1101547368 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1101547368|)) (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1101547368 |P0Thread1of1ForFork0_#t~ite6_Out-1101547368|) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1101547368, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1101547368, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1101547368, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1101547368} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1101547368|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1101547368, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1101547368, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1101547368, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1101547368} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:15:07,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L735-->L735-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-425199434 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-425199434 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-425199434|) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In-425199434 |P0Thread1of1ForFork0_#t~ite7_Out-425199434|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-425199434, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-425199434} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-425199434, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-425199434|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-425199434} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:15:07,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L736-->L736-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In2085927584 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd1~0_In2085927584 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In2085927584 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In2085927584 256)))) (or (and (= ~x$r_buff1_thd1~0_In2085927584 |P0Thread1of1ForFork0_#t~ite8_Out2085927584|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out2085927584|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2085927584, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2085927584, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2085927584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2085927584} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2085927584, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out2085927584|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2085927584, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2085927584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2085927584} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:15:07,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_144 |v_P0Thread1of1ForFork0_#t~ite8_34|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_144} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:15:07,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L767-->L767-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-746641160 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-746641160 256)))) (or (and (= ~x$w_buff0_used~0_In-746641160 |P1Thread1of1ForFork1_#t~ite11_Out-746641160|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-746641160|) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-746641160, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-746641160} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-746641160|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-746641160, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-746641160} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:15:07,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd2~0_In498270154 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In498270154 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In498270154 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In498270154 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out498270154| ~x$w_buff1_used~0_In498270154) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork1_#t~ite12_Out498270154| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In498270154, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In498270154, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In498270154, ~x$w_buff0_used~0=~x$w_buff0_used~0_In498270154} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In498270154, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In498270154, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out498270154|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In498270154, ~x$w_buff0_used~0=~x$w_buff0_used~0_In498270154} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:15:07,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L769-->L770: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-84532440 256))) (.cse1 (= ~x$r_buff0_thd2~0_Out-84532440 ~x$r_buff0_thd2~0_In-84532440)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-84532440 256) 0))) (or (and .cse0 .cse1) (and (not .cse0) (= ~x$r_buff0_thd2~0_Out-84532440 0) (not .cse2)) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-84532440, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-84532440} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-84532440|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-84532440, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-84532440} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:15:07,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1139689080 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In-1139689080 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-1139689080 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-1139689080 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-1139689080 |P1Thread1of1ForFork1_#t~ite14_Out-1139689080|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1139689080| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1139689080, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1139689080, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1139689080, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1139689080} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1139689080, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1139689080, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1139689080, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1139689080|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1139689080} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:15:07,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_134 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_134, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:15:07,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (or (= (mod v_~x$r_buff0_thd0~0_128 256) 0) (= 0 (mod v_~x$w_buff0_used~0_232 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_232} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_232} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:15:07,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L797-2-->L797-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1990601121 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1990601121 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite17_Out-1990601121| ~x$w_buff1~0_In-1990601121) (not .cse0) (not .cse1)) (and (= ~x~0_In-1990601121 |ULTIMATE.start_main_#t~ite17_Out-1990601121|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1990601121, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1990601121, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1990601121, ~x~0=~x~0_In-1990601121} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1990601121|, ~x$w_buff1~0=~x$w_buff1~0_In-1990601121, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1990601121, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1990601121, ~x~0=~x~0_In-1990601121} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:15:07,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L797-4-->L798: Formula: (= v_~x~0_43 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~x~0=v_~x~0_43} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-11-28 18:15:07,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1898047778 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1898047778 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite19_Out-1898047778| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite19_Out-1898047778| ~x$w_buff0_used~0_In-1898047778)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1898047778, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1898047778} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1898047778, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1898047778|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1898047778} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:15:07,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In838530304 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd0~0_In838530304 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In838530304 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In838530304 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out838530304| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite20_Out838530304| ~x$w_buff1_used~0_In838530304) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In838530304, ~x$w_buff1_used~0=~x$w_buff1_used~0_In838530304, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In838530304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In838530304} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In838530304, ~x$w_buff1_used~0=~x$w_buff1_used~0_In838530304, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out838530304|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In838530304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In838530304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:15:07,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1764806591 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1764806591 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-1764806591|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In-1764806591 |ULTIMATE.start_main_#t~ite21_Out-1764806591|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1764806591, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1764806591} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1764806591, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1764806591|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1764806591} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:15:07,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In-874271580 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-874271580 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-874271580 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-874271580 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In-874271580 |ULTIMATE.start_main_#t~ite22_Out-874271580|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-874271580|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-874271580, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-874271580, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-874271580, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-874271580} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-874271580, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-874271580, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-874271580, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-874271580|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-874271580} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:15:07,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L810-->L810-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-483919183 256)))) (or (and (= |ULTIMATE.start_main_#t~ite31_In-483919183| |ULTIMATE.start_main_#t~ite31_Out-483919183|) (not .cse0) (= |ULTIMATE.start_main_#t~ite32_Out-483919183| ~x$w_buff1~0_In-483919183)) (and (= |ULTIMATE.start_main_#t~ite31_Out-483919183| ~x$w_buff1~0_In-483919183) (= |ULTIMATE.start_main_#t~ite31_Out-483919183| |ULTIMATE.start_main_#t~ite32_Out-483919183|) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-483919183 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In-483919183 256)) (and (= (mod ~x$r_buff1_thd0~0_In-483919183 256) 0) .cse1) (and (= (mod ~x$w_buff1_used~0_In-483919183 256) 0) .cse1))) .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-483919183, ~x$w_buff1~0=~x$w_buff1~0_In-483919183, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-483919183, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-483919183, ~weak$$choice2~0=~weak$$choice2~0_In-483919183, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-483919183|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-483919183} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-483919183, ~x$w_buff1~0=~x$w_buff1~0_In-483919183, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-483919183, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-483919183|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-483919183, ~weak$$choice2~0=~weak$$choice2~0_In-483919183, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-483919183|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-483919183} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:15:07,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-353045963 256) 0))) (or (and (not .cse0) (= ~x$w_buff1_used~0_In-353045963 |ULTIMATE.start_main_#t~ite38_Out-353045963|) (= |ULTIMATE.start_main_#t~ite37_In-353045963| |ULTIMATE.start_main_#t~ite37_Out-353045963|)) (and .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-353045963 256) 0))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-353045963 256))) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In-353045963 256))) (= (mod ~x$w_buff0_used~0_In-353045963 256) 0))) (= ~x$w_buff1_used~0_In-353045963 |ULTIMATE.start_main_#t~ite37_Out-353045963|) (= |ULTIMATE.start_main_#t~ite37_Out-353045963| |ULTIMATE.start_main_#t~ite38_Out-353045963|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-353045963, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-353045963, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-353045963|, ~weak$$choice2~0=~weak$$choice2~0_In-353045963, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-353045963, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-353045963} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-353045963, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-353045963, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-353045963|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-353045963|, ~weak$$choice2~0=~weak$$choice2~0_In-353045963, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-353045963, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-353045963} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-11-28 18:15:07,042 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [602] [602] L813-->L814: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~x$r_buff0_thd0~0_85 v_~x$r_buff0_thd0~0_84)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_85, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_84, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:15:07,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L816-->L819-1: Formula: (and (= v_~x$mem_tmp~0_16 v_~x~0_122) (not (= 0 (mod v_~x$flush_delayed~0_31 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~x$flush_delayed~0_30 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_31, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_16} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ~x~0=v_~x~0_122, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_27|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:15:07,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:15:07,202 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:15:07,202 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:15:07,204 INFO L168 Benchmark]: Toolchain (without parser) took 15741.72 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 491.3 MB). Free memory was 956.3 MB in the beginning and 864.4 MB in the end (delta: 91.9 MB). Peak memory consumption was 583.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:07,204 INFO L168 Benchmark]: CDTParser took 1.22 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:07,205 INFO L168 Benchmark]: CACSL2BoogieTranslator took 786.82 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.8 MB). Free memory was 956.3 MB in the beginning and 1.1 GB in the end (delta: -131.9 MB). Peak memory consumption was 26.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:07,205 INFO L168 Benchmark]: Boogie Procedure Inliner took 79.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:07,206 INFO L168 Benchmark]: Boogie Preprocessor took 37.50 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:07,206 INFO L168 Benchmark]: RCFGBuilder took 797.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.8 MB). Peak memory consumption was 44.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:07,206 INFO L168 Benchmark]: TraceAbstraction took 13854.57 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 365.4 MB). Free memory was 1.0 GB in the beginning and 877.0 MB in the end (delta: 159.7 MB). Peak memory consumption was 525.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:07,207 INFO L168 Benchmark]: Witness Printer took 178.45 ms. Allocated memory is still 1.5 GB. Free memory was 877.0 MB in the beginning and 864.4 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:07,209 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.22 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 786.82 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.8 MB). Free memory was 956.3 MB in the beginning and 1.1 GB in the end (delta: -131.9 MB). Peak memory consumption was 26.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 79.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 37.50 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 797.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.8 MB). Peak memory consumption was 44.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13854.57 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 365.4 MB). Free memory was 1.0 GB in the beginning and 877.0 MB in the end (delta: 159.7 MB). Peak memory consumption was 525.1 MB. Max. memory is 11.5 GB. * Witness Printer took 178.45 ms. Allocated memory is still 1.5 GB. Free memory was 877.0 MB in the beginning and 864.4 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.7s, 148 ProgramPointsBefore, 77 ProgramPointsAfterwards, 182 TransitionsBefore, 88 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 40 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 26 ChoiceCompositions, 3874 VarBasedMoverChecksPositive, 189 VarBasedMoverChecksNegative, 57 SemBasedMoverChecksPositive, 186 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 45620 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L789] FCALL, FORK 0 pthread_create(&t1095, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1096, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L751] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L752] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L753] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L754] 2 x$r_buff0_thd2 = (_Bool)1 [L757] 2 y = 1 [L760] 2 __unbuffered_p1_EAX = y [L763] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L726] 1 z = 1 [L729] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L733] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L734] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L735] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L766] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L767] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L798] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 x$flush_delayed = weak$$choice2 [L807] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L809] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L809] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L810] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L811] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L811] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L812] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L814] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L814] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 142 locations, 2 error locations. Result: UNSAFE, OverallTime: 13.5s, OverallIterations: 14, TraceHistogramMax: 1, AutomataDifference: 3.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1342 SDtfs, 1085 SDslu, 2481 SDs, 0 SdLazy, 1491 SolverSat, 82 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 91 GetRequests, 14 SyntacticMatches, 16 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=12516occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.9s AutomataMinimizationTime, 13 MinimizatonAttempts, 8156 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 530 NumberOfCodeBlocks, 530 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 463 ConstructedInterpolants, 0 QuantifiedInterpolants, 71441 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 13 InterpolantComputations, 13 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...