./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix042_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix042_rmo.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2efa23eb8a88b71e9d44ed80492b6f5d19134b23 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:15:09,514 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:15:09,517 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:15:09,530 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:15:09,530 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:15:09,531 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:15:09,532 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:15:09,534 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:15:09,536 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:15:09,537 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:15:09,538 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:15:09,539 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:15:09,539 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:15:09,540 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:15:09,541 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:15:09,543 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:15:09,546 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:15:09,547 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:15:09,551 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:15:09,556 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:15:09,558 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:15:09,559 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:15:09,562 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:15:09,563 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:15:09,569 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:15:09,569 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:15:09,569 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:15:09,570 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:15:09,571 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:15:09,573 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:15:09,574 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:15:09,575 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:15:09,576 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:15:09,577 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:15:09,580 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:15:09,580 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:15:09,581 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:15:09,582 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:15:09,582 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:15:09,585 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:15:09,587 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:15:09,588 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:15:09,611 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:15:09,611 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:15:09,613 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:15:09,613 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:15:09,613 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:15:09,614 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:15:09,614 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:15:09,614 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:15:09,614 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:15:09,615 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:15:09,616 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:15:09,616 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:15:09,616 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:15:09,617 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:15:09,617 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:15:09,617 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:15:09,617 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:15:09,618 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:15:09,618 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:15:09,618 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:15:09,618 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:15:09,619 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:15:09,619 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:15:09,619 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:15:09,619 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:15:09,619 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:15:09,620 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:15:09,620 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:15:09,620 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:15:09,620 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2efa23eb8a88b71e9d44ed80492b6f5d19134b23 [2019-11-28 18:15:09,974 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:15:09,988 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:15:09,992 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:15:09,994 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:15:09,994 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:15:09,995 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix042_rmo.opt.i [2019-11-28 18:15:10,073 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/286cc8967/2be86764197a4787827c8c21820f5d64/FLAG9eb8933f3 [2019-11-28 18:15:10,679 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:15:10,680 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix042_rmo.opt.i [2019-11-28 18:15:10,695 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/286cc8967/2be86764197a4787827c8c21820f5d64/FLAG9eb8933f3 [2019-11-28 18:15:10,924 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/286cc8967/2be86764197a4787827c8c21820f5d64 [2019-11-28 18:15:10,928 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:15:10,930 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:15:10,932 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:15:10,932 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:15:10,936 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:15:10,937 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:15:10" (1/1) ... [2019-11-28 18:15:10,940 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@48e2acac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:10, skipping insertion in model container [2019-11-28 18:15:10,940 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:15:10" (1/1) ... [2019-11-28 18:15:10,949 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:15:10,994 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:15:11,582 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:15:11,595 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:15:11,684 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:15:11,776 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:15:11,778 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11 WrapperNode [2019-11-28 18:15:11,778 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:15:11,779 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:15:11,779 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:15:11,780 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:15:11,788 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,809 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,845 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:15:11,845 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:15:11,846 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:15:11,846 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:15:11,857 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,857 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,863 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,863 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,874 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,878 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,886 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... [2019-11-28 18:15:11,891 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:15:11,892 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:15:11,892 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:15:11,892 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:15:11,894 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:15:11,962 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:15:11,962 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:15:11,963 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:15:11,963 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:15:11,963 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:15:11,963 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:15:11,963 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:15:11,963 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:15:11,964 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:15:11,964 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:15:11,964 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:15:11,964 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:15:11,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:15:11,967 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:15:12,747 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:15:12,747 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:15:12,749 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:15:12 BoogieIcfgContainer [2019-11-28 18:15:12,749 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:15:12,750 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:15:12,751 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:15:12,754 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:15:12,755 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:15:10" (1/3) ... [2019-11-28 18:15:12,756 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1cc5aba8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:15:12, skipping insertion in model container [2019-11-28 18:15:12,756 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:11" (2/3) ... [2019-11-28 18:15:12,757 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1cc5aba8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:15:12, skipping insertion in model container [2019-11-28 18:15:12,757 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:15:12" (3/3) ... [2019-11-28 18:15:12,759 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_rmo.opt.i [2019-11-28 18:15:12,770 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:15:12,771 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:15:12,778 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:15:12,779 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:15:12,817 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,818 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,818 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,818 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,819 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,819 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,820 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,820 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,820 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,821 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,821 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,821 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,822 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,822 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,822 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,823 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,823 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,823 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,824 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,824 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,824 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,825 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,825 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,825 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,826 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,827 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,827 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,827 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,828 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,828 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,828 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,829 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,829 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,829 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,830 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,830 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,831 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,831 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,831 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,832 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,832 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,832 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,833 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,833 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,833 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,834 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,835 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,835 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,835 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,836 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:12,860 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-11-28 18:15:12,880 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:15:12,881 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:15:12,881 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:15:12,881 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:15:12,881 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:15:12,881 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:15:12,881 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:15:12,882 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:15:12,900 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 165 places, 196 transitions [2019-11-28 18:15:12,902 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-11-28 18:15:12,997 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-11-28 18:15:12,997 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:15:13,016 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:15:13,041 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-11-28 18:15:13,092 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-11-28 18:15:13,093 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:15:13,100 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:15:13,117 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-11-28 18:15:13,119 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:15:18,284 WARN L192 SmtUtils]: Spent 293.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-11-28 18:15:18,432 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification that was a NOOP. DAG size: 89 [2019-11-28 18:15:18,486 INFO L206 etLargeBlockEncoding]: Checked pairs total: 50142 [2019-11-28 18:15:18,487 INFO L214 etLargeBlockEncoding]: Total number of compositions: 117 [2019-11-28 18:15:18,495 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 86 transitions [2019-11-28 18:15:19,812 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 14254 states. [2019-11-28 18:15:19,814 INFO L276 IsEmpty]: Start isEmpty. Operand 14254 states. [2019-11-28 18:15:19,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-11-28 18:15:19,827 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:19,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:19,829 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:19,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:19,836 INFO L82 PathProgramCache]: Analyzing trace with hash -632784469, now seen corresponding path program 1 times [2019-11-28 18:15:19,847 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:19,847 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042553653] [2019-11-28 18:15:19,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:20,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:20,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:20,200 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2042553653] [2019-11-28 18:15:20,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:20,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:15:20,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747760046] [2019-11-28 18:15:20,213 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:20,214 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:20,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:20,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:20,238 INFO L87 Difference]: Start difference. First operand 14254 states. Second operand 3 states. [2019-11-28 18:15:20,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:20,642 INFO L93 Difference]: Finished difference Result 14182 states and 53160 transitions. [2019-11-28 18:15:20,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:20,644 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-11-28 18:15:20,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:20,822 INFO L225 Difference]: With dead ends: 14182 [2019-11-28 18:15:20,822 INFO L226 Difference]: Without dead ends: 13870 [2019-11-28 18:15:20,823 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:21,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13870 states. [2019-11-28 18:15:21,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13870 to 13870. [2019-11-28 18:15:21,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13870 states. [2019-11-28 18:15:21,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13870 states to 13870 states and 52042 transitions. [2019-11-28 18:15:21,694 INFO L78 Accepts]: Start accepts. Automaton has 13870 states and 52042 transitions. Word has length 7 [2019-11-28 18:15:21,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:21,695 INFO L462 AbstractCegarLoop]: Abstraction has 13870 states and 52042 transitions. [2019-11-28 18:15:21,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:21,695 INFO L276 IsEmpty]: Start isEmpty. Operand 13870 states and 52042 transitions. [2019-11-28 18:15:21,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:15:21,700 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:21,700 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:21,700 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:21,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:21,701 INFO L82 PathProgramCache]: Analyzing trace with hash -1056225825, now seen corresponding path program 1 times [2019-11-28 18:15:21,701 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:21,701 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588281198] [2019-11-28 18:15:21,701 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:21,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:21,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:21,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588281198] [2019-11-28 18:15:21,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:21,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:21,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428271490] [2019-11-28 18:15:21,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:21,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:21,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:21,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:21,824 INFO L87 Difference]: Start difference. First operand 13870 states and 52042 transitions. Second operand 4 states. [2019-11-28 18:15:22,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:22,224 INFO L93 Difference]: Finished difference Result 19034 states and 69248 transitions. [2019-11-28 18:15:22,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:22,224 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:15:22,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:22,313 INFO L225 Difference]: With dead ends: 19034 [2019-11-28 18:15:22,313 INFO L226 Difference]: Without dead ends: 19034 [2019-11-28 18:15:22,314 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:22,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19034 states. [2019-11-28 18:15:22,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19034 to 18800. [2019-11-28 18:15:22,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18800 states. [2019-11-28 18:15:23,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18800 states to 18800 states and 68487 transitions. [2019-11-28 18:15:23,066 INFO L78 Accepts]: Start accepts. Automaton has 18800 states and 68487 transitions. Word has length 13 [2019-11-28 18:15:23,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:23,066 INFO L462 AbstractCegarLoop]: Abstraction has 18800 states and 68487 transitions. [2019-11-28 18:15:23,066 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:23,067 INFO L276 IsEmpty]: Start isEmpty. Operand 18800 states and 68487 transitions. [2019-11-28 18:15:23,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:15:23,069 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:23,070 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:23,070 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:23,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:23,070 INFO L82 PathProgramCache]: Analyzing trace with hash 746093816, now seen corresponding path program 1 times [2019-11-28 18:15:23,071 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:23,071 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918058978] [2019-11-28 18:15:23,071 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:23,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:23,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:23,151 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1918058978] [2019-11-28 18:15:23,151 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:23,151 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:23,151 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535644331] [2019-11-28 18:15:23,152 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:23,153 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:23,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:23,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:23,153 INFO L87 Difference]: Start difference. First operand 18800 states and 68487 transitions. Second operand 4 states. [2019-11-28 18:15:23,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:23,801 INFO L93 Difference]: Finished difference Result 27022 states and 96312 transitions. [2019-11-28 18:15:23,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:23,801 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:15:23,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:23,954 INFO L225 Difference]: With dead ends: 27022 [2019-11-28 18:15:23,955 INFO L226 Difference]: Without dead ends: 27008 [2019-11-28 18:15:23,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:24,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27008 states. [2019-11-28 18:15:24,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27008 to 22366. [2019-11-28 18:15:24,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22366 states. [2019-11-28 18:15:24,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22366 states to 22366 states and 80994 transitions. [2019-11-28 18:15:24,777 INFO L78 Accepts]: Start accepts. Automaton has 22366 states and 80994 transitions. Word has length 13 [2019-11-28 18:15:24,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:24,778 INFO L462 AbstractCegarLoop]: Abstraction has 22366 states and 80994 transitions. [2019-11-28 18:15:24,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:24,778 INFO L276 IsEmpty]: Start isEmpty. Operand 22366 states and 80994 transitions. [2019-11-28 18:15:24,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-11-28 18:15:24,785 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:24,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:24,786 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:24,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:24,786 INFO L82 PathProgramCache]: Analyzing trace with hash -1347005908, now seen corresponding path program 1 times [2019-11-28 18:15:24,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:24,787 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900857728] [2019-11-28 18:15:24,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:24,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:24,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:24,917 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900857728] [2019-11-28 18:15:24,917 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:24,917 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:24,918 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1205348239] [2019-11-28 18:15:24,918 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:24,918 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:24,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:24,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:24,919 INFO L87 Difference]: Start difference. First operand 22366 states and 80994 transitions. Second operand 5 states. [2019-11-28 18:15:25,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:25,439 INFO L93 Difference]: Finished difference Result 30132 states and 106959 transitions. [2019-11-28 18:15:25,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:15:25,439 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-11-28 18:15:25,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:25,519 INFO L225 Difference]: With dead ends: 30132 [2019-11-28 18:15:25,519 INFO L226 Difference]: Without dead ends: 30118 [2019-11-28 18:15:25,520 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:15:25,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30118 states. [2019-11-28 18:15:26,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30118 to 22270. [2019-11-28 18:15:26,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22270 states. [2019-11-28 18:15:26,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22270 states to 22270 states and 80486 transitions. [2019-11-28 18:15:26,727 INFO L78 Accepts]: Start accepts. Automaton has 22270 states and 80486 transitions. Word has length 19 [2019-11-28 18:15:26,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:26,727 INFO L462 AbstractCegarLoop]: Abstraction has 22270 states and 80486 transitions. [2019-11-28 18:15:26,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:26,728 INFO L276 IsEmpty]: Start isEmpty. Operand 22270 states and 80486 transitions. [2019-11-28 18:15:26,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-28 18:15:26,752 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:26,752 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:26,752 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:26,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:26,752 INFO L82 PathProgramCache]: Analyzing trace with hash 1614023153, now seen corresponding path program 1 times [2019-11-28 18:15:26,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:26,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2115597907] [2019-11-28 18:15:26,753 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:26,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:26,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:26,850 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2115597907] [2019-11-28 18:15:26,850 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:26,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:15:26,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2010091120] [2019-11-28 18:15:26,851 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:15:26,851 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:26,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:15:26,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:26,852 INFO L87 Difference]: Start difference. First operand 22270 states and 80486 transitions. Second operand 6 states. [2019-11-28 18:15:27,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:27,357 INFO L93 Difference]: Finished difference Result 32606 states and 115328 transitions. [2019-11-28 18:15:27,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:15:27,358 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-11-28 18:15:27,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:27,453 INFO L225 Difference]: With dead ends: 32606 [2019-11-28 18:15:27,453 INFO L226 Difference]: Without dead ends: 32574 [2019-11-28 18:15:27,454 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:15:27,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32574 states. [2019-11-28 18:15:28,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32574 to 28036. [2019-11-28 18:15:28,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28036 states. [2019-11-28 18:15:28,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28036 states to 28036 states and 100001 transitions. [2019-11-28 18:15:28,691 INFO L78 Accepts]: Start accepts. Automaton has 28036 states and 100001 transitions. Word has length 27 [2019-11-28 18:15:28,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:28,692 INFO L462 AbstractCegarLoop]: Abstraction has 28036 states and 100001 transitions. [2019-11-28 18:15:28,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:15:28,692 INFO L276 IsEmpty]: Start isEmpty. Operand 28036 states and 100001 transitions. [2019-11-28 18:15:28,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-28 18:15:28,742 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:28,742 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:28,743 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:28,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:28,743 INFO L82 PathProgramCache]: Analyzing trace with hash 1188296037, now seen corresponding path program 1 times [2019-11-28 18:15:28,743 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:28,744 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482218711] [2019-11-28 18:15:28,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:28,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:28,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:28,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [482218711] [2019-11-28 18:15:28,832 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:28,832 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:28,833 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [267748586] [2019-11-28 18:15:28,833 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:28,833 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:28,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:28,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:28,834 INFO L87 Difference]: Start difference. First operand 28036 states and 100001 transitions. Second operand 3 states. [2019-11-28 18:15:29,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:29,022 INFO L93 Difference]: Finished difference Result 35568 states and 127677 transitions. [2019-11-28 18:15:29,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:29,023 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-11-28 18:15:29,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:29,126 INFO L225 Difference]: With dead ends: 35568 [2019-11-28 18:15:29,126 INFO L226 Difference]: Without dead ends: 35568 [2019-11-28 18:15:29,127 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:29,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35568 states. [2019-11-28 18:15:29,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35568 to 31188. [2019-11-28 18:15:29,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31188 states. [2019-11-28 18:15:29,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31188 states to 31188 states and 112337 transitions. [2019-11-28 18:15:29,828 INFO L78 Accepts]: Start accepts. Automaton has 31188 states and 112337 transitions. Word has length 33 [2019-11-28 18:15:29,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:29,829 INFO L462 AbstractCegarLoop]: Abstraction has 31188 states and 112337 transitions. [2019-11-28 18:15:29,829 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:29,829 INFO L276 IsEmpty]: Start isEmpty. Operand 31188 states and 112337 transitions. [2019-11-28 18:15:29,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-28 18:15:29,866 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:29,866 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:29,866 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:29,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:29,867 INFO L82 PathProgramCache]: Analyzing trace with hash -1536973783, now seen corresponding path program 1 times [2019-11-28 18:15:29,867 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:29,867 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1940600632] [2019-11-28 18:15:29,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:29,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:29,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:29,940 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1940600632] [2019-11-28 18:15:29,940 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:29,940 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:29,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [343386345] [2019-11-28 18:15:29,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:29,941 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:29,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:29,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:29,942 INFO L87 Difference]: Start difference. First operand 31188 states and 112337 transitions. Second operand 4 states. [2019-11-28 18:15:30,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:30,039 INFO L93 Difference]: Finished difference Result 18039 states and 56038 transitions. [2019-11-28 18:15:30,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:15:30,039 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-11-28 18:15:30,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:30,072 INFO L225 Difference]: With dead ends: 18039 [2019-11-28 18:15:30,072 INFO L226 Difference]: Without dead ends: 17509 [2019-11-28 18:15:30,072 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:30,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17509 states. [2019-11-28 18:15:30,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17509 to 17509. [2019-11-28 18:15:30,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17509 states. [2019-11-28 18:15:31,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17509 states to 17509 states and 54532 transitions. [2019-11-28 18:15:31,005 INFO L78 Accepts]: Start accepts. Automaton has 17509 states and 54532 transitions. Word has length 33 [2019-11-28 18:15:31,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:31,005 INFO L462 AbstractCegarLoop]: Abstraction has 17509 states and 54532 transitions. [2019-11-28 18:15:31,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:31,005 INFO L276 IsEmpty]: Start isEmpty. Operand 17509 states and 54532 transitions. [2019-11-28 18:15:31,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:15:31,020 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:31,020 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:31,020 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:31,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:31,021 INFO L82 PathProgramCache]: Analyzing trace with hash 345963664, now seen corresponding path program 1 times [2019-11-28 18:15:31,021 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:31,021 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862005282] [2019-11-28 18:15:31,021 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:31,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:31,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:31,074 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862005282] [2019-11-28 18:15:31,075 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:31,075 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:31,075 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786068930] [2019-11-28 18:15:31,075 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:31,076 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:31,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:31,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:31,076 INFO L87 Difference]: Start difference. First operand 17509 states and 54532 transitions. Second operand 3 states. [2019-11-28 18:15:31,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:31,185 INFO L93 Difference]: Finished difference Result 17509 states and 54339 transitions. [2019-11-28 18:15:31,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:31,185 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2019-11-28 18:15:31,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:31,212 INFO L225 Difference]: With dead ends: 17509 [2019-11-28 18:15:31,212 INFO L226 Difference]: Without dead ends: 17509 [2019-11-28 18:15:31,213 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:31,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17509 states. [2019-11-28 18:15:31,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17509 to 17509. [2019-11-28 18:15:31,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17509 states. [2019-11-28 18:15:31,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17509 states to 17509 states and 54339 transitions. [2019-11-28 18:15:31,485 INFO L78 Accepts]: Start accepts. Automaton has 17509 states and 54339 transitions. Word has length 34 [2019-11-28 18:15:31,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:31,485 INFO L462 AbstractCegarLoop]: Abstraction has 17509 states and 54339 transitions. [2019-11-28 18:15:31,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:31,485 INFO L276 IsEmpty]: Start isEmpty. Operand 17509 states and 54339 transitions. [2019-11-28 18:15:31,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:15:31,499 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:31,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:31,499 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:31,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:31,499 INFO L82 PathProgramCache]: Analyzing trace with hash -1096312539, now seen corresponding path program 1 times [2019-11-28 18:15:31,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:31,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2115941958] [2019-11-28 18:15:31,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:31,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:31,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:31,645 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2115941958] [2019-11-28 18:15:31,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:31,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:15:31,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [672251102] [2019-11-28 18:15:31,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-28 18:15:31,648 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:31,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-28 18:15:31,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:15:31,649 INFO L87 Difference]: Start difference. First operand 17509 states and 54339 transitions. Second operand 8 states. [2019-11-28 18:15:32,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:32,867 INFO L93 Difference]: Finished difference Result 25291 states and 76468 transitions. [2019-11-28 18:15:32,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-11-28 18:15:32,868 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-11-28 18:15:32,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:32,909 INFO L225 Difference]: With dead ends: 25291 [2019-11-28 18:15:32,910 INFO L226 Difference]: Without dead ends: 25263 [2019-11-28 18:15:32,910 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=350, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:15:32,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25263 states. [2019-11-28 18:15:33,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25263 to 17586. [2019-11-28 18:15:33,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17586 states. [2019-11-28 18:15:33,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17586 states to 17586 states and 54523 transitions. [2019-11-28 18:15:33,268 INFO L78 Accepts]: Start accepts. Automaton has 17586 states and 54523 transitions. Word has length 34 [2019-11-28 18:15:33,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:33,269 INFO L462 AbstractCegarLoop]: Abstraction has 17586 states and 54523 transitions. [2019-11-28 18:15:33,269 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-28 18:15:33,269 INFO L276 IsEmpty]: Start isEmpty. Operand 17586 states and 54523 transitions. [2019-11-28 18:15:33,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:15:33,283 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:33,283 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:33,284 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:33,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:33,284 INFO L82 PathProgramCache]: Analyzing trace with hash -308537285, now seen corresponding path program 1 times [2019-11-28 18:15:33,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:33,284 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591467847] [2019-11-28 18:15:33,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:33,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:33,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:33,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1591467847] [2019-11-28 18:15:33,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:33,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:15:33,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [278397507] [2019-11-28 18:15:33,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:33,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:33,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:33,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:33,356 INFO L87 Difference]: Start difference. First operand 17586 states and 54523 transitions. Second operand 5 states. [2019-11-28 18:15:33,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:33,411 INFO L93 Difference]: Finished difference Result 2986 states and 6892 transitions. [2019-11-28 18:15:33,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:33,412 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-11-28 18:15:33,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:33,415 INFO L225 Difference]: With dead ends: 2986 [2019-11-28 18:15:33,415 INFO L226 Difference]: Without dead ends: 2677 [2019-11-28 18:15:33,415 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:15:33,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2677 states. [2019-11-28 18:15:33,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2677 to 2677. [2019-11-28 18:15:33,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2677 states. [2019-11-28 18:15:33,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2677 states to 2677 states and 6031 transitions. [2019-11-28 18:15:33,441 INFO L78 Accepts]: Start accepts. Automaton has 2677 states and 6031 transitions. Word has length 34 [2019-11-28 18:15:33,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:33,441 INFO L462 AbstractCegarLoop]: Abstraction has 2677 states and 6031 transitions. [2019-11-28 18:15:33,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:33,442 INFO L276 IsEmpty]: Start isEmpty. Operand 2677 states and 6031 transitions. [2019-11-28 18:15:33,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-28 18:15:33,444 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:33,445 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:33,445 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:33,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:33,446 INFO L82 PathProgramCache]: Analyzing trace with hash 682662632, now seen corresponding path program 1 times [2019-11-28 18:15:33,446 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:33,446 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247889580] [2019-11-28 18:15:33,447 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:33,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:33,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:33,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247889580] [2019-11-28 18:15:33,541 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:33,541 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:33,541 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721664379] [2019-11-28 18:15:33,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:15:33,542 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:33,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:15:33,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:33,542 INFO L87 Difference]: Start difference. First operand 2677 states and 6031 transitions. Second operand 6 states. [2019-11-28 18:15:33,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:33,601 INFO L93 Difference]: Finished difference Result 698 states and 1589 transitions. [2019-11-28 18:15:33,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:15:33,602 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2019-11-28 18:15:33,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:33,603 INFO L225 Difference]: With dead ends: 698 [2019-11-28 18:15:33,603 INFO L226 Difference]: Without dead ends: 652 [2019-11-28 18:15:33,603 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:15:33,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 652 states. [2019-11-28 18:15:33,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 652 to 596. [2019-11-28 18:15:33,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 596 states. [2019-11-28 18:15:33,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 596 states to 596 states and 1367 transitions. [2019-11-28 18:15:33,611 INFO L78 Accepts]: Start accepts. Automaton has 596 states and 1367 transitions. Word has length 45 [2019-11-28 18:15:33,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:33,611 INFO L462 AbstractCegarLoop]: Abstraction has 596 states and 1367 transitions. [2019-11-28 18:15:33,611 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:15:33,612 INFO L276 IsEmpty]: Start isEmpty. Operand 596 states and 1367 transitions. [2019-11-28 18:15:33,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:15:33,613 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:33,613 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:33,613 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:33,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:33,613 INFO L82 PathProgramCache]: Analyzing trace with hash 1345831558, now seen corresponding path program 1 times [2019-11-28 18:15:33,614 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:33,614 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028466369] [2019-11-28 18:15:33,614 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:33,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:33,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:33,706 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028466369] [2019-11-28 18:15:33,707 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:33,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:33,707 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828555893] [2019-11-28 18:15:33,707 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:33,707 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:33,708 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:33,708 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:33,708 INFO L87 Difference]: Start difference. First operand 596 states and 1367 transitions. Second operand 5 states. [2019-11-28 18:15:33,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:33,890 INFO L93 Difference]: Finished difference Result 867 states and 1996 transitions. [2019-11-28 18:15:33,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:15:33,890 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-11-28 18:15:33,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:33,892 INFO L225 Difference]: With dead ends: 867 [2019-11-28 18:15:33,892 INFO L226 Difference]: Without dead ends: 867 [2019-11-28 18:15:33,893 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:33,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 867 states. [2019-11-28 18:15:33,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 867 to 632. [2019-11-28 18:15:33,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 632 states. [2019-11-28 18:15:33,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 632 states to 632 states and 1459 transitions. [2019-11-28 18:15:33,901 INFO L78 Accepts]: Start accepts. Automaton has 632 states and 1459 transitions. Word has length 56 [2019-11-28 18:15:33,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:33,901 INFO L462 AbstractCegarLoop]: Abstraction has 632 states and 1459 transitions. [2019-11-28 18:15:33,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:33,902 INFO L276 IsEmpty]: Start isEmpty. Operand 632 states and 1459 transitions. [2019-11-28 18:15:33,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:15:33,902 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:33,903 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:33,903 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:33,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:33,903 INFO L82 PathProgramCache]: Analyzing trace with hash 1993080434, now seen corresponding path program 2 times [2019-11-28 18:15:33,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:33,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545659492] [2019-11-28 18:15:33,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:33,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:33,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:33,983 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545659492] [2019-11-28 18:15:33,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:33,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:33,983 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [525012413] [2019-11-28 18:15:33,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:33,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:33,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:33,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:33,984 INFO L87 Difference]: Start difference. First operand 632 states and 1459 transitions. Second operand 3 states. [2019-11-28 18:15:34,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:34,003 INFO L93 Difference]: Finished difference Result 632 states and 1429 transitions. [2019-11-28 18:15:34,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:34,003 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-11-28 18:15:34,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:34,004 INFO L225 Difference]: With dead ends: 632 [2019-11-28 18:15:34,004 INFO L226 Difference]: Without dead ends: 632 [2019-11-28 18:15:34,005 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:34,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 632 states. [2019-11-28 18:15:34,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 632 to 596. [2019-11-28 18:15:34,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 596 states. [2019-11-28 18:15:34,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 596 states to 596 states and 1343 transitions. [2019-11-28 18:15:34,015 INFO L78 Accepts]: Start accepts. Automaton has 596 states and 1343 transitions. Word has length 56 [2019-11-28 18:15:34,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:34,016 INFO L462 AbstractCegarLoop]: Abstraction has 596 states and 1343 transitions. [2019-11-28 18:15:34,016 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:34,016 INFO L276 IsEmpty]: Start isEmpty. Operand 596 states and 1343 transitions. [2019-11-28 18:15:34,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:15:34,017 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:34,017 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:34,018 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:34,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:34,018 INFO L82 PathProgramCache]: Analyzing trace with hash 2052620165, now seen corresponding path program 1 times [2019-11-28 18:15:34,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:34,019 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952811447] [2019-11-28 18:15:34,019 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:34,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:34,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:34,351 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [952811447] [2019-11-28 18:15:34,351 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:34,351 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:15:34,352 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1423732363] [2019-11-28 18:15:34,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:15:34,353 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:34,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:15:34,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:15:34,354 INFO L87 Difference]: Start difference. First operand 596 states and 1343 transitions. Second operand 13 states. [2019-11-28 18:15:34,808 WARN L192 SmtUtils]: Spent 359.00 ms on a formula simplification that was a NOOP. DAG size: 15 [2019-11-28 18:15:35,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:35,148 INFO L93 Difference]: Finished difference Result 904 states and 2013 transitions. [2019-11-28 18:15:35,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-28 18:15:35,149 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-11-28 18:15:35,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:35,151 INFO L225 Difference]: With dead ends: 904 [2019-11-28 18:15:35,151 INFO L226 Difference]: Without dead ends: 874 [2019-11-28 18:15:35,152 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=90, Invalid=372, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:15:35,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 874 states. [2019-11-28 18:15:35,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 874 to 800. [2019-11-28 18:15:35,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 800 states. [2019-11-28 18:15:35,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 800 states to 800 states and 1796 transitions. [2019-11-28 18:15:35,161 INFO L78 Accepts]: Start accepts. Automaton has 800 states and 1796 transitions. Word has length 57 [2019-11-28 18:15:35,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:35,162 INFO L462 AbstractCegarLoop]: Abstraction has 800 states and 1796 transitions. [2019-11-28 18:15:35,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:15:35,162 INFO L276 IsEmpty]: Start isEmpty. Operand 800 states and 1796 transitions. [2019-11-28 18:15:35,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:15:35,163 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:35,163 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:35,164 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:35,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:35,164 INFO L82 PathProgramCache]: Analyzing trace with hash -620426235, now seen corresponding path program 2 times [2019-11-28 18:15:35,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:35,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341613902] [2019-11-28 18:15:35,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:35,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:35,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:35,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1341613902] [2019-11-28 18:15:35,424 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:35,424 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:15:35,424 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209166975] [2019-11-28 18:15:35,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:15:35,425 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:35,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:15:35,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:15:35,425 INFO L87 Difference]: Start difference. First operand 800 states and 1796 transitions. Second operand 12 states. [2019-11-28 18:15:36,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:36,127 INFO L93 Difference]: Finished difference Result 1623 states and 3209 transitions. [2019-11-28 18:15:36,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-28 18:15:36,128 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-11-28 18:15:36,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:36,130 INFO L225 Difference]: With dead ends: 1623 [2019-11-28 18:15:36,130 INFO L226 Difference]: Without dead ends: 788 [2019-11-28 18:15:36,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=173, Invalid=427, Unknown=0, NotChecked=0, Total=600 [2019-11-28 18:15:36,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 788 states. [2019-11-28 18:15:36,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 788 to 738. [2019-11-28 18:15:36,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 738 states. [2019-11-28 18:15:36,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 738 states to 738 states and 1617 transitions. [2019-11-28 18:15:36,139 INFO L78 Accepts]: Start accepts. Automaton has 738 states and 1617 transitions. Word has length 57 [2019-11-28 18:15:36,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:36,140 INFO L462 AbstractCegarLoop]: Abstraction has 738 states and 1617 transitions. [2019-11-28 18:15:36,140 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:15:36,140 INFO L276 IsEmpty]: Start isEmpty. Operand 738 states and 1617 transitions. [2019-11-28 18:15:36,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:15:36,141 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:36,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:36,141 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:36,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:36,141 INFO L82 PathProgramCache]: Analyzing trace with hash 729108355, now seen corresponding path program 3 times [2019-11-28 18:15:36,141 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:36,142 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514992802] [2019-11-28 18:15:36,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:36,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:15:36,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:15:36,299 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:15:36,302 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:15:36,306 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1120~0.base_27|) (= v_~y$w_buff1_used~0_304 0) (= 0 |v_ULTIMATE.start_main_~#t1120~0.offset_21|) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1120~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1120~0.base_27|) |v_ULTIMATE.start_main_~#t1120~0.offset_21| 0)) |v_#memory_int_15|) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= v_~y$r_buff0_thd1~0_41 0) (= v_~a~0_57 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1120~0.base_27|) 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1120~0.base_27| 4) |v_#length_19|) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= (store .cse0 |v_ULTIMATE.start_main_~#t1120~0.base_27| 1) |v_#valid_54|) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ULTIMATE.start_main_~#t1121~0.base=|v_ULTIMATE.start_main_~#t1121~0.base_26|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_~#t1122~0.base=|v_ULTIMATE.start_main_~#t1122~0.base_21|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_~#t1120~0.offset=|v_ULTIMATE.start_main_~#t1120~0.offset_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ~y~0=v_~y~0_123, ULTIMATE.start_main_~#t1122~0.offset=|v_ULTIMATE.start_main_~#t1122~0.offset_16|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_~#t1120~0.base=|v_ULTIMATE.start_main_~#t1120~0.base_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_~#t1121~0.offset=|v_ULTIMATE.start_main_~#t1121~0.offset_20|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1121~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t1122~0.base, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t1120~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1122~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_~#t1120~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1121~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:15:36,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1121~0.base_9| 1) |v_#valid_27|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1121~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1121~0.base_9|) |v_ULTIMATE.start_main_~#t1121~0.offset_8| 1)) |v_#memory_int_9|) (= 0 |v_ULTIMATE.start_main_~#t1121~0.offset_8|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1121~0.base_9| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1121~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1121~0.base_9| 0)) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1121~0.base_9|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1121~0.offset=|v_ULTIMATE.start_main_~#t1121~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1121~0.base=|v_ULTIMATE.start_main_~#t1121~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1121~0.offset, ULTIMATE.start_main_~#t1121~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:15:36,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1122~0.base_10| 4) |v_#length_15|) (= 0 |v_ULTIMATE.start_main_~#t1122~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1122~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1122~0.base_10|) |v_ULTIMATE.start_main_~#t1122~0.offset_10| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1122~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1122~0.base_10|) (not (= 0 |v_ULTIMATE.start_main_~#t1122~0.base_10|)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1122~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1122~0.offset=|v_ULTIMATE.start_main_~#t1122~0.offset_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1122~0.base=|v_ULTIMATE.start_main_~#t1122~0.base_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1122~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1122~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-11-28 18:15:36,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (= ~__unbuffered_p2_EBX~0_Out-1600473748 ~a~0_In-1600473748) (= ~y$r_buff0_thd1~0_In-1600473748 ~y$r_buff1_thd1~0_Out-1600473748) (= 1 ~z~0_Out-1600473748) (= 1 ~y$r_buff0_thd3~0_Out-1600473748) (= ~__unbuffered_p2_EAX~0_Out-1600473748 ~z~0_Out-1600473748) (= ~y$r_buff1_thd2~0_Out-1600473748 ~y$r_buff0_thd2~0_In-1600473748) (= ~y$r_buff1_thd0~0_Out-1600473748 ~y$r_buff0_thd0~0_In-1600473748) (not (= P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1600473748 0)) (= ~y$r_buff1_thd3~0_Out-1600473748 ~y$r_buff0_thd3~0_In-1600473748)) InVars {~a~0=~a~0_In-1600473748, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1600473748, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1600473748, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1600473748, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1600473748, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1600473748} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out-1600473748, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1600473748, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out-1600473748, ~a~0=~a~0_In-1600473748, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out-1600473748, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out-1600473748, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1600473748, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1600473748, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1600473748, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1600473748, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out-1600473748, ~z~0=~z~0_Out-1600473748, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out-1600473748} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-11-28 18:15:36,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-11-28 18:15:36,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In2137297046 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In2137297046 256))) (.cse0 (= |P1Thread1of1ForFork0_#t~ite3_Out2137297046| |P1Thread1of1ForFork0_#t~ite4_Out2137297046|))) (or (and (= ~y$w_buff1~0_In2137297046 |P1Thread1of1ForFork0_#t~ite3_Out2137297046|) .cse0 (not .cse1) (not .cse2)) (and (or .cse1 .cse2) (= |P1Thread1of1ForFork0_#t~ite3_Out2137297046| ~y~0_In2137297046) .cse0))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2137297046, ~y$w_buff1~0=~y$w_buff1~0_In2137297046, ~y~0=~y~0_In2137297046, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2137297046} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2137297046, ~y$w_buff1~0=~y$w_buff1~0_In2137297046, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out2137297046|, ~y~0=~y~0_In2137297046, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out2137297046|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2137297046} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:15:36,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-827701702 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-827701702 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite11_Out-827701702|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-827701702 |P2Thread1of1ForFork1_#t~ite11_Out-827701702|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-827701702, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-827701702} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-827701702, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out-827701702|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-827701702} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:15:36,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd3~0_In-1914908158 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1914908158 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1914908158 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1914908158 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite12_Out-1914908158| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite12_Out-1914908158| ~y$w_buff1_used~0_In-1914908158)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1914908158, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1914908158, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1914908158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1914908158} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1914908158, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1914908158, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1914908158, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out-1914908158|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1914908158} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:15:36,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1704236662 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In1704236662 256) 0)) (.cse2 (= ~y$r_buff0_thd3~0_Out1704236662 ~y$r_buff0_thd3~0_In1704236662))) (or (and (not .cse0) (= ~y$r_buff0_thd3~0_Out1704236662 0) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1704236662, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1704236662} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out1704236662|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1704236662, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1704236662} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-11-28 18:15:36,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In41413006 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In41413006 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In41413006 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In41413006 256)))) (or (and (= ~y$r_buff1_thd3~0_In41413006 |P2Thread1of1ForFork1_#t~ite14_Out41413006|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork1_#t~ite14_Out41413006|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In41413006, ~y$w_buff0_used~0=~y$w_buff0_used~0_In41413006, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In41413006, ~y$w_buff1_used~0=~y$w_buff1_used~0_In41413006} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out41413006|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In41413006, ~y$w_buff0_used~0=~y$w_buff0_used~0_In41413006, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In41413006, ~y$w_buff1_used~0=~y$w_buff1_used~0_In41413006} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:15:36,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-11-28 18:15:36,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1277146073 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1277146073 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite5_Out1277146073| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1277146073 |P1Thread1of1ForFork0_#t~ite5_Out1277146073|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1277146073, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1277146073} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1277146073, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1277146073, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out1277146073|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:15:36,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-627812035 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-627812035 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-627812035 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-627812035 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite6_Out-627812035| 0)) (and (= |P1Thread1of1ForFork0_#t~ite6_Out-627812035| ~y$w_buff1_used~0_In-627812035) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-627812035, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-627812035, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-627812035, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-627812035} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-627812035, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-627812035, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-627812035, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-627812035|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-627812035} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:15:36,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-2115919030 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-2115919030 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork0_#t~ite7_Out-2115919030| 0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite7_Out-2115919030| ~y$r_buff0_thd2~0_In-2115919030) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2115919030, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2115919030} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2115919030, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2115919030, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-2115919030|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:15:36,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In2145676036 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In2145676036 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In2145676036 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In2145676036 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite8_Out2145676036| 0)) (and (= ~y$r_buff1_thd2~0_In2145676036 |P1Thread1of1ForFork0_#t~ite8_Out2145676036|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2145676036, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2145676036, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2145676036, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2145676036} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2145676036, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2145676036, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2145676036, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out2145676036|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2145676036} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:15:36,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-11-28 18:15:36,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:15:36,319 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out1098235940| |ULTIMATE.start_main_#t~ite19_Out1098235940|)) (.cse1 (= (mod ~y$w_buff1_used~0_In1098235940 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1098235940 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= ~y$w_buff1~0_In1098235940 |ULTIMATE.start_main_#t~ite18_Out1098235940|)) (and .cse0 (= |ULTIMATE.start_main_#t~ite18_Out1098235940| ~y~0_In1098235940) (or .cse1 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1098235940, ~y~0=~y~0_In1098235940, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1098235940, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1098235940} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1098235940, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1098235940|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1098235940|, ~y~0=~y~0_In1098235940, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1098235940, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1098235940} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:15:36,319 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-133940392 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-133940392 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-133940392| ~y$w_buff0_used~0_In-133940392) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite20_Out-133940392| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-133940392, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-133940392} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-133940392, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-133940392, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-133940392|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:15:36,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-110703277 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-110703277 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-110703277 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-110703277 256)))) (or (and (= ~y$w_buff1_used~0_In-110703277 |ULTIMATE.start_main_#t~ite21_Out-110703277|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-110703277|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-110703277, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-110703277, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-110703277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-110703277} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-110703277, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-110703277, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-110703277|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-110703277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-110703277} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:15:36,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-233426477 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-233426477 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-233426477| ~y$r_buff0_thd0~0_In-233426477) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite22_Out-233426477| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-233426477, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-233426477} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-233426477, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-233426477, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-233426477|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:15:36,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-534487155 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd0~0_In-534487155 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-534487155 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-534487155 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite23_Out-534487155|)) (and (or .cse2 .cse3) (= ~y$r_buff1_thd0~0_In-534487155 |ULTIMATE.start_main_#t~ite23_Out-534487155|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-534487155, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-534487155, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-534487155, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-534487155} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-534487155, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-534487155, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-534487155, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-534487155|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-534487155} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:15:36,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-671523919 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_In-671523919| |ULTIMATE.start_main_#t~ite29_Out-671523919|) (not .cse0) (= ~y$w_buff0~0_In-671523919 |ULTIMATE.start_main_#t~ite30_Out-671523919|)) (and (= |ULTIMATE.start_main_#t~ite29_Out-671523919| |ULTIMATE.start_main_#t~ite30_Out-671523919|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-671523919 256)))) (or (and (= (mod ~y$w_buff1_used~0_In-671523919 256) 0) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-671523919 256)) (and (= 0 (mod ~y$r_buff1_thd0~0_In-671523919 256)) .cse1))) (= ~y$w_buff0~0_In-671523919 |ULTIMATE.start_main_#t~ite29_Out-671523919|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-671523919, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-671523919|, ~y$w_buff0~0=~y$w_buff0~0_In-671523919, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-671523919, ~weak$$choice2~0=~weak$$choice2~0_In-671523919, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-671523919, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-671523919} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-671523919|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-671523919, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-671523919|, ~y$w_buff0~0=~y$w_buff0~0_In-671523919, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-671523919, ~weak$$choice2~0=~weak$$choice2~0_In-671523919, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-671523919, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-671523919} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-11-28 18:15:36,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1503414513 256)))) (or (and (= ~y$w_buff0_used~0_In-1503414513 |ULTIMATE.start_main_#t~ite36_Out-1503414513|) (= |ULTIMATE.start_main_#t~ite35_In-1503414513| |ULTIMATE.start_main_#t~ite35_Out-1503414513|) (not .cse0)) (and (= ~y$w_buff0_used~0_In-1503414513 |ULTIMATE.start_main_#t~ite35_Out-1503414513|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1503414513 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In-1503414513 256) 0) .cse1) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-1503414513 256))) (= (mod ~y$w_buff0_used~0_In-1503414513 256) 0))) (= |ULTIMATE.start_main_#t~ite36_Out-1503414513| |ULTIMATE.start_main_#t~ite35_Out-1503414513|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-1503414513|, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-1503414513|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-1503414513|, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:15:36,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2043454181 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) (= |ULTIMATE.start_main_#t~ite38_In-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2043454181 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-2043454181 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2043454181 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-2043454181 256))))) (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|) (= |ULTIMATE.start_main_#t~ite38_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-2043454181|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:15:36,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:15:36,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In994565484 256) 0))) (or (and (= ~y$r_buff1_thd0~0_In994565484 |ULTIMATE.start_main_#t~ite44_Out994565484|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In994565484 256)))) (or (= (mod ~y$w_buff0_used~0_In994565484 256) 0) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In994565484 256))) (and (= 0 (mod ~y$w_buff1_used~0_In994565484 256)) .cse0))) .cse1 (= |ULTIMATE.start_main_#t~ite45_Out994565484| |ULTIMATE.start_main_#t~ite44_Out994565484|)) (and (not .cse1) (= ~y$r_buff1_thd0~0_In994565484 |ULTIMATE.start_main_#t~ite45_Out994565484|) (= |ULTIMATE.start_main_#t~ite44_In994565484| |ULTIMATE.start_main_#t~ite44_Out994565484|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In994565484|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out994565484|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out994565484|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:15:36,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:15:36,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:15:36,427 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:15:36 BasicIcfg [2019-11-28 18:15:36,428 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:15:36,428 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:15:36,428 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:15:36,429 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:15:36,429 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:15:12" (3/4) ... [2019-11-28 18:15:36,433 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:15:36,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1120~0.base_27|) (= v_~y$w_buff1_used~0_304 0) (= 0 |v_ULTIMATE.start_main_~#t1120~0.offset_21|) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1120~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1120~0.base_27|) |v_ULTIMATE.start_main_~#t1120~0.offset_21| 0)) |v_#memory_int_15|) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= v_~y$r_buff0_thd1~0_41 0) (= v_~a~0_57 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1120~0.base_27|) 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1120~0.base_27| 4) |v_#length_19|) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= (store .cse0 |v_ULTIMATE.start_main_~#t1120~0.base_27| 1) |v_#valid_54|) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ULTIMATE.start_main_~#t1121~0.base=|v_ULTIMATE.start_main_~#t1121~0.base_26|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_~#t1122~0.base=|v_ULTIMATE.start_main_~#t1122~0.base_21|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_~#t1120~0.offset=|v_ULTIMATE.start_main_~#t1120~0.offset_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ~y~0=v_~y~0_123, ULTIMATE.start_main_~#t1122~0.offset=|v_ULTIMATE.start_main_~#t1122~0.offset_16|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_~#t1120~0.base=|v_ULTIMATE.start_main_~#t1120~0.base_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_~#t1121~0.offset=|v_ULTIMATE.start_main_~#t1121~0.offset_20|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1121~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t1122~0.base, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t1120~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1122~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_~#t1120~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1121~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:15:36,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1121~0.base_9| 1) |v_#valid_27|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1121~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1121~0.base_9|) |v_ULTIMATE.start_main_~#t1121~0.offset_8| 1)) |v_#memory_int_9|) (= 0 |v_ULTIMATE.start_main_~#t1121~0.offset_8|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1121~0.base_9| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1121~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1121~0.base_9| 0)) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1121~0.base_9|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1121~0.offset=|v_ULTIMATE.start_main_~#t1121~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1121~0.base=|v_ULTIMATE.start_main_~#t1121~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1121~0.offset, ULTIMATE.start_main_~#t1121~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:15:36,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1122~0.base_10| 4) |v_#length_15|) (= 0 |v_ULTIMATE.start_main_~#t1122~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1122~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1122~0.base_10|) |v_ULTIMATE.start_main_~#t1122~0.offset_10| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1122~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1122~0.base_10|) (not (= 0 |v_ULTIMATE.start_main_~#t1122~0.base_10|)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1122~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1122~0.offset=|v_ULTIMATE.start_main_~#t1122~0.offset_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1122~0.base=|v_ULTIMATE.start_main_~#t1122~0.base_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1122~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1122~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-11-28 18:15:36,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (= ~__unbuffered_p2_EBX~0_Out-1600473748 ~a~0_In-1600473748) (= ~y$r_buff0_thd1~0_In-1600473748 ~y$r_buff1_thd1~0_Out-1600473748) (= 1 ~z~0_Out-1600473748) (= 1 ~y$r_buff0_thd3~0_Out-1600473748) (= ~__unbuffered_p2_EAX~0_Out-1600473748 ~z~0_Out-1600473748) (= ~y$r_buff1_thd2~0_Out-1600473748 ~y$r_buff0_thd2~0_In-1600473748) (= ~y$r_buff1_thd0~0_Out-1600473748 ~y$r_buff0_thd0~0_In-1600473748) (not (= P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1600473748 0)) (= ~y$r_buff1_thd3~0_Out-1600473748 ~y$r_buff0_thd3~0_In-1600473748)) InVars {~a~0=~a~0_In-1600473748, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1600473748, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1600473748, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1600473748, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1600473748, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1600473748} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out-1600473748, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1600473748, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out-1600473748, ~a~0=~a~0_In-1600473748, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out-1600473748, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out-1600473748, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1600473748, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1600473748, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1600473748, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1600473748, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out-1600473748, ~z~0=~z~0_Out-1600473748, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out-1600473748} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-11-28 18:15:36,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-11-28 18:15:36,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In2137297046 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In2137297046 256))) (.cse0 (= |P1Thread1of1ForFork0_#t~ite3_Out2137297046| |P1Thread1of1ForFork0_#t~ite4_Out2137297046|))) (or (and (= ~y$w_buff1~0_In2137297046 |P1Thread1of1ForFork0_#t~ite3_Out2137297046|) .cse0 (not .cse1) (not .cse2)) (and (or .cse1 .cse2) (= |P1Thread1of1ForFork0_#t~ite3_Out2137297046| ~y~0_In2137297046) .cse0))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2137297046, ~y$w_buff1~0=~y$w_buff1~0_In2137297046, ~y~0=~y~0_In2137297046, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2137297046} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2137297046, ~y$w_buff1~0=~y$w_buff1~0_In2137297046, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out2137297046|, ~y~0=~y~0_In2137297046, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out2137297046|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2137297046} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:15:36,438 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-827701702 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-827701702 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite11_Out-827701702|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-827701702 |P2Thread1of1ForFork1_#t~ite11_Out-827701702|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-827701702, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-827701702} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-827701702, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out-827701702|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-827701702} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:15:36,439 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd3~0_In-1914908158 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1914908158 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1914908158 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1914908158 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite12_Out-1914908158| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite12_Out-1914908158| ~y$w_buff1_used~0_In-1914908158)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1914908158, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1914908158, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1914908158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1914908158} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1914908158, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1914908158, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1914908158, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out-1914908158|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1914908158} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:15:36,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1704236662 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In1704236662 256) 0)) (.cse2 (= ~y$r_buff0_thd3~0_Out1704236662 ~y$r_buff0_thd3~0_In1704236662))) (or (and (not .cse0) (= ~y$r_buff0_thd3~0_Out1704236662 0) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1704236662, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1704236662} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out1704236662|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1704236662, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1704236662} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-11-28 18:15:36,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In41413006 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In41413006 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In41413006 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In41413006 256)))) (or (and (= ~y$r_buff1_thd3~0_In41413006 |P2Thread1of1ForFork1_#t~ite14_Out41413006|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork1_#t~ite14_Out41413006|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In41413006, ~y$w_buff0_used~0=~y$w_buff0_used~0_In41413006, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In41413006, ~y$w_buff1_used~0=~y$w_buff1_used~0_In41413006} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out41413006|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In41413006, ~y$w_buff0_used~0=~y$w_buff0_used~0_In41413006, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In41413006, ~y$w_buff1_used~0=~y$w_buff1_used~0_In41413006} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:15:36,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-11-28 18:15:36,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1277146073 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1277146073 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite5_Out1277146073| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1277146073 |P1Thread1of1ForFork0_#t~ite5_Out1277146073|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1277146073, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1277146073} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1277146073, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1277146073, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out1277146073|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:15:36,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-627812035 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-627812035 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-627812035 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-627812035 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite6_Out-627812035| 0)) (and (= |P1Thread1of1ForFork0_#t~ite6_Out-627812035| ~y$w_buff1_used~0_In-627812035) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-627812035, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-627812035, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-627812035, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-627812035} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-627812035, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-627812035, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-627812035, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-627812035|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-627812035} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:15:36,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-2115919030 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-2115919030 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork0_#t~ite7_Out-2115919030| 0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite7_Out-2115919030| ~y$r_buff0_thd2~0_In-2115919030) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2115919030, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2115919030} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2115919030, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2115919030, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-2115919030|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:15:36,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In2145676036 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In2145676036 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In2145676036 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In2145676036 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite8_Out2145676036| 0)) (and (= ~y$r_buff1_thd2~0_In2145676036 |P1Thread1of1ForFork0_#t~ite8_Out2145676036|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2145676036, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2145676036, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2145676036, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2145676036} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2145676036, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2145676036, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2145676036, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out2145676036|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2145676036} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:15:36,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-11-28 18:15:36,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:15:36,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out1098235940| |ULTIMATE.start_main_#t~ite19_Out1098235940|)) (.cse1 (= (mod ~y$w_buff1_used~0_In1098235940 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1098235940 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= ~y$w_buff1~0_In1098235940 |ULTIMATE.start_main_#t~ite18_Out1098235940|)) (and .cse0 (= |ULTIMATE.start_main_#t~ite18_Out1098235940| ~y~0_In1098235940) (or .cse1 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1098235940, ~y~0=~y~0_In1098235940, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1098235940, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1098235940} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1098235940, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1098235940|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1098235940|, ~y~0=~y~0_In1098235940, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1098235940, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1098235940} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:15:36,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-133940392 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-133940392 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-133940392| ~y$w_buff0_used~0_In-133940392) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite20_Out-133940392| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-133940392, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-133940392} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-133940392, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-133940392, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-133940392|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:15:36,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-110703277 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-110703277 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-110703277 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-110703277 256)))) (or (and (= ~y$w_buff1_used~0_In-110703277 |ULTIMATE.start_main_#t~ite21_Out-110703277|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-110703277|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-110703277, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-110703277, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-110703277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-110703277} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-110703277, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-110703277, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-110703277|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-110703277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-110703277} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:15:36,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-233426477 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-233426477 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-233426477| ~y$r_buff0_thd0~0_In-233426477) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite22_Out-233426477| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-233426477, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-233426477} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-233426477, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-233426477, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-233426477|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:15:36,446 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-534487155 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd0~0_In-534487155 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-534487155 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-534487155 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite23_Out-534487155|)) (and (or .cse2 .cse3) (= ~y$r_buff1_thd0~0_In-534487155 |ULTIMATE.start_main_#t~ite23_Out-534487155|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-534487155, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-534487155, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-534487155, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-534487155} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-534487155, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-534487155, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-534487155, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-534487155|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-534487155} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:15:36,447 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-671523919 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_In-671523919| |ULTIMATE.start_main_#t~ite29_Out-671523919|) (not .cse0) (= ~y$w_buff0~0_In-671523919 |ULTIMATE.start_main_#t~ite30_Out-671523919|)) (and (= |ULTIMATE.start_main_#t~ite29_Out-671523919| |ULTIMATE.start_main_#t~ite30_Out-671523919|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-671523919 256)))) (or (and (= (mod ~y$w_buff1_used~0_In-671523919 256) 0) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-671523919 256)) (and (= 0 (mod ~y$r_buff1_thd0~0_In-671523919 256)) .cse1))) (= ~y$w_buff0~0_In-671523919 |ULTIMATE.start_main_#t~ite29_Out-671523919|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-671523919, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-671523919|, ~y$w_buff0~0=~y$w_buff0~0_In-671523919, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-671523919, ~weak$$choice2~0=~weak$$choice2~0_In-671523919, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-671523919, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-671523919} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-671523919|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-671523919, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-671523919|, ~y$w_buff0~0=~y$w_buff0~0_In-671523919, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-671523919, ~weak$$choice2~0=~weak$$choice2~0_In-671523919, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-671523919, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-671523919} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-11-28 18:15:36,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1503414513 256)))) (or (and (= ~y$w_buff0_used~0_In-1503414513 |ULTIMATE.start_main_#t~ite36_Out-1503414513|) (= |ULTIMATE.start_main_#t~ite35_In-1503414513| |ULTIMATE.start_main_#t~ite35_Out-1503414513|) (not .cse0)) (and (= ~y$w_buff0_used~0_In-1503414513 |ULTIMATE.start_main_#t~ite35_Out-1503414513|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1503414513 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In-1503414513 256) 0) .cse1) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-1503414513 256))) (= (mod ~y$w_buff0_used~0_In-1503414513 256) 0))) (= |ULTIMATE.start_main_#t~ite36_Out-1503414513| |ULTIMATE.start_main_#t~ite35_Out-1503414513|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-1503414513|, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-1503414513|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-1503414513|, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:15:36,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2043454181 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) (= |ULTIMATE.start_main_#t~ite38_In-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2043454181 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-2043454181 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2043454181 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-2043454181 256))))) (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|) (= |ULTIMATE.start_main_#t~ite38_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-2043454181|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:15:36,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:15:36,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In994565484 256) 0))) (or (and (= ~y$r_buff1_thd0~0_In994565484 |ULTIMATE.start_main_#t~ite44_Out994565484|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In994565484 256)))) (or (= (mod ~y$w_buff0_used~0_In994565484 256) 0) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In994565484 256))) (and (= 0 (mod ~y$w_buff1_used~0_In994565484 256)) .cse0))) .cse1 (= |ULTIMATE.start_main_#t~ite45_Out994565484| |ULTIMATE.start_main_#t~ite44_Out994565484|)) (and (not .cse1) (= ~y$r_buff1_thd0~0_In994565484 |ULTIMATE.start_main_#t~ite45_Out994565484|) (= |ULTIMATE.start_main_#t~ite44_In994565484| |ULTIMATE.start_main_#t~ite44_Out994565484|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In994565484|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out994565484|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out994565484|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:15:36,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:15:36,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:15:36,549 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:15:36,549 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:15:36,551 INFO L168 Benchmark]: Toolchain (without parser) took 25621.24 ms. Allocated memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 960.4 MB in the beginning and 1.7 GB in the end (delta: -700.4 MB). Peak memory consumption was 723.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,552 INFO L168 Benchmark]: CDTParser took 0.28 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:36,552 INFO L168 Benchmark]: CACSL2BoogieTranslator took 846.83 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 70.3 MB). Free memory was 955.0 MB in the beginning and 1.0 GB in the end (delta: -80.4 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,553 INFO L168 Benchmark]: Boogie Procedure Inliner took 66.36 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:36,553 INFO L168 Benchmark]: Boogie Preprocessor took 46.28 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,554 INFO L168 Benchmark]: RCFGBuilder took 856.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 979.8 MB in the end (delta: 48.4 MB). Peak memory consumption was 48.4 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,555 INFO L168 Benchmark]: TraceAbstraction took 23677.47 ms. Allocated memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 979.8 MB in the beginning and 1.7 GB in the end (delta: -709.8 MB). Peak memory consumption was 643.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,555 INFO L168 Benchmark]: Witness Printer took 120.89 ms. Allocated memory is still 2.5 GB. Free memory was 1.7 GB in the beginning and 1.7 GB in the end (delta: 28.9 MB). Peak memory consumption was 28.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,559 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.28 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 846.83 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 70.3 MB). Free memory was 955.0 MB in the beginning and 1.0 GB in the end (delta: -80.4 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 66.36 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 46.28 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 856.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 979.8 MB in the end (delta: 48.4 MB). Peak memory consumption was 48.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 23677.47 ms. Allocated memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 979.8 MB in the beginning and 1.7 GB in the end (delta: -709.8 MB). Peak memory consumption was 643.9 MB. Max. memory is 11.5 GB. * Witness Printer took 120.89 ms. Allocated memory is still 2.5 GB. Free memory was 1.7 GB in the beginning and 1.7 GB in the end (delta: 28.9 MB). Peak memory consumption was 28.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.5s, 165 ProgramPointsBefore, 79 ProgramPointsAfterwards, 196 TransitionsBefore, 86 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 28 ChoiceCompositions, 4263 VarBasedMoverChecksPositive, 162 VarBasedMoverChecksNegative, 17 SemBasedMoverChecksPositive, 192 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 50142 CheckedPairsTotal, 117 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L812] FCALL, FORK 0 pthread_create(&t1120, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1121, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK 0 pthread_create(&t1122, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L768] 3 y$w_buff1 = y$w_buff0 [L769] 3 y$w_buff0 = 2 [L770] 3 y$w_buff1_used = y$w_buff0_used [L771] 3 y$w_buff0_used = (_Bool)1 [L789] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 x = 1 [L751] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L789] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L790] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L791] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L818] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L822] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L823] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L824] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L825] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L826] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L829] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L830] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L831] 0 y$flush_delayed = weak$$choice2 [L832] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L834] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L835] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L835] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L836] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L837] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L839] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L840] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 156 locations, 2 error locations. Result: UNSAFE, OverallTime: 23.4s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 6.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1806 SDtfs, 2107 SDslu, 4215 SDs, 0 SdLazy, 2623 SolverSat, 169 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 136 GetRequests, 18 SyntacticMatches, 12 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 268 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=31188occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.2s AutomataMinimizationTime, 15 MinimizatonAttempts, 29770 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 575 NumberOfCodeBlocks, 575 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 503 ConstructedInterpolants, 0 QuantifiedInterpolants, 87459 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...