./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix042_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix042_tso.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4894e6ae27d36c847963604533794c4dadc2447b ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:15:12,108 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:15:12,110 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:15:12,128 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:15:12,128 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:15:12,130 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:15:12,132 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:15:12,141 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:15:12,146 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:15:12,149 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:15:12,150 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:15:12,152 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:15:12,152 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:15:12,155 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:15:12,156 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:15:12,157 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:15:12,159 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:15:12,160 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:15:12,163 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:15:12,167 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:15:12,171 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:15:12,175 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:15:12,176 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:15:12,178 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:15:12,181 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:15:12,181 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:15:12,181 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:15:12,183 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:15:12,183 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:15:12,184 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:15:12,185 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:15:12,185 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:15:12,186 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:15:12,187 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:15:12,189 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:15:12,189 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:15:12,191 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:15:12,191 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:15:12,191 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:15:12,192 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:15:12,193 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:15:12,194 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:15:12,219 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:15:12,223 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:15:12,226 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:15:12,227 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:15:12,227 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:15:12,228 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:15:12,228 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:15:12,228 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:15:12,229 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:15:12,229 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:15:12,230 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:15:12,230 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:15:12,230 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:15:12,231 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:15:12,231 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:15:12,231 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:15:12,232 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:15:12,232 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:15:12,232 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:15:12,234 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:15:12,234 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:15:12,235 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:15:12,236 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:15:12,238 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:15:12,238 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:15:12,238 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:15:12,238 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:15:12,239 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:15:12,239 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:15:12,239 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4894e6ae27d36c847963604533794c4dadc2447b [2019-11-28 18:15:12,546 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:15:12,559 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:15:12,562 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:15:12,564 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:15:12,564 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:15:12,565 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix042_tso.opt.i [2019-11-28 18:15:12,627 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5a72c9cee/e3b85670efc64051a10e01979e89b4d5/FLAGb7592fdea [2019-11-28 18:15:13,193 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:15:13,194 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix042_tso.opt.i [2019-11-28 18:15:13,216 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5a72c9cee/e3b85670efc64051a10e01979e89b4d5/FLAGb7592fdea [2019-11-28 18:15:13,520 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5a72c9cee/e3b85670efc64051a10e01979e89b4d5 [2019-11-28 18:15:13,523 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:15:13,525 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:15:13,526 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:15:13,526 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:15:13,529 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:15:13,530 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:15:13" (1/1) ... [2019-11-28 18:15:13,533 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1ff24694 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:13, skipping insertion in model container [2019-11-28 18:15:13,533 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:15:13" (1/1) ... [2019-11-28 18:15:13,540 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:15:13,596 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:15:14,118 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:15:14,140 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:15:14,213 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:15:14,299 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:15:14,300 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14 WrapperNode [2019-11-28 18:15:14,300 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:15:14,301 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:15:14,301 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:15:14,301 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:15:14,308 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,334 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,371 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:15:14,371 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:15:14,372 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:15:14,372 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:15:14,382 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,382 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,387 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,387 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,397 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,401 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,404 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... [2019-11-28 18:15:14,409 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:15:14,410 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:15:14,410 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:15:14,410 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:15:14,411 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:15:14,477 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:15:14,477 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:15:14,477 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:15:14,477 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:15:14,478 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:15:14,478 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:15:14,478 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:15:14,478 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:15:14,478 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:15:14,479 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:15:14,479 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:15:14,479 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:15:14,479 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:15:14,481 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:15:15,176 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:15:15,176 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:15:15,178 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:15:15 BoogieIcfgContainer [2019-11-28 18:15:15,178 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:15:15,179 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:15:15,179 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:15:15,183 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:15:15,183 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:15:13" (1/3) ... [2019-11-28 18:15:15,184 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47e12183 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:15:15, skipping insertion in model container [2019-11-28 18:15:15,184 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:15:14" (2/3) ... [2019-11-28 18:15:15,184 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47e12183 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:15:15, skipping insertion in model container [2019-11-28 18:15:15,185 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:15:15" (3/3) ... [2019-11-28 18:15:15,186 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_tso.opt.i [2019-11-28 18:15:15,196 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:15:15,196 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:15:15,206 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:15:15,207 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:15:15,243 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,243 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,243 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,244 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,244 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,244 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,246 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,246 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,254 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,254 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,254 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,254 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,254 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,255 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,255 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,255 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,260 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,260 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,260 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,260 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,261 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,261 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,261 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,261 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,261 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,262 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:15:15,279 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-11-28 18:15:15,294 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:15:15,295 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:15:15,295 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:15:15,295 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:15:15,295 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:15:15,295 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:15:15,295 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:15:15,296 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:15:15,317 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 165 places, 196 transitions [2019-11-28 18:15:15,320 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-11-28 18:15:15,408 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-11-28 18:15:15,409 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:15:15,430 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:15:15,451 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-11-28 18:15:15,502 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-11-28 18:15:15,502 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:15:15,509 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:15:15,526 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-11-28 18:15:15,527 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:15:19,905 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2019-11-28 18:15:20,291 WARN L192 SmtUtils]: Spent 286.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-11-28 18:15:20,433 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 89 [2019-11-28 18:15:20,454 INFO L206 etLargeBlockEncoding]: Checked pairs total: 50142 [2019-11-28 18:15:20,454 INFO L214 etLargeBlockEncoding]: Total number of compositions: 117 [2019-11-28 18:15:20,458 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 86 transitions [2019-11-28 18:15:21,601 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 14254 states. [2019-11-28 18:15:21,604 INFO L276 IsEmpty]: Start isEmpty. Operand 14254 states. [2019-11-28 18:15:21,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-11-28 18:15:21,611 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:21,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:21,612 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:21,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:21,619 INFO L82 PathProgramCache]: Analyzing trace with hash -632784469, now seen corresponding path program 1 times [2019-11-28 18:15:21,628 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:21,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1919872547] [2019-11-28 18:15:21,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:21,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:21,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:21,926 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1919872547] [2019-11-28 18:15:21,927 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:21,927 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:15:21,928 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457094094] [2019-11-28 18:15:21,933 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:21,933 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:21,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:21,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:21,951 INFO L87 Difference]: Start difference. First operand 14254 states. Second operand 3 states. [2019-11-28 18:15:22,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:22,280 INFO L93 Difference]: Finished difference Result 14182 states and 53160 transitions. [2019-11-28 18:15:22,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:22,282 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-11-28 18:15:22,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:22,436 INFO L225 Difference]: With dead ends: 14182 [2019-11-28 18:15:22,436 INFO L226 Difference]: Without dead ends: 13870 [2019-11-28 18:15:22,438 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:22,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13870 states. [2019-11-28 18:15:23,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13870 to 13870. [2019-11-28 18:15:23,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13870 states. [2019-11-28 18:15:23,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13870 states to 13870 states and 52042 transitions. [2019-11-28 18:15:23,235 INFO L78 Accepts]: Start accepts. Automaton has 13870 states and 52042 transitions. Word has length 7 [2019-11-28 18:15:23,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:23,236 INFO L462 AbstractCegarLoop]: Abstraction has 13870 states and 52042 transitions. [2019-11-28 18:15:23,236 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:23,237 INFO L276 IsEmpty]: Start isEmpty. Operand 13870 states and 52042 transitions. [2019-11-28 18:15:23,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:15:23,241 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:23,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:23,242 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:23,242 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:23,242 INFO L82 PathProgramCache]: Analyzing trace with hash -1056225825, now seen corresponding path program 1 times [2019-11-28 18:15:23,242 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:23,243 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541527189] [2019-11-28 18:15:23,243 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:23,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:23,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:23,331 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541527189] [2019-11-28 18:15:23,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:23,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:23,332 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067984494] [2019-11-28 18:15:23,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:23,335 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:23,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:23,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:23,337 INFO L87 Difference]: Start difference. First operand 13870 states and 52042 transitions. Second operand 4 states. [2019-11-28 18:15:23,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:23,874 INFO L93 Difference]: Finished difference Result 19034 states and 69248 transitions. [2019-11-28 18:15:23,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:23,875 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:15:23,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:23,953 INFO L225 Difference]: With dead ends: 19034 [2019-11-28 18:15:23,954 INFO L226 Difference]: Without dead ends: 19034 [2019-11-28 18:15:23,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:24,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19034 states. [2019-11-28 18:15:24,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19034 to 18800. [2019-11-28 18:15:24,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18800 states. [2019-11-28 18:15:24,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18800 states to 18800 states and 68487 transitions. [2019-11-28 18:15:24,696 INFO L78 Accepts]: Start accepts. Automaton has 18800 states and 68487 transitions. Word has length 13 [2019-11-28 18:15:24,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:24,696 INFO L462 AbstractCegarLoop]: Abstraction has 18800 states and 68487 transitions. [2019-11-28 18:15:24,697 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:24,697 INFO L276 IsEmpty]: Start isEmpty. Operand 18800 states and 68487 transitions. [2019-11-28 18:15:24,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:15:24,702 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:24,702 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:24,703 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:24,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:24,703 INFO L82 PathProgramCache]: Analyzing trace with hash 746093816, now seen corresponding path program 1 times [2019-11-28 18:15:24,704 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:24,704 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694020755] [2019-11-28 18:15:24,704 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:24,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:24,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:24,812 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694020755] [2019-11-28 18:15:24,812 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:24,812 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:24,813 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669937197] [2019-11-28 18:15:24,813 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:24,813 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:24,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:24,814 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:24,814 INFO L87 Difference]: Start difference. First operand 18800 states and 68487 transitions. Second operand 4 states. [2019-11-28 18:15:25,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:25,344 INFO L93 Difference]: Finished difference Result 27022 states and 96312 transitions. [2019-11-28 18:15:25,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:25,345 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:15:25,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:25,433 INFO L225 Difference]: With dead ends: 27022 [2019-11-28 18:15:25,434 INFO L226 Difference]: Without dead ends: 27008 [2019-11-28 18:15:25,434 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:25,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27008 states. [2019-11-28 18:15:26,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27008 to 22366. [2019-11-28 18:15:26,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22366 states. [2019-11-28 18:15:26,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22366 states to 22366 states and 80994 transitions. [2019-11-28 18:15:26,172 INFO L78 Accepts]: Start accepts. Automaton has 22366 states and 80994 transitions. Word has length 13 [2019-11-28 18:15:26,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:26,172 INFO L462 AbstractCegarLoop]: Abstraction has 22366 states and 80994 transitions. [2019-11-28 18:15:26,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:26,173 INFO L276 IsEmpty]: Start isEmpty. Operand 22366 states and 80994 transitions. [2019-11-28 18:15:26,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-11-28 18:15:26,180 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:26,180 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:26,180 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:26,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:26,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1347005908, now seen corresponding path program 1 times [2019-11-28 18:15:26,182 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:26,182 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973317051] [2019-11-28 18:15:26,183 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:26,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:26,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:26,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973317051] [2019-11-28 18:15:26,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:26,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:26,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394963070] [2019-11-28 18:15:26,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:26,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:26,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:26,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:26,321 INFO L87 Difference]: Start difference. First operand 22366 states and 80994 transitions. Second operand 5 states. [2019-11-28 18:15:26,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:26,875 INFO L93 Difference]: Finished difference Result 30132 states and 106959 transitions. [2019-11-28 18:15:26,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:15:26,876 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-11-28 18:15:26,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:26,968 INFO L225 Difference]: With dead ends: 30132 [2019-11-28 18:15:26,969 INFO L226 Difference]: Without dead ends: 30118 [2019-11-28 18:15:26,969 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:15:27,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30118 states. [2019-11-28 18:15:28,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30118 to 22270. [2019-11-28 18:15:28,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22270 states. [2019-11-28 18:15:28,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22270 states to 22270 states and 80486 transitions. [2019-11-28 18:15:28,080 INFO L78 Accepts]: Start accepts. Automaton has 22270 states and 80486 transitions. Word has length 19 [2019-11-28 18:15:28,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:28,081 INFO L462 AbstractCegarLoop]: Abstraction has 22270 states and 80486 transitions. [2019-11-28 18:15:28,081 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:28,082 INFO L276 IsEmpty]: Start isEmpty. Operand 22270 states and 80486 transitions. [2019-11-28 18:15:28,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-28 18:15:28,115 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:28,115 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:28,116 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:28,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:28,116 INFO L82 PathProgramCache]: Analyzing trace with hash 1614023153, now seen corresponding path program 1 times [2019-11-28 18:15:28,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:28,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997588989] [2019-11-28 18:15:28,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:28,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:28,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:28,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997588989] [2019-11-28 18:15:28,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:28,207 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:15:28,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2495700] [2019-11-28 18:15:28,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:15:28,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:28,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:15:28,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:28,208 INFO L87 Difference]: Start difference. First operand 22270 states and 80486 transitions. Second operand 6 states. [2019-11-28 18:15:28,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:28,671 INFO L93 Difference]: Finished difference Result 32606 states and 115328 transitions. [2019-11-28 18:15:28,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:15:28,671 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-11-28 18:15:28,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:28,745 INFO L225 Difference]: With dead ends: 32606 [2019-11-28 18:15:28,745 INFO L226 Difference]: Without dead ends: 32574 [2019-11-28 18:15:28,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:15:28,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32574 states. [2019-11-28 18:15:29,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32574 to 28036. [2019-11-28 18:15:29,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28036 states. [2019-11-28 18:15:29,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28036 states to 28036 states and 100001 transitions. [2019-11-28 18:15:29,909 INFO L78 Accepts]: Start accepts. Automaton has 28036 states and 100001 transitions. Word has length 27 [2019-11-28 18:15:29,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:29,910 INFO L462 AbstractCegarLoop]: Abstraction has 28036 states and 100001 transitions. [2019-11-28 18:15:29,910 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:15:29,910 INFO L276 IsEmpty]: Start isEmpty. Operand 28036 states and 100001 transitions. [2019-11-28 18:15:29,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-28 18:15:29,948 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:29,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:29,948 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:29,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:29,949 INFO L82 PathProgramCache]: Analyzing trace with hash 1188296037, now seen corresponding path program 1 times [2019-11-28 18:15:29,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:29,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368621878] [2019-11-28 18:15:29,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:29,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:29,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:29,994 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368621878] [2019-11-28 18:15:29,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:29,995 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:29,995 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733554772] [2019-11-28 18:15:29,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:29,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:29,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:29,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:29,996 INFO L87 Difference]: Start difference. First operand 28036 states and 100001 transitions. Second operand 3 states. [2019-11-28 18:15:30,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:30,179 INFO L93 Difference]: Finished difference Result 35568 states and 127677 transitions. [2019-11-28 18:15:30,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:30,180 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-11-28 18:15:30,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:30,279 INFO L225 Difference]: With dead ends: 35568 [2019-11-28 18:15:30,280 INFO L226 Difference]: Without dead ends: 35568 [2019-11-28 18:15:30,280 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:30,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35568 states. [2019-11-28 18:15:30,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35568 to 31188. [2019-11-28 18:15:30,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31188 states. [2019-11-28 18:15:30,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31188 states to 31188 states and 112337 transitions. [2019-11-28 18:15:30,961 INFO L78 Accepts]: Start accepts. Automaton has 31188 states and 112337 transitions. Word has length 33 [2019-11-28 18:15:30,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:30,961 INFO L462 AbstractCegarLoop]: Abstraction has 31188 states and 112337 transitions. [2019-11-28 18:15:30,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:30,962 INFO L276 IsEmpty]: Start isEmpty. Operand 31188 states and 112337 transitions. [2019-11-28 18:15:30,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-28 18:15:30,993 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:30,994 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:30,994 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:30,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:30,994 INFO L82 PathProgramCache]: Analyzing trace with hash -1536973783, now seen corresponding path program 1 times [2019-11-28 18:15:30,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:30,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273197167] [2019-11-28 18:15:30,995 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:31,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:31,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:31,061 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273197167] [2019-11-28 18:15:31,061 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:31,062 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:15:31,063 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972344981] [2019-11-28 18:15:31,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:15:31,063 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:31,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:15:31,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:15:31,064 INFO L87 Difference]: Start difference. First operand 31188 states and 112337 transitions. Second operand 4 states. [2019-11-28 18:15:31,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:31,162 INFO L93 Difference]: Finished difference Result 18039 states and 56038 transitions. [2019-11-28 18:15:31,162 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:15:31,162 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-11-28 18:15:31,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:31,202 INFO L225 Difference]: With dead ends: 18039 [2019-11-28 18:15:31,202 INFO L226 Difference]: Without dead ends: 17509 [2019-11-28 18:15:31,203 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:31,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17509 states. [2019-11-28 18:15:31,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17509 to 17509. [2019-11-28 18:15:31,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17509 states. [2019-11-28 18:15:32,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17509 states to 17509 states and 54532 transitions. [2019-11-28 18:15:32,109 INFO L78 Accepts]: Start accepts. Automaton has 17509 states and 54532 transitions. Word has length 33 [2019-11-28 18:15:32,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:32,110 INFO L462 AbstractCegarLoop]: Abstraction has 17509 states and 54532 transitions. [2019-11-28 18:15:32,110 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:15:32,110 INFO L276 IsEmpty]: Start isEmpty. Operand 17509 states and 54532 transitions. [2019-11-28 18:15:32,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:15:32,124 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:32,124 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:32,125 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:32,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:32,126 INFO L82 PathProgramCache]: Analyzing trace with hash 345963664, now seen corresponding path program 1 times [2019-11-28 18:15:32,127 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:32,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187160328] [2019-11-28 18:15:32,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:32,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:32,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:32,188 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187160328] [2019-11-28 18:15:32,188 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:32,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:32,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2009058468] [2019-11-28 18:15:32,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:32,190 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:32,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:32,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:32,190 INFO L87 Difference]: Start difference. First operand 17509 states and 54532 transitions. Second operand 3 states. [2019-11-28 18:15:32,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:32,292 INFO L93 Difference]: Finished difference Result 17509 states and 54339 transitions. [2019-11-28 18:15:32,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:32,292 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2019-11-28 18:15:32,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:32,316 INFO L225 Difference]: With dead ends: 17509 [2019-11-28 18:15:32,317 INFO L226 Difference]: Without dead ends: 17509 [2019-11-28 18:15:32,317 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:32,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17509 states. [2019-11-28 18:15:32,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17509 to 17509. [2019-11-28 18:15:32,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17509 states. [2019-11-28 18:15:32,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17509 states to 17509 states and 54339 transitions. [2019-11-28 18:15:32,584 INFO L78 Accepts]: Start accepts. Automaton has 17509 states and 54339 transitions. Word has length 34 [2019-11-28 18:15:32,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:32,584 INFO L462 AbstractCegarLoop]: Abstraction has 17509 states and 54339 transitions. [2019-11-28 18:15:32,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:32,584 INFO L276 IsEmpty]: Start isEmpty. Operand 17509 states and 54339 transitions. [2019-11-28 18:15:32,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:15:32,597 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:32,597 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:32,598 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:32,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:32,598 INFO L82 PathProgramCache]: Analyzing trace with hash -1096312539, now seen corresponding path program 1 times [2019-11-28 18:15:32,598 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:32,598 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383600938] [2019-11-28 18:15:32,599 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:32,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:32,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:32,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383600938] [2019-11-28 18:15:32,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:32,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:32,694 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755270462] [2019-11-28 18:15:32,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:15:32,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:32,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:15:32,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:15:32,696 INFO L87 Difference]: Start difference. First operand 17509 states and 54339 transitions. Second operand 7 states. [2019-11-28 18:15:33,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:33,473 INFO L93 Difference]: Finished difference Result 23341 states and 70914 transitions. [2019-11-28 18:15:33,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-28 18:15:33,473 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-11-28 18:15:33,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:33,505 INFO L225 Difference]: With dead ends: 23341 [2019-11-28 18:15:33,505 INFO L226 Difference]: Without dead ends: 23313 [2019-11-28 18:15:33,505 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:15:33,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23313 states. [2019-11-28 18:15:33,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23313 to 15958. [2019-11-28 18:15:33,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15958 states. [2019-11-28 18:15:33,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15958 states to 15958 states and 49857 transitions. [2019-11-28 18:15:33,790 INFO L78 Accepts]: Start accepts. Automaton has 15958 states and 49857 transitions. Word has length 34 [2019-11-28 18:15:33,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:33,790 INFO L462 AbstractCegarLoop]: Abstraction has 15958 states and 49857 transitions. [2019-11-28 18:15:33,790 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:15:33,790 INFO L276 IsEmpty]: Start isEmpty. Operand 15958 states and 49857 transitions. [2019-11-28 18:15:33,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:15:33,803 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:33,803 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:33,803 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:33,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:33,804 INFO L82 PathProgramCache]: Analyzing trace with hash -308537285, now seen corresponding path program 1 times [2019-11-28 18:15:33,804 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:33,804 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464636256] [2019-11-28 18:15:33,804 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:33,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:33,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:33,882 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1464636256] [2019-11-28 18:15:33,882 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:33,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:15:33,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395885636] [2019-11-28 18:15:33,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:33,883 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:33,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:33,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:33,883 INFO L87 Difference]: Start difference. First operand 15958 states and 49857 transitions. Second operand 5 states. [2019-11-28 18:15:33,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:33,930 INFO L93 Difference]: Finished difference Result 2712 states and 6343 transitions. [2019-11-28 18:15:33,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:15:33,931 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-11-28 18:15:33,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:33,933 INFO L225 Difference]: With dead ends: 2712 [2019-11-28 18:15:33,933 INFO L226 Difference]: Without dead ends: 2403 [2019-11-28 18:15:33,933 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:15:33,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2403 states. [2019-11-28 18:15:33,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2403 to 2403. [2019-11-28 18:15:33,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2403 states. [2019-11-28 18:15:33,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2403 states to 2403 states and 5482 transitions. [2019-11-28 18:15:33,954 INFO L78 Accepts]: Start accepts. Automaton has 2403 states and 5482 transitions. Word has length 34 [2019-11-28 18:15:33,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:33,954 INFO L462 AbstractCegarLoop]: Abstraction has 2403 states and 5482 transitions. [2019-11-28 18:15:33,954 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:33,954 INFO L276 IsEmpty]: Start isEmpty. Operand 2403 states and 5482 transitions. [2019-11-28 18:15:33,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-28 18:15:33,956 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:33,957 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:33,957 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:33,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:33,957 INFO L82 PathProgramCache]: Analyzing trace with hash 682662632, now seen corresponding path program 1 times [2019-11-28 18:15:33,957 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:33,958 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311983606] [2019-11-28 18:15:33,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:33,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:34,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:34,046 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311983606] [2019-11-28 18:15:34,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:34,046 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:34,046 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [508728188] [2019-11-28 18:15:34,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:15:34,047 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:34,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:15:34,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:34,047 INFO L87 Difference]: Start difference. First operand 2403 states and 5482 transitions. Second operand 6 states. [2019-11-28 18:15:34,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:34,116 INFO L93 Difference]: Finished difference Result 708 states and 1600 transitions. [2019-11-28 18:15:34,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:15:34,119 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2019-11-28 18:15:34,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:34,120 INFO L225 Difference]: With dead ends: 708 [2019-11-28 18:15:34,120 INFO L226 Difference]: Without dead ends: 662 [2019-11-28 18:15:34,121 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:15:34,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 662 states. [2019-11-28 18:15:34,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 662 to 606. [2019-11-28 18:15:34,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 606 states. [2019-11-28 18:15:34,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1378 transitions. [2019-11-28 18:15:34,128 INFO L78 Accepts]: Start accepts. Automaton has 606 states and 1378 transitions. Word has length 45 [2019-11-28 18:15:34,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:34,128 INFO L462 AbstractCegarLoop]: Abstraction has 606 states and 1378 transitions. [2019-11-28 18:15:34,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:15:34,129 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 1378 transitions. [2019-11-28 18:15:34,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:15:34,130 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:34,130 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:34,130 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:34,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:34,131 INFO L82 PathProgramCache]: Analyzing trace with hash 1345831558, now seen corresponding path program 1 times [2019-11-28 18:15:34,131 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:34,131 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [754441569] [2019-11-28 18:15:34,131 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:34,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:34,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:34,211 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [754441569] [2019-11-28 18:15:34,211 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:34,211 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:15:34,211 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300551441] [2019-11-28 18:15:34,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:15:34,212 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:34,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:15:34,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:15:34,212 INFO L87 Difference]: Start difference. First operand 606 states and 1378 transitions. Second operand 5 states. [2019-11-28 18:15:34,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:34,384 INFO L93 Difference]: Finished difference Result 877 states and 2007 transitions. [2019-11-28 18:15:34,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:15:34,387 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-11-28 18:15:34,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:34,389 INFO L225 Difference]: With dead ends: 877 [2019-11-28 18:15:34,389 INFO L226 Difference]: Without dead ends: 877 [2019-11-28 18:15:34,389 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:15:34,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 877 states. [2019-11-28 18:15:34,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 877 to 642. [2019-11-28 18:15:34,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 642 states. [2019-11-28 18:15:34,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 642 states to 642 states and 1470 transitions. [2019-11-28 18:15:34,401 INFO L78 Accepts]: Start accepts. Automaton has 642 states and 1470 transitions. Word has length 56 [2019-11-28 18:15:34,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:34,402 INFO L462 AbstractCegarLoop]: Abstraction has 642 states and 1470 transitions. [2019-11-28 18:15:34,402 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:15:34,402 INFO L276 IsEmpty]: Start isEmpty. Operand 642 states and 1470 transitions. [2019-11-28 18:15:34,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:15:34,405 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:34,405 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:34,405 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:34,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:34,406 INFO L82 PathProgramCache]: Analyzing trace with hash 1993080434, now seen corresponding path program 2 times [2019-11-28 18:15:34,406 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:34,406 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116472966] [2019-11-28 18:15:34,407 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:34,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:34,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:34,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116472966] [2019-11-28 18:15:34,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:34,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:15:34,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268050132] [2019-11-28 18:15:34,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:15:34,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:34,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:15:34,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:34,562 INFO L87 Difference]: Start difference. First operand 642 states and 1470 transitions. Second operand 3 states. [2019-11-28 18:15:34,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:34,576 INFO L93 Difference]: Finished difference Result 642 states and 1440 transitions. [2019-11-28 18:15:34,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:15:34,577 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-11-28 18:15:34,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:34,578 INFO L225 Difference]: With dead ends: 642 [2019-11-28 18:15:34,578 INFO L226 Difference]: Without dead ends: 642 [2019-11-28 18:15:34,579 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:15:34,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 642 states. [2019-11-28 18:15:34,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 642 to 606. [2019-11-28 18:15:34,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 606 states. [2019-11-28 18:15:34,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1354 transitions. [2019-11-28 18:15:34,589 INFO L78 Accepts]: Start accepts. Automaton has 606 states and 1354 transitions. Word has length 56 [2019-11-28 18:15:34,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:34,589 INFO L462 AbstractCegarLoop]: Abstraction has 606 states and 1354 transitions. [2019-11-28 18:15:34,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:15:34,590 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 1354 transitions. [2019-11-28 18:15:34,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:15:34,592 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:34,592 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:34,592 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:34,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:34,593 INFO L82 PathProgramCache]: Analyzing trace with hash 2052620165, now seen corresponding path program 1 times [2019-11-28 18:15:34,593 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:34,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703963575] [2019-11-28 18:15:34,595 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:34,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:34,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:34,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703963575] [2019-11-28 18:15:34,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:34,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:15:34,915 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816831210] [2019-11-28 18:15:34,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:15:34,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:34,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:15:34,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:15:34,916 INFO L87 Difference]: Start difference. First operand 606 states and 1354 transitions. Second operand 13 states. [2019-11-28 18:15:35,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:35,502 INFO L93 Difference]: Finished difference Result 914 states and 2024 transitions. [2019-11-28 18:15:35,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-28 18:15:35,503 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-11-28 18:15:35,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:35,504 INFO L225 Difference]: With dead ends: 914 [2019-11-28 18:15:35,504 INFO L226 Difference]: Without dead ends: 884 [2019-11-28 18:15:35,505 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=90, Invalid=372, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:15:35,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 884 states. [2019-11-28 18:15:35,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 884 to 810. [2019-11-28 18:15:35,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 810 states. [2019-11-28 18:15:35,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 810 states to 810 states and 1807 transitions. [2019-11-28 18:15:35,520 INFO L78 Accepts]: Start accepts. Automaton has 810 states and 1807 transitions. Word has length 57 [2019-11-28 18:15:35,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:35,522 INFO L462 AbstractCegarLoop]: Abstraction has 810 states and 1807 transitions. [2019-11-28 18:15:35,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:15:35,523 INFO L276 IsEmpty]: Start isEmpty. Operand 810 states and 1807 transitions. [2019-11-28 18:15:35,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:15:35,524 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:35,525 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:35,525 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:35,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:35,525 INFO L82 PathProgramCache]: Analyzing trace with hash -620426235, now seen corresponding path program 2 times [2019-11-28 18:15:35,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:35,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189120841] [2019-11-28 18:15:35,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:35,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:15:35,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:15:35,696 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1189120841] [2019-11-28 18:15:35,696 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:15:35,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:15:35,697 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1768524028] [2019-11-28 18:15:35,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:15:35,698 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:15:35,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:15:35,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:15:35,698 INFO L87 Difference]: Start difference. First operand 810 states and 1807 transitions. Second operand 7 states. [2019-11-28 18:15:36,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:15:36,053 INFO L93 Difference]: Finished difference Result 1256 states and 2606 transitions. [2019-11-28 18:15:36,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:15:36,053 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 57 [2019-11-28 18:15:36,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:15:36,054 INFO L225 Difference]: With dead ends: 1256 [2019-11-28 18:15:36,054 INFO L226 Difference]: Without dead ends: 798 [2019-11-28 18:15:36,055 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:15:36,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 798 states. [2019-11-28 18:15:36,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 798 to 748. [2019-11-28 18:15:36,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 748 states. [2019-11-28 18:15:36,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 748 states to 748 states and 1628 transitions. [2019-11-28 18:15:36,066 INFO L78 Accepts]: Start accepts. Automaton has 748 states and 1628 transitions. Word has length 57 [2019-11-28 18:15:36,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:15:36,066 INFO L462 AbstractCegarLoop]: Abstraction has 748 states and 1628 transitions. [2019-11-28 18:15:36,066 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:15:36,066 INFO L276 IsEmpty]: Start isEmpty. Operand 748 states and 1628 transitions. [2019-11-28 18:15:36,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:15:36,068 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:15:36,068 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:15:36,068 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:15:36,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:15:36,068 INFO L82 PathProgramCache]: Analyzing trace with hash 729108355, now seen corresponding path program 3 times [2019-11-28 18:15:36,069 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:15:36,069 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014232758] [2019-11-28 18:15:36,069 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:15:36,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:15:36,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:15:36,175 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:15:36,175 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:15:36,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (= v_~y$w_buff1_used~0_304 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= |v_ULTIMATE.start_main_~#t1126~0.offset_21| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1126~0.base_27| 1) |v_#valid_54|) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1126~0.base_27| 4) |v_#length_19|) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1126~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1126~0.base_27|) |v_ULTIMATE.start_main_~#t1126~0.offset_21| 0)) |v_#memory_int_15|) (= v_~y$r_buff0_thd1~0_41 0) (= v_~a~0_57 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= (select .cse0 |v_ULTIMATE.start_main_~#t1126~0.base_27|) 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1126~0.base_27|) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ULTIMATE.start_main_~#t1127~0.base=|v_ULTIMATE.start_main_~#t1127~0.base_26|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ULTIMATE.start_main_~#t1127~0.offset=|v_ULTIMATE.start_main_~#t1127~0.offset_20|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_~#t1126~0.offset=|v_ULTIMATE.start_main_~#t1126~0.offset_21|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ULTIMATE.start_main_~#t1128~0.base=|v_ULTIMATE.start_main_~#t1128~0.base_21|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ~y~0=v_~y~0_123, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_~#t1126~0.base=|v_ULTIMATE.start_main_~#t1126~0.base_27|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ULTIMATE.start_main_~#t1128~0.offset=|v_ULTIMATE.start_main_~#t1128~0.offset_16|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1127~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1127~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1126~0.offset, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1128~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_~#t1126~0.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1128~0.offset, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:15:36,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1127~0.base_9| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1127~0.base_9| 4)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1127~0.base_9|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1127~0.base_9|) (= |v_ULTIMATE.start_main_~#t1127~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1127~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1127~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1127~0.base_9|) |v_ULTIMATE.start_main_~#t1127~0.offset_8| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1127~0.base=|v_ULTIMATE.start_main_~#t1127~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1127~0.offset=|v_ULTIMATE.start_main_~#t1127~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1127~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1127~0.offset] because there is no mapped edge [2019-11-28 18:15:36,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1128~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t1128~0.offset_10| 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1128~0.base_10|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1128~0.base_10|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1128~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1128~0.base_10|) |v_ULTIMATE.start_main_~#t1128~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1128~0.base_10| 4)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1128~0.base_10| 1) |v_#valid_29|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1128~0.base=|v_ULTIMATE.start_main_~#t1128~0.base_10|, ULTIMATE.start_main_~#t1128~0.offset=|v_ULTIMATE.start_main_~#t1128~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1128~0.base, ULTIMATE.start_main_~#t1128~0.offset] because there is no mapped edge [2019-11-28 18:15:36,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (= ~__unbuffered_p2_EBX~0_Out-243915177 ~a~0_In-243915177) (= ~y$r_buff1_thd2~0_Out-243915177 ~y$r_buff0_thd2~0_In-243915177) (not (= P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-243915177 0)) (= ~y$r_buff0_thd3~0_In-243915177 ~y$r_buff1_thd3~0_Out-243915177) (= ~y$r_buff0_thd1~0_In-243915177 ~y$r_buff1_thd1~0_Out-243915177) (= ~__unbuffered_p2_EAX~0_Out-243915177 ~z~0_Out-243915177) (= ~y$r_buff1_thd0~0_Out-243915177 ~y$r_buff0_thd0~0_In-243915177) (= 1 ~y$r_buff0_thd3~0_Out-243915177) (= 1 ~z~0_Out-243915177)) InVars {~a~0=~a~0_In-243915177, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-243915177, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-243915177, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-243915177, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-243915177, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-243915177} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out-243915177, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-243915177, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out-243915177, ~a~0=~a~0_In-243915177, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out-243915177, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out-243915177, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-243915177, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-243915177, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-243915177, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-243915177, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out-243915177, ~z~0=~z~0_Out-243915177, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out-243915177} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-11-28 18:15:36,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-11-28 18:15:36,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-393459859 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-393459859 256) 0)) (.cse2 (= |P1Thread1of1ForFork0_#t~ite3_Out-393459859| |P1Thread1of1ForFork0_#t~ite4_Out-393459859|))) (or (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In-393459859 |P1Thread1of1ForFork0_#t~ite3_Out-393459859|) .cse2) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite3_Out-393459859| ~y~0_In-393459859) .cse2))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-393459859, ~y$w_buff1~0=~y$w_buff1~0_In-393459859, ~y~0=~y~0_In-393459859, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-393459859} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-393459859, ~y$w_buff1~0=~y$w_buff1~0_In-393459859, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out-393459859|, ~y~0=~y~0_In-393459859, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out-393459859|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-393459859} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:15:36,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In645676037 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In645676037 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite11_Out645676037| ~y$w_buff0_used~0_In645676037)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork1_#t~ite11_Out645676037| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In645676037, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In645676037} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In645676037, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out645676037|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In645676037} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:15:36,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-747721074 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-747721074 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-747721074 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-747721074 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite12_Out-747721074| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite12_Out-747721074| ~y$w_buff1_used~0_In-747721074) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-747721074, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-747721074, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-747721074, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-747721074} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-747721074, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-747721074, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-747721074, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out-747721074|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-747721074} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:15:36,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-1800464580 ~y$r_buff0_thd3~0_Out-1800464580)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1800464580 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1800464580 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= 0 ~y$r_buff0_thd3~0_Out-1800464580) (not .cse0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1800464580, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1800464580} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out-1800464580|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1800464580, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1800464580} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-11-28 18:15:36,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In804802767 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In804802767 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In804802767 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In804802767 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite14_Out804802767| ~y$r_buff1_thd3~0_In804802767) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite14_Out804802767| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In804802767, ~y$w_buff0_used~0=~y$w_buff0_used~0_In804802767, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In804802767, ~y$w_buff1_used~0=~y$w_buff1_used~0_In804802767} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out804802767|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In804802767, ~y$w_buff0_used~0=~y$w_buff0_used~0_In804802767, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In804802767, ~y$w_buff1_used~0=~y$w_buff1_used~0_In804802767} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:15:36,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-11-28 18:15:36,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1224714370 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1224714370 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1224714370 |P1Thread1of1ForFork0_#t~ite5_Out1224714370|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite5_Out1224714370|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1224714370, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1224714370} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1224714370, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1224714370, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out1224714370|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:15:36,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-351190259 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-351190259 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-351190259 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-351190259 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite6_Out-351190259| ~y$w_buff1_used~0_In-351190259) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork0_#t~ite6_Out-351190259|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-351190259, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-351190259, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-351190259, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-351190259} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-351190259, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-351190259, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-351190259, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-351190259|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-351190259} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:15:36,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-960631856 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-960631856 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite7_Out-960631856|) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite7_Out-960631856| ~y$r_buff0_thd2~0_In-960631856)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-960631856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-960631856} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-960631856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-960631856, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-960631856|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:15:36,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1000466870 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1000466870 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-1000466870 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1000466870 256) 0))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite8_Out-1000466870|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$r_buff1_thd2~0_In-1000466870 |P1Thread1of1ForFork0_#t~ite8_Out-1000466870|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1000466870, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000466870, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1000466870, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000466870} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1000466870, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000466870, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1000466870, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out-1000466870|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000466870} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:15:36,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-11-28 18:15:36,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:15:36,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite18_Out1452311160| |ULTIMATE.start_main_#t~ite19_Out1452311160|)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1452311160 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1452311160 256) 0))) (or (and (not .cse0) .cse1 (= |ULTIMATE.start_main_#t~ite18_Out1452311160| ~y$w_buff1~0_In1452311160) (not .cse2)) (and .cse1 (or .cse0 .cse2) (= |ULTIMATE.start_main_#t~ite18_Out1452311160| ~y~0_In1452311160)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1452311160, ~y~0=~y~0_In1452311160, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1452311160, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1452311160} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1452311160, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1452311160|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1452311160|, ~y~0=~y~0_In1452311160, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1452311160, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1452311160} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:15:36,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-157746489 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-157746489 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-157746489|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out-157746489| ~y$w_buff0_used~0_In-157746489)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-157746489, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-157746489} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-157746489, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-157746489, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-157746489|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:15:36,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-791503713 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-791503713 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-791503713 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-791503713 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-791503713 |ULTIMATE.start_main_#t~ite21_Out-791503713|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite21_Out-791503713|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-791503713, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-791503713, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-791503713, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-791503713} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-791503713, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-791503713, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-791503713|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-791503713, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-791503713} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:15:36,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1224119550 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1224119550 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-1224119550| 0)) (and (= ~y$r_buff0_thd0~0_In-1224119550 |ULTIMATE.start_main_#t~ite22_Out-1224119550|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1224119550, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1224119550} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1224119550, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1224119550, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1224119550|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:15:36,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In395703000 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In395703000 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In395703000 256))) (.cse3 (= (mod ~y$r_buff1_thd0~0_In395703000 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite23_Out395703000| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite23_Out395703000| ~y$r_buff1_thd0~0_In395703000) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In395703000, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In395703000, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In395703000, ~y$w_buff1_used~0=~y$w_buff1_used~0_In395703000} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In395703000, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In395703000, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In395703000, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out395703000|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In395703000} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:15:36,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-143951150 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_In-143951150| |ULTIMATE.start_main_#t~ite29_Out-143951150|) (= |ULTIMATE.start_main_#t~ite30_Out-143951150| ~y$w_buff0~0_In-143951150) (not .cse0)) (and .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-143951150 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-143951150 256)) .cse1) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-143951150 256))) (= (mod ~y$w_buff0_used~0_In-143951150 256) 0))) (= |ULTIMATE.start_main_#t~ite30_Out-143951150| |ULTIMATE.start_main_#t~ite29_Out-143951150|) (= ~y$w_buff0~0_In-143951150 |ULTIMATE.start_main_#t~ite29_Out-143951150|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-143951150, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-143951150|, ~y$w_buff0~0=~y$w_buff0~0_In-143951150, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-143951150, ~weak$$choice2~0=~weak$$choice2~0_In-143951150, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-143951150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-143951150} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-143951150|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-143951150, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-143951150|, ~y$w_buff0~0=~y$w_buff0~0_In-143951150, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-143951150, ~weak$$choice2~0=~weak$$choice2~0_In-143951150, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-143951150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-143951150} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-11-28 18:15:36,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-464183791 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite35_In-464183791| |ULTIMATE.start_main_#t~ite35_Out-464183791|) (not .cse0) (= |ULTIMATE.start_main_#t~ite36_Out-464183791| ~y$w_buff0_used~0_In-464183791)) (and (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-464183791 256)))) (or (= (mod ~y$w_buff0_used~0_In-464183791 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-464183791 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-464183791 256))))) (= |ULTIMATE.start_main_#t~ite36_Out-464183791| |ULTIMATE.start_main_#t~ite35_Out-464183791|) .cse0 (= ~y$w_buff0_used~0_In-464183791 |ULTIMATE.start_main_#t~ite35_Out-464183791|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-464183791, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-464183791, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-464183791|, ~weak$$choice2~0=~weak$$choice2~0_In-464183791, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-464183791, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-464183791} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-464183791, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-464183791, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-464183791|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-464183791|, ~weak$$choice2~0=~weak$$choice2~0_In-464183791, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-464183791, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-464183791} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:15:36,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1476044572 256)))) (or (and (= ~y$w_buff1_used~0_In1476044572 |ULTIMATE.start_main_#t~ite38_Out1476044572|) .cse0 (= |ULTIMATE.start_main_#t~ite38_Out1476044572| |ULTIMATE.start_main_#t~ite39_Out1476044572|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1476044572 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In1476044572 256)) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In1476044572 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In1476044572 256)) .cse1)))) (and (= ~y$w_buff1_used~0_In1476044572 |ULTIMATE.start_main_#t~ite39_Out1476044572|) (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In1476044572| |ULTIMATE.start_main_#t~ite38_Out1476044572|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1476044572, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1476044572, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1476044572|, ~weak$$choice2~0=~weak$$choice2~0_In1476044572, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1476044572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1476044572} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1476044572, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1476044572|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1476044572, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1476044572|, ~weak$$choice2~0=~weak$$choice2~0_In1476044572, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1476044572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1476044572} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:15:36,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:15:36,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1349139665 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite45_Out1349139665| |ULTIMATE.start_main_#t~ite44_Out1349139665|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1349139665 256)))) (or (and (= 0 (mod ~y$r_buff1_thd0~0_In1349139665 256)) .cse1) (and (= 0 (mod ~y$w_buff1_used~0_In1349139665 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In1349139665 256)))) (= ~y$r_buff1_thd0~0_In1349139665 |ULTIMATE.start_main_#t~ite44_Out1349139665|)) (and (= |ULTIMATE.start_main_#t~ite45_Out1349139665| ~y$r_buff1_thd0~0_In1349139665) (not .cse0) (= |ULTIMATE.start_main_#t~ite44_In1349139665| |ULTIMATE.start_main_#t~ite44_Out1349139665|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1349139665, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1349139665, ~weak$$choice2~0=~weak$$choice2~0_In1349139665, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1349139665, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1349139665, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In1349139665|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1349139665, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1349139665, ~weak$$choice2~0=~weak$$choice2~0_In1349139665, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1349139665, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1349139665|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1349139665|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1349139665} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:15:36,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:15:36,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:15:36,272 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:15:36 BasicIcfg [2019-11-28 18:15:36,272 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:15:36,273 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:15:36,273 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:15:36,273 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:15:36,274 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:15:15" (3/4) ... [2019-11-28 18:15:36,276 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:15:36,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (= v_~y$w_buff1_used~0_304 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= |v_ULTIMATE.start_main_~#t1126~0.offset_21| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1126~0.base_27| 1) |v_#valid_54|) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1126~0.base_27| 4) |v_#length_19|) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1126~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1126~0.base_27|) |v_ULTIMATE.start_main_~#t1126~0.offset_21| 0)) |v_#memory_int_15|) (= v_~y$r_buff0_thd1~0_41 0) (= v_~a~0_57 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= (select .cse0 |v_ULTIMATE.start_main_~#t1126~0.base_27|) 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1126~0.base_27|) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ULTIMATE.start_main_~#t1127~0.base=|v_ULTIMATE.start_main_~#t1127~0.base_26|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ULTIMATE.start_main_~#t1127~0.offset=|v_ULTIMATE.start_main_~#t1127~0.offset_20|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_~#t1126~0.offset=|v_ULTIMATE.start_main_~#t1126~0.offset_21|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ULTIMATE.start_main_~#t1128~0.base=|v_ULTIMATE.start_main_~#t1128~0.base_21|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ~y~0=v_~y~0_123, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_~#t1126~0.base=|v_ULTIMATE.start_main_~#t1126~0.base_27|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ULTIMATE.start_main_~#t1128~0.offset=|v_ULTIMATE.start_main_~#t1128~0.offset_16|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1127~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1127~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1126~0.offset, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1128~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_~#t1126~0.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1128~0.offset, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:15:36,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1127~0.base_9| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1127~0.base_9| 4)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1127~0.base_9|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1127~0.base_9|) (= |v_ULTIMATE.start_main_~#t1127~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1127~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1127~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1127~0.base_9|) |v_ULTIMATE.start_main_~#t1127~0.offset_8| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1127~0.base=|v_ULTIMATE.start_main_~#t1127~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1127~0.offset=|v_ULTIMATE.start_main_~#t1127~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1127~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1127~0.offset] because there is no mapped edge [2019-11-28 18:15:36,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1128~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t1128~0.offset_10| 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1128~0.base_10|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1128~0.base_10|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1128~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1128~0.base_10|) |v_ULTIMATE.start_main_~#t1128~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1128~0.base_10| 4)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1128~0.base_10| 1) |v_#valid_29|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1128~0.base=|v_ULTIMATE.start_main_~#t1128~0.base_10|, ULTIMATE.start_main_~#t1128~0.offset=|v_ULTIMATE.start_main_~#t1128~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1128~0.base, ULTIMATE.start_main_~#t1128~0.offset] because there is no mapped edge [2019-11-28 18:15:36,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (= ~__unbuffered_p2_EBX~0_Out-243915177 ~a~0_In-243915177) (= ~y$r_buff1_thd2~0_Out-243915177 ~y$r_buff0_thd2~0_In-243915177) (not (= P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-243915177 0)) (= ~y$r_buff0_thd3~0_In-243915177 ~y$r_buff1_thd3~0_Out-243915177) (= ~y$r_buff0_thd1~0_In-243915177 ~y$r_buff1_thd1~0_Out-243915177) (= ~__unbuffered_p2_EAX~0_Out-243915177 ~z~0_Out-243915177) (= ~y$r_buff1_thd0~0_Out-243915177 ~y$r_buff0_thd0~0_In-243915177) (= 1 ~y$r_buff0_thd3~0_Out-243915177) (= 1 ~z~0_Out-243915177)) InVars {~a~0=~a~0_In-243915177, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-243915177, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-243915177, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-243915177, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-243915177, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-243915177} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out-243915177, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-243915177, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out-243915177, ~a~0=~a~0_In-243915177, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out-243915177, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out-243915177, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-243915177, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-243915177, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-243915177, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-243915177, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out-243915177, ~z~0=~z~0_Out-243915177, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out-243915177} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-11-28 18:15:36,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-11-28 18:15:36,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-393459859 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-393459859 256) 0)) (.cse2 (= |P1Thread1of1ForFork0_#t~ite3_Out-393459859| |P1Thread1of1ForFork0_#t~ite4_Out-393459859|))) (or (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In-393459859 |P1Thread1of1ForFork0_#t~ite3_Out-393459859|) .cse2) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite3_Out-393459859| ~y~0_In-393459859) .cse2))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-393459859, ~y$w_buff1~0=~y$w_buff1~0_In-393459859, ~y~0=~y~0_In-393459859, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-393459859} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-393459859, ~y$w_buff1~0=~y$w_buff1~0_In-393459859, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out-393459859|, ~y~0=~y~0_In-393459859, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out-393459859|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-393459859} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:15:36,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In645676037 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In645676037 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite11_Out645676037| ~y$w_buff0_used~0_In645676037)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork1_#t~ite11_Out645676037| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In645676037, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In645676037} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In645676037, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out645676037|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In645676037} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:15:36,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-747721074 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-747721074 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-747721074 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-747721074 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite12_Out-747721074| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite12_Out-747721074| ~y$w_buff1_used~0_In-747721074) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-747721074, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-747721074, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-747721074, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-747721074} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-747721074, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-747721074, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-747721074, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out-747721074|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-747721074} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:15:36,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-1800464580 ~y$r_buff0_thd3~0_Out-1800464580)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1800464580 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1800464580 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= 0 ~y$r_buff0_thd3~0_Out-1800464580) (not .cse0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1800464580, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1800464580} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out-1800464580|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1800464580, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1800464580} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-11-28 18:15:36,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In804802767 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In804802767 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In804802767 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In804802767 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite14_Out804802767| ~y$r_buff1_thd3~0_In804802767) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite14_Out804802767| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In804802767, ~y$w_buff0_used~0=~y$w_buff0_used~0_In804802767, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In804802767, ~y$w_buff1_used~0=~y$w_buff1_used~0_In804802767} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out804802767|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In804802767, ~y$w_buff0_used~0=~y$w_buff0_used~0_In804802767, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In804802767, ~y$w_buff1_used~0=~y$w_buff1_used~0_In804802767} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:15:36,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-11-28 18:15:36,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1224714370 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1224714370 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1224714370 |P1Thread1of1ForFork0_#t~ite5_Out1224714370|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite5_Out1224714370|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1224714370, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1224714370} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1224714370, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1224714370, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out1224714370|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:15:36,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-351190259 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-351190259 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-351190259 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-351190259 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite6_Out-351190259| ~y$w_buff1_used~0_In-351190259) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork0_#t~ite6_Out-351190259|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-351190259, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-351190259, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-351190259, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-351190259} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-351190259, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-351190259, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-351190259, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-351190259|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-351190259} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:15:36,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-960631856 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-960631856 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite7_Out-960631856|) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite7_Out-960631856| ~y$r_buff0_thd2~0_In-960631856)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-960631856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-960631856} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-960631856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-960631856, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-960631856|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:15:36,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1000466870 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1000466870 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-1000466870 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1000466870 256) 0))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite8_Out-1000466870|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$r_buff1_thd2~0_In-1000466870 |P1Thread1of1ForFork0_#t~ite8_Out-1000466870|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1000466870, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000466870, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1000466870, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000466870} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1000466870, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000466870, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1000466870, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out-1000466870|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000466870} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:15:36,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-11-28 18:15:36,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:15:36,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite18_Out1452311160| |ULTIMATE.start_main_#t~ite19_Out1452311160|)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1452311160 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1452311160 256) 0))) (or (and (not .cse0) .cse1 (= |ULTIMATE.start_main_#t~ite18_Out1452311160| ~y$w_buff1~0_In1452311160) (not .cse2)) (and .cse1 (or .cse0 .cse2) (= |ULTIMATE.start_main_#t~ite18_Out1452311160| ~y~0_In1452311160)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1452311160, ~y~0=~y~0_In1452311160, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1452311160, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1452311160} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1452311160, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1452311160|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1452311160|, ~y~0=~y~0_In1452311160, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1452311160, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1452311160} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:15:36,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-157746489 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-157746489 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-157746489|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out-157746489| ~y$w_buff0_used~0_In-157746489)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-157746489, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-157746489} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-157746489, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-157746489, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-157746489|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:15:36,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-791503713 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-791503713 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-791503713 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-791503713 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-791503713 |ULTIMATE.start_main_#t~ite21_Out-791503713|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite21_Out-791503713|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-791503713, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-791503713, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-791503713, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-791503713} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-791503713, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-791503713, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-791503713|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-791503713, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-791503713} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:15:36,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1224119550 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1224119550 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-1224119550| 0)) (and (= ~y$r_buff0_thd0~0_In-1224119550 |ULTIMATE.start_main_#t~ite22_Out-1224119550|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1224119550, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1224119550} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1224119550, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1224119550, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1224119550|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:15:36,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In395703000 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In395703000 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In395703000 256))) (.cse3 (= (mod ~y$r_buff1_thd0~0_In395703000 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite23_Out395703000| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite23_Out395703000| ~y$r_buff1_thd0~0_In395703000) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In395703000, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In395703000, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In395703000, ~y$w_buff1_used~0=~y$w_buff1_used~0_In395703000} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In395703000, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In395703000, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In395703000, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out395703000|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In395703000} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:15:36,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-143951150 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_In-143951150| |ULTIMATE.start_main_#t~ite29_Out-143951150|) (= |ULTIMATE.start_main_#t~ite30_Out-143951150| ~y$w_buff0~0_In-143951150) (not .cse0)) (and .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-143951150 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-143951150 256)) .cse1) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-143951150 256))) (= (mod ~y$w_buff0_used~0_In-143951150 256) 0))) (= |ULTIMATE.start_main_#t~ite30_Out-143951150| |ULTIMATE.start_main_#t~ite29_Out-143951150|) (= ~y$w_buff0~0_In-143951150 |ULTIMATE.start_main_#t~ite29_Out-143951150|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-143951150, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-143951150|, ~y$w_buff0~0=~y$w_buff0~0_In-143951150, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-143951150, ~weak$$choice2~0=~weak$$choice2~0_In-143951150, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-143951150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-143951150} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-143951150|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-143951150, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-143951150|, ~y$w_buff0~0=~y$w_buff0~0_In-143951150, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-143951150, ~weak$$choice2~0=~weak$$choice2~0_In-143951150, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-143951150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-143951150} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-11-28 18:15:36,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-464183791 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite35_In-464183791| |ULTIMATE.start_main_#t~ite35_Out-464183791|) (not .cse0) (= |ULTIMATE.start_main_#t~ite36_Out-464183791| ~y$w_buff0_used~0_In-464183791)) (and (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-464183791 256)))) (or (= (mod ~y$w_buff0_used~0_In-464183791 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-464183791 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-464183791 256))))) (= |ULTIMATE.start_main_#t~ite36_Out-464183791| |ULTIMATE.start_main_#t~ite35_Out-464183791|) .cse0 (= ~y$w_buff0_used~0_In-464183791 |ULTIMATE.start_main_#t~ite35_Out-464183791|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-464183791, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-464183791, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-464183791|, ~weak$$choice2~0=~weak$$choice2~0_In-464183791, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-464183791, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-464183791} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-464183791, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-464183791, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-464183791|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-464183791|, ~weak$$choice2~0=~weak$$choice2~0_In-464183791, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-464183791, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-464183791} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:15:36,296 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1476044572 256)))) (or (and (= ~y$w_buff1_used~0_In1476044572 |ULTIMATE.start_main_#t~ite38_Out1476044572|) .cse0 (= |ULTIMATE.start_main_#t~ite38_Out1476044572| |ULTIMATE.start_main_#t~ite39_Out1476044572|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1476044572 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In1476044572 256)) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In1476044572 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In1476044572 256)) .cse1)))) (and (= ~y$w_buff1_used~0_In1476044572 |ULTIMATE.start_main_#t~ite39_Out1476044572|) (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In1476044572| |ULTIMATE.start_main_#t~ite38_Out1476044572|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1476044572, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1476044572, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1476044572|, ~weak$$choice2~0=~weak$$choice2~0_In1476044572, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1476044572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1476044572} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1476044572, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1476044572|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1476044572, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1476044572|, ~weak$$choice2~0=~weak$$choice2~0_In1476044572, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1476044572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1476044572} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:15:36,296 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:15:36,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1349139665 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite45_Out1349139665| |ULTIMATE.start_main_#t~ite44_Out1349139665|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1349139665 256)))) (or (and (= 0 (mod ~y$r_buff1_thd0~0_In1349139665 256)) .cse1) (and (= 0 (mod ~y$w_buff1_used~0_In1349139665 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In1349139665 256)))) (= ~y$r_buff1_thd0~0_In1349139665 |ULTIMATE.start_main_#t~ite44_Out1349139665|)) (and (= |ULTIMATE.start_main_#t~ite45_Out1349139665| ~y$r_buff1_thd0~0_In1349139665) (not .cse0) (= |ULTIMATE.start_main_#t~ite44_In1349139665| |ULTIMATE.start_main_#t~ite44_Out1349139665|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1349139665, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1349139665, ~weak$$choice2~0=~weak$$choice2~0_In1349139665, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1349139665, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1349139665, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In1349139665|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1349139665, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1349139665, ~weak$$choice2~0=~weak$$choice2~0_In1349139665, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1349139665, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1349139665|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1349139665|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1349139665} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:15:36,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:15:36,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:15:36,410 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:15:36,411 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:15:36,412 INFO L168 Benchmark]: Toolchain (without parser) took 22887.85 ms. Allocated memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 960.4 MB in the beginning and 2.0 GB in the end (delta: -1.0 GB). Peak memory consumption was 398.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,413 INFO L168 Benchmark]: CDTParser took 0.29 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:36,419 INFO L168 Benchmark]: CACSL2BoogieTranslator took 774.57 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -98.7 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,420 INFO L168 Benchmark]: Boogie Procedure Inliner took 70.65 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,420 INFO L168 Benchmark]: Boogie Preprocessor took 37.97 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:36,420 INFO L168 Benchmark]: RCFGBuilder took 768.40 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 46.4 MB). Peak memory consumption was 46.4 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,421 INFO L168 Benchmark]: TraceAbstraction took 21093.26 ms. Allocated memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: 1.3 GB). Free memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: -996.7 MB). Peak memory consumption was 350.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:15:36,421 INFO L168 Benchmark]: Witness Printer took 138.33 ms. Allocated memory is still 2.5 GB. Free memory is still 2.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:15:36,423 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 774.57 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -98.7 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 70.65 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 37.97 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 768.40 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 46.4 MB). Peak memory consumption was 46.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 21093.26 ms. Allocated memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: 1.3 GB). Free memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: -996.7 MB). Peak memory consumption was 350.7 MB. Max. memory is 11.5 GB. * Witness Printer took 138.33 ms. Allocated memory is still 2.5 GB. Free memory is still 2.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.1s, 165 ProgramPointsBefore, 79 ProgramPointsAfterwards, 196 TransitionsBefore, 86 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 28 ChoiceCompositions, 4263 VarBasedMoverChecksPositive, 162 VarBasedMoverChecksNegative, 17 SemBasedMoverChecksPositive, 192 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 50142 CheckedPairsTotal, 117 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L812] FCALL, FORK 0 pthread_create(&t1126, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1127, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK 0 pthread_create(&t1128, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L768] 3 y$w_buff1 = y$w_buff0 [L769] 3 y$w_buff0 = 2 [L770] 3 y$w_buff1_used = y$w_buff0_used [L771] 3 y$w_buff0_used = (_Bool)1 [L789] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 x = 1 [L751] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L789] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L790] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L791] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L818] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L822] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L823] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L824] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L825] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L826] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L829] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L830] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L831] 0 y$flush_delayed = weak$$choice2 [L832] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L834] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L835] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L835] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L836] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L837] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L839] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L840] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 156 locations, 2 error locations. Result: UNSAFE, OverallTime: 20.8s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 5.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1777 SDtfs, 1932 SDslu, 3624 SDs, 0 SdLazy, 1917 SolverSat, 151 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 114 GetRequests, 19 SyntacticMatches, 7 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 137 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=31188occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.7s AutomataMinimizationTime, 15 MinimizatonAttempts, 29448 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 575 NumberOfCodeBlocks, 575 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 503 ConstructedInterpolants, 0 QuantifiedInterpolants, 77579 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...