./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix045_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix045_power.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ed8700bcaf3210d7a03fd9ae446af12b2df40daa ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:16:02,868 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:16:02,870 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:16:02,883 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:16:02,883 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:16:02,885 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:16:02,886 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:16:02,888 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:16:02,891 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:16:02,892 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:16:02,893 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:16:02,894 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:16:02,895 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:16:02,896 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:16:02,897 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:16:02,900 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:16:02,901 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:16:02,905 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:16:02,907 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:16:02,912 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:16:02,916 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:16:02,922 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:16:02,924 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:16:02,927 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:16:02,931 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:16:02,933 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:16:02,933 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:16:02,935 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:16:02,937 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:16:02,939 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:16:02,940 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:16:02,941 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:16:02,942 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:16:02,943 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:16:02,944 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:16:02,945 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:16:02,946 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:16:02,947 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:16:02,947 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:16:02,949 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:16:02,951 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:16:02,952 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:16:02,973 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:16:02,974 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:16:02,975 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:16:02,976 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:16:02,976 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:16:02,976 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:16:02,977 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:16:02,977 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:16:02,977 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:16:02,978 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:16:02,979 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:16:02,979 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:16:02,979 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:16:02,980 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:16:02,980 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:16:02,981 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:16:02,981 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:16:02,981 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:16:02,981 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:16:02,982 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:16:02,982 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:16:02,983 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:16:02,983 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:16:02,983 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:16:02,984 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:16:02,984 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:16:02,984 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:16:02,984 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:16:02,985 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:16:02,985 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ed8700bcaf3210d7a03fd9ae446af12b2df40daa [2019-11-28 18:16:03,281 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:16:03,295 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:16:03,299 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:16:03,301 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:16:03,301 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:16:03,302 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix045_power.opt.i [2019-11-28 18:16:03,365 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/19b47673d/fdff68afafbb47818cd05c9fbdd6039c/FLAG2e73486bb [2019-11-28 18:16:03,946 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:16:03,947 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix045_power.opt.i [2019-11-28 18:16:03,979 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/19b47673d/fdff68afafbb47818cd05c9fbdd6039c/FLAG2e73486bb [2019-11-28 18:16:04,224 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/19b47673d/fdff68afafbb47818cd05c9fbdd6039c [2019-11-28 18:16:04,227 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:16:04,228 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:16:04,229 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:16:04,230 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:16:04,233 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:16:04,234 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:16:04" (1/1) ... [2019-11-28 18:16:04,238 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6822e6d4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:04, skipping insertion in model container [2019-11-28 18:16:04,238 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:16:04" (1/1) ... [2019-11-28 18:16:04,246 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:16:04,301 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:16:04,790 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:16:04,815 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:16:04,907 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:16:05,007 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:16:05,009 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05 WrapperNode [2019-11-28 18:16:05,009 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:16:05,010 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:16:05,011 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:16:05,011 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:16:05,019 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,039 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,078 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:16:05,079 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:16:05,079 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:16:05,079 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:16:05,093 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,094 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,099 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,099 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,110 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,115 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,119 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... [2019-11-28 18:16:05,124 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:16:05,125 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:16:05,125 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:16:05,125 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:16:05,126 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:16:05,202 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:16:05,202 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:16:05,202 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:16:05,203 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:16:05,203 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:16:05,203 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:16:05,203 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:16:05,204 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:16:05,204 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:16:05,204 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:16:05,204 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:16:05,205 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:16:05,205 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:16:05,207 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:16:05,961 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:16:05,962 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:16:05,963 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:05 BoogieIcfgContainer [2019-11-28 18:16:05,963 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:16:05,965 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:16:05,965 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:16:05,968 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:16:05,969 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:16:04" (1/3) ... [2019-11-28 18:16:05,970 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@618881a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:16:05, skipping insertion in model container [2019-11-28 18:16:05,970 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:05" (2/3) ... [2019-11-28 18:16:05,971 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@618881a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:16:05, skipping insertion in model container [2019-11-28 18:16:05,971 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:05" (3/3) ... [2019-11-28 18:16:05,973 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_power.opt.i [2019-11-28 18:16:05,984 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:16:05,984 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:16:05,992 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:16:05,994 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:16:06,029 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,030 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,030 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,030 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,031 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,031 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,032 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,032 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,032 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,033 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,033 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,033 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,034 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,034 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,034 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,036 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,036 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,036 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,039 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,045 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,045 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,045 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,046 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,046 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:06,071 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-11-28 18:16:06,092 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:16:06,092 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:16:06,093 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:16:06,093 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:16:06,093 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:16:06,093 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:16:06,093 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:16:06,093 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:16:06,112 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-11-28 18:16:06,114 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-11-28 18:16:06,204 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-11-28 18:16:06,204 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:16:06,219 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:16:06,241 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-11-28 18:16:06,292 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-11-28 18:16:06,292 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:16:06,299 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:16:06,316 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-11-28 18:16:06,317 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:16:09,047 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 32 [2019-11-28 18:16:11,289 WARN L192 SmtUtils]: Spent 288.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-11-28 18:16:11,420 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2019-11-28 18:16:11,443 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46792 [2019-11-28 18:16:11,444 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-11-28 18:16:11,447 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-11-28 18:16:13,122 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16134 states. [2019-11-28 18:16:13,126 INFO L276 IsEmpty]: Start isEmpty. Operand 16134 states. [2019-11-28 18:16:13,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-11-28 18:16:13,135 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:13,136 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:13,137 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:13,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:13,147 INFO L82 PathProgramCache]: Analyzing trace with hash 1643101290, now seen corresponding path program 1 times [2019-11-28 18:16:13,161 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:13,162 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [994675010] [2019-11-28 18:16:13,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:13,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:13,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:13,499 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [994675010] [2019-11-28 18:16:13,499 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:13,500 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:16:13,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621642383] [2019-11-28 18:16:13,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:13,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:13,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:13,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:13,530 INFO L87 Difference]: Start difference. First operand 16134 states. Second operand 3 states. [2019-11-28 18:16:13,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:13,919 INFO L93 Difference]: Finished difference Result 16034 states and 60310 transitions. [2019-11-28 18:16:13,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:13,922 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-11-28 18:16:13,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:14,185 INFO L225 Difference]: With dead ends: 16034 [2019-11-28 18:16:14,186 INFO L226 Difference]: Without dead ends: 15698 [2019-11-28 18:16:14,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:14,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15698 states. [2019-11-28 18:16:14,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15698 to 15698. [2019-11-28 18:16:14,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15698 states. [2019-11-28 18:16:15,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15698 states to 15698 states and 59106 transitions. [2019-11-28 18:16:15,052 INFO L78 Accepts]: Start accepts. Automaton has 15698 states and 59106 transitions. Word has length 7 [2019-11-28 18:16:15,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:15,053 INFO L462 AbstractCegarLoop]: Abstraction has 15698 states and 59106 transitions. [2019-11-28 18:16:15,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:15,054 INFO L276 IsEmpty]: Start isEmpty. Operand 15698 states and 59106 transitions. [2019-11-28 18:16:15,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:16:15,059 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:15,059 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:15,060 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:15,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:15,061 INFO L82 PathProgramCache]: Analyzing trace with hash 565568960, now seen corresponding path program 1 times [2019-11-28 18:16:15,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:15,062 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871120490] [2019-11-28 18:16:15,062 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:15,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:15,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:15,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871120490] [2019-11-28 18:16:15,185 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:15,186 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:15,187 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2018476480] [2019-11-28 18:16:15,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:15,190 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:15,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:15,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:15,191 INFO L87 Difference]: Start difference. First operand 15698 states and 59106 transitions. Second operand 4 states. [2019-11-28 18:16:15,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:15,760 INFO L93 Difference]: Finished difference Result 24414 states and 88322 transitions. [2019-11-28 18:16:15,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:15,761 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:16:15,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:15,868 INFO L225 Difference]: With dead ends: 24414 [2019-11-28 18:16:15,868 INFO L226 Difference]: Without dead ends: 24400 [2019-11-28 18:16:15,869 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:16,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24400 states. [2019-11-28 18:16:16,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24400 to 22284. [2019-11-28 18:16:16,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22284 states. [2019-11-28 18:16:16,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22284 states to 22284 states and 81513 transitions. [2019-11-28 18:16:16,939 INFO L78 Accepts]: Start accepts. Automaton has 22284 states and 81513 transitions. Word has length 13 [2019-11-28 18:16:16,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:16,939 INFO L462 AbstractCegarLoop]: Abstraction has 22284 states and 81513 transitions. [2019-11-28 18:16:16,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:16,940 INFO L276 IsEmpty]: Start isEmpty. Operand 22284 states and 81513 transitions. [2019-11-28 18:16:16,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:16:16,943 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:16,943 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:16,943 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:16,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:16,944 INFO L82 PathProgramCache]: Analyzing trace with hash 1863901117, now seen corresponding path program 1 times [2019-11-28 18:16:16,944 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:16,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617310878] [2019-11-28 18:16:16,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:16,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:17,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:17,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617310878] [2019-11-28 18:16:17,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:17,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:17,032 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092744842] [2019-11-28 18:16:17,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:17,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:17,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:17,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:17,033 INFO L87 Difference]: Start difference. First operand 22284 states and 81513 transitions. Second operand 3 states. [2019-11-28 18:16:17,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:17,104 INFO L93 Difference]: Finished difference Result 12731 states and 40311 transitions. [2019-11-28 18:16:17,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:17,105 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-11-28 18:16:17,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:17,153 INFO L225 Difference]: With dead ends: 12731 [2019-11-28 18:16:17,153 INFO L226 Difference]: Without dead ends: 12731 [2019-11-28 18:16:17,154 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:17,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12731 states. [2019-11-28 18:16:17,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12731 to 12731. [2019-11-28 18:16:17,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12731 states. [2019-11-28 18:16:17,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12731 states to 12731 states and 40311 transitions. [2019-11-28 18:16:17,500 INFO L78 Accepts]: Start accepts. Automaton has 12731 states and 40311 transitions. Word has length 13 [2019-11-28 18:16:17,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:17,501 INFO L462 AbstractCegarLoop]: Abstraction has 12731 states and 40311 transitions. [2019-11-28 18:16:17,501 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:17,501 INFO L276 IsEmpty]: Start isEmpty. Operand 12731 states and 40311 transitions. [2019-11-28 18:16:17,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:16:17,502 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:17,503 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:17,503 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:17,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:17,503 INFO L82 PathProgramCache]: Analyzing trace with hash -709244429, now seen corresponding path program 1 times [2019-11-28 18:16:17,504 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:17,504 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670008251] [2019-11-28 18:16:17,504 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:17,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:17,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:17,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670008251] [2019-11-28 18:16:17,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:17,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:17,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287197202] [2019-11-28 18:16:17,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:17,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:17,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:17,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:17,604 INFO L87 Difference]: Start difference. First operand 12731 states and 40311 transitions. Second operand 4 states. [2019-11-28 18:16:17,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:17,859 INFO L93 Difference]: Finished difference Result 15391 states and 48077 transitions. [2019-11-28 18:16:17,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:17,860 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:16:17,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:17,908 INFO L225 Difference]: With dead ends: 15391 [2019-11-28 18:16:17,909 INFO L226 Difference]: Without dead ends: 15391 [2019-11-28 18:16:17,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:18,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15391 states. [2019-11-28 18:16:18,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15391 to 13966. [2019-11-28 18:16:18,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13966 states. [2019-11-28 18:16:18,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13966 states to 13966 states and 44017 transitions. [2019-11-28 18:16:18,663 INFO L78 Accepts]: Start accepts. Automaton has 13966 states and 44017 transitions. Word has length 14 [2019-11-28 18:16:18,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:18,664 INFO L462 AbstractCegarLoop]: Abstraction has 13966 states and 44017 transitions. [2019-11-28 18:16:18,664 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:18,664 INFO L276 IsEmpty]: Start isEmpty. Operand 13966 states and 44017 transitions. [2019-11-28 18:16:18,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-11-28 18:16:18,668 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:18,668 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:18,669 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:18,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:18,669 INFO L82 PathProgramCache]: Analyzing trace with hash 1059334979, now seen corresponding path program 1 times [2019-11-28 18:16:18,669 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:18,670 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487590873] [2019-11-28 18:16:18,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:18,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:18,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:18,715 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487590873] [2019-11-28 18:16:18,716 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:18,716 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:18,716 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [75385486] [2019-11-28 18:16:18,716 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:18,717 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:18,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:18,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:18,717 INFO L87 Difference]: Start difference. First operand 13966 states and 44017 transitions. Second operand 4 states. [2019-11-28 18:16:18,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:18,740 INFO L93 Difference]: Finished difference Result 1935 states and 4522 transitions. [2019-11-28 18:16:18,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:16:18,741 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-11-28 18:16:18,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:18,746 INFO L225 Difference]: With dead ends: 1935 [2019-11-28 18:16:18,747 INFO L226 Difference]: Without dead ends: 1935 [2019-11-28 18:16:18,747 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:18,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1935 states. [2019-11-28 18:16:18,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1935 to 1935. [2019-11-28 18:16:18,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1935 states. [2019-11-28 18:16:18,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1935 states to 1935 states and 4522 transitions. [2019-11-28 18:16:18,780 INFO L78 Accepts]: Start accepts. Automaton has 1935 states and 4522 transitions. Word has length 20 [2019-11-28 18:16:18,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:18,781 INFO L462 AbstractCegarLoop]: Abstraction has 1935 states and 4522 transitions. [2019-11-28 18:16:18,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:18,781 INFO L276 IsEmpty]: Start isEmpty. Operand 1935 states and 4522 transitions. [2019-11-28 18:16:18,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:16:18,783 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:18,784 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:18,784 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:18,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:18,785 INFO L82 PathProgramCache]: Analyzing trace with hash -1471989024, now seen corresponding path program 1 times [2019-11-28 18:16:18,785 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:18,785 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988377288] [2019-11-28 18:16:18,785 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:18,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:18,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:18,926 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988377288] [2019-11-28 18:16:18,926 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:18,926 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:18,926 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424930964] [2019-11-28 18:16:18,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:18,928 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:18,929 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:18,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:18,929 INFO L87 Difference]: Start difference. First operand 1935 states and 4522 transitions. Second operand 5 states. [2019-11-28 18:16:19,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:19,225 INFO L93 Difference]: Finished difference Result 2347 states and 5328 transitions. [2019-11-28 18:16:19,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:16:19,226 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-11-28 18:16:19,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:19,230 INFO L225 Difference]: With dead ends: 2347 [2019-11-28 18:16:19,231 INFO L226 Difference]: Without dead ends: 2347 [2019-11-28 18:16:19,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:16:19,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2347 states. [2019-11-28 18:16:19,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2347 to 2152. [2019-11-28 18:16:19,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2152 states. [2019-11-28 18:16:19,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2152 states to 2152 states and 4956 transitions. [2019-11-28 18:16:19,265 INFO L78 Accepts]: Start accepts. Automaton has 2152 states and 4956 transitions. Word has length 26 [2019-11-28 18:16:19,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:19,266 INFO L462 AbstractCegarLoop]: Abstraction has 2152 states and 4956 transitions. [2019-11-28 18:16:19,266 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:19,266 INFO L276 IsEmpty]: Start isEmpty. Operand 2152 states and 4956 transitions. [2019-11-28 18:16:19,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-11-28 18:16:19,270 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:19,271 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:19,271 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:19,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:19,271 INFO L82 PathProgramCache]: Analyzing trace with hash -1098055765, now seen corresponding path program 1 times [2019-11-28 18:16:19,272 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:19,272 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647448074] [2019-11-28 18:16:19,272 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:19,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:19,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:19,352 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1647448074] [2019-11-28 18:16:19,353 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:19,353 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:19,353 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [881782490] [2019-11-28 18:16:19,353 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:19,354 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:19,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:19,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:19,354 INFO L87 Difference]: Start difference. First operand 2152 states and 4956 transitions. Second operand 5 states. [2019-11-28 18:16:19,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:19,386 INFO L93 Difference]: Finished difference Result 670 states and 1551 transitions. [2019-11-28 18:16:19,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:19,387 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-11-28 18:16:19,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:19,390 INFO L225 Difference]: With dead ends: 670 [2019-11-28 18:16:19,391 INFO L226 Difference]: Without dead ends: 670 [2019-11-28 18:16:19,391 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:19,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 670 states. [2019-11-28 18:16:19,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 670 to 614. [2019-11-28 18:16:19,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 614 states. [2019-11-28 18:16:19,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 614 states to 614 states and 1419 transitions. [2019-11-28 18:16:19,408 INFO L78 Accepts]: Start accepts. Automaton has 614 states and 1419 transitions. Word has length 40 [2019-11-28 18:16:19,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:19,408 INFO L462 AbstractCegarLoop]: Abstraction has 614 states and 1419 transitions. [2019-11-28 18:16:19,408 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:19,409 INFO L276 IsEmpty]: Start isEmpty. Operand 614 states and 1419 transitions. [2019-11-28 18:16:19,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-28 18:16:19,417 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:19,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:19,418 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:19,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:19,421 INFO L82 PathProgramCache]: Analyzing trace with hash 827870922, now seen corresponding path program 1 times [2019-11-28 18:16:19,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:19,422 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [708548846] [2019-11-28 18:16:19,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:19,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:19,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:19,530 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [708548846] [2019-11-28 18:16:19,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:19,530 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:19,530 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1453716066] [2019-11-28 18:16:19,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:19,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:19,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:19,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:19,532 INFO L87 Difference]: Start difference. First operand 614 states and 1419 transitions. Second operand 3 states. [2019-11-28 18:16:19,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:19,575 INFO L93 Difference]: Finished difference Result 629 states and 1439 transitions. [2019-11-28 18:16:19,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:19,575 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-11-28 18:16:19,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:19,577 INFO L225 Difference]: With dead ends: 629 [2019-11-28 18:16:19,577 INFO L226 Difference]: Without dead ends: 629 [2019-11-28 18:16:19,580 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:19,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 629 states. [2019-11-28 18:16:19,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 629 to 625. [2019-11-28 18:16:19,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 625 states. [2019-11-28 18:16:19,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 625 states to 625 states and 1435 transitions. [2019-11-28 18:16:19,590 INFO L78 Accepts]: Start accepts. Automaton has 625 states and 1435 transitions. Word has length 55 [2019-11-28 18:16:19,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:19,592 INFO L462 AbstractCegarLoop]: Abstraction has 625 states and 1435 transitions. [2019-11-28 18:16:19,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:19,592 INFO L276 IsEmpty]: Start isEmpty. Operand 625 states and 1435 transitions. [2019-11-28 18:16:19,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-28 18:16:19,594 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:19,595 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:19,595 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:19,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:19,595 INFO L82 PathProgramCache]: Analyzing trace with hash -345025503, now seen corresponding path program 1 times [2019-11-28 18:16:19,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:19,600 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091914404] [2019-11-28 18:16:19,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:19,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:19,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:19,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091914404] [2019-11-28 18:16:19,687 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:19,687 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:19,688 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1543693792] [2019-11-28 18:16:19,688 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:19,689 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:19,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:19,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:19,689 INFO L87 Difference]: Start difference. First operand 625 states and 1435 transitions. Second operand 3 states. [2019-11-28 18:16:19,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:19,730 INFO L93 Difference]: Finished difference Result 629 states and 1432 transitions. [2019-11-28 18:16:19,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:19,731 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-11-28 18:16:19,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:19,732 INFO L225 Difference]: With dead ends: 629 [2019-11-28 18:16:19,732 INFO L226 Difference]: Without dead ends: 629 [2019-11-28 18:16:19,733 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:19,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 629 states. [2019-11-28 18:16:19,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 629 to 621. [2019-11-28 18:16:19,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 621 states. [2019-11-28 18:16:19,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 621 states to 621 states and 1424 transitions. [2019-11-28 18:16:19,744 INFO L78 Accepts]: Start accepts. Automaton has 621 states and 1424 transitions. Word has length 55 [2019-11-28 18:16:19,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:19,746 INFO L462 AbstractCegarLoop]: Abstraction has 621 states and 1424 transitions. [2019-11-28 18:16:19,746 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:19,746 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 1424 transitions. [2019-11-28 18:16:19,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-28 18:16:19,750 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:19,750 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:19,750 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:19,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:19,751 INFO L82 PathProgramCache]: Analyzing trace with hash -349465323, now seen corresponding path program 1 times [2019-11-28 18:16:19,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:19,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424440504] [2019-11-28 18:16:19,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:19,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:19,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:19,871 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424440504] [2019-11-28 18:16:19,871 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:19,871 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:16:19,871 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1322050737] [2019-11-28 18:16:19,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:19,874 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:19,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:19,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:19,875 INFO L87 Difference]: Start difference. First operand 621 states and 1424 transitions. Second operand 5 states. [2019-11-28 18:16:20,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:20,093 INFO L93 Difference]: Finished difference Result 910 states and 2096 transitions. [2019-11-28 18:16:20,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:16:20,094 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-11-28 18:16:20,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:20,097 INFO L225 Difference]: With dead ends: 910 [2019-11-28 18:16:20,097 INFO L226 Difference]: Without dead ends: 910 [2019-11-28 18:16:20,097 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:16:20,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 910 states. [2019-11-28 18:16:20,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 910 to 820. [2019-11-28 18:16:20,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 820 states. [2019-11-28 18:16:20,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 820 states to 820 states and 1891 transitions. [2019-11-28 18:16:20,117 INFO L78 Accepts]: Start accepts. Automaton has 820 states and 1891 transitions. Word has length 55 [2019-11-28 18:16:20,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:20,117 INFO L462 AbstractCegarLoop]: Abstraction has 820 states and 1891 transitions. [2019-11-28 18:16:20,117 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:20,118 INFO L276 IsEmpty]: Start isEmpty. Operand 820 states and 1891 transitions. [2019-11-28 18:16:20,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-28 18:16:20,121 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:20,121 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:20,122 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:20,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:20,122 INFO L82 PathProgramCache]: Analyzing trace with hash -1055549477, now seen corresponding path program 2 times [2019-11-28 18:16:20,122 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:20,122 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550110095] [2019-11-28 18:16:20,123 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:20,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:20,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:20,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550110095] [2019-11-28 18:16:20,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:20,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:20,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1017113769] [2019-11-28 18:16:20,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:20,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:20,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:20,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:20,222 INFO L87 Difference]: Start difference. First operand 820 states and 1891 transitions. Second operand 3 states. [2019-11-28 18:16:20,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:20,267 INFO L93 Difference]: Finished difference Result 820 states and 1890 transitions. [2019-11-28 18:16:20,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:20,267 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-11-28 18:16:20,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:20,270 INFO L225 Difference]: With dead ends: 820 [2019-11-28 18:16:20,270 INFO L226 Difference]: Without dead ends: 820 [2019-11-28 18:16:20,270 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:20,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 820 states. [2019-11-28 18:16:20,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 820 to 657. [2019-11-28 18:16:20,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 657 states. [2019-11-28 18:16:20,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 657 states to 657 states and 1515 transitions. [2019-11-28 18:16:20,282 INFO L78 Accepts]: Start accepts. Automaton has 657 states and 1515 transitions. Word has length 55 [2019-11-28 18:16:20,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:20,283 INFO L462 AbstractCegarLoop]: Abstraction has 657 states and 1515 transitions. [2019-11-28 18:16:20,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:20,283 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 1515 transitions. [2019-11-28 18:16:20,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:16:20,285 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:20,286 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:20,286 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:20,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:20,286 INFO L82 PathProgramCache]: Analyzing trace with hash -916645642, now seen corresponding path program 1 times [2019-11-28 18:16:20,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:20,287 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95870505] [2019-11-28 18:16:20,287 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:20,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:20,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:20,475 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95870505] [2019-11-28 18:16:20,475 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:20,476 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:16:20,476 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451226531] [2019-11-28 18:16:20,476 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:16:20,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:20,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:16:20,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:16:20,477 INFO L87 Difference]: Start difference. First operand 657 states and 1515 transitions. Second operand 7 states. [2019-11-28 18:16:20,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:20,620 INFO L93 Difference]: Finished difference Result 1261 states and 2692 transitions. [2019-11-28 18:16:20,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:16:20,621 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 56 [2019-11-28 18:16:20,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:20,622 INFO L225 Difference]: With dead ends: 1261 [2019-11-28 18:16:20,623 INFO L226 Difference]: Without dead ends: 858 [2019-11-28 18:16:20,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:16:20,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 858 states. [2019-11-28 18:16:20,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 858 to 594. [2019-11-28 18:16:20,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 594 states. [2019-11-28 18:16:20,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 594 states to 594 states and 1332 transitions. [2019-11-28 18:16:20,634 INFO L78 Accepts]: Start accepts. Automaton has 594 states and 1332 transitions. Word has length 56 [2019-11-28 18:16:20,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:20,634 INFO L462 AbstractCegarLoop]: Abstraction has 594 states and 1332 transitions. [2019-11-28 18:16:20,634 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:16:20,634 INFO L276 IsEmpty]: Start isEmpty. Operand 594 states and 1332 transitions. [2019-11-28 18:16:20,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:16:20,636 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:20,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:20,636 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:20,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:20,637 INFO L82 PathProgramCache]: Analyzing trace with hash -310787320, now seen corresponding path program 2 times [2019-11-28 18:16:20,637 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:20,637 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317625882] [2019-11-28 18:16:20,637 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:20,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:20,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:20,792 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317625882] [2019-11-28 18:16:20,792 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:20,792 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:16:20,792 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1125643741] [2019-11-28 18:16:20,793 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:16:20,793 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:20,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:16:20,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:16:20,798 INFO L87 Difference]: Start difference. First operand 594 states and 1332 transitions. Second operand 6 states. [2019-11-28 18:16:20,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:20,883 INFO L93 Difference]: Finished difference Result 885 states and 1950 transitions. [2019-11-28 18:16:20,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:16:20,884 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-11-28 18:16:20,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:20,885 INFO L225 Difference]: With dead ends: 885 [2019-11-28 18:16:20,885 INFO L226 Difference]: Without dead ends: 287 [2019-11-28 18:16:20,886 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:16:20,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2019-11-28 18:16:20,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 247. [2019-11-28 18:16:20,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2019-11-28 18:16:20,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 448 transitions. [2019-11-28 18:16:20,892 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 448 transitions. Word has length 56 [2019-11-28 18:16:20,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:20,894 INFO L462 AbstractCegarLoop]: Abstraction has 247 states and 448 transitions. [2019-11-28 18:16:20,894 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:16:20,894 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 448 transitions. [2019-11-28 18:16:20,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:16:20,895 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:20,896 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:20,896 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:20,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:20,896 INFO L82 PathProgramCache]: Analyzing trace with hash -1766354674, now seen corresponding path program 3 times [2019-11-28 18:16:20,897 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:20,897 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [178547715] [2019-11-28 18:16:20,897 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:20,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:21,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:21,044 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [178547715] [2019-11-28 18:16:21,044 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:21,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:21,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706614305] [2019-11-28 18:16:21,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:21,045 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:21,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:21,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:21,046 INFO L87 Difference]: Start difference. First operand 247 states and 448 transitions. Second operand 3 states. [2019-11-28 18:16:21,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:21,062 INFO L93 Difference]: Finished difference Result 236 states and 412 transitions. [2019-11-28 18:16:21,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:21,063 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-11-28 18:16:21,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:21,064 INFO L225 Difference]: With dead ends: 236 [2019-11-28 18:16:21,064 INFO L226 Difference]: Without dead ends: 236 [2019-11-28 18:16:21,065 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:21,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2019-11-28 18:16:21,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 209. [2019-11-28 18:16:21,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-11-28 18:16:21,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 361 transitions. [2019-11-28 18:16:21,071 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 361 transitions. Word has length 56 [2019-11-28 18:16:21,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:21,072 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 361 transitions. [2019-11-28 18:16:21,072 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:21,072 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 361 transitions. [2019-11-28 18:16:21,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:21,074 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:21,074 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:21,074 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:21,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:21,075 INFO L82 PathProgramCache]: Analyzing trace with hash -876750572, now seen corresponding path program 1 times [2019-11-28 18:16:21,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:21,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1579579757] [2019-11-28 18:16:21,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:21,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:21,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:21,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1579579757] [2019-11-28 18:16:21,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:21,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-11-28 18:16:21,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572889195] [2019-11-28 18:16:21,725 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-11-28 18:16:21,725 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:21,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-11-28 18:16:21,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2019-11-28 18:16:21,726 INFO L87 Difference]: Start difference. First operand 209 states and 361 transitions. Second operand 20 states. [2019-11-28 18:16:23,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:23,756 INFO L93 Difference]: Finished difference Result 501 states and 859 transitions. [2019-11-28 18:16:23,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-11-28 18:16:23,756 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 57 [2019-11-28 18:16:23,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:23,758 INFO L225 Difference]: With dead ends: 501 [2019-11-28 18:16:23,758 INFO L226 Difference]: Without dead ends: 468 [2019-11-28 18:16:23,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 228 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=202, Invalid=1204, Unknown=0, NotChecked=0, Total=1406 [2019-11-28 18:16:23,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 468 states. [2019-11-28 18:16:23,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 468 to 315. [2019-11-28 18:16:23,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 18:16:23,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 542 transitions. [2019-11-28 18:16:23,764 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 542 transitions. Word has length 57 [2019-11-28 18:16:23,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:23,765 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 542 transitions. [2019-11-28 18:16:23,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-11-28 18:16:23,765 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 542 transitions. [2019-11-28 18:16:23,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:23,766 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:23,766 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:23,766 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:23,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:23,766 INFO L82 PathProgramCache]: Analyzing trace with hash -1024009672, now seen corresponding path program 2 times [2019-11-28 18:16:23,767 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:23,767 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866157816] [2019-11-28 18:16:23,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:23,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:24,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:24,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866157816] [2019-11-28 18:16:24,008 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:24,008 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:16:24,008 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751791350] [2019-11-28 18:16:24,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:16:24,009 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:24,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:16:24,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:16:24,009 INFO L87 Difference]: Start difference. First operand 315 states and 542 transitions. Second operand 13 states. [2019-11-28 18:16:24,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:24,328 INFO L93 Difference]: Finished difference Result 482 states and 815 transitions. [2019-11-28 18:16:24,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-28 18:16:24,329 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-11-28 18:16:24,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:24,330 INFO L225 Difference]: With dead ends: 482 [2019-11-28 18:16:24,331 INFO L226 Difference]: Without dead ends: 449 [2019-11-28 18:16:24,331 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=300, Unknown=0, NotChecked=0, Total=380 [2019-11-28 18:16:24,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 449 states. [2019-11-28 18:16:24,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 449 to 317. [2019-11-28 18:16:24,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-11-28 18:16:24,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 546 transitions. [2019-11-28 18:16:24,337 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 546 transitions. Word has length 57 [2019-11-28 18:16:24,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:24,337 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 546 transitions. [2019-11-28 18:16:24,337 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:16:24,337 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 546 transitions. [2019-11-28 18:16:24,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:24,338 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:24,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:24,339 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:24,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:24,339 INFO L82 PathProgramCache]: Analyzing trace with hash -1963724718, now seen corresponding path program 3 times [2019-11-28 18:16:24,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:24,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263934188] [2019-11-28 18:16:24,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:24,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:16:24,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:16:24,452 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:16:24,453 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:16:24,457 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1196~0.base_25| 1)) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1196~0.base_25|) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1196~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1196~0.base_25|) |v_ULTIMATE.start_main_~#t1196~0.offset_19| 0)) |v_#memory_int_21|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1196~0.base_25| 4) |v_#length_23|) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_45 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1196~0.base_25|) 0) (= 0 |v_ULTIMATE.start_main_~#t1196~0.offset_19|) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ULTIMATE.start_main_~#t1197~0.base=|v_ULTIMATE.start_main_~#t1197~0.base_25|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_~#t1198~0.base=|v_ULTIMATE.start_main_~#t1198~0.base_25|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_~#t1196~0.offset=|v_ULTIMATE.start_main_~#t1196~0.offset_19|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1198~0.offset=|v_ULTIMATE.start_main_~#t1198~0.offset_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1197~0.offset=|v_ULTIMATE.start_main_~#t1197~0.offset_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, ULTIMATE.start_main_~#t1196~0.base=|v_ULTIMATE.start_main_~#t1196~0.base_25|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1197~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_~#t1198~0.base, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1196~0.offset, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1198~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1197~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, ULTIMATE.start_main_~#t1196~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:24,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1197~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1197~0.offset_11| 0) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1197~0.base_13| 1)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1197~0.base_13| 4) |v_#length_17|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1197~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1197~0.base_13|) |v_ULTIMATE.start_main_~#t1197~0.offset_11| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1197~0.base_13|) (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1197~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1197~0.offset=|v_ULTIMATE.start_main_~#t1197~0.offset_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1197~0.base=|v_ULTIMATE.start_main_~#t1197~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1197~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1197~0.base] because there is no mapped edge [2019-11-28 18:16:24,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1198~0.base_13| 1) |v_#valid_40|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1198~0.base_13|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1198~0.base_13|)) (not (= |v_ULTIMATE.start_main_~#t1198~0.base_13| 0)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1198~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1198~0.base_13|) |v_ULTIMATE.start_main_~#t1198~0.offset_11| 2))) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1198~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t1198~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1198~0.offset=|v_ULTIMATE.start_main_~#t1198~0.offset_11|, ULTIMATE.start_main_~#t1198~0.base=|v_ULTIMATE.start_main_~#t1198~0.base_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1198~0.offset, ULTIMATE.start_main_~#t1198~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-11-28 18:16:24,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:24,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:16:24,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1018801853 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-1018801853 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-1018801853| 0)) (and (= ~y$w_buff0_used~0_In-1018801853 |P2Thread1of1ForFork0_#t~ite11_Out-1018801853|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1018801853, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1018801853} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1018801853, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1018801853|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1018801853} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:16:24,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd3~0_In1551990955 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1551990955 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1551990955 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1551990955 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out1551990955| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite12_Out1551990955| ~y$w_buff1_used~0_In1551990955)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1551990955, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1551990955, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1551990955, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1551990955} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1551990955, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1551990955, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out1551990955|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1551990955, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1551990955} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:16:24,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-840185261 ~y$r_buff0_thd3~0_Out-840185261)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-840185261 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-840185261 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= 0 ~y$r_buff0_thd3~0_Out-840185261) (not .cse2) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-840185261, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-840185261} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-840185261, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-840185261, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-840185261|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:16:24,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-1217185912 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1217185912 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1217185912 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1217185912 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite14_Out-1217185912|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$r_buff1_thd3~0_In-1217185912 |P2Thread1of1ForFork0_#t~ite14_Out-1217185912|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1217185912, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1217185912, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1217185912, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1217185912} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1217185912|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1217185912, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1217185912, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1217185912, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1217185912} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:16:24,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:16:24,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-507162377 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-507162377 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out-507162377| ~y$w_buff1~0_In-507162377) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out-507162377| ~y~0_In-507162377) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-507162377, ~y$w_buff1~0=~y$w_buff1~0_In-507162377, ~y~0=~y~0_In-507162377, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507162377} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-507162377, ~y$w_buff1~0=~y$w_buff1~0_In-507162377, ~y~0=~y~0_In-507162377, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-507162377|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507162377} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:24,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:24,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1837836293 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1837836293 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite5_Out1837836293|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In1837836293 |P1Thread1of1ForFork2_#t~ite5_Out1837836293|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1837836293, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1837836293} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1837836293, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1837836293, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1837836293|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:16:24,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In189627346 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In189627346 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In189627346 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In189627346 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite6_Out189627346|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite6_Out189627346| ~y$w_buff1_used~0_In189627346) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In189627346, ~y$w_buff0_used~0=~y$w_buff0_used~0_In189627346, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In189627346, ~y$w_buff1_used~0=~y$w_buff1_used~0_In189627346} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In189627346, ~y$w_buff0_used~0=~y$w_buff0_used~0_In189627346, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In189627346, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out189627346|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In189627346} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:16:24,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1556452561 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1556452561 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out1556452561| 0) (not .cse1)) (and (= ~y$r_buff0_thd2~0_In1556452561 |P1Thread1of1ForFork2_#t~ite7_Out1556452561|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1556452561, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1556452561} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1556452561, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1556452561, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out1556452561|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:16:24,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1873800698 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-1873800698 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In-1873800698 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1873800698 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite8_Out-1873800698| ~y$r_buff1_thd2~0_In-1873800698) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite8_Out-1873800698| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1873800698, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1873800698, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1873800698, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1873800698} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1873800698, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1873800698, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-1873800698|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1873800698, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1873800698} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:16:24,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:16:24,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:16:24,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-1069606119 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-1069606119 256) 0)) (.cse1 (= |ULTIMATE.start_main_#t~ite19_Out-1069606119| |ULTIMATE.start_main_#t~ite18_Out-1069606119|))) (or (and (not .cse0) .cse1 (not .cse2) (= |ULTIMATE.start_main_#t~ite18_Out-1069606119| ~y$w_buff1~0_In-1069606119)) (and (= ~y~0_In-1069606119 |ULTIMATE.start_main_#t~ite18_Out-1069606119|) (or .cse2 .cse0) .cse1))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1069606119, ~y~0=~y~0_In-1069606119, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1069606119, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1069606119} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1069606119, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1069606119|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1069606119|, ~y~0=~y~0_In-1069606119, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1069606119, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1069606119} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:16:24,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In2066363237 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In2066363237 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite20_Out2066363237| 0)) (and (= |ULTIMATE.start_main_#t~ite20_Out2066363237| ~y$w_buff0_used~0_In2066363237) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2066363237, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2066363237} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2066363237, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2066363237, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out2066363237|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:16:24,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In222132402 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In222132402 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In222132402 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In222132402 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out222132402| ~y$w_buff1_used~0_In222132402) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite21_Out222132402| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In222132402, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In222132402, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In222132402, ~y$w_buff1_used~0=~y$w_buff1_used~0_In222132402} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In222132402, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In222132402, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out222132402|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In222132402, ~y$w_buff1_used~0=~y$w_buff1_used~0_In222132402} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:16:24,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1394856699 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1394856699 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out-1394856699|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$r_buff0_thd0~0_In-1394856699 |ULTIMATE.start_main_#t~ite22_Out-1394856699|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1394856699, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1394856699} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1394856699, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1394856699, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1394856699|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:16:24,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd0~0_In776271461 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In776271461 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In776271461 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In776271461 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out776271461|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite23_Out776271461| ~y$r_buff1_thd0~0_In776271461)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In776271461, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In776271461, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In776271461, ~y$w_buff1_used~0=~y$w_buff1_used~0_In776271461} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In776271461, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In776271461, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In776271461, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out776271461|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In776271461} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:16:24,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In35092490 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite32_In35092490| |ULTIMATE.start_main_#t~ite32_Out35092490|) (not .cse0) (= |ULTIMATE.start_main_#t~ite33_Out35092490| ~y$w_buff1~0_In35092490)) (and .cse0 (= |ULTIMATE.start_main_#t~ite33_Out35092490| |ULTIMATE.start_main_#t~ite32_Out35092490|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In35092490 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd0~0_In35092490 256) 0)) (= (mod ~y$w_buff0_used~0_In35092490 256) 0) (and (= (mod ~y$w_buff1_used~0_In35092490 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite32_Out35092490| ~y$w_buff1~0_In35092490)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In35092490, ~y$w_buff0_used~0=~y$w_buff0_used~0_In35092490, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In35092490, ~weak$$choice2~0=~weak$$choice2~0_In35092490, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In35092490, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In35092490|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In35092490} OutVars{~y$w_buff1~0=~y$w_buff1~0_In35092490, ~y$w_buff0_used~0=~y$w_buff0_used~0_In35092490, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In35092490, ~weak$$choice2~0=~weak$$choice2~0_In35092490, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out35092490|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In35092490, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out35092490|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In35092490} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:16:24,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-866771474 256) 0))) (or (and (= ~y$w_buff0_used~0_In-866771474 |ULTIMATE.start_main_#t~ite36_Out-866771474|) (not .cse0) (= |ULTIMATE.start_main_#t~ite35_In-866771474| |ULTIMATE.start_main_#t~ite35_Out-866771474|)) (and (= ~y$w_buff0_used~0_In-866771474 |ULTIMATE.start_main_#t~ite35_Out-866771474|) .cse0 (= |ULTIMATE.start_main_#t~ite35_Out-866771474| |ULTIMATE.start_main_#t~ite36_Out-866771474|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-866771474 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-866771474 256))) (= 0 (mod ~y$w_buff0_used~0_In-866771474 256)) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-866771474 256)))))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-866771474, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-866771474, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-866771474|, ~weak$$choice2~0=~weak$$choice2~0_In-866771474, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-866771474, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-866771474} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-866771474, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-866771474, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-866771474|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-866771474|, ~weak$$choice2~0=~weak$$choice2~0_In-866771474, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-866771474, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-866771474} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:16:24,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2023491392 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_Out-2023491392| ~y$w_buff1_used~0_In-2023491392) (= |ULTIMATE.start_main_#t~ite38_In-2023491392| |ULTIMATE.start_main_#t~ite38_Out-2023491392|) (not .cse0)) (and (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-2023491392 256)))) (or (and (= (mod ~y$w_buff1_used~0_In-2023491392 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-2023491392 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2023491392 256))))) (= |ULTIMATE.start_main_#t~ite38_Out-2023491392| ~y$w_buff1_used~0_In-2023491392) (= |ULTIMATE.start_main_#t~ite39_Out-2023491392| |ULTIMATE.start_main_#t~ite38_Out-2023491392|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2023491392, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2023491392, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-2023491392|, ~weak$$choice2~0=~weak$$choice2~0_In-2023491392, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2023491392, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2023491392} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2023491392, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-2023491392|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2023491392, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2023491392|, ~weak$$choice2~0=~weak$$choice2~0_In-2023491392, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2023491392, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2023491392} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:16:24,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:16:24,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:16:24,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:16:24,553 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:16:24 BasicIcfg [2019-11-28 18:16:24,553 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:16:24,554 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:16:24,554 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:16:24,554 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:16:24,554 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:05" (3/4) ... [2019-11-28 18:16:24,560 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:16:24,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1196~0.base_25| 1)) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1196~0.base_25|) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1196~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1196~0.base_25|) |v_ULTIMATE.start_main_~#t1196~0.offset_19| 0)) |v_#memory_int_21|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1196~0.base_25| 4) |v_#length_23|) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_45 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1196~0.base_25|) 0) (= 0 |v_ULTIMATE.start_main_~#t1196~0.offset_19|) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ULTIMATE.start_main_~#t1197~0.base=|v_ULTIMATE.start_main_~#t1197~0.base_25|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_~#t1198~0.base=|v_ULTIMATE.start_main_~#t1198~0.base_25|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_~#t1196~0.offset=|v_ULTIMATE.start_main_~#t1196~0.offset_19|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1198~0.offset=|v_ULTIMATE.start_main_~#t1198~0.offset_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1197~0.offset=|v_ULTIMATE.start_main_~#t1197~0.offset_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, ULTIMATE.start_main_~#t1196~0.base=|v_ULTIMATE.start_main_~#t1196~0.base_25|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1197~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_~#t1198~0.base, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1196~0.offset, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1198~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1197~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, ULTIMATE.start_main_~#t1196~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:24,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1197~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1197~0.offset_11| 0) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1197~0.base_13| 1)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1197~0.base_13| 4) |v_#length_17|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1197~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1197~0.base_13|) |v_ULTIMATE.start_main_~#t1197~0.offset_11| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1197~0.base_13|) (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1197~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1197~0.offset=|v_ULTIMATE.start_main_~#t1197~0.offset_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1197~0.base=|v_ULTIMATE.start_main_~#t1197~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1197~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1197~0.base] because there is no mapped edge [2019-11-28 18:16:24,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1198~0.base_13| 1) |v_#valid_40|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1198~0.base_13|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1198~0.base_13|)) (not (= |v_ULTIMATE.start_main_~#t1198~0.base_13| 0)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1198~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1198~0.base_13|) |v_ULTIMATE.start_main_~#t1198~0.offset_11| 2))) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1198~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t1198~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1198~0.offset=|v_ULTIMATE.start_main_~#t1198~0.offset_11|, ULTIMATE.start_main_~#t1198~0.base=|v_ULTIMATE.start_main_~#t1198~0.base_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1198~0.offset, ULTIMATE.start_main_~#t1198~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-11-28 18:16:24,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:24,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:16:24,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1018801853 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-1018801853 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-1018801853| 0)) (and (= ~y$w_buff0_used~0_In-1018801853 |P2Thread1of1ForFork0_#t~ite11_Out-1018801853|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1018801853, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1018801853} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1018801853, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1018801853|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1018801853} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:16:24,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd3~0_In1551990955 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1551990955 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1551990955 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1551990955 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out1551990955| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite12_Out1551990955| ~y$w_buff1_used~0_In1551990955)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1551990955, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1551990955, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1551990955, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1551990955} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1551990955, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1551990955, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out1551990955|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1551990955, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1551990955} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:16:24,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-840185261 ~y$r_buff0_thd3~0_Out-840185261)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-840185261 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-840185261 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= 0 ~y$r_buff0_thd3~0_Out-840185261) (not .cse2) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-840185261, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-840185261} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-840185261, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-840185261, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-840185261|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:16:24,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-1217185912 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1217185912 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1217185912 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1217185912 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite14_Out-1217185912|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$r_buff1_thd3~0_In-1217185912 |P2Thread1of1ForFork0_#t~ite14_Out-1217185912|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1217185912, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1217185912, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1217185912, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1217185912} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1217185912|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1217185912, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1217185912, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1217185912, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1217185912} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:16:24,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:16:24,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-507162377 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-507162377 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out-507162377| ~y$w_buff1~0_In-507162377) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out-507162377| ~y~0_In-507162377) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-507162377, ~y$w_buff1~0=~y$w_buff1~0_In-507162377, ~y~0=~y~0_In-507162377, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507162377} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-507162377, ~y$w_buff1~0=~y$w_buff1~0_In-507162377, ~y~0=~y~0_In-507162377, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-507162377|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507162377} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:24,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:24,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1837836293 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1837836293 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite5_Out1837836293|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In1837836293 |P1Thread1of1ForFork2_#t~ite5_Out1837836293|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1837836293, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1837836293} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1837836293, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1837836293, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1837836293|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:16:24,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In189627346 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In189627346 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In189627346 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In189627346 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite6_Out189627346|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite6_Out189627346| ~y$w_buff1_used~0_In189627346) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In189627346, ~y$w_buff0_used~0=~y$w_buff0_used~0_In189627346, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In189627346, ~y$w_buff1_used~0=~y$w_buff1_used~0_In189627346} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In189627346, ~y$w_buff0_used~0=~y$w_buff0_used~0_In189627346, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In189627346, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out189627346|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In189627346} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:16:24,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1556452561 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1556452561 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out1556452561| 0) (not .cse1)) (and (= ~y$r_buff0_thd2~0_In1556452561 |P1Thread1of1ForFork2_#t~ite7_Out1556452561|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1556452561, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1556452561} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1556452561, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1556452561, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out1556452561|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:16:24,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1873800698 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-1873800698 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In-1873800698 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1873800698 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite8_Out-1873800698| ~y$r_buff1_thd2~0_In-1873800698) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite8_Out-1873800698| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1873800698, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1873800698, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1873800698, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1873800698} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1873800698, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1873800698, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-1873800698|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1873800698, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1873800698} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:16:24,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:16:24,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:16:24,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-1069606119 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-1069606119 256) 0)) (.cse1 (= |ULTIMATE.start_main_#t~ite19_Out-1069606119| |ULTIMATE.start_main_#t~ite18_Out-1069606119|))) (or (and (not .cse0) .cse1 (not .cse2) (= |ULTIMATE.start_main_#t~ite18_Out-1069606119| ~y$w_buff1~0_In-1069606119)) (and (= ~y~0_In-1069606119 |ULTIMATE.start_main_#t~ite18_Out-1069606119|) (or .cse2 .cse0) .cse1))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1069606119, ~y~0=~y~0_In-1069606119, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1069606119, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1069606119} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1069606119, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1069606119|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1069606119|, ~y~0=~y~0_In-1069606119, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1069606119, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1069606119} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:16:24,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In2066363237 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In2066363237 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite20_Out2066363237| 0)) (and (= |ULTIMATE.start_main_#t~ite20_Out2066363237| ~y$w_buff0_used~0_In2066363237) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2066363237, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2066363237} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2066363237, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2066363237, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out2066363237|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:16:24,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In222132402 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In222132402 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In222132402 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In222132402 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out222132402| ~y$w_buff1_used~0_In222132402) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite21_Out222132402| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In222132402, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In222132402, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In222132402, ~y$w_buff1_used~0=~y$w_buff1_used~0_In222132402} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In222132402, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In222132402, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out222132402|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In222132402, ~y$w_buff1_used~0=~y$w_buff1_used~0_In222132402} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:16:24,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1394856699 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1394856699 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out-1394856699|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$r_buff0_thd0~0_In-1394856699 |ULTIMATE.start_main_#t~ite22_Out-1394856699|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1394856699, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1394856699} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1394856699, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1394856699, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1394856699|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:16:24,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd0~0_In776271461 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In776271461 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In776271461 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In776271461 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out776271461|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite23_Out776271461| ~y$r_buff1_thd0~0_In776271461)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In776271461, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In776271461, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In776271461, ~y$w_buff1_used~0=~y$w_buff1_used~0_In776271461} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In776271461, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In776271461, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In776271461, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out776271461|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In776271461} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:16:24,578 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In35092490 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite32_In35092490| |ULTIMATE.start_main_#t~ite32_Out35092490|) (not .cse0) (= |ULTIMATE.start_main_#t~ite33_Out35092490| ~y$w_buff1~0_In35092490)) (and .cse0 (= |ULTIMATE.start_main_#t~ite33_Out35092490| |ULTIMATE.start_main_#t~ite32_Out35092490|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In35092490 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd0~0_In35092490 256) 0)) (= (mod ~y$w_buff0_used~0_In35092490 256) 0) (and (= (mod ~y$w_buff1_used~0_In35092490 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite32_Out35092490| ~y$w_buff1~0_In35092490)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In35092490, ~y$w_buff0_used~0=~y$w_buff0_used~0_In35092490, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In35092490, ~weak$$choice2~0=~weak$$choice2~0_In35092490, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In35092490, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In35092490|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In35092490} OutVars{~y$w_buff1~0=~y$w_buff1~0_In35092490, ~y$w_buff0_used~0=~y$w_buff0_used~0_In35092490, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In35092490, ~weak$$choice2~0=~weak$$choice2~0_In35092490, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out35092490|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In35092490, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out35092490|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In35092490} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:16:24,579 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-866771474 256) 0))) (or (and (= ~y$w_buff0_used~0_In-866771474 |ULTIMATE.start_main_#t~ite36_Out-866771474|) (not .cse0) (= |ULTIMATE.start_main_#t~ite35_In-866771474| |ULTIMATE.start_main_#t~ite35_Out-866771474|)) (and (= ~y$w_buff0_used~0_In-866771474 |ULTIMATE.start_main_#t~ite35_Out-866771474|) .cse0 (= |ULTIMATE.start_main_#t~ite35_Out-866771474| |ULTIMATE.start_main_#t~ite36_Out-866771474|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-866771474 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-866771474 256))) (= 0 (mod ~y$w_buff0_used~0_In-866771474 256)) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-866771474 256)))))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-866771474, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-866771474, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-866771474|, ~weak$$choice2~0=~weak$$choice2~0_In-866771474, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-866771474, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-866771474} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-866771474, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-866771474, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-866771474|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-866771474|, ~weak$$choice2~0=~weak$$choice2~0_In-866771474, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-866771474, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-866771474} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:16:24,579 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2023491392 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_Out-2023491392| ~y$w_buff1_used~0_In-2023491392) (= |ULTIMATE.start_main_#t~ite38_In-2023491392| |ULTIMATE.start_main_#t~ite38_Out-2023491392|) (not .cse0)) (and (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-2023491392 256)))) (or (and (= (mod ~y$w_buff1_used~0_In-2023491392 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-2023491392 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2023491392 256))))) (= |ULTIMATE.start_main_#t~ite38_Out-2023491392| ~y$w_buff1_used~0_In-2023491392) (= |ULTIMATE.start_main_#t~ite39_Out-2023491392| |ULTIMATE.start_main_#t~ite38_Out-2023491392|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2023491392, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2023491392, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-2023491392|, ~weak$$choice2~0=~weak$$choice2~0_In-2023491392, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2023491392, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2023491392} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2023491392, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-2023491392|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2023491392, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2023491392|, ~weak$$choice2~0=~weak$$choice2~0_In-2023491392, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2023491392, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2023491392} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:16:24,580 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:16:24,581 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:16:24,581 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:16:24,696 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:16:24,697 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:16:24,698 INFO L168 Benchmark]: Toolchain (without parser) took 20470.43 ms. Allocated memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: 967.3 MB). Free memory was 952.3 MB in the beginning and 1.4 GB in the end (delta: -425.0 MB). Peak memory consumption was 542.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:24,699 INFO L168 Benchmark]: CDTParser took 0.29 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:16:24,700 INFO L168 Benchmark]: CACSL2BoogieTranslator took 780.57 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -158.7 MB). Peak memory consumption was 26.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:24,700 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:24,700 INFO L168 Benchmark]: Boogie Preprocessor took 45.75 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:16:24,701 INFO L168 Benchmark]: RCFGBuilder took 838.65 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.2 MB). Peak memory consumption was 51.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:24,702 INFO L168 Benchmark]: TraceAbstraction took 18588.56 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 824.2 MB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -343.9 MB). Peak memory consumption was 480.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:24,702 INFO L168 Benchmark]: Witness Printer took 143.34 ms. Allocated memory is still 2.0 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 19.7 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:24,706 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 780.57 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -158.7 MB). Peak memory consumption was 26.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 67.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 45.75 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 838.65 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.2 MB). Peak memory consumption was 51.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18588.56 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 824.2 MB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -343.9 MB). Peak memory consumption was 480.3 MB. Max. memory is 11.5 GB. * Witness Printer took 143.34 ms. Allocated memory is still 2.0 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 19.7 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.3s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 26 ChoiceCompositions, 4376 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 58 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 46792 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t1196, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t1197, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1198, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L771] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L772] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L773] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L774] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L775] 3 y$r_buff0_thd3 = (_Bool)1 [L778] 3 z = 1 [L781] 3 __unbuffered_p2_EAX = z [L784] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L746] 2 x = 2 [L749] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L788] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L789] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L752] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L753] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L754] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L820] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L821] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L822] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L823] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L824] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 y$flush_delayed = weak$$choice2 [L830] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L832] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L833] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L834] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L835] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L837] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 18.3s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 5.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1664 SDtfs, 1566 SDslu, 3767 SDs, 0 SdLazy, 2280 SolverSat, 138 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 120 GetRequests, 17 SyntacticMatches, 8 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 285 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22284occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.1s AutomataMinimizationTime, 16 MinimizatonAttempts, 4673 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 692 NumberOfCodeBlocks, 692 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 619 ConstructedInterpolants, 0 QuantifiedInterpolants, 154993 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...