./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix045_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix045_pso.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 59e2b1725c1502dd253eba1e4da61f4b0d63f61a .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:16:05,579 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:16:05,582 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:16:05,602 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:16:05,602 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:16:05,605 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:16:05,607 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:16:05,618 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:16:05,624 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:16:05,627 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:16:05,629 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:16:05,631 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:16:05,631 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:16:05,634 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:16:05,636 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:16:05,637 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:16:05,639 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:16:05,640 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:16:05,643 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:16:05,647 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:16:05,652 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:16:05,656 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:16:05,658 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:16:05,660 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:16:05,662 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:16:05,663 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:16:05,663 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:16:05,665 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:16:05,665 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:16:05,666 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:16:05,667 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:16:05,668 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:16:05,670 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:16:05,672 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:16:05,673 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:16:05,674 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:16:05,675 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:16:05,675 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:16:05,675 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:16:05,676 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:16:05,678 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:16:05,679 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:16:05,709 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:16:05,710 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:16:05,713 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:16:05,713 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:16:05,714 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:16:05,715 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:16:05,715 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:16:05,715 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:16:05,716 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:16:05,716 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:16:05,717 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:16:05,718 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:16:05,718 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:16:05,718 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:16:05,719 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:16:05,719 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:16:05,719 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:16:05,720 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:16:05,720 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:16:05,721 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:16:05,722 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:16:05,723 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:16:05,724 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:16:05,726 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:16:05,726 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:16:05,726 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:16:05,726 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:16:05,727 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:16:05,727 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:16:05,727 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 59e2b1725c1502dd253eba1e4da61f4b0d63f61a [2019-11-28 18:16:06,022 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:16:06,036 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:16:06,040 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:16:06,041 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:16:06,042 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:16:06,043 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix045_pso.opt.i [2019-11-28 18:16:06,105 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7425ac20c/09361480efc242c5bb4c815a14a35034/FLAG404e78522 [2019-11-28 18:16:06,729 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:16:06,730 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix045_pso.opt.i [2019-11-28 18:16:06,755 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7425ac20c/09361480efc242c5bb4c815a14a35034/FLAG404e78522 [2019-11-28 18:16:06,882 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7425ac20c/09361480efc242c5bb4c815a14a35034 [2019-11-28 18:16:06,886 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:16:06,888 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:16:06,889 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:16:06,890 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:16:06,893 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:16:06,895 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:16:06" (1/1) ... [2019-11-28 18:16:06,898 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7436a2ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:06, skipping insertion in model container [2019-11-28 18:16:06,898 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:16:06" (1/1) ... [2019-11-28 18:16:06,906 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:16:06,983 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:16:07,615 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:16:07,628 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:16:07,688 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:16:07,763 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:16:07,764 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07 WrapperNode [2019-11-28 18:16:07,764 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:16:07,765 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:16:07,765 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:16:07,765 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:16:07,774 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,796 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,844 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:16:07,845 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:16:07,845 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:16:07,846 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:16:07,856 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,857 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,862 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,862 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,873 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,878 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,881 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... [2019-11-28 18:16:07,887 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:16:07,888 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:16:07,888 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:16:07,888 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:16:07,889 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:16:07,977 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:16:07,977 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:16:07,977 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:16:07,978 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:16:07,978 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:16:07,978 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:16:07,978 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:16:07,978 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:16:07,979 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:16:07,979 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:16:07,979 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:16:07,979 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:16:07,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:16:07,982 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:16:08,724 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:16:08,724 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:16:08,725 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:08 BoogieIcfgContainer [2019-11-28 18:16:08,726 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:16:08,727 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:16:08,727 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:16:08,731 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:16:08,731 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:16:06" (1/3) ... [2019-11-28 18:16:08,733 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41081a36 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:16:08, skipping insertion in model container [2019-11-28 18:16:08,733 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:07" (2/3) ... [2019-11-28 18:16:08,733 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41081a36 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:16:08, skipping insertion in model container [2019-11-28 18:16:08,734 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:08" (3/3) ... [2019-11-28 18:16:08,736 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_pso.opt.i [2019-11-28 18:16:08,746 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:16:08,746 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:16:08,755 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:16:08,756 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:16:08,793 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,793 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,794 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,794 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,794 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,795 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,796 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,796 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,797 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,797 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,797 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,798 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,798 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,798 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,806 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,807 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,807 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,808 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,808 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,808 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:08,836 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-11-28 18:16:08,853 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:16:08,854 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:16:08,854 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:16:08,854 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:16:08,854 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:16:08,854 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:16:08,855 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:16:08,855 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:16:08,873 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-11-28 18:16:08,876 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-11-28 18:16:08,968 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-11-28 18:16:08,969 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:16:08,984 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:16:09,007 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-11-28 18:16:09,059 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-11-28 18:16:09,059 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:16:09,068 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:16:09,088 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-11-28 18:16:09,089 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:16:11,866 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 32 [2019-11-28 18:16:13,809 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2019-11-28 18:16:14,100 WARN L192 SmtUtils]: Spent 250.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-11-28 18:16:14,223 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2019-11-28 18:16:14,250 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46792 [2019-11-28 18:16:14,250 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-11-28 18:16:14,254 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-11-28 18:16:15,557 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16134 states. [2019-11-28 18:16:15,559 INFO L276 IsEmpty]: Start isEmpty. Operand 16134 states. [2019-11-28 18:16:15,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-11-28 18:16:15,565 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:15,566 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:15,566 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:15,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:15,571 INFO L82 PathProgramCache]: Analyzing trace with hash 1643101290, now seen corresponding path program 1 times [2019-11-28 18:16:15,578 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:15,578 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686965142] [2019-11-28 18:16:15,578 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:15,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:15,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:15,811 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686965142] [2019-11-28 18:16:15,813 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:15,813 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:16:15,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934052624] [2019-11-28 18:16:15,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:15,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:15,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:15,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:15,843 INFO L87 Difference]: Start difference. First operand 16134 states. Second operand 3 states. [2019-11-28 18:16:16,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:16,264 INFO L93 Difference]: Finished difference Result 16034 states and 60310 transitions. [2019-11-28 18:16:16,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:16,267 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-11-28 18:16:16,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:16,451 INFO L225 Difference]: With dead ends: 16034 [2019-11-28 18:16:16,451 INFO L226 Difference]: Without dead ends: 15698 [2019-11-28 18:16:16,453 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:16,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15698 states. [2019-11-28 18:16:17,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15698 to 15698. [2019-11-28 18:16:17,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15698 states. [2019-11-28 18:16:17,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15698 states to 15698 states and 59106 transitions. [2019-11-28 18:16:17,404 INFO L78 Accepts]: Start accepts. Automaton has 15698 states and 59106 transitions. Word has length 7 [2019-11-28 18:16:17,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:17,406 INFO L462 AbstractCegarLoop]: Abstraction has 15698 states and 59106 transitions. [2019-11-28 18:16:17,406 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:17,407 INFO L276 IsEmpty]: Start isEmpty. Operand 15698 states and 59106 transitions. [2019-11-28 18:16:17,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:16:17,412 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:17,412 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:17,412 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:17,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:17,413 INFO L82 PathProgramCache]: Analyzing trace with hash 565568960, now seen corresponding path program 1 times [2019-11-28 18:16:17,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:17,414 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443887600] [2019-11-28 18:16:17,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:17,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:17,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:17,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443887600] [2019-11-28 18:16:17,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:17,592 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:17,592 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256567622] [2019-11-28 18:16:17,594 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:17,594 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:17,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:17,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:17,595 INFO L87 Difference]: Start difference. First operand 15698 states and 59106 transitions. Second operand 4 states. [2019-11-28 18:16:18,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:18,246 INFO L93 Difference]: Finished difference Result 24414 states and 88322 transitions. [2019-11-28 18:16:18,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:18,247 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:16:18,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:18,362 INFO L225 Difference]: With dead ends: 24414 [2019-11-28 18:16:18,363 INFO L226 Difference]: Without dead ends: 24400 [2019-11-28 18:16:18,364 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:18,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24400 states. [2019-11-28 18:16:19,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24400 to 22284. [2019-11-28 18:16:19,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22284 states. [2019-11-28 18:16:19,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22284 states to 22284 states and 81513 transitions. [2019-11-28 18:16:19,497 INFO L78 Accepts]: Start accepts. Automaton has 22284 states and 81513 transitions. Word has length 13 [2019-11-28 18:16:19,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:19,498 INFO L462 AbstractCegarLoop]: Abstraction has 22284 states and 81513 transitions. [2019-11-28 18:16:19,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:19,498 INFO L276 IsEmpty]: Start isEmpty. Operand 22284 states and 81513 transitions. [2019-11-28 18:16:19,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:16:19,502 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:19,502 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:19,502 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:19,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:19,503 INFO L82 PathProgramCache]: Analyzing trace with hash 1863901117, now seen corresponding path program 1 times [2019-11-28 18:16:19,503 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:19,504 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [260011785] [2019-11-28 18:16:19,504 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:19,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:19,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:19,597 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [260011785] [2019-11-28 18:16:19,597 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:19,597 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:19,597 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712639987] [2019-11-28 18:16:19,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:19,598 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:19,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:19,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:19,599 INFO L87 Difference]: Start difference. First operand 22284 states and 81513 transitions. Second operand 4 states. [2019-11-28 18:16:19,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:19,936 INFO L93 Difference]: Finished difference Result 27604 states and 99705 transitions. [2019-11-28 18:16:19,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:19,937 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:16:19,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:20,083 INFO L225 Difference]: With dead ends: 27604 [2019-11-28 18:16:20,084 INFO L226 Difference]: Without dead ends: 27604 [2019-11-28 18:16:20,085 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:20,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27604 states. [2019-11-28 18:16:20,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27604 to 24754. [2019-11-28 18:16:20,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24754 states. [2019-11-28 18:16:21,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24754 states to 24754 states and 90160 transitions. [2019-11-28 18:16:21,660 INFO L78 Accepts]: Start accepts. Automaton has 24754 states and 90160 transitions. Word has length 13 [2019-11-28 18:16:21,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:21,660 INFO L462 AbstractCegarLoop]: Abstraction has 24754 states and 90160 transitions. [2019-11-28 18:16:21,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:21,661 INFO L276 IsEmpty]: Start isEmpty. Operand 24754 states and 90160 transitions. [2019-11-28 18:16:21,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-11-28 18:16:21,669 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:21,669 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:21,669 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:21,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:21,670 INFO L82 PathProgramCache]: Analyzing trace with hash -1245036147, now seen corresponding path program 1 times [2019-11-28 18:16:21,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:21,670 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1544380109] [2019-11-28 18:16:21,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:21,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:21,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:21,822 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1544380109] [2019-11-28 18:16:21,822 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:21,822 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:21,823 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [260721487] [2019-11-28 18:16:21,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:21,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:21,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:21,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:21,824 INFO L87 Difference]: Start difference. First operand 24754 states and 90160 transitions. Second operand 5 states. [2019-11-28 18:16:22,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:22,375 INFO L93 Difference]: Finished difference Result 32988 states and 117873 transitions. [2019-11-28 18:16:22,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:16:22,375 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-11-28 18:16:22,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:22,473 INFO L225 Difference]: With dead ends: 32988 [2019-11-28 18:16:22,474 INFO L226 Difference]: Without dead ends: 32974 [2019-11-28 18:16:22,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:16:22,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32974 states. [2019-11-28 18:16:23,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32974 to 24678. [2019-11-28 18:16:23,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24678 states. [2019-11-28 18:16:23,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24678 states to 24678 states and 89720 transitions. [2019-11-28 18:16:23,299 INFO L78 Accepts]: Start accepts. Automaton has 24678 states and 89720 transitions. Word has length 19 [2019-11-28 18:16:23,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:23,300 INFO L462 AbstractCegarLoop]: Abstraction has 24678 states and 89720 transitions. [2019-11-28 18:16:23,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:23,300 INFO L276 IsEmpty]: Start isEmpty. Operand 24678 states and 89720 transitions. [2019-11-28 18:16:23,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-28 18:16:23,331 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:23,331 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:23,331 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:23,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:23,332 INFO L82 PathProgramCache]: Analyzing trace with hash -1893835320, now seen corresponding path program 1 times [2019-11-28 18:16:23,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:23,333 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1385006140] [2019-11-28 18:16:23,333 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:23,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:23,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:23,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1385006140] [2019-11-28 18:16:23,473 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:23,473 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:23,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602380914] [2019-11-28 18:16:23,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:16:23,474 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:23,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:16:23,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:16:23,475 INFO L87 Difference]: Start difference. First operand 24678 states and 89720 transitions. Second operand 6 states. [2019-11-28 18:16:24,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:24,548 INFO L93 Difference]: Finished difference Result 36168 states and 128807 transitions. [2019-11-28 18:16:24,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:16:24,549 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-11-28 18:16:24,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:24,626 INFO L225 Difference]: With dead ends: 36168 [2019-11-28 18:16:24,626 INFO L226 Difference]: Without dead ends: 36136 [2019-11-28 18:16:24,626 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:16:24,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36136 states. [2019-11-28 18:16:25,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36136 to 32556. [2019-11-28 18:16:25,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32556 states. [2019-11-28 18:16:25,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32556 states to 32556 states and 116635 transitions. [2019-11-28 18:16:25,476 INFO L78 Accepts]: Start accepts. Automaton has 32556 states and 116635 transitions. Word has length 27 [2019-11-28 18:16:25,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:25,476 INFO L462 AbstractCegarLoop]: Abstraction has 32556 states and 116635 transitions. [2019-11-28 18:16:25,476 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:16:25,476 INFO L276 IsEmpty]: Start isEmpty. Operand 32556 states and 116635 transitions. [2019-11-28 18:16:25,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-28 18:16:25,514 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:25,514 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:25,515 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:25,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:25,515 INFO L82 PathProgramCache]: Analyzing trace with hash -342686850, now seen corresponding path program 1 times [2019-11-28 18:16:25,515 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:25,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105488971] [2019-11-28 18:16:25,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:25,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:25,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:25,579 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1105488971] [2019-11-28 18:16:25,579 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:25,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:25,580 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2126464330] [2019-11-28 18:16:25,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:25,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:25,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:25,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:25,582 INFO L87 Difference]: Start difference. First operand 32556 states and 116635 transitions. Second operand 3 states. [2019-11-28 18:16:25,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:25,651 INFO L93 Difference]: Finished difference Result 18066 states and 55900 transitions. [2019-11-28 18:16:25,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:25,651 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-11-28 18:16:25,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:25,679 INFO L225 Difference]: With dead ends: 18066 [2019-11-28 18:16:25,679 INFO L226 Difference]: Without dead ends: 18066 [2019-11-28 18:16:25,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:25,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18066 states. [2019-11-28 18:16:25,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18066 to 18066. [2019-11-28 18:16:25,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18066 states. [2019-11-28 18:16:25,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18066 states to 18066 states and 55900 transitions. [2019-11-28 18:16:25,998 INFO L78 Accepts]: Start accepts. Automaton has 18066 states and 55900 transitions. Word has length 33 [2019-11-28 18:16:25,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:25,999 INFO L462 AbstractCegarLoop]: Abstraction has 18066 states and 55900 transitions. [2019-11-28 18:16:25,999 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:25,999 INFO L276 IsEmpty]: Start isEmpty. Operand 18066 states and 55900 transitions. [2019-11-28 18:16:26,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:16:26,015 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:26,015 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:26,015 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:26,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:26,016 INFO L82 PathProgramCache]: Analyzing trace with hash 987674292, now seen corresponding path program 1 times [2019-11-28 18:16:26,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:26,016 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676771972] [2019-11-28 18:16:26,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:26,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:26,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:26,149 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676771972] [2019-11-28 18:16:26,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:26,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:16:26,150 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962966996] [2019-11-28 18:16:26,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:16:26,151 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:26,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:16:26,152 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:16:26,152 INFO L87 Difference]: Start difference. First operand 18066 states and 55900 transitions. Second operand 7 states. [2019-11-28 18:16:27,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:27,627 INFO L93 Difference]: Finished difference Result 23649 states and 71858 transitions. [2019-11-28 18:16:27,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-28 18:16:27,628 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-11-28 18:16:27,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:27,661 INFO L225 Difference]: With dead ends: 23649 [2019-11-28 18:16:27,661 INFO L226 Difference]: Without dead ends: 23621 [2019-11-28 18:16:27,662 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:16:27,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23621 states. [2019-11-28 18:16:27,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23621 to 16546. [2019-11-28 18:16:27,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16546 states. [2019-11-28 18:16:27,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16546 states to 16546 states and 51456 transitions. [2019-11-28 18:16:27,972 INFO L78 Accepts]: Start accepts. Automaton has 16546 states and 51456 transitions. Word has length 34 [2019-11-28 18:16:27,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:27,973 INFO L462 AbstractCegarLoop]: Abstraction has 16546 states and 51456 transitions. [2019-11-28 18:16:27,973 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:16:27,973 INFO L276 IsEmpty]: Start isEmpty. Operand 16546 states and 51456 transitions. [2019-11-28 18:16:27,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:16:27,989 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:27,989 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:27,989 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:27,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:27,990 INFO L82 PathProgramCache]: Analyzing trace with hash -365129955, now seen corresponding path program 1 times [2019-11-28 18:16:27,990 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:27,991 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422037173] [2019-11-28 18:16:27,991 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:28,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:28,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:28,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422037173] [2019-11-28 18:16:28,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:28,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:28,058 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73490973] [2019-11-28 18:16:28,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:28,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:28,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:28,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:28,059 INFO L87 Difference]: Start difference. First operand 16546 states and 51456 transitions. Second operand 3 states. [2019-11-28 18:16:28,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:28,200 INFO L93 Difference]: Finished difference Result 20422 states and 62777 transitions. [2019-11-28 18:16:28,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:28,201 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2019-11-28 18:16:28,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:28,244 INFO L225 Difference]: With dead ends: 20422 [2019-11-28 18:16:28,244 INFO L226 Difference]: Without dead ends: 20422 [2019-11-28 18:16:28,245 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:28,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20422 states. [2019-11-28 18:16:28,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20422 to 17925. [2019-11-28 18:16:28,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17925 states. [2019-11-28 18:16:28,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17925 states to 17925 states and 55527 transitions. [2019-11-28 18:16:28,569 INFO L78 Accepts]: Start accepts. Automaton has 17925 states and 55527 transitions. Word has length 34 [2019-11-28 18:16:28,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:28,570 INFO L462 AbstractCegarLoop]: Abstraction has 17925 states and 55527 transitions. [2019-11-28 18:16:28,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:28,570 INFO L276 IsEmpty]: Start isEmpty. Operand 17925 states and 55527 transitions. [2019-11-28 18:16:28,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:16:28,585 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:28,586 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:28,586 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:28,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:28,586 INFO L82 PathProgramCache]: Analyzing trace with hash -369569775, now seen corresponding path program 1 times [2019-11-28 18:16:28,586 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:28,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1064119029] [2019-11-28 18:16:28,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:28,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:28,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:28,707 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1064119029] [2019-11-28 18:16:28,707 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:28,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:28,707 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1461520434] [2019-11-28 18:16:28,708 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:16:28,708 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:28,708 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:16:28,708 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:16:28,708 INFO L87 Difference]: Start difference. First operand 17925 states and 55527 transitions. Second operand 6 states. [2019-11-28 18:16:29,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:29,041 INFO L93 Difference]: Finished difference Result 24469 states and 75051 transitions. [2019-11-28 18:16:29,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:16:29,042 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-11-28 18:16:29,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:29,089 INFO L225 Difference]: With dead ends: 24469 [2019-11-28 18:16:29,089 INFO L226 Difference]: Without dead ends: 22715 [2019-11-28 18:16:29,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:16:29,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22715 states. [2019-11-28 18:16:29,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22715 to 20030. [2019-11-28 18:16:29,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20030 states. [2019-11-28 18:16:29,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20030 states to 20030 states and 61498 transitions. [2019-11-28 18:16:29,500 INFO L78 Accepts]: Start accepts. Automaton has 20030 states and 61498 transitions. Word has length 34 [2019-11-28 18:16:29,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:29,500 INFO L462 AbstractCegarLoop]: Abstraction has 20030 states and 61498 transitions. [2019-11-28 18:16:29,501 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:16:29,501 INFO L276 IsEmpty]: Start isEmpty. Operand 20030 states and 61498 transitions. [2019-11-28 18:16:29,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-28 18:16:29,521 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:29,522 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:29,522 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:29,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:29,522 INFO L82 PathProgramCache]: Analyzing trace with hash 1754693472, now seen corresponding path program 1 times [2019-11-28 18:16:29,523 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:29,523 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2107881723] [2019-11-28 18:16:29,523 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:29,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:29,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:29,568 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2107881723] [2019-11-28 18:16:29,568 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:29,568 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:29,568 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [90271627] [2019-11-28 18:16:29,569 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:29,569 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:29,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:29,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:29,569 INFO L87 Difference]: Start difference. First operand 20030 states and 61498 transitions. Second operand 3 states. [2019-11-28 18:16:29,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:29,698 INFO L93 Difference]: Finished difference Result 20890 states and 63222 transitions. [2019-11-28 18:16:29,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:29,699 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-11-28 18:16:29,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:29,741 INFO L225 Difference]: With dead ends: 20890 [2019-11-28 18:16:29,741 INFO L226 Difference]: Without dead ends: 20890 [2019-11-28 18:16:29,742 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:29,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20890 states. [2019-11-28 18:16:30,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20890 to 18660. [2019-11-28 18:16:30,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18660 states. [2019-11-28 18:16:30,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18660 states to 18660 states and 56880 transitions. [2019-11-28 18:16:30,380 INFO L78 Accepts]: Start accepts. Automaton has 18660 states and 56880 transitions. Word has length 35 [2019-11-28 18:16:30,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:30,381 INFO L462 AbstractCegarLoop]: Abstraction has 18660 states and 56880 transitions. [2019-11-28 18:16:30,381 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:30,381 INFO L276 IsEmpty]: Start isEmpty. Operand 18660 states and 56880 transitions. [2019-11-28 18:16:30,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-28 18:16:30,397 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:30,397 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:30,397 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:30,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:30,398 INFO L82 PathProgramCache]: Analyzing trace with hash 581797047, now seen corresponding path program 1 times [2019-11-28 18:16:30,398 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:30,398 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197691261] [2019-11-28 18:16:30,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:30,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:30,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:30,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197691261] [2019-11-28 18:16:30,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:30,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:30,456 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1244967827] [2019-11-28 18:16:30,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:30,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:30,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:30,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:30,457 INFO L87 Difference]: Start difference. First operand 18660 states and 56880 transitions. Second operand 4 states. [2019-11-28 18:16:30,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:30,478 INFO L93 Difference]: Finished difference Result 2549 states and 5680 transitions. [2019-11-28 18:16:30,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:16:30,479 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-11-28 18:16:30,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:30,483 INFO L225 Difference]: With dead ends: 2549 [2019-11-28 18:16:30,483 INFO L226 Difference]: Without dead ends: 2549 [2019-11-28 18:16:30,484 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:30,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2549 states. [2019-11-28 18:16:30,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2549 to 2549. [2019-11-28 18:16:30,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2549 states. [2019-11-28 18:16:30,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2549 states to 2549 states and 5680 transitions. [2019-11-28 18:16:30,522 INFO L78 Accepts]: Start accepts. Automaton has 2549 states and 5680 transitions. Word has length 35 [2019-11-28 18:16:30,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:30,523 INFO L462 AbstractCegarLoop]: Abstraction has 2549 states and 5680 transitions. [2019-11-28 18:16:30,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:30,523 INFO L276 IsEmpty]: Start isEmpty. Operand 2549 states and 5680 transitions. [2019-11-28 18:16:30,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-28 18:16:30,527 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:30,527 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:30,527 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:30,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:30,528 INFO L82 PathProgramCache]: Analyzing trace with hash 1726174666, now seen corresponding path program 1 times [2019-11-28 18:16:30,528 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:30,528 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313020598] [2019-11-28 18:16:30,528 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:30,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:30,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:30,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313020598] [2019-11-28 18:16:30,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:30,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:16:30,661 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1829392882] [2019-11-28 18:16:30,661 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:16:30,661 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:30,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:16:30,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:16:30,662 INFO L87 Difference]: Start difference. First operand 2549 states and 5680 transitions. Second operand 7 states. [2019-11-28 18:16:30,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:30,811 INFO L93 Difference]: Finished difference Result 5015 states and 11027 transitions. [2019-11-28 18:16:30,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:16:30,812 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 44 [2019-11-28 18:16:30,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:30,816 INFO L225 Difference]: With dead ends: 5015 [2019-11-28 18:16:30,816 INFO L226 Difference]: Without dead ends: 2816 [2019-11-28 18:16:30,817 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:16:30,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2816 states. [2019-11-28 18:16:30,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2816 to 2367. [2019-11-28 18:16:30,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2367 states. [2019-11-28 18:16:30,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2367 states to 2367 states and 5249 transitions. [2019-11-28 18:16:30,842 INFO L78 Accepts]: Start accepts. Automaton has 2367 states and 5249 transitions. Word has length 44 [2019-11-28 18:16:30,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:30,843 INFO L462 AbstractCegarLoop]: Abstraction has 2367 states and 5249 transitions. [2019-11-28 18:16:30,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:16:30,843 INFO L276 IsEmpty]: Start isEmpty. Operand 2367 states and 5249 transitions. [2019-11-28 18:16:30,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-28 18:16:30,845 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:30,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:30,845 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:30,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:30,845 INFO L82 PathProgramCache]: Analyzing trace with hash -1713515542, now seen corresponding path program 2 times [2019-11-28 18:16:30,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:30,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [358127146] [2019-11-28 18:16:30,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:30,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:30,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:30,913 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [358127146] [2019-11-28 18:16:30,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:30,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:30,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1402199949] [2019-11-28 18:16:30,914 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:30,914 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:30,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:30,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:30,915 INFO L87 Difference]: Start difference. First operand 2367 states and 5249 transitions. Second operand 3 states. [2019-11-28 18:16:30,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:30,961 INFO L93 Difference]: Finished difference Result 2367 states and 5223 transitions. [2019-11-28 18:16:30,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:30,962 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-11-28 18:16:30,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:30,965 INFO L225 Difference]: With dead ends: 2367 [2019-11-28 18:16:30,966 INFO L226 Difference]: Without dead ends: 2367 [2019-11-28 18:16:30,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:30,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2367 states. [2019-11-28 18:16:30,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2367 to 2367. [2019-11-28 18:16:30,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2367 states. [2019-11-28 18:16:30,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2367 states to 2367 states and 5223 transitions. [2019-11-28 18:16:30,998 INFO L78 Accepts]: Start accepts. Automaton has 2367 states and 5223 transitions. Word has length 44 [2019-11-28 18:16:30,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:30,999 INFO L462 AbstractCegarLoop]: Abstraction has 2367 states and 5223 transitions. [2019-11-28 18:16:30,999 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:30,999 INFO L276 IsEmpty]: Start isEmpty. Operand 2367 states and 5223 transitions. [2019-11-28 18:16:31,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-28 18:16:31,003 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:31,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:31,004 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:31,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:31,004 INFO L82 PathProgramCache]: Analyzing trace with hash 161242823, now seen corresponding path program 1 times [2019-11-28 18:16:31,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:31,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492961759] [2019-11-28 18:16:31,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:31,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:31,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:31,087 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [492961759] [2019-11-28 18:16:31,087 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:31,087 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:31,088 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1610717377] [2019-11-28 18:16:31,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:31,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:31,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:31,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:31,088 INFO L87 Difference]: Start difference. First operand 2367 states and 5223 transitions. Second operand 5 states. [2019-11-28 18:16:31,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:31,110 INFO L93 Difference]: Finished difference Result 620 states and 1378 transitions. [2019-11-28 18:16:31,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:31,111 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-28 18:16:31,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:31,112 INFO L225 Difference]: With dead ends: 620 [2019-11-28 18:16:31,112 INFO L226 Difference]: Without dead ends: 620 [2019-11-28 18:16:31,113 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:31,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 620 states. [2019-11-28 18:16:31,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 620 to 564. [2019-11-28 18:16:31,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 564 states. [2019-11-28 18:16:31,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 564 states to 564 states and 1246 transitions. [2019-11-28 18:16:31,122 INFO L78 Accepts]: Start accepts. Automaton has 564 states and 1246 transitions. Word has length 45 [2019-11-28 18:16:31,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:31,123 INFO L462 AbstractCegarLoop]: Abstraction has 564 states and 1246 transitions. [2019-11-28 18:16:31,124 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:31,124 INFO L276 IsEmpty]: Start isEmpty. Operand 564 states and 1246 transitions. [2019-11-28 18:16:31,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:16:31,125 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:31,125 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:31,126 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:31,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:31,126 INFO L82 PathProgramCache]: Analyzing trace with hash 102984974, now seen corresponding path program 1 times [2019-11-28 18:16:31,126 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:31,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170266694] [2019-11-28 18:16:31,127 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:31,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:31,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:31,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170266694] [2019-11-28 18:16:31,256 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:31,256 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:31,256 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265282694] [2019-11-28 18:16:31,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:31,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:31,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:31,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:31,257 INFO L87 Difference]: Start difference. First operand 564 states and 1246 transitions. Second operand 5 states. [2019-11-28 18:16:31,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:31,315 INFO L93 Difference]: Finished difference Result 753 states and 1587 transitions. [2019-11-28 18:16:31,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:31,315 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-11-28 18:16:31,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:31,316 INFO L225 Difference]: With dead ends: 753 [2019-11-28 18:16:31,316 INFO L226 Difference]: Without dead ends: 220 [2019-11-28 18:16:31,317 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:16:31,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2019-11-28 18:16:31,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 220. [2019-11-28 18:16:31,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-11-28 18:16:31,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 394 transitions. [2019-11-28 18:16:31,320 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 394 transitions. Word has length 56 [2019-11-28 18:16:31,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:31,321 INFO L462 AbstractCegarLoop]: Abstraction has 220 states and 394 transitions. [2019-11-28 18:16:31,321 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:31,321 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 394 transitions. [2019-11-28 18:16:31,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:16:31,322 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:31,322 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:31,322 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:31,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:31,323 INFO L82 PathProgramCache]: Analyzing trace with hash -2026218410, now seen corresponding path program 2 times [2019-11-28 18:16:31,323 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:31,323 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212058534] [2019-11-28 18:16:31,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:31,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:31,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:31,380 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212058534] [2019-11-28 18:16:31,380 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:31,380 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:31,380 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002879272] [2019-11-28 18:16:31,381 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:31,381 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:31,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:31,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:31,382 INFO L87 Difference]: Start difference. First operand 220 states and 394 transitions. Second operand 3 states. [2019-11-28 18:16:31,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:31,393 INFO L93 Difference]: Finished difference Result 209 states and 361 transitions. [2019-11-28 18:16:31,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:31,394 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-11-28 18:16:31,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:31,394 INFO L225 Difference]: With dead ends: 209 [2019-11-28 18:16:31,394 INFO L226 Difference]: Without dead ends: 209 [2019-11-28 18:16:31,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:31,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2019-11-28 18:16:31,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2019-11-28 18:16:31,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-11-28 18:16:31,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 361 transitions. [2019-11-28 18:16:31,399 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 361 transitions. Word has length 56 [2019-11-28 18:16:31,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:31,399 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 361 transitions. [2019-11-28 18:16:31,400 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:31,400 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 361 transitions. [2019-11-28 18:16:31,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:31,401 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:31,401 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:31,401 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:31,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:31,402 INFO L82 PathProgramCache]: Analyzing trace with hash -876750572, now seen corresponding path program 1 times [2019-11-28 18:16:31,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:31,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402298202] [2019-11-28 18:16:31,403 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:31,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:31,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:31,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402298202] [2019-11-28 18:16:31,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:31,680 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-28 18:16:31,680 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238621900] [2019-11-28 18:16:31,680 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-11-28 18:16:31,681 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:31,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-11-28 18:16:31,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:16:31,681 INFO L87 Difference]: Start difference. First operand 209 states and 361 transitions. Second operand 14 states. [2019-11-28 18:16:32,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:32,273 INFO L93 Difference]: Finished difference Result 370 states and 622 transitions. [2019-11-28 18:16:32,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-28 18:16:32,274 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 57 [2019-11-28 18:16:32,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:32,275 INFO L225 Difference]: With dead ends: 370 [2019-11-28 18:16:32,275 INFO L226 Difference]: Without dead ends: 335 [2019-11-28 18:16:32,276 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=137, Invalid=565, Unknown=0, NotChecked=0, Total=702 [2019-11-28 18:16:32,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335 states. [2019-11-28 18:16:32,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335 to 317. [2019-11-28 18:16:32,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-11-28 18:16:32,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 546 transitions. [2019-11-28 18:16:32,281 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 546 transitions. Word has length 57 [2019-11-28 18:16:32,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:32,282 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 546 transitions. [2019-11-28 18:16:32,282 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-11-28 18:16:32,282 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 546 transitions. [2019-11-28 18:16:32,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:32,282 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:32,282 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:32,283 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:32,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:32,283 INFO L82 PathProgramCache]: Analyzing trace with hash -1963724718, now seen corresponding path program 2 times [2019-11-28 18:16:32,283 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:32,283 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999472570] [2019-11-28 18:16:32,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:32,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:16:32,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:16:32,409 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:16:32,409 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:16:32,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1202~0.base_25| 1) |v_#valid_62|) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t1202~0.offset_19| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1202~0.base_25| 4)) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1202~0.base_25|)) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_45 0) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1202~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1202~0.base_25|) |v_ULTIMATE.start_main_~#t1202~0.offset_19| 0)) |v_#memory_int_21|) (= v_~y$r_buff1_thd0~0_281 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1202~0.base_25|) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ULTIMATE.start_main_~#t1204~0.base=|v_ULTIMATE.start_main_~#t1204~0.base_25|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ULTIMATE.start_main_~#t1204~0.offset=|v_ULTIMATE.start_main_~#t1204~0.offset_19|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_~#t1202~0.base=|v_ULTIMATE.start_main_~#t1202~0.base_25|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1203~0.base=|v_ULTIMATE.start_main_~#t1203~0.base_25|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, ULTIMATE.start_main_~#t1203~0.offset=|v_ULTIMATE.start_main_~#t1203~0.offset_19|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ULTIMATE.start_main_~#t1202~0.offset=|v_ULTIMATE.start_main_~#t1202~0.offset_19|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1204~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1204~0.offset, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t1202~0.base, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1203~0.base, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1203~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t1202~0.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:32,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1203~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1203~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1203~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1203~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1203~0.base_13|) |v_ULTIMATE.start_main_~#t1203~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1203~0.base_13| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1203~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1203~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1203~0.base=|v_ULTIMATE.start_main_~#t1203~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1203~0.offset=|v_ULTIMATE.start_main_~#t1203~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1203~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1203~0.offset] because there is no mapped edge [2019-11-28 18:16:32,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1204~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1204~0.base_13|) |v_ULTIMATE.start_main_~#t1204~0.offset_11| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1204~0.base_13|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1204~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1204~0.offset_11| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1204~0.base_13| 4)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1204~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1204~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1204~0.offset=|v_ULTIMATE.start_main_~#t1204~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1204~0.base=|v_ULTIMATE.start_main_~#t1204~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1204~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1204~0.base] because there is no mapped edge [2019-11-28 18:16:32,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:32,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:16:32,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-455736045 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-455736045 256) 0))) (or (and (= ~y$w_buff0_used~0_In-455736045 |P2Thread1of1ForFork0_#t~ite11_Out-455736045|) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-455736045| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-455736045, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-455736045} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-455736045, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-455736045|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-455736045} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:16:32,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In2119100617 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In2119100617 256))) (.cse3 (= (mod ~y$r_buff0_thd3~0_In2119100617 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In2119100617 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In2119100617 |P2Thread1of1ForFork0_#t~ite12_Out2119100617|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite12_Out2119100617|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2119100617, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2119100617, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2119100617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2119100617} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2119100617, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2119100617, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out2119100617|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2119100617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2119100617} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:16:32,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-1517342192 ~y$r_buff0_thd3~0_Out-1517342192)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1517342192 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1517342192 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~y$r_buff0_thd3~0_Out-1517342192 0) (not .cse0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1517342192, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1517342192} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1517342192, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1517342192, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1517342192|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:16:32,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In1719939905 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1719939905 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In1719939905 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1719939905 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite14_Out1719939905| ~y$r_buff1_thd3~0_In1719939905) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite14_Out1719939905| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1719939905, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1719939905, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1719939905, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1719939905} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1719939905|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1719939905, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1719939905, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1719939905, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1719939905} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:16:32,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:16:32,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1806866456 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-1806866456 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out-1806866456| ~y$w_buff1~0_In-1806866456)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out-1806866456| ~y~0_In-1806866456) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1806866456, ~y$w_buff1~0=~y$w_buff1~0_In-1806866456, ~y~0=~y~0_In-1806866456, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1806866456} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1806866456, ~y$w_buff1~0=~y$w_buff1~0_In-1806866456, ~y~0=~y~0_In-1806866456, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-1806866456|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1806866456} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:32,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:32,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1362146340 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1362146340 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite5_Out1362146340| 0) (not .cse1)) (and (= ~y$w_buff0_used~0_In1362146340 |P1Thread1of1ForFork2_#t~ite5_Out1362146340|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1362146340, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1362146340} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1362146340, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1362146340, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1362146340|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:16:32,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In1715523659 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1715523659 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1715523659 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1715523659 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite6_Out1715523659| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In1715523659 |P1Thread1of1ForFork2_#t~ite6_Out1715523659|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1715523659, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1715523659, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1715523659, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1715523659} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1715523659, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1715523659, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1715523659, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1715523659|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1715523659} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:16:32,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In609884420 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In609884420 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite7_Out609884420| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out609884420| ~y$r_buff0_thd2~0_In609884420)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In609884420, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In609884420} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In609884420, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In609884420, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out609884420|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:16:32,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-651751351 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-651751351 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-651751351 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-651751351 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-651751351|)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite8_Out-651751351| ~y$r_buff1_thd2~0_In-651751351) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-651751351, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-651751351, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-651751351, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-651751351} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-651751351, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-651751351, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-651751351|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-651751351, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-651751351} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:16:32,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:16:32,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:16:32,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd0~0_In-854048473 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-854048473 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite19_Out-854048473| |ULTIMATE.start_main_#t~ite18_Out-854048473|))) (or (and (not .cse0) (= ~y$w_buff1~0_In-854048473 |ULTIMATE.start_main_#t~ite18_Out-854048473|) (not .cse1) .cse2) (and (or .cse1 .cse0) .cse2 (= ~y~0_In-854048473 |ULTIMATE.start_main_#t~ite18_Out-854048473|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-854048473, ~y~0=~y~0_In-854048473, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-854048473, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-854048473} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-854048473, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-854048473|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-854048473|, ~y~0=~y~0_In-854048473, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-854048473, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-854048473} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:16:32,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1766644711 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1766644711 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out1766644711| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite20_Out1766644711| ~y$w_buff0_used~0_In1766644711) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1766644711, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1766644711} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1766644711, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1766644711, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1766644711|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:16:32,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In131672852 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In131672852 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In131672852 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In131672852 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In131672852 |ULTIMATE.start_main_#t~ite21_Out131672852|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out131672852|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In131672852, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In131672852, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In131672852, ~y$w_buff1_used~0=~y$w_buff1_used~0_In131672852} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In131672852, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In131672852, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out131672852|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In131672852, ~y$w_buff1_used~0=~y$w_buff1_used~0_In131672852} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:16:32,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In914346990 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In914346990 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out914346990| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite22_Out914346990| ~y$r_buff0_thd0~0_In914346990)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In914346990, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In914346990} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In914346990, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In914346990, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out914346990|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:16:32,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In585527226 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In585527226 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In585527226 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In585527226 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out585527226|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite23_Out585527226| ~y$r_buff1_thd0~0_In585527226)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In585527226, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In585527226, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In585527226, ~y$w_buff1_used~0=~y$w_buff1_used~0_In585527226} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In585527226, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In585527226, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In585527226, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out585527226|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In585527226} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:16:32,439 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1555701250 256)))) (or (and (= ~y$w_buff1~0_In1555701250 |ULTIMATE.start_main_#t~ite33_Out1555701250|) (not .cse0) (= |ULTIMATE.start_main_#t~ite32_In1555701250| |ULTIMATE.start_main_#t~ite32_Out1555701250|)) (and (= |ULTIMATE.start_main_#t~ite33_Out1555701250| |ULTIMATE.start_main_#t~ite32_Out1555701250|) (= ~y$w_buff1~0_In1555701250 |ULTIMATE.start_main_#t~ite32_Out1555701250|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1555701250 256)))) (or (= (mod ~y$w_buff0_used~0_In1555701250 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In1555701250 256))) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In1555701250 256) 0)))) .cse0))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1555701250, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1555701250, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1555701250, ~weak$$choice2~0=~weak$$choice2~0_In1555701250, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1555701250, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In1555701250|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1555701250} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1555701250, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1555701250, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1555701250, ~weak$$choice2~0=~weak$$choice2~0_In1555701250, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1555701250|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1555701250, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out1555701250|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1555701250} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:16:32,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In959983885 256)))) (or (and .cse0 (= ~y$w_buff0_used~0_In959983885 |ULTIMATE.start_main_#t~ite35_Out959983885|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In959983885 256)))) (or (= (mod ~y$w_buff0_used~0_In959983885 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In959983885 256))) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In959983885 256))))) (= |ULTIMATE.start_main_#t~ite36_Out959983885| |ULTIMATE.start_main_#t~ite35_Out959983885|)) (and (= |ULTIMATE.start_main_#t~ite35_In959983885| |ULTIMATE.start_main_#t~ite35_Out959983885|) (not .cse0) (= ~y$w_buff0_used~0_In959983885 |ULTIMATE.start_main_#t~ite36_Out959983885|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In959983885, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In959983885, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In959983885|, ~weak$$choice2~0=~weak$$choice2~0_In959983885, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In959983885, ~y$w_buff1_used~0=~y$w_buff1_used~0_In959983885} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In959983885, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In959983885, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out959983885|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out959983885|, ~weak$$choice2~0=~weak$$choice2~0_In959983885, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In959983885, ~y$w_buff1_used~0=~y$w_buff1_used~0_In959983885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:16:32,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1865868413 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1865868413 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In1865868413 256)) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In1865868413 256))) (and (= 0 (mod ~y$r_buff1_thd0~0_In1865868413 256)) .cse0))) .cse1 (= |ULTIMATE.start_main_#t~ite38_Out1865868413| |ULTIMATE.start_main_#t~ite39_Out1865868413|) (= |ULTIMATE.start_main_#t~ite38_Out1865868413| ~y$w_buff1_used~0_In1865868413)) (and (= |ULTIMATE.start_main_#t~ite38_In1865868413| |ULTIMATE.start_main_#t~ite38_Out1865868413|) (not .cse1) (= |ULTIMATE.start_main_#t~ite39_Out1865868413| ~y$w_buff1_used~0_In1865868413)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1865868413, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1865868413, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1865868413|, ~weak$$choice2~0=~weak$$choice2~0_In1865868413, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1865868413, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1865868413} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1865868413, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1865868413|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1865868413, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1865868413|, ~weak$$choice2~0=~weak$$choice2~0_In1865868413, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1865868413, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1865868413} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:16:32,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:16:32,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:16:32,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:16:32,546 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:16:32 BasicIcfg [2019-11-28 18:16:32,547 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:16:32,548 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:16:32,548 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:16:32,548 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:16:32,549 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:08" (3/4) ... [2019-11-28 18:16:32,552 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:16:32,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1202~0.base_25| 1) |v_#valid_62|) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t1202~0.offset_19| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1202~0.base_25| 4)) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1202~0.base_25|)) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_45 0) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1202~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1202~0.base_25|) |v_ULTIMATE.start_main_~#t1202~0.offset_19| 0)) |v_#memory_int_21|) (= v_~y$r_buff1_thd0~0_281 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1202~0.base_25|) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ULTIMATE.start_main_~#t1204~0.base=|v_ULTIMATE.start_main_~#t1204~0.base_25|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ULTIMATE.start_main_~#t1204~0.offset=|v_ULTIMATE.start_main_~#t1204~0.offset_19|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_~#t1202~0.base=|v_ULTIMATE.start_main_~#t1202~0.base_25|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1203~0.base=|v_ULTIMATE.start_main_~#t1203~0.base_25|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, ULTIMATE.start_main_~#t1203~0.offset=|v_ULTIMATE.start_main_~#t1203~0.offset_19|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ULTIMATE.start_main_~#t1202~0.offset=|v_ULTIMATE.start_main_~#t1202~0.offset_19|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1204~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1204~0.offset, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t1202~0.base, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1203~0.base, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1203~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t1202~0.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:32,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1203~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1203~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1203~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1203~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1203~0.base_13|) |v_ULTIMATE.start_main_~#t1203~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1203~0.base_13| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1203~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1203~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1203~0.base=|v_ULTIMATE.start_main_~#t1203~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1203~0.offset=|v_ULTIMATE.start_main_~#t1203~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1203~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1203~0.offset] because there is no mapped edge [2019-11-28 18:16:32,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1204~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1204~0.base_13|) |v_ULTIMATE.start_main_~#t1204~0.offset_11| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1204~0.base_13|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1204~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1204~0.offset_11| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1204~0.base_13| 4)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1204~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1204~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1204~0.offset=|v_ULTIMATE.start_main_~#t1204~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1204~0.base=|v_ULTIMATE.start_main_~#t1204~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1204~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1204~0.base] because there is no mapped edge [2019-11-28 18:16:32,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:32,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:16:32,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-455736045 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-455736045 256) 0))) (or (and (= ~y$w_buff0_used~0_In-455736045 |P2Thread1of1ForFork0_#t~ite11_Out-455736045|) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-455736045| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-455736045, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-455736045} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-455736045, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-455736045|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-455736045} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:16:32,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In2119100617 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In2119100617 256))) (.cse3 (= (mod ~y$r_buff0_thd3~0_In2119100617 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In2119100617 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In2119100617 |P2Thread1of1ForFork0_#t~ite12_Out2119100617|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite12_Out2119100617|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2119100617, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2119100617, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2119100617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2119100617} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2119100617, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2119100617, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out2119100617|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2119100617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2119100617} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:16:32,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-1517342192 ~y$r_buff0_thd3~0_Out-1517342192)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1517342192 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1517342192 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~y$r_buff0_thd3~0_Out-1517342192 0) (not .cse0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1517342192, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1517342192} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1517342192, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1517342192, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1517342192|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:16:32,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In1719939905 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1719939905 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In1719939905 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1719939905 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite14_Out1719939905| ~y$r_buff1_thd3~0_In1719939905) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite14_Out1719939905| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1719939905, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1719939905, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1719939905, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1719939905} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1719939905|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1719939905, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1719939905, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1719939905, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1719939905} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:16:32,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:16:32,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1806866456 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-1806866456 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out-1806866456| ~y$w_buff1~0_In-1806866456)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out-1806866456| ~y~0_In-1806866456) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1806866456, ~y$w_buff1~0=~y$w_buff1~0_In-1806866456, ~y~0=~y~0_In-1806866456, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1806866456} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1806866456, ~y$w_buff1~0=~y$w_buff1~0_In-1806866456, ~y~0=~y~0_In-1806866456, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-1806866456|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1806866456} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:32,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:32,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1362146340 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1362146340 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite5_Out1362146340| 0) (not .cse1)) (and (= ~y$w_buff0_used~0_In1362146340 |P1Thread1of1ForFork2_#t~ite5_Out1362146340|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1362146340, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1362146340} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1362146340, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1362146340, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1362146340|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:16:32,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In1715523659 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1715523659 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1715523659 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1715523659 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite6_Out1715523659| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In1715523659 |P1Thread1of1ForFork2_#t~ite6_Out1715523659|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1715523659, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1715523659, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1715523659, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1715523659} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1715523659, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1715523659, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1715523659, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1715523659|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1715523659} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:16:32,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In609884420 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In609884420 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite7_Out609884420| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out609884420| ~y$r_buff0_thd2~0_In609884420)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In609884420, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In609884420} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In609884420, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In609884420, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out609884420|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:16:32,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-651751351 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-651751351 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-651751351 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-651751351 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-651751351|)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite8_Out-651751351| ~y$r_buff1_thd2~0_In-651751351) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-651751351, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-651751351, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-651751351, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-651751351} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-651751351, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-651751351, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-651751351|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-651751351, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-651751351} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:16:32,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:16:32,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:16:32,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd0~0_In-854048473 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-854048473 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite19_Out-854048473| |ULTIMATE.start_main_#t~ite18_Out-854048473|))) (or (and (not .cse0) (= ~y$w_buff1~0_In-854048473 |ULTIMATE.start_main_#t~ite18_Out-854048473|) (not .cse1) .cse2) (and (or .cse1 .cse0) .cse2 (= ~y~0_In-854048473 |ULTIMATE.start_main_#t~ite18_Out-854048473|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-854048473, ~y~0=~y~0_In-854048473, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-854048473, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-854048473} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-854048473, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-854048473|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-854048473|, ~y~0=~y~0_In-854048473, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-854048473, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-854048473} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:16:32,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1766644711 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1766644711 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out1766644711| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite20_Out1766644711| ~y$w_buff0_used~0_In1766644711) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1766644711, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1766644711} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1766644711, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1766644711, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1766644711|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:16:32,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In131672852 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In131672852 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In131672852 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In131672852 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In131672852 |ULTIMATE.start_main_#t~ite21_Out131672852|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out131672852|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In131672852, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In131672852, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In131672852, ~y$w_buff1_used~0=~y$w_buff1_used~0_In131672852} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In131672852, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In131672852, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out131672852|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In131672852, ~y$w_buff1_used~0=~y$w_buff1_used~0_In131672852} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:16:32,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In914346990 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In914346990 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out914346990| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite22_Out914346990| ~y$r_buff0_thd0~0_In914346990)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In914346990, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In914346990} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In914346990, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In914346990, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out914346990|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:16:32,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In585527226 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In585527226 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In585527226 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In585527226 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out585527226|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite23_Out585527226| ~y$r_buff1_thd0~0_In585527226)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In585527226, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In585527226, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In585527226, ~y$w_buff1_used~0=~y$w_buff1_used~0_In585527226} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In585527226, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In585527226, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In585527226, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out585527226|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In585527226} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:16:32,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1555701250 256)))) (or (and (= ~y$w_buff1~0_In1555701250 |ULTIMATE.start_main_#t~ite33_Out1555701250|) (not .cse0) (= |ULTIMATE.start_main_#t~ite32_In1555701250| |ULTIMATE.start_main_#t~ite32_Out1555701250|)) (and (= |ULTIMATE.start_main_#t~ite33_Out1555701250| |ULTIMATE.start_main_#t~ite32_Out1555701250|) (= ~y$w_buff1~0_In1555701250 |ULTIMATE.start_main_#t~ite32_Out1555701250|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1555701250 256)))) (or (= (mod ~y$w_buff0_used~0_In1555701250 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In1555701250 256))) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In1555701250 256) 0)))) .cse0))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1555701250, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1555701250, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1555701250, ~weak$$choice2~0=~weak$$choice2~0_In1555701250, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1555701250, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In1555701250|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1555701250} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1555701250, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1555701250, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1555701250, ~weak$$choice2~0=~weak$$choice2~0_In1555701250, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1555701250|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1555701250, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out1555701250|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1555701250} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:16:32,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In959983885 256)))) (or (and .cse0 (= ~y$w_buff0_used~0_In959983885 |ULTIMATE.start_main_#t~ite35_Out959983885|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In959983885 256)))) (or (= (mod ~y$w_buff0_used~0_In959983885 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In959983885 256))) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In959983885 256))))) (= |ULTIMATE.start_main_#t~ite36_Out959983885| |ULTIMATE.start_main_#t~ite35_Out959983885|)) (and (= |ULTIMATE.start_main_#t~ite35_In959983885| |ULTIMATE.start_main_#t~ite35_Out959983885|) (not .cse0) (= ~y$w_buff0_used~0_In959983885 |ULTIMATE.start_main_#t~ite36_Out959983885|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In959983885, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In959983885, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In959983885|, ~weak$$choice2~0=~weak$$choice2~0_In959983885, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In959983885, ~y$w_buff1_used~0=~y$w_buff1_used~0_In959983885} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In959983885, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In959983885, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out959983885|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out959983885|, ~weak$$choice2~0=~weak$$choice2~0_In959983885, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In959983885, ~y$w_buff1_used~0=~y$w_buff1_used~0_In959983885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:16:32,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1865868413 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1865868413 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In1865868413 256)) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In1865868413 256))) (and (= 0 (mod ~y$r_buff1_thd0~0_In1865868413 256)) .cse0))) .cse1 (= |ULTIMATE.start_main_#t~ite38_Out1865868413| |ULTIMATE.start_main_#t~ite39_Out1865868413|) (= |ULTIMATE.start_main_#t~ite38_Out1865868413| ~y$w_buff1_used~0_In1865868413)) (and (= |ULTIMATE.start_main_#t~ite38_In1865868413| |ULTIMATE.start_main_#t~ite38_Out1865868413|) (not .cse1) (= |ULTIMATE.start_main_#t~ite39_Out1865868413| ~y$w_buff1_used~0_In1865868413)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1865868413, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1865868413, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1865868413|, ~weak$$choice2~0=~weak$$choice2~0_In1865868413, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1865868413, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1865868413} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1865868413, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1865868413|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1865868413, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1865868413|, ~weak$$choice2~0=~weak$$choice2~0_In1865868413, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1865868413, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1865868413} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:16:32,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:16:32,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:16:32,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:16:32,743 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:16:32,747 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:16:32,751 INFO L168 Benchmark]: Toolchain (without parser) took 25861.46 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.6 GB). Free memory was 949.6 MB in the beginning and 1.5 GB in the end (delta: -548.2 MB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2019-11-28 18:16:32,754 INFO L168 Benchmark]: CDTParser took 0.27 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:16:32,755 INFO L168 Benchmark]: CACSL2BoogieTranslator took 875.20 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 148.4 MB). Free memory was 949.6 MB in the beginning and 1.1 GB in the end (delta: -155.5 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:32,756 INFO L168 Benchmark]: Boogie Procedure Inliner took 80.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:32,756 INFO L168 Benchmark]: Boogie Preprocessor took 42.18 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:16:32,759 INFO L168 Benchmark]: RCFGBuilder took 838.22 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.8 MB). Peak memory consumption was 50.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:32,760 INFO L168 Benchmark]: TraceAbstraction took 23820.10 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -479.9 MB). Peak memory consumption was 938.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:32,761 INFO L168 Benchmark]: Witness Printer took 199.49 ms. Allocated memory is still 2.6 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 29.8 MB). Peak memory consumption was 29.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:32,764 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 875.20 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 148.4 MB). Free memory was 949.6 MB in the beginning and 1.1 GB in the end (delta: -155.5 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 80.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 42.18 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 838.22 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.8 MB). Peak memory consumption was 50.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 23820.10 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -479.9 MB). Peak memory consumption was 938.3 MB. Max. memory is 11.5 GB. * Witness Printer took 199.49 ms. Allocated memory is still 2.6 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 29.8 MB). Peak memory consumption was 29.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.3s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 26 ChoiceCompositions, 4376 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 58 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 46792 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t1202, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t1203, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1204, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L771] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L772] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L773] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L774] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L775] 3 y$r_buff0_thd3 = (_Bool)1 [L778] 3 z = 1 [L781] 3 __unbuffered_p2_EAX = z [L784] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L746] 2 x = 2 [L749] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L788] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L789] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L752] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L753] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L754] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L820] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L821] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L822] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L823] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L824] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 y$flush_delayed = weak$$choice2 [L830] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L832] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L833] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L834] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L835] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L837] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 23.5s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 6.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2089 SDtfs, 2201 SDslu, 4191 SDs, 0 SdLazy, 2064 SolverSat, 148 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 120 GetRequests, 13 SyntacticMatches, 12 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 174 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=32556occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.4s AutomataMinimizationTime, 17 MinimizatonAttempts, 31852 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 643 NumberOfCodeBlocks, 643 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 569 ConstructedInterpolants, 0 QuantifiedInterpolants, 101209 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...