./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix045_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix045_tso.oepc.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 193a3add3d9d4b806af7141f1aa33075fb27c3b6 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:16:16,594 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:16:16,596 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:16:16,615 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:16:16,616 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:16:16,618 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:16:16,620 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:16:16,630 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:16:16,636 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:16:16,639 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:16:16,641 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:16:16,643 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:16:16,643 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:16:16,646 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:16:16,647 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:16:16,649 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:16:16,650 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:16:16,651 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:16:16,654 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:16:16,659 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:16:16,664 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:16:16,668 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:16:16,670 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:16:16,672 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:16:16,676 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:16:16,676 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:16:16,677 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:16:16,679 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:16:16,679 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:16:16,680 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:16:16,681 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:16:16,683 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:16:16,684 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:16:16,685 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:16:16,686 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:16:16,687 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:16:16,688 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:16:16,688 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:16:16,688 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:16:16,689 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:16:16,690 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:16:16,691 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:16:16,706 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:16:16,707 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:16:16,708 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:16:16,709 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:16:16,709 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:16:16,709 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:16:16,710 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:16:16,710 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:16:16,710 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:16:16,710 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:16:16,711 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:16:16,711 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:16:16,711 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:16:16,712 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:16:16,714 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:16:16,714 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:16:16,714 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:16:16,715 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:16:16,715 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:16:16,715 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:16:16,716 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:16:16,716 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:16:16,717 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:16:16,717 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:16:16,717 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:16:16,718 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:16:16,718 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:16:16,719 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:16:16,719 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:16:16,720 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 193a3add3d9d4b806af7141f1aa33075fb27c3b6 [2019-11-28 18:16:17,047 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:16:17,068 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:16:17,071 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:16:17,073 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:16:17,075 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:16:17,075 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix045_tso.oepc.i [2019-11-28 18:16:17,155 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fe6e7eb68/e4047aed5f464825a47891fa7c8ef8a7/FLAGcb4a6a57d [2019-11-28 18:16:17,751 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:16:17,752 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix045_tso.oepc.i [2019-11-28 18:16:17,768 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fe6e7eb68/e4047aed5f464825a47891fa7c8ef8a7/FLAGcb4a6a57d [2019-11-28 18:16:17,961 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fe6e7eb68/e4047aed5f464825a47891fa7c8ef8a7 [2019-11-28 18:16:17,965 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:16:17,966 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:16:17,968 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:16:17,968 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:16:17,972 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:16:17,973 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:16:17" (1/1) ... [2019-11-28 18:16:17,976 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b1cb90c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:17, skipping insertion in model container [2019-11-28 18:16:17,977 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:16:17" (1/1) ... [2019-11-28 18:16:17,985 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:16:18,056 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:16:18,500 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:16:18,513 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:16:18,588 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:16:18,666 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:16:18,667 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18 WrapperNode [2019-11-28 18:16:18,667 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:16:18,668 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:16:18,668 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:16:18,668 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:16:18,678 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,700 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,748 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:16:18,749 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:16:18,749 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:16:18,749 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:16:18,760 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,760 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,765 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,766 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,776 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,780 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,784 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... [2019-11-28 18:16:18,790 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:16:18,790 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:16:18,790 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:16:18,791 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:16:18,792 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:16:18,870 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:16:18,870 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:16:18,870 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:16:18,871 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:16:18,874 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:16:18,875 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:16:18,875 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:16:18,875 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:16:18,875 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:16:18,876 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:16:18,876 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:16:18,877 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:16:18,877 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:16:18,881 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:16:19,587 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:16:19,587 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:16:19,590 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:19 BoogieIcfgContainer [2019-11-28 18:16:19,590 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:16:19,592 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:16:19,592 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:16:19,596 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:16:19,596 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:16:17" (1/3) ... [2019-11-28 18:16:19,598 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ca91beb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:16:19, skipping insertion in model container [2019-11-28 18:16:19,599 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:18" (2/3) ... [2019-11-28 18:16:19,600 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ca91beb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:16:19, skipping insertion in model container [2019-11-28 18:16:19,600 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:19" (3/3) ... [2019-11-28 18:16:19,604 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_tso.oepc.i [2019-11-28 18:16:19,617 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:16:19,618 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:16:19,631 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:16:19,632 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:16:19,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,689 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,690 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,693 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,693 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,703 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,703 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,704 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,705 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,705 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,708 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,709 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,709 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,710 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,710 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,715 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,715 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,715 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,716 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,716 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,716 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:19,740 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-11-28 18:16:19,757 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:16:19,757 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:16:19,757 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:16:19,757 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:16:19,758 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:16:19,758 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:16:19,758 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:16:19,758 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:16:19,775 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-11-28 18:16:19,777 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-11-28 18:16:19,886 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-11-28 18:16:19,887 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:16:19,908 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:16:19,932 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-11-28 18:16:20,026 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-11-28 18:16:20,027 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:16:20,037 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:16:20,057 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-11-28 18:16:20,059 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:16:22,726 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 32 [2019-11-28 18:16:24,963 WARN L192 SmtUtils]: Spent 288.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-11-28 18:16:25,087 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2019-11-28 18:16:25,111 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46792 [2019-11-28 18:16:25,112 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-11-28 18:16:25,116 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-11-28 18:16:26,325 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16134 states. [2019-11-28 18:16:26,327 INFO L276 IsEmpty]: Start isEmpty. Operand 16134 states. [2019-11-28 18:16:26,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-11-28 18:16:26,333 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:26,334 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:26,335 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:26,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:26,340 INFO L82 PathProgramCache]: Analyzing trace with hash 1643101290, now seen corresponding path program 1 times [2019-11-28 18:16:26,347 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:26,348 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120397253] [2019-11-28 18:16:26,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:26,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:26,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:26,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120397253] [2019-11-28 18:16:26,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:26,741 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:16:26,742 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1333103919] [2019-11-28 18:16:26,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:26,748 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:26,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:26,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:26,768 INFO L87 Difference]: Start difference. First operand 16134 states. Second operand 3 states. [2019-11-28 18:16:27,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:27,156 INFO L93 Difference]: Finished difference Result 16034 states and 60310 transitions. [2019-11-28 18:16:27,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:27,158 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-11-28 18:16:27,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:27,332 INFO L225 Difference]: With dead ends: 16034 [2019-11-28 18:16:27,332 INFO L226 Difference]: Without dead ends: 15698 [2019-11-28 18:16:27,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:27,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15698 states. [2019-11-28 18:16:28,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15698 to 15698. [2019-11-28 18:16:28,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15698 states. [2019-11-28 18:16:28,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15698 states to 15698 states and 59106 transitions. [2019-11-28 18:16:28,199 INFO L78 Accepts]: Start accepts. Automaton has 15698 states and 59106 transitions. Word has length 7 [2019-11-28 18:16:28,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:28,200 INFO L462 AbstractCegarLoop]: Abstraction has 15698 states and 59106 transitions. [2019-11-28 18:16:28,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:28,201 INFO L276 IsEmpty]: Start isEmpty. Operand 15698 states and 59106 transitions. [2019-11-28 18:16:28,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:16:28,206 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:28,206 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:28,207 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:28,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:28,208 INFO L82 PathProgramCache]: Analyzing trace with hash 565568960, now seen corresponding path program 1 times [2019-11-28 18:16:28,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:28,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267074413] [2019-11-28 18:16:28,209 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:28,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:28,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:28,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267074413] [2019-11-28 18:16:28,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:28,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:28,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948595320] [2019-11-28 18:16:28,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:28,357 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:28,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:28,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:28,358 INFO L87 Difference]: Start difference. First operand 15698 states and 59106 transitions. Second operand 4 states. [2019-11-28 18:16:29,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:29,135 INFO L93 Difference]: Finished difference Result 24414 states and 88322 transitions. [2019-11-28 18:16:29,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:29,136 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:16:29,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:29,260 INFO L225 Difference]: With dead ends: 24414 [2019-11-28 18:16:29,260 INFO L226 Difference]: Without dead ends: 24400 [2019-11-28 18:16:29,261 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:29,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24400 states. [2019-11-28 18:16:30,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24400 to 22284. [2019-11-28 18:16:30,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22284 states. [2019-11-28 18:16:30,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22284 states to 22284 states and 81513 transitions. [2019-11-28 18:16:30,470 INFO L78 Accepts]: Start accepts. Automaton has 22284 states and 81513 transitions. Word has length 13 [2019-11-28 18:16:30,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:30,471 INFO L462 AbstractCegarLoop]: Abstraction has 22284 states and 81513 transitions. [2019-11-28 18:16:30,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:30,471 INFO L276 IsEmpty]: Start isEmpty. Operand 22284 states and 81513 transitions. [2019-11-28 18:16:30,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:16:30,478 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:30,478 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:30,478 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:30,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:30,479 INFO L82 PathProgramCache]: Analyzing trace with hash 1863901117, now seen corresponding path program 1 times [2019-11-28 18:16:30,479 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:30,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [765645029] [2019-11-28 18:16:30,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:30,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:30,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:30,587 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [765645029] [2019-11-28 18:16:30,587 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:30,587 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:30,587 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043038511] [2019-11-28 18:16:30,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:30,588 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:30,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:30,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:30,589 INFO L87 Difference]: Start difference. First operand 22284 states and 81513 transitions. Second operand 3 states. [2019-11-28 18:16:30,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:30,668 INFO L93 Difference]: Finished difference Result 12731 states and 40311 transitions. [2019-11-28 18:16:30,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:30,668 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-11-28 18:16:30,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:30,714 INFO L225 Difference]: With dead ends: 12731 [2019-11-28 18:16:30,714 INFO L226 Difference]: Without dead ends: 12731 [2019-11-28 18:16:30,715 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:30,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12731 states. [2019-11-28 18:16:31,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12731 to 12731. [2019-11-28 18:16:31,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12731 states. [2019-11-28 18:16:31,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12731 states to 12731 states and 40311 transitions. [2019-11-28 18:16:31,086 INFO L78 Accepts]: Start accepts. Automaton has 12731 states and 40311 transitions. Word has length 13 [2019-11-28 18:16:31,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:31,087 INFO L462 AbstractCegarLoop]: Abstraction has 12731 states and 40311 transitions. [2019-11-28 18:16:31,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:31,087 INFO L276 IsEmpty]: Start isEmpty. Operand 12731 states and 40311 transitions. [2019-11-28 18:16:31,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:16:31,089 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:31,089 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:31,089 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:31,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:31,090 INFO L82 PathProgramCache]: Analyzing trace with hash -709244429, now seen corresponding path program 1 times [2019-11-28 18:16:31,090 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:31,090 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374409141] [2019-11-28 18:16:31,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:31,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:31,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:31,164 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374409141] [2019-11-28 18:16:31,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:31,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:31,165 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [377753167] [2019-11-28 18:16:31,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:31,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:31,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:31,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:31,166 INFO L87 Difference]: Start difference. First operand 12731 states and 40311 transitions. Second operand 4 states. [2019-11-28 18:16:31,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:31,424 INFO L93 Difference]: Finished difference Result 15391 states and 48077 transitions. [2019-11-28 18:16:31,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:31,424 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:16:31,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:31,481 INFO L225 Difference]: With dead ends: 15391 [2019-11-28 18:16:31,482 INFO L226 Difference]: Without dead ends: 15391 [2019-11-28 18:16:31,482 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:31,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15391 states. [2019-11-28 18:16:31,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15391 to 13966. [2019-11-28 18:16:31,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13966 states. [2019-11-28 18:16:31,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13966 states to 13966 states and 44017 transitions. [2019-11-28 18:16:31,899 INFO L78 Accepts]: Start accepts. Automaton has 13966 states and 44017 transitions. Word has length 14 [2019-11-28 18:16:31,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:31,900 INFO L462 AbstractCegarLoop]: Abstraction has 13966 states and 44017 transitions. [2019-11-28 18:16:31,900 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:31,901 INFO L276 IsEmpty]: Start isEmpty. Operand 13966 states and 44017 transitions. [2019-11-28 18:16:31,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-11-28 18:16:31,905 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:31,905 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:31,906 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:31,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:31,906 INFO L82 PathProgramCache]: Analyzing trace with hash 1059334979, now seen corresponding path program 1 times [2019-11-28 18:16:31,907 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:31,907 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126042808] [2019-11-28 18:16:31,907 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:31,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:32,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:32,012 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126042808] [2019-11-28 18:16:32,012 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:32,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:32,013 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367463609] [2019-11-28 18:16:32,013 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:32,013 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:32,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:32,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:32,014 INFO L87 Difference]: Start difference. First operand 13966 states and 44017 transitions. Second operand 5 states. [2019-11-28 18:16:32,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:32,741 INFO L93 Difference]: Finished difference Result 18476 states and 56975 transitions. [2019-11-28 18:16:32,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:16:32,742 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2019-11-28 18:16:32,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:32,811 INFO L225 Difference]: With dead ends: 18476 [2019-11-28 18:16:32,811 INFO L226 Difference]: Without dead ends: 18469 [2019-11-28 18:16:32,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:16:32,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18469 states. [2019-11-28 18:16:33,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18469 to 14127. [2019-11-28 18:16:33,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14127 states. [2019-11-28 18:16:33,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14127 states to 14127 states and 44412 transitions. [2019-11-28 18:16:33,280 INFO L78 Accepts]: Start accepts. Automaton has 14127 states and 44412 transitions. Word has length 20 [2019-11-28 18:16:33,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:33,281 INFO L462 AbstractCegarLoop]: Abstraction has 14127 states and 44412 transitions. [2019-11-28 18:16:33,281 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:33,281 INFO L276 IsEmpty]: Start isEmpty. Operand 14127 states and 44412 transitions. [2019-11-28 18:16:33,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-11-28 18:16:33,302 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:33,302 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:33,303 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:33,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:33,303 INFO L82 PathProgramCache]: Analyzing trace with hash 1629892990, now seen corresponding path program 1 times [2019-11-28 18:16:33,304 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:33,304 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494099509] [2019-11-28 18:16:33,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:33,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:33,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:33,427 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [494099509] [2019-11-28 18:16:33,427 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:33,427 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:33,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569422258] [2019-11-28 18:16:33,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:33,430 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:33,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:33,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:33,432 INFO L87 Difference]: Start difference. First operand 14127 states and 44412 transitions. Second operand 4 states. [2019-11-28 18:16:33,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:33,466 INFO L93 Difference]: Finished difference Result 2152 states and 4956 transitions. [2019-11-28 18:16:33,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:16:33,467 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-11-28 18:16:33,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:33,476 INFO L225 Difference]: With dead ends: 2152 [2019-11-28 18:16:33,477 INFO L226 Difference]: Without dead ends: 2152 [2019-11-28 18:16:33,478 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:33,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2152 states. [2019-11-28 18:16:33,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2152 to 2152. [2019-11-28 18:16:33,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2152 states. [2019-11-28 18:16:33,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2152 states to 2152 states and 4956 transitions. [2019-11-28 18:16:33,524 INFO L78 Accepts]: Start accepts. Automaton has 2152 states and 4956 transitions. Word has length 28 [2019-11-28 18:16:33,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:33,525 INFO L462 AbstractCegarLoop]: Abstraction has 2152 states and 4956 transitions. [2019-11-28 18:16:33,525 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:33,526 INFO L276 IsEmpty]: Start isEmpty. Operand 2152 states and 4956 transitions. [2019-11-28 18:16:33,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-11-28 18:16:33,533 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:33,534 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:33,534 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:33,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:33,535 INFO L82 PathProgramCache]: Analyzing trace with hash -1098055765, now seen corresponding path program 1 times [2019-11-28 18:16:33,535 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:33,536 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787679288] [2019-11-28 18:16:33,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:33,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:34,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:34,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787679288] [2019-11-28 18:16:34,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:34,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:16:34,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2014957800] [2019-11-28 18:16:34,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-28 18:16:34,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:34,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-28 18:16:34,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:16:34,051 INFO L87 Difference]: Start difference. First operand 2152 states and 4956 transitions. Second operand 9 states. [2019-11-28 18:16:34,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:34,772 INFO L93 Difference]: Finished difference Result 2746 states and 6139 transitions. [2019-11-28 18:16:34,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-28 18:16:34,772 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 40 [2019-11-28 18:16:34,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:34,785 INFO L225 Difference]: With dead ends: 2746 [2019-11-28 18:16:34,786 INFO L226 Difference]: Without dead ends: 2744 [2019-11-28 18:16:34,786 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2019-11-28 18:16:34,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2744 states. [2019-11-28 18:16:34,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2744 to 2480. [2019-11-28 18:16:34,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2480 states. [2019-11-28 18:16:34,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2480 states to 2480 states and 5620 transitions. [2019-11-28 18:16:34,838 INFO L78 Accepts]: Start accepts. Automaton has 2480 states and 5620 transitions. Word has length 40 [2019-11-28 18:16:34,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:34,839 INFO L462 AbstractCegarLoop]: Abstraction has 2480 states and 5620 transitions. [2019-11-28 18:16:34,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-28 18:16:34,839 INFO L276 IsEmpty]: Start isEmpty. Operand 2480 states and 5620 transitions. [2019-11-28 18:16:34,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-28 18:16:34,845 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:34,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:34,846 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:34,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:34,846 INFO L82 PathProgramCache]: Analyzing trace with hash -1391456385, now seen corresponding path program 1 times [2019-11-28 18:16:34,847 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:34,847 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820943832] [2019-11-28 18:16:34,847 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:34,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:34,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:34,933 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820943832] [2019-11-28 18:16:34,933 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:34,933 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:34,934 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588633676] [2019-11-28 18:16:34,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:34,935 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:34,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:34,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:34,935 INFO L87 Difference]: Start difference. First operand 2480 states and 5620 transitions. Second operand 3 states. [2019-11-28 18:16:34,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:34,990 INFO L93 Difference]: Finished difference Result 2909 states and 6615 transitions. [2019-11-28 18:16:34,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:34,991 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-11-28 18:16:34,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:34,997 INFO L225 Difference]: With dead ends: 2909 [2019-11-28 18:16:34,997 INFO L226 Difference]: Without dead ends: 2909 [2019-11-28 18:16:34,998 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:35,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2909 states. [2019-11-28 18:16:35,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2909 to 2691. [2019-11-28 18:16:35,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2691 states. [2019-11-28 18:16:35,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2691 states to 2691 states and 6180 transitions. [2019-11-28 18:16:35,055 INFO L78 Accepts]: Start accepts. Automaton has 2691 states and 6180 transitions. Word has length 44 [2019-11-28 18:16:35,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:35,056 INFO L462 AbstractCegarLoop]: Abstraction has 2691 states and 6180 transitions. [2019-11-28 18:16:35,057 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:35,057 INFO L276 IsEmpty]: Start isEmpty. Operand 2691 states and 6180 transitions. [2019-11-28 18:16:35,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-28 18:16:35,065 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:35,065 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:35,066 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:35,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:35,066 INFO L82 PathProgramCache]: Analyzing trace with hash 1730614486, now seen corresponding path program 1 times [2019-11-28 18:16:35,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:35,072 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309208791] [2019-11-28 18:16:35,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:35,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:35,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:35,150 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [309208791] [2019-11-28 18:16:35,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:35,151 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:35,151 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [706391676] [2019-11-28 18:16:35,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:35,151 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:35,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:35,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:35,154 INFO L87 Difference]: Start difference. First operand 2691 states and 6180 transitions. Second operand 3 states. [2019-11-28 18:16:35,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:35,204 INFO L93 Difference]: Finished difference Result 2807 states and 6187 transitions. [2019-11-28 18:16:35,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:35,204 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-11-28 18:16:35,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:35,208 INFO L225 Difference]: With dead ends: 2807 [2019-11-28 18:16:35,209 INFO L226 Difference]: Without dead ends: 2807 [2019-11-28 18:16:35,209 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:35,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2807 states. [2019-11-28 18:16:35,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2807 to 2501. [2019-11-28 18:16:35,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2501 states. [2019-11-28 18:16:35,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2501 states to 2501 states and 5584 transitions. [2019-11-28 18:16:35,252 INFO L78 Accepts]: Start accepts. Automaton has 2501 states and 5584 transitions. Word has length 44 [2019-11-28 18:16:35,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:35,254 INFO L462 AbstractCegarLoop]: Abstraction has 2501 states and 5584 transitions. [2019-11-28 18:16:35,255 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:35,255 INFO L276 IsEmpty]: Start isEmpty. Operand 2501 states and 5584 transitions. [2019-11-28 18:16:35,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-28 18:16:35,261 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:35,261 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:35,262 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:35,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:35,262 INFO L82 PathProgramCache]: Analyzing trace with hash 1726174666, now seen corresponding path program 1 times [2019-11-28 18:16:35,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:35,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090192362] [2019-11-28 18:16:35,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:35,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:35,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:35,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090192362] [2019-11-28 18:16:35,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:35,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:35,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568450632] [2019-11-28 18:16:35,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:35,401 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:35,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:35,404 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:35,404 INFO L87 Difference]: Start difference. First operand 2501 states and 5584 transitions. Second operand 3 states. [2019-11-28 18:16:35,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:35,458 INFO L93 Difference]: Finished difference Result 2501 states and 5558 transitions. [2019-11-28 18:16:35,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:35,459 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-11-28 18:16:35,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:35,463 INFO L225 Difference]: With dead ends: 2501 [2019-11-28 18:16:35,463 INFO L226 Difference]: Without dead ends: 2501 [2019-11-28 18:16:35,463 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:35,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2501 states. [2019-11-28 18:16:35,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2501 to 2501. [2019-11-28 18:16:35,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2501 states. [2019-11-28 18:16:35,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2501 states to 2501 states and 5558 transitions. [2019-11-28 18:16:35,502 INFO L78 Accepts]: Start accepts. Automaton has 2501 states and 5558 transitions. Word has length 44 [2019-11-28 18:16:35,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:35,502 INFO L462 AbstractCegarLoop]: Abstraction has 2501 states and 5558 transitions. [2019-11-28 18:16:35,502 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:35,503 INFO L276 IsEmpty]: Start isEmpty. Operand 2501 states and 5558 transitions. [2019-11-28 18:16:35,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-28 18:16:35,508 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:35,509 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:35,509 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:35,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:35,509 INFO L82 PathProgramCache]: Analyzing trace with hash -582543129, now seen corresponding path program 1 times [2019-11-28 18:16:35,510 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:35,510 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [559468397] [2019-11-28 18:16:35,510 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:35,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:35,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:35,808 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [559468397] [2019-11-28 18:16:35,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:35,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:35,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1056044189] [2019-11-28 18:16:35,809 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:35,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:35,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:35,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:35,810 INFO L87 Difference]: Start difference. First operand 2501 states and 5558 transitions. Second operand 5 states. [2019-11-28 18:16:35,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:35,845 INFO L93 Difference]: Finished difference Result 683 states and 1561 transitions. [2019-11-28 18:16:35,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:35,847 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-28 18:16:35,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:35,848 INFO L225 Difference]: With dead ends: 683 [2019-11-28 18:16:35,849 INFO L226 Difference]: Without dead ends: 683 [2019-11-28 18:16:35,849 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:35,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 683 states. [2019-11-28 18:16:35,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 683 to 627. [2019-11-28 18:16:35,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 627 states. [2019-11-28 18:16:35,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 627 states to 627 states and 1429 transitions. [2019-11-28 18:16:35,859 INFO L78 Accepts]: Start accepts. Automaton has 627 states and 1429 transitions. Word has length 45 [2019-11-28 18:16:35,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:35,859 INFO L462 AbstractCegarLoop]: Abstraction has 627 states and 1429 transitions. [2019-11-28 18:16:35,860 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:35,860 INFO L276 IsEmpty]: Start isEmpty. Operand 627 states and 1429 transitions. [2019-11-28 18:16:35,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:16:35,863 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:35,863 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:35,863 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:35,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:35,864 INFO L82 PathProgramCache]: Analyzing trace with hash -502873348, now seen corresponding path program 1 times [2019-11-28 18:16:35,864 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:35,864 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555615990] [2019-11-28 18:16:35,865 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:35,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:35,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:35,930 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555615990] [2019-11-28 18:16:35,930 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:35,930 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:35,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1892492155] [2019-11-28 18:16:35,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:35,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:35,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:35,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:35,931 INFO L87 Difference]: Start difference. First operand 627 states and 1429 transitions. Second operand 3 states. [2019-11-28 18:16:35,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:35,944 INFO L93 Difference]: Finished difference Result 603 states and 1345 transitions. [2019-11-28 18:16:35,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:35,945 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-11-28 18:16:35,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:35,946 INFO L225 Difference]: With dead ends: 603 [2019-11-28 18:16:35,946 INFO L226 Difference]: Without dead ends: 603 [2019-11-28 18:16:35,946 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:35,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 603 states. [2019-11-28 18:16:35,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 603 to 603. [2019-11-28 18:16:35,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 603 states. [2019-11-28 18:16:35,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 603 states to 603 states and 1345 transitions. [2019-11-28 18:16:35,956 INFO L78 Accepts]: Start accepts. Automaton has 603 states and 1345 transitions. Word has length 56 [2019-11-28 18:16:35,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:35,956 INFO L462 AbstractCegarLoop]: Abstraction has 603 states and 1345 transitions. [2019-11-28 18:16:35,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:35,957 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 1345 transitions. [2019-11-28 18:16:35,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:35,958 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:35,958 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:35,959 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:35,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:35,959 INFO L82 PathProgramCache]: Analyzing trace with hash -897693906, now seen corresponding path program 1 times [2019-11-28 18:16:35,960 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:35,960 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024430591] [2019-11-28 18:16:35,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:35,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:36,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:36,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1024430591] [2019-11-28 18:16:36,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:36,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:16:36,129 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204225706] [2019-11-28 18:16:36,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:16:36,131 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:36,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:16:36,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:16:36,136 INFO L87 Difference]: Start difference. First operand 603 states and 1345 transitions. Second operand 7 states. [2019-11-28 18:16:36,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:36,268 INFO L93 Difference]: Finished difference Result 1140 states and 2330 transitions. [2019-11-28 18:16:36,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:16:36,269 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 57 [2019-11-28 18:16:36,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:36,271 INFO L225 Difference]: With dead ends: 1140 [2019-11-28 18:16:36,272 INFO L226 Difference]: Without dead ends: 761 [2019-11-28 18:16:36,272 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:16:36,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 761 states. [2019-11-28 18:16:36,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 761 to 541. [2019-11-28 18:16:36,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 541 states. [2019-11-28 18:16:36,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 541 states to 541 states and 1166 transitions. [2019-11-28 18:16:36,287 INFO L78 Accepts]: Start accepts. Automaton has 541 states and 1166 transitions. Word has length 57 [2019-11-28 18:16:36,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:36,287 INFO L462 AbstractCegarLoop]: Abstraction has 541 states and 1166 transitions. [2019-11-28 18:16:36,287 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:16:36,287 INFO L276 IsEmpty]: Start isEmpty. Operand 541 states and 1166 transitions. [2019-11-28 18:16:36,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:36,289 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:36,289 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:36,289 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:36,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:36,290 INFO L82 PathProgramCache]: Analyzing trace with hash 704044892, now seen corresponding path program 2 times [2019-11-28 18:16:36,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:36,291 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698039465] [2019-11-28 18:16:36,292 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:36,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:36,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:36,496 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698039465] [2019-11-28 18:16:36,496 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:36,496 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:16:36,496 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182735361] [2019-11-28 18:16:36,497 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:16:36,497 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:36,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:16:36,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:16:36,497 INFO L87 Difference]: Start difference. First operand 541 states and 1166 transitions. Second operand 6 states. [2019-11-28 18:16:36,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:36,601 INFO L93 Difference]: Finished difference Result 776 states and 1618 transitions. [2019-11-28 18:16:36,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:16:36,601 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 57 [2019-11-28 18:16:36,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:36,602 INFO L225 Difference]: With dead ends: 776 [2019-11-28 18:16:36,602 INFO L226 Difference]: Without dead ends: 233 [2019-11-28 18:16:36,602 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:16:36,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2019-11-28 18:16:36,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 209. [2019-11-28 18:16:36,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-11-28 18:16:36,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 361 transitions. [2019-11-28 18:16:36,607 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 361 transitions. Word has length 57 [2019-11-28 18:16:36,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:36,608 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 361 transitions. [2019-11-28 18:16:36,608 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:16:36,608 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 361 transitions. [2019-11-28 18:16:36,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:36,609 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:36,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:36,609 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:36,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:36,610 INFO L82 PathProgramCache]: Analyzing trace with hash -876750572, now seen corresponding path program 3 times [2019-11-28 18:16:36,610 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:36,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573062428] [2019-11-28 18:16:36,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:36,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:36,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:36,882 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573062428] [2019-11-28 18:16:36,883 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:36,883 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:16:36,883 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176297289] [2019-11-28 18:16:36,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:16:36,884 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:36,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:16:36,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:16:36,885 INFO L87 Difference]: Start difference. First operand 209 states and 361 transitions. Second operand 13 states. [2019-11-28 18:16:37,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:37,357 INFO L93 Difference]: Finished difference Result 360 states and 604 transitions. [2019-11-28 18:16:37,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:16:37,358 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-11-28 18:16:37,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:37,359 INFO L225 Difference]: With dead ends: 360 [2019-11-28 18:16:37,359 INFO L226 Difference]: Without dead ends: 327 [2019-11-28 18:16:37,359 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=90, Invalid=416, Unknown=0, NotChecked=0, Total=506 [2019-11-28 18:16:37,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2019-11-28 18:16:37,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 317. [2019-11-28 18:16:37,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-11-28 18:16:37,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 546 transitions. [2019-11-28 18:16:37,365 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 546 transitions. Word has length 57 [2019-11-28 18:16:37,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:37,366 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 546 transitions. [2019-11-28 18:16:37,366 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:16:37,366 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 546 transitions. [2019-11-28 18:16:37,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:37,367 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:37,367 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:37,368 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:37,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:37,368 INFO L82 PathProgramCache]: Analyzing trace with hash -1963724718, now seen corresponding path program 4 times [2019-11-28 18:16:37,369 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:37,369 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1106928095] [2019-11-28 18:16:37,369 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:37,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:16:37,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:16:37,510 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:16:37,512 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:16:37,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1211~0.base_25|) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1211~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1211~0.base_25|) |v_ULTIMATE.start_main_~#t1211~0.offset_19| 0)) |v_#memory_int_21|) (= v_~main$tmp_guard0~0_23 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1211~0.base_25| 4) |v_#length_23|) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1211~0.base_25| 1)) (= v_~a~0_45 0) (= |v_ULTIMATE.start_main_~#t1211~0.offset_19| 0) (= v_~y~0_155 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1211~0.base_25|)) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1213~0.base=|v_ULTIMATE.start_main_~#t1213~0.base_25|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ULTIMATE.start_main_~#t1213~0.offset=|v_ULTIMATE.start_main_~#t1213~0.offset_19|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_25|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_25|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_19|, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1213~0.base, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1213~0.offset, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1211~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t1212~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_~#t1211~0.offset, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:37,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1212~0.base_13|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1212~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1212~0.base_13|) |v_ULTIMATE.start_main_~#t1212~0.offset_11| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1212~0.base_13| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1212~0.base_13|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1212~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t1212~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1212~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_11|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_~#t1212~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:16:37,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1213~0.base_13| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1213~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1213~0.base_13|) |v_ULTIMATE.start_main_~#t1213~0.offset_11| 2)) |v_#memory_int_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1213~0.base_13| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1213~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t1213~0.base_13| 0)) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1213~0.base_13|) 0) (= |v_ULTIMATE.start_main_~#t1213~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1213~0.base=|v_ULTIMATE.start_main_~#t1213~0.base_13|, ULTIMATE.start_main_~#t1213~0.offset=|v_ULTIMATE.start_main_~#t1213~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1213~0.base, ULTIMATE.start_main_~#t1213~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-11-28 18:16:37,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:37,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:16:37,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In218932195 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In218932195 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out218932195| ~y$w_buff0_used~0_In218932195)) (and (= |P2Thread1of1ForFork0_#t~ite11_Out218932195| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In218932195, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In218932195} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In218932195, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out218932195|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In218932195} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:16:37,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In740642161 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In740642161 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In740642161 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In740642161 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out740642161| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite12_Out740642161| ~y$w_buff1_used~0_In740642161) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In740642161, ~y$w_buff0_used~0=~y$w_buff0_used~0_In740642161, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In740642161, ~y$w_buff1_used~0=~y$w_buff1_used~0_In740642161} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In740642161, ~y$w_buff0_used~0=~y$w_buff0_used~0_In740642161, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out740642161|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In740642161, ~y$w_buff1_used~0=~y$w_buff1_used~0_In740642161} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:16:37,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1358093944 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1358093944 256) 0)) (.cse2 (= ~y$r_buff0_thd3~0_In-1358093944 ~y$r_buff0_thd3~0_Out-1358093944))) (or (and (not .cse0) (= 0 ~y$r_buff0_thd3~0_Out-1358093944) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1358093944, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1358093944} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1358093944, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1358093944, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1358093944|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:16:37,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1050405150 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1050405150 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1050405150 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd3~0_In1050405150 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite14_Out1050405150|)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite14_Out1050405150| ~y$r_buff1_thd3~0_In1050405150)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1050405150, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1050405150, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1050405150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1050405150} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1050405150|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1050405150, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1050405150, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1050405150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1050405150} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:16:37,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:16:37,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1832238425 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In1832238425 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out1832238425| ~y$w_buff1~0_In1832238425)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out1832238425| ~y~0_In1832238425) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1832238425, ~y$w_buff1~0=~y$w_buff1~0_In1832238425, ~y~0=~y~0_In1832238425, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832238425} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1832238425, ~y$w_buff1~0=~y$w_buff1~0_In1832238425, ~y~0=~y~0_In1832238425, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out1832238425|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832238425} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:37,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:37,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1378897744 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1378897744 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out1378897744|) (not .cse1)) (and (= ~y$w_buff0_used~0_In1378897744 |P1Thread1of1ForFork2_#t~ite5_Out1378897744|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1378897744, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1378897744} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1378897744, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1378897744, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1378897744|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:16:37,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1464932229 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1464932229 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In1464932229 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In1464932229 256) 0))) (or (and (= ~y$w_buff1_used~0_In1464932229 |P1Thread1of1ForFork2_#t~ite6_Out1464932229|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite6_Out1464932229|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464932229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464932229, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464932229, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464932229} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464932229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464932229, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464932229, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1464932229|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464932229} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:16:37,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1012880003 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1012880003 256)))) (or (and (= ~y$r_buff0_thd2~0_In-1012880003 |P1Thread1of1ForFork2_#t~ite7_Out-1012880003|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-1012880003|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1012880003, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1012880003} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1012880003, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1012880003, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-1012880003|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:16:37,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In893464797 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In893464797 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In893464797 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In893464797 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In893464797 |P1Thread1of1ForFork2_#t~ite8_Out893464797|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out893464797|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In893464797, ~y$w_buff0_used~0=~y$w_buff0_used~0_In893464797, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In893464797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In893464797} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In893464797, ~y$w_buff0_used~0=~y$w_buff0_used~0_In893464797, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out893464797|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In893464797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In893464797} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:16:37,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:16:37,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:16:37,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-535036463| |ULTIMATE.start_main_#t~ite19_Out-535036463|)) (.cse1 (= (mod ~y$w_buff1_used~0_In-535036463 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-535036463 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite18_Out-535036463| ~y~0_In-535036463)) (and .cse0 (= ~y$w_buff1~0_In-535036463 |ULTIMATE.start_main_#t~ite18_Out-535036463|) (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-535036463, ~y~0=~y~0_In-535036463, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-535036463, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-535036463} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-535036463, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-535036463|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-535036463|, ~y~0=~y~0_In-535036463, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-535036463, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-535036463} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:16:37,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-447245215 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-447245215 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out-447245215|)) (and (= ~y$w_buff0_used~0_In-447245215 |ULTIMATE.start_main_#t~ite20_Out-447245215|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-447245215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-447245215} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-447245215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-447245215, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-447245215|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:16:37,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd0~0_In647016024 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In647016024 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In647016024 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In647016024 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out647016024| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite21_Out647016024| ~y$w_buff1_used~0_In647016024) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In647016024, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In647016024, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In647016024, ~y$w_buff1_used~0=~y$w_buff1_used~0_In647016024} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In647016024, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In647016024, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out647016024|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In647016024, ~y$w_buff1_used~0=~y$w_buff1_used~0_In647016024} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:16:37,531 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-107325694 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-107325694 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-107325694| ~y$r_buff0_thd0~0_In-107325694) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out-107325694| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-107325694, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-107325694} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-107325694, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-107325694, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-107325694|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:16:37,531 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In1967538959 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1967538959 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1967538959 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1967538959 256)))) (or (and (= ~y$r_buff1_thd0~0_In1967538959 |ULTIMATE.start_main_#t~ite23_Out1967538959|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite23_Out1967538959|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1967538959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1967538959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1967538959, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1967538959} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1967538959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1967538959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1967538959, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1967538959|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1967538959} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:16:37,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1503414513 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1503414513 |ULTIMATE.start_main_#t~ite33_Out-1503414513|) (= |ULTIMATE.start_main_#t~ite32_In-1503414513| |ULTIMATE.start_main_#t~ite32_Out-1503414513|)) (and (= |ULTIMATE.start_main_#t~ite33_Out-1503414513| |ULTIMATE.start_main_#t~ite32_Out-1503414513|) (= ~y$w_buff1~0_In-1503414513 |ULTIMATE.start_main_#t~ite32_Out-1503414513|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1503414513 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In-1503414513 256) 0) .cse1) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-1503414513 256))) (= (mod ~y$w_buff0_used~0_In-1503414513 256) 0))) .cse0))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1503414513, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In-1503414513|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1503414513, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1503414513|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-1503414513|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:16:37,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In994565484 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite36_Out994565484| |ULTIMATE.start_main_#t~ite35_Out994565484|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In994565484 256)))) (or (= (mod ~y$w_buff0_used~0_In994565484 256) 0) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In994565484 256))) (and (= 0 (mod ~y$w_buff1_used~0_In994565484 256)) .cse0))) (= |ULTIMATE.start_main_#t~ite35_Out994565484| ~y$w_buff0_used~0_In994565484) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite36_Out994565484| ~y$w_buff0_used~0_In994565484) (= |ULTIMATE.start_main_#t~ite35_In994565484| |ULTIMATE.start_main_#t~ite35_Out994565484|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In994565484|, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out994565484|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out994565484|, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:16:37,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2043454181 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) (= |ULTIMATE.start_main_#t~ite38_In-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|)) (and (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2043454181 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-2043454181 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2043454181 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-2043454181 256))))) (= |ULTIMATE.start_main_#t~ite38_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-2043454181|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:16:37,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:16:37,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:16:37,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:16:37,651 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:16:37 BasicIcfg [2019-11-28 18:16:37,652 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:16:37,652 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:16:37,652 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:16:37,657 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:16:37,658 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:19" (3/4) ... [2019-11-28 18:16:37,660 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:16:37,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1211~0.base_25|) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1211~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1211~0.base_25|) |v_ULTIMATE.start_main_~#t1211~0.offset_19| 0)) |v_#memory_int_21|) (= v_~main$tmp_guard0~0_23 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1211~0.base_25| 4) |v_#length_23|) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1211~0.base_25| 1)) (= v_~a~0_45 0) (= |v_ULTIMATE.start_main_~#t1211~0.offset_19| 0) (= v_~y~0_155 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1211~0.base_25|)) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1213~0.base=|v_ULTIMATE.start_main_~#t1213~0.base_25|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ULTIMATE.start_main_~#t1213~0.offset=|v_ULTIMATE.start_main_~#t1213~0.offset_19|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_25|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_25|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_19|, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1213~0.base, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1213~0.offset, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1211~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t1212~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_~#t1211~0.offset, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:37,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1212~0.base_13|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1212~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1212~0.base_13|) |v_ULTIMATE.start_main_~#t1212~0.offset_11| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1212~0.base_13| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1212~0.base_13|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1212~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t1212~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1212~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_11|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_~#t1212~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:16:37,662 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1213~0.base_13| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1213~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1213~0.base_13|) |v_ULTIMATE.start_main_~#t1213~0.offset_11| 2)) |v_#memory_int_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1213~0.base_13| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1213~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t1213~0.base_13| 0)) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1213~0.base_13|) 0) (= |v_ULTIMATE.start_main_~#t1213~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1213~0.base=|v_ULTIMATE.start_main_~#t1213~0.base_13|, ULTIMATE.start_main_~#t1213~0.offset=|v_ULTIMATE.start_main_~#t1213~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1213~0.base, ULTIMATE.start_main_~#t1213~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-11-28 18:16:37,662 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:37,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:16:37,665 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In218932195 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In218932195 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out218932195| ~y$w_buff0_used~0_In218932195)) (and (= |P2Thread1of1ForFork0_#t~ite11_Out218932195| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In218932195, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In218932195} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In218932195, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out218932195|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In218932195} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:16:37,665 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In740642161 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In740642161 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In740642161 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In740642161 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out740642161| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite12_Out740642161| ~y$w_buff1_used~0_In740642161) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In740642161, ~y$w_buff0_used~0=~y$w_buff0_used~0_In740642161, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In740642161, ~y$w_buff1_used~0=~y$w_buff1_used~0_In740642161} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In740642161, ~y$w_buff0_used~0=~y$w_buff0_used~0_In740642161, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out740642161|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In740642161, ~y$w_buff1_used~0=~y$w_buff1_used~0_In740642161} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:16:37,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1358093944 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1358093944 256) 0)) (.cse2 (= ~y$r_buff0_thd3~0_In-1358093944 ~y$r_buff0_thd3~0_Out-1358093944))) (or (and (not .cse0) (= 0 ~y$r_buff0_thd3~0_Out-1358093944) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1358093944, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1358093944} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1358093944, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1358093944, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1358093944|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:16:37,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1050405150 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1050405150 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1050405150 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd3~0_In1050405150 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite14_Out1050405150|)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite14_Out1050405150| ~y$r_buff1_thd3~0_In1050405150)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1050405150, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1050405150, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1050405150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1050405150} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1050405150|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1050405150, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1050405150, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1050405150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1050405150} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:16:37,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:16:37,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1832238425 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In1832238425 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out1832238425| ~y$w_buff1~0_In1832238425)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out1832238425| ~y~0_In1832238425) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1832238425, ~y$w_buff1~0=~y$w_buff1~0_In1832238425, ~y~0=~y~0_In1832238425, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832238425} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1832238425, ~y$w_buff1~0=~y$w_buff1~0_In1832238425, ~y~0=~y~0_In1832238425, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out1832238425|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832238425} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:37,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:37,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1378897744 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1378897744 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out1378897744|) (not .cse1)) (and (= ~y$w_buff0_used~0_In1378897744 |P1Thread1of1ForFork2_#t~ite5_Out1378897744|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1378897744, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1378897744} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1378897744, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1378897744, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1378897744|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:16:37,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1464932229 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1464932229 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In1464932229 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In1464932229 256) 0))) (or (and (= ~y$w_buff1_used~0_In1464932229 |P1Thread1of1ForFork2_#t~ite6_Out1464932229|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite6_Out1464932229|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464932229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464932229, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464932229, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464932229} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464932229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464932229, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464932229, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1464932229|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464932229} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:16:37,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1012880003 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1012880003 256)))) (or (and (= ~y$r_buff0_thd2~0_In-1012880003 |P1Thread1of1ForFork2_#t~ite7_Out-1012880003|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-1012880003|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1012880003, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1012880003} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1012880003, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1012880003, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-1012880003|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:16:37,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In893464797 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In893464797 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In893464797 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In893464797 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In893464797 |P1Thread1of1ForFork2_#t~ite8_Out893464797|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out893464797|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In893464797, ~y$w_buff0_used~0=~y$w_buff0_used~0_In893464797, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In893464797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In893464797} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In893464797, ~y$w_buff0_used~0=~y$w_buff0_used~0_In893464797, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out893464797|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In893464797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In893464797} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:16:37,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:16:37,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:16:37,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-535036463| |ULTIMATE.start_main_#t~ite19_Out-535036463|)) (.cse1 (= (mod ~y$w_buff1_used~0_In-535036463 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-535036463 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite18_Out-535036463| ~y~0_In-535036463)) (and .cse0 (= ~y$w_buff1~0_In-535036463 |ULTIMATE.start_main_#t~ite18_Out-535036463|) (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-535036463, ~y~0=~y~0_In-535036463, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-535036463, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-535036463} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-535036463, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-535036463|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-535036463|, ~y~0=~y~0_In-535036463, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-535036463, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-535036463} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:16:37,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-447245215 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-447245215 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out-447245215|)) (and (= ~y$w_buff0_used~0_In-447245215 |ULTIMATE.start_main_#t~ite20_Out-447245215|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-447245215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-447245215} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-447245215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-447245215, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-447245215|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:16:37,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd0~0_In647016024 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In647016024 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In647016024 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In647016024 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out647016024| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite21_Out647016024| ~y$w_buff1_used~0_In647016024) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In647016024, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In647016024, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In647016024, ~y$w_buff1_used~0=~y$w_buff1_used~0_In647016024} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In647016024, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In647016024, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out647016024|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In647016024, ~y$w_buff1_used~0=~y$w_buff1_used~0_In647016024} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:16:37,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-107325694 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-107325694 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-107325694| ~y$r_buff0_thd0~0_In-107325694) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out-107325694| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-107325694, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-107325694} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-107325694, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-107325694, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-107325694|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:16:37,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In1967538959 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1967538959 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1967538959 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1967538959 256)))) (or (and (= ~y$r_buff1_thd0~0_In1967538959 |ULTIMATE.start_main_#t~ite23_Out1967538959|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite23_Out1967538959|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1967538959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1967538959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1967538959, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1967538959} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1967538959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1967538959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1967538959, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1967538959|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1967538959} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:16:37,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1503414513 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1503414513 |ULTIMATE.start_main_#t~ite33_Out-1503414513|) (= |ULTIMATE.start_main_#t~ite32_In-1503414513| |ULTIMATE.start_main_#t~ite32_Out-1503414513|)) (and (= |ULTIMATE.start_main_#t~ite33_Out-1503414513| |ULTIMATE.start_main_#t~ite32_Out-1503414513|) (= ~y$w_buff1~0_In-1503414513 |ULTIMATE.start_main_#t~ite32_Out-1503414513|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1503414513 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In-1503414513 256) 0) .cse1) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-1503414513 256))) (= (mod ~y$w_buff0_used~0_In-1503414513 256) 0))) .cse0))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1503414513, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In-1503414513|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1503414513, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1503414513|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-1503414513|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:16:37,675 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In994565484 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite36_Out994565484| |ULTIMATE.start_main_#t~ite35_Out994565484|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In994565484 256)))) (or (= (mod ~y$w_buff0_used~0_In994565484 256) 0) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In994565484 256))) (and (= 0 (mod ~y$w_buff1_used~0_In994565484 256)) .cse0))) (= |ULTIMATE.start_main_#t~ite35_Out994565484| ~y$w_buff0_used~0_In994565484) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite36_Out994565484| ~y$w_buff0_used~0_In994565484) (= |ULTIMATE.start_main_#t~ite35_In994565484| |ULTIMATE.start_main_#t~ite35_Out994565484|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In994565484|, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out994565484|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out994565484|, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:16:37,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2043454181 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) (= |ULTIMATE.start_main_#t~ite38_In-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|)) (and (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2043454181 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-2043454181 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2043454181 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-2043454181 256))))) (= |ULTIMATE.start_main_#t~ite38_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-2043454181|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:16:37,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:16:37,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:16:37,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:16:37,767 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:16:37,767 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:16:37,769 INFO L168 Benchmark]: Toolchain (without parser) took 19802.70 ms. Allocated memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: 943.2 MB). Free memory was 956.3 MB in the beginning and 1.4 GB in the end (delta: -474.0 MB). Peak memory consumption was 469.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:37,769 INFO L168 Benchmark]: CDTParser took 0.84 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:16:37,770 INFO L168 Benchmark]: CACSL2BoogieTranslator took 699.67 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.9 MB). Free memory was 951.0 MB in the beginning and 1.1 GB in the end (delta: -143.7 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:37,772 INFO L168 Benchmark]: Boogie Procedure Inliner took 80.53 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:37,772 INFO L168 Benchmark]: Boogie Preprocessor took 41.46 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:16:37,773 INFO L168 Benchmark]: RCFGBuilder took 799.61 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.4 MB). Peak memory consumption was 51.4 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:37,774 INFO L168 Benchmark]: TraceAbstraction took 18060.15 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 816.3 MB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -414.0 MB). Peak memory consumption was 402.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:37,777 INFO L168 Benchmark]: Witness Printer took 114.86 ms. Allocated memory is still 2.0 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 20.3 MB). Peak memory consumption was 20.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:37,783 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.84 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 699.67 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.9 MB). Free memory was 951.0 MB in the beginning and 1.1 GB in the end (delta: -143.7 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 80.53 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 41.46 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 799.61 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.4 MB). Peak memory consumption was 51.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18060.15 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 816.3 MB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -414.0 MB). Peak memory consumption was 402.3 MB. Max. memory is 11.5 GB. * Witness Printer took 114.86 ms. Allocated memory is still 2.0 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 20.3 MB). Peak memory consumption was 20.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.3s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 26 ChoiceCompositions, 4376 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 58 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 46792 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t1211, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t1212, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1213, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L771] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L772] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L773] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L774] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L775] 3 y$r_buff0_thd3 = (_Bool)1 [L778] 3 z = 1 [L781] 3 __unbuffered_p2_EAX = z [L784] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L746] 2 x = 2 [L749] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L788] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L789] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L752] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L753] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L754] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L820] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L821] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L822] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L823] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L824] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 y$flush_delayed = weak$$choice2 [L830] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L832] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L833] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L834] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L835] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L837] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 17.7s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 4.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1643 SDtfs, 1457 SDslu, 3477 SDs, 0 SdLazy, 1517 SolverSat, 118 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 97 GetRequests, 13 SyntacticMatches, 11 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22284occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.5s AutomataMinimizationTime, 15 MinimizatonAttempts, 8981 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 596 NumberOfCodeBlocks, 596 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 524 ConstructedInterpolants, 0 QuantifiedInterpolants, 119235 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...