./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix045_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix045_tso.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d663485961f2ed853910cf53fe3560ecfddb0003 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:16:22,733 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:16:22,736 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:16:22,757 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:16:22,757 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:16:22,760 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:16:22,762 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:16:22,773 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:16:22,778 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:16:22,782 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:16:22,783 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:16:22,785 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:16:22,786 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:16:22,788 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:16:22,790 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:16:22,792 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:16:22,794 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:16:22,795 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:16:22,798 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:16:22,802 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:16:22,807 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:16:22,812 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:16:22,813 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:16:22,815 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:16:22,819 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:16:22,820 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:16:22,820 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:16:22,822 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:16:22,823 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:16:22,824 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:16:22,824 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:16:22,825 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:16:22,826 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:16:22,828 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:16:22,829 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:16:22,829 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:16:22,830 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:16:22,830 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:16:22,831 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:16:22,832 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:16:22,833 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:16:22,834 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:16:22,877 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:16:22,877 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:16:22,879 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:16:22,879 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:16:22,880 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:16:22,880 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:16:22,882 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:16:22,882 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:16:22,882 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:16:22,883 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:16:22,883 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:16:22,885 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:16:22,885 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:16:22,885 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:16:22,886 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:16:22,886 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:16:22,886 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:16:22,886 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:16:22,887 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:16:22,888 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:16:22,888 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:16:22,888 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:16:22,889 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:16:22,889 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:16:22,889 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:16:22,890 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:16:22,890 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:16:22,890 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:16:22,891 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:16:22,891 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d663485961f2ed853910cf53fe3560ecfddb0003 [2019-11-28 18:16:23,241 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:16:23,254 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:16:23,258 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:16:23,260 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:16:23,260 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:16:23,261 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix045_tso.opt.i [2019-11-28 18:16:23,323 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c9221ae4a/23119a05c33d47a1b48ccf24e26ded39/FLAGc7712f282 [2019-11-28 18:16:23,903 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:16:23,904 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix045_tso.opt.i [2019-11-28 18:16:23,919 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c9221ae4a/23119a05c33d47a1b48ccf24e26ded39/FLAGc7712f282 [2019-11-28 18:16:24,146 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c9221ae4a/23119a05c33d47a1b48ccf24e26ded39 [2019-11-28 18:16:24,149 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:16:24,151 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:16:24,152 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:16:24,152 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:16:24,156 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:16:24,157 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:24,160 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b1cb90c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24, skipping insertion in model container [2019-11-28 18:16:24,161 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:24,170 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:16:24,227 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:16:24,764 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:16:24,782 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:16:24,862 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:16:24,943 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:16:24,944 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24 WrapperNode [2019-11-28 18:16:24,944 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:16:24,945 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:16:24,946 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:16:24,946 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:16:24,954 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:24,976 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:25,024 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:16:25,025 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:16:25,025 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:16:25,025 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:16:25,036 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:25,036 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:25,041 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:25,042 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:25,052 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:25,059 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:25,068 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... [2019-11-28 18:16:25,081 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:16:25,082 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:16:25,082 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:16:25,082 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:16:25,083 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:16:25,155 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:16:25,155 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:16:25,156 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:16:25,156 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:16:25,156 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:16:25,156 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:16:25,156 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:16:25,156 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:16:25,157 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:16:25,157 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:16:25,157 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:16:25,157 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:16:25,157 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:16:25,159 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:16:25,939 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:16:25,940 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:16:25,941 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:25 BoogieIcfgContainer [2019-11-28 18:16:25,941 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:16:25,942 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:16:25,942 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:16:25,945 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:16:25,945 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:16:24" (1/3) ... [2019-11-28 18:16:25,946 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ca91beb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:16:25, skipping insertion in model container [2019-11-28 18:16:25,946 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:16:24" (2/3) ... [2019-11-28 18:16:25,947 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ca91beb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:16:25, skipping insertion in model container [2019-11-28 18:16:25,947 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:25" (3/3) ... [2019-11-28 18:16:25,949 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_tso.opt.i [2019-11-28 18:16:25,957 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:16:25,957 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:16:25,965 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:16:25,966 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:16:26,003 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,004 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,004 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,004 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,005 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,005 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,006 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,006 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,006 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,006 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,007 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,007 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,007 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,007 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,008 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,008 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,008 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,008 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,009 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,009 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,009 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,009 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,010 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,010 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,010 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,010 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,011 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,011 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,011 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,011 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,012 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,012 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,012 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,012 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,013 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,013 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,014 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,014 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,014 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,014 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,015 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,015 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,015 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,016 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,016 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,016 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,017 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,017 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,017 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,017 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,018 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,018 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,018 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,018 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,019 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,019 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,019 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,019 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,020 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,020 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,020 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,020 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,020 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,021 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,021 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,021 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,021 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,022 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,022 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,022 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:16:26,043 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-11-28 18:16:26,060 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:16:26,060 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:16:26,060 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:16:26,060 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:16:26,060 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:16:26,060 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:16:26,061 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:16:26,061 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:16:26,078 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-11-28 18:16:26,080 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-11-28 18:16:26,170 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-11-28 18:16:26,170 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:16:26,188 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:16:26,210 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-11-28 18:16:26,279 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-11-28 18:16:26,280 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:16:26,290 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:16:26,310 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-11-28 18:16:26,311 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:16:29,123 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 32 [2019-11-28 18:16:31,569 WARN L192 SmtUtils]: Spent 299.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-11-28 18:16:31,705 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2019-11-28 18:16:31,730 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46792 [2019-11-28 18:16:31,731 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-11-28 18:16:31,735 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-11-28 18:16:32,909 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16134 states. [2019-11-28 18:16:32,911 INFO L276 IsEmpty]: Start isEmpty. Operand 16134 states. [2019-11-28 18:16:32,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-11-28 18:16:32,917 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:32,918 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:32,918 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:32,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:32,923 INFO L82 PathProgramCache]: Analyzing trace with hash 1643101290, now seen corresponding path program 1 times [2019-11-28 18:16:32,931 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:32,932 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120397253] [2019-11-28 18:16:32,932 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:33,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:33,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:33,190 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120397253] [2019-11-28 18:16:33,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:33,191 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:16:33,192 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1912286668] [2019-11-28 18:16:33,196 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:33,196 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:33,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:33,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:33,210 INFO L87 Difference]: Start difference. First operand 16134 states. Second operand 3 states. [2019-11-28 18:16:33,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:33,559 INFO L93 Difference]: Finished difference Result 16034 states and 60310 transitions. [2019-11-28 18:16:33,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:33,561 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-11-28 18:16:33,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:33,743 INFO L225 Difference]: With dead ends: 16034 [2019-11-28 18:16:33,743 INFO L226 Difference]: Without dead ends: 15698 [2019-11-28 18:16:33,745 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:34,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15698 states. [2019-11-28 18:16:34,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15698 to 15698. [2019-11-28 18:16:34,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15698 states. [2019-11-28 18:16:34,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15698 states to 15698 states and 59106 transitions. [2019-11-28 18:16:34,740 INFO L78 Accepts]: Start accepts. Automaton has 15698 states and 59106 transitions. Word has length 7 [2019-11-28 18:16:34,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:34,741 INFO L462 AbstractCegarLoop]: Abstraction has 15698 states and 59106 transitions. [2019-11-28 18:16:34,741 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:34,742 INFO L276 IsEmpty]: Start isEmpty. Operand 15698 states and 59106 transitions. [2019-11-28 18:16:34,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:16:34,749 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:34,749 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:34,750 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:34,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:34,750 INFO L82 PathProgramCache]: Analyzing trace with hash 565568960, now seen corresponding path program 1 times [2019-11-28 18:16:34,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:34,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943800354] [2019-11-28 18:16:34,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:34,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:34,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:34,908 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943800354] [2019-11-28 18:16:34,908 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:34,909 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:34,909 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1750891741] [2019-11-28 18:16:34,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:34,913 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:34,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:34,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:34,913 INFO L87 Difference]: Start difference. First operand 15698 states and 59106 transitions. Second operand 4 states. [2019-11-28 18:16:35,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:35,366 INFO L93 Difference]: Finished difference Result 24414 states and 88322 transitions. [2019-11-28 18:16:35,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:35,367 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:16:35,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:35,456 INFO L225 Difference]: With dead ends: 24414 [2019-11-28 18:16:35,456 INFO L226 Difference]: Without dead ends: 24400 [2019-11-28 18:16:35,457 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:35,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24400 states. [2019-11-28 18:16:36,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24400 to 22284. [2019-11-28 18:16:36,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22284 states. [2019-11-28 18:16:36,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22284 states to 22284 states and 81513 transitions. [2019-11-28 18:16:36,558 INFO L78 Accepts]: Start accepts. Automaton has 22284 states and 81513 transitions. Word has length 13 [2019-11-28 18:16:36,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:36,558 INFO L462 AbstractCegarLoop]: Abstraction has 22284 states and 81513 transitions. [2019-11-28 18:16:36,559 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:36,559 INFO L276 IsEmpty]: Start isEmpty. Operand 22284 states and 81513 transitions. [2019-11-28 18:16:36,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:16:36,565 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:36,565 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:36,566 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:36,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:36,566 INFO L82 PathProgramCache]: Analyzing trace with hash 1863901117, now seen corresponding path program 1 times [2019-11-28 18:16:36,567 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:36,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781059814] [2019-11-28 18:16:36,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:36,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:36,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:36,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781059814] [2019-11-28 18:16:36,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:36,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:36,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1900461358] [2019-11-28 18:16:36,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:36,685 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:36,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:36,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:36,685 INFO L87 Difference]: Start difference. First operand 22284 states and 81513 transitions. Second operand 4 states. [2019-11-28 18:16:36,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:36,997 INFO L93 Difference]: Finished difference Result 27604 states and 99705 transitions. [2019-11-28 18:16:36,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:36,998 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:16:36,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:37,103 INFO L225 Difference]: With dead ends: 27604 [2019-11-28 18:16:37,103 INFO L226 Difference]: Without dead ends: 27604 [2019-11-28 18:16:37,103 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:37,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27604 states. [2019-11-28 18:16:37,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27604 to 24754. [2019-11-28 18:16:37,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24754 states. [2019-11-28 18:16:37,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24754 states to 24754 states and 90160 transitions. [2019-11-28 18:16:37,983 INFO L78 Accepts]: Start accepts. Automaton has 24754 states and 90160 transitions. Word has length 13 [2019-11-28 18:16:37,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:37,984 INFO L462 AbstractCegarLoop]: Abstraction has 24754 states and 90160 transitions. [2019-11-28 18:16:37,984 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:37,984 INFO L276 IsEmpty]: Start isEmpty. Operand 24754 states and 90160 transitions. [2019-11-28 18:16:37,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-11-28 18:16:37,993 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:37,994 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:37,994 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:37,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:37,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1245036147, now seen corresponding path program 1 times [2019-11-28 18:16:37,995 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:37,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249046747] [2019-11-28 18:16:37,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:38,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:38,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:38,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [249046747] [2019-11-28 18:16:38,125 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:38,125 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:38,125 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728179696] [2019-11-28 18:16:38,126 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:38,126 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:38,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:38,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:38,127 INFO L87 Difference]: Start difference. First operand 24754 states and 90160 transitions. Second operand 5 states. [2019-11-28 18:16:38,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:38,960 INFO L93 Difference]: Finished difference Result 32988 states and 117873 transitions. [2019-11-28 18:16:38,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:16:38,961 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-11-28 18:16:38,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:39,086 INFO L225 Difference]: With dead ends: 32988 [2019-11-28 18:16:39,087 INFO L226 Difference]: Without dead ends: 32974 [2019-11-28 18:16:39,087 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:16:39,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32974 states. [2019-11-28 18:16:39,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32974 to 24678. [2019-11-28 18:16:39,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24678 states. [2019-11-28 18:16:39,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24678 states to 24678 states and 89720 transitions. [2019-11-28 18:16:39,952 INFO L78 Accepts]: Start accepts. Automaton has 24678 states and 89720 transitions. Word has length 19 [2019-11-28 18:16:39,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:39,952 INFO L462 AbstractCegarLoop]: Abstraction has 24678 states and 89720 transitions. [2019-11-28 18:16:39,952 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:39,953 INFO L276 IsEmpty]: Start isEmpty. Operand 24678 states and 89720 transitions. [2019-11-28 18:16:39,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-28 18:16:39,979 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:39,980 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:39,980 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:39,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:39,981 INFO L82 PathProgramCache]: Analyzing trace with hash -1893835320, now seen corresponding path program 1 times [2019-11-28 18:16:39,981 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:39,981 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1946478104] [2019-11-28 18:16:39,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:40,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:40,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:40,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1946478104] [2019-11-28 18:16:40,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:40,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:40,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1374905212] [2019-11-28 18:16:40,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:16:40,068 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:40,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:16:40,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:16:40,068 INFO L87 Difference]: Start difference. First operand 24678 states and 89720 transitions. Second operand 6 states. [2019-11-28 18:16:40,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:40,921 INFO L93 Difference]: Finished difference Result 36168 states and 128807 transitions. [2019-11-28 18:16:40,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:16:40,922 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-11-28 18:16:40,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:41,010 INFO L225 Difference]: With dead ends: 36168 [2019-11-28 18:16:41,011 INFO L226 Difference]: Without dead ends: 36136 [2019-11-28 18:16:41,011 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:16:41,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36136 states. [2019-11-28 18:16:41,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36136 to 32556. [2019-11-28 18:16:41,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32556 states. [2019-11-28 18:16:41,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32556 states to 32556 states and 116635 transitions. [2019-11-28 18:16:41,918 INFO L78 Accepts]: Start accepts. Automaton has 32556 states and 116635 transitions. Word has length 27 [2019-11-28 18:16:41,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:41,918 INFO L462 AbstractCegarLoop]: Abstraction has 32556 states and 116635 transitions. [2019-11-28 18:16:41,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:16:41,918 INFO L276 IsEmpty]: Start isEmpty. Operand 32556 states and 116635 transitions. [2019-11-28 18:16:41,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-28 18:16:41,958 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:41,959 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:41,959 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:41,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:41,959 INFO L82 PathProgramCache]: Analyzing trace with hash -342686850, now seen corresponding path program 1 times [2019-11-28 18:16:41,959 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:41,960 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120994782] [2019-11-28 18:16:41,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:41,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:42,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:42,057 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120994782] [2019-11-28 18:16:42,057 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:42,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:16:42,057 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889291614] [2019-11-28 18:16:42,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:16:42,058 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:42,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:16:42,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:16:42,059 INFO L87 Difference]: Start difference. First operand 32556 states and 116635 transitions. Second operand 7 states. [2019-11-28 18:16:43,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:43,019 INFO L93 Difference]: Finished difference Result 42706 states and 150590 transitions. [2019-11-28 18:16:43,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-28 18:16:43,019 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-11-28 18:16:43,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:43,108 INFO L225 Difference]: With dead ends: 42706 [2019-11-28 18:16:43,108 INFO L226 Difference]: Without dead ends: 42654 [2019-11-28 18:16:43,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:16:43,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42654 states. [2019-11-28 18:16:44,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42654 to 29042. [2019-11-28 18:16:44,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29042 states. [2019-11-28 18:16:44,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29042 states to 29042 states and 104560 transitions. [2019-11-28 18:16:44,306 INFO L78 Accepts]: Start accepts. Automaton has 29042 states and 104560 transitions. Word has length 33 [2019-11-28 18:16:44,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:44,306 INFO L462 AbstractCegarLoop]: Abstraction has 29042 states and 104560 transitions. [2019-11-28 18:16:44,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:16:44,306 INFO L276 IsEmpty]: Start isEmpty. Operand 29042 states and 104560 transitions. [2019-11-28 18:16:44,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-28 18:16:44,335 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:44,335 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:44,335 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:44,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:44,336 INFO L82 PathProgramCache]: Analyzing trace with hash -1695491097, now seen corresponding path program 1 times [2019-11-28 18:16:44,336 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:44,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253255307] [2019-11-28 18:16:44,336 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:44,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:44,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:44,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253255307] [2019-11-28 18:16:44,380 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:44,380 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:44,380 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1701051817] [2019-11-28 18:16:44,380 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:44,381 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:44,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:44,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:44,381 INFO L87 Difference]: Start difference. First operand 29042 states and 104560 transitions. Second operand 3 states. [2019-11-28 18:16:44,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:44,570 INFO L93 Difference]: Finished difference Result 35954 states and 128154 transitions. [2019-11-28 18:16:44,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:44,570 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-11-28 18:16:44,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:44,647 INFO L225 Difference]: With dead ends: 35954 [2019-11-28 18:16:44,648 INFO L226 Difference]: Without dead ends: 35954 [2019-11-28 18:16:44,648 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:44,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35954 states. [2019-11-28 18:16:45,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35954 to 31490. [2019-11-28 18:16:45,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31490 states. [2019-11-28 18:16:45,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31490 states to 31490 states and 113002 transitions. [2019-11-28 18:16:45,270 INFO L78 Accepts]: Start accepts. Automaton has 31490 states and 113002 transitions. Word has length 33 [2019-11-28 18:16:45,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:45,271 INFO L462 AbstractCegarLoop]: Abstraction has 31490 states and 113002 transitions. [2019-11-28 18:16:45,271 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:45,271 INFO L276 IsEmpty]: Start isEmpty. Operand 31490 states and 113002 transitions. [2019-11-28 18:16:45,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-28 18:16:45,301 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:45,302 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:45,302 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:45,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:45,302 INFO L82 PathProgramCache]: Analyzing trace with hash -1699930917, now seen corresponding path program 1 times [2019-11-28 18:16:45,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:45,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389880679] [2019-11-28 18:16:45,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:45,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:45,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:45,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1389880679] [2019-11-28 18:16:45,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:45,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:45,426 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1578423619] [2019-11-28 18:16:45,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:16:45,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:45,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:16:45,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:16:45,427 INFO L87 Difference]: Start difference. First operand 31490 states and 113002 transitions. Second operand 6 states. [2019-11-28 18:16:45,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:45,807 INFO L93 Difference]: Finished difference Result 52636 states and 183096 transitions. [2019-11-28 18:16:45,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:16:45,807 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-11-28 18:16:45,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:45,898 INFO L225 Difference]: With dead ends: 52636 [2019-11-28 18:16:45,898 INFO L226 Difference]: Without dead ends: 46334 [2019-11-28 18:16:45,898 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:16:46,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46334 states. [2019-11-28 18:16:46,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46334 to 39320. [2019-11-28 18:16:46,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39320 states. [2019-11-28 18:16:47,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39320 states to 39320 states and 136186 transitions. [2019-11-28 18:16:47,094 INFO L78 Accepts]: Start accepts. Automaton has 39320 states and 136186 transitions. Word has length 33 [2019-11-28 18:16:47,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:47,094 INFO L462 AbstractCegarLoop]: Abstraction has 39320 states and 136186 transitions. [2019-11-28 18:16:47,094 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:16:47,094 INFO L276 IsEmpty]: Start isEmpty. Operand 39320 states and 136186 transitions. [2019-11-28 18:16:47,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-28 18:16:47,135 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:47,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:47,135 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:47,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:47,136 INFO L82 PathProgramCache]: Analyzing trace with hash -369569775, now seen corresponding path program 1 times [2019-11-28 18:16:47,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:47,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335857635] [2019-11-28 18:16:47,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:47,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:47,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:47,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335857635] [2019-11-28 18:16:47,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:47,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:47,258 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1854105169] [2019-11-28 18:16:47,258 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:16:47,258 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:47,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:16:47,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:16:47,259 INFO L87 Difference]: Start difference. First operand 39320 states and 136186 transitions. Second operand 6 states. [2019-11-28 18:16:47,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:47,734 INFO L93 Difference]: Finished difference Result 46907 states and 160693 transitions. [2019-11-28 18:16:47,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:16:47,734 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-11-28 18:16:47,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:47,842 INFO L225 Difference]: With dead ends: 46907 [2019-11-28 18:16:47,842 INFO L226 Difference]: Without dead ends: 45152 [2019-11-28 18:16:47,843 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:16:48,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45152 states. [2019-11-28 18:16:48,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45152 to 37474. [2019-11-28 18:16:48,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37474 states. [2019-11-28 18:16:48,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37474 states to 37474 states and 129954 transitions. [2019-11-28 18:16:48,606 INFO L78 Accepts]: Start accepts. Automaton has 37474 states and 129954 transitions. Word has length 34 [2019-11-28 18:16:48,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:48,606 INFO L462 AbstractCegarLoop]: Abstraction has 37474 states and 129954 transitions. [2019-11-28 18:16:48,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:16:48,607 INFO L276 IsEmpty]: Start isEmpty. Operand 37474 states and 129954 transitions. [2019-11-28 18:16:48,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-28 18:16:48,638 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:48,638 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:48,639 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:48,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:48,639 INFO L82 PathProgramCache]: Analyzing trace with hash 1754693472, now seen corresponding path program 1 times [2019-11-28 18:16:48,639 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:48,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301132805] [2019-11-28 18:16:48,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:48,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:48,701 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:48,701 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301132805] [2019-11-28 18:16:48,702 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:48,702 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:48,702 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [956175985] [2019-11-28 18:16:48,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:48,702 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:48,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:48,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:48,703 INFO L87 Difference]: Start difference. First operand 37474 states and 129954 transitions. Second operand 3 states. [2019-11-28 18:16:48,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:48,938 INFO L93 Difference]: Finished difference Result 38906 states and 133254 transitions. [2019-11-28 18:16:48,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:48,938 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-11-28 18:16:48,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:49,016 INFO L225 Difference]: With dead ends: 38906 [2019-11-28 18:16:49,016 INFO L226 Difference]: Without dead ends: 38906 [2019-11-28 18:16:49,017 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:49,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38906 states. [2019-11-28 18:16:49,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38906 to 34673. [2019-11-28 18:16:49,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34673 states. [2019-11-28 18:16:50,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34673 states to 34673 states and 119782 transitions. [2019-11-28 18:16:50,060 INFO L78 Accepts]: Start accepts. Automaton has 34673 states and 119782 transitions. Word has length 35 [2019-11-28 18:16:50,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:50,060 INFO L462 AbstractCegarLoop]: Abstraction has 34673 states and 119782 transitions. [2019-11-28 18:16:50,060 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:50,060 INFO L276 IsEmpty]: Start isEmpty. Operand 34673 states and 119782 transitions. [2019-11-28 18:16:50,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-28 18:16:50,107 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:50,107 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:50,107 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:50,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:50,108 INFO L82 PathProgramCache]: Analyzing trace with hash 581797047, now seen corresponding path program 1 times [2019-11-28 18:16:50,108 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:50,108 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329458279] [2019-11-28 18:16:50,109 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:50,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:50,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:50,155 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329458279] [2019-11-28 18:16:50,155 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:50,155 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:16:50,155 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1841960] [2019-11-28 18:16:50,156 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:16:50,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:50,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:16:50,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:50,158 INFO L87 Difference]: Start difference. First operand 34673 states and 119782 transitions. Second operand 4 states. [2019-11-28 18:16:50,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:50,182 INFO L93 Difference]: Finished difference Result 2549 states and 5680 transitions. [2019-11-28 18:16:50,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:16:50,184 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-11-28 18:16:50,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:50,188 INFO L225 Difference]: With dead ends: 2549 [2019-11-28 18:16:50,188 INFO L226 Difference]: Without dead ends: 2549 [2019-11-28 18:16:50,189 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:16:50,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2549 states. [2019-11-28 18:16:50,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2549 to 2549. [2019-11-28 18:16:50,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2549 states. [2019-11-28 18:16:50,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2549 states to 2549 states and 5680 transitions. [2019-11-28 18:16:50,226 INFO L78 Accepts]: Start accepts. Automaton has 2549 states and 5680 transitions. Word has length 35 [2019-11-28 18:16:50,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:50,227 INFO L462 AbstractCegarLoop]: Abstraction has 2549 states and 5680 transitions. [2019-11-28 18:16:50,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:16:50,227 INFO L276 IsEmpty]: Start isEmpty. Operand 2549 states and 5680 transitions. [2019-11-28 18:16:50,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-28 18:16:50,231 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:50,231 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:50,231 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:50,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:50,232 INFO L82 PathProgramCache]: Analyzing trace with hash 1726174666, now seen corresponding path program 1 times [2019-11-28 18:16:50,232 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:50,232 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838533849] [2019-11-28 18:16:50,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:50,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:50,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:50,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1838533849] [2019-11-28 18:16:50,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:50,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:16:50,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574772886] [2019-11-28 18:16:50,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:16:50,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:50,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:16:50,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:16:50,375 INFO L87 Difference]: Start difference. First operand 2549 states and 5680 transitions. Second operand 7 states. [2019-11-28 18:16:50,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:50,537 INFO L93 Difference]: Finished difference Result 5015 states and 11027 transitions. [2019-11-28 18:16:50,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:16:50,537 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 44 [2019-11-28 18:16:50,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:50,541 INFO L225 Difference]: With dead ends: 5015 [2019-11-28 18:16:50,542 INFO L226 Difference]: Without dead ends: 2816 [2019-11-28 18:16:50,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:16:50,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2816 states. [2019-11-28 18:16:50,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2816 to 2367. [2019-11-28 18:16:50,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2367 states. [2019-11-28 18:16:50,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2367 states to 2367 states and 5249 transitions. [2019-11-28 18:16:50,570 INFO L78 Accepts]: Start accepts. Automaton has 2367 states and 5249 transitions. Word has length 44 [2019-11-28 18:16:50,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:50,570 INFO L462 AbstractCegarLoop]: Abstraction has 2367 states and 5249 transitions. [2019-11-28 18:16:50,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:16:50,570 INFO L276 IsEmpty]: Start isEmpty. Operand 2367 states and 5249 transitions. [2019-11-28 18:16:50,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-28 18:16:50,572 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:50,572 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:50,572 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:50,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:50,573 INFO L82 PathProgramCache]: Analyzing trace with hash -1713515542, now seen corresponding path program 2 times [2019-11-28 18:16:50,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:50,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238166058] [2019-11-28 18:16:50,573 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:50,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:50,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:50,639 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238166058] [2019-11-28 18:16:50,639 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:50,639 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:50,640 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1242812085] [2019-11-28 18:16:50,640 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:50,640 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:50,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:50,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:50,641 INFO L87 Difference]: Start difference. First operand 2367 states and 5249 transitions. Second operand 3 states. [2019-11-28 18:16:50,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:50,690 INFO L93 Difference]: Finished difference Result 2367 states and 5223 transitions. [2019-11-28 18:16:50,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:50,690 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-11-28 18:16:50,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:50,693 INFO L225 Difference]: With dead ends: 2367 [2019-11-28 18:16:50,694 INFO L226 Difference]: Without dead ends: 2367 [2019-11-28 18:16:50,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:50,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2367 states. [2019-11-28 18:16:50,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2367 to 2367. [2019-11-28 18:16:50,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2367 states. [2019-11-28 18:16:50,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2367 states to 2367 states and 5223 transitions. [2019-11-28 18:16:50,719 INFO L78 Accepts]: Start accepts. Automaton has 2367 states and 5223 transitions. Word has length 44 [2019-11-28 18:16:50,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:50,720 INFO L462 AbstractCegarLoop]: Abstraction has 2367 states and 5223 transitions. [2019-11-28 18:16:50,720 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:50,720 INFO L276 IsEmpty]: Start isEmpty. Operand 2367 states and 5223 transitions. [2019-11-28 18:16:50,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-28 18:16:50,723 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:50,724 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:50,724 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:50,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:50,725 INFO L82 PathProgramCache]: Analyzing trace with hash 161242823, now seen corresponding path program 1 times [2019-11-28 18:16:50,725 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:50,725 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249979431] [2019-11-28 18:16:50,725 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:50,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:50,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:50,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [249979431] [2019-11-28 18:16:50,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:50,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:50,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2008344810] [2019-11-28 18:16:50,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:50,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:50,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:50,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:50,819 INFO L87 Difference]: Start difference. First operand 2367 states and 5223 transitions. Second operand 5 states. [2019-11-28 18:16:50,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:50,901 INFO L93 Difference]: Finished difference Result 3609 states and 7956 transitions. [2019-11-28 18:16:50,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:16:50,902 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-28 18:16:50,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:50,905 INFO L225 Difference]: With dead ends: 3609 [2019-11-28 18:16:50,905 INFO L226 Difference]: Without dead ends: 1776 [2019-11-28 18:16:50,906 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:16:50,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1776 states. [2019-11-28 18:16:50,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1776 to 1744. [2019-11-28 18:16:50,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1744 states. [2019-11-28 18:16:50,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1744 states to 1744 states and 3726 transitions. [2019-11-28 18:16:50,932 INFO L78 Accepts]: Start accepts. Automaton has 1744 states and 3726 transitions. Word has length 45 [2019-11-28 18:16:50,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:50,933 INFO L462 AbstractCegarLoop]: Abstraction has 1744 states and 3726 transitions. [2019-11-28 18:16:50,933 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:50,933 INFO L276 IsEmpty]: Start isEmpty. Operand 1744 states and 3726 transitions. [2019-11-28 18:16:50,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-28 18:16:50,935 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:50,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:50,936 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:50,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:50,936 INFO L82 PathProgramCache]: Analyzing trace with hash 1055081710, now seen corresponding path program 1 times [2019-11-28 18:16:50,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:50,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [704580178] [2019-11-28 18:16:50,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:50,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:51,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:51,002 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [704580178] [2019-11-28 18:16:51,002 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:51,003 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:16:51,003 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602261622] [2019-11-28 18:16:51,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:16:51,004 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:51,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:16:51,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:51,004 INFO L87 Difference]: Start difference. First operand 1744 states and 3726 transitions. Second operand 5 states. [2019-11-28 18:16:51,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:51,024 INFO L93 Difference]: Finished difference Result 480 states and 911 transitions. [2019-11-28 18:16:51,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:16:51,025 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-28 18:16:51,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:51,026 INFO L225 Difference]: With dead ends: 480 [2019-11-28 18:16:51,026 INFO L226 Difference]: Without dead ends: 220 [2019-11-28 18:16:51,026 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:16:51,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2019-11-28 18:16:51,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 220. [2019-11-28 18:16:51,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-11-28 18:16:51,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 394 transitions. [2019-11-28 18:16:51,032 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 394 transitions. Word has length 46 [2019-11-28 18:16:51,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:51,032 INFO L462 AbstractCegarLoop]: Abstraction has 220 states and 394 transitions. [2019-11-28 18:16:51,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:16:51,033 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 394 transitions. [2019-11-28 18:16:51,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:16:51,034 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:51,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:51,034 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:51,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:51,035 INFO L82 PathProgramCache]: Analyzing trace with hash -2026218410, now seen corresponding path program 1 times [2019-11-28 18:16:51,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:51,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347675353] [2019-11-28 18:16:51,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:51,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:51,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:51,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347675353] [2019-11-28 18:16:51,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:51,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:16:51,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1360998951] [2019-11-28 18:16:51,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:16:51,097 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:51,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:16:51,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:51,098 INFO L87 Difference]: Start difference. First operand 220 states and 394 transitions. Second operand 3 states. [2019-11-28 18:16:51,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:51,113 INFO L93 Difference]: Finished difference Result 209 states and 361 transitions. [2019-11-28 18:16:51,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:16:51,113 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-11-28 18:16:51,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:51,114 INFO L225 Difference]: With dead ends: 209 [2019-11-28 18:16:51,114 INFO L226 Difference]: Without dead ends: 209 [2019-11-28 18:16:51,114 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:16:51,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2019-11-28 18:16:51,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2019-11-28 18:16:51,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-11-28 18:16:51,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 361 transitions. [2019-11-28 18:16:51,118 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 361 transitions. Word has length 56 [2019-11-28 18:16:51,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:51,119 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 361 transitions. [2019-11-28 18:16:51,119 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:16:51,119 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 361 transitions. [2019-11-28 18:16:51,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:51,120 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:51,121 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:51,121 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:51,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:51,121 INFO L82 PathProgramCache]: Analyzing trace with hash -876750572, now seen corresponding path program 1 times [2019-11-28 18:16:51,122 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:51,122 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1404664537] [2019-11-28 18:16:51,122 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:51,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:16:51,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:16:51,307 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1404664537] [2019-11-28 18:16:51,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:16:51,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:16:51,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1398196921] [2019-11-28 18:16:51,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:16:51,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:16:51,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:16:51,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:16:51,310 INFO L87 Difference]: Start difference. First operand 209 states and 361 transitions. Second operand 12 states. [2019-11-28 18:16:51,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:16:51,605 INFO L93 Difference]: Finished difference Result 360 states and 604 transitions. [2019-11-28 18:16:51,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:16:51,606 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-11-28 18:16:51,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:16:51,607 INFO L225 Difference]: With dead ends: 360 [2019-11-28 18:16:51,607 INFO L226 Difference]: Without dead ends: 327 [2019-11-28 18:16:51,608 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:16:51,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2019-11-28 18:16:51,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 317. [2019-11-28 18:16:51,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-11-28 18:16:51,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 546 transitions. [2019-11-28 18:16:51,613 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 546 transitions. Word has length 57 [2019-11-28 18:16:51,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:16:51,613 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 546 transitions. [2019-11-28 18:16:51,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:16:51,613 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 546 transitions. [2019-11-28 18:16:51,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:16:51,614 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:16:51,614 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:16:51,615 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:16:51,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:16:51,615 INFO L82 PathProgramCache]: Analyzing trace with hash -1963724718, now seen corresponding path program 2 times [2019-11-28 18:16:51,615 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:16:51,616 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070839591] [2019-11-28 18:16:51,616 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:16:51,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:16:51,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:16:51,733 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:16:51,734 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:16:51,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1214~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1214~0.base_25|) |v_ULTIMATE.start_main_~#t1214~0.offset_19| 0)) |v_#memory_int_21|) (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#NULL.offset_6| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1214~0.base_25| 4)) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= v_~z~0_106 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1214~0.base_25|) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= (store .cse0 |v_ULTIMATE.start_main_~#t1214~0.base_25| 1) |v_#valid_62|) (= v_~a~0_45 0) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0) (= 0 |v_ULTIMATE.start_main_~#t1214~0.offset_19|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1214~0.base_25|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1216~0.base=|v_ULTIMATE.start_main_~#t1216~0.base_25|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ULTIMATE.start_main_~#t1215~0.offset=|v_ULTIMATE.start_main_~#t1215~0.offset_19|, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_~#t1216~0.offset=|v_ULTIMATE.start_main_~#t1216~0.offset_19|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_~#t1214~0.offset=|v_ULTIMATE.start_main_~#t1214~0.offset_19|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, ULTIMATE.start_main_~#t1215~0.base=|v_ULTIMATE.start_main_~#t1215~0.base_25|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1214~0.base=|v_ULTIMATE.start_main_~#t1214~0.base_25|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1216~0.base, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ULTIMATE.start_main_~#t1215~0.offset, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1216~0.offset, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t1214~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1215~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1214~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:51,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1215~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t1215~0.base_13| 0)) (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1215~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1215~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1215~0.base_13| 4)) (= 0 |v_ULTIMATE.start_main_~#t1215~0.offset_11|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1215~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1215~0.base_13|) |v_ULTIMATE.start_main_~#t1215~0.offset_11| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1215~0.offset=|v_ULTIMATE.start_main_~#t1215~0.offset_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1215~0.base=|v_ULTIMATE.start_main_~#t1215~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1215~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1215~0.base] because there is no mapped edge [2019-11-28 18:16:51,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1216~0.base_13|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1216~0.base_13| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1216~0.base_13|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1216~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1216~0.base_13|) |v_ULTIMATE.start_main_~#t1216~0.offset_11| 2)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1216~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t1216~0.offset_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1216~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1216~0.base=|v_ULTIMATE.start_main_~#t1216~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1216~0.offset=|v_ULTIMATE.start_main_~#t1216~0.offset_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1216~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1216~0.offset, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-11-28 18:16:51,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:51,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:16:51,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In218932195 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In218932195 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out218932195| ~y$w_buff0_used~0_In218932195)) (and (= |P2Thread1of1ForFork0_#t~ite11_Out218932195| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In218932195, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In218932195} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In218932195, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out218932195|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In218932195} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:16:51,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In740642161 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In740642161 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In740642161 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In740642161 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out740642161| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite12_Out740642161| ~y$w_buff1_used~0_In740642161) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In740642161, ~y$w_buff0_used~0=~y$w_buff0_used~0_In740642161, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In740642161, ~y$w_buff1_used~0=~y$w_buff1_used~0_In740642161} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In740642161, ~y$w_buff0_used~0=~y$w_buff0_used~0_In740642161, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out740642161|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In740642161, ~y$w_buff1_used~0=~y$w_buff1_used~0_In740642161} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:16:51,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1358093944 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1358093944 256) 0)) (.cse2 (= ~y$r_buff0_thd3~0_In-1358093944 ~y$r_buff0_thd3~0_Out-1358093944))) (or (and (not .cse0) (= 0 ~y$r_buff0_thd3~0_Out-1358093944) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1358093944, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1358093944} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1358093944, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1358093944, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1358093944|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:16:51,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1050405150 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1050405150 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1050405150 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd3~0_In1050405150 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite14_Out1050405150|)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite14_Out1050405150| ~y$r_buff1_thd3~0_In1050405150)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1050405150, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1050405150, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1050405150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1050405150} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1050405150|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1050405150, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1050405150, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1050405150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1050405150} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:16:51,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:16:51,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1832238425 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In1832238425 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out1832238425| ~y$w_buff1~0_In1832238425)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out1832238425| ~y~0_In1832238425) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1832238425, ~y$w_buff1~0=~y$w_buff1~0_In1832238425, ~y~0=~y~0_In1832238425, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832238425} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1832238425, ~y$w_buff1~0=~y$w_buff1~0_In1832238425, ~y~0=~y~0_In1832238425, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out1832238425|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832238425} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:51,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:51,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1378897744 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1378897744 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out1378897744|) (not .cse1)) (and (= ~y$w_buff0_used~0_In1378897744 |P1Thread1of1ForFork2_#t~ite5_Out1378897744|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1378897744, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1378897744} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1378897744, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1378897744, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1378897744|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:16:51,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1464932229 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1464932229 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In1464932229 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In1464932229 256) 0))) (or (and (= ~y$w_buff1_used~0_In1464932229 |P1Thread1of1ForFork2_#t~ite6_Out1464932229|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite6_Out1464932229|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464932229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464932229, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464932229, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464932229} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464932229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464932229, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464932229, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1464932229|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464932229} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:16:51,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1012880003 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1012880003 256)))) (or (and (= ~y$r_buff0_thd2~0_In-1012880003 |P1Thread1of1ForFork2_#t~ite7_Out-1012880003|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-1012880003|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1012880003, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1012880003} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1012880003, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1012880003, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-1012880003|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:16:51,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In893464797 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In893464797 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In893464797 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In893464797 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In893464797 |P1Thread1of1ForFork2_#t~ite8_Out893464797|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out893464797|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In893464797, ~y$w_buff0_used~0=~y$w_buff0_used~0_In893464797, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In893464797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In893464797} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In893464797, ~y$w_buff0_used~0=~y$w_buff0_used~0_In893464797, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out893464797|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In893464797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In893464797} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:16:51,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:16:51,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:16:51,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-535036463| |ULTIMATE.start_main_#t~ite19_Out-535036463|)) (.cse1 (= (mod ~y$w_buff1_used~0_In-535036463 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-535036463 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite18_Out-535036463| ~y~0_In-535036463)) (and .cse0 (= ~y$w_buff1~0_In-535036463 |ULTIMATE.start_main_#t~ite18_Out-535036463|) (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-535036463, ~y~0=~y~0_In-535036463, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-535036463, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-535036463} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-535036463, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-535036463|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-535036463|, ~y~0=~y~0_In-535036463, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-535036463, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-535036463} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:16:51,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-447245215 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-447245215 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out-447245215|)) (and (= ~y$w_buff0_used~0_In-447245215 |ULTIMATE.start_main_#t~ite20_Out-447245215|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-447245215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-447245215} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-447245215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-447245215, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-447245215|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:16:51,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd0~0_In647016024 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In647016024 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In647016024 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In647016024 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out647016024| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite21_Out647016024| ~y$w_buff1_used~0_In647016024) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In647016024, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In647016024, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In647016024, ~y$w_buff1_used~0=~y$w_buff1_used~0_In647016024} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In647016024, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In647016024, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out647016024|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In647016024, ~y$w_buff1_used~0=~y$w_buff1_used~0_In647016024} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:16:51,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-107325694 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-107325694 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-107325694| ~y$r_buff0_thd0~0_In-107325694) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out-107325694| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-107325694, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-107325694} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-107325694, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-107325694, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-107325694|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:16:51,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In1967538959 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1967538959 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1967538959 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1967538959 256)))) (or (and (= ~y$r_buff1_thd0~0_In1967538959 |ULTIMATE.start_main_#t~ite23_Out1967538959|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite23_Out1967538959|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1967538959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1967538959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1967538959, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1967538959} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1967538959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1967538959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1967538959, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1967538959|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1967538959} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:16:51,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1503414513 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1503414513 |ULTIMATE.start_main_#t~ite33_Out-1503414513|) (= |ULTIMATE.start_main_#t~ite32_In-1503414513| |ULTIMATE.start_main_#t~ite32_Out-1503414513|)) (and (= |ULTIMATE.start_main_#t~ite33_Out-1503414513| |ULTIMATE.start_main_#t~ite32_Out-1503414513|) (= ~y$w_buff1~0_In-1503414513 |ULTIMATE.start_main_#t~ite32_Out-1503414513|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1503414513 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In-1503414513 256) 0) .cse1) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-1503414513 256))) (= (mod ~y$w_buff0_used~0_In-1503414513 256) 0))) .cse0))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1503414513, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In-1503414513|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1503414513, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1503414513|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-1503414513|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:16:51,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In994565484 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite36_Out994565484| |ULTIMATE.start_main_#t~ite35_Out994565484|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In994565484 256)))) (or (= (mod ~y$w_buff0_used~0_In994565484 256) 0) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In994565484 256))) (and (= 0 (mod ~y$w_buff1_used~0_In994565484 256)) .cse0))) (= |ULTIMATE.start_main_#t~ite35_Out994565484| ~y$w_buff0_used~0_In994565484) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite36_Out994565484| ~y$w_buff0_used~0_In994565484) (= |ULTIMATE.start_main_#t~ite35_In994565484| |ULTIMATE.start_main_#t~ite35_Out994565484|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In994565484|, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out994565484|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out994565484|, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:16:51,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2043454181 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) (= |ULTIMATE.start_main_#t~ite38_In-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|)) (and (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2043454181 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-2043454181 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2043454181 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-2043454181 256))))) (= |ULTIMATE.start_main_#t~ite38_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-2043454181|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:16:51,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:16:51,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:16:51,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:16:51,852 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:16:51 BasicIcfg [2019-11-28 18:16:51,854 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:16:51,855 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:16:51,855 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:16:51,856 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:16:51,857 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:16:25" (3/4) ... [2019-11-28 18:16:51,860 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:16:51,861 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1214~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1214~0.base_25|) |v_ULTIMATE.start_main_~#t1214~0.offset_19| 0)) |v_#memory_int_21|) (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#NULL.offset_6| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1214~0.base_25| 4)) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= v_~z~0_106 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1214~0.base_25|) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= (store .cse0 |v_ULTIMATE.start_main_~#t1214~0.base_25| 1) |v_#valid_62|) (= v_~a~0_45 0) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0) (= 0 |v_ULTIMATE.start_main_~#t1214~0.offset_19|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1214~0.base_25|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1216~0.base=|v_ULTIMATE.start_main_~#t1216~0.base_25|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ULTIMATE.start_main_~#t1215~0.offset=|v_ULTIMATE.start_main_~#t1215~0.offset_19|, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_~#t1216~0.offset=|v_ULTIMATE.start_main_~#t1216~0.offset_19|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_~#t1214~0.offset=|v_ULTIMATE.start_main_~#t1214~0.offset_19|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, ULTIMATE.start_main_~#t1215~0.base=|v_ULTIMATE.start_main_~#t1215~0.base_25|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1214~0.base=|v_ULTIMATE.start_main_~#t1214~0.base_25|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1216~0.base, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ULTIMATE.start_main_~#t1215~0.offset, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1216~0.offset, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t1214~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1215~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1214~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:51,862 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1215~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t1215~0.base_13| 0)) (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1215~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1215~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1215~0.base_13| 4)) (= 0 |v_ULTIMATE.start_main_~#t1215~0.offset_11|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1215~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1215~0.base_13|) |v_ULTIMATE.start_main_~#t1215~0.offset_11| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1215~0.offset=|v_ULTIMATE.start_main_~#t1215~0.offset_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1215~0.base=|v_ULTIMATE.start_main_~#t1215~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1215~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1215~0.base] because there is no mapped edge [2019-11-28 18:16:51,862 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1216~0.base_13|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1216~0.base_13| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1216~0.base_13|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1216~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1216~0.base_13|) |v_ULTIMATE.start_main_~#t1216~0.offset_11| 2)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1216~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t1216~0.offset_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1216~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1216~0.base=|v_ULTIMATE.start_main_~#t1216~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1216~0.offset=|v_ULTIMATE.start_main_~#t1216~0.offset_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1216~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1216~0.offset, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-11-28 18:16:51,863 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:16:51,864 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:16:51,865 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In218932195 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In218932195 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out218932195| ~y$w_buff0_used~0_In218932195)) (and (= |P2Thread1of1ForFork0_#t~ite11_Out218932195| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In218932195, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In218932195} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In218932195, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out218932195|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In218932195} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:16:51,866 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In740642161 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In740642161 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In740642161 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In740642161 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out740642161| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite12_Out740642161| ~y$w_buff1_used~0_In740642161) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In740642161, ~y$w_buff0_used~0=~y$w_buff0_used~0_In740642161, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In740642161, ~y$w_buff1_used~0=~y$w_buff1_used~0_In740642161} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In740642161, ~y$w_buff0_used~0=~y$w_buff0_used~0_In740642161, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out740642161|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In740642161, ~y$w_buff1_used~0=~y$w_buff1_used~0_In740642161} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:16:51,867 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1358093944 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1358093944 256) 0)) (.cse2 (= ~y$r_buff0_thd3~0_In-1358093944 ~y$r_buff0_thd3~0_Out-1358093944))) (or (and (not .cse0) (= 0 ~y$r_buff0_thd3~0_Out-1358093944) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1358093944, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1358093944} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1358093944, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1358093944, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1358093944|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:16:51,867 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1050405150 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1050405150 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1050405150 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd3~0_In1050405150 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite14_Out1050405150|)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite14_Out1050405150| ~y$r_buff1_thd3~0_In1050405150)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1050405150, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1050405150, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1050405150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1050405150} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1050405150|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1050405150, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1050405150, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1050405150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1050405150} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:16:51,867 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:16:51,868 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1832238425 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In1832238425 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out1832238425| ~y$w_buff1~0_In1832238425)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out1832238425| ~y~0_In1832238425) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1832238425, ~y$w_buff1~0=~y$w_buff1~0_In1832238425, ~y~0=~y~0_In1832238425, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832238425} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1832238425, ~y$w_buff1~0=~y$w_buff1~0_In1832238425, ~y~0=~y~0_In1832238425, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out1832238425|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832238425} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:51,868 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:16:51,868 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1378897744 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1378897744 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out1378897744|) (not .cse1)) (and (= ~y$w_buff0_used~0_In1378897744 |P1Thread1of1ForFork2_#t~ite5_Out1378897744|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1378897744, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1378897744} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1378897744, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1378897744, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1378897744|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:16:51,869 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1464932229 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1464932229 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In1464932229 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In1464932229 256) 0))) (or (and (= ~y$w_buff1_used~0_In1464932229 |P1Thread1of1ForFork2_#t~ite6_Out1464932229|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite6_Out1464932229|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464932229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464932229, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464932229, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464932229} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464932229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464932229, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464932229, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1464932229|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464932229} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:16:51,870 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1012880003 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1012880003 256)))) (or (and (= ~y$r_buff0_thd2~0_In-1012880003 |P1Thread1of1ForFork2_#t~ite7_Out-1012880003|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-1012880003|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1012880003, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1012880003} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1012880003, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1012880003, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-1012880003|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:16:51,870 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In893464797 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In893464797 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In893464797 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In893464797 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In893464797 |P1Thread1of1ForFork2_#t~ite8_Out893464797|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out893464797|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In893464797, ~y$w_buff0_used~0=~y$w_buff0_used~0_In893464797, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In893464797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In893464797} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In893464797, ~y$w_buff0_used~0=~y$w_buff0_used~0_In893464797, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out893464797|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In893464797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In893464797} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:16:51,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:16:51,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:16:51,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-535036463| |ULTIMATE.start_main_#t~ite19_Out-535036463|)) (.cse1 (= (mod ~y$w_buff1_used~0_In-535036463 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-535036463 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite18_Out-535036463| ~y~0_In-535036463)) (and .cse0 (= ~y$w_buff1~0_In-535036463 |ULTIMATE.start_main_#t~ite18_Out-535036463|) (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-535036463, ~y~0=~y~0_In-535036463, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-535036463, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-535036463} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-535036463, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-535036463|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-535036463|, ~y~0=~y~0_In-535036463, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-535036463, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-535036463} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:16:51,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-447245215 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-447245215 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out-447245215|)) (and (= ~y$w_buff0_used~0_In-447245215 |ULTIMATE.start_main_#t~ite20_Out-447245215|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-447245215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-447245215} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-447245215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-447245215, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-447245215|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:16:51,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd0~0_In647016024 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In647016024 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In647016024 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In647016024 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out647016024| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite21_Out647016024| ~y$w_buff1_used~0_In647016024) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In647016024, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In647016024, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In647016024, ~y$w_buff1_used~0=~y$w_buff1_used~0_In647016024} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In647016024, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In647016024, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out647016024|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In647016024, ~y$w_buff1_used~0=~y$w_buff1_used~0_In647016024} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:16:51,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-107325694 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-107325694 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-107325694| ~y$r_buff0_thd0~0_In-107325694) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out-107325694| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-107325694, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-107325694} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-107325694, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-107325694, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-107325694|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:16:51,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In1967538959 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1967538959 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1967538959 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1967538959 256)))) (or (and (= ~y$r_buff1_thd0~0_In1967538959 |ULTIMATE.start_main_#t~ite23_Out1967538959|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite23_Out1967538959|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1967538959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1967538959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1967538959, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1967538959} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1967538959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1967538959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1967538959, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1967538959|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1967538959} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:16:51,877 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1503414513 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1503414513 |ULTIMATE.start_main_#t~ite33_Out-1503414513|) (= |ULTIMATE.start_main_#t~ite32_In-1503414513| |ULTIMATE.start_main_#t~ite32_Out-1503414513|)) (and (= |ULTIMATE.start_main_#t~ite33_Out-1503414513| |ULTIMATE.start_main_#t~ite32_Out-1503414513|) (= ~y$w_buff1~0_In-1503414513 |ULTIMATE.start_main_#t~ite32_Out-1503414513|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1503414513 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In-1503414513 256) 0) .cse1) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-1503414513 256))) (= (mod ~y$w_buff0_used~0_In-1503414513 256) 0))) .cse0))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1503414513, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In-1503414513|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1503414513, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1503414513, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1503414513, ~weak$$choice2~0=~weak$$choice2~0_In-1503414513, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1503414513|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1503414513, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-1503414513|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1503414513} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:16:51,877 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In994565484 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite36_Out994565484| |ULTIMATE.start_main_#t~ite35_Out994565484|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In994565484 256)))) (or (= (mod ~y$w_buff0_used~0_In994565484 256) 0) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In994565484 256))) (and (= 0 (mod ~y$w_buff1_used~0_In994565484 256)) .cse0))) (= |ULTIMATE.start_main_#t~ite35_Out994565484| ~y$w_buff0_used~0_In994565484) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite36_Out994565484| ~y$w_buff0_used~0_In994565484) (= |ULTIMATE.start_main_#t~ite35_In994565484| |ULTIMATE.start_main_#t~ite35_Out994565484|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In994565484|, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In994565484, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In994565484, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out994565484|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out994565484|, ~weak$$choice2~0=~weak$$choice2~0_In994565484, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In994565484, ~y$w_buff1_used~0=~y$w_buff1_used~0_In994565484} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:16:51,878 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2043454181 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) (= |ULTIMATE.start_main_#t~ite38_In-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|)) (and (= |ULTIMATE.start_main_#t~ite39_Out-2043454181| |ULTIMATE.start_main_#t~ite38_Out-2043454181|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2043454181 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-2043454181 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2043454181 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-2043454181 256))))) (= |ULTIMATE.start_main_#t~ite38_Out-2043454181| ~y$w_buff1_used~0_In-2043454181) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2043454181, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-2043454181|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2043454181, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2043454181|, ~weak$$choice2~0=~weak$$choice2~0_In-2043454181, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2043454181, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2043454181} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:16:51,879 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:16:51,880 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:16:51,880 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:16:52,026 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:16:52,026 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:16:52,028 INFO L168 Benchmark]: Toolchain (without parser) took 27877.43 ms. Allocated memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: 1.5 GB). Free memory was 956.3 MB in the beginning and 1.5 GB in the end (delta: -495.1 MB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2019-11-28 18:16:52,031 INFO L168 Benchmark]: CDTParser took 0.35 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:16:52,032 INFO L168 Benchmark]: CACSL2BoogieTranslator took 793.09 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 124.8 MB). Free memory was 951.0 MB in the beginning and 1.1 GB in the end (delta: -136.3 MB). Peak memory consumption was 25.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:52,032 INFO L168 Benchmark]: Boogie Procedure Inliner took 79.58 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:52,032 INFO L168 Benchmark]: Boogie Preprocessor took 56.56 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:16:52,033 INFO L168 Benchmark]: RCFGBuilder took 859.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.7 MB). Peak memory consumption was 51.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:52,033 INFO L168 Benchmark]: TraceAbstraction took 25912.57 ms. Allocated memory was 1.2 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -451.8 MB). Peak memory consumption was 937.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:52,034 INFO L168 Benchmark]: Witness Printer took 171.03 ms. Allocated memory is still 2.5 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 29.2 MB). Peak memory consumption was 29.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:16:52,038 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.35 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 793.09 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 124.8 MB). Free memory was 951.0 MB in the beginning and 1.1 GB in the end (delta: -136.3 MB). Peak memory consumption was 25.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 79.58 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 56.56 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 859.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.7 MB). Peak memory consumption was 51.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 25912.57 ms. Allocated memory was 1.2 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -451.8 MB). Peak memory consumption was 937.0 MB. Max. memory is 11.5 GB. * Witness Printer took 171.03 ms. Allocated memory is still 2.5 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 29.2 MB). Peak memory consumption was 29.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.6s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 26 ChoiceCompositions, 4376 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 58 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.3s, 0 MoverChecksTotal, 46792 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t1214, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t1215, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1216, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L771] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L772] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L773] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L774] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L775] 3 y$r_buff0_thd3 = (_Bool)1 [L778] 3 z = 1 [L781] 3 __unbuffered_p2_EAX = z [L784] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L746] 2 x = 2 [L749] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L788] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L789] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L752] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L753] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L754] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L820] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L821] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L822] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L823] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L824] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 y$flush_delayed = weak$$choice2 [L830] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L832] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L833] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L834] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L835] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L837] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 25.6s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 6.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2217 SDtfs, 2431 SDslu, 4735 SDs, 0 SdLazy, 1975 SolverSat, 156 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 117 GetRequests, 20 SyntacticMatches, 2 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=39320occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 9.6s AutomataMinimizationTime, 17 MinimizatonAttempts, 54334 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 631 NumberOfCodeBlocks, 631 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 557 ConstructedInterpolants, 0 QuantifiedInterpolants, 83669 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...