./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2cfae812637f994f4499329b4635c7ce29b263dc ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:19:35,318 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:19:35,321 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:19:35,341 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:19:35,342 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:19:35,344 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:19:35,346 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:19:35,358 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:19:35,364 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:19:35,368 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:19:35,369 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:19:35,372 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:19:35,372 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:19:35,375 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:19:35,377 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:19:35,379 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:19:35,381 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:19:35,383 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:19:35,386 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:19:35,391 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:19:35,395 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:19:35,400 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:19:35,402 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:19:35,404 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:19:35,407 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:19:35,407 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:19:35,408 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:19:35,410 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:19:35,410 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:19:35,411 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:19:35,412 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:19:35,412 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:19:35,413 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:19:35,415 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:19:35,416 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:19:35,416 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:19:35,417 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:19:35,418 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:19:35,418 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:19:35,419 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:19:35,421 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:19:35,422 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:19:35,456 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:19:35,462 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:19:35,464 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:19:35,464 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:19:35,464 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:19:35,465 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:19:35,465 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:19:35,467 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:19:35,467 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:19:35,467 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:19:35,468 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:19:35,468 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:19:35,468 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:19:35,469 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:19:35,469 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:19:35,470 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:19:35,470 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:19:35,470 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:19:35,471 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:19:35,471 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:19:35,471 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:19:35,471 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:19:35,472 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:19:35,472 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:19:35,473 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:19:35,473 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:19:35,473 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:19:35,474 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:19:35,474 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:19:35,475 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2cfae812637f994f4499329b4635c7ce29b263dc [2019-11-28 18:19:35,821 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:19:35,845 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:19:35,848 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:19:35,850 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:19:35,852 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:19:35,853 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i [2019-11-28 18:19:35,929 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c00681cdf/7b80769db6bb4d0bbf345e25f307c474/FLAG8ce318e79 [2019-11-28 18:19:36,514 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:19:36,514 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i [2019-11-28 18:19:36,528 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c00681cdf/7b80769db6bb4d0bbf345e25f307c474/FLAG8ce318e79 [2019-11-28 18:19:36,755 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c00681cdf/7b80769db6bb4d0bbf345e25f307c474 [2019-11-28 18:19:36,758 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:19:36,760 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:19:36,762 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:19:36,762 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:19:36,767 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:19:36,768 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:19:36" (1/1) ... [2019-11-28 18:19:36,771 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f384efe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:36, skipping insertion in model container [2019-11-28 18:19:36,772 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:19:36" (1/1) ... [2019-11-28 18:19:36,780 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:19:36,842 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:19:37,407 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:19:37,425 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:19:37,523 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:19:37,596 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:19:37,597 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37 WrapperNode [2019-11-28 18:19:37,597 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:19:37,598 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:19:37,598 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:19:37,599 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:19:37,609 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,630 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,670 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:19:37,671 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:19:37,671 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:19:37,671 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:19:37,680 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,681 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,685 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,686 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,696 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,700 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,704 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... [2019-11-28 18:19:37,709 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:19:37,710 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:19:37,710 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:19:37,710 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:19:37,711 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:19:37,771 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:19:37,771 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:19:37,771 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:19:37,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:19:37,772 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:19:37,772 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:19:37,772 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:19:37,772 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:19:37,773 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:19:37,773 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:19:37,773 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:19:37,775 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:19:38,473 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:19:38,473 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:19:38,475 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:38 BoogieIcfgContainer [2019-11-28 18:19:38,475 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:19:38,476 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:19:38,477 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:19:38,480 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:19:38,480 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:19:36" (1/3) ... [2019-11-28 18:19:38,481 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@10a95267 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:19:38, skipping insertion in model container [2019-11-28 18:19:38,482 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:37" (2/3) ... [2019-11-28 18:19:38,483 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@10a95267 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:19:38, skipping insertion in model container [2019-11-28 18:19:38,483 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:38" (3/3) ... [2019-11-28 18:19:38,485 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_rmo.opt.i [2019-11-28 18:19:38,496 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:19:38,496 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:19:38,505 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:19:38,506 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:19:38,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,543 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,543 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,552 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,553 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,553 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,554 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,554 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,555 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,559 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,559 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,559 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,560 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,560 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,560 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,561 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,561 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,561 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,562 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,562 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,563 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,563 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,563 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,563 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:38,584 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:19:38,606 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:19:38,606 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:19:38,607 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:19:38,607 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:19:38,607 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:19:38,607 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:19:38,608 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:19:38,608 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:19:38,626 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-11-28 18:19:38,629 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:19:38,711 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:19:38,711 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:19:38,727 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:19:38,751 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:19:38,795 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:19:38,796 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:19:38,803 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:19:38,821 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-11-28 18:19:38,822 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:19:43,265 WARN L192 SmtUtils]: Spent 221.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-11-28 18:19:43,397 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification that was a NOOP. DAG size: 77 [2019-11-28 18:19:43,448 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46078 [2019-11-28 18:19:43,448 INFO L214 etLargeBlockEncoding]: Total number of compositions: 100 [2019-11-28 18:19:43,452 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-11-28 18:19:44,137 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8413 states. [2019-11-28 18:19:44,140 INFO L276 IsEmpty]: Start isEmpty. Operand 8413 states. [2019-11-28 18:19:44,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-11-28 18:19:44,149 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:44,150 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-11-28 18:19:44,151 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:44,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:44,162 INFO L82 PathProgramCache]: Analyzing trace with hash 693777882, now seen corresponding path program 1 times [2019-11-28 18:19:44,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:44,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830762818] [2019-11-28 18:19:44,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:44,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:44,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:44,430 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830762818] [2019-11-28 18:19:44,431 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:44,432 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:19:44,433 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83437719] [2019-11-28 18:19:44,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:44,438 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:44,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:44,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:44,457 INFO L87 Difference]: Start difference. First operand 8413 states. Second operand 3 states. [2019-11-28 18:19:44,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:44,778 INFO L93 Difference]: Finished difference Result 8377 states and 27415 transitions. [2019-11-28 18:19:44,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:44,781 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-11-28 18:19:44,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:44,913 INFO L225 Difference]: With dead ends: 8377 [2019-11-28 18:19:44,915 INFO L226 Difference]: Without dead ends: 8208 [2019-11-28 18:19:44,920 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:45,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8208 states. [2019-11-28 18:19:45,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8208 to 8208. [2019-11-28 18:19:45,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8208 states. [2019-11-28 18:19:45,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8208 states to 8208 states and 26895 transitions. [2019-11-28 18:19:45,602 INFO L78 Accepts]: Start accepts. Automaton has 8208 states and 26895 transitions. Word has length 5 [2019-11-28 18:19:45,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:45,603 INFO L462 AbstractCegarLoop]: Abstraction has 8208 states and 26895 transitions. [2019-11-28 18:19:45,603 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:45,603 INFO L276 IsEmpty]: Start isEmpty. Operand 8208 states and 26895 transitions. [2019-11-28 18:19:45,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:19:45,607 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:45,607 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:45,608 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:45,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:45,608 INFO L82 PathProgramCache]: Analyzing trace with hash 2143808117, now seen corresponding path program 1 times [2019-11-28 18:19:45,608 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:45,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920936818] [2019-11-28 18:19:45,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:45,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:45,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:45,776 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920936818] [2019-11-28 18:19:45,776 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:45,776 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:45,777 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1718302053] [2019-11-28 18:19:45,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:19:45,778 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:45,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:19:45,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:45,779 INFO L87 Difference]: Start difference. First operand 8208 states and 26895 transitions. Second operand 4 states. [2019-11-28 18:19:46,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:46,223 INFO L93 Difference]: Finished difference Result 11151 states and 35424 transitions. [2019-11-28 18:19:46,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:19:46,223 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:19:46,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:46,295 INFO L225 Difference]: With dead ends: 11151 [2019-11-28 18:19:46,295 INFO L226 Difference]: Without dead ends: 11151 [2019-11-28 18:19:46,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:46,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11151 states. [2019-11-28 18:19:46,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11151 to 10895. [2019-11-28 18:19:46,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10895 states. [2019-11-28 18:19:46,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10895 states to 10895 states and 34716 transitions. [2019-11-28 18:19:46,694 INFO L78 Accepts]: Start accepts. Automaton has 10895 states and 34716 transitions. Word has length 11 [2019-11-28 18:19:46,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:46,695 INFO L462 AbstractCegarLoop]: Abstraction has 10895 states and 34716 transitions. [2019-11-28 18:19:46,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:19:46,695 INFO L276 IsEmpty]: Start isEmpty. Operand 10895 states and 34716 transitions. [2019-11-28 18:19:46,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:19:46,698 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:46,698 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:46,698 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:46,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:46,699 INFO L82 PathProgramCache]: Analyzing trace with hash 1923085964, now seen corresponding path program 1 times [2019-11-28 18:19:46,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:46,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047501227] [2019-11-28 18:19:46,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:46,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:46,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:46,778 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047501227] [2019-11-28 18:19:46,778 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:46,778 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:46,779 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1700194905] [2019-11-28 18:19:46,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:19:46,779 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:46,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:19:46,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:46,780 INFO L87 Difference]: Start difference. First operand 10895 states and 34716 transitions. Second operand 4 states. [2019-11-28 18:19:47,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:47,539 INFO L93 Difference]: Finished difference Result 15774 states and 49116 transitions. [2019-11-28 18:19:47,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:19:47,539 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:19:47,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:47,593 INFO L225 Difference]: With dead ends: 15774 [2019-11-28 18:19:47,593 INFO L226 Difference]: Without dead ends: 15767 [2019-11-28 18:19:47,594 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:47,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15767 states. [2019-11-28 18:19:48,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15767 to 12980. [2019-11-28 18:19:48,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12980 states. [2019-11-28 18:19:48,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12980 states to 12980 states and 41212 transitions. [2019-11-28 18:19:48,165 INFO L78 Accepts]: Start accepts. Automaton has 12980 states and 41212 transitions. Word has length 11 [2019-11-28 18:19:48,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:48,165 INFO L462 AbstractCegarLoop]: Abstraction has 12980 states and 41212 transitions. [2019-11-28 18:19:48,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:19:48,166 INFO L276 IsEmpty]: Start isEmpty. Operand 12980 states and 41212 transitions. [2019-11-28 18:19:48,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:19:48,171 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:48,171 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:48,172 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:48,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:48,172 INFO L82 PathProgramCache]: Analyzing trace with hash 1818004199, now seen corresponding path program 1 times [2019-11-28 18:19:48,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:48,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942634037] [2019-11-28 18:19:48,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:48,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:48,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:48,248 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942634037] [2019-11-28 18:19:48,249 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:48,251 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:48,251 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [642777922] [2019-11-28 18:19:48,252 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:48,252 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:48,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:48,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:48,253 INFO L87 Difference]: Start difference. First operand 12980 states and 41212 transitions. Second operand 3 states. [2019-11-28 18:19:48,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:48,272 INFO L93 Difference]: Finished difference Result 1654 states and 3712 transitions. [2019-11-28 18:19:48,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:48,273 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-11-28 18:19:48,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:48,277 INFO L225 Difference]: With dead ends: 1654 [2019-11-28 18:19:48,278 INFO L226 Difference]: Without dead ends: 1654 [2019-11-28 18:19:48,278 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:48,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1654 states. [2019-11-28 18:19:48,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1654 to 1654. [2019-11-28 18:19:48,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1654 states. [2019-11-28 18:19:48,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1654 states to 1654 states and 3712 transitions. [2019-11-28 18:19:48,316 INFO L78 Accepts]: Start accepts. Automaton has 1654 states and 3712 transitions. Word has length 17 [2019-11-28 18:19:48,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:48,324 INFO L462 AbstractCegarLoop]: Abstraction has 1654 states and 3712 transitions. [2019-11-28 18:19:48,325 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:48,325 INFO L276 IsEmpty]: Start isEmpty. Operand 1654 states and 3712 transitions. [2019-11-28 18:19:48,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-11-28 18:19:48,326 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:48,327 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:48,327 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:48,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:48,327 INFO L82 PathProgramCache]: Analyzing trace with hash 909891733, now seen corresponding path program 1 times [2019-11-28 18:19:48,328 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:48,328 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843022015] [2019-11-28 18:19:48,328 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:48,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:48,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:48,435 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843022015] [2019-11-28 18:19:48,436 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:48,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:19:48,436 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40369716] [2019-11-28 18:19:48,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:19:48,436 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:48,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:19:48,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:48,438 INFO L87 Difference]: Start difference. First operand 1654 states and 3712 transitions. Second operand 4 states. [2019-11-28 18:19:48,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:48,457 INFO L93 Difference]: Finished difference Result 356 states and 659 transitions. [2019-11-28 18:19:48,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:19:48,458 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-11-28 18:19:48,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:48,460 INFO L225 Difference]: With dead ends: 356 [2019-11-28 18:19:48,460 INFO L226 Difference]: Without dead ends: 356 [2019-11-28 18:19:48,461 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:48,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 356 states. [2019-11-28 18:19:48,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 356 to 321. [2019-11-28 18:19:48,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2019-11-28 18:19:48,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 594 transitions. [2019-11-28 18:19:48,471 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 594 transitions. Word has length 23 [2019-11-28 18:19:48,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:48,472 INFO L462 AbstractCegarLoop]: Abstraction has 321 states and 594 transitions. [2019-11-28 18:19:48,472 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:19:48,472 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 594 transitions. [2019-11-28 18:19:48,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:48,474 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:48,474 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:48,475 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:48,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:48,476 INFO L82 PathProgramCache]: Analyzing trace with hash 763517816, now seen corresponding path program 1 times [2019-11-28 18:19:48,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:48,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903621226] [2019-11-28 18:19:48,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:48,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:48,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:48,611 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1903621226] [2019-11-28 18:19:48,612 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:48,612 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:19:48,612 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411052090] [2019-11-28 18:19:48,614 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:48,615 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:48,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:48,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:48,615 INFO L87 Difference]: Start difference. First operand 321 states and 594 transitions. Second operand 3 states. [2019-11-28 18:19:48,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:48,659 INFO L93 Difference]: Finished difference Result 331 states and 608 transitions. [2019-11-28 18:19:48,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:48,660 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:19:48,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:48,662 INFO L225 Difference]: With dead ends: 331 [2019-11-28 18:19:48,662 INFO L226 Difference]: Without dead ends: 331 [2019-11-28 18:19:48,662 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:48,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2019-11-28 18:19:48,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 327. [2019-11-28 18:19:48,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-11-28 18:19:48,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 604 transitions. [2019-11-28 18:19:48,669 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 604 transitions. Word has length 52 [2019-11-28 18:19:48,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:48,670 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 604 transitions. [2019-11-28 18:19:48,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:48,671 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 604 transitions. [2019-11-28 18:19:48,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:48,674 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:48,675 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:48,675 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:48,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:48,676 INFO L82 PathProgramCache]: Analyzing trace with hash 1269350019, now seen corresponding path program 1 times [2019-11-28 18:19:48,676 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:48,676 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576388927] [2019-11-28 18:19:48,677 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:48,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:48,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:48,791 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576388927] [2019-11-28 18:19:48,791 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:48,791 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:19:48,792 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849292122] [2019-11-28 18:19:48,792 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:19:48,792 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:48,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:19:48,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:48,793 INFO L87 Difference]: Start difference. First operand 327 states and 604 transitions. Second operand 5 states. [2019-11-28 18:19:48,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:48,989 INFO L93 Difference]: Finished difference Result 458 states and 840 transitions. [2019-11-28 18:19:48,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:19:48,989 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-28 18:19:48,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:48,991 INFO L225 Difference]: With dead ends: 458 [2019-11-28 18:19:48,991 INFO L226 Difference]: Without dead ends: 458 [2019-11-28 18:19:48,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:48,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2019-11-28 18:19:48,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 374. [2019-11-28 18:19:48,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2019-11-28 18:19:48,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 695 transitions. [2019-11-28 18:19:49,000 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 695 transitions. Word has length 52 [2019-11-28 18:19:49,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:49,002 INFO L462 AbstractCegarLoop]: Abstraction has 374 states and 695 transitions. [2019-11-28 18:19:49,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:19:49,002 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 695 transitions. [2019-11-28 18:19:49,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:49,004 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:49,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:49,004 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:49,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:49,005 INFO L82 PathProgramCache]: Analyzing trace with hash 544633013, now seen corresponding path program 2 times [2019-11-28 18:19:49,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:49,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058577869] [2019-11-28 18:19:49,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:49,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:49,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:49,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058577869] [2019-11-28 18:19:49,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:49,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:19:49,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1542552927] [2019-11-28 18:19:49,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:19:49,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:49,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:19:49,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:49,123 INFO L87 Difference]: Start difference. First operand 374 states and 695 transitions. Second operand 6 states. [2019-11-28 18:19:49,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:49,441 INFO L93 Difference]: Finished difference Result 513 states and 942 transitions. [2019-11-28 18:19:49,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:19:49,442 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:19:49,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:49,444 INFO L225 Difference]: With dead ends: 513 [2019-11-28 18:19:49,444 INFO L226 Difference]: Without dead ends: 513 [2019-11-28 18:19:49,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:19:49,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states. [2019-11-28 18:19:49,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 406. [2019-11-28 18:19:49,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2019-11-28 18:19:49,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 754 transitions. [2019-11-28 18:19:49,454 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 754 transitions. Word has length 52 [2019-11-28 18:19:49,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:49,454 INFO L462 AbstractCegarLoop]: Abstraction has 406 states and 754 transitions. [2019-11-28 18:19:49,454 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:19:49,455 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 754 transitions. [2019-11-28 18:19:49,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:49,456 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:49,456 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:49,457 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:49,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:49,457 INFO L82 PathProgramCache]: Analyzing trace with hash 1227473235, now seen corresponding path program 3 times [2019-11-28 18:19:49,457 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:49,458 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313178187] [2019-11-28 18:19:49,458 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:49,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:49,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:49,571 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313178187] [2019-11-28 18:19:49,571 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:49,572 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:19:49,572 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [785013522] [2019-11-28 18:19:49,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:19:49,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:49,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:19:49,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:49,575 INFO L87 Difference]: Start difference. First operand 406 states and 754 transitions. Second operand 6 states. [2019-11-28 18:19:49,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:49,922 INFO L93 Difference]: Finished difference Result 694 states and 1274 transitions. [2019-11-28 18:19:49,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:19:49,922 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:19:49,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:49,924 INFO L225 Difference]: With dead ends: 694 [2019-11-28 18:19:49,925 INFO L226 Difference]: Without dead ends: 694 [2019-11-28 18:19:49,925 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:19:49,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 694 states. [2019-11-28 18:19:49,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 694 to 445. [2019-11-28 18:19:49,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 445 states. [2019-11-28 18:19:49,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 833 transitions. [2019-11-28 18:19:49,936 INFO L78 Accepts]: Start accepts. Automaton has 445 states and 833 transitions. Word has length 52 [2019-11-28 18:19:49,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:49,937 INFO L462 AbstractCegarLoop]: Abstraction has 445 states and 833 transitions. [2019-11-28 18:19:49,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:19:49,937 INFO L276 IsEmpty]: Start isEmpty. Operand 445 states and 833 transitions. [2019-11-28 18:19:49,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:49,938 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:49,939 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:49,939 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:49,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:49,939 INFO L82 PathProgramCache]: Analyzing trace with hash 1833025349, now seen corresponding path program 4 times [2019-11-28 18:19:49,940 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:49,940 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999890266] [2019-11-28 18:19:49,940 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:49,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999890266] [2019-11-28 18:19:50,072 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,072 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:19:50,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817363284] [2019-11-28 18:19:50,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:19:50,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:19:50,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:19:50,074 INFO L87 Difference]: Start difference. First operand 445 states and 833 transitions. Second operand 7 states. [2019-11-28 18:19:50,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:50,527 INFO L93 Difference]: Finished difference Result 702 states and 1289 transitions. [2019-11-28 18:19:50,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:19:50,528 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:19:50,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:50,531 INFO L225 Difference]: With dead ends: 702 [2019-11-28 18:19:50,531 INFO L226 Difference]: Without dead ends: 702 [2019-11-28 18:19:50,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:19:50,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 702 states. [2019-11-28 18:19:50,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 702 to 424. [2019-11-28 18:19:50,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 424 states. [2019-11-28 18:19:50,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 792 transitions. [2019-11-28 18:19:50,541 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 792 transitions. Word has length 52 [2019-11-28 18:19:50,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:50,542 INFO L462 AbstractCegarLoop]: Abstraction has 424 states and 792 transitions. [2019-11-28 18:19:50,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:19:50,542 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 792 transitions. [2019-11-28 18:19:50,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:50,543 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:50,543 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:50,544 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:50,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:50,544 INFO L82 PathProgramCache]: Analyzing trace with hash 513839464, now seen corresponding path program 1 times [2019-11-28 18:19:50,544 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:50,545 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424629888] [2019-11-28 18:19:50,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,868 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424629888] [2019-11-28 18:19:50,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:19:50,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [145931038] [2019-11-28 18:19:50,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-11-28 18:19:50,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-11-28 18:19:50,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:19:50,871 INFO L87 Difference]: Start difference. First operand 424 states and 792 transitions. Second operand 11 states. [2019-11-28 18:19:51,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:51,265 INFO L93 Difference]: Finished difference Result 458 states and 803 transitions. [2019-11-28 18:19:51,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:19:51,266 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 53 [2019-11-28 18:19:51,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:51,267 INFO L225 Difference]: With dead ends: 458 [2019-11-28 18:19:51,268 INFO L226 Difference]: Without dead ends: 458 [2019-11-28 18:19:51,268 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=170, Unknown=0, NotChecked=0, Total=240 [2019-11-28 18:19:51,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2019-11-28 18:19:51,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 340. [2019-11-28 18:19:51,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2019-11-28 18:19:51,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 601 transitions. [2019-11-28 18:19:51,278 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 601 transitions. Word has length 53 [2019-11-28 18:19:51,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:51,279 INFO L462 AbstractCegarLoop]: Abstraction has 340 states and 601 transitions. [2019-11-28 18:19:51,279 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-11-28 18:19:51,279 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 601 transitions. [2019-11-28 18:19:51,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:51,280 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:51,280 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:51,281 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:51,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:51,281 INFO L82 PathProgramCache]: Analyzing trace with hash -1617311510, now seen corresponding path program 2 times [2019-11-28 18:19:51,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:51,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996943483] [2019-11-28 18:19:51,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:51,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:51,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:51,582 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1996943483] [2019-11-28 18:19:51,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:51,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-28 18:19:51,583 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2106563588] [2019-11-28 18:19:51,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-28 18:19:51,583 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:51,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-28 18:19:51,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-11-28 18:19:51,584 INFO L87 Difference]: Start difference. First operand 340 states and 601 transitions. Second operand 10 states. [2019-11-28 18:19:51,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:51,993 INFO L93 Difference]: Finished difference Result 440 states and 769 transitions. [2019-11-28 18:19:51,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-28 18:19:51,994 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 53 [2019-11-28 18:19:51,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:51,996 INFO L225 Difference]: With dead ends: 440 [2019-11-28 18:19:51,996 INFO L226 Difference]: Without dead ends: 440 [2019-11-28 18:19:51,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=196, Unknown=0, NotChecked=0, Total=272 [2019-11-28 18:19:51,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 440 states. [2019-11-28 18:19:52,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 440 to 336. [2019-11-28 18:19:52,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 336 states. [2019-11-28 18:19:52,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 336 states to 336 states and 593 transitions. [2019-11-28 18:19:52,003 INFO L78 Accepts]: Start accepts. Automaton has 336 states and 593 transitions. Word has length 53 [2019-11-28 18:19:52,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:52,003 INFO L462 AbstractCegarLoop]: Abstraction has 336 states and 593 transitions. [2019-11-28 18:19:52,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-28 18:19:52,004 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 593 transitions. [2019-11-28 18:19:52,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:52,005 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:52,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:52,005 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:52,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:52,005 INFO L82 PathProgramCache]: Analyzing trace with hash -446396804, now seen corresponding path program 3 times [2019-11-28 18:19:52,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:52,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112571968] [2019-11-28 18:19:52,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:52,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:52,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:52,267 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2112571968] [2019-11-28 18:19:52,267 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:52,267 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-28 18:19:52,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053826962] [2019-11-28 18:19:52,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-28 18:19:52,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:52,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-28 18:19:52,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2019-11-28 18:19:52,269 INFO L87 Difference]: Start difference. First operand 336 states and 593 transitions. Second operand 10 states. [2019-11-28 18:19:52,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:52,727 INFO L93 Difference]: Finished difference Result 474 states and 820 transitions. [2019-11-28 18:19:52,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:19:52,729 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 53 [2019-11-28 18:19:52,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:52,731 INFO L225 Difference]: With dead ends: 474 [2019-11-28 18:19:52,731 INFO L226 Difference]: Without dead ends: 474 [2019-11-28 18:19:52,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=226, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:19:52,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2019-11-28 18:19:52,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 328. [2019-11-28 18:19:52,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-11-28 18:19:52,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 577 transitions. [2019-11-28 18:19:52,747 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 577 transitions. Word has length 53 [2019-11-28 18:19:52,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:52,748 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 577 transitions. [2019-11-28 18:19:52,748 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-28 18:19:52,748 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 577 transitions. [2019-11-28 18:19:52,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:52,751 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:52,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:52,751 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:52,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:52,752 INFO L82 PathProgramCache]: Analyzing trace with hash -162355984, now seen corresponding path program 4 times [2019-11-28 18:19:52,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:52,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061161354] [2019-11-28 18:19:52,755 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:52,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:52,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:52,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1061161354] [2019-11-28 18:19:52,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:52,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:52,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [426595393] [2019-11-28 18:19:52,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:52,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:52,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:52,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:52,860 INFO L87 Difference]: Start difference. First operand 328 states and 577 transitions. Second operand 3 states. [2019-11-28 18:19:52,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:52,899 INFO L93 Difference]: Finished difference Result 328 states and 576 transitions. [2019-11-28 18:19:52,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:52,899 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:19:52,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:52,900 INFO L225 Difference]: With dead ends: 328 [2019-11-28 18:19:52,900 INFO L226 Difference]: Without dead ends: 328 [2019-11-28 18:19:52,901 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:52,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2019-11-28 18:19:52,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 264. [2019-11-28 18:19:52,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 264 states. [2019-11-28 18:19:52,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 466 transitions. [2019-11-28 18:19:52,906 INFO L78 Accepts]: Start accepts. Automaton has 264 states and 466 transitions. Word has length 53 [2019-11-28 18:19:52,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:52,907 INFO L462 AbstractCegarLoop]: Abstraction has 264 states and 466 transitions. [2019-11-28 18:19:52,907 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:52,907 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 466 transitions. [2019-11-28 18:19:52,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:19:52,908 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:52,908 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:52,908 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:52,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:52,908 INFO L82 PathProgramCache]: Analyzing trace with hash 1221221950, now seen corresponding path program 1 times [2019-11-28 18:19:52,909 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:52,909 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190289002] [2019-11-28 18:19:52,909 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:52,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:53,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:53,042 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [190289002] [2019-11-28 18:19:53,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:53,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:19:53,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [346523976] [2019-11-28 18:19:53,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:19:53,044 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:53,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:19:53,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:53,044 INFO L87 Difference]: Start difference. First operand 264 states and 466 transitions. Second operand 6 states. [2019-11-28 18:19:53,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:53,108 INFO L93 Difference]: Finished difference Result 430 states and 746 transitions. [2019-11-28 18:19:53,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:19:53,109 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-11-28 18:19:53,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:53,110 INFO L225 Difference]: With dead ends: 430 [2019-11-28 18:19:53,110 INFO L226 Difference]: Without dead ends: 183 [2019-11-28 18:19:53,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:19:53,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2019-11-28 18:19:53,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2019-11-28 18:19:53,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2019-11-28 18:19:53,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 306 transitions. [2019-11-28 18:19:53,119 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 306 transitions. Word has length 54 [2019-11-28 18:19:53,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:53,120 INFO L462 AbstractCegarLoop]: Abstraction has 183 states and 306 transitions. [2019-11-28 18:19:53,120 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:19:53,120 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 306 transitions. [2019-11-28 18:19:53,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:19:53,125 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:53,126 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:53,126 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:53,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:53,127 INFO L82 PathProgramCache]: Analyzing trace with hash 2120402622, now seen corresponding path program 2 times [2019-11-28 18:19:53,127 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:53,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591637877] [2019-11-28 18:19:53,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:53,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:53,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:53,438 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591637877] [2019-11-28 18:19:53,440 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:53,440 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:19:53,441 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057675191] [2019-11-28 18:19:53,441 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:19:53,441 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:53,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:19:53,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:19:53,442 INFO L87 Difference]: Start difference. First operand 183 states and 306 transitions. Second operand 12 states. [2019-11-28 18:19:53,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:53,826 INFO L93 Difference]: Finished difference Result 336 states and 559 transitions. [2019-11-28 18:19:53,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-28 18:19:53,827 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-11-28 18:19:53,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:53,828 INFO L225 Difference]: With dead ends: 336 [2019-11-28 18:19:53,828 INFO L226 Difference]: Without dead ends: 301 [2019-11-28 18:19:53,829 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=78, Invalid=342, Unknown=0, NotChecked=0, Total=420 [2019-11-28 18:19:53,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2019-11-28 18:19:53,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 291. [2019-11-28 18:19:53,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2019-11-28 18:19:53,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 491 transitions. [2019-11-28 18:19:53,838 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 491 transitions. Word has length 54 [2019-11-28 18:19:53,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:53,838 INFO L462 AbstractCegarLoop]: Abstraction has 291 states and 491 transitions. [2019-11-28 18:19:53,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:19:53,839 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 491 transitions. [2019-11-28 18:19:53,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:19:53,844 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:53,844 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:53,845 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:53,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:53,845 INFO L82 PathProgramCache]: Analyzing trace with hash 1631137646, now seen corresponding path program 3 times [2019-11-28 18:19:53,846 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:53,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425579895] [2019-11-28 18:19:53,847 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:53,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:19:53,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:19:54,006 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:19:54,006 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:19:54,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1451~0.base_22| 4)) (= |v_ULTIMATE.start_main_~#t1451~0.offset_17| 0) (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1451~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1451~0.base_22|) |v_ULTIMATE.start_main_~#t1451~0.offset_17| 0)) |v_#memory_int_13|) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= 0 v_~x~0_144) (= v_~x$r_buff0_thd1~0_115 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1451~0.base_22|) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff0_thd2~0_168) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= |v_#valid_47| (store .cse0 |v_ULTIMATE.start_main_~#t1451~0.base_22| 1)) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1451~0.base_22|) 0) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t1452~0.base=|v_ULTIMATE.start_main_~#t1452~0.base_17|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~x~0=v_~x~0_144, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ~y~0=v_~y~0_67, ULTIMATE.start_main_~#t1451~0.base=|v_ULTIMATE.start_main_~#t1451~0.base_22|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, ULTIMATE.start_main_~#t1452~0.offset=|v_ULTIMATE.start_main_~#t1452~0.offset_14|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_~#t1451~0.offset=|v_ULTIMATE.start_main_~#t1451~0.offset_17|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1452~0.base, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_~#t1451~0.base, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1452~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t1451~0.offset, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:19:54,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1452~0.base_10|) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t1452~0.base_10| 4)) (not (= |v_ULTIMATE.start_main_~#t1452~0.base_10| 0)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1452~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1452~0.base_10|) |v_ULTIMATE.start_main_~#t1452~0.offset_9| 1))) (= |v_ULTIMATE.start_main_~#t1452~0.offset_9| 0) (= |v_#valid_25| (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1452~0.base_10| 1)) (= (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1452~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1452~0.offset=|v_ULTIMATE.start_main_~#t1452~0.offset_9|, ULTIMATE.start_main_~#t1452~0.base=|v_ULTIMATE.start_main_~#t1452~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1452~0.offset, ULTIMATE.start_main_~#t1452~0.base] because there is no mapped edge [2019-11-28 18:19:54,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:19:54,015 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-775209814 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-775209814 256))) (.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out-775209814| |P0Thread1of1ForFork0_#t~ite3_Out-775209814|))) (or (and (or .cse0 .cse1) (= ~x~0_In-775209814 |P0Thread1of1ForFork0_#t~ite3_Out-775209814|) .cse2) (and (not .cse1) (= ~x$w_buff1~0_In-775209814 |P0Thread1of1ForFork0_#t~ite3_Out-775209814|) (not .cse0) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-775209814, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-775209814, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-775209814, ~x~0=~x~0_In-775209814} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-775209814|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-775209814|, ~x$w_buff1~0=~x$w_buff1~0_In-775209814, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-775209814, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-775209814, ~x~0=~x~0_In-775209814} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:19:54,016 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In502986957 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In502986957 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out502986957| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out502986957| ~x$w_buff0_used~0_In502986957) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In502986957, ~x$w_buff0_used~0=~x$w_buff0_used~0_In502986957} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out502986957|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In502986957, ~x$w_buff0_used~0=~x$w_buff0_used~0_In502986957} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:19:54,017 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In1299130042 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In1299130042 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In1299130042 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1299130042 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1299130042 |P0Thread1of1ForFork0_#t~ite6_Out1299130042|)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out1299130042| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1299130042, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1299130042, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1299130042, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1299130042} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1299130042|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1299130042, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1299130042, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1299130042, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1299130042} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:19:54,017 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In73477898 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In73477898 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out73477898| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In73477898 |P1Thread1of1ForFork1_#t~ite11_Out73477898|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In73477898, ~x$w_buff0_used~0=~x$w_buff0_used~0_In73477898} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out73477898|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In73477898, ~x$w_buff0_used~0=~x$w_buff0_used~0_In73477898} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:19:54,018 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In2127222774 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In2127222774 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out2127222774|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In2127222774 |P0Thread1of1ForFork0_#t~ite7_Out2127222774|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2127222774, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2127222774} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2127222774, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out2127222774|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2127222774} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:19:54,019 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-52225528 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-52225528 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In-52225528 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-52225528 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-52225528| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-52225528| ~x$r_buff1_thd1~0_In-52225528)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-52225528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-52225528, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-52225528, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-52225528} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-52225528, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-52225528|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-52225528, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-52225528, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-52225528} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:19:54,019 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:19:54,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In1706317537 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In1706317537 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In1706317537 256))) (.cse2 (= (mod ~x$r_buff0_thd2~0_In1706317537 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out1706317537| 0)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out1706317537| ~x$w_buff1_used~0_In1706317537) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1706317537, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1706317537, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1706317537, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1706317537} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1706317537, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1706317537, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1706317537|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1706317537, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1706317537} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:19:54,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_In1278367555 ~x$r_buff0_thd2~0_Out1278367555)) (.cse2 (= (mod ~x$w_buff0_used~0_In1278367555 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1278367555 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse2) (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out1278367555)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1278367555, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1278367555} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1278367555|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1278367555, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1278367555} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:19:54,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In422247736 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In422247736 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In422247736 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In422247736 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In422247736 |P1Thread1of1ForFork1_#t~ite14_Out422247736|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out422247736|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In422247736, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In422247736, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In422247736, ~x$w_buff0_used~0=~x$w_buff0_used~0_In422247736} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In422247736, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In422247736, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In422247736, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out422247736|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In422247736} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:19:54,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:19:54,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:19:54,022 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-1890844751| |ULTIMATE.start_main_#t~ite17_Out-1890844751|)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1890844751 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1890844751 256)))) (or (and .cse0 (not .cse1) (= ~x$w_buff1~0_In-1890844751 |ULTIMATE.start_main_#t~ite17_Out-1890844751|) (not .cse2)) (and .cse0 (= ~x~0_In-1890844751 |ULTIMATE.start_main_#t~ite17_Out-1890844751|) (or .cse2 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1890844751, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1890844751, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1890844751, ~x~0=~x~0_In-1890844751} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1890844751|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1890844751|, ~x$w_buff1~0=~x$w_buff1~0_In-1890844751, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1890844751, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1890844751, ~x~0=~x~0_In-1890844751} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:19:54,022 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In833651632 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In833651632 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite19_Out833651632|)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In833651632 |ULTIMATE.start_main_#t~ite19_Out833651632|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In833651632, ~x$w_buff0_used~0=~x$w_buff0_used~0_In833651632} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In833651632, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out833651632|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In833651632} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:19:54,023 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In-339905635 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-339905635 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-339905635 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-339905635 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-339905635| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-339905635| ~x$w_buff1_used~0_In-339905635)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-339905635, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-339905635, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-339905635, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-339905635} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-339905635, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-339905635, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-339905635|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-339905635, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-339905635} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:19:54,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1937141926 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1937141926 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-1937141926| 0)) (and (= ~x$r_buff0_thd0~0_In-1937141926 |ULTIMATE.start_main_#t~ite21_Out-1937141926|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1937141926, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1937141926} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1937141926, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1937141926|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1937141926} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:19:54,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd0~0_In475233764 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In475233764 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In475233764 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In475233764 256) 0))) (or (and (= ~x$r_buff1_thd0~0_In475233764 |ULTIMATE.start_main_#t~ite22_Out475233764|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out475233764|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In475233764, ~x$w_buff1_used~0=~x$w_buff1_used~0_In475233764, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In475233764, ~x$w_buff0_used~0=~x$w_buff0_used~0_In475233764} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In475233764, ~x$w_buff1_used~0=~x$w_buff1_used~0_In475233764, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In475233764, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out475233764|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In475233764} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:19:54,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1595543873 256)))) (or (and (= |ULTIMATE.start_main_#t~ite31_In1595543873| |ULTIMATE.start_main_#t~ite31_Out1595543873|) (= |ULTIMATE.start_main_#t~ite32_Out1595543873| ~x$w_buff1~0_In1595543873) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite31_Out1595543873| ~x$w_buff1~0_In1595543873) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1595543873 256) 0))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1595543873 256))) (= 0 (mod ~x$w_buff0_used~0_In1595543873 256)) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In1595543873 256))))) .cse0 (= |ULTIMATE.start_main_#t~ite31_Out1595543873| |ULTIMATE.start_main_#t~ite32_Out1595543873|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1595543873, ~x$w_buff1~0=~x$w_buff1~0_In1595543873, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1595543873, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1595543873, ~weak$$choice2~0=~weak$$choice2~0_In1595543873, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In1595543873|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1595543873} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1595543873, ~x$w_buff1~0=~x$w_buff1~0_In1595543873, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1595543873, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out1595543873|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1595543873, ~weak$$choice2~0=~weak$$choice2~0_In1595543873, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1595543873|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1595543873} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:19:54,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:19:54,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:19:54,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:19:54,113 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:19:54 BasicIcfg [2019-11-28 18:19:54,114 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:19:54,114 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:19:54,114 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:19:54,115 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:19:54,115 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:38" (3/4) ... [2019-11-28 18:19:54,120 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:19:54,123 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1451~0.base_22| 4)) (= |v_ULTIMATE.start_main_~#t1451~0.offset_17| 0) (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1451~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1451~0.base_22|) |v_ULTIMATE.start_main_~#t1451~0.offset_17| 0)) |v_#memory_int_13|) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= 0 v_~x~0_144) (= v_~x$r_buff0_thd1~0_115 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1451~0.base_22|) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff0_thd2~0_168) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= |v_#valid_47| (store .cse0 |v_ULTIMATE.start_main_~#t1451~0.base_22| 1)) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1451~0.base_22|) 0) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t1452~0.base=|v_ULTIMATE.start_main_~#t1452~0.base_17|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~x~0=v_~x~0_144, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ~y~0=v_~y~0_67, ULTIMATE.start_main_~#t1451~0.base=|v_ULTIMATE.start_main_~#t1451~0.base_22|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, ULTIMATE.start_main_~#t1452~0.offset=|v_ULTIMATE.start_main_~#t1452~0.offset_14|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_~#t1451~0.offset=|v_ULTIMATE.start_main_~#t1451~0.offset_17|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1452~0.base, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_~#t1451~0.base, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1452~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t1451~0.offset, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:19:54,124 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1452~0.base_10|) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t1452~0.base_10| 4)) (not (= |v_ULTIMATE.start_main_~#t1452~0.base_10| 0)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1452~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1452~0.base_10|) |v_ULTIMATE.start_main_~#t1452~0.offset_9| 1))) (= |v_ULTIMATE.start_main_~#t1452~0.offset_9| 0) (= |v_#valid_25| (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1452~0.base_10| 1)) (= (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1452~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1452~0.offset=|v_ULTIMATE.start_main_~#t1452~0.offset_9|, ULTIMATE.start_main_~#t1452~0.base=|v_ULTIMATE.start_main_~#t1452~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1452~0.offset, ULTIMATE.start_main_~#t1452~0.base] because there is no mapped edge [2019-11-28 18:19:54,125 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:19:54,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-775209814 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-775209814 256))) (.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out-775209814| |P0Thread1of1ForFork0_#t~ite3_Out-775209814|))) (or (and (or .cse0 .cse1) (= ~x~0_In-775209814 |P0Thread1of1ForFork0_#t~ite3_Out-775209814|) .cse2) (and (not .cse1) (= ~x$w_buff1~0_In-775209814 |P0Thread1of1ForFork0_#t~ite3_Out-775209814|) (not .cse0) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-775209814, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-775209814, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-775209814, ~x~0=~x~0_In-775209814} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-775209814|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-775209814|, ~x$w_buff1~0=~x$w_buff1~0_In-775209814, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-775209814, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-775209814, ~x~0=~x~0_In-775209814} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:19:54,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In502986957 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In502986957 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out502986957| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out502986957| ~x$w_buff0_used~0_In502986957) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In502986957, ~x$w_buff0_used~0=~x$w_buff0_used~0_In502986957} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out502986957|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In502986957, ~x$w_buff0_used~0=~x$w_buff0_used~0_In502986957} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:19:54,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In1299130042 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In1299130042 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In1299130042 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1299130042 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1299130042 |P0Thread1of1ForFork0_#t~ite6_Out1299130042|)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out1299130042| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1299130042, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1299130042, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1299130042, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1299130042} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1299130042|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1299130042, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1299130042, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1299130042, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1299130042} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:19:54,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In73477898 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In73477898 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out73477898| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In73477898 |P1Thread1of1ForFork1_#t~ite11_Out73477898|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In73477898, ~x$w_buff0_used~0=~x$w_buff0_used~0_In73477898} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out73477898|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In73477898, ~x$w_buff0_used~0=~x$w_buff0_used~0_In73477898} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:19:54,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In2127222774 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In2127222774 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out2127222774|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In2127222774 |P0Thread1of1ForFork0_#t~ite7_Out2127222774|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2127222774, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2127222774} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2127222774, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out2127222774|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2127222774} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:19:54,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-52225528 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-52225528 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In-52225528 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-52225528 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-52225528| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-52225528| ~x$r_buff1_thd1~0_In-52225528)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-52225528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-52225528, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-52225528, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-52225528} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-52225528, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-52225528|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-52225528, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-52225528, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-52225528} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:19:54,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:19:54,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In1706317537 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In1706317537 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In1706317537 256))) (.cse2 (= (mod ~x$r_buff0_thd2~0_In1706317537 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out1706317537| 0)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out1706317537| ~x$w_buff1_used~0_In1706317537) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1706317537, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1706317537, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1706317537, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1706317537} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1706317537, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1706317537, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1706317537|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1706317537, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1706317537} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:19:54,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_In1278367555 ~x$r_buff0_thd2~0_Out1278367555)) (.cse2 (= (mod ~x$w_buff0_used~0_In1278367555 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1278367555 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse2) (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out1278367555)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1278367555, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1278367555} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1278367555|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1278367555, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1278367555} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:19:54,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In422247736 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In422247736 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In422247736 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In422247736 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In422247736 |P1Thread1of1ForFork1_#t~ite14_Out422247736|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out422247736|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In422247736, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In422247736, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In422247736, ~x$w_buff0_used~0=~x$w_buff0_used~0_In422247736} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In422247736, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In422247736, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In422247736, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out422247736|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In422247736} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:19:54,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:19:54,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:19:54,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-1890844751| |ULTIMATE.start_main_#t~ite17_Out-1890844751|)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1890844751 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1890844751 256)))) (or (and .cse0 (not .cse1) (= ~x$w_buff1~0_In-1890844751 |ULTIMATE.start_main_#t~ite17_Out-1890844751|) (not .cse2)) (and .cse0 (= ~x~0_In-1890844751 |ULTIMATE.start_main_#t~ite17_Out-1890844751|) (or .cse2 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1890844751, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1890844751, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1890844751, ~x~0=~x~0_In-1890844751} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1890844751|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1890844751|, ~x$w_buff1~0=~x$w_buff1~0_In-1890844751, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1890844751, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1890844751, ~x~0=~x~0_In-1890844751} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:19:54,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In833651632 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In833651632 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite19_Out833651632|)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In833651632 |ULTIMATE.start_main_#t~ite19_Out833651632|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In833651632, ~x$w_buff0_used~0=~x$w_buff0_used~0_In833651632} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In833651632, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out833651632|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In833651632} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:19:54,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In-339905635 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-339905635 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-339905635 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-339905635 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-339905635| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-339905635| ~x$w_buff1_used~0_In-339905635)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-339905635, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-339905635, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-339905635, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-339905635} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-339905635, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-339905635, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-339905635|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-339905635, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-339905635} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:19:54,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1937141926 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1937141926 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-1937141926| 0)) (and (= ~x$r_buff0_thd0~0_In-1937141926 |ULTIMATE.start_main_#t~ite21_Out-1937141926|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1937141926, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1937141926} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1937141926, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1937141926|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1937141926} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:19:54,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd0~0_In475233764 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In475233764 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In475233764 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In475233764 256) 0))) (or (and (= ~x$r_buff1_thd0~0_In475233764 |ULTIMATE.start_main_#t~ite22_Out475233764|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out475233764|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In475233764, ~x$w_buff1_used~0=~x$w_buff1_used~0_In475233764, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In475233764, ~x$w_buff0_used~0=~x$w_buff0_used~0_In475233764} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In475233764, ~x$w_buff1_used~0=~x$w_buff1_used~0_In475233764, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In475233764, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out475233764|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In475233764} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:19:54,136 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1595543873 256)))) (or (and (= |ULTIMATE.start_main_#t~ite31_In1595543873| |ULTIMATE.start_main_#t~ite31_Out1595543873|) (= |ULTIMATE.start_main_#t~ite32_Out1595543873| ~x$w_buff1~0_In1595543873) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite31_Out1595543873| ~x$w_buff1~0_In1595543873) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1595543873 256) 0))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1595543873 256))) (= 0 (mod ~x$w_buff0_used~0_In1595543873 256)) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In1595543873 256))))) .cse0 (= |ULTIMATE.start_main_#t~ite31_Out1595543873| |ULTIMATE.start_main_#t~ite32_Out1595543873|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1595543873, ~x$w_buff1~0=~x$w_buff1~0_In1595543873, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1595543873, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1595543873, ~weak$$choice2~0=~weak$$choice2~0_In1595543873, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In1595543873|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1595543873} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1595543873, ~x$w_buff1~0=~x$w_buff1~0_In1595543873, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1595543873, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out1595543873|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1595543873, ~weak$$choice2~0=~weak$$choice2~0_In1595543873, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1595543873|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1595543873} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:19:54,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:19:54,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:19:54,140 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:19:54,279 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:19:54,280 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:19:54,282 INFO L168 Benchmark]: Toolchain (without parser) took 17522.07 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 511.2 MB). Free memory was 960.4 MB in the beginning and 926.4 MB in the end (delta: 33.9 MB). Peak memory consumption was 545.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:54,282 INFO L168 Benchmark]: CDTParser took 0.92 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:19:54,283 INFO L168 Benchmark]: CACSL2BoogieTranslator took 835.46 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -135.5 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:54,292 INFO L168 Benchmark]: Boogie Procedure Inliner took 72.45 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:19:54,292 INFO L168 Benchmark]: Boogie Preprocessor took 38.53 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:54,293 INFO L168 Benchmark]: RCFGBuilder took 765.58 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.8 MB). Peak memory consumption was 45.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:54,294 INFO L168 Benchmark]: TraceAbstraction took 15637.61 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 387.4 MB). Free memory was 1.0 GB in the beginning and 953.7 MB in the end (delta: 84.2 MB). Peak memory consumption was 471.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:54,295 INFO L168 Benchmark]: Witness Printer took 165.74 ms. Allocated memory is still 1.5 GB. Free memory was 953.7 MB in the beginning and 926.4 MB in the end (delta: 27.2 MB). Peak memory consumption was 27.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:54,297 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.92 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 835.46 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -135.5 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 72.45 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 38.53 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 765.58 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.8 MB). Peak memory consumption was 45.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 15637.61 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 387.4 MB). Free memory was 1.0 GB in the beginning and 953.7 MB in the end (delta: 84.2 MB). Peak memory consumption was 471.7 MB. Max. memory is 11.5 GB. * Witness Printer took 165.74 ms. Allocated memory is still 1.5 GB. Free memory was 953.7 MB in the beginning and 926.4 MB in the end (delta: 27.2 MB). Peak memory consumption was 27.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.8s, 146 ProgramPointsBefore, 78 ProgramPointsAfterwards, 180 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 36 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 25 ChoiceCompositions, 3816 VarBasedMoverChecksPositive, 194 VarBasedMoverChecksNegative, 52 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 46078 CheckedPairsTotal, 100 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t1451, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1452, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 15.4s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 5.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1645 SDtfs, 1357 SDslu, 3451 SDs, 0 SdLazy, 2610 SolverSat, 136 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 166 GetRequests, 31 SyntacticMatches, 23 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 217 ImplicationChecksByTransitivity, 1.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=12980occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.7s AutomataMinimizationTime, 16 MinimizatonAttempts, 4242 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 701 NumberOfCodeBlocks, 701 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 631 ConstructedInterpolants, 0 QuantifiedInterpolants, 95216 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...