./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix054_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix054_tso.oepc.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3a1e4f40f914c6e0d49b332e5985e3ce0c4f5b0e ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:19:36,914 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:19:36,917 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:19:36,930 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:19:36,930 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:19:36,931 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:19:36,933 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:19:36,935 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:19:36,937 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:19:36,938 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:19:36,939 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:19:36,941 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:19:36,943 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:19:36,944 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:19:36,947 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:19:36,950 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:19:36,952 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:19:36,954 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:19:36,958 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:19:36,961 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:19:36,967 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:19:36,971 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:19:36,974 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:19:36,976 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:19:36,979 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:19:36,982 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:19:36,982 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:19:36,983 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:19:36,985 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:19:36,986 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:19:36,987 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:19:36,988 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:19:36,989 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:19:36,990 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:19:36,992 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:19:36,993 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:19:36,994 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:19:36,994 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:19:36,995 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:19:36,997 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:19:36,998 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:19:36,999 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:19:37,020 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:19:37,020 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:19:37,024 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:19:37,025 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:19:37,025 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:19:37,026 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:19:37,026 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:19:37,026 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:19:37,026 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:19:37,027 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:19:37,028 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:19:37,028 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:19:37,029 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:19:37,029 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:19:37,029 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:19:37,030 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:19:37,030 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:19:37,030 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:19:37,031 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:19:37,031 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:19:37,031 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:19:37,031 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:19:37,032 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:19:37,032 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:19:37,032 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:19:37,033 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:19:37,033 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:19:37,033 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:19:37,033 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:19:37,034 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3a1e4f40f914c6e0d49b332e5985e3ce0c4f5b0e [2019-11-28 18:19:37,365 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:19:37,383 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:19:37,388 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:19:37,391 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:19:37,391 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:19:37,392 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix054_tso.oepc.i [2019-11-28 18:19:37,470 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/55c1a3add/3e9392cd47fb4adc9fba64de4e0f5397/FLAGccc37a628 [2019-11-28 18:19:38,101 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:19:38,102 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix054_tso.oepc.i [2019-11-28 18:19:38,126 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/55c1a3add/3e9392cd47fb4adc9fba64de4e0f5397/FLAGccc37a628 [2019-11-28 18:19:38,313 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/55c1a3add/3e9392cd47fb4adc9fba64de4e0f5397 [2019-11-28 18:19:38,316 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:19:38,318 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:19:38,319 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:19:38,319 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:19:38,325 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:19:38,326 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:19:38" (1/1) ... [2019-11-28 18:19:38,329 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1187dbd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:38, skipping insertion in model container [2019-11-28 18:19:38,329 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:19:38" (1/1) ... [2019-11-28 18:19:38,337 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:19:38,397 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:19:38,881 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:19:38,894 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:19:38,978 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:19:39,053 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:19:39,054 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39 WrapperNode [2019-11-28 18:19:39,054 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:19:39,055 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:19:39,056 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:19:39,056 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:19:39,065 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,089 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,128 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:19:39,128 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:19:39,128 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:19:39,129 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:19:39,139 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,140 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,146 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,147 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,164 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,168 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,173 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... [2019-11-28 18:19:39,178 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:19:39,183 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:19:39,183 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:19:39,183 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:19:39,185 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:19:39,248 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:19:39,248 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:19:39,248 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:19:39,249 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:19:39,249 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:19:39,249 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:19:39,249 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:19:39,250 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:19:39,250 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:19:39,250 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:19:39,250 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:19:39,253 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:19:40,000 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:19:40,001 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:19:40,003 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:40 BoogieIcfgContainer [2019-11-28 18:19:40,003 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:19:40,005 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:19:40,007 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:19:40,010 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:19:40,012 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:19:38" (1/3) ... [2019-11-28 18:19:40,013 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@19d48cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:19:40, skipping insertion in model container [2019-11-28 18:19:40,014 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:39" (2/3) ... [2019-11-28 18:19:40,015 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@19d48cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:19:40, skipping insertion in model container [2019-11-28 18:19:40,016 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:40" (3/3) ... [2019-11-28 18:19:40,018 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_tso.oepc.i [2019-11-28 18:19:40,030 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:19:40,031 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:19:40,044 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:19:40,045 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:19:40,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,082 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,082 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,084 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,084 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,084 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,085 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,085 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,086 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,086 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,086 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,086 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,087 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,087 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,087 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,088 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,088 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,088 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,089 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,089 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,089 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,090 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,090 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,090 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,091 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,091 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,092 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,092 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,092 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,093 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,093 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,093 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,094 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,094 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,094 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,095 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,095 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,095 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,096 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,096 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,096 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,098 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,099 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,099 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,099 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,099 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,100 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,100 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,100 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,107 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,108 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,108 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:40,123 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:19:40,139 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:19:40,139 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:19:40,139 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:19:40,140 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:19:40,140 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:19:40,140 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:19:40,140 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:19:40,140 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:19:40,158 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-11-28 18:19:40,160 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:19:40,247 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:19:40,247 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:19:40,267 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:19:40,288 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:19:40,341 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:19:40,342 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:19:40,348 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:19:40,363 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-11-28 18:19:40,364 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:19:44,640 WARN L192 SmtUtils]: Spent 241.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-11-28 18:19:44,745 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 77 [2019-11-28 18:19:44,782 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46078 [2019-11-28 18:19:44,782 INFO L214 etLargeBlockEncoding]: Total number of compositions: 100 [2019-11-28 18:19:44,786 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-11-28 18:19:45,347 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8413 states. [2019-11-28 18:19:45,349 INFO L276 IsEmpty]: Start isEmpty. Operand 8413 states. [2019-11-28 18:19:45,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-11-28 18:19:45,357 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:45,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-11-28 18:19:45,359 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:45,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:45,366 INFO L82 PathProgramCache]: Analyzing trace with hash 693777882, now seen corresponding path program 1 times [2019-11-28 18:19:45,376 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:45,377 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201625347] [2019-11-28 18:19:45,377 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:45,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:45,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:45,693 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [201625347] [2019-11-28 18:19:45,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:45,696 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:19:45,697 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928783907] [2019-11-28 18:19:45,703 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:45,703 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:45,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:45,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:45,733 INFO L87 Difference]: Start difference. First operand 8413 states. Second operand 3 states. [2019-11-28 18:19:45,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:46,000 INFO L93 Difference]: Finished difference Result 8377 states and 27415 transitions. [2019-11-28 18:19:46,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:46,002 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-11-28 18:19:46,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:46,140 INFO L225 Difference]: With dead ends: 8377 [2019-11-28 18:19:46,140 INFO L226 Difference]: Without dead ends: 8208 [2019-11-28 18:19:46,141 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:46,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8208 states. [2019-11-28 18:19:46,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8208 to 8208. [2019-11-28 18:19:46,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8208 states. [2019-11-28 18:19:46,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8208 states to 8208 states and 26895 transitions. [2019-11-28 18:19:46,623 INFO L78 Accepts]: Start accepts. Automaton has 8208 states and 26895 transitions. Word has length 5 [2019-11-28 18:19:46,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:46,623 INFO L462 AbstractCegarLoop]: Abstraction has 8208 states and 26895 transitions. [2019-11-28 18:19:46,624 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:46,624 INFO L276 IsEmpty]: Start isEmpty. Operand 8208 states and 26895 transitions. [2019-11-28 18:19:46,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:19:46,626 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:46,626 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:46,627 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:46,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:46,627 INFO L82 PathProgramCache]: Analyzing trace with hash 2143808117, now seen corresponding path program 1 times [2019-11-28 18:19:46,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:46,628 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1934148403] [2019-11-28 18:19:46,628 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:46,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:46,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:46,749 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1934148403] [2019-11-28 18:19:46,749 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:46,749 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:46,749 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985649990] [2019-11-28 18:19:46,751 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:19:46,751 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:46,752 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:19:46,752 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:46,752 INFO L87 Difference]: Start difference. First operand 8208 states and 26895 transitions. Second operand 4 states. [2019-11-28 18:19:47,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:47,069 INFO L93 Difference]: Finished difference Result 11151 states and 35424 transitions. [2019-11-28 18:19:47,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:19:47,069 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:19:47,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:47,135 INFO L225 Difference]: With dead ends: 11151 [2019-11-28 18:19:47,136 INFO L226 Difference]: Without dead ends: 11151 [2019-11-28 18:19:47,137 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:47,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11151 states. [2019-11-28 18:19:47,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11151 to 10895. [2019-11-28 18:19:47,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10895 states. [2019-11-28 18:19:47,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10895 states to 10895 states and 34716 transitions. [2019-11-28 18:19:47,535 INFO L78 Accepts]: Start accepts. Automaton has 10895 states and 34716 transitions. Word has length 11 [2019-11-28 18:19:47,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:47,536 INFO L462 AbstractCegarLoop]: Abstraction has 10895 states and 34716 transitions. [2019-11-28 18:19:47,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:19:47,536 INFO L276 IsEmpty]: Start isEmpty. Operand 10895 states and 34716 transitions. [2019-11-28 18:19:47,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:19:47,539 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:47,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:47,540 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:47,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:47,540 INFO L82 PathProgramCache]: Analyzing trace with hash 1923085964, now seen corresponding path program 1 times [2019-11-28 18:19:47,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:47,541 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067902394] [2019-11-28 18:19:47,541 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:47,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:47,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:47,626 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1067902394] [2019-11-28 18:19:47,626 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:47,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:47,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074669039] [2019-11-28 18:19:47,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:19:47,629 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:47,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:19:47,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:47,630 INFO L87 Difference]: Start difference. First operand 10895 states and 34716 transitions. Second operand 4 states. [2019-11-28 18:19:48,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:48,098 INFO L93 Difference]: Finished difference Result 15774 states and 49116 transitions. [2019-11-28 18:19:48,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:19:48,098 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:19:48,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:48,148 INFO L225 Difference]: With dead ends: 15774 [2019-11-28 18:19:48,149 INFO L226 Difference]: Without dead ends: 15767 [2019-11-28 18:19:48,149 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:48,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15767 states. [2019-11-28 18:19:48,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15767 to 12980. [2019-11-28 18:19:48,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12980 states. [2019-11-28 18:19:48,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12980 states to 12980 states and 41212 transitions. [2019-11-28 18:19:48,614 INFO L78 Accepts]: Start accepts. Automaton has 12980 states and 41212 transitions. Word has length 11 [2019-11-28 18:19:48,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:48,615 INFO L462 AbstractCegarLoop]: Abstraction has 12980 states and 41212 transitions. [2019-11-28 18:19:48,615 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:19:48,616 INFO L276 IsEmpty]: Start isEmpty. Operand 12980 states and 41212 transitions. [2019-11-28 18:19:48,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:19:48,625 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:48,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:48,626 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:48,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:48,626 INFO L82 PathProgramCache]: Analyzing trace with hash 1818004199, now seen corresponding path program 1 times [2019-11-28 18:19:48,626 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:48,628 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201178417] [2019-11-28 18:19:48,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:48,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:48,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:48,721 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [201178417] [2019-11-28 18:19:48,721 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:48,721 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:19:48,721 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747935263] [2019-11-28 18:19:48,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:19:48,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:48,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:19:48,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:48,722 INFO L87 Difference]: Start difference. First operand 12980 states and 41212 transitions. Second operand 5 states. [2019-11-28 18:19:49,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:49,161 INFO L93 Difference]: Finished difference Result 17653 states and 54853 transitions. [2019-11-28 18:19:49,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:19:49,162 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-11-28 18:19:49,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:49,226 INFO L225 Difference]: With dead ends: 17653 [2019-11-28 18:19:49,227 INFO L226 Difference]: Without dead ends: 17646 [2019-11-28 18:19:49,227 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:19:49,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17646 states. [2019-11-28 18:19:49,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17646 to 12946. [2019-11-28 18:19:49,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12946 states. [2019-11-28 18:19:49,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12946 states to 12946 states and 41009 transitions. [2019-11-28 18:19:49,637 INFO L78 Accepts]: Start accepts. Automaton has 12946 states and 41009 transitions. Word has length 17 [2019-11-28 18:19:49,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:49,638 INFO L462 AbstractCegarLoop]: Abstraction has 12946 states and 41009 transitions. [2019-11-28 18:19:49,638 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:19:49,638 INFO L276 IsEmpty]: Start isEmpty. Operand 12946 states and 41009 transitions. [2019-11-28 18:19:49,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:19:49,649 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:49,649 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:49,650 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:49,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:49,650 INFO L82 PathProgramCache]: Analyzing trace with hash -1180722088, now seen corresponding path program 1 times [2019-11-28 18:19:49,650 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:49,651 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281753518] [2019-11-28 18:19:49,651 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:49,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:49,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:49,898 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [281753518] [2019-11-28 18:19:49,899 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:49,899 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:49,899 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667246482] [2019-11-28 18:19:49,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:49,899 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:49,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:49,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:49,900 INFO L87 Difference]: Start difference. First operand 12946 states and 41009 transitions. Second operand 3 states. [2019-11-28 18:19:49,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:49,913 INFO L93 Difference]: Finished difference Result 1868 states and 4151 transitions. [2019-11-28 18:19:49,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:49,914 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:19:49,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:49,917 INFO L225 Difference]: With dead ends: 1868 [2019-11-28 18:19:49,918 INFO L226 Difference]: Without dead ends: 1868 [2019-11-28 18:19:49,918 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:49,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1868 states. [2019-11-28 18:19:49,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1868 to 1868. [2019-11-28 18:19:49,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1868 states. [2019-11-28 18:19:49,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1868 states to 1868 states and 4151 transitions. [2019-11-28 18:19:49,951 INFO L78 Accepts]: Start accepts. Automaton has 1868 states and 4151 transitions. Word has length 25 [2019-11-28 18:19:49,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:49,951 INFO L462 AbstractCegarLoop]: Abstraction has 1868 states and 4151 transitions. [2019-11-28 18:19:49,952 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:49,952 INFO L276 IsEmpty]: Start isEmpty. Operand 1868 states and 4151 transitions. [2019-11-28 18:19:49,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:19:49,957 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:49,957 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:49,957 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:49,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:49,958 INFO L82 PathProgramCache]: Analyzing trace with hash -485993864, now seen corresponding path program 1 times [2019-11-28 18:19:49,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:49,959 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663498075] [2019-11-28 18:19:49,959 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,062 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1663498075] [2019-11-28 18:19:50,063 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,063 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:19:50,063 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914829490] [2019-11-28 18:19:50,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:19:50,064 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:19:50,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:50,064 INFO L87 Difference]: Start difference. First operand 1868 states and 4151 transitions. Second operand 4 states. [2019-11-28 18:19:50,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:50,079 INFO L93 Difference]: Finished difference Result 374 states and 679 transitions. [2019-11-28 18:19:50,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:19:50,080 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2019-11-28 18:19:50,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:50,081 INFO L225 Difference]: With dead ends: 374 [2019-11-28 18:19:50,081 INFO L226 Difference]: Without dead ends: 374 [2019-11-28 18:19:50,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:50,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states. [2019-11-28 18:19:50,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 339. [2019-11-28 18:19:50,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 339 states. [2019-11-28 18:19:50,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 339 states to 339 states and 614 transitions. [2019-11-28 18:19:50,087 INFO L78 Accepts]: Start accepts. Automaton has 339 states and 614 transitions. Word has length 37 [2019-11-28 18:19:50,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:50,087 INFO L462 AbstractCegarLoop]: Abstraction has 339 states and 614 transitions. [2019-11-28 18:19:50,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:19:50,087 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 614 transitions. [2019-11-28 18:19:50,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:50,089 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:50,089 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:50,089 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:50,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:50,090 INFO L82 PathProgramCache]: Analyzing trace with hash 763517816, now seen corresponding path program 1 times [2019-11-28 18:19:50,090 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:50,090 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923836834] [2019-11-28 18:19:50,090 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,152 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923836834] [2019-11-28 18:19:50,153 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,153 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:19:50,153 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1430107784] [2019-11-28 18:19:50,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:50,154 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:50,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:50,154 INFO L87 Difference]: Start difference. First operand 339 states and 614 transitions. Second operand 3 states. [2019-11-28 18:19:50,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:50,195 INFO L93 Difference]: Finished difference Result 352 states and 631 transitions. [2019-11-28 18:19:50,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:50,195 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:19:50,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:50,196 INFO L225 Difference]: With dead ends: 352 [2019-11-28 18:19:50,196 INFO L226 Difference]: Without dead ends: 352 [2019-11-28 18:19:50,197 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:50,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2019-11-28 18:19:50,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 348. [2019-11-28 18:19:50,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2019-11-28 18:19:50,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 627 transitions. [2019-11-28 18:19:50,202 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 627 transitions. Word has length 52 [2019-11-28 18:19:50,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:50,204 INFO L462 AbstractCegarLoop]: Abstraction has 348 states and 627 transitions. [2019-11-28 18:19:50,204 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:50,204 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 627 transitions. [2019-11-28 18:19:50,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:50,205 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:50,205 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:50,206 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:50,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:50,206 INFO L82 PathProgramCache]: Analyzing trace with hash 1269350019, now seen corresponding path program 1 times [2019-11-28 18:19:50,206 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:50,206 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267604023] [2019-11-28 18:19:50,207 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267604023] [2019-11-28 18:19:50,292 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:19:50,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196005631] [2019-11-28 18:19:50,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:19:50,293 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:19:50,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:50,293 INFO L87 Difference]: Start difference. First operand 348 states and 627 transitions. Second operand 5 states. [2019-11-28 18:19:50,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:50,494 INFO L93 Difference]: Finished difference Result 479 states and 863 transitions. [2019-11-28 18:19:50,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:19:50,495 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-28 18:19:50,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:50,496 INFO L225 Difference]: With dead ends: 479 [2019-11-28 18:19:50,496 INFO L226 Difference]: Without dead ends: 479 [2019-11-28 18:19:50,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:50,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2019-11-28 18:19:50,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 438. [2019-11-28 18:19:50,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 438 states. [2019-11-28 18:19:50,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 791 transitions. [2019-11-28 18:19:50,504 INFO L78 Accepts]: Start accepts. Automaton has 438 states and 791 transitions. Word has length 52 [2019-11-28 18:19:50,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:50,505 INFO L462 AbstractCegarLoop]: Abstraction has 438 states and 791 transitions. [2019-11-28 18:19:50,505 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:19:50,505 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 791 transitions. [2019-11-28 18:19:50,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:50,507 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:50,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:50,507 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:50,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:50,508 INFO L82 PathProgramCache]: Analyzing trace with hash 544633013, now seen corresponding path program 2 times [2019-11-28 18:19:50,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:50,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135439255] [2019-11-28 18:19:50,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135439255] [2019-11-28 18:19:50,670 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,670 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:19:50,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559507921] [2019-11-28 18:19:50,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:19:50,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:19:50,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:50,672 INFO L87 Difference]: Start difference. First operand 438 states and 791 transitions. Second operand 6 states. [2019-11-28 18:19:50,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:50,963 INFO L93 Difference]: Finished difference Result 577 states and 1038 transitions. [2019-11-28 18:19:50,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:19:50,964 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:19:50,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:50,966 INFO L225 Difference]: With dead ends: 577 [2019-11-28 18:19:50,966 INFO L226 Difference]: Without dead ends: 577 [2019-11-28 18:19:50,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:19:50,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 577 states. [2019-11-28 18:19:50,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 577 to 476. [2019-11-28 18:19:50,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 476 states. [2019-11-28 18:19:50,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 861 transitions. [2019-11-28 18:19:50,975 INFO L78 Accepts]: Start accepts. Automaton has 476 states and 861 transitions. Word has length 52 [2019-11-28 18:19:50,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:50,976 INFO L462 AbstractCegarLoop]: Abstraction has 476 states and 861 transitions. [2019-11-28 18:19:50,976 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:19:50,976 INFO L276 IsEmpty]: Start isEmpty. Operand 476 states and 861 transitions. [2019-11-28 18:19:50,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:50,978 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:50,978 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:50,978 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:50,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:50,979 INFO L82 PathProgramCache]: Analyzing trace with hash 1227473235, now seen corresponding path program 3 times [2019-11-28 18:19:50,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:50,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800851868] [2019-11-28 18:19:50,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:51,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:51,074 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800851868] [2019-11-28 18:19:51,075 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:51,075 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:19:51,075 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980856173] [2019-11-28 18:19:51,075 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:19:51,076 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:51,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:19:51,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:51,077 INFO L87 Difference]: Start difference. First operand 476 states and 861 transitions. Second operand 6 states. [2019-11-28 18:19:51,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:51,445 INFO L93 Difference]: Finished difference Result 715 states and 1297 transitions. [2019-11-28 18:19:51,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:19:51,446 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:19:51,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:51,448 INFO L225 Difference]: With dead ends: 715 [2019-11-28 18:19:51,448 INFO L226 Difference]: Without dead ends: 715 [2019-11-28 18:19:51,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:19:51,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2019-11-28 18:19:51,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 517. [2019-11-28 18:19:51,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 517 states. [2019-11-28 18:19:51,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 944 transitions. [2019-11-28 18:19:51,462 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 944 transitions. Word has length 52 [2019-11-28 18:19:51,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:51,464 INFO L462 AbstractCegarLoop]: Abstraction has 517 states and 944 transitions. [2019-11-28 18:19:51,464 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:19:51,464 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 944 transitions. [2019-11-28 18:19:51,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:51,465 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:51,465 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:51,465 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:51,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:51,466 INFO L82 PathProgramCache]: Analyzing trace with hash 1833025349, now seen corresponding path program 4 times [2019-11-28 18:19:51,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:51,466 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57638475] [2019-11-28 18:19:51,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:51,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:51,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:51,598 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57638475] [2019-11-28 18:19:51,598 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:51,599 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:19:51,599 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [84260151] [2019-11-28 18:19:51,599 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:19:51,599 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:51,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:19:51,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:19:51,600 INFO L87 Difference]: Start difference. First operand 517 states and 944 transitions. Second operand 7 states. [2019-11-28 18:19:51,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:51,952 INFO L93 Difference]: Finished difference Result 772 states and 1396 transitions. [2019-11-28 18:19:51,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:19:51,952 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:19:51,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:51,954 INFO L225 Difference]: With dead ends: 772 [2019-11-28 18:19:51,954 INFO L226 Difference]: Without dead ends: 772 [2019-11-28 18:19:51,954 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:19:51,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 772 states. [2019-11-28 18:19:51,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 772 to 503. [2019-11-28 18:19:51,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 503 states. [2019-11-28 18:19:51,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 503 states to 503 states and 918 transitions. [2019-11-28 18:19:51,964 INFO L78 Accepts]: Start accepts. Automaton has 503 states and 918 transitions. Word has length 52 [2019-11-28 18:19:51,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:51,965 INFO L462 AbstractCegarLoop]: Abstraction has 503 states and 918 transitions. [2019-11-28 18:19:51,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:19:51,965 INFO L276 IsEmpty]: Start isEmpty. Operand 503 states and 918 transitions. [2019-11-28 18:19:51,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:51,966 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:51,966 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:51,966 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:51,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:51,967 INFO L82 PathProgramCache]: Analyzing trace with hash 513839464, now seen corresponding path program 1 times [2019-11-28 18:19:51,967 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:51,967 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155865426] [2019-11-28 18:19:51,967 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:51,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:52,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:52,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155865426] [2019-11-28 18:19:52,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:52,198 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-28 18:19:52,198 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323859627] [2019-11-28 18:19:52,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-28 18:19:52,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:52,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-28 18:19:52,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-11-28 18:19:52,200 INFO L87 Difference]: Start difference. First operand 503 states and 918 transitions. Second operand 10 states. [2019-11-28 18:19:52,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:52,638 INFO L93 Difference]: Finished difference Result 528 states and 910 transitions. [2019-11-28 18:19:52,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:19:52,638 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 53 [2019-11-28 18:19:52,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:52,641 INFO L225 Difference]: With dead ends: 528 [2019-11-28 18:19:52,641 INFO L226 Difference]: Without dead ends: 528 [2019-11-28 18:19:52,641 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2019-11-28 18:19:52,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 528 states. [2019-11-28 18:19:52,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 528 to 410. [2019-11-28 18:19:52,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 410 states. [2019-11-28 18:19:52,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 410 states to 410 states and 708 transitions. [2019-11-28 18:19:52,648 INFO L78 Accepts]: Start accepts. Automaton has 410 states and 708 transitions. Word has length 53 [2019-11-28 18:19:52,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:52,649 INFO L462 AbstractCegarLoop]: Abstraction has 410 states and 708 transitions. [2019-11-28 18:19:52,649 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-28 18:19:52,649 INFO L276 IsEmpty]: Start isEmpty. Operand 410 states and 708 transitions. [2019-11-28 18:19:52,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:52,650 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:52,650 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:52,650 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:52,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:52,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1617311510, now seen corresponding path program 2 times [2019-11-28 18:19:52,651 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:52,651 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616325236] [2019-11-28 18:19:52,651 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:52,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:52,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:52,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616325236] [2019-11-28 18:19:52,881 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:52,881 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-28 18:19:52,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1235964180] [2019-11-28 18:19:52,882 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-28 18:19:52,882 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:52,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-28 18:19:52,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:19:52,884 INFO L87 Difference]: Start difference. First operand 410 states and 708 transitions. Second operand 9 states. [2019-11-28 18:19:53,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:53,644 INFO L93 Difference]: Finished difference Result 678 states and 1158 transitions. [2019-11-28 18:19:53,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-28 18:19:53,644 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 53 [2019-11-28 18:19:53,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:53,646 INFO L225 Difference]: With dead ends: 678 [2019-11-28 18:19:53,646 INFO L226 Difference]: Without dead ends: 678 [2019-11-28 18:19:53,647 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=77, Invalid=229, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:19:53,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 678 states. [2019-11-28 18:19:53,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 678 to 416. [2019-11-28 18:19:53,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 416 states. [2019-11-28 18:19:53,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 416 states and 721 transitions. [2019-11-28 18:19:53,656 INFO L78 Accepts]: Start accepts. Automaton has 416 states and 721 transitions. Word has length 53 [2019-11-28 18:19:53,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:53,657 INFO L462 AbstractCegarLoop]: Abstraction has 416 states and 721 transitions. [2019-11-28 18:19:53,657 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-28 18:19:53,657 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 721 transitions. [2019-11-28 18:19:53,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:53,658 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:53,659 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:53,659 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:53,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:53,659 INFO L82 PathProgramCache]: Analyzing trace with hash -162355984, now seen corresponding path program 3 times [2019-11-28 18:19:53,660 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:53,660 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918343629] [2019-11-28 18:19:53,660 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:53,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:53,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:53,730 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918343629] [2019-11-28 18:19:53,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:53,731 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:53,731 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583358099] [2019-11-28 18:19:53,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:53,731 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:53,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:53,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:53,732 INFO L87 Difference]: Start difference. First operand 416 states and 721 transitions. Second operand 3 states. [2019-11-28 18:19:53,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:53,777 INFO L93 Difference]: Finished difference Result 416 states and 720 transitions. [2019-11-28 18:19:53,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:53,777 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:19:53,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:53,778 INFO L225 Difference]: With dead ends: 416 [2019-11-28 18:19:53,778 INFO L226 Difference]: Without dead ends: 416 [2019-11-28 18:19:53,779 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:53,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states. [2019-11-28 18:19:53,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 348. [2019-11-28 18:19:53,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2019-11-28 18:19:53,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 600 transitions. [2019-11-28 18:19:53,788 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 600 transitions. Word has length 53 [2019-11-28 18:19:53,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:53,789 INFO L462 AbstractCegarLoop]: Abstraction has 348 states and 600 transitions. [2019-11-28 18:19:53,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:53,789 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 600 transitions. [2019-11-28 18:19:53,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:19:53,791 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:53,791 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:53,791 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:53,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:53,792 INFO L82 PathProgramCache]: Analyzing trace with hash 1221221950, now seen corresponding path program 1 times [2019-11-28 18:19:53,792 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:53,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374670229] [2019-11-28 18:19:53,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:53,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:53,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:53,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374670229] [2019-11-28 18:19:53,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:53,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:19:53,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1961676701] [2019-11-28 18:19:53,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:19:53,939 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:53,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:19:53,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:53,939 INFO L87 Difference]: Start difference. First operand 348 states and 600 transitions. Second operand 6 states. [2019-11-28 18:19:54,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:54,004 INFO L93 Difference]: Finished difference Result 520 states and 893 transitions. [2019-11-28 18:19:54,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:19:54,005 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-11-28 18:19:54,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:54,006 INFO L225 Difference]: With dead ends: 520 [2019-11-28 18:19:54,006 INFO L226 Difference]: Without dead ends: 189 [2019-11-28 18:19:54,006 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:19:54,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2019-11-28 18:19:54,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2019-11-28 18:19:54,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2019-11-28 18:19:54,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 319 transitions. [2019-11-28 18:19:54,010 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 319 transitions. Word has length 54 [2019-11-28 18:19:54,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:54,011 INFO L462 AbstractCegarLoop]: Abstraction has 189 states and 319 transitions. [2019-11-28 18:19:54,011 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:19:54,011 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 319 transitions. [2019-11-28 18:19:54,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:19:54,012 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:54,012 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:54,013 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:54,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:54,013 INFO L82 PathProgramCache]: Analyzing trace with hash 2120402622, now seen corresponding path program 2 times [2019-11-28 18:19:54,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:54,013 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787355493] [2019-11-28 18:19:54,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:54,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:54,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:54,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787355493] [2019-11-28 18:19:54,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:54,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:19:54,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [564484273] [2019-11-28 18:19:54,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:19:54,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:54,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:19:54,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:19:54,330 INFO L87 Difference]: Start difference. First operand 189 states and 319 transitions. Second operand 13 states. [2019-11-28 18:19:54,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:54,747 INFO L93 Difference]: Finished difference Result 340 states and 569 transitions. [2019-11-28 18:19:54,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:19:54,747 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-11-28 18:19:54,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:54,748 INFO L225 Difference]: With dead ends: 340 [2019-11-28 18:19:54,748 INFO L226 Difference]: Without dead ends: 307 [2019-11-28 18:19:54,749 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=90, Invalid=416, Unknown=0, NotChecked=0, Total=506 [2019-11-28 18:19:54,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2019-11-28 18:19:54,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 297. [2019-11-28 18:19:54,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2019-11-28 18:19:54,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 504 transitions. [2019-11-28 18:19:54,754 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 504 transitions. Word has length 54 [2019-11-28 18:19:54,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:54,754 INFO L462 AbstractCegarLoop]: Abstraction has 297 states and 504 transitions. [2019-11-28 18:19:54,754 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:19:54,755 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 504 transitions. [2019-11-28 18:19:54,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:19:54,761 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:54,761 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:54,761 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:54,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:54,762 INFO L82 PathProgramCache]: Analyzing trace with hash 1631137646, now seen corresponding path program 3 times [2019-11-28 18:19:54,762 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:54,762 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9673279] [2019-11-28 18:19:54,762 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:54,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:19:54,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:19:54,882 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:19:54,882 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:19:54,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= 0 v_~x~0_144) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1453~0.base_22|)) (= v_~x$r_buff0_thd1~0_115 0) (= |v_ULTIMATE.start_main_~#t1453~0.offset_17| 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1453~0.base_22| 4) |v_#length_15|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff0_thd2~0_168) (= |v_#valid_47| (store .cse0 |v_ULTIMATE.start_main_~#t1453~0.base_22| 1)) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1453~0.base_22|) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1453~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1453~0.base_22|) |v_ULTIMATE.start_main_~#t1453~0.offset_17| 0)) |v_#memory_int_13|) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ULTIMATE.start_main_~#t1453~0.offset=|v_ULTIMATE.start_main_~#t1453~0.offset_17|, ULTIMATE.start_main_~#t1454~0.base=|v_ULTIMATE.start_main_~#t1454~0.base_17|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~x~0=v_~x~0_144, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_~#t1454~0.offset=|v_ULTIMATE.start_main_~#t1454~0.offset_14|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ULTIMATE.start_main_~#t1453~0.base=|v_ULTIMATE.start_main_~#t1453~0.base_22|, ~y~0=v_~y~0_67, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ULTIMATE.start_main_~#t1453~0.offset, ULTIMATE.start_main_~#t1454~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1454~0.offset, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1453~0.base, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:19:54,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1454~0.base_10|)) (= |v_ULTIMATE.start_main_~#t1454~0.offset_9| 0) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1454~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1454~0.base_10|) |v_ULTIMATE.start_main_~#t1454~0.offset_9| 1))) (= (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1454~0.base_10| 1) |v_#valid_25|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t1454~0.base_10| 4) |v_#length_9|) (= (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1454~0.base_10|) 0) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1454~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t1454~0.base=|v_ULTIMATE.start_main_~#t1454~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_~#t1454~0.offset=|v_ULTIMATE.start_main_~#t1454~0.offset_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1454~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1454~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:19:54,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:19:54,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out949657189| |P0Thread1of1ForFork0_#t~ite3_Out949657189|)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In949657189 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In949657189 256)))) (or (and (not .cse0) .cse1 (= ~x$w_buff1~0_In949657189 |P0Thread1of1ForFork0_#t~ite3_Out949657189|) (not .cse2)) (and .cse1 (= ~x~0_In949657189 |P0Thread1of1ForFork0_#t~ite3_Out949657189|) (or .cse0 .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In949657189, ~x$w_buff1_used~0=~x$w_buff1_used~0_In949657189, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In949657189, ~x~0=~x~0_In949657189} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out949657189|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out949657189|, ~x$w_buff1~0=~x$w_buff1~0_In949657189, ~x$w_buff1_used~0=~x$w_buff1_used~0_In949657189, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In949657189, ~x~0=~x~0_In949657189} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:19:54,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-447882908 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-447882908 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-447882908| 0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-447882908 |P0Thread1of1ForFork0_#t~ite5_Out-447882908|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-447882908, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-447882908} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-447882908|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-447882908, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-447882908} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:19:54,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In1623521896 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In1623521896 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1623521896 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd1~0_In1623521896 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1623521896|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~x$w_buff1_used~0_In1623521896 |P0Thread1of1ForFork0_#t~ite6_Out1623521896|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1623521896, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1623521896, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1623521896, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1623521896} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1623521896|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1623521896, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1623521896, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1623521896, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1623521896} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:19:54,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1877594644 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-1877594644 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1877594644|) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1877594644| ~x$w_buff0_used~0_In-1877594644) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1877594644, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1877594644} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1877594644|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1877594644, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1877594644} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:19:54,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1506766869 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1506766869 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out-1506766869| 0)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out-1506766869| ~x$r_buff0_thd1~0_In-1506766869) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1506766869, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1506766869} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1506766869, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1506766869|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1506766869} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:19:54,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In289673551 256))) (.cse3 (= (mod ~x$r_buff0_thd1~0_In289673551 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In289673551 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In289673551 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd1~0_In289673551 |P0Thread1of1ForFork0_#t~ite8_Out289673551|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out289673551|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In289673551, ~x$w_buff1_used~0=~x$w_buff1_used~0_In289673551, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In289673551, ~x$w_buff0_used~0=~x$w_buff0_used~0_In289673551} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In289673551, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out289673551|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In289673551, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In289673551, ~x$w_buff0_used~0=~x$w_buff0_used~0_In289673551} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:19:54,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:19:54,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In633795073 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In633795073 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In633795073 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In633795073 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In633795073 |P1Thread1of1ForFork1_#t~ite12_Out633795073|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out633795073|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In633795073, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In633795073, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In633795073, ~x$w_buff0_used~0=~x$w_buff0_used~0_In633795073} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In633795073, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In633795073, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out633795073|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In633795073, ~x$w_buff0_used~0=~x$w_buff0_used~0_In633795073} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:19:54,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In402282168 256))) (.cse2 (= ~x$r_buff0_thd2~0_In402282168 ~x$r_buff0_thd2~0_Out402282168)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In402282168 256)))) (or (and (= 0 ~x$r_buff0_thd2~0_Out402282168) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In402282168, ~x$w_buff0_used~0=~x$w_buff0_used~0_In402282168} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out402282168|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out402282168, ~x$w_buff0_used~0=~x$w_buff0_used~0_In402282168} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:19:54,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-183629259 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-183629259 256))) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-183629259 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-183629259 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out-183629259| 0)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-183629259| ~x$r_buff1_thd2~0_In-183629259) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-183629259, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-183629259, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-183629259, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-183629259} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-183629259, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-183629259, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-183629259, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-183629259|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-183629259} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:19:54,894 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:19:54,894 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:19:54,894 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-2053113703| |ULTIMATE.start_main_#t~ite17_Out-2053113703|)) (.cse2 (= (mod ~x$w_buff1_used~0_In-2053113703 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-2053113703 256)))) (or (and .cse0 (not .cse1) (not .cse2) (= |ULTIMATE.start_main_#t~ite17_Out-2053113703| ~x$w_buff1~0_In-2053113703)) (and .cse0 (= ~x~0_In-2053113703 |ULTIMATE.start_main_#t~ite17_Out-2053113703|) (or .cse2 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-2053113703, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2053113703, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2053113703, ~x~0=~x~0_In-2053113703} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-2053113703|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-2053113703|, ~x$w_buff1~0=~x$w_buff1~0_In-2053113703, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2053113703, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2053113703, ~x~0=~x~0_In-2053113703} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:19:54,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In1723215767 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1723215767 256)))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out1723215767| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite19_Out1723215767| ~x$w_buff0_used~0_In1723215767) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1723215767, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1723215767} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1723215767, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1723215767|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1723215767} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:19:54,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-108446509 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd0~0_In-108446509 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In-108446509 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-108446509 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-108446509|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out-108446509| ~x$w_buff1_used~0_In-108446509) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-108446509, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-108446509, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-108446509, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-108446509} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-108446509, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-108446509, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-108446509|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-108446509, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-108446509} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:19:54,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1351651234 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1351651234 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-1351651234|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-1351651234 |ULTIMATE.start_main_#t~ite21_Out-1351651234|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1351651234, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1351651234} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1351651234, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1351651234|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1351651234} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:19:54,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In404921731 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In404921731 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In404921731 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In404921731 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In404921731 |ULTIMATE.start_main_#t~ite22_Out404921731|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out404921731|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In404921731, ~x$w_buff1_used~0=~x$w_buff1_used~0_In404921731, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In404921731, ~x$w_buff0_used~0=~x$w_buff0_used~0_In404921731} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In404921731, ~x$w_buff1_used~0=~x$w_buff1_used~0_In404921731, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In404921731, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out404921731|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In404921731} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:19:54,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2013513654 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite31_In-2013513654| |ULTIMATE.start_main_#t~ite31_Out-2013513654|) (not .cse0) (= ~x$w_buff1~0_In-2013513654 |ULTIMATE.start_main_#t~ite32_Out-2013513654|)) (and (= |ULTIMATE.start_main_#t~ite32_Out-2013513654| |ULTIMATE.start_main_#t~ite31_Out-2013513654|) (= ~x$w_buff1~0_In-2013513654 |ULTIMATE.start_main_#t~ite31_Out-2013513654|) .cse0 (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2013513654 256)))) (or (and (= (mod ~x$w_buff1_used~0_In-2013513654 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-2013513654 256)) (and (= (mod ~x$r_buff1_thd0~0_In-2013513654 256) 0) .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2013513654, ~x$w_buff1~0=~x$w_buff1~0_In-2013513654, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2013513654, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2013513654, ~weak$$choice2~0=~weak$$choice2~0_In-2013513654, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-2013513654|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2013513654} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2013513654, ~x$w_buff1~0=~x$w_buff1~0_In-2013513654, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2013513654, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-2013513654|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2013513654, ~weak$$choice2~0=~weak$$choice2~0_In-2013513654, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-2013513654|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2013513654} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:19:54,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:19:54,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:19:54,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:19:54,984 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:19:54 BasicIcfg [2019-11-28 18:19:54,984 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:19:54,985 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:19:54,985 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:19:54,985 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:19:54,986 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:40" (3/4) ... [2019-11-28 18:19:54,988 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:19:54,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= 0 v_~x~0_144) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1453~0.base_22|)) (= v_~x$r_buff0_thd1~0_115 0) (= |v_ULTIMATE.start_main_~#t1453~0.offset_17| 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1453~0.base_22| 4) |v_#length_15|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff0_thd2~0_168) (= |v_#valid_47| (store .cse0 |v_ULTIMATE.start_main_~#t1453~0.base_22| 1)) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1453~0.base_22|) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1453~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1453~0.base_22|) |v_ULTIMATE.start_main_~#t1453~0.offset_17| 0)) |v_#memory_int_13|) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ULTIMATE.start_main_~#t1453~0.offset=|v_ULTIMATE.start_main_~#t1453~0.offset_17|, ULTIMATE.start_main_~#t1454~0.base=|v_ULTIMATE.start_main_~#t1454~0.base_17|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~x~0=v_~x~0_144, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_~#t1454~0.offset=|v_ULTIMATE.start_main_~#t1454~0.offset_14|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ULTIMATE.start_main_~#t1453~0.base=|v_ULTIMATE.start_main_~#t1453~0.base_22|, ~y~0=v_~y~0_67, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ULTIMATE.start_main_~#t1453~0.offset, ULTIMATE.start_main_~#t1454~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1454~0.offset, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1453~0.base, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:19:54,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1454~0.base_10|)) (= |v_ULTIMATE.start_main_~#t1454~0.offset_9| 0) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1454~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1454~0.base_10|) |v_ULTIMATE.start_main_~#t1454~0.offset_9| 1))) (= (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1454~0.base_10| 1) |v_#valid_25|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t1454~0.base_10| 4) |v_#length_9|) (= (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1454~0.base_10|) 0) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1454~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t1454~0.base=|v_ULTIMATE.start_main_~#t1454~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_~#t1454~0.offset=|v_ULTIMATE.start_main_~#t1454~0.offset_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1454~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1454~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:19:54,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:19:54,991 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out949657189| |P0Thread1of1ForFork0_#t~ite3_Out949657189|)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In949657189 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In949657189 256)))) (or (and (not .cse0) .cse1 (= ~x$w_buff1~0_In949657189 |P0Thread1of1ForFork0_#t~ite3_Out949657189|) (not .cse2)) (and .cse1 (= ~x~0_In949657189 |P0Thread1of1ForFork0_#t~ite3_Out949657189|) (or .cse0 .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In949657189, ~x$w_buff1_used~0=~x$w_buff1_used~0_In949657189, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In949657189, ~x~0=~x~0_In949657189} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out949657189|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out949657189|, ~x$w_buff1~0=~x$w_buff1~0_In949657189, ~x$w_buff1_used~0=~x$w_buff1_used~0_In949657189, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In949657189, ~x~0=~x~0_In949657189} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:19:54,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-447882908 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-447882908 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-447882908| 0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-447882908 |P0Thread1of1ForFork0_#t~ite5_Out-447882908|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-447882908, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-447882908} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-447882908|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-447882908, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-447882908} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:19:54,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In1623521896 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In1623521896 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1623521896 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd1~0_In1623521896 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1623521896|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~x$w_buff1_used~0_In1623521896 |P0Thread1of1ForFork0_#t~ite6_Out1623521896|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1623521896, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1623521896, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1623521896, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1623521896} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1623521896|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1623521896, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1623521896, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1623521896, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1623521896} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:19:54,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1877594644 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-1877594644 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1877594644|) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1877594644| ~x$w_buff0_used~0_In-1877594644) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1877594644, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1877594644} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1877594644|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1877594644, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1877594644} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:19:54,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1506766869 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1506766869 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out-1506766869| 0)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out-1506766869| ~x$r_buff0_thd1~0_In-1506766869) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1506766869, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1506766869} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1506766869, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1506766869|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1506766869} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:19:54,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In289673551 256))) (.cse3 (= (mod ~x$r_buff0_thd1~0_In289673551 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In289673551 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In289673551 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd1~0_In289673551 |P0Thread1of1ForFork0_#t~ite8_Out289673551|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out289673551|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In289673551, ~x$w_buff1_used~0=~x$w_buff1_used~0_In289673551, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In289673551, ~x$w_buff0_used~0=~x$w_buff0_used~0_In289673551} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In289673551, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out289673551|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In289673551, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In289673551, ~x$w_buff0_used~0=~x$w_buff0_used~0_In289673551} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:19:54,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:19:54,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In633795073 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In633795073 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In633795073 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In633795073 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In633795073 |P1Thread1of1ForFork1_#t~ite12_Out633795073|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out633795073|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In633795073, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In633795073, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In633795073, ~x$w_buff0_used~0=~x$w_buff0_used~0_In633795073} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In633795073, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In633795073, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out633795073|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In633795073, ~x$w_buff0_used~0=~x$w_buff0_used~0_In633795073} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:19:54,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In402282168 256))) (.cse2 (= ~x$r_buff0_thd2~0_In402282168 ~x$r_buff0_thd2~0_Out402282168)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In402282168 256)))) (or (and (= 0 ~x$r_buff0_thd2~0_Out402282168) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In402282168, ~x$w_buff0_used~0=~x$w_buff0_used~0_In402282168} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out402282168|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out402282168, ~x$w_buff0_used~0=~x$w_buff0_used~0_In402282168} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:19:54,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-183629259 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-183629259 256))) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-183629259 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-183629259 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out-183629259| 0)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-183629259| ~x$r_buff1_thd2~0_In-183629259) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-183629259, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-183629259, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-183629259, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-183629259} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-183629259, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-183629259, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-183629259, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-183629259|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-183629259} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:19:54,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:19:54,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:19:54,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-2053113703| |ULTIMATE.start_main_#t~ite17_Out-2053113703|)) (.cse2 (= (mod ~x$w_buff1_used~0_In-2053113703 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-2053113703 256)))) (or (and .cse0 (not .cse1) (not .cse2) (= |ULTIMATE.start_main_#t~ite17_Out-2053113703| ~x$w_buff1~0_In-2053113703)) (and .cse0 (= ~x~0_In-2053113703 |ULTIMATE.start_main_#t~ite17_Out-2053113703|) (or .cse2 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-2053113703, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2053113703, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2053113703, ~x~0=~x~0_In-2053113703} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-2053113703|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-2053113703|, ~x$w_buff1~0=~x$w_buff1~0_In-2053113703, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2053113703, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2053113703, ~x~0=~x~0_In-2053113703} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:19:54,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In1723215767 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1723215767 256)))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out1723215767| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite19_Out1723215767| ~x$w_buff0_used~0_In1723215767) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1723215767, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1723215767} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1723215767, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1723215767|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1723215767} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:19:54,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-108446509 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd0~0_In-108446509 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In-108446509 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-108446509 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-108446509|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out-108446509| ~x$w_buff1_used~0_In-108446509) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-108446509, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-108446509, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-108446509, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-108446509} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-108446509, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-108446509, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-108446509|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-108446509, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-108446509} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:19:54,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1351651234 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1351651234 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-1351651234|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-1351651234 |ULTIMATE.start_main_#t~ite21_Out-1351651234|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1351651234, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1351651234} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1351651234, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1351651234|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1351651234} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:19:54,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In404921731 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In404921731 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In404921731 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In404921731 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In404921731 |ULTIMATE.start_main_#t~ite22_Out404921731|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out404921731|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In404921731, ~x$w_buff1_used~0=~x$w_buff1_used~0_In404921731, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In404921731, ~x$w_buff0_used~0=~x$w_buff0_used~0_In404921731} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In404921731, ~x$w_buff1_used~0=~x$w_buff1_used~0_In404921731, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In404921731, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out404921731|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In404921731} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:19:54,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2013513654 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite31_In-2013513654| |ULTIMATE.start_main_#t~ite31_Out-2013513654|) (not .cse0) (= ~x$w_buff1~0_In-2013513654 |ULTIMATE.start_main_#t~ite32_Out-2013513654|)) (and (= |ULTIMATE.start_main_#t~ite32_Out-2013513654| |ULTIMATE.start_main_#t~ite31_Out-2013513654|) (= ~x$w_buff1~0_In-2013513654 |ULTIMATE.start_main_#t~ite31_Out-2013513654|) .cse0 (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2013513654 256)))) (or (and (= (mod ~x$w_buff1_used~0_In-2013513654 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-2013513654 256)) (and (= (mod ~x$r_buff1_thd0~0_In-2013513654 256) 0) .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2013513654, ~x$w_buff1~0=~x$w_buff1~0_In-2013513654, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2013513654, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2013513654, ~weak$$choice2~0=~weak$$choice2~0_In-2013513654, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-2013513654|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2013513654} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2013513654, ~x$w_buff1~0=~x$w_buff1~0_In-2013513654, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2013513654, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-2013513654|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2013513654, ~weak$$choice2~0=~weak$$choice2~0_In-2013513654, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-2013513654|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2013513654} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:19:55,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:19:55,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:19:55,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:19:55,103 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:19:55,103 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:19:55,105 INFO L168 Benchmark]: Toolchain (without parser) took 16787.56 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 496.0 MB). Free memory was 960.4 MB in the beginning and 1.2 GB in the end (delta: -286.9 MB). Peak memory consumption was 209.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:55,106 INFO L168 Benchmark]: CDTParser took 0.91 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:19:55,106 INFO L168 Benchmark]: CACSL2BoogieTranslator took 735.84 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.4 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -127.9 MB). Peak memory consumption was 15.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:55,111 INFO L168 Benchmark]: Boogie Procedure Inliner took 72.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:55,111 INFO L168 Benchmark]: Boogie Preprocessor took 49.78 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:19:55,112 INFO L168 Benchmark]: RCFGBuilder took 820.44 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.2 MB). Peak memory consumption was 45.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:55,112 INFO L168 Benchmark]: TraceAbstraction took 14978.98 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 369.6 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -228.4 MB). Peak memory consumption was 141.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:55,112 INFO L168 Benchmark]: Witness Printer took 118.67 ms. Allocated memory is still 1.5 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 12.2 MB). Peak memory consumption was 12.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:55,123 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.91 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 735.84 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.4 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -127.9 MB). Peak memory consumption was 15.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 72.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 49.78 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 820.44 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.2 MB). Peak memory consumption was 45.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 14978.98 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 369.6 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -228.4 MB). Peak memory consumption was 141.2 MB. Max. memory is 11.5 GB. * Witness Printer took 118.67 ms. Allocated memory is still 1.5 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 12.2 MB). Peak memory consumption was 12.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.6s, 146 ProgramPointsBefore, 78 ProgramPointsAfterwards, 180 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 36 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 25 ChoiceCompositions, 3816 VarBasedMoverChecksPositive, 194 VarBasedMoverChecksNegative, 52 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 46078 CheckedPairsTotal, 100 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t1453, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1454, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 14.7s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 4.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1746 SDtfs, 1464 SDslu, 3734 SDs, 0 SdLazy, 2665 SolverSat, 142 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 161 GetRequests, 36 SyntacticMatches, 20 SemanticMatches, 105 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 160 ImplicationChecksByTransitivity, 1.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=12980occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.8s AutomataMinimizationTime, 16 MinimizatonAttempts, 8849 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 687 NumberOfCodeBlocks, 687 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 617 ConstructedInterpolants, 0 QuantifiedInterpolants, 90612 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...