./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix054_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix054_tso.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d6ebf9d4a12bd832809edc3b0db3ef36dd62b8e0 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:19:39,792 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:19:39,796 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:19:39,816 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:19:39,816 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:19:39,818 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:19:39,821 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:19:39,833 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:19:39,839 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:19:39,843 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:19:39,845 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:19:39,847 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:19:39,848 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:19:39,851 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:19:39,853 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:19:39,855 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:19:39,857 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:19:39,859 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:19:39,862 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:19:39,866 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:19:39,871 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:19:39,876 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:19:39,878 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:19:39,880 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:19:39,886 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:19:39,886 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:19:39,887 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:19:39,889 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:19:39,889 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:19:39,891 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:19:39,891 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:19:39,892 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:19:39,892 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:19:39,894 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:19:39,895 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:19:39,895 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:19:39,896 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:19:39,897 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:19:39,897 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:19:39,898 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:19:39,900 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:19:39,901 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:19:39,937 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:19:39,943 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:19:39,948 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:19:39,949 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:19:39,949 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:19:39,949 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:19:39,950 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:19:39,950 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:19:39,950 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:19:39,951 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:19:39,951 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:19:39,951 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:19:39,952 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:19:39,952 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:19:39,952 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:19:39,953 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:19:39,953 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:19:39,954 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:19:39,954 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:19:39,957 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:19:39,957 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:19:39,957 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:19:39,958 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:19:39,958 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:19:39,958 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:19:39,959 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:19:39,959 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:19:39,960 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:19:39,960 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:19:39,961 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d6ebf9d4a12bd832809edc3b0db3ef36dd62b8e0 [2019-11-28 18:19:40,321 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:19:40,340 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:19:40,345 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:19:40,347 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:19:40,348 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:19:40,349 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix054_tso.opt.i [2019-11-28 18:19:40,427 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/351971c28/38538b6df2c240ccb2b4d0d327bdd8c4/FLAGc52c2c760 [2019-11-28 18:19:41,000 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:19:41,001 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix054_tso.opt.i [2019-11-28 18:19:41,025 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/351971c28/38538b6df2c240ccb2b4d0d327bdd8c4/FLAGc52c2c760 [2019-11-28 18:19:41,272 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/351971c28/38538b6df2c240ccb2b4d0d327bdd8c4 [2019-11-28 18:19:41,276 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:19:41,277 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:19:41,282 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:19:41,282 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:19:41,287 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:19:41,288 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:19:41" (1/1) ... [2019-11-28 18:19:41,291 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a89df04 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:41, skipping insertion in model container [2019-11-28 18:19:41,291 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:19:41" (1/1) ... [2019-11-28 18:19:41,300 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:19:41,371 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:19:41,852 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:19:41,879 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:19:41,951 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:19:42,026 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:19:42,027 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42 WrapperNode [2019-11-28 18:19:42,027 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:19:42,028 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:19:42,028 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:19:42,028 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:19:42,038 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,059 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,097 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:19:42,098 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:19:42,098 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:19:42,099 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:19:42,109 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,110 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,115 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,115 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,126 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,130 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,134 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... [2019-11-28 18:19:42,139 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:19:42,140 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:19:42,140 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:19:42,140 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:19:42,141 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:19:42,215 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:19:42,215 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:19:42,215 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:19:42,216 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:19:42,217 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:19:42,217 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:19:42,217 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:19:42,217 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:19:42,217 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:19:42,218 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:19:42,219 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:19:42,222 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:19:42,957 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:19:42,957 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:19:42,959 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:42 BoogieIcfgContainer [2019-11-28 18:19:42,959 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:19:42,962 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:19:42,963 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:19:42,967 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:19:42,968 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:19:41" (1/3) ... [2019-11-28 18:19:42,969 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41a61b54 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:19:42, skipping insertion in model container [2019-11-28 18:19:42,970 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:19:42" (2/3) ... [2019-11-28 18:19:42,971 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41a61b54 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:19:42, skipping insertion in model container [2019-11-28 18:19:42,972 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:42" (3/3) ... [2019-11-28 18:19:42,975 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_tso.opt.i [2019-11-28 18:19:42,990 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:19:42,991 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:19:42,997 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:19:42,999 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:19:43,032 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,032 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,032 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,032 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,040 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,041 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,041 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,041 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,042 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,042 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,047 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,047 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,047 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,047 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,048 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,048 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,048 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,048 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,049 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:19:43,069 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:19:43,087 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:19:43,087 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:19:43,087 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:19:43,088 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:19:43,088 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:19:43,088 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:19:43,088 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:19:43,088 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:19:43,113 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-11-28 18:19:43,115 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:19:43,216 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:19:43,216 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:19:43,237 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:19:43,257 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:19:43,316 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:19:43,316 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:19:43,323 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 458 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:19:43,338 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-11-28 18:19:43,339 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:19:47,681 WARN L192 SmtUtils]: Spent 209.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-11-28 18:19:47,818 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46078 [2019-11-28 18:19:47,819 INFO L214 etLargeBlockEncoding]: Total number of compositions: 100 [2019-11-28 18:19:47,822 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-11-28 18:19:48,557 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8413 states. [2019-11-28 18:19:48,561 INFO L276 IsEmpty]: Start isEmpty. Operand 8413 states. [2019-11-28 18:19:48,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-11-28 18:19:48,570 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:48,571 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-11-28 18:19:48,572 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:48,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:48,579 INFO L82 PathProgramCache]: Analyzing trace with hash 693777882, now seen corresponding path program 1 times [2019-11-28 18:19:48,592 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:48,593 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833431873] [2019-11-28 18:19:48,593 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:48,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:48,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:48,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833431873] [2019-11-28 18:19:48,915 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:48,916 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:19:48,916 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304545933] [2019-11-28 18:19:48,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:48,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:48,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:48,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:48,943 INFO L87 Difference]: Start difference. First operand 8413 states. Second operand 3 states. [2019-11-28 18:19:49,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:49,186 INFO L93 Difference]: Finished difference Result 8377 states and 27415 transitions. [2019-11-28 18:19:49,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:49,188 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-11-28 18:19:49,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:49,295 INFO L225 Difference]: With dead ends: 8377 [2019-11-28 18:19:49,295 INFO L226 Difference]: Without dead ends: 8208 [2019-11-28 18:19:49,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:49,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8208 states. [2019-11-28 18:19:49,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8208 to 8208. [2019-11-28 18:19:49,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8208 states. [2019-11-28 18:19:49,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8208 states to 8208 states and 26895 transitions. [2019-11-28 18:19:49,721 INFO L78 Accepts]: Start accepts. Automaton has 8208 states and 26895 transitions. Word has length 5 [2019-11-28 18:19:49,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:49,722 INFO L462 AbstractCegarLoop]: Abstraction has 8208 states and 26895 transitions. [2019-11-28 18:19:49,722 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:49,722 INFO L276 IsEmpty]: Start isEmpty. Operand 8208 states and 26895 transitions. [2019-11-28 18:19:49,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:19:49,725 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:49,725 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:49,725 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:49,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:49,726 INFO L82 PathProgramCache]: Analyzing trace with hash 2143808117, now seen corresponding path program 1 times [2019-11-28 18:19:49,726 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:49,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [4804094] [2019-11-28 18:19:49,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:49,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:49,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:49,814 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [4804094] [2019-11-28 18:19:49,814 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:49,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:49,816 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972162746] [2019-11-28 18:19:49,817 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:49,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:49,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:49,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:49,819 INFO L87 Difference]: Start difference. First operand 8208 states and 26895 transitions. Second operand 3 states. [2019-11-28 18:19:49,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:49,848 INFO L93 Difference]: Finished difference Result 1326 states and 3037 transitions. [2019-11-28 18:19:49,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:49,848 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-11-28 18:19:49,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:49,856 INFO L225 Difference]: With dead ends: 1326 [2019-11-28 18:19:49,857 INFO L226 Difference]: Without dead ends: 1326 [2019-11-28 18:19:49,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:49,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1326 states. [2019-11-28 18:19:49,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1326 to 1326. [2019-11-28 18:19:49,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1326 states. [2019-11-28 18:19:49,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1326 states to 1326 states and 3037 transitions. [2019-11-28 18:19:49,891 INFO L78 Accepts]: Start accepts. Automaton has 1326 states and 3037 transitions. Word has length 11 [2019-11-28 18:19:49,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:49,892 INFO L462 AbstractCegarLoop]: Abstraction has 1326 states and 3037 transitions. [2019-11-28 18:19:49,892 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:49,892 INFO L276 IsEmpty]: Start isEmpty. Operand 1326 states and 3037 transitions. [2019-11-28 18:19:49,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:19:49,893 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:49,893 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:49,894 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:49,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:49,894 INFO L82 PathProgramCache]: Analyzing trace with hash 1923085964, now seen corresponding path program 1 times [2019-11-28 18:19:49,895 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:49,895 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749476733] [2019-11-28 18:19:49,895 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:49,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,035 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749476733] [2019-11-28 18:19:50,035 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,036 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:50,036 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054504402] [2019-11-28 18:19:50,036 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:19:50,037 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:19:50,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:50,038 INFO L87 Difference]: Start difference. First operand 1326 states and 3037 transitions. Second operand 4 states. [2019-11-28 18:19:50,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:50,348 INFO L93 Difference]: Finished difference Result 1806 states and 4001 transitions. [2019-11-28 18:19:50,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:19:50,349 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:19:50,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:50,359 INFO L225 Difference]: With dead ends: 1806 [2019-11-28 18:19:50,359 INFO L226 Difference]: Without dead ends: 1806 [2019-11-28 18:19:50,360 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:50,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1806 states. [2019-11-28 18:19:50,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1806 to 1654. [2019-11-28 18:19:50,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1654 states. [2019-11-28 18:19:50,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1654 states to 1654 states and 3712 transitions. [2019-11-28 18:19:50,409 INFO L78 Accepts]: Start accepts. Automaton has 1654 states and 3712 transitions. Word has length 11 [2019-11-28 18:19:50,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:50,410 INFO L462 AbstractCegarLoop]: Abstraction has 1654 states and 3712 transitions. [2019-11-28 18:19:50,410 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:19:50,410 INFO L276 IsEmpty]: Start isEmpty. Operand 1654 states and 3712 transitions. [2019-11-28 18:19:50,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-11-28 18:19:50,414 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:50,414 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:50,414 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:50,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:50,415 INFO L82 PathProgramCache]: Analyzing trace with hash 909891733, now seen corresponding path program 1 times [2019-11-28 18:19:50,415 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:50,416 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404276882] [2019-11-28 18:19:50,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,483 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [404276882] [2019-11-28 18:19:50,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:19:50,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1247662419] [2019-11-28 18:19:50,484 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:19:50,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:19:50,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:50,487 INFO L87 Difference]: Start difference. First operand 1654 states and 3712 transitions. Second operand 4 states. [2019-11-28 18:19:50,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:50,502 INFO L93 Difference]: Finished difference Result 356 states and 659 transitions. [2019-11-28 18:19:50,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:19:50,506 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-11-28 18:19:50,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:50,508 INFO L225 Difference]: With dead ends: 356 [2019-11-28 18:19:50,509 INFO L226 Difference]: Without dead ends: 356 [2019-11-28 18:19:50,509 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:19:50,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 356 states. [2019-11-28 18:19:50,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 356 to 321. [2019-11-28 18:19:50,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2019-11-28 18:19:50,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 594 transitions. [2019-11-28 18:19:50,519 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 594 transitions. Word has length 23 [2019-11-28 18:19:50,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:50,520 INFO L462 AbstractCegarLoop]: Abstraction has 321 states and 594 transitions. [2019-11-28 18:19:50,520 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:19:50,520 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 594 transitions. [2019-11-28 18:19:50,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:50,522 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:50,523 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:50,523 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:50,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:50,523 INFO L82 PathProgramCache]: Analyzing trace with hash 763517816, now seen corresponding path program 1 times [2019-11-28 18:19:50,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:50,524 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939868022] [2019-11-28 18:19:50,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939868022] [2019-11-28 18:19:50,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:19:50,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441247030] [2019-11-28 18:19:50,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:50,606 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:50,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:50,607 INFO L87 Difference]: Start difference. First operand 321 states and 594 transitions. Second operand 3 states. [2019-11-28 18:19:50,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:50,653 INFO L93 Difference]: Finished difference Result 331 states and 608 transitions. [2019-11-28 18:19:50,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:50,654 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:19:50,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:50,656 INFO L225 Difference]: With dead ends: 331 [2019-11-28 18:19:50,656 INFO L226 Difference]: Without dead ends: 331 [2019-11-28 18:19:50,656 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:50,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2019-11-28 18:19:50,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 327. [2019-11-28 18:19:50,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-11-28 18:19:50,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 604 transitions. [2019-11-28 18:19:50,664 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 604 transitions. Word has length 52 [2019-11-28 18:19:50,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:50,666 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 604 transitions. [2019-11-28 18:19:50,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:50,666 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 604 transitions. [2019-11-28 18:19:50,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:50,670 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:50,670 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:50,671 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:50,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:50,671 INFO L82 PathProgramCache]: Analyzing trace with hash 1269350019, now seen corresponding path program 1 times [2019-11-28 18:19:50,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:50,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1874520272] [2019-11-28 18:19:50,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:50,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:50,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:50,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1874520272] [2019-11-28 18:19:50,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:50,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:19:50,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347683344] [2019-11-28 18:19:50,845 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:19:50,845 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:50,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:19:50,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:19:50,845 INFO L87 Difference]: Start difference. First operand 327 states and 604 transitions. Second operand 5 states. [2019-11-28 18:19:51,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:51,087 INFO L93 Difference]: Finished difference Result 458 states and 840 transitions. [2019-11-28 18:19:51,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:19:51,088 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-28 18:19:51,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:51,090 INFO L225 Difference]: With dead ends: 458 [2019-11-28 18:19:51,090 INFO L226 Difference]: Without dead ends: 458 [2019-11-28 18:19:51,091 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:51,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2019-11-28 18:19:51,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 374. [2019-11-28 18:19:51,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2019-11-28 18:19:51,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 695 transitions. [2019-11-28 18:19:51,100 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 695 transitions. Word has length 52 [2019-11-28 18:19:51,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:51,100 INFO L462 AbstractCegarLoop]: Abstraction has 374 states and 695 transitions. [2019-11-28 18:19:51,100 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:19:51,101 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 695 transitions. [2019-11-28 18:19:51,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:51,102 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:51,102 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:51,102 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:51,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:51,102 INFO L82 PathProgramCache]: Analyzing trace with hash 544633013, now seen corresponding path program 2 times [2019-11-28 18:19:51,103 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:51,103 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [55719667] [2019-11-28 18:19:51,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:51,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:51,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:51,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [55719667] [2019-11-28 18:19:51,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:51,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:19:51,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21350729] [2019-11-28 18:19:51,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:19:51,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:51,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:19:51,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:51,248 INFO L87 Difference]: Start difference. First operand 374 states and 695 transitions. Second operand 6 states. [2019-11-28 18:19:51,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:51,647 INFO L93 Difference]: Finished difference Result 513 states and 942 transitions. [2019-11-28 18:19:51,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:19:51,648 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:19:51,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:51,651 INFO L225 Difference]: With dead ends: 513 [2019-11-28 18:19:51,651 INFO L226 Difference]: Without dead ends: 513 [2019-11-28 18:19:51,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:19:51,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states. [2019-11-28 18:19:51,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 406. [2019-11-28 18:19:51,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2019-11-28 18:19:51,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 754 transitions. [2019-11-28 18:19:51,667 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 754 transitions. Word has length 52 [2019-11-28 18:19:51,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:51,670 INFO L462 AbstractCegarLoop]: Abstraction has 406 states and 754 transitions. [2019-11-28 18:19:51,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:19:51,671 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 754 transitions. [2019-11-28 18:19:51,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:51,674 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:51,674 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:51,679 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:51,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:51,679 INFO L82 PathProgramCache]: Analyzing trace with hash 1227473235, now seen corresponding path program 3 times [2019-11-28 18:19:51,679 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:51,680 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1292770566] [2019-11-28 18:19:51,680 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:51,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:51,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:51,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1292770566] [2019-11-28 18:19:51,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:51,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:19:51,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1947143334] [2019-11-28 18:19:51,853 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:19:51,853 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:51,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:19:51,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:19:51,854 INFO L87 Difference]: Start difference. First operand 406 states and 754 transitions. Second operand 6 states. [2019-11-28 18:19:52,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:52,221 INFO L93 Difference]: Finished difference Result 694 states and 1274 transitions. [2019-11-28 18:19:52,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:19:52,222 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:19:52,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:52,226 INFO L225 Difference]: With dead ends: 694 [2019-11-28 18:19:52,227 INFO L226 Difference]: Without dead ends: 694 [2019-11-28 18:19:52,227 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:19:52,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 694 states. [2019-11-28 18:19:52,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 694 to 445. [2019-11-28 18:19:52,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 445 states. [2019-11-28 18:19:52,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 833 transitions. [2019-11-28 18:19:52,239 INFO L78 Accepts]: Start accepts. Automaton has 445 states and 833 transitions. Word has length 52 [2019-11-28 18:19:52,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:52,240 INFO L462 AbstractCegarLoop]: Abstraction has 445 states and 833 transitions. [2019-11-28 18:19:52,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:19:52,241 INFO L276 IsEmpty]: Start isEmpty. Operand 445 states and 833 transitions. [2019-11-28 18:19:52,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:19:52,242 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:52,243 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:52,243 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:52,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:52,244 INFO L82 PathProgramCache]: Analyzing trace with hash 1833025349, now seen corresponding path program 4 times [2019-11-28 18:19:52,244 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:52,245 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114910036] [2019-11-28 18:19:52,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:52,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:52,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:52,351 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114910036] [2019-11-28 18:19:52,351 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:52,351 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:19:52,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441607034] [2019-11-28 18:19:52,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:19:52,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:52,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:19:52,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:19:52,353 INFO L87 Difference]: Start difference. First operand 445 states and 833 transitions. Second operand 7 states. [2019-11-28 18:19:52,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:52,760 INFO L93 Difference]: Finished difference Result 702 states and 1289 transitions. [2019-11-28 18:19:52,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:19:52,767 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:19:52,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:52,771 INFO L225 Difference]: With dead ends: 702 [2019-11-28 18:19:52,771 INFO L226 Difference]: Without dead ends: 702 [2019-11-28 18:19:52,772 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:19:52,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 702 states. [2019-11-28 18:19:52,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 702 to 424. [2019-11-28 18:19:52,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 424 states. [2019-11-28 18:19:52,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 792 transitions. [2019-11-28 18:19:52,784 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 792 transitions. Word has length 52 [2019-11-28 18:19:52,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:52,784 INFO L462 AbstractCegarLoop]: Abstraction has 424 states and 792 transitions. [2019-11-28 18:19:52,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:19:52,785 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 792 transitions. [2019-11-28 18:19:52,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:52,786 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:52,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:52,786 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:52,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:52,787 INFO L82 PathProgramCache]: Analyzing trace with hash 513839464, now seen corresponding path program 1 times [2019-11-28 18:19:52,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:52,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1170657961] [2019-11-28 18:19:52,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:52,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:53,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:53,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1170657961] [2019-11-28 18:19:53,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:53,059 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:19:53,059 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271096883] [2019-11-28 18:19:53,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-28 18:19:53,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:53,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-28 18:19:53,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2019-11-28 18:19:53,060 INFO L87 Difference]: Start difference. First operand 424 states and 792 transitions. Second operand 10 states. [2019-11-28 18:19:53,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:53,919 INFO L93 Difference]: Finished difference Result 767 states and 1367 transitions. [2019-11-28 18:19:53,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-28 18:19:53,919 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 53 [2019-11-28 18:19:53,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:53,923 INFO L225 Difference]: With dead ends: 767 [2019-11-28 18:19:53,923 INFO L226 Difference]: Without dead ends: 767 [2019-11-28 18:19:53,924 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=96, Invalid=284, Unknown=0, NotChecked=0, Total=380 [2019-11-28 18:19:53,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 767 states. [2019-11-28 18:19:53,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 767 to 372. [2019-11-28 18:19:53,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372 states. [2019-11-28 18:19:53,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 679 transitions. [2019-11-28 18:19:53,934 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 679 transitions. Word has length 53 [2019-11-28 18:19:53,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:53,935 INFO L462 AbstractCegarLoop]: Abstraction has 372 states and 679 transitions. [2019-11-28 18:19:53,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-28 18:19:53,935 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 679 transitions. [2019-11-28 18:19:53,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:53,936 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:53,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:53,936 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:53,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:53,937 INFO L82 PathProgramCache]: Analyzing trace with hash -162355984, now seen corresponding path program 2 times [2019-11-28 18:19:53,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:53,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891925595] [2019-11-28 18:19:53,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:53,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:54,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:54,187 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [891925595] [2019-11-28 18:19:54,188 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:54,188 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:19:54,188 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [461050367] [2019-11-28 18:19:54,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:19:54,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:54,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:19:54,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:19:54,190 INFO L87 Difference]: Start difference. First operand 372 states and 679 transitions. Second operand 12 states. [2019-11-28 18:19:55,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:55,017 INFO L93 Difference]: Finished difference Result 894 states and 1629 transitions. [2019-11-28 18:19:55,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-11-28 18:19:55,017 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 53 [2019-11-28 18:19:55,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:55,019 INFO L225 Difference]: With dead ends: 894 [2019-11-28 18:19:55,019 INFO L226 Difference]: Without dead ends: 291 [2019-11-28 18:19:55,020 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 130 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=170, Invalid=642, Unknown=0, NotChecked=0, Total=812 [2019-11-28 18:19:55,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2019-11-28 18:19:55,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 265. [2019-11-28 18:19:55,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2019-11-28 18:19:55,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 465 transitions. [2019-11-28 18:19:55,025 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 465 transitions. Word has length 53 [2019-11-28 18:19:55,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:55,026 INFO L462 AbstractCegarLoop]: Abstraction has 265 states and 465 transitions. [2019-11-28 18:19:55,026 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:19:55,026 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 465 transitions. [2019-11-28 18:19:55,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:55,027 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:55,027 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:55,027 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:55,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:55,027 INFO L82 PathProgramCache]: Analyzing trace with hash 1236840700, now seen corresponding path program 3 times [2019-11-28 18:19:55,028 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:55,028 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684156388] [2019-11-28 18:19:55,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:55,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:55,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:55,099 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684156388] [2019-11-28 18:19:55,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:55,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:55,099 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828388121] [2019-11-28 18:19:55,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:55,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:55,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:55,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:55,101 INFO L87 Difference]: Start difference. First operand 265 states and 465 transitions. Second operand 3 states. [2019-11-28 18:19:55,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:55,140 INFO L93 Difference]: Finished difference Result 265 states and 464 transitions. [2019-11-28 18:19:55,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:55,141 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:19:55,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:55,142 INFO L225 Difference]: With dead ends: 265 [2019-11-28 18:19:55,143 INFO L226 Difference]: Without dead ends: 265 [2019-11-28 18:19:55,143 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:55,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265 states. [2019-11-28 18:19:55,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265 to 207. [2019-11-28 18:19:55,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2019-11-28 18:19:55,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 362 transitions. [2019-11-28 18:19:55,147 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 362 transitions. Word has length 53 [2019-11-28 18:19:55,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:55,148 INFO L462 AbstractCegarLoop]: Abstraction has 207 states and 362 transitions. [2019-11-28 18:19:55,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:55,148 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 362 transitions. [2019-11-28 18:19:55,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:19:55,149 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:55,149 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:55,149 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:55,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:55,149 INFO L82 PathProgramCache]: Analyzing trace with hash -1571611631, now seen corresponding path program 1 times [2019-11-28 18:19:55,150 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:55,150 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393141111] [2019-11-28 18:19:55,150 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:55,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:55,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:55,215 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393141111] [2019-11-28 18:19:55,215 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:55,215 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:19:55,215 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822603344] [2019-11-28 18:19:55,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:19:55,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:55,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:19:55,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:55,217 INFO L87 Difference]: Start difference. First operand 207 states and 362 transitions. Second operand 3 states. [2019-11-28 18:19:55,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:55,231 INFO L93 Difference]: Finished difference Result 197 states and 339 transitions. [2019-11-28 18:19:55,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:19:55,232 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:19:55,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:55,234 INFO L225 Difference]: With dead ends: 197 [2019-11-28 18:19:55,234 INFO L226 Difference]: Without dead ends: 197 [2019-11-28 18:19:55,234 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:19:55,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2019-11-28 18:19:55,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 197. [2019-11-28 18:19:55,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2019-11-28 18:19:55,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 339 transitions. [2019-11-28 18:19:55,239 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 339 transitions. Word has length 53 [2019-11-28 18:19:55,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:55,239 INFO L462 AbstractCegarLoop]: Abstraction has 197 states and 339 transitions. [2019-11-28 18:19:55,239 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:19:55,239 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 339 transitions. [2019-11-28 18:19:55,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:19:55,240 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:55,240 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:55,241 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:55,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:55,241 INFO L82 PathProgramCache]: Analyzing trace with hash 2120402622, now seen corresponding path program 1 times [2019-11-28 18:19:55,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:55,242 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013596749] [2019-11-28 18:19:55,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:55,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:19:55,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:19:55,547 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1013596749] [2019-11-28 18:19:55,547 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:19:55,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:19:55,548 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [947069866] [2019-11-28 18:19:55,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:19:55,548 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:19:55,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:19:55,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:19:55,549 INFO L87 Difference]: Start difference. First operand 197 states and 339 transitions. Second operand 12 states. [2019-11-28 18:19:55,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:19:55,818 INFO L93 Difference]: Finished difference Result 348 states and 589 transitions. [2019-11-28 18:19:55,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:19:55,819 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-11-28 18:19:55,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:19:55,821 INFO L225 Difference]: With dead ends: 348 [2019-11-28 18:19:55,821 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 18:19:55,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:19:55,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 18:19:55,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 305. [2019-11-28 18:19:55,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 305 states. [2019-11-28 18:19:55,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 524 transitions. [2019-11-28 18:19:55,829 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 524 transitions. Word has length 54 [2019-11-28 18:19:55,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:19:55,829 INFO L462 AbstractCegarLoop]: Abstraction has 305 states and 524 transitions. [2019-11-28 18:19:55,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:19:55,830 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 524 transitions. [2019-11-28 18:19:55,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:19:55,833 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:19:55,834 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:19:55,834 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:19:55,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:19:55,834 INFO L82 PathProgramCache]: Analyzing trace with hash 1631137646, now seen corresponding path program 2 times [2019-11-28 18:19:55,834 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:19:55,835 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789977043] [2019-11-28 18:19:55,835 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:19:55,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:19:55,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:19:55,947 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:19:55,947 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:19:55,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= 0 v_~x~0_144) (= v_~x$r_buff0_thd1~0_115 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= |v_ULTIMATE.start_main_~#t1455~0.offset_17| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1455~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1455~0.base_22|) |v_ULTIMATE.start_main_~#t1455~0.offset_17| 0)) |v_#memory_int_13|) (= 0 v_~x$r_buff0_thd2~0_168) (= (store .cse0 |v_ULTIMATE.start_main_~#t1455~0.base_22| 1) |v_#valid_47|) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1455~0.base_22| 4)) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1455~0.base_22|) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1455~0.base_22|) 0) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, ULTIMATE.start_main_~#t1455~0.base=|v_ULTIMATE.start_main_~#t1455~0.base_22|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ULTIMATE.start_main_~#t1456~0.offset=|v_ULTIMATE.start_main_~#t1456~0.offset_14|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~x~0=v_~x~0_144, ULTIMATE.start_main_~#t1455~0.offset=|v_ULTIMATE.start_main_~#t1455~0.offset_17|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_~#t1456~0.base=|v_ULTIMATE.start_main_~#t1456~0.base_17|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ~y~0=v_~y~0_67, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_~#t1455~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1456~0.offset, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1455~0.offset, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_~#t1456~0.base, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:19:55,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (= (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1456~0.base_10| 1) |v_#valid_25|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t1456~0.base_10| 4) |v_#length_9|) (= 0 (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1456~0.base_10|)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1456~0.base_10|) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1456~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1456~0.base_10|) |v_ULTIMATE.start_main_~#t1456~0.offset_9| 1))) (= |v_ULTIMATE.start_main_~#t1456~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1456~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1456~0.base=|v_ULTIMATE.start_main_~#t1456~0.base_10|, ULTIMATE.start_main_~#t1456~0.offset=|v_ULTIMATE.start_main_~#t1456~0.offset_9|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1456~0.base, ULTIMATE.start_main_~#t1456~0.offset] because there is no mapped edge [2019-11-28 18:19:55,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:19:55,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-695033687 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-695033687 256) 0)) (.cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out-695033687| |P0Thread1of1ForFork0_#t~ite4_Out-695033687|))) (or (and (= |P0Thread1of1ForFork0_#t~ite3_Out-695033687| ~x~0_In-695033687) (or .cse0 .cse1) .cse2) (and (= |P0Thread1of1ForFork0_#t~ite3_Out-695033687| ~x$w_buff1~0_In-695033687) (not .cse0) (not .cse1) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-695033687, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-695033687, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-695033687, ~x~0=~x~0_In-695033687} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-695033687|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-695033687|, ~x$w_buff1~0=~x$w_buff1~0_In-695033687, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-695033687, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-695033687, ~x~0=~x~0_In-695033687} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:19:55,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1227592317 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1227592317 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1227592317 |P0Thread1of1ForFork0_#t~ite5_Out-1227592317|)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1227592317|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1227592317, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1227592317} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1227592317|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1227592317, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1227592317} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:19:55,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd1~0_In857398297 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In857398297 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In857398297 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In857398297 256)))) (or (and (= ~x$w_buff1_used~0_In857398297 |P0Thread1of1ForFork0_#t~ite6_Out857398297|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out857398297|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In857398297, ~x$w_buff1_used~0=~x$w_buff1_used~0_In857398297, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In857398297, ~x$w_buff0_used~0=~x$w_buff0_used~0_In857398297} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out857398297|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In857398297, ~x$w_buff1_used~0=~x$w_buff1_used~0_In857398297, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In857398297, ~x$w_buff0_used~0=~x$w_buff0_used~0_In857398297} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:19:55,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In160994950 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In160994950 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out160994950|)) (and (= ~x$w_buff0_used~0_In160994950 |P1Thread1of1ForFork1_#t~ite11_Out160994950|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In160994950, ~x$w_buff0_used~0=~x$w_buff0_used~0_In160994950} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out160994950|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In160994950, ~x$w_buff0_used~0=~x$w_buff0_used~0_In160994950} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:19:55,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-426898343 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-426898343 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-426898343|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd1~0_In-426898343 |P0Thread1of1ForFork0_#t~ite7_Out-426898343|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-426898343, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-426898343} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-426898343, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-426898343|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-426898343} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:19:55,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1596301101 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1596301101 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In1596301101 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd1~0_In1596301101 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out1596301101| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out1596301101| ~x$r_buff1_thd1~0_In1596301101) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1596301101, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1596301101, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1596301101, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1596301101} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1596301101, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1596301101|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1596301101, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1596301101, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1596301101} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:19:55,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:19:55,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In-15636104 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-15636104 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-15636104 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-15636104 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out-15636104| ~x$w_buff1_used~0_In-15636104) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork1_#t~ite12_Out-15636104| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-15636104, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-15636104, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-15636104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-15636104} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-15636104, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-15636104, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-15636104|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-15636104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-15636104} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:19:55,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1888940309 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1888940309 256))) (.cse2 (= ~x$r_buff0_thd2~0_In1888940309 ~x$r_buff0_thd2~0_Out1888940309))) (or (and (= 0 ~x$r_buff0_thd2~0_Out1888940309) (not .cse0) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1888940309, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1888940309} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1888940309|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1888940309, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1888940309} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:19:55,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In1508979760 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1508979760 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In1508979760 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1508979760 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out1508979760| ~x$r_buff1_thd2~0_In1508979760) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork1_#t~ite14_Out1508979760| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1508979760, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1508979760, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1508979760, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1508979760} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1508979760, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1508979760, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1508979760, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1508979760|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1508979760} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:19:55,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:19:55,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:19:55,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1228103814 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1228103814| |ULTIMATE.start_main_#t~ite17_Out-1228103814|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1228103814 256)))) (or (and (= ~x~0_In-1228103814 |ULTIMATE.start_main_#t~ite17_Out-1228103814|) (or .cse0 .cse1) .cse2) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-1228103814| ~x$w_buff1~0_In-1228103814) .cse2 (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1228103814, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1228103814, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1228103814, ~x~0=~x~0_In-1228103814} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1228103814|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1228103814|, ~x$w_buff1~0=~x$w_buff1~0_In-1228103814, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1228103814, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1228103814, ~x~0=~x~0_In-1228103814} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:19:55,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-146801935 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-146801935 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out-146801935| 0)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-146801935 |ULTIMATE.start_main_#t~ite19_Out-146801935|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-146801935, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-146801935} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-146801935, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-146801935|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-146801935} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:19:55,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd0~0_In-345496296 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-345496296 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In-345496296 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-345496296 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-345496296|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In-345496296 |ULTIMATE.start_main_#t~ite20_Out-345496296|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-345496296, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-345496296, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-345496296, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-345496296} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-345496296, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-345496296, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-345496296|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-345496296, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-345496296} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:19:55,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In844843600 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In844843600 256) 0))) (or (and (= ~x$r_buff0_thd0~0_In844843600 |ULTIMATE.start_main_#t~ite21_Out844843600|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out844843600|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In844843600, ~x$w_buff0_used~0=~x$w_buff0_used~0_In844843600} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In844843600, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out844843600|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In844843600} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:19:55,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In736196539 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In736196539 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In736196539 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In736196539 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out736196539| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite22_Out736196539| ~x$r_buff1_thd0~0_In736196539) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In736196539, ~x$w_buff1_used~0=~x$w_buff1_used~0_In736196539, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In736196539, ~x$w_buff0_used~0=~x$w_buff0_used~0_In736196539} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In736196539, ~x$w_buff1_used~0=~x$w_buff1_used~0_In736196539, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In736196539, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out736196539|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In736196539} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:19:55,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1023576010 256)))) (or (and (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-1023576010 256) 0))) (or (and .cse0 (= (mod ~x$r_buff1_thd0~0_In-1023576010 256) 0)) (and .cse0 (= 0 (mod ~x$w_buff1_used~0_In-1023576010 256))) (= 0 (mod ~x$w_buff0_used~0_In-1023576010 256)))) (= |ULTIMATE.start_main_#t~ite32_Out-1023576010| |ULTIMATE.start_main_#t~ite31_Out-1023576010|) (= |ULTIMATE.start_main_#t~ite31_Out-1023576010| ~x$w_buff1~0_In-1023576010) .cse1) (and (= |ULTIMATE.start_main_#t~ite32_Out-1023576010| ~x$w_buff1~0_In-1023576010) (= |ULTIMATE.start_main_#t~ite31_In-1023576010| |ULTIMATE.start_main_#t~ite31_Out-1023576010|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1023576010, ~x$w_buff1~0=~x$w_buff1~0_In-1023576010, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1023576010, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1023576010, ~weak$$choice2~0=~weak$$choice2~0_In-1023576010, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-1023576010|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1023576010} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1023576010, ~x$w_buff1~0=~x$w_buff1~0_In-1023576010, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1023576010, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1023576010|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1023576010, ~weak$$choice2~0=~weak$$choice2~0_In-1023576010, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1023576010|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1023576010} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:19:55,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:19:55,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:19:55,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:19:56,062 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:19:56 BasicIcfg [2019-11-28 18:19:56,062 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:19:56,062 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:19:56,063 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:19:56,063 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:19:56,063 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:19:42" (3/4) ... [2019-11-28 18:19:56,066 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:19:56,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff0_thd0~0_317 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_153) (= 0 v_~x~0_144) (= v_~x$r_buff0_thd1~0_115 0) (= 0 v_~__unbuffered_cnt~0_78) (= v_~__unbuffered_p1_EAX~0_103 0) (= 0 v_~x$read_delayed~0_6) (< 0 |v_#StackHeapBarrier_14|) (= 0 v_~x$w_buff1_used~0_381) (= v_~x$flush_delayed~0_36 0) (= 0 |v_#NULL.base_4|) (= |v_ULTIMATE.start_main_~#t1455~0.offset_17| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1455~0.base_22| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1455~0.base_22|) |v_ULTIMATE.start_main_~#t1455~0.offset_17| 0)) |v_#memory_int_13|) (= 0 v_~x$r_buff0_thd2~0_168) (= (store .cse0 |v_ULTIMATE.start_main_~#t1455~0.base_22| 1) |v_#valid_47|) (= 0 v_~x$w_buff1~0_166) (= |v_#NULL.offset_4| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1455~0.base_22| 4)) (= v_~main$tmp_guard1~0_24 0) (= v_~y~0_67 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1455~0.base_22|) (= 0 v_~x$w_buff0~0_193) (= v_~x$r_buff1_thd0~0_243 0) (= v_~main$tmp_guard0~0_24 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1455~0.base_22|) 0) (= v_~weak$$choice2~0_114 0) (= 0 v_~weak$$choice0~0_12) (= 0 v_~x$w_buff0_used~0_609) (= v_~x$r_buff1_thd1~0_167 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_193, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, ULTIMATE.start_main_~#t1455~0.base=|v_ULTIMATE.start_main_~#t1455~0.base_22|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_167, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_139|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_103, #length=|v_#length_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_317, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_19|, ~x$w_buff1~0=v_~x$w_buff1~0_166, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_381, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_153, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ULTIMATE.start_main_~#t1456~0.offset=|v_ULTIMATE.start_main_~#t1456~0.offset_14|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~x~0=v_~x~0_144, ULTIMATE.start_main_~#t1455~0.offset=|v_ULTIMATE.start_main_~#t1455~0.offset_17|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_40|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_~#t1456~0.base=|v_ULTIMATE.start_main_~#t1456~0.base_17|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_36|, ~y~0=v_~y~0_67, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_243, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_168, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_609, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_21|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_~#t1455~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1456~0.offset, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1455~0.offset, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_~#t1456~0.base, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:19:56,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L779-1-->L781: Formula: (and (= (store |v_#valid_26| |v_ULTIMATE.start_main_~#t1456~0.base_10| 1) |v_#valid_25|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t1456~0.base_10| 4) |v_#length_9|) (= 0 (select |v_#valid_26| |v_ULTIMATE.start_main_~#t1456~0.base_10|)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t1456~0.base_10|) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1456~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1456~0.base_10|) |v_ULTIMATE.start_main_~#t1456~0.offset_9| 1))) (= |v_ULTIMATE.start_main_~#t1456~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1456~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_26|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t1456~0.base=|v_ULTIMATE.start_main_~#t1456~0.base_10|, ULTIMATE.start_main_~#t1456~0.offset=|v_ULTIMATE.start_main_~#t1456~0.offset_9|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1456~0.base, ULTIMATE.start_main_~#t1456~0.offset] because there is no mapped edge [2019-11-28 18:19:56,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1_#in~arg.offset_17| v_P1Thread1of1ForFork1_~arg.offset_15) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|) (= 2 v_~x$w_buff0~0_54) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_216 256))) (not (= 0 (mod v_~x$w_buff1_used~0_127 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.base_15 |v_P1Thread1of1ForFork1_#in~arg.base_17|) (= 1 v_~x$w_buff0_used~0_216) (= v_~x$w_buff0~0_55 v_~x$w_buff1~0_48) (= v_~x$w_buff0_used~0_217 v_~x$w_buff1_used~0_127)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_55, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_217} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_17, ~x$w_buff0~0=v_~x$w_buff0~0_54, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_15, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_15|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_15, ~x$w_buff1~0=v_~x$w_buff1~0_48, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_17|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_127, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_216} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:19:56,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L728-2-->L728-5: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-695033687 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-695033687 256) 0)) (.cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out-695033687| |P0Thread1of1ForFork0_#t~ite4_Out-695033687|))) (or (and (= |P0Thread1of1ForFork0_#t~ite3_Out-695033687| ~x~0_In-695033687) (or .cse0 .cse1) .cse2) (and (= |P0Thread1of1ForFork0_#t~ite3_Out-695033687| ~x$w_buff1~0_In-695033687) (not .cse0) (not .cse1) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-695033687, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-695033687, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-695033687, ~x~0=~x~0_In-695033687} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-695033687|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-695033687|, ~x$w_buff1~0=~x$w_buff1~0_In-695033687, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-695033687, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-695033687, ~x~0=~x~0_In-695033687} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:19:56,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L729-->L729-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1227592317 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1227592317 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1227592317 |P0Thread1of1ForFork0_#t~ite5_Out-1227592317|)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1227592317|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1227592317, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1227592317} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1227592317|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1227592317, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1227592317} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:19:56,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L730-->L730-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd1~0_In857398297 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In857398297 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In857398297 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In857398297 256)))) (or (and (= ~x$w_buff1_used~0_In857398297 |P0Thread1of1ForFork0_#t~ite6_Out857398297|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out857398297|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In857398297, ~x$w_buff1_used~0=~x$w_buff1_used~0_In857398297, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In857398297, ~x$w_buff0_used~0=~x$w_buff0_used~0_In857398297} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out857398297|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In857398297, ~x$w_buff1_used~0=~x$w_buff1_used~0_In857398297, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In857398297, ~x$w_buff0_used~0=~x$w_buff0_used~0_In857398297} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:19:56,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In160994950 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In160994950 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out160994950|)) (and (= ~x$w_buff0_used~0_In160994950 |P1Thread1of1ForFork1_#t~ite11_Out160994950|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In160994950, ~x$w_buff0_used~0=~x$w_buff0_used~0_In160994950} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out160994950|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In160994950, ~x$w_buff0_used~0=~x$w_buff0_used~0_In160994950} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:19:56,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L731-->L731-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-426898343 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-426898343 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-426898343|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd1~0_In-426898343 |P0Thread1of1ForFork0_#t~ite7_Out-426898343|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-426898343, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-426898343} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-426898343, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-426898343|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-426898343} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:19:56,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L732-->L732-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1596301101 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1596301101 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In1596301101 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd1~0_In1596301101 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out1596301101| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out1596301101| ~x$r_buff1_thd1~0_In1596301101) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1596301101, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1596301101, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1596301101, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1596301101} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1596301101, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1596301101|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1596301101, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1596301101, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1596301101} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:19:56,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L732-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:19:56,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In-15636104 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-15636104 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-15636104 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-15636104 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out-15636104| ~x$w_buff1_used~0_In-15636104) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork1_#t~ite12_Out-15636104| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-15636104, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-15636104, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-15636104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-15636104} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-15636104, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-15636104, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-15636104|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-15636104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-15636104} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:19:56,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L759-->L760: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1888940309 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1888940309 256))) (.cse2 (= ~x$r_buff0_thd2~0_In1888940309 ~x$r_buff0_thd2~0_Out1888940309))) (or (and (= 0 ~x$r_buff0_thd2~0_Out1888940309) (not .cse0) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1888940309, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1888940309} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1888940309|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1888940309, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1888940309} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:19:56,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L760-->L760-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In1508979760 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1508979760 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In1508979760 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1508979760 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out1508979760| ~x$r_buff1_thd2~0_In1508979760) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork1_#t~ite14_Out1508979760| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1508979760, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1508979760, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1508979760, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1508979760} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1508979760, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1508979760, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1508979760, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1508979760|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1508979760} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:19:56,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L760-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_125 |v_P1Thread1of1ForFork1_#t~ite14_34|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_34|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_33|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:19:56,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [586] [586] L781-1-->L787: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_11) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11} OutVars{ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_11, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet16, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:19:56,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L787-2-->L787-5: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1228103814 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1228103814| |ULTIMATE.start_main_#t~ite17_Out-1228103814|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1228103814 256)))) (or (and (= ~x~0_In-1228103814 |ULTIMATE.start_main_#t~ite17_Out-1228103814|) (or .cse0 .cse1) .cse2) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-1228103814| ~x$w_buff1~0_In-1228103814) .cse2 (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1228103814, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1228103814, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1228103814, ~x~0=~x~0_In-1228103814} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1228103814|, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1228103814|, ~x$w_buff1~0=~x$w_buff1~0_In-1228103814, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1228103814, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1228103814, ~x~0=~x~0_In-1228103814} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:19:56,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-146801935 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-146801935 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out-146801935| 0)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-146801935 |ULTIMATE.start_main_#t~ite19_Out-146801935|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-146801935, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-146801935} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-146801935, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-146801935|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-146801935} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:19:56,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd0~0_In-345496296 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-345496296 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In-345496296 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-345496296 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-345496296|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In-345496296 |ULTIMATE.start_main_#t~ite20_Out-345496296|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-345496296, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-345496296, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-345496296, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-345496296} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-345496296, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-345496296, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-345496296|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-345496296, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-345496296} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:19:56,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In844843600 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In844843600 256) 0))) (or (and (= ~x$r_buff0_thd0~0_In844843600 |ULTIMATE.start_main_#t~ite21_Out844843600|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out844843600|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In844843600, ~x$w_buff0_used~0=~x$w_buff0_used~0_In844843600} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In844843600, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out844843600|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In844843600} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:19:56,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In736196539 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In736196539 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In736196539 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In736196539 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out736196539| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite22_Out736196539| ~x$r_buff1_thd0~0_In736196539) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In736196539, ~x$w_buff1_used~0=~x$w_buff1_used~0_In736196539, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In736196539, ~x$w_buff0_used~0=~x$w_buff0_used~0_In736196539} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In736196539, ~x$w_buff1_used~0=~x$w_buff1_used~0_In736196539, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In736196539, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out736196539|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In736196539} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:19:56,075 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L800-->L800-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1023576010 256)))) (or (and (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-1023576010 256) 0))) (or (and .cse0 (= (mod ~x$r_buff1_thd0~0_In-1023576010 256) 0)) (and .cse0 (= 0 (mod ~x$w_buff1_used~0_In-1023576010 256))) (= 0 (mod ~x$w_buff0_used~0_In-1023576010 256)))) (= |ULTIMATE.start_main_#t~ite32_Out-1023576010| |ULTIMATE.start_main_#t~ite31_Out-1023576010|) (= |ULTIMATE.start_main_#t~ite31_Out-1023576010| ~x$w_buff1~0_In-1023576010) .cse1) (and (= |ULTIMATE.start_main_#t~ite32_Out-1023576010| ~x$w_buff1~0_In-1023576010) (= |ULTIMATE.start_main_#t~ite31_In-1023576010| |ULTIMATE.start_main_#t~ite31_Out-1023576010|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1023576010, ~x$w_buff1~0=~x$w_buff1~0_In-1023576010, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1023576010, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1023576010, ~weak$$choice2~0=~weak$$choice2~0_In-1023576010, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-1023576010|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1023576010} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1023576010, ~x$w_buff1~0=~x$w_buff1~0_In-1023576010, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1023576010, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1023576010|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1023576010, ~weak$$choice2~0=~weak$$choice2~0_In-1023576010, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1023576010|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1023576010} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:19:56,076 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [628] [628] L803-->L804: Formula: (and (= v_~x$r_buff0_thd0~0_125 v_~x$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_35 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_35} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_19|, ~weak$$choice2~0=v_~weak$$choice2~0_35} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:19:56,077 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L806-->L809-1: Formula: (and (not (= (mod v_~x$flush_delayed~0_27 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_118) (= v_~x$flush_delayed~0_26 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_118, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:19:56,077 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:19:56,231 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:19:56,231 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:19:56,232 INFO L168 Benchmark]: Toolchain (without parser) took 14955.44 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 428.9 MB). Free memory was 960.4 MB in the beginning and 1.3 GB in the end (delta: -348.5 MB). Peak memory consumption was 80.4 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:56,237 INFO L168 Benchmark]: CDTParser took 0.90 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:19:56,238 INFO L168 Benchmark]: CACSL2BoogieTranslator took 745.07 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 113.8 MB). Free memory was 960.4 MB in the beginning and 1.1 GB in the end (delta: -120.2 MB). Peak memory consumption was 25.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:56,238 INFO L168 Benchmark]: Boogie Procedure Inliner took 70.17 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:19:56,239 INFO L168 Benchmark]: Boogie Preprocessor took 41.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:56,239 INFO L168 Benchmark]: RCFGBuilder took 819.67 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.8 MB). Peak memory consumption was 45.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:56,243 INFO L168 Benchmark]: TraceAbstraction took 13100.39 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 315.1 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -293.4 MB). Peak memory consumption was 21.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:56,243 INFO L168 Benchmark]: Witness Printer took 168.35 ms. Allocated memory is still 1.5 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 12.4 MB). Peak memory consumption was 12.4 MB. Max. memory is 11.5 GB. [2019-11-28 18:19:56,248 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.90 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 745.07 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 113.8 MB). Free memory was 960.4 MB in the beginning and 1.1 GB in the end (delta: -120.2 MB). Peak memory consumption was 25.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 70.17 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 41.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 819.67 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.8 MB). Peak memory consumption was 45.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13100.39 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 315.1 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -293.4 MB). Peak memory consumption was 21.7 MB. Max. memory is 11.5 GB. * Witness Printer took 168.35 ms. Allocated memory is still 1.5 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 12.4 MB). Peak memory consumption was 12.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.7s, 146 ProgramPointsBefore, 78 ProgramPointsAfterwards, 180 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 36 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 25 ChoiceCompositions, 3816 VarBasedMoverChecksPositive, 194 VarBasedMoverChecksNegative, 52 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.3s, 0 MoverChecksTotal, 46078 CheckedPairsTotal, 100 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t1455, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1456, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 12.8s, OverallIterations: 15, TraceHistogramMax: 1, AutomataDifference: 4.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1430 SDtfs, 1348 SDslu, 3412 SDs, 0 SdLazy, 2395 SolverSat, 137 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 149 GetRequests, 36 SyntacticMatches, 13 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 1.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8413occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 14 MinimizatonAttempts, 1398 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 630 NumberOfCodeBlocks, 630 NumberOfCodeBlocksAsserted, 15 NumberOfCheckSat, 562 ConstructedInterpolants, 0 QuantifiedInterpolants, 90412 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 14 InterpolantComputations, 14 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...