./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/mix057_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/mix057_tso.oepc.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b3aaf2acd85b8302eeb167807b418a22f492adc8 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:20:35,197 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:20:35,200 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:20:35,217 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:20:35,218 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:20:35,220 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:20:35,222 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:20:35,230 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:20:35,235 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:20:35,239 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:20:35,240 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:20:35,242 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:20:35,243 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:20:35,245 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:20:35,246 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:20:35,248 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:20:35,249 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:20:35,250 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:20:35,253 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:20:35,257 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:20:35,258 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:20:35,259 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:20:35,261 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:20:35,261 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:20:35,263 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:20:35,264 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:20:35,264 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:20:35,265 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:20:35,265 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:20:35,266 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:20:35,266 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:20:35,267 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:20:35,268 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:20:35,269 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:20:35,270 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:20:35,270 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:20:35,271 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:20:35,271 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:20:35,271 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:20:35,272 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:20:35,273 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:20:35,274 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:20:35,288 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:20:35,288 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:20:35,290 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:20:35,290 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:20:35,290 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:20:35,291 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:20:35,291 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:20:35,291 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:20:35,291 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:20:35,292 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:20:35,292 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:20:35,292 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:20:35,293 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:20:35,293 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:20:35,293 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:20:35,293 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:20:35,294 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:20:35,294 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:20:35,294 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:20:35,295 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:20:35,295 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:20:35,295 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:20:35,295 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:20:35,296 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:20:35,296 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:20:35,296 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:20:35,297 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:20:35,297 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:20:35,297 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:20:35,297 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b3aaf2acd85b8302eeb167807b418a22f492adc8 [2019-11-28 18:20:35,587 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:20:35,600 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:20:35,603 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:20:35,606 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:20:35,607 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:20:35,608 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/mix057_tso.oepc.i [2019-11-28 18:20:35,672 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ea62fa95d/fc63d13981bb49ee8fba945b0d0cddc6/FLAG92f5bac6e [2019-11-28 18:20:36,206 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:20:36,207 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/mix057_tso.oepc.i [2019-11-28 18:20:36,229 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ea62fa95d/fc63d13981bb49ee8fba945b0d0cddc6/FLAG92f5bac6e [2019-11-28 18:20:36,490 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ea62fa95d/fc63d13981bb49ee8fba945b0d0cddc6 [2019-11-28 18:20:36,493 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:20:36,495 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:20:36,496 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:20:36,496 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:20:36,500 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:20:36,501 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:20:36" (1/1) ... [2019-11-28 18:20:36,503 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d265c30 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:36, skipping insertion in model container [2019-11-28 18:20:36,504 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:20:36" (1/1) ... [2019-11-28 18:20:36,512 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:20:36,555 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:20:37,063 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:20:37,077 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:20:37,142 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:20:37,237 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:20:37,238 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37 WrapperNode [2019-11-28 18:20:37,238 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:20:37,239 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:20:37,239 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:20:37,240 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:20:37,249 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,287 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,322 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:20:37,322 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:20:37,323 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:20:37,323 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:20:37,333 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,333 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,338 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,339 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,349 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,353 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,357 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... [2019-11-28 18:20:37,362 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:20:37,362 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:20:37,362 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:20:37,363 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:20:37,364 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:20:37,423 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:20:37,424 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:20:37,424 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:20:37,425 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:20:37,425 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:20:37,426 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:20:37,426 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:20:37,426 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:20:37,426 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:20:37,427 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:20:37,427 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-11-28 18:20:37,427 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-11-28 18:20:37,428 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:20:37,428 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:20:37,428 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:20:37,431 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:20:38,144 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:20:38,145 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:20:38,146 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:20:38 BoogieIcfgContainer [2019-11-28 18:20:38,146 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:20:38,148 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:20:38,148 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:20:38,151 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:20:38,152 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:20:36" (1/3) ... [2019-11-28 18:20:38,153 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@49a98a06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:20:38, skipping insertion in model container [2019-11-28 18:20:38,153 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:20:37" (2/3) ... [2019-11-28 18:20:38,153 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@49a98a06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:20:38, skipping insertion in model container [2019-11-28 18:20:38,154 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:20:38" (3/3) ... [2019-11-28 18:20:38,155 INFO L109 eAbstractionObserver]: Analyzing ICFG mix057_tso.oepc.i [2019-11-28 18:20:38,166 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:20:38,166 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:20:38,174 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:20:38,174 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:20:38,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,211 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,211 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,212 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,212 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,213 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,213 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,213 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,213 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,214 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,215 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,216 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,216 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,216 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,217 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,217 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,217 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,217 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,218 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,218 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,218 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,218 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,219 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,219 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,219 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,219 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,220 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,220 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,220 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,220 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,221 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,221 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,221 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,221 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,222 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,222 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,223 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,223 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,223 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,223 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,224 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,224 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,224 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,224 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,225 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,225 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,225 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,225 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,226 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,226 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,226 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,226 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,226 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,227 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,227 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,227 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,227 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,228 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,228 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,228 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,228 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,229 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,229 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,229 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,229 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,230 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,230 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,230 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:20:38,253 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-11-28 18:20:38,268 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:20:38,268 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:20:38,269 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:20:38,269 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:20:38,269 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:20:38,269 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:20:38,269 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:20:38,270 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:20:38,287 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 206 transitions [2019-11-28 18:20:38,289 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 206 transitions [2019-11-28 18:20:38,381 INFO L134 PetriNetUnfolder]: 41/202 cut-off events. [2019-11-28 18:20:38,381 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:20:38,397 INFO L76 FinitePrefix]: Finished finitePrefix Result has 215 conditions, 202 events. 41/202 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 483 event pairs. 12/171 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-11-28 18:20:38,423 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 206 transitions [2019-11-28 18:20:38,476 INFO L134 PetriNetUnfolder]: 41/202 cut-off events. [2019-11-28 18:20:38,476 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:20:38,485 INFO L76 FinitePrefix]: Finished finitePrefix Result has 215 conditions, 202 events. 41/202 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 483 event pairs. 12/171 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-11-28 18:20:38,503 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-11-28 18:20:38,504 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:20:43,225 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 77 [2019-11-28 18:20:43,585 WARN L192 SmtUtils]: Spent 254.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-11-28 18:20:43,708 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification that was a NOOP. DAG size: 89 [2019-11-28 18:20:43,734 INFO L206 etLargeBlockEncoding]: Checked pairs total: 56276 [2019-11-28 18:20:43,735 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-11-28 18:20:43,739 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 91 places, 100 transitions [2019-11-28 18:20:46,084 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 32878 states. [2019-11-28 18:20:46,085 INFO L276 IsEmpty]: Start isEmpty. Operand 32878 states. [2019-11-28 18:20:46,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-11-28 18:20:46,093 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:20:46,094 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:20:46,095 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:20:46,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:20:46,099 INFO L82 PathProgramCache]: Analyzing trace with hash -667351009, now seen corresponding path program 1 times [2019-11-28 18:20:46,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:20:46,108 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350721985] [2019-11-28 18:20:46,108 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:20:46,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:20:46,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:20:46,353 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350721985] [2019-11-28 18:20:46,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:20:46,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:20:46,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [48789609] [2019-11-28 18:20:46,360 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:20:46,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:20:46,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:20:46,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:20:46,378 INFO L87 Difference]: Start difference. First operand 32878 states. Second operand 3 states. [2019-11-28 18:20:47,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:20:47,176 INFO L93 Difference]: Finished difference Result 32686 states and 139960 transitions. [2019-11-28 18:20:47,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:20:47,178 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-11-28 18:20:47,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:20:47,501 INFO L225 Difference]: With dead ends: 32686 [2019-11-28 18:20:47,501 INFO L226 Difference]: Without dead ends: 32062 [2019-11-28 18:20:47,503 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:20:47,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32062 states. [2019-11-28 18:20:48,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32062 to 32062. [2019-11-28 18:20:48,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32062 states. [2019-11-28 18:20:49,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32062 states to 32062 states and 137412 transitions. [2019-11-28 18:20:49,126 INFO L78 Accepts]: Start accepts. Automaton has 32062 states and 137412 transitions. Word has length 9 [2019-11-28 18:20:49,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:20:49,127 INFO L462 AbstractCegarLoop]: Abstraction has 32062 states and 137412 transitions. [2019-11-28 18:20:49,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:20:49,128 INFO L276 IsEmpty]: Start isEmpty. Operand 32062 states and 137412 transitions. [2019-11-28 18:20:49,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-11-28 18:20:49,135 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:20:49,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:20:49,136 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:20:49,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:20:49,137 INFO L82 PathProgramCache]: Analyzing trace with hash -139405083, now seen corresponding path program 1 times [2019-11-28 18:20:49,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:20:49,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028420862] [2019-11-28 18:20:49,138 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:20:49,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:20:49,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:20:49,282 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028420862] [2019-11-28 18:20:49,283 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:20:49,283 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:20:49,284 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971082212] [2019-11-28 18:20:49,286 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:20:49,287 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:20:49,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:20:49,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:20:49,288 INFO L87 Difference]: Start difference. First operand 32062 states and 137412 transitions. Second operand 4 states. [2019-11-28 18:20:50,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:20:50,568 INFO L93 Difference]: Finished difference Result 51166 states and 211740 transitions. [2019-11-28 18:20:50,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:20:50,568 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-11-28 18:20:50,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:20:51,016 INFO L225 Difference]: With dead ends: 51166 [2019-11-28 18:20:51,016 INFO L226 Difference]: Without dead ends: 51138 [2019-11-28 18:20:51,017 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:20:51,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51138 states. [2019-11-28 18:20:53,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51138 to 46670. [2019-11-28 18:20:53,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46670 states. [2019-11-28 18:20:53,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46670 states to 46670 states and 195108 transitions. [2019-11-28 18:20:53,530 INFO L78 Accepts]: Start accepts. Automaton has 46670 states and 195108 transitions. Word has length 15 [2019-11-28 18:20:53,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:20:53,531 INFO L462 AbstractCegarLoop]: Abstraction has 46670 states and 195108 transitions. [2019-11-28 18:20:53,531 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:20:53,531 INFO L276 IsEmpty]: Start isEmpty. Operand 46670 states and 195108 transitions. [2019-11-28 18:20:53,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-11-28 18:20:53,536 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:20:53,536 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:20:53,537 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:20:53,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:20:53,537 INFO L82 PathProgramCache]: Analyzing trace with hash 2113277815, now seen corresponding path program 1 times [2019-11-28 18:20:53,538 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:20:53,538 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450020542] [2019-11-28 18:20:53,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:20:53,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:20:53,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:20:53,687 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450020542] [2019-11-28 18:20:53,688 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:20:53,688 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:20:53,688 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [678954995] [2019-11-28 18:20:53,693 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:20:53,694 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:20:53,694 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:20:53,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:20:53,695 INFO L87 Difference]: Start difference. First operand 46670 states and 195108 transitions. Second operand 4 states. [2019-11-28 18:20:54,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:20:54,258 INFO L93 Difference]: Finished difference Result 57898 states and 240332 transitions. [2019-11-28 18:20:54,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:20:54,258 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-11-28 18:20:54,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:20:54,421 INFO L225 Difference]: With dead ends: 57898 [2019-11-28 18:20:54,421 INFO L226 Difference]: Without dead ends: 57898 [2019-11-28 18:20:54,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:20:54,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57898 states. [2019-11-28 18:20:56,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57898 to 51310. [2019-11-28 18:20:56,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51310 states. [2019-11-28 18:20:57,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51310 states to 51310 states and 214288 transitions. [2019-11-28 18:20:57,127 INFO L78 Accepts]: Start accepts. Automaton has 51310 states and 214288 transitions. Word has length 15 [2019-11-28 18:20:57,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:20:57,128 INFO L462 AbstractCegarLoop]: Abstraction has 51310 states and 214288 transitions. [2019-11-28 18:20:57,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:20:57,130 INFO L276 IsEmpty]: Start isEmpty. Operand 51310 states and 214288 transitions. [2019-11-28 18:20:57,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-11-28 18:20:57,150 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:20:57,150 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:20:57,150 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:20:57,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:20:57,153 INFO L82 PathProgramCache]: Analyzing trace with hash -942234691, now seen corresponding path program 1 times [2019-11-28 18:20:57,154 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:20:57,155 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845782742] [2019-11-28 18:20:57,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:20:57,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:20:57,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:20:57,253 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845782742] [2019-11-28 18:20:57,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:20:57,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:20:57,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1711666486] [2019-11-28 18:20:57,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:20:57,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:20:57,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:20:57,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:20:57,255 INFO L87 Difference]: Start difference. First operand 51310 states and 214288 transitions. Second operand 3 states. [2019-11-28 18:20:57,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:20:57,525 INFO L93 Difference]: Finished difference Result 40149 states and 154969 transitions. [2019-11-28 18:20:57,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:20:57,526 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-11-28 18:20:57,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:20:57,661 INFO L225 Difference]: With dead ends: 40149 [2019-11-28 18:20:57,662 INFO L226 Difference]: Without dead ends: 40149 [2019-11-28 18:20:57,662 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:20:57,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40149 states. [2019-11-28 18:20:59,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40149 to 40149. [2019-11-28 18:20:59,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40149 states. [2019-11-28 18:20:59,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40149 states to 40149 states and 154969 transitions. [2019-11-28 18:20:59,379 INFO L78 Accepts]: Start accepts. Automaton has 40149 states and 154969 transitions. Word has length 21 [2019-11-28 18:20:59,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:20:59,379 INFO L462 AbstractCegarLoop]: Abstraction has 40149 states and 154969 transitions. [2019-11-28 18:20:59,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:20:59,379 INFO L276 IsEmpty]: Start isEmpty. Operand 40149 states and 154969 transitions. [2019-11-28 18:20:59,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-11-28 18:20:59,392 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:20:59,392 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:20:59,392 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:20:59,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:20:59,393 INFO L82 PathProgramCache]: Analyzing trace with hash 414632844, now seen corresponding path program 1 times [2019-11-28 18:20:59,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:20:59,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499900253] [2019-11-28 18:20:59,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:20:59,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:20:59,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:20:59,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499900253] [2019-11-28 18:20:59,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:20:59,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:20:59,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1363083440] [2019-11-28 18:20:59,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:20:59,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:20:59,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:20:59,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:20:59,459 INFO L87 Difference]: Start difference. First operand 40149 states and 154969 transitions. Second operand 4 states. [2019-11-28 18:20:59,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:20:59,541 INFO L93 Difference]: Finished difference Result 16499 states and 52871 transitions. [2019-11-28 18:20:59,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:20:59,542 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-11-28 18:20:59,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:20:59,567 INFO L225 Difference]: With dead ends: 16499 [2019-11-28 18:20:59,567 INFO L226 Difference]: Without dead ends: 16499 [2019-11-28 18:20:59,568 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:20:59,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16499 states. [2019-11-28 18:20:59,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16499 to 16499. [2019-11-28 18:20:59,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16499 states. [2019-11-28 18:20:59,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16499 states to 16499 states and 52871 transitions. [2019-11-28 18:20:59,843 INFO L78 Accepts]: Start accepts. Automaton has 16499 states and 52871 transitions. Word has length 22 [2019-11-28 18:20:59,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:20:59,844 INFO L462 AbstractCegarLoop]: Abstraction has 16499 states and 52871 transitions. [2019-11-28 18:20:59,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:20:59,844 INFO L276 IsEmpty]: Start isEmpty. Operand 16499 states and 52871 transitions. [2019-11-28 18:20:59,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-11-28 18:20:59,847 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:20:59,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:20:59,848 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:20:59,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:20:59,848 INFO L82 PathProgramCache]: Analyzing trace with hash 586766050, now seen corresponding path program 1 times [2019-11-28 18:20:59,848 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:20:59,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600867275] [2019-11-28 18:20:59,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:20:59,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:20:59,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:20:59,966 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600867275] [2019-11-28 18:20:59,967 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:20:59,967 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:20:59,967 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302649904] [2019-11-28 18:20:59,967 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:20:59,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:20:59,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:20:59,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:20:59,970 INFO L87 Difference]: Start difference. First operand 16499 states and 52871 transitions. Second operand 5 states. [2019-11-28 18:21:00,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:00,457 INFO L93 Difference]: Finished difference Result 21879 states and 68613 transitions. [2019-11-28 18:21:00,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:21:00,457 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2019-11-28 18:21:00,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:00,491 INFO L225 Difference]: With dead ends: 21879 [2019-11-28 18:21:00,491 INFO L226 Difference]: Without dead ends: 21872 [2019-11-28 18:21:00,492 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:21:00,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21872 states. [2019-11-28 18:21:00,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21872 to 16956. [2019-11-28 18:21:00,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16956 states. [2019-11-28 18:21:00,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16956 states to 16956 states and 54151 transitions. [2019-11-28 18:21:00,825 INFO L78 Accepts]: Start accepts. Automaton has 16956 states and 54151 transitions. Word has length 23 [2019-11-28 18:21:00,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:00,825 INFO L462 AbstractCegarLoop]: Abstraction has 16956 states and 54151 transitions. [2019-11-28 18:21:00,825 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:21:00,825 INFO L276 IsEmpty]: Start isEmpty. Operand 16956 states and 54151 transitions. [2019-11-28 18:21:00,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-11-28 18:21:00,838 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:00,838 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:00,839 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:00,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:00,839 INFO L82 PathProgramCache]: Analyzing trace with hash 613602003, now seen corresponding path program 1 times [2019-11-28 18:21:00,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:00,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2100910567] [2019-11-28 18:21:00,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:00,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:00,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:00,919 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2100910567] [2019-11-28 18:21:00,919 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:00,919 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:21:00,920 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366898679] [2019-11-28 18:21:00,920 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:21:00,920 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:00,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:21:00,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:21:00,921 INFO L87 Difference]: Start difference. First operand 16956 states and 54151 transitions. Second operand 5 states. [2019-11-28 18:21:00,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:00,956 INFO L93 Difference]: Finished difference Result 2891 states and 7349 transitions. [2019-11-28 18:21:00,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:21:00,956 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-11-28 18:21:00,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:00,961 INFO L225 Difference]: With dead ends: 2891 [2019-11-28 18:21:00,961 INFO L226 Difference]: Without dead ends: 2891 [2019-11-28 18:21:00,962 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:21:00,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2891 states. [2019-11-28 18:21:00,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2891 to 2891. [2019-11-28 18:21:00,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2891 states. [2019-11-28 18:21:00,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2891 states to 2891 states and 7349 transitions. [2019-11-28 18:21:00,990 INFO L78 Accepts]: Start accepts. Automaton has 2891 states and 7349 transitions. Word has length 31 [2019-11-28 18:21:00,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:00,991 INFO L462 AbstractCegarLoop]: Abstraction has 2891 states and 7349 transitions. [2019-11-28 18:21:00,991 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:21:00,991 INFO L276 IsEmpty]: Start isEmpty. Operand 2891 states and 7349 transitions. [2019-11-28 18:21:00,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-28 18:21:00,997 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:00,997 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:00,997 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:00,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:00,998 INFO L82 PathProgramCache]: Analyzing trace with hash 2131566482, now seen corresponding path program 1 times [2019-11-28 18:21:00,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:00,998 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998887016] [2019-11-28 18:21:00,998 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:01,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:01,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:01,085 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998887016] [2019-11-28 18:21:01,085 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:01,085 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:21:01,086 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476924778] [2019-11-28 18:21:01,086 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:21:01,086 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:01,087 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:21:01,087 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:21:01,087 INFO L87 Difference]: Start difference. First operand 2891 states and 7349 transitions. Second operand 6 states. [2019-11-28 18:21:01,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:01,123 INFO L93 Difference]: Finished difference Result 1241 states and 3509 transitions. [2019-11-28 18:21:01,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:21:01,124 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-11-28 18:21:01,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:01,127 INFO L225 Difference]: With dead ends: 1241 [2019-11-28 18:21:01,127 INFO L226 Difference]: Without dead ends: 1241 [2019-11-28 18:21:01,127 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:21:01,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1241 states. [2019-11-28 18:21:01,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1241 to 1129. [2019-11-28 18:21:01,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1129 states. [2019-11-28 18:21:01,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1129 states to 1129 states and 3189 transitions. [2019-11-28 18:21:01,143 INFO L78 Accepts]: Start accepts. Automaton has 1129 states and 3189 transitions. Word has length 43 [2019-11-28 18:21:01,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:01,144 INFO L462 AbstractCegarLoop]: Abstraction has 1129 states and 3189 transitions. [2019-11-28 18:21:01,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:21:01,144 INFO L276 IsEmpty]: Start isEmpty. Operand 1129 states and 3189 transitions. [2019-11-28 18:21:01,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-28 18:21:01,147 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:01,147 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:01,147 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:01,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:01,148 INFO L82 PathProgramCache]: Analyzing trace with hash -275883304, now seen corresponding path program 1 times [2019-11-28 18:21:01,148 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:01,148 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2063989519] [2019-11-28 18:21:01,148 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:01,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:01,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:01,214 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2063989519] [2019-11-28 18:21:01,214 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:01,214 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:21:01,214 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422290353] [2019-11-28 18:21:01,215 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:21:01,217 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:01,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:21:01,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:01,217 INFO L87 Difference]: Start difference. First operand 1129 states and 3189 transitions. Second operand 3 states. [2019-11-28 18:21:01,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:01,269 INFO L93 Difference]: Finished difference Result 1141 states and 3206 transitions. [2019-11-28 18:21:01,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:21:01,270 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-11-28 18:21:01,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:01,272 INFO L225 Difference]: With dead ends: 1141 [2019-11-28 18:21:01,272 INFO L226 Difference]: Without dead ends: 1141 [2019-11-28 18:21:01,272 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:01,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1141 states. [2019-11-28 18:21:01,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1141 to 1135. [2019-11-28 18:21:01,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1135 states. [2019-11-28 18:21:01,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1135 states to 1135 states and 3199 transitions. [2019-11-28 18:21:01,284 INFO L78 Accepts]: Start accepts. Automaton has 1135 states and 3199 transitions. Word has length 58 [2019-11-28 18:21:01,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:01,285 INFO L462 AbstractCegarLoop]: Abstraction has 1135 states and 3199 transitions. [2019-11-28 18:21:01,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:21:01,285 INFO L276 IsEmpty]: Start isEmpty. Operand 1135 states and 3199 transitions. [2019-11-28 18:21:01,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-28 18:21:01,287 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:01,287 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:01,287 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:01,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:01,288 INFO L82 PathProgramCache]: Analyzing trace with hash -791070951, now seen corresponding path program 1 times [2019-11-28 18:21:01,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:01,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676264730] [2019-11-28 18:21:01,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:01,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:01,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:01,376 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676264730] [2019-11-28 18:21:01,376 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:01,376 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:21:01,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2646622] [2019-11-28 18:21:01,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:21:01,377 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:01,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:21:01,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:21:01,378 INFO L87 Difference]: Start difference. First operand 1135 states and 3199 transitions. Second operand 5 states. [2019-11-28 18:21:01,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:01,599 INFO L93 Difference]: Finished difference Result 1644 states and 4637 transitions. [2019-11-28 18:21:01,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:21:01,600 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-11-28 18:21:01,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:01,603 INFO L225 Difference]: With dead ends: 1644 [2019-11-28 18:21:01,604 INFO L226 Difference]: Without dead ends: 1644 [2019-11-28 18:21:01,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:21:01,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1644 states. [2019-11-28 18:21:01,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1644 to 1448. [2019-11-28 18:21:01,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1448 states. [2019-11-28 18:21:01,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1448 states to 1448 states and 4085 transitions. [2019-11-28 18:21:01,620 INFO L78 Accepts]: Start accepts. Automaton has 1448 states and 4085 transitions. Word has length 58 [2019-11-28 18:21:01,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:01,621 INFO L462 AbstractCegarLoop]: Abstraction has 1448 states and 4085 transitions. [2019-11-28 18:21:01,621 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:21:01,621 INFO L276 IsEmpty]: Start isEmpty. Operand 1448 states and 4085 transitions. [2019-11-28 18:21:01,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-28 18:21:01,623 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:01,623 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:01,623 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:01,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:01,624 INFO L82 PathProgramCache]: Analyzing trace with hash 867176459, now seen corresponding path program 2 times [2019-11-28 18:21:01,624 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:01,624 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563006684] [2019-11-28 18:21:01,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:01,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:01,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:01,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563006684] [2019-11-28 18:21:01,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:01,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:21:01,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168714895] [2019-11-28 18:21:01,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:21:01,736 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:01,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:21:01,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:21:01,737 INFO L87 Difference]: Start difference. First operand 1448 states and 4085 transitions. Second operand 6 states. [2019-11-28 18:21:02,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:02,015 INFO L93 Difference]: Finished difference Result 1722 states and 4730 transitions. [2019-11-28 18:21:02,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:21:02,016 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-11-28 18:21:02,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:02,019 INFO L225 Difference]: With dead ends: 1722 [2019-11-28 18:21:02,019 INFO L226 Difference]: Without dead ends: 1722 [2019-11-28 18:21:02,020 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:21:02,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1722 states. [2019-11-28 18:21:02,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1722 to 1500. [2019-11-28 18:21:02,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1500 states. [2019-11-28 18:21:02,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1500 states to 1500 states and 4161 transitions. [2019-11-28 18:21:02,037 INFO L78 Accepts]: Start accepts. Automaton has 1500 states and 4161 transitions. Word has length 58 [2019-11-28 18:21:02,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:02,037 INFO L462 AbstractCegarLoop]: Abstraction has 1500 states and 4161 transitions. [2019-11-28 18:21:02,037 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:21:02,037 INFO L276 IsEmpty]: Start isEmpty. Operand 1500 states and 4161 transitions. [2019-11-28 18:21:02,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-28 18:21:02,040 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:02,040 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:02,040 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:02,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:02,041 INFO L82 PathProgramCache]: Analyzing trace with hash -2105802411, now seen corresponding path program 3 times [2019-11-28 18:21:02,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:02,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171395041] [2019-11-28 18:21:02,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:02,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:02,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:02,162 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171395041] [2019-11-28 18:21:02,162 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:02,162 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:21:02,163 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1022890565] [2019-11-28 18:21:02,163 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:21:02,163 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:02,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:21:02,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:21:02,164 INFO L87 Difference]: Start difference. First operand 1500 states and 4161 transitions. Second operand 6 states. [2019-11-28 18:21:02,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:02,432 INFO L93 Difference]: Finished difference Result 1982 states and 5473 transitions. [2019-11-28 18:21:02,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:21:02,433 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-11-28 18:21:02,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:02,438 INFO L225 Difference]: With dead ends: 1982 [2019-11-28 18:21:02,438 INFO L226 Difference]: Without dead ends: 1982 [2019-11-28 18:21:02,439 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:21:02,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1982 states. [2019-11-28 18:21:02,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1982 to 1528. [2019-11-28 18:21:02,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1528 states. [2019-11-28 18:21:02,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1528 states to 1528 states and 4241 transitions. [2019-11-28 18:21:02,475 INFO L78 Accepts]: Start accepts. Automaton has 1528 states and 4241 transitions. Word has length 58 [2019-11-28 18:21:02,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:02,475 INFO L462 AbstractCegarLoop]: Abstraction has 1528 states and 4241 transitions. [2019-11-28 18:21:02,476 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:21:02,476 INFO L276 IsEmpty]: Start isEmpty. Operand 1528 states and 4241 transitions. [2019-11-28 18:21:02,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-28 18:21:02,479 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:02,480 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:02,480 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:02,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:02,481 INFO L82 PathProgramCache]: Analyzing trace with hash -645544041, now seen corresponding path program 4 times [2019-11-28 18:21:02,481 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:02,481 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047785318] [2019-11-28 18:21:02,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:02,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:02,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:02,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047785318] [2019-11-28 18:21:02,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:02,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:21:02,555 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735092744] [2019-11-28 18:21:02,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:21:02,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:02,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:21:02,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:02,556 INFO L87 Difference]: Start difference. First operand 1528 states and 4241 transitions. Second operand 3 states. [2019-11-28 18:21:02,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:02,576 INFO L93 Difference]: Finished difference Result 1444 states and 3973 transitions. [2019-11-28 18:21:02,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:21:02,576 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-11-28 18:21:02,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:02,580 INFO L225 Difference]: With dead ends: 1444 [2019-11-28 18:21:02,580 INFO L226 Difference]: Without dead ends: 1444 [2019-11-28 18:21:02,581 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:02,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1444 states. [2019-11-28 18:21:02,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1444 to 1444. [2019-11-28 18:21:02,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1444 states. [2019-11-28 18:21:02,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 3973 transitions. [2019-11-28 18:21:02,608 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 3973 transitions. Word has length 58 [2019-11-28 18:21:02,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:02,608 INFO L462 AbstractCegarLoop]: Abstraction has 1444 states and 3973 transitions. [2019-11-28 18:21:02,608 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:21:02,608 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 3973 transitions. [2019-11-28 18:21:02,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-11-28 18:21:02,611 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:02,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:02,612 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:02,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:02,612 INFO L82 PathProgramCache]: Analyzing trace with hash -515953626, now seen corresponding path program 1 times [2019-11-28 18:21:02,613 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:02,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604001131] [2019-11-28 18:21:02,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:02,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:02,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:02,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604001131] [2019-11-28 18:21:02,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:02,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:21:02,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449339307] [2019-11-28 18:21:02,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:21:02,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:02,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:21:02,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:02,735 INFO L87 Difference]: Start difference. First operand 1444 states and 3973 transitions. Second operand 3 states. [2019-11-28 18:21:02,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:02,777 INFO L93 Difference]: Finished difference Result 1443 states and 3971 transitions. [2019-11-28 18:21:02,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:21:02,777 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-11-28 18:21:02,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:02,780 INFO L225 Difference]: With dead ends: 1443 [2019-11-28 18:21:02,780 INFO L226 Difference]: Without dead ends: 1443 [2019-11-28 18:21:02,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:02,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1443 states. [2019-11-28 18:21:02,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1443 to 1162. [2019-11-28 18:21:02,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1162 states. [2019-11-28 18:21:02,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1162 states to 1162 states and 3197 transitions. [2019-11-28 18:21:02,803 INFO L78 Accepts]: Start accepts. Automaton has 1162 states and 3197 transitions. Word has length 59 [2019-11-28 18:21:02,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:02,803 INFO L462 AbstractCegarLoop]: Abstraction has 1162 states and 3197 transitions. [2019-11-28 18:21:02,803 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:21:02,803 INFO L276 IsEmpty]: Start isEmpty. Operand 1162 states and 3197 transitions. [2019-11-28 18:21:02,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-28 18:21:02,806 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:02,806 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:02,806 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:02,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:02,807 INFO L82 PathProgramCache]: Analyzing trace with hash 1664209591, now seen corresponding path program 1 times [2019-11-28 18:21:02,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:02,807 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216145982] [2019-11-28 18:21:02,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:02,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:02,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:02,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216145982] [2019-11-28 18:21:02,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:02,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:21:02,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613742017] [2019-11-28 18:21:02,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:21:02,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:02,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:21:02,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:21:02,966 INFO L87 Difference]: Start difference. First operand 1162 states and 3197 transitions. Second operand 6 states. [2019-11-28 18:21:03,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:03,043 INFO L93 Difference]: Finished difference Result 2305 states and 5874 transitions. [2019-11-28 18:21:03,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:21:03,044 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-28 18:21:03,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:03,046 INFO L225 Difference]: With dead ends: 2305 [2019-11-28 18:21:03,046 INFO L226 Difference]: Without dead ends: 940 [2019-11-28 18:21:03,047 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:21:03,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 940 states. [2019-11-28 18:21:03,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 940 to 650. [2019-11-28 18:21:03,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 650 states. [2019-11-28 18:21:03,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 650 states to 650 states and 1453 transitions. [2019-11-28 18:21:03,063 INFO L78 Accepts]: Start accepts. Automaton has 650 states and 1453 transitions. Word has length 60 [2019-11-28 18:21:03,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:03,063 INFO L462 AbstractCegarLoop]: Abstraction has 650 states and 1453 transitions. [2019-11-28 18:21:03,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:21:03,063 INFO L276 IsEmpty]: Start isEmpty. Operand 650 states and 1453 transitions. [2019-11-28 18:21:03,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-28 18:21:03,065 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:03,065 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:03,065 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:03,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:03,066 INFO L82 PathProgramCache]: Analyzing trace with hash 2055807341, now seen corresponding path program 2 times [2019-11-28 18:21:03,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:03,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690236401] [2019-11-28 18:21:03,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:03,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:04,535 WARN L192 SmtUtils]: Spent 1.26 s on a formula simplification. DAG size of input: 12 DAG size of output: 7 [2019-11-28 18:21:04,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:04,625 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [690236401] [2019-11-28 18:21:04,626 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:04,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:21:04,627 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1325942662] [2019-11-28 18:21:04,627 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:21:04,627 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:04,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:21:04,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:21:04,628 INFO L87 Difference]: Start difference. First operand 650 states and 1453 transitions. Second operand 12 states. [2019-11-28 18:21:05,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:05,275 INFO L93 Difference]: Finished difference Result 1397 states and 2842 transitions. [2019-11-28 18:21:05,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-28 18:21:05,275 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2019-11-28 18:21:05,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:05,277 INFO L225 Difference]: With dead ends: 1397 [2019-11-28 18:21:05,277 INFO L226 Difference]: Without dead ends: 806 [2019-11-28 18:21:05,278 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=145, Invalid=407, Unknown=0, NotChecked=0, Total=552 [2019-11-28 18:21:05,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 806 states. [2019-11-28 18:21:05,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 806 to 573. [2019-11-28 18:21:05,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 573 states. [2019-11-28 18:21:05,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 573 states to 573 states and 1232 transitions. [2019-11-28 18:21:05,285 INFO L78 Accepts]: Start accepts. Automaton has 573 states and 1232 transitions. Word has length 60 [2019-11-28 18:21:05,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:05,286 INFO L462 AbstractCegarLoop]: Abstraction has 573 states and 1232 transitions. [2019-11-28 18:21:05,286 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:21:05,286 INFO L276 IsEmpty]: Start isEmpty. Operand 573 states and 1232 transitions. [2019-11-28 18:21:05,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-28 18:21:05,287 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:05,287 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:05,287 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:05,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:05,287 INFO L82 PathProgramCache]: Analyzing trace with hash -837634653, now seen corresponding path program 3 times [2019-11-28 18:21:05,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:05,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [278863588] [2019-11-28 18:21:05,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:05,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:05,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:05,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [278863588] [2019-11-28 18:21:05,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:05,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:21:05,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1525282202] [2019-11-28 18:21:05,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:21:05,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:05,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:21:05,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:21:05,385 INFO L87 Difference]: Start difference. First operand 573 states and 1232 transitions. Second operand 5 states. [2019-11-28 18:21:05,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:05,426 INFO L93 Difference]: Finished difference Result 755 states and 1551 transitions. [2019-11-28 18:21:05,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:21:05,427 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 60 [2019-11-28 18:21:05,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:05,428 INFO L225 Difference]: With dead ends: 755 [2019-11-28 18:21:05,428 INFO L226 Difference]: Without dead ends: 213 [2019-11-28 18:21:05,428 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:21:05,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2019-11-28 18:21:05,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213. [2019-11-28 18:21:05,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2019-11-28 18:21:05,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 368 transitions. [2019-11-28 18:21:05,431 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 368 transitions. Word has length 60 [2019-11-28 18:21:05,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:05,432 INFO L462 AbstractCegarLoop]: Abstraction has 213 states and 368 transitions. [2019-11-28 18:21:05,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:21:05,432 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 368 transitions. [2019-11-28 18:21:05,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-28 18:21:05,433 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:05,433 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:05,433 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:05,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:05,434 INFO L82 PathProgramCache]: Analyzing trace with hash -524819563, now seen corresponding path program 4 times [2019-11-28 18:21:05,434 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:05,434 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753601911] [2019-11-28 18:21:05,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:05,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:21:05,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:21:05,551 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:21:05,552 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:21:05,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] ULTIMATE.startENTRY-->L821: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= (select .cse0 |v_ULTIMATE.start_main_~#t1537~0.base_24|) 0) (= v_~weak$$choice2~0_146 0) (= v_~z$w_buff0_used~0_885 0) (= v_~z$mem_tmp~0_22 0) (= v_~z$r_buff1_thd0~0_298 0) (= 0 v_~z$r_buff1_thd2~0_83) (= 0 v_~z$r_buff1_thd4~0_140) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1537~0.base_24| 4) |v_#length_29|) (= 0 v_~z$r_buff1_thd1~0_83) (= 0 v_~z$flush_delayed~0_36) (= v_~z$r_buff0_thd3~0_92 0) (= v_~z$read_delayed_var~0.offset_7 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p3_EAX~0_100 0) (= v_~z$w_buff0~0_503 0) (= 0 |v_ULTIMATE.start_main_~#t1537~0.offset_18|) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1537~0.base_24| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1537~0.base_24|) |v_ULTIMATE.start_main_~#t1537~0.offset_18| 0)) |v_#memory_int_25|) (= v_~z$w_buff1_used~0_515 0) (= v_~a~0_48 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1537~0.base_24|) (= v_~x~0_57 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z~0_155 0) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= v_~__unbuffered_cnt~0_141 0) (= 0 v_~z$r_buff1_thd3~0_146) (= v_~z$w_buff1~0_306 0) (= v_~z$r_buff0_thd0~0_394 0) (= |v_#NULL.offset_5| 0) (= v_~z$r_buff0_thd2~0_32 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd4~0_161) (= v_~y~0_76 0) (= v_~z$r_buff0_thd1~0_32 0) (= 0 |v_#NULL.base_5|) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t1537~0.base_24| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_59|, ULTIMATE.start_main_~#t1537~0.offset=|v_ULTIMATE.start_main_~#t1537~0.offset_18|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_83, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_41|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_32|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_35|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_30|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_45|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|, ~a~0=v_~a~0_48, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_394, ULTIMATE.start_main_~#t1538~0.base=|v_ULTIMATE.start_main_~#t1538~0.base_22|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_161, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_100, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_22, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_48|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_114|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_515, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_191|, ~z$flush_delayed~0=v_~z$flush_delayed~0_36, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_35|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_44|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_38|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_92, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_141, ~x~0=v_~x~0_57, ULTIMATE.start_main_~#t1537~0.base=|v_ULTIMATE.start_main_~#t1537~0.base_24|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_140, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_40|, ULTIMATE.start_main_~#t1540~0.offset=|v_ULTIMATE.start_main_~#t1540~0.offset_17|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~z$w_buff1~0=v_~z$w_buff1~0_306, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_29|, ULTIMATE.start_main_~#t1539~0.base=|v_ULTIMATE.start_main_~#t1539~0.base_20|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_51|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_44|, ULTIMATE.start_main_~#t1538~0.offset=|v_ULTIMATE.start_main_~#t1538~0.offset_17|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_298, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_25|, ~y~0=v_~y~0_76, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_32, ULTIMATE.start_main_~#t1539~0.offset=|v_ULTIMATE.start_main_~#t1539~0.offset_16|, ULTIMATE.start_main_~#t1540~0.base=|v_ULTIMATE.start_main_~#t1540~0.base_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_885, ~z$w_buff0~0=v_~z$w_buff0~0_503, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_39|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_25|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_146, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_122|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_44|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_36|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_35|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_31|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_9|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_23|, ~z~0=v_~z~0_155, ~weak$$choice2~0=v_~weak$$choice2~0_146, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1537~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t1538~0.base, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1537~0.base, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1540~0.offset, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1539~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1538~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1539~0.offset, ULTIMATE.start_main_~#t1540~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:21:05,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L821-1-->L823: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1538~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1538~0.base_10|) |v_ULTIMATE.start_main_~#t1538~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1538~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t1538~0.offset_9|) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1538~0.base_10|)) (not (= 0 |v_ULTIMATE.start_main_~#t1538~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1538~0.base_10|) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1538~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1538~0.base=|v_ULTIMATE.start_main_~#t1538~0.base_10|, ULTIMATE.start_main_~#t1538~0.offset=|v_ULTIMATE.start_main_~#t1538~0.offset_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1538~0.base, ULTIMATE.start_main_~#t1538~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:21:05,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L823-1-->L825: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1539~0.base_12|) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1539~0.base_12| 4) |v_#length_21|) (= |v_ULTIMATE.start_main_~#t1539~0.offset_10| 0) (= (select |v_#valid_46| |v_ULTIMATE.start_main_~#t1539~0.base_12|) 0) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1539~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1539~0.base_12|) |v_ULTIMATE.start_main_~#t1539~0.offset_10| 2))) (not (= |v_ULTIMATE.start_main_~#t1539~0.base_12| 0)) (= (store |v_#valid_46| |v_ULTIMATE.start_main_~#t1539~0.base_12| 1) |v_#valid_45|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1539~0.offset=|v_ULTIMATE.start_main_~#t1539~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1539~0.base=|v_ULTIMATE.start_main_~#t1539~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1539~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1539~0.base] because there is no mapped edge [2019-11-28 18:21:05,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L825-1-->L827: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1540~0.base_11|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1540~0.base_11|) 0) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1540~0.base_11| 4)) (= 0 |v_ULTIMATE.start_main_~#t1540~0.offset_10|) (= (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1540~0.base_11| 1) |v_#valid_39|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1540~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1540~0.base_11|) |v_ULTIMATE.start_main_~#t1540~0.offset_10| 3)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1540~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1540~0.base=|v_ULTIMATE.start_main_~#t1540~0.base_11|, ULTIMATE.start_main_~#t1540~0.offset=|v_ULTIMATE.start_main_~#t1540~0.offset_10|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1540~0.base, ULTIMATE.start_main_~#t1540~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-11-28 18:21:05,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P3ENTRY-->L4-3: Formula: (and (not (= v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11 0)) (= v_P3Thread1of1ForFork2_~arg.base_9 |v_P3Thread1of1ForFork2_#in~arg.base_11|) (= v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11 |v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|) (= (ite (not (and (not (= (mod v_~z$w_buff0_used~0_218 256) 0)) (not (= (mod v_~z$w_buff1_used~0_99 256) 0)))) 1 0) |v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|) (= |v_P3Thread1of1ForFork2_#in~arg.offset_11| v_P3Thread1of1ForFork2_~arg.offset_9) (= v_~z$w_buff0_used~0_218 1) (= v_~z$w_buff0~0_48 v_~z$w_buff1~0_32) (= 2 v_~z$w_buff0~0_47) (= v_~z$w_buff0_used~0_219 v_~z$w_buff1_used~0_99)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_219, ~z$w_buff0~0=v_~z$w_buff0~0_48, P3Thread1of1ForFork2_#in~arg.offset=|v_P3Thread1of1ForFork2_#in~arg.offset_11|, P3Thread1of1ForFork2_#in~arg.base=|v_P3Thread1of1ForFork2_#in~arg.base_11|} OutVars{P3Thread1of1ForFork2___VERIFIER_assert_~expression=v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11, P3Thread1of1ForFork2_~arg.offset=v_P3Thread1of1ForFork2_~arg.offset_9, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_218, ~z$w_buff0~0=v_~z$w_buff0~0_47, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_99, P3Thread1of1ForFork2_#in~arg.offset=|v_P3Thread1of1ForFork2_#in~arg.offset_11|, ~z$w_buff1~0=v_~z$w_buff1~0_32, P3Thread1of1ForFork2___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|, P3Thread1of1ForFork2_~arg.base=v_P3Thread1of1ForFork2_~arg.base_9, P3Thread1of1ForFork2_#in~arg.base=|v_P3Thread1of1ForFork2_#in~arg.base_11|} AuxVars[] AssignedVars[P3Thread1of1ForFork2___VERIFIER_assert_~expression, P3Thread1of1ForFork2_~arg.offset, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, ~z$w_buff1~0, P3Thread1of1ForFork2___VERIFIER_assert_#in~expression, P3Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-11-28 18:21:05,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_44 1) (= v_~__unbuffered_cnt~0_102 (+ v_~__unbuffered_cnt~0_103 1)) (= v_P0Thread1of1ForFork3_~arg.base_17 |v_P0Thread1of1ForFork3_#in~arg.base_19|) (= v_~a~0_40 1) (= |v_P0Thread1of1ForFork3_#res.offset_9| 0) (= |v_P0Thread1of1ForFork3_#in~arg.offset_19| v_P0Thread1of1ForFork3_~arg.offset_17) (= 0 |v_P0Thread1of1ForFork3_#res.base_9|)) InVars {P0Thread1of1ForFork3_#in~arg.offset=|v_P0Thread1of1ForFork3_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_103, P0Thread1of1ForFork3_#in~arg.base=|v_P0Thread1of1ForFork3_#in~arg.base_19|} OutVars{~a~0=v_~a~0_40, P0Thread1of1ForFork3_#in~arg.offset=|v_P0Thread1of1ForFork3_#in~arg.offset_19|, P0Thread1of1ForFork3_~arg.base=v_P0Thread1of1ForFork3_~arg.base_17, P0Thread1of1ForFork3_#res.base=|v_P0Thread1of1ForFork3_#res.base_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, P0Thread1of1ForFork3_#res.offset=|v_P0Thread1of1ForFork3_#res.offset_9|, P0Thread1of1ForFork3_~arg.offset=v_P0Thread1of1ForFork3_~arg.offset_17, P0Thread1of1ForFork3_#in~arg.base=|v_P0Thread1of1ForFork3_#in~arg.base_19|, ~x~0=v_~x~0_44} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork3_~arg.base, P0Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork3_#res.offset, P0Thread1of1ForFork3_~arg.offset, ~x~0] because there is no mapped edge [2019-11-28 18:21:05,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] P1ENTRY-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x~0_39 2) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_~y~0_50 1) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= |v_P1Thread1of1ForFork0_#in~arg.base_10| v_P1Thread1of1ForFork0_~arg.base_8) (= |v_P1Thread1of1ForFork0_#in~arg.offset_10| v_P1Thread1of1ForFork0_~arg.offset_8)) InVars {P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_10|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_8, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_8, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_10|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, ~y~0=v_~y~0_50, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, ~y~0, P1Thread1of1ForFork0_#res.base, ~x~0] because there is no mapped edge [2019-11-28 18:21:05,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L768-2-->L768-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1086043063 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-1086043063 256) 0)) (.cse1 (= |P2Thread1of1ForFork1_#t~ite3_Out-1086043063| |P2Thread1of1ForFork1_#t~ite4_Out-1086043063|))) (or (and (not .cse0) .cse1 (= |P2Thread1of1ForFork1_#t~ite3_Out-1086043063| ~z$w_buff1~0_In-1086043063) (not .cse2)) (and (or .cse0 .cse2) .cse1 (= |P2Thread1of1ForFork1_#t~ite3_Out-1086043063| ~z~0_In-1086043063)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1086043063, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1086043063, ~z$w_buff1~0=~z$w_buff1~0_In-1086043063, ~z~0=~z~0_In-1086043063} OutVars{P2Thread1of1ForFork1_#t~ite4=|P2Thread1of1ForFork1_#t~ite4_Out-1086043063|, P2Thread1of1ForFork1_#t~ite3=|P2Thread1of1ForFork1_#t~ite3_Out-1086043063|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1086043063, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1086043063, ~z$w_buff1~0=~z$w_buff1~0_In-1086043063, ~z~0=~z~0_In-1086043063} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite4, P2Thread1of1ForFork1_#t~ite3] because there is no mapped edge [2019-11-28 18:21:05,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In272008913 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In272008913 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite5_Out272008913| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite5_Out272008913| ~z$w_buff0_used~0_In272008913)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In272008913, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In272008913} OutVars{P2Thread1of1ForFork1_#t~ite5=|P2Thread1of1ForFork1_#t~ite5_Out272008913|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In272008913, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In272008913} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-11-28 18:21:05,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L770-->L770-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In-1367264973 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1367264973 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In-1367264973 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1367264973 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite6_Out-1367264973|)) (and (= ~z$w_buff1_used~0_In-1367264973 |P2Thread1of1ForFork1_#t~ite6_Out-1367264973|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1367264973, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1367264973, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1367264973, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1367264973} OutVars{P2Thread1of1ForFork1_#t~ite6=|P2Thread1of1ForFork1_#t~ite6_Out-1367264973|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1367264973, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1367264973, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1367264973, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1367264973} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-11-28 18:21:05,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1787560603 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1787560603 256) 0))) (or (and (= ~z$r_buff0_thd3~0_In-1787560603 |P2Thread1of1ForFork1_#t~ite7_Out-1787560603|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite7_Out-1787560603|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1787560603, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1787560603} OutVars{P2Thread1of1ForFork1_#t~ite7=|P2Thread1of1ForFork1_#t~ite7_Out-1787560603|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1787560603, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1787560603} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-11-28 18:21:05,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L772-->L772-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In599766191 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In599766191 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In599766191 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In599766191 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite8_Out599766191| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite8_Out599766191| ~z$r_buff1_thd3~0_In599766191) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In599766191, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In599766191, ~z$w_buff1_used~0=~z$w_buff1_used~0_In599766191, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In599766191} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In599766191, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In599766191, ~z$w_buff1_used~0=~z$w_buff1_used~0_In599766191, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In599766191, P2Thread1of1ForFork1_#t~ite8=|P2Thread1of1ForFork1_#t~ite8_Out599766191|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-11-28 18:21:05,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L772-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork1_#t~ite8_44|) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101, P2Thread1of1ForFork1_#t~ite8=|v_P2Thread1of1ForFork1_#t~ite8_44|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|, P2Thread1of1ForFork1_#t~ite8=|v_P2Thread1of1ForFork1_#t~ite8_43|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset, P2Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-11-28 18:21:05,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-914453969 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-914453969 256) 0))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork2_#t~ite11_Out-914453969| 0)) (and (= |P3Thread1of1ForFork2_#t~ite11_Out-914453969| ~z$w_buff0_used~0_In-914453969) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-914453969, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-914453969} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-914453969, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-914453969, P3Thread1of1ForFork2_#t~ite11=|P3Thread1of1ForFork2_#t~ite11_Out-914453969|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-11-28 18:21:05,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L800-->L800-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In-1911347801 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1911347801 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-1911347801 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1911347801 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork2_#t~ite12_Out-1911347801|)) (and (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1911347801 |P3Thread1of1ForFork2_#t~ite12_Out-1911347801|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1911347801, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1911347801, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1911347801, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1911347801} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1911347801, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1911347801, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1911347801, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1911347801, P3Thread1of1ForFork2_#t~ite12=|P3Thread1of1ForFork2_#t~ite12_Out-1911347801|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-11-28 18:21:05,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L801-->L802: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In660921249 256))) (.cse0 (= ~z$r_buff0_thd4~0_In660921249 ~z$r_buff0_thd4~0_Out660921249)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In660921249 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd4~0_Out660921249) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In660921249, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In660921249} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In660921249, P3Thread1of1ForFork2_#t~ite13=|P3Thread1of1ForFork2_#t~ite13_Out660921249|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out660921249} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite13, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-11-28 18:21:05,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L802-->L802-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1962174143 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In1962174143 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1962174143 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd4~0_In1962174143 256) 0))) (or (and (= |P3Thread1of1ForFork2_#t~ite14_Out1962174143| ~z$r_buff1_thd4~0_In1962174143) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P3Thread1of1ForFork2_#t~ite14_Out1962174143|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1962174143, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1962174143, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1962174143, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1962174143} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1962174143, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1962174143, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1962174143, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1962174143, P3Thread1of1ForFork2_#t~ite14=|P3Thread1of1ForFork2_#t~ite14_Out1962174143|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-11-28 18:21:05,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L802-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork2_#t~ite14_54| v_~z$r_buff1_thd4~0_130) (= 0 |v_P3Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_126 (+ v_~__unbuffered_cnt~0_127 1)) (= 0 |v_P3Thread1of1ForFork2_#res.offset_3|)) InVars {P3Thread1of1ForFork2_#t~ite14=|v_P3Thread1of1ForFork2_#t~ite14_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127} OutVars{P3Thread1of1ForFork2_#res.base=|v_P3Thread1of1ForFork2_#res.base_3|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_130, P3Thread1of1ForFork2_#t~ite14=|v_P3Thread1of1ForFork2_#t~ite14_53|, P3Thread1of1ForFork2_#res.offset=|v_P3Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#res.base, ~z$r_buff1_thd4~0, P3Thread1of1ForFork2_#t~ite14, P3Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:21:05,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L827-1-->L833: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 4 v_~__unbuffered_cnt~0_21) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_6|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-11-28 18:21:05,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L833-2-->L833-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In615738452 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In615738452 256) 0))) (or (and (= ~z$w_buff1~0_In615738452 |ULTIMATE.start_main_#t~ite19_Out615738452|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z~0_In615738452 |ULTIMATE.start_main_#t~ite19_Out615738452|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In615738452, ~z$w_buff1_used~0=~z$w_buff1_used~0_In615738452, ~z$w_buff1~0=~z$w_buff1~0_In615738452, ~z~0=~z~0_In615738452} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out615738452|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In615738452, ~z$w_buff1_used~0=~z$w_buff1_used~0_In615738452, ~z$w_buff1~0=~z$w_buff1~0_In615738452, ~z~0=~z~0_In615738452} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:21:05,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L833-4-->L834: Formula: (= v_~z~0_31 |v_ULTIMATE.start_main_#t~ite19_8|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_7|, ~z~0=v_~z~0_31, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:21:05,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L834-->L834-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1926581726 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1926581726 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out-1926581726|)) (and (= ~z$w_buff0_used~0_In-1926581726 |ULTIMATE.start_main_#t~ite21_Out-1926581726|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1926581726, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1926581726} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1926581726, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1926581726, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1926581726|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:21:05,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L835-->L835-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1039402459 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1039402459 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1039402459 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In1039402459 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out1039402459| ~z$w_buff1_used~0_In1039402459) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out1039402459| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1039402459, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1039402459, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1039402459, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1039402459} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1039402459, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1039402459, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1039402459, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1039402459, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1039402459|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:21:05,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1736181290 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1736181290 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out-1736181290|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-1736181290 |ULTIMATE.start_main_#t~ite23_Out-1736181290|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1736181290, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1736181290} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1736181290, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1736181290, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1736181290|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:21:05,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L837-->L837-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In2043832347 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In2043832347 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In2043832347 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2043832347 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out2043832347| ~z$r_buff1_thd0~0_In2043832347) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite24_Out2043832347| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2043832347, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2043832347, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2043832347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2043832347} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2043832347, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2043832347, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2043832347, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out2043832347|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2043832347} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-11-28 18:21:05,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L849-->L850: Formula: (and (= v_~z$r_buff0_thd0~0_119 v_~z$r_buff0_thd0~0_120) (not (= 0 (mod v_~weak$$choice2~0_29 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_120, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_119, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_9|, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:21:05,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L850-->L850-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1545683169 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out1545683169| ~z$r_buff1_thd0~0_In1545683169) (= |ULTIMATE.start_main_#t~ite45_In1545683169| |ULTIMATE.start_main_#t~ite45_Out1545683169|) (not .cse0)) (and .cse0 (= |ULTIMATE.start_main_#t~ite45_Out1545683169| |ULTIMATE.start_main_#t~ite46_Out1545683169|) (= |ULTIMATE.start_main_#t~ite45_Out1545683169| ~z$r_buff1_thd0~0_In1545683169) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1545683169 256) 0))) (or (and (= (mod ~z$r_buff1_thd0~0_In1545683169 256) 0) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1545683169 256))) (= (mod ~z$w_buff0_used~0_In1545683169 256) 0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1545683169, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1545683169, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1545683169, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1545683169, ~weak$$choice2~0=~weak$$choice2~0_In1545683169, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In1545683169|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1545683169, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1545683169, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1545683169, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1545683169, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1545683169|, ~weak$$choice2~0=~weak$$choice2~0_In1545683169, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1545683169|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-11-28 18:21:05,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L852-->L855-1: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_120) (= 0 v_~z$flush_delayed~0_24) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (not (= 0 (mod v_~z$flush_delayed~0_25 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z$flush_delayed~0=v_~z$flush_delayed~0_25} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ~z~0=v_~z~0_120, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:21:05,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L855-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:21:05,684 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:21:05 BasicIcfg [2019-11-28 18:21:05,685 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:21:05,685 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:21:05,686 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:21:05,686 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:21:05,687 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:20:38" (3/4) ... [2019-11-28 18:21:05,690 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:21:05,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] ULTIMATE.startENTRY-->L821: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= (select .cse0 |v_ULTIMATE.start_main_~#t1537~0.base_24|) 0) (= v_~weak$$choice2~0_146 0) (= v_~z$w_buff0_used~0_885 0) (= v_~z$mem_tmp~0_22 0) (= v_~z$r_buff1_thd0~0_298 0) (= 0 v_~z$r_buff1_thd2~0_83) (= 0 v_~z$r_buff1_thd4~0_140) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1537~0.base_24| 4) |v_#length_29|) (= 0 v_~z$r_buff1_thd1~0_83) (= 0 v_~z$flush_delayed~0_36) (= v_~z$r_buff0_thd3~0_92 0) (= v_~z$read_delayed_var~0.offset_7 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p3_EAX~0_100 0) (= v_~z$w_buff0~0_503 0) (= 0 |v_ULTIMATE.start_main_~#t1537~0.offset_18|) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1537~0.base_24| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1537~0.base_24|) |v_ULTIMATE.start_main_~#t1537~0.offset_18| 0)) |v_#memory_int_25|) (= v_~z$w_buff1_used~0_515 0) (= v_~a~0_48 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1537~0.base_24|) (= v_~x~0_57 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z~0_155 0) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= v_~__unbuffered_cnt~0_141 0) (= 0 v_~z$r_buff1_thd3~0_146) (= v_~z$w_buff1~0_306 0) (= v_~z$r_buff0_thd0~0_394 0) (= |v_#NULL.offset_5| 0) (= v_~z$r_buff0_thd2~0_32 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd4~0_161) (= v_~y~0_76 0) (= v_~z$r_buff0_thd1~0_32 0) (= 0 |v_#NULL.base_5|) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t1537~0.base_24| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_59|, ULTIMATE.start_main_~#t1537~0.offset=|v_ULTIMATE.start_main_~#t1537~0.offset_18|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_83, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_41|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_32|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_35|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_30|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_45|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|, ~a~0=v_~a~0_48, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_394, ULTIMATE.start_main_~#t1538~0.base=|v_ULTIMATE.start_main_~#t1538~0.base_22|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_161, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_100, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_22, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_48|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_114|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_515, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_191|, ~z$flush_delayed~0=v_~z$flush_delayed~0_36, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_35|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_44|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_38|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_92, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_141, ~x~0=v_~x~0_57, ULTIMATE.start_main_~#t1537~0.base=|v_ULTIMATE.start_main_~#t1537~0.base_24|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_140, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_40|, ULTIMATE.start_main_~#t1540~0.offset=|v_ULTIMATE.start_main_~#t1540~0.offset_17|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~z$w_buff1~0=v_~z$w_buff1~0_306, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_29|, ULTIMATE.start_main_~#t1539~0.base=|v_ULTIMATE.start_main_~#t1539~0.base_20|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_51|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_44|, ULTIMATE.start_main_~#t1538~0.offset=|v_ULTIMATE.start_main_~#t1538~0.offset_17|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_298, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_25|, ~y~0=v_~y~0_76, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_32, ULTIMATE.start_main_~#t1539~0.offset=|v_ULTIMATE.start_main_~#t1539~0.offset_16|, ULTIMATE.start_main_~#t1540~0.base=|v_ULTIMATE.start_main_~#t1540~0.base_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_885, ~z$w_buff0~0=v_~z$w_buff0~0_503, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_39|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_25|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_146, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_122|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_44|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_36|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_35|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_31|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_9|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_23|, ~z~0=v_~z~0_155, ~weak$$choice2~0=v_~weak$$choice2~0_146, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1537~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t1538~0.base, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1537~0.base, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1540~0.offset, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1539~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1538~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1539~0.offset, ULTIMATE.start_main_~#t1540~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:21:05,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L821-1-->L823: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1538~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1538~0.base_10|) |v_ULTIMATE.start_main_~#t1538~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1538~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t1538~0.offset_9|) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1538~0.base_10|)) (not (= 0 |v_ULTIMATE.start_main_~#t1538~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1538~0.base_10|) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1538~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1538~0.base=|v_ULTIMATE.start_main_~#t1538~0.base_10|, ULTIMATE.start_main_~#t1538~0.offset=|v_ULTIMATE.start_main_~#t1538~0.offset_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1538~0.base, ULTIMATE.start_main_~#t1538~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:21:05,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L823-1-->L825: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1539~0.base_12|) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1539~0.base_12| 4) |v_#length_21|) (= |v_ULTIMATE.start_main_~#t1539~0.offset_10| 0) (= (select |v_#valid_46| |v_ULTIMATE.start_main_~#t1539~0.base_12|) 0) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1539~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1539~0.base_12|) |v_ULTIMATE.start_main_~#t1539~0.offset_10| 2))) (not (= |v_ULTIMATE.start_main_~#t1539~0.base_12| 0)) (= (store |v_#valid_46| |v_ULTIMATE.start_main_~#t1539~0.base_12| 1) |v_#valid_45|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1539~0.offset=|v_ULTIMATE.start_main_~#t1539~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1539~0.base=|v_ULTIMATE.start_main_~#t1539~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1539~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1539~0.base] because there is no mapped edge [2019-11-28 18:21:05,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L825-1-->L827: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1540~0.base_11|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1540~0.base_11|) 0) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1540~0.base_11| 4)) (= 0 |v_ULTIMATE.start_main_~#t1540~0.offset_10|) (= (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1540~0.base_11| 1) |v_#valid_39|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1540~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1540~0.base_11|) |v_ULTIMATE.start_main_~#t1540~0.offset_10| 3)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1540~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1540~0.base=|v_ULTIMATE.start_main_~#t1540~0.base_11|, ULTIMATE.start_main_~#t1540~0.offset=|v_ULTIMATE.start_main_~#t1540~0.offset_10|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1540~0.base, ULTIMATE.start_main_~#t1540~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-11-28 18:21:05,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P3ENTRY-->L4-3: Formula: (and (not (= v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11 0)) (= v_P3Thread1of1ForFork2_~arg.base_9 |v_P3Thread1of1ForFork2_#in~arg.base_11|) (= v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11 |v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|) (= (ite (not (and (not (= (mod v_~z$w_buff0_used~0_218 256) 0)) (not (= (mod v_~z$w_buff1_used~0_99 256) 0)))) 1 0) |v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|) (= |v_P3Thread1of1ForFork2_#in~arg.offset_11| v_P3Thread1of1ForFork2_~arg.offset_9) (= v_~z$w_buff0_used~0_218 1) (= v_~z$w_buff0~0_48 v_~z$w_buff1~0_32) (= 2 v_~z$w_buff0~0_47) (= v_~z$w_buff0_used~0_219 v_~z$w_buff1_used~0_99)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_219, ~z$w_buff0~0=v_~z$w_buff0~0_48, P3Thread1of1ForFork2_#in~arg.offset=|v_P3Thread1of1ForFork2_#in~arg.offset_11|, P3Thread1of1ForFork2_#in~arg.base=|v_P3Thread1of1ForFork2_#in~arg.base_11|} OutVars{P3Thread1of1ForFork2___VERIFIER_assert_~expression=v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11, P3Thread1of1ForFork2_~arg.offset=v_P3Thread1of1ForFork2_~arg.offset_9, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_218, ~z$w_buff0~0=v_~z$w_buff0~0_47, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_99, P3Thread1of1ForFork2_#in~arg.offset=|v_P3Thread1of1ForFork2_#in~arg.offset_11|, ~z$w_buff1~0=v_~z$w_buff1~0_32, P3Thread1of1ForFork2___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|, P3Thread1of1ForFork2_~arg.base=v_P3Thread1of1ForFork2_~arg.base_9, P3Thread1of1ForFork2_#in~arg.base=|v_P3Thread1of1ForFork2_#in~arg.base_11|} AuxVars[] AssignedVars[P3Thread1of1ForFork2___VERIFIER_assert_~expression, P3Thread1of1ForFork2_~arg.offset, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, ~z$w_buff1~0, P3Thread1of1ForFork2___VERIFIER_assert_#in~expression, P3Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-11-28 18:21:05,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_44 1) (= v_~__unbuffered_cnt~0_102 (+ v_~__unbuffered_cnt~0_103 1)) (= v_P0Thread1of1ForFork3_~arg.base_17 |v_P0Thread1of1ForFork3_#in~arg.base_19|) (= v_~a~0_40 1) (= |v_P0Thread1of1ForFork3_#res.offset_9| 0) (= |v_P0Thread1of1ForFork3_#in~arg.offset_19| v_P0Thread1of1ForFork3_~arg.offset_17) (= 0 |v_P0Thread1of1ForFork3_#res.base_9|)) InVars {P0Thread1of1ForFork3_#in~arg.offset=|v_P0Thread1of1ForFork3_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_103, P0Thread1of1ForFork3_#in~arg.base=|v_P0Thread1of1ForFork3_#in~arg.base_19|} OutVars{~a~0=v_~a~0_40, P0Thread1of1ForFork3_#in~arg.offset=|v_P0Thread1of1ForFork3_#in~arg.offset_19|, P0Thread1of1ForFork3_~arg.base=v_P0Thread1of1ForFork3_~arg.base_17, P0Thread1of1ForFork3_#res.base=|v_P0Thread1of1ForFork3_#res.base_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, P0Thread1of1ForFork3_#res.offset=|v_P0Thread1of1ForFork3_#res.offset_9|, P0Thread1of1ForFork3_~arg.offset=v_P0Thread1of1ForFork3_~arg.offset_17, P0Thread1of1ForFork3_#in~arg.base=|v_P0Thread1of1ForFork3_#in~arg.base_19|, ~x~0=v_~x~0_44} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork3_~arg.base, P0Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork3_#res.offset, P0Thread1of1ForFork3_~arg.offset, ~x~0] because there is no mapped edge [2019-11-28 18:21:05,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] P1ENTRY-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x~0_39 2) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_~y~0_50 1) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= |v_P1Thread1of1ForFork0_#in~arg.base_10| v_P1Thread1of1ForFork0_~arg.base_8) (= |v_P1Thread1of1ForFork0_#in~arg.offset_10| v_P1Thread1of1ForFork0_~arg.offset_8)) InVars {P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_10|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_8, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_8, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_10|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, ~y~0=v_~y~0_50, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, ~y~0, P1Thread1of1ForFork0_#res.base, ~x~0] because there is no mapped edge [2019-11-28 18:21:05,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L768-2-->L768-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1086043063 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-1086043063 256) 0)) (.cse1 (= |P2Thread1of1ForFork1_#t~ite3_Out-1086043063| |P2Thread1of1ForFork1_#t~ite4_Out-1086043063|))) (or (and (not .cse0) .cse1 (= |P2Thread1of1ForFork1_#t~ite3_Out-1086043063| ~z$w_buff1~0_In-1086043063) (not .cse2)) (and (or .cse0 .cse2) .cse1 (= |P2Thread1of1ForFork1_#t~ite3_Out-1086043063| ~z~0_In-1086043063)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1086043063, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1086043063, ~z$w_buff1~0=~z$w_buff1~0_In-1086043063, ~z~0=~z~0_In-1086043063} OutVars{P2Thread1of1ForFork1_#t~ite4=|P2Thread1of1ForFork1_#t~ite4_Out-1086043063|, P2Thread1of1ForFork1_#t~ite3=|P2Thread1of1ForFork1_#t~ite3_Out-1086043063|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1086043063, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1086043063, ~z$w_buff1~0=~z$w_buff1~0_In-1086043063, ~z~0=~z~0_In-1086043063} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite4, P2Thread1of1ForFork1_#t~ite3] because there is no mapped edge [2019-11-28 18:21:05,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In272008913 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In272008913 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite5_Out272008913| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite5_Out272008913| ~z$w_buff0_used~0_In272008913)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In272008913, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In272008913} OutVars{P2Thread1of1ForFork1_#t~ite5=|P2Thread1of1ForFork1_#t~ite5_Out272008913|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In272008913, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In272008913} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-11-28 18:21:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L770-->L770-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In-1367264973 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1367264973 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In-1367264973 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1367264973 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite6_Out-1367264973|)) (and (= ~z$w_buff1_used~0_In-1367264973 |P2Thread1of1ForFork1_#t~ite6_Out-1367264973|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1367264973, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1367264973, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1367264973, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1367264973} OutVars{P2Thread1of1ForFork1_#t~ite6=|P2Thread1of1ForFork1_#t~ite6_Out-1367264973|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1367264973, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1367264973, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1367264973, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1367264973} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-11-28 18:21:05,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1787560603 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1787560603 256) 0))) (or (and (= ~z$r_buff0_thd3~0_In-1787560603 |P2Thread1of1ForFork1_#t~ite7_Out-1787560603|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite7_Out-1787560603|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1787560603, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1787560603} OutVars{P2Thread1of1ForFork1_#t~ite7=|P2Thread1of1ForFork1_#t~ite7_Out-1787560603|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1787560603, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1787560603} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-11-28 18:21:05,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L772-->L772-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In599766191 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In599766191 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In599766191 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In599766191 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite8_Out599766191| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite8_Out599766191| ~z$r_buff1_thd3~0_In599766191) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In599766191, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In599766191, ~z$w_buff1_used~0=~z$w_buff1_used~0_In599766191, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In599766191} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In599766191, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In599766191, ~z$w_buff1_used~0=~z$w_buff1_used~0_In599766191, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In599766191, P2Thread1of1ForFork1_#t~ite8=|P2Thread1of1ForFork1_#t~ite8_Out599766191|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-11-28 18:21:05,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L772-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork1_#t~ite8_44|) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101, P2Thread1of1ForFork1_#t~ite8=|v_P2Thread1of1ForFork1_#t~ite8_44|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|, P2Thread1of1ForFork1_#t~ite8=|v_P2Thread1of1ForFork1_#t~ite8_43|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset, P2Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-11-28 18:21:05,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-914453969 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-914453969 256) 0))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork2_#t~ite11_Out-914453969| 0)) (and (= |P3Thread1of1ForFork2_#t~ite11_Out-914453969| ~z$w_buff0_used~0_In-914453969) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-914453969, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-914453969} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-914453969, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-914453969, P3Thread1of1ForFork2_#t~ite11=|P3Thread1of1ForFork2_#t~ite11_Out-914453969|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-11-28 18:21:05,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L800-->L800-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In-1911347801 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1911347801 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-1911347801 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1911347801 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork2_#t~ite12_Out-1911347801|)) (and (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1911347801 |P3Thread1of1ForFork2_#t~ite12_Out-1911347801|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1911347801, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1911347801, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1911347801, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1911347801} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1911347801, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1911347801, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1911347801, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1911347801, P3Thread1of1ForFork2_#t~ite12=|P3Thread1of1ForFork2_#t~ite12_Out-1911347801|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-11-28 18:21:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L801-->L802: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In660921249 256))) (.cse0 (= ~z$r_buff0_thd4~0_In660921249 ~z$r_buff0_thd4~0_Out660921249)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In660921249 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd4~0_Out660921249) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In660921249, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In660921249} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In660921249, P3Thread1of1ForFork2_#t~ite13=|P3Thread1of1ForFork2_#t~ite13_Out660921249|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out660921249} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite13, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-11-28 18:21:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L802-->L802-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1962174143 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In1962174143 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1962174143 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd4~0_In1962174143 256) 0))) (or (and (= |P3Thread1of1ForFork2_#t~ite14_Out1962174143| ~z$r_buff1_thd4~0_In1962174143) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P3Thread1of1ForFork2_#t~ite14_Out1962174143|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1962174143, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1962174143, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1962174143, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1962174143} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1962174143, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1962174143, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1962174143, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1962174143, P3Thread1of1ForFork2_#t~ite14=|P3Thread1of1ForFork2_#t~ite14_Out1962174143|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-11-28 18:21:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L802-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork2_#t~ite14_54| v_~z$r_buff1_thd4~0_130) (= 0 |v_P3Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_126 (+ v_~__unbuffered_cnt~0_127 1)) (= 0 |v_P3Thread1of1ForFork2_#res.offset_3|)) InVars {P3Thread1of1ForFork2_#t~ite14=|v_P3Thread1of1ForFork2_#t~ite14_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127} OutVars{P3Thread1of1ForFork2_#res.base=|v_P3Thread1of1ForFork2_#res.base_3|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_130, P3Thread1of1ForFork2_#t~ite14=|v_P3Thread1of1ForFork2_#t~ite14_53|, P3Thread1of1ForFork2_#res.offset=|v_P3Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#res.base, ~z$r_buff1_thd4~0, P3Thread1of1ForFork2_#t~ite14, P3Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:21:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L827-1-->L833: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 4 v_~__unbuffered_cnt~0_21) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_6|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-11-28 18:21:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L833-2-->L833-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In615738452 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In615738452 256) 0))) (or (and (= ~z$w_buff1~0_In615738452 |ULTIMATE.start_main_#t~ite19_Out615738452|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z~0_In615738452 |ULTIMATE.start_main_#t~ite19_Out615738452|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In615738452, ~z$w_buff1_used~0=~z$w_buff1_used~0_In615738452, ~z$w_buff1~0=~z$w_buff1~0_In615738452, ~z~0=~z~0_In615738452} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out615738452|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In615738452, ~z$w_buff1_used~0=~z$w_buff1_used~0_In615738452, ~z$w_buff1~0=~z$w_buff1~0_In615738452, ~z~0=~z~0_In615738452} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:21:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L833-4-->L834: Formula: (= v_~z~0_31 |v_ULTIMATE.start_main_#t~ite19_8|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_7|, ~z~0=v_~z~0_31, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:21:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L834-->L834-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1926581726 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1926581726 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out-1926581726|)) (and (= ~z$w_buff0_used~0_In-1926581726 |ULTIMATE.start_main_#t~ite21_Out-1926581726|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1926581726, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1926581726} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1926581726, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1926581726, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1926581726|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:21:05,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L835-->L835-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1039402459 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1039402459 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1039402459 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In1039402459 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out1039402459| ~z$w_buff1_used~0_In1039402459) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out1039402459| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1039402459, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1039402459, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1039402459, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1039402459} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1039402459, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1039402459, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1039402459, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1039402459, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1039402459|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:21:05,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1736181290 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1736181290 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out-1736181290|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-1736181290 |ULTIMATE.start_main_#t~ite23_Out-1736181290|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1736181290, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1736181290} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1736181290, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1736181290, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1736181290|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:21:05,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L837-->L837-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In2043832347 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In2043832347 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In2043832347 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2043832347 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out2043832347| ~z$r_buff1_thd0~0_In2043832347) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite24_Out2043832347| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2043832347, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2043832347, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2043832347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2043832347} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2043832347, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2043832347, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2043832347, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out2043832347|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2043832347} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-11-28 18:21:05,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L849-->L850: Formula: (and (= v_~z$r_buff0_thd0~0_119 v_~z$r_buff0_thd0~0_120) (not (= 0 (mod v_~weak$$choice2~0_29 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_120, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_119, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_9|, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:21:05,717 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L850-->L850-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1545683169 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out1545683169| ~z$r_buff1_thd0~0_In1545683169) (= |ULTIMATE.start_main_#t~ite45_In1545683169| |ULTIMATE.start_main_#t~ite45_Out1545683169|) (not .cse0)) (and .cse0 (= |ULTIMATE.start_main_#t~ite45_Out1545683169| |ULTIMATE.start_main_#t~ite46_Out1545683169|) (= |ULTIMATE.start_main_#t~ite45_Out1545683169| ~z$r_buff1_thd0~0_In1545683169) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1545683169 256) 0))) (or (and (= (mod ~z$r_buff1_thd0~0_In1545683169 256) 0) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1545683169 256))) (= (mod ~z$w_buff0_used~0_In1545683169 256) 0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1545683169, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1545683169, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1545683169, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1545683169, ~weak$$choice2~0=~weak$$choice2~0_In1545683169, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In1545683169|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1545683169, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1545683169, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1545683169, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1545683169, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1545683169|, ~weak$$choice2~0=~weak$$choice2~0_In1545683169, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1545683169|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-11-28 18:21:05,718 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L852-->L855-1: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_120) (= 0 v_~z$flush_delayed~0_24) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (not (= 0 (mod v_~z$flush_delayed~0_25 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z$flush_delayed~0=v_~z$flush_delayed~0_25} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ~z~0=v_~z~0_120, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:21:05,718 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L855-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:21:05,888 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:21:05,891 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:21:05,892 INFO L168 Benchmark]: Toolchain (without parser) took 29398.49 ms. Allocated memory was 1.0 GB in the beginning and 3.0 GB in the end (delta: 1.9 GB). Free memory was 956.3 MB in the beginning and 2.6 GB in the end (delta: -1.7 GB). Peak memory consumption was 274.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:21:05,896 INFO L168 Benchmark]: CDTParser took 0.73 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:21:05,897 INFO L168 Benchmark]: CACSL2BoogieTranslator took 743.23 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.3 MB). Free memory was 956.3 MB in the beginning and 1.1 GB in the end (delta: -142.1 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:21:05,897 INFO L168 Benchmark]: Boogie Procedure Inliner took 82.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:21:05,898 INFO L168 Benchmark]: Boogie Preprocessor took 39.61 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:21:05,900 INFO L168 Benchmark]: RCFGBuilder took 784.27 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 52.0 MB). Peak memory consumption was 52.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:21:05,900 INFO L168 Benchmark]: TraceAbstraction took 27537.23 ms. Allocated memory was 1.2 GB in the beginning and 3.0 GB in the end (delta: 1.8 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 196.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:21:05,901 INFO L168 Benchmark]: Witness Printer took 205.48 ms. Allocated memory is still 3.0 GB. Free memory was 2.7 GB in the beginning and 2.6 GB in the end (delta: 26.0 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:21:05,904 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.73 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 743.23 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.3 MB). Free memory was 956.3 MB in the beginning and 1.1 GB in the end (delta: -142.1 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 82.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 39.61 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 784.27 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 52.0 MB). Peak memory consumption was 52.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 27537.23 ms. Allocated memory was 1.2 GB in the beginning and 3.0 GB in the end (delta: 1.8 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 196.0 MB. Max. memory is 11.5 GB. * Witness Printer took 205.48 ms. Allocated memory is still 3.0 GB. Free memory was 2.7 GB in the beginning and 2.6 GB in the end (delta: 26.0 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.4s, 178 ProgramPointsBefore, 91 ProgramPointsAfterwards, 206 TransitionsBefore, 100 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 24 ChoiceCompositions, 4617 VarBasedMoverChecksPositive, 237 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 231 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.6s, 0 MoverChecksTotal, 56276 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L821] FCALL, FORK 0 pthread_create(&t1537, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L823] FCALL, FORK 0 pthread_create(&t1538, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t1539, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t1540, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 4 z$r_buff1_thd0 = z$r_buff0_thd0 [L788] 4 z$r_buff1_thd1 = z$r_buff0_thd1 [L789] 4 z$r_buff1_thd2 = z$r_buff0_thd2 [L790] 4 z$r_buff1_thd3 = z$r_buff0_thd3 [L791] 4 z$r_buff1_thd4 = z$r_buff0_thd4 [L792] 4 z$r_buff0_thd4 = (_Bool)1 [L795] 4 __unbuffered_p3_EAX = a VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L762] 3 y = 2 [L765] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L769] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L770] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L771] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L798] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L798] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L799] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L800] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L833] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L834] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L835] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L836] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L837] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L840] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L841] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L842] 0 z$flush_delayed = weak$$choice2 [L843] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L844] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L844] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L845] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L845] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L846] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L846] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L847] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L847] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L848] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L848] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L850] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L851] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2 && __unbuffered_p3_EAX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 27.2s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 6.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2042 SDtfs, 1703 SDslu, 3835 SDs, 0 SdLazy, 1762 SolverSat, 132 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 116 GetRequests, 28 SyntacticMatches, 11 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 2.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=51310occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 9.3s AutomataMinimizationTime, 17 MinimizatonAttempts, 17766 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 768 NumberOfCodeBlocks, 768 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 691 ConstructedInterpolants, 0 QuantifiedInterpolants, 102816 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...