./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/rfi001_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/rfi001_power.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8f46953826e9fad0ebac0c72408ce17d1befe0ec ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:21:46,970 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:21:46,973 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:21:46,991 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:21:46,992 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:21:46,994 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:21:46,996 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:21:47,008 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:21:47,010 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:21:47,011 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:21:47,013 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:21:47,014 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:21:47,014 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:21:47,015 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:21:47,017 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:21:47,018 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:21:47,019 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:21:47,020 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:21:47,022 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:21:47,024 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:21:47,025 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:21:47,026 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:21:47,028 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:21:47,029 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:21:47,031 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:21:47,032 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:21:47,032 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:21:47,033 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:21:47,033 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:21:47,035 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:21:47,035 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:21:47,036 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:21:47,037 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:21:47,038 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:21:47,039 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:21:47,039 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:21:47,040 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:21:47,040 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:21:47,041 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:21:47,042 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:21:47,043 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:21:47,044 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:21:47,066 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:21:47,066 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:21:47,068 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:21:47,069 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:21:47,069 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:21:47,069 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:21:47,070 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:21:47,070 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:21:47,070 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:21:47,071 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:21:47,072 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:21:47,072 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:21:47,073 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:21:47,073 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:21:47,073 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:21:47,074 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:21:47,074 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:21:47,074 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:21:47,075 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:21:47,075 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:21:47,075 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:21:47,076 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:21:47,076 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:21:47,076 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:21:47,077 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:21:47,077 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:21:47,077 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:21:47,078 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:21:47,078 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:21:47,078 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8f46953826e9fad0ebac0c72408ce17d1befe0ec [2019-11-28 18:21:47,427 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:21:47,452 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:21:47,456 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:21:47,458 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:21:47,459 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:21:47,460 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/rfi001_power.opt.i [2019-11-28 18:21:47,541 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/842c340bb/9e35b71cc68a46af9c9bd9144f5e59fc/FLAGf4616959b [2019-11-28 18:21:48,156 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:21:48,156 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/rfi001_power.opt.i [2019-11-28 18:21:48,182 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/842c340bb/9e35b71cc68a46af9c9bd9144f5e59fc/FLAGf4616959b [2019-11-28 18:21:48,464 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/842c340bb/9e35b71cc68a46af9c9bd9144f5e59fc [2019-11-28 18:21:48,467 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:21:48,468 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:21:48,469 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:21:48,470 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:21:48,473 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:21:48,474 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:21:48" (1/1) ... [2019-11-28 18:21:48,477 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@19f26dd3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:48, skipping insertion in model container [2019-11-28 18:21:48,478 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:21:48" (1/1) ... [2019-11-28 18:21:48,484 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:21:48,528 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:21:49,048 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:21:49,060 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:21:49,120 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:21:49,193 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:21:49,194 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49 WrapperNode [2019-11-28 18:21:49,194 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:21:49,195 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:21:49,195 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:21:49,195 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:21:49,204 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,225 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,273 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:21:49,274 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:21:49,274 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:21:49,274 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:21:49,284 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,284 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,289 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,290 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,300 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,305 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,309 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... [2019-11-28 18:21:49,314 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:21:49,315 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:21:49,315 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:21:49,315 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:21:49,317 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:21:49,375 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:21:49,375 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:21:49,375 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:21:49,376 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:21:49,376 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:21:49,376 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:21:49,376 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:21:49,377 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:21:49,377 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:21:49,377 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:21:49,378 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:21:49,381 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:21:50,136 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:21:50,137 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:21:50,138 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:21:50 BoogieIcfgContainer [2019-11-28 18:21:50,138 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:21:50,139 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:21:50,140 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:21:50,143 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:21:50,144 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:21:48" (1/3) ... [2019-11-28 18:21:50,145 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7932f7e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:21:50, skipping insertion in model container [2019-11-28 18:21:50,145 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:49" (2/3) ... [2019-11-28 18:21:50,146 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7932f7e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:21:50, skipping insertion in model container [2019-11-28 18:21:50,146 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:21:50" (3/3) ... [2019-11-28 18:21:50,148 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi001_power.opt.i [2019-11-28 18:21:50,159 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:21:50,159 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:21:50,168 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:21:50,169 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:21:50,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,208 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,209 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,209 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,211 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,213 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,213 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,216 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,216 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,217 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,217 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,218 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,218 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,218 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,219 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,219 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,219 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,219 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,221 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,221 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,222 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,223 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,223 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,235 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,235 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,235 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,235 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,236 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,236 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,236 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:50,254 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:21:50,277 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:21:50,277 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:21:50,277 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:21:50,278 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:21:50,278 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:21:50,278 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:21:50,278 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:21:50,278 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:21:50,297 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 148 places, 182 transitions [2019-11-28 18:21:50,299 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-11-28 18:21:50,388 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-11-28 18:21:50,388 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:21:50,403 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:21:50,424 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-11-28 18:21:50,500 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-11-28 18:21:50,500 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:21:50,509 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:21:50,527 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-11-28 18:21:50,528 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:21:54,842 WARN L192 SmtUtils]: Spent 223.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-11-28 18:21:54,961 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-11-28 18:21:54,999 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46553 [2019-11-28 18:21:54,999 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-11-28 18:21:55,004 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-11-28 18:21:55,588 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8413 states. [2019-11-28 18:21:55,591 INFO L276 IsEmpty]: Start isEmpty. Operand 8413 states. [2019-11-28 18:21:55,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-11-28 18:21:55,600 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:55,601 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-11-28 18:21:55,601 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:55,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:55,612 INFO L82 PathProgramCache]: Analyzing trace with hash 698534967, now seen corresponding path program 1 times [2019-11-28 18:21:55,622 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:55,623 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132344409] [2019-11-28 18:21:55,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:55,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:56,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:56,041 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132344409] [2019-11-28 18:21:56,042 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:56,042 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:21:56,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067687550] [2019-11-28 18:21:56,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:21:56,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:56,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:21:56,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:56,079 INFO L87 Difference]: Start difference. First operand 8413 states. Second operand 3 states. [2019-11-28 18:21:56,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:56,342 INFO L93 Difference]: Finished difference Result 8365 states and 27377 transitions. [2019-11-28 18:21:56,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:21:56,344 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-11-28 18:21:56,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:56,450 INFO L225 Difference]: With dead ends: 8365 [2019-11-28 18:21:56,451 INFO L226 Difference]: Without dead ends: 8196 [2019-11-28 18:21:56,457 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:56,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8196 states. [2019-11-28 18:21:56,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8196 to 8196. [2019-11-28 18:21:56,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8196 states. [2019-11-28 18:21:56,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8196 states to 8196 states and 26857 transitions. [2019-11-28 18:21:56,869 INFO L78 Accepts]: Start accepts. Automaton has 8196 states and 26857 transitions. Word has length 5 [2019-11-28 18:21:56,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:56,870 INFO L462 AbstractCegarLoop]: Abstraction has 8196 states and 26857 transitions. [2019-11-28 18:21:56,870 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:21:56,870 INFO L276 IsEmpty]: Start isEmpty. Operand 8196 states and 26857 transitions. [2019-11-28 18:21:56,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:21:56,873 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:56,873 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:56,873 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:56,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:56,874 INFO L82 PathProgramCache]: Analyzing trace with hash 1108629868, now seen corresponding path program 1 times [2019-11-28 18:21:56,874 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:56,875 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508868538] [2019-11-28 18:21:56,875 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:56,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:56,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:56,948 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508868538] [2019-11-28 18:21:56,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:56,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:21:56,949 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139272004] [2019-11-28 18:21:56,951 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:21:56,951 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:56,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:21:56,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:21:56,952 INFO L87 Difference]: Start difference. First operand 8196 states and 26857 transitions. Second operand 4 states. [2019-11-28 18:21:57,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:57,385 INFO L93 Difference]: Finished difference Result 13084 states and 41046 transitions. [2019-11-28 18:21:57,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:21:57,386 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:21:57,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:57,466 INFO L225 Difference]: With dead ends: 13084 [2019-11-28 18:21:57,467 INFO L226 Difference]: Without dead ends: 13077 [2019-11-28 18:21:57,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:21:57,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13077 states. [2019-11-28 18:21:57,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13077 to 11568. [2019-11-28 18:21:57,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11568 states. [2019-11-28 18:21:58,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11568 states to 11568 states and 36838 transitions. [2019-11-28 18:21:58,167 INFO L78 Accepts]: Start accepts. Automaton has 11568 states and 36838 transitions. Word has length 11 [2019-11-28 18:21:58,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:58,168 INFO L462 AbstractCegarLoop]: Abstraction has 11568 states and 36838 transitions. [2019-11-28 18:21:58,168 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:21:58,168 INFO L276 IsEmpty]: Start isEmpty. Operand 11568 states and 36838 transitions. [2019-11-28 18:21:58,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:21:58,184 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:58,184 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:58,185 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:58,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:58,185 INFO L82 PathProgramCache]: Analyzing trace with hash 531606898, now seen corresponding path program 1 times [2019-11-28 18:21:58,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:58,188 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921072391] [2019-11-28 18:21:58,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:58,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:58,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:58,298 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921072391] [2019-11-28 18:21:58,298 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:58,298 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:21:58,298 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464711728] [2019-11-28 18:21:58,298 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:21:58,300 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:58,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:21:58,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:21:58,301 INFO L87 Difference]: Start difference. First operand 11568 states and 36838 transitions. Second operand 4 states. [2019-11-28 18:21:58,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:58,567 INFO L93 Difference]: Finished difference Result 14627 states and 46118 transitions. [2019-11-28 18:21:58,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:21:58,567 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:21:58,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:58,621 INFO L225 Difference]: With dead ends: 14627 [2019-11-28 18:21:58,621 INFO L226 Difference]: Without dead ends: 14627 [2019-11-28 18:21:58,622 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:21:58,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14627 states. [2019-11-28 18:21:58,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14627 to 12851. [2019-11-28 18:21:58,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12851 states. [2019-11-28 18:21:59,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12851 states to 12851 states and 40863 transitions. [2019-11-28 18:21:59,028 INFO L78 Accepts]: Start accepts. Automaton has 12851 states and 40863 transitions. Word has length 11 [2019-11-28 18:21:59,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:59,029 INFO L462 AbstractCegarLoop]: Abstraction has 12851 states and 40863 transitions. [2019-11-28 18:21:59,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:21:59,029 INFO L276 IsEmpty]: Start isEmpty. Operand 12851 states and 40863 transitions. [2019-11-28 18:21:59,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:21:59,033 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:59,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:59,034 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:59,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:59,034 INFO L82 PathProgramCache]: Analyzing trace with hash 1151367975, now seen corresponding path program 1 times [2019-11-28 18:21:59,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:59,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157242652] [2019-11-28 18:21:59,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:59,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:59,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:59,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1157242652] [2019-11-28 18:21:59,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:59,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:21:59,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37890245] [2019-11-28 18:21:59,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:21:59,142 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:59,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:21:59,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:21:59,142 INFO L87 Difference]: Start difference. First operand 12851 states and 40863 transitions. Second operand 5 states. [2019-11-28 18:21:59,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:59,615 INFO L93 Difference]: Finished difference Result 17501 states and 54434 transitions. [2019-11-28 18:21:59,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:21:59,616 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-11-28 18:21:59,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:59,673 INFO L225 Difference]: With dead ends: 17501 [2019-11-28 18:21:59,673 INFO L226 Difference]: Without dead ends: 17494 [2019-11-28 18:21:59,674 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:21:59,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17494 states. [2019-11-28 18:22:00,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17494 to 12893. [2019-11-28 18:22:00,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12893 states. [2019-11-28 18:22:00,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12893 states to 12893 states and 40855 transitions. [2019-11-28 18:22:00,433 INFO L78 Accepts]: Start accepts. Automaton has 12893 states and 40855 transitions. Word has length 17 [2019-11-28 18:22:00,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:00,434 INFO L462 AbstractCegarLoop]: Abstraction has 12893 states and 40855 transitions. [2019-11-28 18:22:00,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:22:00,434 INFO L276 IsEmpty]: Start isEmpty. Operand 12893 states and 40855 transitions. [2019-11-28 18:22:00,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:22:00,451 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:00,451 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:00,452 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:00,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:00,453 INFO L82 PathProgramCache]: Analyzing trace with hash -2101636237, now seen corresponding path program 1 times [2019-11-28 18:22:00,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:00,453 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929196536] [2019-11-28 18:22:00,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:00,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:00,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:00,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [929196536] [2019-11-28 18:22:00,540 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:00,540 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:22:00,541 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2102297190] [2019-11-28 18:22:00,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:22:00,541 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:00,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:22:00,543 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:00,543 INFO L87 Difference]: Start difference. First operand 12893 states and 40855 transitions. Second operand 3 states. [2019-11-28 18:22:00,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:00,678 INFO L93 Difference]: Finished difference Result 15714 states and 49940 transitions. [2019-11-28 18:22:00,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:22:00,678 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:22:00,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:00,731 INFO L225 Difference]: With dead ends: 15714 [2019-11-28 18:22:00,731 INFO L226 Difference]: Without dead ends: 15714 [2019-11-28 18:22:00,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:00,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15714 states. [2019-11-28 18:22:01,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15714 to 14811. [2019-11-28 18:22:01,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14811 states. [2019-11-28 18:22:01,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14811 states to 14811 states and 47249 transitions. [2019-11-28 18:22:01,106 INFO L78 Accepts]: Start accepts. Automaton has 14811 states and 47249 transitions. Word has length 25 [2019-11-28 18:22:01,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:01,107 INFO L462 AbstractCegarLoop]: Abstraction has 14811 states and 47249 transitions. [2019-11-28 18:22:01,107 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:22:01,108 INFO L276 IsEmpty]: Start isEmpty. Operand 14811 states and 47249 transitions. [2019-11-28 18:22:01,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:22:01,122 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:01,122 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:01,122 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:01,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:01,123 INFO L82 PathProgramCache]: Analyzing trace with hash -1939096541, now seen corresponding path program 1 times [2019-11-28 18:22:01,123 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:01,123 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [878412711] [2019-11-28 18:22:01,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:01,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:01,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:01,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [878412711] [2019-11-28 18:22:01,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:01,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:22:01,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192429175] [2019-11-28 18:22:01,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:22:01,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:01,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:22:01,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:22:01,184 INFO L87 Difference]: Start difference. First operand 14811 states and 47249 transitions. Second operand 4 states. [2019-11-28 18:22:01,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:01,218 INFO L93 Difference]: Finished difference Result 2380 states and 5507 transitions. [2019-11-28 18:22:01,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:22:01,218 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-11-28 18:22:01,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:01,222 INFO L225 Difference]: With dead ends: 2380 [2019-11-28 18:22:01,223 INFO L226 Difference]: Without dead ends: 2094 [2019-11-28 18:22:01,223 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:22:01,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2094 states. [2019-11-28 18:22:01,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2094 to 2094. [2019-11-28 18:22:01,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2094 states. [2019-11-28 18:22:01,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2094 states to 2094 states and 4716 transitions. [2019-11-28 18:22:01,257 INFO L78 Accepts]: Start accepts. Automaton has 2094 states and 4716 transitions. Word has length 25 [2019-11-28 18:22:01,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:01,257 INFO L462 AbstractCegarLoop]: Abstraction has 2094 states and 4716 transitions. [2019-11-28 18:22:01,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:22:01,258 INFO L276 IsEmpty]: Start isEmpty. Operand 2094 states and 4716 transitions. [2019-11-28 18:22:01,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:22:01,261 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:01,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:01,262 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:01,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:01,262 INFO L82 PathProgramCache]: Analyzing trace with hash -673430796, now seen corresponding path program 1 times [2019-11-28 18:22:01,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:01,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629092898] [2019-11-28 18:22:01,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:01,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:01,355 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:01,355 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [629092898] [2019-11-28 18:22:01,355 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:01,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:22:01,356 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1401825424] [2019-11-28 18:22:01,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:22:01,356 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:01,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:22:01,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:22:01,357 INFO L87 Difference]: Start difference. First operand 2094 states and 4716 transitions. Second operand 5 states. [2019-11-28 18:22:01,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:01,404 INFO L93 Difference]: Finished difference Result 429 states and 783 transitions. [2019-11-28 18:22:01,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:22:01,406 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:22:01,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:01,407 INFO L225 Difference]: With dead ends: 429 [2019-11-28 18:22:01,407 INFO L226 Difference]: Without dead ends: 383 [2019-11-28 18:22:01,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:22:01,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2019-11-28 18:22:01,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 348. [2019-11-28 18:22:01,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2019-11-28 18:22:01,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 628 transitions. [2019-11-28 18:22:01,416 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 628 transitions. Word has length 37 [2019-11-28 18:22:01,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:01,416 INFO L462 AbstractCegarLoop]: Abstraction has 348 states and 628 transitions. [2019-11-28 18:22:01,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:22:01,417 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 628 transitions. [2019-11-28 18:22:01,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:22:01,421 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:01,421 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:01,421 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:01,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:01,422 INFO L82 PathProgramCache]: Analyzing trace with hash 939573543, now seen corresponding path program 1 times [2019-11-28 18:22:01,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:01,422 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614547319] [2019-11-28 18:22:01,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:01,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:01,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:01,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [614547319] [2019-11-28 18:22:01,554 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:01,554 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:22:01,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965874780] [2019-11-28 18:22:01,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:22:01,558 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:01,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:22:01,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:01,559 INFO L87 Difference]: Start difference. First operand 348 states and 628 transitions. Second operand 3 states. [2019-11-28 18:22:01,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:01,611 INFO L93 Difference]: Finished difference Result 352 states and 622 transitions. [2019-11-28 18:22:01,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:22:01,612 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:22:01,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:01,613 INFO L225 Difference]: With dead ends: 352 [2019-11-28 18:22:01,613 INFO L226 Difference]: Without dead ends: 352 [2019-11-28 18:22:01,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:01,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2019-11-28 18:22:01,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 344. [2019-11-28 18:22:01,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344 states. [2019-11-28 18:22:01,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 614 transitions. [2019-11-28 18:22:01,623 INFO L78 Accepts]: Start accepts. Automaton has 344 states and 614 transitions. Word has length 52 [2019-11-28 18:22:01,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:01,624 INFO L462 AbstractCegarLoop]: Abstraction has 344 states and 614 transitions. [2019-11-28 18:22:01,624 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:22:01,624 INFO L276 IsEmpty]: Start isEmpty. Operand 344 states and 614 transitions. [2019-11-28 18:22:01,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:22:01,626 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:01,626 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:01,626 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:01,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:01,627 INFO L82 PathProgramCache]: Analyzing trace with hash 933754688, now seen corresponding path program 1 times [2019-11-28 18:22:01,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:01,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112288176] [2019-11-28 18:22:01,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:01,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:01,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:01,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2112288176] [2019-11-28 18:22:01,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:01,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:22:01,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1324751752] [2019-11-28 18:22:01,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:22:01,740 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:01,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:22:01,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:22:01,741 INFO L87 Difference]: Start difference. First operand 344 states and 614 transitions. Second operand 6 states. [2019-11-28 18:22:02,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:02,016 INFO L93 Difference]: Finished difference Result 492 states and 884 transitions. [2019-11-28 18:22:02,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:22:02,017 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:22:02,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:02,018 INFO L225 Difference]: With dead ends: 492 [2019-11-28 18:22:02,018 INFO L226 Difference]: Without dead ends: 492 [2019-11-28 18:22:02,019 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:22:02,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2019-11-28 18:22:02,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 461. [2019-11-28 18:22:02,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 461 states. [2019-11-28 18:22:02,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461 states to 461 states and 830 transitions. [2019-11-28 18:22:02,026 INFO L78 Accepts]: Start accepts. Automaton has 461 states and 830 transitions. Word has length 52 [2019-11-28 18:22:02,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:02,027 INFO L462 AbstractCegarLoop]: Abstraction has 461 states and 830 transitions. [2019-11-28 18:22:02,027 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:22:02,027 INFO L276 IsEmpty]: Start isEmpty. Operand 461 states and 830 transitions. [2019-11-28 18:22:02,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:22:02,028 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:02,028 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:02,029 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:02,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:02,029 INFO L82 PathProgramCache]: Analyzing trace with hash 1521577966, now seen corresponding path program 2 times [2019-11-28 18:22:02,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:02,030 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515789809] [2019-11-28 18:22:02,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:02,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:02,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:02,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1515789809] [2019-11-28 18:22:02,175 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:02,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:22:02,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288001219] [2019-11-28 18:22:02,177 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:22:02,177 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:02,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:22:02,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:22:02,178 INFO L87 Difference]: Start difference. First operand 461 states and 830 transitions. Second operand 6 states. [2019-11-28 18:22:02,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:02,498 INFO L93 Difference]: Finished difference Result 539 states and 931 transitions. [2019-11-28 18:22:02,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:22:02,499 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:22:02,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:02,500 INFO L225 Difference]: With dead ends: 539 [2019-11-28 18:22:02,500 INFO L226 Difference]: Without dead ends: 539 [2019-11-28 18:22:02,500 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:22:02,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-11-28 18:22:02,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 443. [2019-11-28 18:22:02,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 443 states. [2019-11-28 18:22:02,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 443 states to 443 states and 776 transitions. [2019-11-28 18:22:02,506 INFO L78 Accepts]: Start accepts. Automaton has 443 states and 776 transitions. Word has length 52 [2019-11-28 18:22:02,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:02,506 INFO L462 AbstractCegarLoop]: Abstraction has 443 states and 776 transitions. [2019-11-28 18:22:02,506 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:22:02,506 INFO L276 IsEmpty]: Start isEmpty. Operand 443 states and 776 transitions. [2019-11-28 18:22:02,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:22:02,508 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:02,508 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:02,508 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:02,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:02,509 INFO L82 PathProgramCache]: Analyzing trace with hash -1779624896, now seen corresponding path program 3 times [2019-11-28 18:22:02,509 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:02,509 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890360133] [2019-11-28 18:22:02,509 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:02,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:02,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:02,617 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [890360133] [2019-11-28 18:22:02,617 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:02,617 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:22:02,617 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [179365760] [2019-11-28 18:22:02,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:22:02,618 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:02,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:22:02,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:22:02,619 INFO L87 Difference]: Start difference. First operand 443 states and 776 transitions. Second operand 7 states. [2019-11-28 18:22:03,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:03,040 INFO L93 Difference]: Finished difference Result 637 states and 1106 transitions. [2019-11-28 18:22:03,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:22:03,042 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:22:03,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:03,043 INFO L225 Difference]: With dead ends: 637 [2019-11-28 18:22:03,043 INFO L226 Difference]: Without dead ends: 637 [2019-11-28 18:22:03,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:22:03,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 637 states. [2019-11-28 18:22:03,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 637 to 443. [2019-11-28 18:22:03,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 443 states. [2019-11-28 18:22:03,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 443 states to 443 states and 776 transitions. [2019-11-28 18:22:03,048 INFO L78 Accepts]: Start accepts. Automaton has 443 states and 776 transitions. Word has length 52 [2019-11-28 18:22:03,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:03,049 INFO L462 AbstractCegarLoop]: Abstraction has 443 states and 776 transitions. [2019-11-28 18:22:03,049 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:22:03,049 INFO L276 IsEmpty]: Start isEmpty. Operand 443 states and 776 transitions. [2019-11-28 18:22:03,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:22:03,050 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:03,050 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:03,050 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:03,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:03,050 INFO L82 PathProgramCache]: Analyzing trace with hash 1595558797, now seen corresponding path program 1 times [2019-11-28 18:22:03,050 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:03,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412817264] [2019-11-28 18:22:03,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:03,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:03,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:03,302 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [412817264] [2019-11-28 18:22:03,303 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:03,303 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-28 18:22:03,303 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [927689] [2019-11-28 18:22:03,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-28 18:22:03,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:03,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-28 18:22:03,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:22:03,306 INFO L87 Difference]: Start difference. First operand 443 states and 776 transitions. Second operand 9 states. [2019-11-28 18:22:03,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:03,890 INFO L93 Difference]: Finished difference Result 833 states and 1462 transitions. [2019-11-28 18:22:03,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-28 18:22:03,891 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 53 [2019-11-28 18:22:03,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:03,893 INFO L225 Difference]: With dead ends: 833 [2019-11-28 18:22:03,893 INFO L226 Difference]: Without dead ends: 833 [2019-11-28 18:22:03,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=169, Unknown=0, NotChecked=0, Total=240 [2019-11-28 18:22:03,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 833 states. [2019-11-28 18:22:03,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 833 to 453. [2019-11-28 18:22:03,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 453 states. [2019-11-28 18:22:03,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 453 states to 453 states and 802 transitions. [2019-11-28 18:22:03,901 INFO L78 Accepts]: Start accepts. Automaton has 453 states and 802 transitions. Word has length 53 [2019-11-28 18:22:03,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:03,902 INFO L462 AbstractCegarLoop]: Abstraction has 453 states and 802 transitions. [2019-11-28 18:22:03,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-28 18:22:03,903 INFO L276 IsEmpty]: Start isEmpty. Operand 453 states and 802 transitions. [2019-11-28 18:22:03,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:22:03,909 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:03,909 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:03,909 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:03,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:03,910 INFO L82 PathProgramCache]: Analyzing trace with hash 165214383, now seen corresponding path program 2 times [2019-11-28 18:22:03,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:03,910 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600750692] [2019-11-28 18:22:03,910 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:03,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:04,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:04,179 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600750692] [2019-11-28 18:22:04,180 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:04,180 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:22:04,180 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919649163] [2019-11-28 18:22:04,181 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:22:04,181 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:04,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:22:04,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:04,182 INFO L87 Difference]: Start difference. First operand 453 states and 802 transitions. Second operand 3 states. [2019-11-28 18:22:04,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:04,228 INFO L93 Difference]: Finished difference Result 452 states and 800 transitions. [2019-11-28 18:22:04,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:22:04,229 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:22:04,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:04,230 INFO L225 Difference]: With dead ends: 452 [2019-11-28 18:22:04,230 INFO L226 Difference]: Without dead ends: 452 [2019-11-28 18:22:04,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:04,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 452 states. [2019-11-28 18:22:04,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 452 to 349. [2019-11-28 18:22:04,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349 states. [2019-11-28 18:22:04,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 607 transitions. [2019-11-28 18:22:04,240 INFO L78 Accepts]: Start accepts. Automaton has 349 states and 607 transitions. Word has length 53 [2019-11-28 18:22:04,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:04,241 INFO L462 AbstractCegarLoop]: Abstraction has 349 states and 607 transitions. [2019-11-28 18:22:04,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:22:04,242 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 607 transitions. [2019-11-28 18:22:04,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:22:04,243 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:04,243 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:04,243 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:04,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:04,244 INFO L82 PathProgramCache]: Analyzing trace with hash 160092264, now seen corresponding path program 1 times [2019-11-28 18:22:04,244 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:04,244 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826750260] [2019-11-28 18:22:04,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:04,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:04,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:04,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826750260] [2019-11-28 18:22:04,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:04,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:22:04,354 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452684776] [2019-11-28 18:22:04,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:22:04,356 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:04,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:22:04,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:04,357 INFO L87 Difference]: Start difference. First operand 349 states and 607 transitions. Second operand 3 states. [2019-11-28 18:22:04,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:04,374 INFO L93 Difference]: Finished difference Result 343 states and 590 transitions. [2019-11-28 18:22:04,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:22:04,375 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:22:04,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:04,375 INFO L225 Difference]: With dead ends: 343 [2019-11-28 18:22:04,375 INFO L226 Difference]: Without dead ends: 343 [2019-11-28 18:22:04,377 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:04,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2019-11-28 18:22:04,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 343. [2019-11-28 18:22:04,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-11-28 18:22:04,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 590 transitions. [2019-11-28 18:22:04,383 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 590 transitions. Word has length 53 [2019-11-28 18:22:04,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:04,384 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 590 transitions. [2019-11-28 18:22:04,384 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:22:04,384 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 590 transitions. [2019-11-28 18:22:04,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:22:04,385 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:04,385 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:04,386 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:04,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:04,386 INFO L82 PathProgramCache]: Analyzing trace with hash -798816837, now seen corresponding path program 1 times [2019-11-28 18:22:04,386 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:04,387 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347245403] [2019-11-28 18:22:04,387 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:04,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:04,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:04,808 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347245403] [2019-11-28 18:22:04,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:04,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:22:04,809 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1367567011] [2019-11-28 18:22:04,809 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:22:04,809 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:04,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:22:04,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:22:04,810 INFO L87 Difference]: Start difference. First operand 343 states and 590 transitions. Second operand 13 states. [2019-11-28 18:22:05,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:05,346 INFO L93 Difference]: Finished difference Result 676 states and 1180 transitions. [2019-11-28 18:22:05,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:22:05,347 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-11-28 18:22:05,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:05,348 INFO L225 Difference]: With dead ends: 676 [2019-11-28 18:22:05,348 INFO L226 Difference]: Without dead ends: 294 [2019-11-28 18:22:05,348 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=123, Invalid=339, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:22:05,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2019-11-28 18:22:05,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 265. [2019-11-28 18:22:05,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2019-11-28 18:22:05,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 446 transitions. [2019-11-28 18:22:05,353 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 446 transitions. Word has length 54 [2019-11-28 18:22:05,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:05,354 INFO L462 AbstractCegarLoop]: Abstraction has 265 states and 446 transitions. [2019-11-28 18:22:05,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:22:05,354 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 446 transitions. [2019-11-28 18:22:05,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:22:05,355 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:05,355 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:05,355 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:05,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:05,356 INFO L82 PathProgramCache]: Analyzing trace with hash -1642640547, now seen corresponding path program 2 times [2019-11-28 18:22:05,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:05,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269130622] [2019-11-28 18:22:05,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:05,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:05,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:05,601 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [269130622] [2019-11-28 18:22:05,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:05,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:22:05,605 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016262400] [2019-11-28 18:22:05,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:22:05,606 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:05,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:22:05,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:22:05,606 INFO L87 Difference]: Start difference. First operand 265 states and 446 transitions. Second operand 12 states. [2019-11-28 18:22:06,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:06,231 INFO L93 Difference]: Finished difference Result 406 states and 661 transitions. [2019-11-28 18:22:06,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-28 18:22:06,236 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-11-28 18:22:06,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:06,236 INFO L225 Difference]: With dead ends: 406 [2019-11-28 18:22:06,237 INFO L226 Difference]: Without dead ends: 220 [2019-11-28 18:22:06,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=128, Invalid=472, Unknown=0, NotChecked=0, Total=600 [2019-11-28 18:22:06,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2019-11-28 18:22:06,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 196. [2019-11-28 18:22:06,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2019-11-28 18:22:06,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 330 transitions. [2019-11-28 18:22:06,240 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 330 transitions. Word has length 54 [2019-11-28 18:22:06,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:06,240 INFO L462 AbstractCegarLoop]: Abstraction has 196 states and 330 transitions. [2019-11-28 18:22:06,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:22:06,240 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 330 transitions. [2019-11-28 18:22:06,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:22:06,240 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:06,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:06,241 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:06,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:06,242 INFO L82 PathProgramCache]: Analyzing trace with hash -1731930561, now seen corresponding path program 3 times [2019-11-28 18:22:06,242 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:06,242 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1817570707] [2019-11-28 18:22:06,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:06,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:22:06,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:22:06,344 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:22:06,344 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:22:06,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~z~0_122 0) (= v_~y$mem_tmp~0_21 0) (= v_~y$r_buff1_thd1~0_178 0) (= 0 v_~__unbuffered_p1_EBX~0_131) (= v_~weak$$choice2~0_120 0) (= v_~__unbuffered_p1_EAX~0_131 0) (= v_~y$r_buff0_thd0~0_347 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1603~0.base_19| 4)) (= 0 v_~y$r_buff1_thd2~0_171) (= v_~x~0_94 0) (= 0 v_~weak$$choice0~0_15) (= v_~y$read_delayed~0_6 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1603~0.base_19|)) (= 0 v_~y$r_buff0_thd2~0_225) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~__unbuffered_cnt~0_63) (= v_~y$r_buff0_thd1~0_109 0) (= v_~y$w_buff0_used~0_663 0) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t1603~0.base_19| 1)) (= v_~y$w_buff1~0_180 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1603~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1603~0.base_19|) |v_ULTIMATE.start_main_~#t1603~0.offset_14| 0)) |v_#memory_int_15|) (= 0 v_~y$flush_delayed~0_36) (= |v_#NULL.offset_5| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1603~0.base_19|) (= v_~y~0_158 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff1_thd0~0_274 0) (= 0 v_~y$w_buff0~0_245) (= v_~main$tmp_guard1~0_25 0) (= v_~y$w_buff1_used~0_350 0) (= 0 |v_ULTIMATE.start_main_~#t1603~0.offset_14|) (= 0 |v_#NULL.base_5|) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_33|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_131, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_109, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_28|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_46|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_180, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_225, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ULTIMATE.start_main_~#t1603~0.base=|v_ULTIMATE.start_main_~#t1603~0.base_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_274, ~x~0=v_~x~0_94, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1604~0.offset=|v_ULTIMATE.start_main_~#t1604~0.offset_13|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_663, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_44|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_45|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_178, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_42|, ULTIMATE.start_main_~#t1604~0.base=|v_ULTIMATE.start_main_~#t1604~0.base_16|, ~y$w_buff0~0=v_~y$w_buff0~0_245, ~y~0=v_~y~0_158, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_131, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_31|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_34|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_171, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_347, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ULTIMATE.start_main_~#t1603~0.offset=|v_ULTIMATE.start_main_~#t1603~0.offset_14|, ~z~0=v_~z~0_122, ~weak$$choice2~0=v_~weak$$choice2~0_120, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_350} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1603~0.base, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1604~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1604~0.base, ~y$w_buff0~0, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1603~0.offset, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:22:06,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L789-1-->L791: Formula: (and (= (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1604~0.base_11| 1) |v_#valid_23|) (= (store |v_#length_12| |v_ULTIMATE.start_main_~#t1604~0.base_11| 4) |v_#length_11|) (= |v_ULTIMATE.start_main_~#t1604~0.offset_10| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1604~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1604~0.base_11|) |v_ULTIMATE.start_main_~#t1604~0.offset_10| 1)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t1604~0.base_11| 0)) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1604~0.base_11|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1604~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1604~0.offset=|v_ULTIMATE.start_main_~#t1604~0.offset_10|, ULTIMATE.start_main_~#t1604~0.base=|v_ULTIMATE.start_main_~#t1604~0.base_11|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1604~0.offset, ULTIMATE.start_main_~#t1604~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:22:06,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [589] [589] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_47 256))) (not (= 0 (mod v_~y$w_buff0_used~0_86 256))))) 1 0)) (= 1 v_~y$w_buff0_used~0_86) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= 2 v_~y$w_buff0~0_19) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|) (= v_~y$w_buff0~0_20 v_~y$w_buff1~0_21) (= v_~y$w_buff1_used~0_47 v_~y$w_buff0_used~0_87)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$w_buff0~0=v_~y$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_86, ~y$w_buff1~0=v_~y$w_buff1~0_21, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~y$w_buff0~0=v_~y$w_buff0~0_19, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:22:06,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L732-2-->L732-5: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In143877345 256))) (.cse0 (= (mod ~y$r_buff1_thd1~0_In143877345 256) 0)) (.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out143877345| |P0Thread1of1ForFork0_#t~ite3_Out143877345|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~y$w_buff1~0_In143877345 |P0Thread1of1ForFork0_#t~ite3_Out143877345|)) (and (or .cse1 .cse0) (= ~y~0_In143877345 |P0Thread1of1ForFork0_#t~ite3_Out143877345|) .cse2))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In143877345, ~y$w_buff1~0=~y$w_buff1~0_In143877345, ~y~0=~y~0_In143877345, ~y$w_buff1_used~0=~y$w_buff1_used~0_In143877345} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In143877345, P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out143877345|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out143877345|, ~y$w_buff1~0=~y$w_buff1~0_In143877345, ~y~0=~y~0_In143877345, ~y$w_buff1_used~0=~y$w_buff1_used~0_In143877345} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:22:06,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L733-->L733-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-2014435543 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-2014435543 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-2014435543 |P0Thread1of1ForFork0_#t~ite5_Out-2014435543|)) (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-2014435543| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2014435543, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-2014435543} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-2014435543|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2014435543, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-2014435543} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:22:06,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L734-->L734-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In831027943 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In831027943 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In831027943 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In831027943 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In831027943 |P0Thread1of1ForFork0_#t~ite6_Out831027943|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out831027943|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In831027943, ~y$w_buff0_used~0=~y$w_buff0_used~0_In831027943, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In831027943, ~y$w_buff1_used~0=~y$w_buff1_used~0_In831027943} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out831027943|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In831027943, ~y$w_buff0_used~0=~y$w_buff0_used~0_In831027943, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In831027943, ~y$w_buff1_used~0=~y$w_buff1_used~0_In831027943} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:22:06,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1279513544 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1279513544 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out1279513544| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out1279513544| ~y$r_buff0_thd1~0_In1279513544)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1279513544, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1279513544} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1279513544, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1279513544|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1279513544} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:22:06,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L736-->L736-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In701643306 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In701643306 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In701643306 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In701643306 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out701643306|)) (and (or .cse2 .cse3) (= ~y$r_buff1_thd1~0_In701643306 |P0Thread1of1ForFork0_#t~ite8_Out701643306|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In701643306, ~y$w_buff0_used~0=~y$w_buff0_used~0_In701643306, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In701643306, ~y$w_buff1_used~0=~y$w_buff1_used~0_In701643306} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In701643306, ~y$w_buff0_used~0=~y$w_buff0_used~0_In701643306, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out701643306|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In701643306, ~y$w_buff1_used~0=~y$w_buff1_used~0_In701643306} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:22:06,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_30|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_125, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_29|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:22:06,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-1390592398 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1390592398 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1390592398| ~y$w_buff0_used~0_In-1390592398) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1390592398| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1390592398, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1390592398} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1390592398, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1390592398, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1390592398|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:22:06,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In834970132 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In834970132 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In834970132 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In834970132 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out834970132| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite12_Out834970132| ~y$w_buff1_used~0_In834970132) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In834970132, ~y$w_buff0_used~0=~y$w_buff0_used~0_In834970132, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In834970132, ~y$w_buff1_used~0=~y$w_buff1_used~0_In834970132} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In834970132, ~y$w_buff0_used~0=~y$w_buff0_used~0_In834970132, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In834970132, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out834970132|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In834970132} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:22:06,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L769-->L770: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1419764990 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1419764990 256) 0)) (.cse2 (= ~y$r_buff0_thd2~0_In1419764990 ~y$r_buff0_thd2~0_Out1419764990))) (or (and (= 0 ~y$r_buff0_thd2~0_Out1419764990) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1419764990, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1419764990} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1419764990, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out1419764990, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1419764990|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:22:06,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [667] [667] L770-->L770-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd2~0_In108742164 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In108742164 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In108742164 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In108742164 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out108742164|)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out108742164| ~y$r_buff1_thd2~0_In108742164) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In108742164, ~y$w_buff0_used~0=~y$w_buff0_used~0_In108742164, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In108742164, ~y$w_buff1_used~0=~y$w_buff1_used~0_In108742164} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In108742164, ~y$w_buff0_used~0=~y$w_buff0_used~0_In108742164, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In108742164, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out108742164|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In108742164} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:22:06,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= v_~y$r_buff1_thd2~0_144 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_144, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:22:06,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_5 256))) (or (= 0 (mod v_~y$r_buff0_thd0~0_132 256)) (= 0 (mod v_~y$w_buff0_used~0_236 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:22:06,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L797-2-->L797-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-612848887 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-612848887 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite17_Out-612848887| ~y$w_buff1~0_In-612848887) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-612848887| ~y~0_In-612848887)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-612848887, ~y~0=~y~0_In-612848887, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-612848887, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-612848887} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-612848887|, ~y$w_buff1~0=~y$w_buff1~0_In-612848887, ~y~0=~y~0_In-612848887, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-612848887, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-612848887} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:22:06,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [619] [619] L797-4-->L798: Formula: (= v_~y~0_44 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~y~0=v_~y~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-11-28 18:22:06,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [666] [666] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1746858432 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1746858432 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out-1746858432| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite19_Out-1746858432| ~y$w_buff0_used~0_In-1746858432)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1746858432, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1746858432} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1746858432, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1746858432|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1746858432} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:22:06,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1721704541 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1721704541 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1721704541 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-1721704541 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out-1721704541|)) (and (or .cse1 .cse0) (= ~y$w_buff1_used~0_In-1721704541 |ULTIMATE.start_main_#t~ite20_Out-1721704541|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1721704541, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1721704541, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1721704541, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1721704541} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1721704541, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1721704541, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1721704541|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1721704541, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1721704541} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:22:06,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-86555617 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-86555617 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-86555617| ~y$r_buff0_thd0~0_In-86555617) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out-86555617|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-86555617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-86555617} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-86555617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-86555617, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-86555617|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:22:06,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In1149395453 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In1149395453 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1149395453 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1149395453 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out1149395453| ~y$r_buff1_thd0~0_In1149395453) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite22_Out1149395453| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1149395453, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1149395453, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1149395453, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1149395453} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1149395453, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1149395453, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1149395453, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1149395453|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1149395453} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:22:06,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-183745315 256)))) (or (and (not .cse0) (= ~y$w_buff1_used~0_In-183745315 |ULTIMATE.start_main_#t~ite38_Out-183745315|) (= |ULTIMATE.start_main_#t~ite37_In-183745315| |ULTIMATE.start_main_#t~ite37_Out-183745315|)) (and (= ~y$w_buff1_used~0_In-183745315 |ULTIMATE.start_main_#t~ite37_Out-183745315|) (= |ULTIMATE.start_main_#t~ite37_Out-183745315| |ULTIMATE.start_main_#t~ite38_Out-183745315|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-183745315 256) 0))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-183745315 256))) (and (= 0 (mod ~y$r_buff1_thd0~0_In-183745315 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-183745315 256)))) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-183745315, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-183745315, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-183745315|, ~weak$$choice2~0=~weak$$choice2~0_In-183745315, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-183745315, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-183745315} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-183745315, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-183745315, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-183745315|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-183745315|, ~weak$$choice2~0=~weak$$choice2~0_In-183745315, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-183745315, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-183745315} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-11-28 18:22:06,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [607] [607] L813-->L814: Formula: (and (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97) (not (= 0 (mod v_~weak$$choice2~0_26 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_26} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_26} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:22:06,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L816-->L819-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_16 256)) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= v_~y~0_114 v_~y$mem_tmp~0_17) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~y~0=v_~y~0_114, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_18|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:22:06,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [674] [674] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:22:06,444 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:22:06 BasicIcfg [2019-11-28 18:22:06,445 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:22:06,445 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:22:06,445 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:22:06,445 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:22:06,446 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:21:50" (3/4) ... [2019-11-28 18:22:06,451 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:22:06,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~z~0_122 0) (= v_~y$mem_tmp~0_21 0) (= v_~y$r_buff1_thd1~0_178 0) (= 0 v_~__unbuffered_p1_EBX~0_131) (= v_~weak$$choice2~0_120 0) (= v_~__unbuffered_p1_EAX~0_131 0) (= v_~y$r_buff0_thd0~0_347 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1603~0.base_19| 4)) (= 0 v_~y$r_buff1_thd2~0_171) (= v_~x~0_94 0) (= 0 v_~weak$$choice0~0_15) (= v_~y$read_delayed~0_6 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1603~0.base_19|)) (= 0 v_~y$r_buff0_thd2~0_225) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~__unbuffered_cnt~0_63) (= v_~y$r_buff0_thd1~0_109 0) (= v_~y$w_buff0_used~0_663 0) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t1603~0.base_19| 1)) (= v_~y$w_buff1~0_180 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1603~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1603~0.base_19|) |v_ULTIMATE.start_main_~#t1603~0.offset_14| 0)) |v_#memory_int_15|) (= 0 v_~y$flush_delayed~0_36) (= |v_#NULL.offset_5| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1603~0.base_19|) (= v_~y~0_158 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff1_thd0~0_274 0) (= 0 v_~y$w_buff0~0_245) (= v_~main$tmp_guard1~0_25 0) (= v_~y$w_buff1_used~0_350 0) (= 0 |v_ULTIMATE.start_main_~#t1603~0.offset_14|) (= 0 |v_#NULL.base_5|) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_33|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_131, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_109, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_28|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_46|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_180, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_225, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ULTIMATE.start_main_~#t1603~0.base=|v_ULTIMATE.start_main_~#t1603~0.base_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_274, ~x~0=v_~x~0_94, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1604~0.offset=|v_ULTIMATE.start_main_~#t1604~0.offset_13|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_663, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_44|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_45|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_178, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_42|, ULTIMATE.start_main_~#t1604~0.base=|v_ULTIMATE.start_main_~#t1604~0.base_16|, ~y$w_buff0~0=v_~y$w_buff0~0_245, ~y~0=v_~y~0_158, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_131, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_31|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_34|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_171, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_347, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ULTIMATE.start_main_~#t1603~0.offset=|v_ULTIMATE.start_main_~#t1603~0.offset_14|, ~z~0=v_~z~0_122, ~weak$$choice2~0=v_~weak$$choice2~0_120, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_350} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1603~0.base, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1604~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1604~0.base, ~y$w_buff0~0, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1603~0.offset, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:22:06,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L789-1-->L791: Formula: (and (= (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1604~0.base_11| 1) |v_#valid_23|) (= (store |v_#length_12| |v_ULTIMATE.start_main_~#t1604~0.base_11| 4) |v_#length_11|) (= |v_ULTIMATE.start_main_~#t1604~0.offset_10| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1604~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1604~0.base_11|) |v_ULTIMATE.start_main_~#t1604~0.offset_10| 1)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t1604~0.base_11| 0)) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1604~0.base_11|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1604~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1604~0.offset=|v_ULTIMATE.start_main_~#t1604~0.offset_10|, ULTIMATE.start_main_~#t1604~0.base=|v_ULTIMATE.start_main_~#t1604~0.base_11|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1604~0.offset, ULTIMATE.start_main_~#t1604~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:22:06,455 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [589] [589] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_47 256))) (not (= 0 (mod v_~y$w_buff0_used~0_86 256))))) 1 0)) (= 1 v_~y$w_buff0_used~0_86) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= 2 v_~y$w_buff0~0_19) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|) (= v_~y$w_buff0~0_20 v_~y$w_buff1~0_21) (= v_~y$w_buff1_used~0_47 v_~y$w_buff0_used~0_87)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$w_buff0~0=v_~y$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_86, ~y$w_buff1~0=v_~y$w_buff1~0_21, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~y$w_buff0~0=v_~y$w_buff0~0_19, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:22:06,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L732-2-->L732-5: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In143877345 256))) (.cse0 (= (mod ~y$r_buff1_thd1~0_In143877345 256) 0)) (.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out143877345| |P0Thread1of1ForFork0_#t~ite3_Out143877345|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~y$w_buff1~0_In143877345 |P0Thread1of1ForFork0_#t~ite3_Out143877345|)) (and (or .cse1 .cse0) (= ~y~0_In143877345 |P0Thread1of1ForFork0_#t~ite3_Out143877345|) .cse2))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In143877345, ~y$w_buff1~0=~y$w_buff1~0_In143877345, ~y~0=~y~0_In143877345, ~y$w_buff1_used~0=~y$w_buff1_used~0_In143877345} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In143877345, P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out143877345|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out143877345|, ~y$w_buff1~0=~y$w_buff1~0_In143877345, ~y~0=~y~0_In143877345, ~y$w_buff1_used~0=~y$w_buff1_used~0_In143877345} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:22:06,457 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L733-->L733-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-2014435543 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-2014435543 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-2014435543 |P0Thread1of1ForFork0_#t~ite5_Out-2014435543|)) (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-2014435543| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2014435543, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-2014435543} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-2014435543|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2014435543, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-2014435543} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:22:06,460 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L734-->L734-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In831027943 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In831027943 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In831027943 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In831027943 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In831027943 |P0Thread1of1ForFork0_#t~ite6_Out831027943|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out831027943|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In831027943, ~y$w_buff0_used~0=~y$w_buff0_used~0_In831027943, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In831027943, ~y$w_buff1_used~0=~y$w_buff1_used~0_In831027943} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out831027943|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In831027943, ~y$w_buff0_used~0=~y$w_buff0_used~0_In831027943, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In831027943, ~y$w_buff1_used~0=~y$w_buff1_used~0_In831027943} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:22:06,460 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1279513544 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1279513544 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out1279513544| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out1279513544| ~y$r_buff0_thd1~0_In1279513544)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1279513544, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1279513544} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1279513544, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1279513544|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1279513544} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:22:06,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L736-->L736-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In701643306 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In701643306 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In701643306 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In701643306 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out701643306|)) (and (or .cse2 .cse3) (= ~y$r_buff1_thd1~0_In701643306 |P0Thread1of1ForFork0_#t~ite8_Out701643306|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In701643306, ~y$w_buff0_used~0=~y$w_buff0_used~0_In701643306, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In701643306, ~y$w_buff1_used~0=~y$w_buff1_used~0_In701643306} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In701643306, ~y$w_buff0_used~0=~y$w_buff0_used~0_In701643306, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out701643306|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In701643306, ~y$w_buff1_used~0=~y$w_buff1_used~0_In701643306} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:22:06,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_30|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_125, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_29|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:22:06,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-1390592398 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1390592398 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1390592398| ~y$w_buff0_used~0_In-1390592398) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1390592398| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1390592398, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1390592398} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1390592398, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1390592398, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1390592398|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:22:06,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In834970132 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In834970132 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In834970132 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In834970132 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out834970132| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite12_Out834970132| ~y$w_buff1_used~0_In834970132) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In834970132, ~y$w_buff0_used~0=~y$w_buff0_used~0_In834970132, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In834970132, ~y$w_buff1_used~0=~y$w_buff1_used~0_In834970132} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In834970132, ~y$w_buff0_used~0=~y$w_buff0_used~0_In834970132, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In834970132, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out834970132|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In834970132} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:22:06,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L769-->L770: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1419764990 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1419764990 256) 0)) (.cse2 (= ~y$r_buff0_thd2~0_In1419764990 ~y$r_buff0_thd2~0_Out1419764990))) (or (and (= 0 ~y$r_buff0_thd2~0_Out1419764990) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1419764990, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1419764990} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1419764990, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out1419764990, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1419764990|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:22:06,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [667] [667] L770-->L770-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd2~0_In108742164 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In108742164 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In108742164 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In108742164 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out108742164|)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out108742164| ~y$r_buff1_thd2~0_In108742164) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In108742164, ~y$w_buff0_used~0=~y$w_buff0_used~0_In108742164, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In108742164, ~y$w_buff1_used~0=~y$w_buff1_used~0_In108742164} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In108742164, ~y$w_buff0_used~0=~y$w_buff0_used~0_In108742164, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In108742164, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out108742164|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In108742164} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:22:06,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= v_~y$r_buff1_thd2~0_144 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_144, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:22:06,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_5 256))) (or (= 0 (mod v_~y$r_buff0_thd0~0_132 256)) (= 0 (mod v_~y$w_buff0_used~0_236 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:22:06,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L797-2-->L797-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-612848887 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-612848887 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite17_Out-612848887| ~y$w_buff1~0_In-612848887) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-612848887| ~y~0_In-612848887)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-612848887, ~y~0=~y~0_In-612848887, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-612848887, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-612848887} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-612848887|, ~y$w_buff1~0=~y$w_buff1~0_In-612848887, ~y~0=~y~0_In-612848887, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-612848887, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-612848887} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:22:06,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [619] [619] L797-4-->L798: Formula: (= v_~y~0_44 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~y~0=v_~y~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-11-28 18:22:06,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [666] [666] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1746858432 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1746858432 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out-1746858432| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite19_Out-1746858432| ~y$w_buff0_used~0_In-1746858432)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1746858432, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1746858432} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1746858432, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1746858432|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1746858432} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:22:06,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1721704541 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1721704541 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1721704541 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-1721704541 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out-1721704541|)) (and (or .cse1 .cse0) (= ~y$w_buff1_used~0_In-1721704541 |ULTIMATE.start_main_#t~ite20_Out-1721704541|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1721704541, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1721704541, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1721704541, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1721704541} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1721704541, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1721704541, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1721704541|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1721704541, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1721704541} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:22:06,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-86555617 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-86555617 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-86555617| ~y$r_buff0_thd0~0_In-86555617) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out-86555617|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-86555617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-86555617} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-86555617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-86555617, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-86555617|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:22:06,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In1149395453 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In1149395453 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1149395453 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1149395453 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out1149395453| ~y$r_buff1_thd0~0_In1149395453) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite22_Out1149395453| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1149395453, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1149395453, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1149395453, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1149395453} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1149395453, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1149395453, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1149395453, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1149395453|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1149395453} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:22:06,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-183745315 256)))) (or (and (not .cse0) (= ~y$w_buff1_used~0_In-183745315 |ULTIMATE.start_main_#t~ite38_Out-183745315|) (= |ULTIMATE.start_main_#t~ite37_In-183745315| |ULTIMATE.start_main_#t~ite37_Out-183745315|)) (and (= ~y$w_buff1_used~0_In-183745315 |ULTIMATE.start_main_#t~ite37_Out-183745315|) (= |ULTIMATE.start_main_#t~ite37_Out-183745315| |ULTIMATE.start_main_#t~ite38_Out-183745315|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-183745315 256) 0))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-183745315 256))) (and (= 0 (mod ~y$r_buff1_thd0~0_In-183745315 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-183745315 256)))) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-183745315, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-183745315, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-183745315|, ~weak$$choice2~0=~weak$$choice2~0_In-183745315, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-183745315, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-183745315} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-183745315, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-183745315, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-183745315|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-183745315|, ~weak$$choice2~0=~weak$$choice2~0_In-183745315, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-183745315, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-183745315} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-11-28 18:22:06,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [607] [607] L813-->L814: Formula: (and (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97) (not (= 0 (mod v_~weak$$choice2~0_26 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_26} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_26} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:22:06,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L816-->L819-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_16 256)) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= v_~y~0_114 v_~y$mem_tmp~0_17) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~y~0=v_~y~0_114, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_18|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:22:06,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [674] [674] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:22:06,575 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:22:06,575 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:22:06,577 INFO L168 Benchmark]: Toolchain (without parser) took 18108.44 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 582.0 MB). Free memory was 957.7 MB in the beginning and 1.0 GB in the end (delta: -65.0 MB). Peak memory consumption was 516.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:06,577 INFO L168 Benchmark]: CDTParser took 0.86 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:22:06,580 INFO L168 Benchmark]: CACSL2BoogieTranslator took 724.97 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.7 MB). Free memory was 957.7 MB in the beginning and 1.1 GB in the end (delta: -145.1 MB). Peak memory consumption was 31.4 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:06,580 INFO L168 Benchmark]: Boogie Procedure Inliner took 78.64 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:06,583 INFO L168 Benchmark]: Boogie Preprocessor took 40.99 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:22:06,583 INFO L168 Benchmark]: RCFGBuilder took 823.48 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.3 MB). Peak memory consumption was 44.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:06,584 INFO L168 Benchmark]: TraceAbstraction took 16305.28 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 447.2 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 16.1 MB). Peak memory consumption was 463.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:06,585 INFO L168 Benchmark]: Witness Printer took 129.93 ms. Allocated memory is still 1.6 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 13.0 MB). Peak memory consumption was 13.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:06,591 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.86 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 724.97 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.7 MB). Free memory was 957.7 MB in the beginning and 1.1 GB in the end (delta: -145.1 MB). Peak memory consumption was 31.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 78.64 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 40.99 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 823.48 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.3 MB). Peak memory consumption was 44.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 16305.28 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 447.2 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 16.1 MB). Peak memory consumption was 463.3 MB. Max. memory is 11.5 GB. * Witness Printer took 129.93 ms. Allocated memory is still 1.6 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 13.0 MB). Peak memory consumption was 13.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.7s, 148 ProgramPointsBefore, 78 ProgramPointsAfterwards, 182 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 3838 VarBasedMoverChecksPositive, 191 VarBasedMoverChecksNegative, 62 SemBasedMoverChecksPositive, 187 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 46553 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L789] FCALL, FORK 0 pthread_create(&t1603, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1604, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L751] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L752] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L753] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L754] 2 y$r_buff0_thd2 = (_Bool)1 [L757] 2 z = 1 [L760] 2 __unbuffered_p1_EAX = z [L763] 2 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 1 x = 1 [L729] 1 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L766] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L734] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L735] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L766] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L767] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L768] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 y$flush_delayed = weak$$choice2 [L807] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L814] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 142 locations, 2 error locations. Result: UNSAFE, OverallTime: 16.0s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 4.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1721 SDtfs, 1685 SDslu, 3885 SDs, 0 SdLazy, 2616 SolverSat, 162 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 150 GetRequests, 31 SyntacticMatches, 13 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 1.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14811occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.7s AutomataMinimizationTime, 16 MinimizatonAttempts, 9689 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 660 NumberOfCodeBlocks, 660 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 590 ConstructedInterpolants, 0 QuantifiedInterpolants, 96571 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...