./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/rfi001_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/rfi001_tso.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d00f8f74ff25a59ad5e2435307831d3938469c19 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:21:50,026 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:21:50,030 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:21:50,049 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:21:50,049 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:21:50,051 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:21:50,054 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:21:50,063 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:21:50,069 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:21:50,074 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:21:50,075 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:21:50,077 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:21:50,078 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:21:50,081 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:21:50,082 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:21:50,084 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:21:50,086 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:21:50,089 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:21:50,090 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:21:50,092 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:21:50,094 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:21:50,095 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:21:50,096 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:21:50,097 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:21:50,100 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:21:50,100 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:21:50,100 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:21:50,101 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:21:50,102 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:21:50,103 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:21:50,103 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:21:50,104 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:21:50,105 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:21:50,106 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:21:50,107 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:21:50,107 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:21:50,108 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:21:50,109 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:21:50,109 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:21:50,110 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:21:50,111 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:21:50,112 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:21:50,127 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:21:50,127 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:21:50,128 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:21:50,129 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:21:50,129 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:21:50,129 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:21:50,130 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:21:50,130 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:21:50,130 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:21:50,131 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:21:50,131 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:21:50,131 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:21:50,131 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:21:50,132 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:21:50,132 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:21:50,132 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:21:50,132 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:21:50,133 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:21:50,133 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:21:50,133 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:21:50,134 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:21:50,134 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:21:50,134 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:21:50,135 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:21:50,135 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:21:50,135 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:21:50,136 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:21:50,136 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:21:50,136 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:21:50,136 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d00f8f74ff25a59ad5e2435307831d3938469c19 [2019-11-28 18:21:50,465 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:21:50,487 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:21:50,493 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:21:50,494 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:21:50,496 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:21:50,497 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/rfi001_tso.opt.i [2019-11-28 18:21:50,586 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ce0e3f2f5/ff7d3a3e57684dafa5b1aac417e74ef4/FLAG5a45ef556 [2019-11-28 18:21:51,108 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:21:51,109 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/rfi001_tso.opt.i [2019-11-28 18:21:51,135 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ce0e3f2f5/ff7d3a3e57684dafa5b1aac417e74ef4/FLAG5a45ef556 [2019-11-28 18:21:51,368 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ce0e3f2f5/ff7d3a3e57684dafa5b1aac417e74ef4 [2019-11-28 18:21:51,373 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:21:51,375 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:21:51,379 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:21:51,379 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:21:51,383 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:21:51,384 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:21:51" (1/1) ... [2019-11-28 18:21:51,388 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5421bc39 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:51, skipping insertion in model container [2019-11-28 18:21:51,389 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:21:51" (1/1) ... [2019-11-28 18:21:51,396 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:21:51,454 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:21:51,977 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:21:51,990 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:21:52,075 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:21:52,162 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:21:52,162 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52 WrapperNode [2019-11-28 18:21:52,162 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:21:52,163 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:21:52,164 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:21:52,164 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:21:52,174 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,202 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,245 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:21:52,246 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:21:52,246 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:21:52,246 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:21:52,256 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,256 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,260 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,261 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,271 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,275 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,279 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... [2019-11-28 18:21:52,284 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:21:52,285 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:21:52,285 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:21:52,285 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:21:52,286 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:21:52,362 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:21:52,362 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:21:52,362 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:21:52,362 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:21:52,363 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:21:52,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:21:52,363 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:21:52,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:21:52,364 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:21:52,364 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:21:52,364 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:21:52,366 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:21:53,085 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:21:53,085 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:21:53,086 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:21:53 BoogieIcfgContainer [2019-11-28 18:21:53,087 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:21:53,088 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:21:53,088 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:21:53,091 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:21:53,092 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:21:51" (1/3) ... [2019-11-28 18:21:53,093 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2065b674 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:21:53, skipping insertion in model container [2019-11-28 18:21:53,093 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:21:52" (2/3) ... [2019-11-28 18:21:53,094 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2065b674 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:21:53, skipping insertion in model container [2019-11-28 18:21:53,094 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:21:53" (3/3) ... [2019-11-28 18:21:53,096 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi001_tso.opt.i [2019-11-28 18:21:53,106 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:21:53,106 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:21:53,114 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:21:53,115 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:21:53,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,148 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,149 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,149 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,151 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,151 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,151 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,159 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,159 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,160 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,160 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,160 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,161 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,161 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,167 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,168 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,169 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,169 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,169 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,170 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:21:53,184 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:21:53,201 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:21:53,202 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:21:53,202 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:21:53,202 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:21:53,202 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:21:53,203 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:21:53,203 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:21:53,203 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:21:53,221 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 148 places, 182 transitions [2019-11-28 18:21:53,223 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-11-28 18:21:53,306 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-11-28 18:21:53,307 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:21:53,321 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:21:53,342 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-11-28 18:21:53,386 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-11-28 18:21:53,387 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:21:53,393 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:21:53,409 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-11-28 18:21:53,410 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:21:57,745 WARN L192 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-11-28 18:21:57,861 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-11-28 18:21:57,905 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46553 [2019-11-28 18:21:57,906 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-11-28 18:21:57,910 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-11-28 18:21:58,572 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8413 states. [2019-11-28 18:21:58,575 INFO L276 IsEmpty]: Start isEmpty. Operand 8413 states. [2019-11-28 18:21:58,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-11-28 18:21:58,600 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:58,601 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-11-28 18:21:58,602 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:58,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:58,614 INFO L82 PathProgramCache]: Analyzing trace with hash 698534967, now seen corresponding path program 1 times [2019-11-28 18:21:58,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:58,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141419817] [2019-11-28 18:21:58,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:58,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:21:59,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:21:59,087 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141419817] [2019-11-28 18:21:59,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:21:59,090 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:21:59,091 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1311886248] [2019-11-28 18:21:59,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:21:59,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:21:59,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:21:59,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:59,126 INFO L87 Difference]: Start difference. First operand 8413 states. Second operand 3 states. [2019-11-28 18:21:59,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:21:59,412 INFO L93 Difference]: Finished difference Result 8365 states and 27377 transitions. [2019-11-28 18:21:59,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:21:59,414 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-11-28 18:21:59,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:21:59,516 INFO L225 Difference]: With dead ends: 8365 [2019-11-28 18:21:59,516 INFO L226 Difference]: Without dead ends: 8196 [2019-11-28 18:21:59,517 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:21:59,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8196 states. [2019-11-28 18:21:59,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8196 to 8196. [2019-11-28 18:21:59,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8196 states. [2019-11-28 18:21:59,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8196 states to 8196 states and 26857 transitions. [2019-11-28 18:21:59,937 INFO L78 Accepts]: Start accepts. Automaton has 8196 states and 26857 transitions. Word has length 5 [2019-11-28 18:21:59,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:21:59,938 INFO L462 AbstractCegarLoop]: Abstraction has 8196 states and 26857 transitions. [2019-11-28 18:21:59,938 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:21:59,938 INFO L276 IsEmpty]: Start isEmpty. Operand 8196 states and 26857 transitions. [2019-11-28 18:21:59,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:21:59,941 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:21:59,941 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:21:59,942 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:21:59,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:21:59,942 INFO L82 PathProgramCache]: Analyzing trace with hash 1108629868, now seen corresponding path program 1 times [2019-11-28 18:21:59,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:21:59,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800413971] [2019-11-28 18:21:59,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:21:59,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:00,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:00,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800413971] [2019-11-28 18:22:00,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:00,070 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:22:00,070 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907961105] [2019-11-28 18:22:00,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:22:00,072 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:00,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:22:00,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:22:00,073 INFO L87 Difference]: Start difference. First operand 8196 states and 26857 transitions. Second operand 4 states. [2019-11-28 18:22:00,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:00,453 INFO L93 Difference]: Finished difference Result 13084 states and 41046 transitions. [2019-11-28 18:22:00,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:22:00,453 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:22:00,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:00,530 INFO L225 Difference]: With dead ends: 13084 [2019-11-28 18:22:00,531 INFO L226 Difference]: Without dead ends: 13077 [2019-11-28 18:22:00,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:22:00,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13077 states. [2019-11-28 18:22:00,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13077 to 11568. [2019-11-28 18:22:00,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11568 states. [2019-11-28 18:22:01,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11568 states to 11568 states and 36838 transitions. [2019-11-28 18:22:01,041 INFO L78 Accepts]: Start accepts. Automaton has 11568 states and 36838 transitions. Word has length 11 [2019-11-28 18:22:01,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:01,042 INFO L462 AbstractCegarLoop]: Abstraction has 11568 states and 36838 transitions. [2019-11-28 18:22:01,042 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:22:01,042 INFO L276 IsEmpty]: Start isEmpty. Operand 11568 states and 36838 transitions. [2019-11-28 18:22:01,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:22:01,045 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:01,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:01,046 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:01,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:01,046 INFO L82 PathProgramCache]: Analyzing trace with hash 531606898, now seen corresponding path program 1 times [2019-11-28 18:22:01,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:01,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926145160] [2019-11-28 18:22:01,203 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:01,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:01,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:01,261 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926145160] [2019-11-28 18:22:01,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:01,262 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:22:01,262 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2027653154] [2019-11-28 18:22:01,262 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:22:01,263 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:01,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:22:01,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:22:01,264 INFO L87 Difference]: Start difference. First operand 11568 states and 36838 transitions. Second operand 4 states. [2019-11-28 18:22:01,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:01,549 INFO L93 Difference]: Finished difference Result 14627 states and 46118 transitions. [2019-11-28 18:22:01,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:22:01,549 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:22:01,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:01,604 INFO L225 Difference]: With dead ends: 14627 [2019-11-28 18:22:01,604 INFO L226 Difference]: Without dead ends: 14627 [2019-11-28 18:22:01,605 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:22:01,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14627 states. [2019-11-28 18:22:02,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14627 to 12851. [2019-11-28 18:22:02,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12851 states. [2019-11-28 18:22:02,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12851 states to 12851 states and 40863 transitions. [2019-11-28 18:22:02,065 INFO L78 Accepts]: Start accepts. Automaton has 12851 states and 40863 transitions. Word has length 11 [2019-11-28 18:22:02,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:02,066 INFO L462 AbstractCegarLoop]: Abstraction has 12851 states and 40863 transitions. [2019-11-28 18:22:02,066 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:22:02,066 INFO L276 IsEmpty]: Start isEmpty. Operand 12851 states and 40863 transitions. [2019-11-28 18:22:02,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:22:02,072 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:02,073 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:02,073 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:02,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:02,073 INFO L82 PathProgramCache]: Analyzing trace with hash 1151367975, now seen corresponding path program 1 times [2019-11-28 18:22:02,074 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:02,074 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62671985] [2019-11-28 18:22:02,075 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:02,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:02,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:02,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [62671985] [2019-11-28 18:22:02,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:02,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:22:02,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008147931] [2019-11-28 18:22:02,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:22:02,224 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:02,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:22:02,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:22:02,225 INFO L87 Difference]: Start difference. First operand 12851 states and 40863 transitions. Second operand 5 states. [2019-11-28 18:22:02,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:02,720 INFO L93 Difference]: Finished difference Result 17501 states and 54434 transitions. [2019-11-28 18:22:02,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:22:02,721 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-11-28 18:22:02,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:02,774 INFO L225 Difference]: With dead ends: 17501 [2019-11-28 18:22:02,774 INFO L226 Difference]: Without dead ends: 17494 [2019-11-28 18:22:02,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:22:02,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17494 states. [2019-11-28 18:22:03,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17494 to 12893. [2019-11-28 18:22:03,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12893 states. [2019-11-28 18:22:03,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12893 states to 12893 states and 40855 transitions. [2019-11-28 18:22:03,439 INFO L78 Accepts]: Start accepts. Automaton has 12893 states and 40855 transitions. Word has length 17 [2019-11-28 18:22:03,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:03,442 INFO L462 AbstractCegarLoop]: Abstraction has 12893 states and 40855 transitions. [2019-11-28 18:22:03,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:22:03,443 INFO L276 IsEmpty]: Start isEmpty. Operand 12893 states and 40855 transitions. [2019-11-28 18:22:03,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:22:03,458 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:03,458 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:03,459 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:03,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:03,459 INFO L82 PathProgramCache]: Analyzing trace with hash -2101636237, now seen corresponding path program 1 times [2019-11-28 18:22:03,459 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:03,460 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685233879] [2019-11-28 18:22:03,460 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:03,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:03,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:03,528 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [685233879] [2019-11-28 18:22:03,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:03,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:22:03,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210511144] [2019-11-28 18:22:03,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:22:03,529 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:03,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:22:03,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:03,529 INFO L87 Difference]: Start difference. First operand 12893 states and 40855 transitions. Second operand 3 states. [2019-11-28 18:22:03,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:03,654 INFO L93 Difference]: Finished difference Result 15714 states and 49940 transitions. [2019-11-28 18:22:03,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:22:03,655 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:22:03,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:03,694 INFO L225 Difference]: With dead ends: 15714 [2019-11-28 18:22:03,694 INFO L226 Difference]: Without dead ends: 15714 [2019-11-28 18:22:03,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:03,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15714 states. [2019-11-28 18:22:04,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15714 to 14811. [2019-11-28 18:22:04,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14811 states. [2019-11-28 18:22:04,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14811 states to 14811 states and 47249 transitions. [2019-11-28 18:22:04,115 INFO L78 Accepts]: Start accepts. Automaton has 14811 states and 47249 transitions. Word has length 25 [2019-11-28 18:22:04,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:04,116 INFO L462 AbstractCegarLoop]: Abstraction has 14811 states and 47249 transitions. [2019-11-28 18:22:04,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:22:04,116 INFO L276 IsEmpty]: Start isEmpty. Operand 14811 states and 47249 transitions. [2019-11-28 18:22:04,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:22:04,130 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:04,130 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:04,131 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:04,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:04,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1939096541, now seen corresponding path program 1 times [2019-11-28 18:22:04,131 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:04,132 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380860694] [2019-11-28 18:22:04,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:04,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:04,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:04,191 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [380860694] [2019-11-28 18:22:04,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:04,191 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:22:04,191 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1345349797] [2019-11-28 18:22:04,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:22:04,192 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:04,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:22:04,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:22:04,193 INFO L87 Difference]: Start difference. First operand 14811 states and 47249 transitions. Second operand 4 states. [2019-11-28 18:22:04,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:04,225 INFO L93 Difference]: Finished difference Result 2380 states and 5507 transitions. [2019-11-28 18:22:04,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:22:04,226 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-11-28 18:22:04,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:04,230 INFO L225 Difference]: With dead ends: 2380 [2019-11-28 18:22:04,230 INFO L226 Difference]: Without dead ends: 2094 [2019-11-28 18:22:04,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:22:04,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2094 states. [2019-11-28 18:22:04,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2094 to 2094. [2019-11-28 18:22:04,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2094 states. [2019-11-28 18:22:04,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2094 states to 2094 states and 4716 transitions. [2019-11-28 18:22:04,271 INFO L78 Accepts]: Start accepts. Automaton has 2094 states and 4716 transitions. Word has length 25 [2019-11-28 18:22:04,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:04,272 INFO L462 AbstractCegarLoop]: Abstraction has 2094 states and 4716 transitions. [2019-11-28 18:22:04,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:22:04,272 INFO L276 IsEmpty]: Start isEmpty. Operand 2094 states and 4716 transitions. [2019-11-28 18:22:04,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:22:04,277 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:04,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:04,277 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:04,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:04,278 INFO L82 PathProgramCache]: Analyzing trace with hash -673430796, now seen corresponding path program 1 times [2019-11-28 18:22:04,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:04,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923943019] [2019-11-28 18:22:04,279 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:04,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:04,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:04,360 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1923943019] [2019-11-28 18:22:04,360 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:04,360 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:22:04,361 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540305155] [2019-11-28 18:22:04,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:22:04,362 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:04,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:22:04,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:22:04,362 INFO L87 Difference]: Start difference. First operand 2094 states and 4716 transitions. Second operand 5 states. [2019-11-28 18:22:04,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:04,406 INFO L93 Difference]: Finished difference Result 429 states and 783 transitions. [2019-11-28 18:22:04,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:22:04,407 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:22:04,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:04,408 INFO L225 Difference]: With dead ends: 429 [2019-11-28 18:22:04,408 INFO L226 Difference]: Without dead ends: 383 [2019-11-28 18:22:04,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:22:04,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2019-11-28 18:22:04,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 348. [2019-11-28 18:22:04,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2019-11-28 18:22:04,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 628 transitions. [2019-11-28 18:22:04,416 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 628 transitions. Word has length 37 [2019-11-28 18:22:04,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:04,416 INFO L462 AbstractCegarLoop]: Abstraction has 348 states and 628 transitions. [2019-11-28 18:22:04,417 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:22:04,417 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 628 transitions. [2019-11-28 18:22:04,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:22:04,419 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:04,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:04,419 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:04,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:04,420 INFO L82 PathProgramCache]: Analyzing trace with hash 939573543, now seen corresponding path program 1 times [2019-11-28 18:22:04,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:04,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974288866] [2019-11-28 18:22:04,421 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:04,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:04,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:04,511 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [974288866] [2019-11-28 18:22:04,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:04,512 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:22:04,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1528386134] [2019-11-28 18:22:04,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:22:04,513 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:04,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:22:04,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:04,514 INFO L87 Difference]: Start difference. First operand 348 states and 628 transitions. Second operand 3 states. [2019-11-28 18:22:04,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:04,559 INFO L93 Difference]: Finished difference Result 352 states and 622 transitions. [2019-11-28 18:22:04,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:22:04,559 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:22:04,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:04,560 INFO L225 Difference]: With dead ends: 352 [2019-11-28 18:22:04,562 INFO L226 Difference]: Without dead ends: 352 [2019-11-28 18:22:04,562 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:04,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2019-11-28 18:22:04,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 344. [2019-11-28 18:22:04,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344 states. [2019-11-28 18:22:04,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 614 transitions. [2019-11-28 18:22:04,570 INFO L78 Accepts]: Start accepts. Automaton has 344 states and 614 transitions. Word has length 52 [2019-11-28 18:22:04,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:04,572 INFO L462 AbstractCegarLoop]: Abstraction has 344 states and 614 transitions. [2019-11-28 18:22:04,572 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:22:04,572 INFO L276 IsEmpty]: Start isEmpty. Operand 344 states and 614 transitions. [2019-11-28 18:22:04,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:22:04,573 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:04,573 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:04,574 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:04,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:04,574 INFO L82 PathProgramCache]: Analyzing trace with hash 933754688, now seen corresponding path program 1 times [2019-11-28 18:22:04,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:04,575 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991973966] [2019-11-28 18:22:04,575 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:04,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:04,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:04,727 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991973966] [2019-11-28 18:22:04,728 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:04,728 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:22:04,728 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1521668255] [2019-11-28 18:22:04,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:22:04,729 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:04,729 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:22:04,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:22:04,730 INFO L87 Difference]: Start difference. First operand 344 states and 614 transitions. Second operand 6 states. [2019-11-28 18:22:05,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:05,007 INFO L93 Difference]: Finished difference Result 492 states and 884 transitions. [2019-11-28 18:22:05,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:22:05,007 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:22:05,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:05,008 INFO L225 Difference]: With dead ends: 492 [2019-11-28 18:22:05,008 INFO L226 Difference]: Without dead ends: 492 [2019-11-28 18:22:05,009 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:22:05,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2019-11-28 18:22:05,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 461. [2019-11-28 18:22:05,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 461 states. [2019-11-28 18:22:05,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461 states to 461 states and 830 transitions. [2019-11-28 18:22:05,016 INFO L78 Accepts]: Start accepts. Automaton has 461 states and 830 transitions. Word has length 52 [2019-11-28 18:22:05,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:05,017 INFO L462 AbstractCegarLoop]: Abstraction has 461 states and 830 transitions. [2019-11-28 18:22:05,017 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:22:05,017 INFO L276 IsEmpty]: Start isEmpty. Operand 461 states and 830 transitions. [2019-11-28 18:22:05,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:22:05,019 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:05,019 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:05,019 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:05,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:05,020 INFO L82 PathProgramCache]: Analyzing trace with hash 1521577966, now seen corresponding path program 2 times [2019-11-28 18:22:05,020 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:05,021 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [102312470] [2019-11-28 18:22:05,021 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:05,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:05,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:05,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [102312470] [2019-11-28 18:22:05,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:05,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:22:05,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1472898042] [2019-11-28 18:22:05,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:22:05,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:05,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:22:05,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:22:05,130 INFO L87 Difference]: Start difference. First operand 461 states and 830 transitions. Second operand 6 states. [2019-11-28 18:22:05,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:05,432 INFO L93 Difference]: Finished difference Result 539 states and 931 transitions. [2019-11-28 18:22:05,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:22:05,433 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:22:05,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:05,434 INFO L225 Difference]: With dead ends: 539 [2019-11-28 18:22:05,434 INFO L226 Difference]: Without dead ends: 539 [2019-11-28 18:22:05,434 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:22:05,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-11-28 18:22:05,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 443. [2019-11-28 18:22:05,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 443 states. [2019-11-28 18:22:05,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 443 states to 443 states and 776 transitions. [2019-11-28 18:22:05,441 INFO L78 Accepts]: Start accepts. Automaton has 443 states and 776 transitions. Word has length 52 [2019-11-28 18:22:05,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:05,441 INFO L462 AbstractCegarLoop]: Abstraction has 443 states and 776 transitions. [2019-11-28 18:22:05,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:22:05,441 INFO L276 IsEmpty]: Start isEmpty. Operand 443 states and 776 transitions. [2019-11-28 18:22:05,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:22:05,443 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:05,443 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:05,443 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:05,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:05,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1779624896, now seen corresponding path program 3 times [2019-11-28 18:22:05,444 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:05,444 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216180470] [2019-11-28 18:22:05,445 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:05,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:05,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:05,550 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216180470] [2019-11-28 18:22:05,550 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:05,551 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:22:05,551 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897073902] [2019-11-28 18:22:05,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:22:05,552 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:05,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:22:05,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:22:05,552 INFO L87 Difference]: Start difference. First operand 443 states and 776 transitions. Second operand 7 states. [2019-11-28 18:22:05,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:05,944 INFO L93 Difference]: Finished difference Result 637 states and 1106 transitions. [2019-11-28 18:22:05,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-28 18:22:05,945 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:22:05,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:05,947 INFO L225 Difference]: With dead ends: 637 [2019-11-28 18:22:05,947 INFO L226 Difference]: Without dead ends: 637 [2019-11-28 18:22:05,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:22:05,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 637 states. [2019-11-28 18:22:05,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 637 to 443. [2019-11-28 18:22:05,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 443 states. [2019-11-28 18:22:05,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 443 states to 443 states and 776 transitions. [2019-11-28 18:22:05,954 INFO L78 Accepts]: Start accepts. Automaton has 443 states and 776 transitions. Word has length 52 [2019-11-28 18:22:05,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:05,955 INFO L462 AbstractCegarLoop]: Abstraction has 443 states and 776 transitions. [2019-11-28 18:22:05,955 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:22:05,955 INFO L276 IsEmpty]: Start isEmpty. Operand 443 states and 776 transitions. [2019-11-28 18:22:05,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:22:05,956 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:05,956 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:05,957 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:05,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:05,957 INFO L82 PathProgramCache]: Analyzing trace with hash 1595558797, now seen corresponding path program 1 times [2019-11-28 18:22:05,957 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:05,958 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588229986] [2019-11-28 18:22:05,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:05,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:06,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:06,163 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588229986] [2019-11-28 18:22:06,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:06,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-28 18:22:06,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1673574157] [2019-11-28 18:22:06,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-28 18:22:06,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:06,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-28 18:22:06,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:22:06,166 INFO L87 Difference]: Start difference. First operand 443 states and 776 transitions. Second operand 8 states. [2019-11-28 18:22:06,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:06,652 INFO L93 Difference]: Finished difference Result 786 states and 1385 transitions. [2019-11-28 18:22:06,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:22:06,652 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 53 [2019-11-28 18:22:06,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:06,654 INFO L225 Difference]: With dead ends: 786 [2019-11-28 18:22:06,654 INFO L226 Difference]: Without dead ends: 786 [2019-11-28 18:22:06,655 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=128, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:22:06,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 786 states. [2019-11-28 18:22:06,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 786 to 453. [2019-11-28 18:22:06,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 453 states. [2019-11-28 18:22:06,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 453 states to 453 states and 802 transitions. [2019-11-28 18:22:06,665 INFO L78 Accepts]: Start accepts. Automaton has 453 states and 802 transitions. Word has length 53 [2019-11-28 18:22:06,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:06,666 INFO L462 AbstractCegarLoop]: Abstraction has 453 states and 802 transitions. [2019-11-28 18:22:06,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-28 18:22:06,818 INFO L276 IsEmpty]: Start isEmpty. Operand 453 states and 802 transitions. [2019-11-28 18:22:06,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:22:06,820 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:06,820 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:06,820 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:06,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:06,820 INFO L82 PathProgramCache]: Analyzing trace with hash 165214383, now seen corresponding path program 2 times [2019-11-28 18:22:06,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:06,821 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217309401] [2019-11-28 18:22:06,821 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:06,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:06,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:06,950 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217309401] [2019-11-28 18:22:06,951 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:06,951 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:22:06,951 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694541946] [2019-11-28 18:22:06,951 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:22:06,952 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:06,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:22:06,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:06,952 INFO L87 Difference]: Start difference. First operand 453 states and 802 transitions. Second operand 3 states. [2019-11-28 18:22:06,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:06,993 INFO L93 Difference]: Finished difference Result 452 states and 800 transitions. [2019-11-28 18:22:06,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:22:06,993 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:22:06,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:06,994 INFO L225 Difference]: With dead ends: 452 [2019-11-28 18:22:06,994 INFO L226 Difference]: Without dead ends: 452 [2019-11-28 18:22:06,995 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:06,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 452 states. [2019-11-28 18:22:07,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 452 to 349. [2019-11-28 18:22:07,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349 states. [2019-11-28 18:22:07,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 607 transitions. [2019-11-28 18:22:07,001 INFO L78 Accepts]: Start accepts. Automaton has 349 states and 607 transitions. Word has length 53 [2019-11-28 18:22:07,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:07,001 INFO L462 AbstractCegarLoop]: Abstraction has 349 states and 607 transitions. [2019-11-28 18:22:07,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:22:07,002 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 607 transitions. [2019-11-28 18:22:07,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:22:07,003 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:07,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:07,004 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:07,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:07,004 INFO L82 PathProgramCache]: Analyzing trace with hash 160092264, now seen corresponding path program 1 times [2019-11-28 18:22:07,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:07,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131519797] [2019-11-28 18:22:07,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:07,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:07,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:07,063 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131519797] [2019-11-28 18:22:07,064 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:07,064 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:22:07,064 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441733142] [2019-11-28 18:22:07,064 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:22:07,065 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:07,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:22:07,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:07,066 INFO L87 Difference]: Start difference. First operand 349 states and 607 transitions. Second operand 3 states. [2019-11-28 18:22:07,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:07,083 INFO L93 Difference]: Finished difference Result 343 states and 590 transitions. [2019-11-28 18:22:07,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:22:07,084 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:22:07,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:07,084 INFO L225 Difference]: With dead ends: 343 [2019-11-28 18:22:07,085 INFO L226 Difference]: Without dead ends: 343 [2019-11-28 18:22:07,085 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:22:07,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2019-11-28 18:22:07,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 343. [2019-11-28 18:22:07,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-11-28 18:22:07,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 590 transitions. [2019-11-28 18:22:07,091 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 590 transitions. Word has length 53 [2019-11-28 18:22:07,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:07,091 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 590 transitions. [2019-11-28 18:22:07,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:22:07,092 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 590 transitions. [2019-11-28 18:22:07,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:22:07,093 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:07,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:07,093 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:07,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:07,094 INFO L82 PathProgramCache]: Analyzing trace with hash -798816837, now seen corresponding path program 1 times [2019-11-28 18:22:07,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:07,094 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806357043] [2019-11-28 18:22:07,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:07,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:22:07,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:22:07,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806357043] [2019-11-28 18:22:07,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:22:07,291 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:22:07,291 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1203790720] [2019-11-28 18:22:07,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:22:07,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:22:07,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:22:07,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:22:07,292 INFO L87 Difference]: Start difference. First operand 343 states and 590 transitions. Second operand 6 states. [2019-11-28 18:22:07,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:22:07,359 INFO L93 Difference]: Finished difference Result 522 states and 894 transitions. [2019-11-28 18:22:07,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:22:07,360 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-11-28 18:22:07,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:22:07,360 INFO L225 Difference]: With dead ends: 522 [2019-11-28 18:22:07,360 INFO L226 Difference]: Without dead ends: 196 [2019-11-28 18:22:07,361 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:22:07,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2019-11-28 18:22:07,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2019-11-28 18:22:07,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2019-11-28 18:22:07,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 330 transitions. [2019-11-28 18:22:07,366 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 330 transitions. Word has length 54 [2019-11-28 18:22:07,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:22:07,366 INFO L462 AbstractCegarLoop]: Abstraction has 196 states and 330 transitions. [2019-11-28 18:22:07,366 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:22:07,366 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 330 transitions. [2019-11-28 18:22:07,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:22:07,367 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:22:07,367 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:22:07,367 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:22:07,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:22:07,368 INFO L82 PathProgramCache]: Analyzing trace with hash -1731930561, now seen corresponding path program 2 times [2019-11-28 18:22:07,368 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:22:07,368 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1318251004] [2019-11-28 18:22:07,368 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:22:07,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:22:07,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:22:07,529 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:22:07,531 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:22:07,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~z~0_122 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1615~0.base_19|) 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1615~0.base_19|) (= v_~y$mem_tmp~0_21 0) (= v_~y$r_buff1_thd1~0_178 0) (= 0 v_~__unbuffered_p1_EBX~0_131) (= v_~weak$$choice2~0_120 0) (= v_~__unbuffered_p1_EAX~0_131 0) (= v_~y$r_buff0_thd0~0_347 0) (= 0 v_~y$r_buff1_thd2~0_171) (= v_~x~0_94 0) (= 0 v_~weak$$choice0~0_15) (= v_~y$read_delayed~0_6 0) (= |v_ULTIMATE.start_main_~#t1615~0.offset_14| 0) (= 0 v_~y$r_buff0_thd2~0_225) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~__unbuffered_cnt~0_63) (= v_~y$r_buff0_thd1~0_109 0) (= v_~y$w_buff0_used~0_663 0) (= v_~y$w_buff1~0_180 0) (= 0 v_~y$flush_delayed~0_36) (= |v_#NULL.offset_5| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1615~0.base_19| 4)) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t1615~0.base_19| 1)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1615~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1615~0.base_19|) |v_ULTIMATE.start_main_~#t1615~0.offset_14| 0)) |v_#memory_int_15|) (= v_~y~0_158 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff1_thd0~0_274 0) (= 0 v_~y$w_buff0~0_245) (= v_~main$tmp_guard1~0_25 0) (= v_~y$w_buff1_used~0_350 0) (= 0 |v_#NULL.base_5|) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_33|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ULTIMATE.start_main_~#t1615~0.offset=|v_ULTIMATE.start_main_~#t1615~0.offset_14|, ~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_131, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_109, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_15|, ULTIMATE.start_main_~#t1615~0.base=|v_ULTIMATE.start_main_~#t1615~0.base_19|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_~#t1616~0.offset=|v_ULTIMATE.start_main_~#t1616~0.offset_13|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_28|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_46|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_180, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_225, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_274, ~x~0=v_~x~0_94, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_663, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_44|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_45|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_178, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_42|, ~y$w_buff0~0=v_~y$w_buff0~0_245, ULTIMATE.start_main_~#t1616~0.base=|v_ULTIMATE.start_main_~#t1616~0.base_16|, ~y~0=v_~y~0_158, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_131, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_31|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_34|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_171, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_347, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~z~0=v_~z~0_122, ~weak$$choice2~0=v_~weak$$choice2~0_120, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_350} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ULTIMATE.start_main_~#t1615~0.offset, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_~#t1615~0.base, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_~#t1616~0.offset, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ULTIMATE.start_main_~#t1616~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:22:07,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L789-1-->L791: Formula: (and (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1616~0.base_11| 1)) (= |v_ULTIMATE.start_main_~#t1616~0.offset_10| 0) (= (store |v_#length_12| |v_ULTIMATE.start_main_~#t1616~0.base_11| 4) |v_#length_11|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1616~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1616~0.base_11|) |v_ULTIMATE.start_main_~#t1616~0.offset_10| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1616~0.base_11|)) (not (= |v_ULTIMATE.start_main_~#t1616~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1616~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1616~0.offset=|v_ULTIMATE.start_main_~#t1616~0.offset_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, ULTIMATE.start_main_~#t1616~0.base=|v_ULTIMATE.start_main_~#t1616~0.base_11|, #length=|v_#length_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1616~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1616~0.base, #length] because there is no mapped edge [2019-11-28 18:22:07,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [589] [589] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_47 256))) (not (= 0 (mod v_~y$w_buff0_used~0_86 256))))) 1 0)) (= 1 v_~y$w_buff0_used~0_86) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= 2 v_~y$w_buff0~0_19) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|) (= v_~y$w_buff0~0_20 v_~y$w_buff1~0_21) (= v_~y$w_buff1_used~0_47 v_~y$w_buff0_used~0_87)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$w_buff0~0=v_~y$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_86, ~y$w_buff1~0=v_~y$w_buff1~0_21, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~y$w_buff0~0=v_~y$w_buff0~0_19, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:22:07,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L732-2-->L732-5: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1134684065 256) 0)) (.cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out1134684065| |P0Thread1of1ForFork0_#t~ite4_Out1134684065|)) (.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In1134684065 256)))) (or (and (= ~y~0_In1134684065 |P0Thread1of1ForFork0_#t~ite3_Out1134684065|) .cse0 (or .cse1 .cse2)) (and (not .cse1) .cse0 (not .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out1134684065| ~y$w_buff1~0_In1134684065)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1134684065, ~y$w_buff1~0=~y$w_buff1~0_In1134684065, ~y~0=~y~0_In1134684065, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1134684065} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1134684065, P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1134684065|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out1134684065|, ~y$w_buff1~0=~y$w_buff1~0_In1134684065, ~y~0=~y~0_In1134684065, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1134684065} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:22:07,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L733-->L733-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1877433973 256))) (.cse1 (= (mod ~y$r_buff0_thd1~0_In1877433973 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1877433973| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1877433973| ~y$w_buff0_used~0_In1877433973) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1877433973, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1877433973} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1877433973|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1877433973, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1877433973} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:22:07,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-1174931234 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1174931234 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1174931234 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In-1174931234 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1174931234| 0)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1174931234| ~y$w_buff1_used~0_In-1174931234) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1174931234, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1174931234, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1174931234, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1174931234} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1174931234|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1174931234, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1174931234, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1174931234, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1174931234} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:22:07,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1256501331 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1256501331 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out1256501331|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd1~0_In1256501331 |P0Thread1of1ForFork0_#t~ite7_Out1256501331|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1256501331, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1256501331} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1256501331, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1256501331|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1256501331} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:22:07,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L736-->L736-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-693137201 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-693137201 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In-693137201 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-693137201 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-693137201| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-693137201| ~y$r_buff1_thd1~0_In-693137201) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-693137201, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-693137201, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-693137201, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-693137201} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-693137201, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-693137201, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-693137201|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-693137201, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-693137201} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:22:07,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_30|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_125, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_29|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:22:07,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In709627407 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In709627407 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out709627407|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In709627407 |P1Thread1of1ForFork1_#t~ite11_Out709627407|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In709627407, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In709627407} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In709627407, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In709627407, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out709627407|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:22:07,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In124788277 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In124788277 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In124788277 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In124788277 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In124788277 |P1Thread1of1ForFork1_#t~ite12_Out124788277|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out124788277|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In124788277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In124788277, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In124788277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In124788277} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In124788277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In124788277, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In124788277, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out124788277|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In124788277} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:22:07,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L769-->L770: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In391055107 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In391055107 256))) (.cse1 (= ~y$r_buff0_thd2~0_In391055107 ~y$r_buff0_thd2~0_Out391055107))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~y$r_buff0_thd2~0_Out391055107) (not .cse0)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In391055107, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In391055107} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In391055107, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out391055107, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out391055107|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:22:07,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [667] [667] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In971913028 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd2~0_In971913028 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In971913028 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In971913028 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out971913028|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite14_Out971913028| ~y$r_buff1_thd2~0_In971913028) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In971913028, ~y$w_buff0_used~0=~y$w_buff0_used~0_In971913028, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In971913028, ~y$w_buff1_used~0=~y$w_buff1_used~0_In971913028} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In971913028, ~y$w_buff0_used~0=~y$w_buff0_used~0_In971913028, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In971913028, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out971913028|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In971913028} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:22:07,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= v_~y$r_buff1_thd2~0_144 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_144, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:22:07,546 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_5 256))) (or (= 0 (mod v_~y$r_buff0_thd0~0_132 256)) (= 0 (mod v_~y$w_buff0_used~0_236 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:22:07,546 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L797-2-->L797-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-377358369 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-377358369 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-377358369| ~y$w_buff1~0_In-377358369) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-377358369| ~y~0_In-377358369)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-377358369, ~y~0=~y~0_In-377358369, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-377358369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-377358369} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-377358369|, ~y$w_buff1~0=~y$w_buff1~0_In-377358369, ~y~0=~y~0_In-377358369, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-377358369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-377358369} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:22:07,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [619] [619] L797-4-->L798: Formula: (= v_~y~0_44 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~y~0=v_~y~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-11-28 18:22:07,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [666] [666] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-284205548 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-284205548 256)))) (or (and (= ~y$w_buff0_used~0_In-284205548 |ULTIMATE.start_main_#t~ite19_Out-284205548|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite19_Out-284205548| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-284205548, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-284205548} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-284205548, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-284205548|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-284205548} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:22:07,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In272052021 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In272052021 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In272052021 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In272052021 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out272052021| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite20_Out272052021| ~y$w_buff1_used~0_In272052021) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In272052021, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In272052021, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In272052021, ~y$w_buff1_used~0=~y$w_buff1_used~0_In272052021} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In272052021, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In272052021, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out272052021|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In272052021, ~y$w_buff1_used~0=~y$w_buff1_used~0_In272052021} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:22:07,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-886709957 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-886709957 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-886709957| ~y$r_buff0_thd0~0_In-886709957) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite21_Out-886709957| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-886709957, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-886709957} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-886709957, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-886709957, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-886709957|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:22:07,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-31251218 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-31251218 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-31251218 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-31251218 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-31251218| ~y$r_buff1_thd0~0_In-31251218) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out-31251218| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-31251218, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-31251218, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-31251218, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-31251218} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-31251218, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-31251218, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-31251218, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-31251218|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-31251218} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:22:07,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In593710423 256)))) (or (and (= ~y$w_buff1_used~0_In593710423 |ULTIMATE.start_main_#t~ite38_Out593710423|) (= |ULTIMATE.start_main_#t~ite37_In593710423| |ULTIMATE.start_main_#t~ite37_Out593710423|) (not .cse0)) (and .cse0 (= |ULTIMATE.start_main_#t~ite38_Out593710423| |ULTIMATE.start_main_#t~ite37_Out593710423|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In593710423 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In593710423 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In593710423 256)) (and (= (mod ~y$r_buff1_thd0~0_In593710423 256) 0) .cse1))) (= ~y$w_buff1_used~0_In593710423 |ULTIMATE.start_main_#t~ite37_Out593710423|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In593710423, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In593710423, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In593710423|, ~weak$$choice2~0=~weak$$choice2~0_In593710423, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In593710423, ~y$w_buff1_used~0=~y$w_buff1_used~0_In593710423} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In593710423, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In593710423, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out593710423|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out593710423|, ~weak$$choice2~0=~weak$$choice2~0_In593710423, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In593710423, ~y$w_buff1_used~0=~y$w_buff1_used~0_In593710423} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-11-28 18:22:07,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [607] [607] L813-->L814: Formula: (and (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97) (not (= 0 (mod v_~weak$$choice2~0_26 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_26} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_26} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:22:07,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L816-->L819-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_16 256)) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= v_~y~0_114 v_~y$mem_tmp~0_17) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~y~0=v_~y~0_114, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_18|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:22:07,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [674] [674] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:22:07,632 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:22:07 BasicIcfg [2019-11-28 18:22:07,632 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:22:07,633 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:22:07,633 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:22:07,633 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:22:07,634 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:21:53" (3/4) ... [2019-11-28 18:22:07,636 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:22:07,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~z~0_122 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1615~0.base_19|) 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1615~0.base_19|) (= v_~y$mem_tmp~0_21 0) (= v_~y$r_buff1_thd1~0_178 0) (= 0 v_~__unbuffered_p1_EBX~0_131) (= v_~weak$$choice2~0_120 0) (= v_~__unbuffered_p1_EAX~0_131 0) (= v_~y$r_buff0_thd0~0_347 0) (= 0 v_~y$r_buff1_thd2~0_171) (= v_~x~0_94 0) (= 0 v_~weak$$choice0~0_15) (= v_~y$read_delayed~0_6 0) (= |v_ULTIMATE.start_main_~#t1615~0.offset_14| 0) (= 0 v_~y$r_buff0_thd2~0_225) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~__unbuffered_cnt~0_63) (= v_~y$r_buff0_thd1~0_109 0) (= v_~y$w_buff0_used~0_663 0) (= v_~y$w_buff1~0_180 0) (= 0 v_~y$flush_delayed~0_36) (= |v_#NULL.offset_5| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1615~0.base_19| 4)) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t1615~0.base_19| 1)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1615~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1615~0.base_19|) |v_ULTIMATE.start_main_~#t1615~0.offset_14| 0)) |v_#memory_int_15|) (= v_~y~0_158 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff1_thd0~0_274 0) (= 0 v_~y$w_buff0~0_245) (= v_~main$tmp_guard1~0_25 0) (= v_~y$w_buff1_used~0_350 0) (= 0 |v_#NULL.base_5|) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_44|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_33|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_30|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ULTIMATE.start_main_~#t1615~0.offset=|v_ULTIMATE.start_main_~#t1615~0.offset_14|, ~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_131, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_109, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_15|, ULTIMATE.start_main_~#t1615~0.base=|v_ULTIMATE.start_main_~#t1615~0.base_19|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_~#t1616~0.offset=|v_ULTIMATE.start_main_~#t1616~0.offset_13|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_23|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_28|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_46|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_180, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_225, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_274, ~x~0=v_~x~0_94, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_663, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_25|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_44|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_25|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_45|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_178, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_42|, ~y$w_buff0~0=v_~y$w_buff0~0_245, ULTIMATE.start_main_~#t1616~0.base=|v_ULTIMATE.start_main_~#t1616~0.base_16|, ~y~0=v_~y~0_158, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_131, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_31|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_29|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_34|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_171, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_15|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_347, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~z~0=v_~z~0_122, ~weak$$choice2~0=v_~weak$$choice2~0_120, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_350} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ULTIMATE.start_main_~#t1615~0.offset, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_~#t1615~0.base, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_~#t1616~0.offset, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ULTIMATE.start_main_~#t1616~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:22:07,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L789-1-->L791: Formula: (and (= |v_#valid_23| (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1616~0.base_11| 1)) (= |v_ULTIMATE.start_main_~#t1616~0.offset_10| 0) (= (store |v_#length_12| |v_ULTIMATE.start_main_~#t1616~0.base_11| 4) |v_#length_11|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1616~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1616~0.base_11|) |v_ULTIMATE.start_main_~#t1616~0.offset_10| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1616~0.base_11|)) (not (= |v_ULTIMATE.start_main_~#t1616~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1616~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1616~0.offset=|v_ULTIMATE.start_main_~#t1616~0.offset_10|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, ULTIMATE.start_main_~#t1616~0.base=|v_ULTIMATE.start_main_~#t1616~0.base_11|, #length=|v_#length_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1616~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1616~0.base, #length] because there is no mapped edge [2019-11-28 18:22:07,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [589] [589] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_47 256))) (not (= 0 (mod v_~y$w_buff0_used~0_86 256))))) 1 0)) (= 1 v_~y$w_buff0_used~0_86) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= 2 v_~y$w_buff0~0_19) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|) (= v_~y$w_buff0~0_20 v_~y$w_buff1~0_21) (= v_~y$w_buff1_used~0_47 v_~y$w_buff0_used~0_87)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$w_buff0~0=v_~y$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_86, ~y$w_buff1~0=v_~y$w_buff1~0_21, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~y$w_buff0~0=v_~y$w_buff0~0_19, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:22:07,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L732-2-->L732-5: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1134684065 256) 0)) (.cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out1134684065| |P0Thread1of1ForFork0_#t~ite4_Out1134684065|)) (.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In1134684065 256)))) (or (and (= ~y~0_In1134684065 |P0Thread1of1ForFork0_#t~ite3_Out1134684065|) .cse0 (or .cse1 .cse2)) (and (not .cse1) .cse0 (not .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out1134684065| ~y$w_buff1~0_In1134684065)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1134684065, ~y$w_buff1~0=~y$w_buff1~0_In1134684065, ~y~0=~y~0_In1134684065, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1134684065} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1134684065, P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1134684065|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out1134684065|, ~y$w_buff1~0=~y$w_buff1~0_In1134684065, ~y~0=~y~0_In1134684065, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1134684065} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:22:07,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L733-->L733-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1877433973 256))) (.cse1 (= (mod ~y$r_buff0_thd1~0_In1877433973 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1877433973| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1877433973| ~y$w_buff0_used~0_In1877433973) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1877433973, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1877433973} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1877433973|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1877433973, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1877433973} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:22:07,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-1174931234 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1174931234 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1174931234 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In-1174931234 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1174931234| 0)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1174931234| ~y$w_buff1_used~0_In-1174931234) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1174931234, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1174931234, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1174931234, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1174931234} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1174931234|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1174931234, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1174931234, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1174931234, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1174931234} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:22:07,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1256501331 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1256501331 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out1256501331|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd1~0_In1256501331 |P0Thread1of1ForFork0_#t~ite7_Out1256501331|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1256501331, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1256501331} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1256501331, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1256501331|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1256501331} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:22:07,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L736-->L736-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-693137201 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-693137201 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In-693137201 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-693137201 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-693137201| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-693137201| ~y$r_buff1_thd1~0_In-693137201) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-693137201, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-693137201, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-693137201, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-693137201} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-693137201, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-693137201, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-693137201|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-693137201, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-693137201} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:22:07,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_30|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_125, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_29|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:22:07,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In709627407 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In709627407 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out709627407|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In709627407 |P1Thread1of1ForFork1_#t~ite11_Out709627407|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In709627407, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In709627407} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In709627407, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In709627407, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out709627407|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:22:07,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In124788277 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In124788277 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In124788277 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In124788277 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In124788277 |P1Thread1of1ForFork1_#t~ite12_Out124788277|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out124788277|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In124788277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In124788277, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In124788277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In124788277} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In124788277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In124788277, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In124788277, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out124788277|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In124788277} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:22:07,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L769-->L770: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In391055107 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In391055107 256))) (.cse1 (= ~y$r_buff0_thd2~0_In391055107 ~y$r_buff0_thd2~0_Out391055107))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~y$r_buff0_thd2~0_Out391055107) (not .cse0)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In391055107, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In391055107} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In391055107, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out391055107, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out391055107|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:22:07,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [667] [667] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In971913028 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd2~0_In971913028 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In971913028 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In971913028 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out971913028|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite14_Out971913028| ~y$r_buff1_thd2~0_In971913028) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In971913028, ~y$w_buff0_used~0=~y$w_buff0_used~0_In971913028, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In971913028, ~y$w_buff1_used~0=~y$w_buff1_used~0_In971913028} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In971913028, ~y$w_buff0_used~0=~y$w_buff0_used~0_In971913028, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In971913028, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out971913028|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In971913028} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:22:07,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= v_~y$r_buff1_thd2~0_144 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_144, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:22:07,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_5 256))) (or (= 0 (mod v_~y$r_buff0_thd0~0_132 256)) (= 0 (mod v_~y$w_buff0_used~0_236 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_236, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:22:07,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L797-2-->L797-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-377358369 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-377358369 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-377358369| ~y$w_buff1~0_In-377358369) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-377358369| ~y~0_In-377358369)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-377358369, ~y~0=~y~0_In-377358369, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-377358369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-377358369} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-377358369|, ~y$w_buff1~0=~y$w_buff1~0_In-377358369, ~y~0=~y~0_In-377358369, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-377358369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-377358369} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:22:07,649 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [619] [619] L797-4-->L798: Formula: (= v_~y~0_44 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~y~0=v_~y~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-11-28 18:22:07,649 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [666] [666] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-284205548 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-284205548 256)))) (or (and (= ~y$w_buff0_used~0_In-284205548 |ULTIMATE.start_main_#t~ite19_Out-284205548|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite19_Out-284205548| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-284205548, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-284205548} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-284205548, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-284205548|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-284205548} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:22:07,649 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In272052021 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In272052021 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In272052021 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In272052021 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out272052021| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite20_Out272052021| ~y$w_buff1_used~0_In272052021) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In272052021, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In272052021, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In272052021, ~y$w_buff1_used~0=~y$w_buff1_used~0_In272052021} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In272052021, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In272052021, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out272052021|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In272052021, ~y$w_buff1_used~0=~y$w_buff1_used~0_In272052021} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:22:07,650 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-886709957 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-886709957 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-886709957| ~y$r_buff0_thd0~0_In-886709957) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite21_Out-886709957| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-886709957, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-886709957} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-886709957, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-886709957, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-886709957|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:22:07,650 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-31251218 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-31251218 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-31251218 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-31251218 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-31251218| ~y$r_buff1_thd0~0_In-31251218) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out-31251218| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-31251218, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-31251218, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-31251218, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-31251218} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-31251218, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-31251218, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-31251218, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-31251218|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-31251218} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:22:07,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In593710423 256)))) (or (and (= ~y$w_buff1_used~0_In593710423 |ULTIMATE.start_main_#t~ite38_Out593710423|) (= |ULTIMATE.start_main_#t~ite37_In593710423| |ULTIMATE.start_main_#t~ite37_Out593710423|) (not .cse0)) (and .cse0 (= |ULTIMATE.start_main_#t~ite38_Out593710423| |ULTIMATE.start_main_#t~ite37_Out593710423|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In593710423 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In593710423 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In593710423 256)) (and (= (mod ~y$r_buff1_thd0~0_In593710423 256) 0) .cse1))) (= ~y$w_buff1_used~0_In593710423 |ULTIMATE.start_main_#t~ite37_Out593710423|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In593710423, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In593710423, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In593710423|, ~weak$$choice2~0=~weak$$choice2~0_In593710423, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In593710423, ~y$w_buff1_used~0=~y$w_buff1_used~0_In593710423} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In593710423, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In593710423, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out593710423|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out593710423|, ~weak$$choice2~0=~weak$$choice2~0_In593710423, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In593710423, ~y$w_buff1_used~0=~y$w_buff1_used~0_In593710423} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-11-28 18:22:07,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [607] [607] L813-->L814: Formula: (and (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97) (not (= 0 (mod v_~weak$$choice2~0_26 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_26} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_26} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:22:07,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L816-->L819-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_16 256)) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= v_~y~0_114 v_~y$mem_tmp~0_17) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~y~0=v_~y~0_114, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_18|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:22:07,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [674] [674] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:22:07,770 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:22:07,771 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:22:07,776 INFO L168 Benchmark]: Toolchain (without parser) took 16401.63 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 520.1 MB). Free memory was 956.3 MB in the beginning and 1.2 GB in the end (delta: -249.8 MB). Peak memory consumption was 270.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:07,776 INFO L168 Benchmark]: CDTParser took 0.87 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:22:07,777 INFO L168 Benchmark]: CACSL2BoogieTranslator took 784.20 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 956.3 MB in the beginning and 1.1 GB in the end (delta: -133.7 MB). Peak memory consumption was 26.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:07,777 INFO L168 Benchmark]: Boogie Procedure Inliner took 82.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:07,778 INFO L168 Benchmark]: Boogie Preprocessor took 38.90 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:22:07,779 INFO L168 Benchmark]: RCFGBuilder took 801.94 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:07,780 INFO L168 Benchmark]: TraceAbstraction took 14544.57 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 397.9 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -192.0 MB). Peak memory consumption was 205.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:07,780 INFO L168 Benchmark]: Witness Printer took 141.25 ms. Allocated memory is still 1.5 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 24.7 MB). Peak memory consumption was 24.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:22:07,787 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.87 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 784.20 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 956.3 MB in the beginning and 1.1 GB in the end (delta: -133.7 MB). Peak memory consumption was 26.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 82.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 38.90 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 801.94 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 14544.57 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 397.9 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -192.0 MB). Peak memory consumption was 205.9 MB. Max. memory is 11.5 GB. * Witness Printer took 141.25 ms. Allocated memory is still 1.5 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 24.7 MB). Peak memory consumption was 24.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.6s, 148 ProgramPointsBefore, 78 ProgramPointsAfterwards, 182 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 3838 VarBasedMoverChecksPositive, 191 VarBasedMoverChecksNegative, 62 SemBasedMoverChecksPositive, 187 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 46553 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L789] FCALL, FORK 0 pthread_create(&t1615, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1616, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L751] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L752] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L753] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L754] 2 y$r_buff0_thd2 = (_Bool)1 [L757] 2 z = 1 [L760] 2 __unbuffered_p1_EAX = z [L763] 2 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 1 x = 1 [L729] 1 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L766] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L734] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L735] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L766] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L767] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L768] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 y$flush_delayed = weak$$choice2 [L807] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L814] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 142 locations, 2 error locations. Result: UNSAFE, OverallTime: 14.3s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 3.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1606 SDtfs, 1249 SDslu, 2821 SDs, 0 SdLazy, 1864 SolverSat, 113 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 108 GetRequests, 27 SyntacticMatches, 13 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14811occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.5s AutomataMinimizationTime, 15 MinimizatonAttempts, 9589 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 606 NumberOfCodeBlocks, 606 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 537 ConstructedInterpolants, 0 QuantifiedInterpolants, 65264 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...