./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe010_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe010_power.oepc.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7082604ba6f5c2a79646cd2200d1a5c8e7fdb3ae ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:27:14,974 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:27:14,977 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:27:14,995 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:27:14,995 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:27:14,997 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:27:14,999 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:27:15,009 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:27:15,014 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:27:15,019 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:27:15,020 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:27:15,022 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:27:15,022 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:27:15,025 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:27:15,026 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:27:15,028 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:27:15,031 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:27:15,032 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:27:15,034 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:27:15,038 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:27:15,042 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:27:15,047 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:27:15,048 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:27:15,050 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:27:15,053 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:27:15,053 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:27:15,053 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:27:15,055 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:27:15,056 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:27:15,057 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:27:15,057 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:27:15,058 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:27:15,059 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:27:15,061 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:27:15,063 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:27:15,063 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:27:15,064 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:27:15,065 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:27:15,065 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:27:15,066 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:27:15,067 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:27:15,068 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:27:15,086 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:27:15,086 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:27:15,088 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:27:15,088 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:27:15,088 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:27:15,089 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:27:15,089 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:27:15,089 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:27:15,089 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:27:15,090 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:27:15,090 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:27:15,090 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:27:15,090 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:27:15,091 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:27:15,091 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:27:15,091 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:27:15,092 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:27:15,092 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:27:15,092 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:27:15,092 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:27:15,093 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:27:15,093 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:27:15,093 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:27:15,094 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:27:15,094 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:27:15,094 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:27:15,095 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:27:15,095 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:27:15,095 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:27:15,095 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7082604ba6f5c2a79646cd2200d1a5c8e7fdb3ae [2019-11-28 18:27:15,416 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:27:15,429 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:27:15,432 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:27:15,434 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:27:15,434 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:27:15,435 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe010_power.oepc.i [2019-11-28 18:27:15,493 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d8148c636/d9a7dac5560b4b569137895803a5d750/FLAG677e368c1 [2019-11-28 18:27:16,021 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:27:16,023 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe010_power.oepc.i [2019-11-28 18:27:16,046 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d8148c636/d9a7dac5560b4b569137895803a5d750/FLAG677e368c1 [2019-11-28 18:27:16,330 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d8148c636/d9a7dac5560b4b569137895803a5d750 [2019-11-28 18:27:16,333 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:27:16,335 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:27:16,336 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:27:16,336 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:27:16,341 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:27:16,342 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:27:16" (1/1) ... [2019-11-28 18:27:16,345 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6822e6d4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:16, skipping insertion in model container [2019-11-28 18:27:16,345 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:27:16" (1/1) ... [2019-11-28 18:27:16,352 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:27:16,395 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:27:16,903 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:27:16,922 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:27:17,009 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:27:17,080 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:27:17,081 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17 WrapperNode [2019-11-28 18:27:17,081 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:27:17,082 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:27:17,082 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:27:17,082 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:27:17,091 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,111 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,158 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:27:17,158 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:27:17,159 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:27:17,159 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:27:17,170 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,170 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,175 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,175 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,189 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,201 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,204 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... [2019-11-28 18:27:17,209 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:27:17,210 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:27:17,210 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:27:17,211 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:27:17,212 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:27:17,279 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:27:17,280 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:27:17,280 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:27:17,280 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:27:17,280 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:27:17,281 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:27:17,281 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:27:17,281 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:27:17,281 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:27:17,282 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:27:17,282 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:27:17,286 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:27:18,034 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:27:18,034 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:27:18,036 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:18 BoogieIcfgContainer [2019-11-28 18:27:18,036 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:27:18,038 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:27:18,038 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:27:18,041 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:27:18,042 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:27:16" (1/3) ... [2019-11-28 18:27:18,043 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4bbc904f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:27:18, skipping insertion in model container [2019-11-28 18:27:18,043 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:17" (2/3) ... [2019-11-28 18:27:18,044 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4bbc904f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:27:18, skipping insertion in model container [2019-11-28 18:27:18,044 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:18" (3/3) ... [2019-11-28 18:27:18,046 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_power.oepc.i [2019-11-28 18:27:18,057 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:27:18,057 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:27:18,066 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:27:18,067 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:27:18,102 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,102 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,103 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,103 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,103 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,104 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,104 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,105 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,105 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,105 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,107 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,107 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,107 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,108 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,108 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,108 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,108 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,109 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,109 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,109 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,110 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,110 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,110 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,111 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,111 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,111 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,112 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,112 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,112 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,112 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,113 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,113 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,114 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,114 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,114 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,114 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,115 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,115 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,115 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,116 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,116 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,116 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,117 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,117 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,117 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,117 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,118 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,118 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,118 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,118 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,119 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,119 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,119 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:18,139 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:27:18,157 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:27:18,157 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:27:18,157 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:27:18,157 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:27:18,157 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:27:18,157 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:27:18,158 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:27:18,158 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:27:18,176 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-11-28 18:27:18,178 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:27:18,262 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:27:18,262 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:27:18,277 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:27:18,296 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:27:18,340 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:27:18,340 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:27:18,346 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:27:18,361 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-11-28 18:27:18,362 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:27:23,261 WARN L192 SmtUtils]: Spent 260.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-11-28 18:27:23,363 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 77 [2019-11-28 18:27:23,395 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46090 [2019-11-28 18:27:23,395 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-11-28 18:27:23,399 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 91 transitions [2019-11-28 18:27:23,995 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8654 states. [2019-11-28 18:27:23,998 INFO L276 IsEmpty]: Start isEmpty. Operand 8654 states. [2019-11-28 18:27:24,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-11-28 18:27:24,005 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:24,006 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-11-28 18:27:24,006 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:24,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:24,016 INFO L82 PathProgramCache]: Analyzing trace with hash 722891, now seen corresponding path program 1 times [2019-11-28 18:27:24,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:24,031 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229684928] [2019-11-28 18:27:24,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:24,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:24,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:24,306 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [229684928] [2019-11-28 18:27:24,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:24,307 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:27:24,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884280736] [2019-11-28 18:27:24,315 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:24,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:24,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:24,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:24,344 INFO L87 Difference]: Start difference. First operand 8654 states. Second operand 3 states. [2019-11-28 18:27:24,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:24,634 INFO L93 Difference]: Finished difference Result 8604 states and 28108 transitions. [2019-11-28 18:27:24,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:24,636 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-11-28 18:27:24,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:24,743 INFO L225 Difference]: With dead ends: 8604 [2019-11-28 18:27:24,745 INFO L226 Difference]: Without dead ends: 8436 [2019-11-28 18:27:24,747 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:24,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8436 states. [2019-11-28 18:27:25,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8436 to 8436. [2019-11-28 18:27:25,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8436 states. [2019-11-28 18:27:25,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8436 states to 8436 states and 27590 transitions. [2019-11-28 18:27:25,231 INFO L78 Accepts]: Start accepts. Automaton has 8436 states and 27590 transitions. Word has length 3 [2019-11-28 18:27:25,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:25,232 INFO L462 AbstractCegarLoop]: Abstraction has 8436 states and 27590 transitions. [2019-11-28 18:27:25,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:25,233 INFO L276 IsEmpty]: Start isEmpty. Operand 8436 states and 27590 transitions. [2019-11-28 18:27:25,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:27:25,237 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:25,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:25,238 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:25,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:25,238 INFO L82 PathProgramCache]: Analyzing trace with hash -1596153002, now seen corresponding path program 1 times [2019-11-28 18:27:25,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:25,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65704552] [2019-11-28 18:27:25,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:25,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:25,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:25,407 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65704552] [2019-11-28 18:27:25,407 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:25,408 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:25,408 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1548414156] [2019-11-28 18:27:25,409 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:25,410 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:25,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:25,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:25,411 INFO L87 Difference]: Start difference. First operand 8436 states and 27590 transitions. Second operand 4 states. [2019-11-28 18:27:25,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:25,813 INFO L93 Difference]: Finished difference Result 13130 states and 41153 transitions. [2019-11-28 18:27:25,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:25,814 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:27:25,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:25,911 INFO L225 Difference]: With dead ends: 13130 [2019-11-28 18:27:25,911 INFO L226 Difference]: Without dead ends: 13123 [2019-11-28 18:27:25,912 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:26,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13123 states. [2019-11-28 18:27:26,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13123 to 11988. [2019-11-28 18:27:26,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11988 states. [2019-11-28 18:27:26,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11988 states to 11988 states and 38075 transitions. [2019-11-28 18:27:26,501 INFO L78 Accepts]: Start accepts. Automaton has 11988 states and 38075 transitions. Word has length 11 [2019-11-28 18:27:26,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:26,502 INFO L462 AbstractCegarLoop]: Abstraction has 11988 states and 38075 transitions. [2019-11-28 18:27:26,502 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:26,503 INFO L276 IsEmpty]: Start isEmpty. Operand 11988 states and 38075 transitions. [2019-11-28 18:27:26,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:27:26,505 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:26,506 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:26,506 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:26,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:26,507 INFO L82 PathProgramCache]: Analyzing trace with hash 1194917716, now seen corresponding path program 1 times [2019-11-28 18:27:26,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:26,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [448686468] [2019-11-28 18:27:26,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:26,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:26,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:26,582 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [448686468] [2019-11-28 18:27:26,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:26,583 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:26,583 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1349058384] [2019-11-28 18:27:26,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:26,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:26,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:26,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:26,585 INFO L87 Difference]: Start difference. First operand 11988 states and 38075 transitions. Second operand 4 states. [2019-11-28 18:27:26,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:26,846 INFO L93 Difference]: Finished difference Result 14736 states and 46267 transitions. [2019-11-28 18:27:26,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:26,846 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:27:26,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:26,895 INFO L225 Difference]: With dead ends: 14736 [2019-11-28 18:27:26,896 INFO L226 Difference]: Without dead ends: 14736 [2019-11-28 18:27:26,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:27,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14736 states. [2019-11-28 18:27:27,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14736 to 13160. [2019-11-28 18:27:27,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13160 states. [2019-11-28 18:27:27,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13160 states to 13160 states and 41689 transitions. [2019-11-28 18:27:27,349 INFO L78 Accepts]: Start accepts. Automaton has 13160 states and 41689 transitions. Word has length 11 [2019-11-28 18:27:27,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:27,350 INFO L462 AbstractCegarLoop]: Abstraction has 13160 states and 41689 transitions. [2019-11-28 18:27:27,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:27,350 INFO L276 IsEmpty]: Start isEmpty. Operand 13160 states and 41689 transitions. [2019-11-28 18:27:27,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:27:27,359 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:27,359 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:27,359 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:27,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:27,360 INFO L82 PathProgramCache]: Analyzing trace with hash -1502155024, now seen corresponding path program 1 times [2019-11-28 18:27:27,360 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:27,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611330678] [2019-11-28 18:27:27,362 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:27,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:27,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:27,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611330678] [2019-11-28 18:27:27,505 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:27,505 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:27,505 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633970009] [2019-11-28 18:27:27,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:27,506 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:27,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:27,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:27,506 INFO L87 Difference]: Start difference. First operand 13160 states and 41689 transitions. Second operand 5 states. [2019-11-28 18:27:27,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:27,975 INFO L93 Difference]: Finished difference Result 17572 states and 54523 transitions. [2019-11-28 18:27:27,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:27:27,976 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-11-28 18:27:27,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:28,025 INFO L225 Difference]: With dead ends: 17572 [2019-11-28 18:27:28,025 INFO L226 Difference]: Without dead ends: 17565 [2019-11-28 18:27:28,026 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:27:28,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17565 states. [2019-11-28 18:27:28,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17565 to 13105. [2019-11-28 18:27:28,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13105 states. [2019-11-28 18:27:28,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13105 states to 13105 states and 41426 transitions. [2019-11-28 18:27:28,586 INFO L78 Accepts]: Start accepts. Automaton has 13105 states and 41426 transitions. Word has length 17 [2019-11-28 18:27:28,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:28,596 INFO L462 AbstractCegarLoop]: Abstraction has 13105 states and 41426 transitions. [2019-11-28 18:27:28,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:28,597 INFO L276 IsEmpty]: Start isEmpty. Operand 13105 states and 41426 transitions. [2019-11-28 18:27:28,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:27:28,614 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:28,615 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:28,615 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:28,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:28,616 INFO L82 PathProgramCache]: Analyzing trace with hash 933350131, now seen corresponding path program 1 times [2019-11-28 18:27:28,616 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:28,616 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1727053415] [2019-11-28 18:27:28,616 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:28,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:28,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:28,672 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1727053415] [2019-11-28 18:27:28,672 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:28,672 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:28,672 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [768910155] [2019-11-28 18:27:28,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:28,673 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:28,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:28,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:28,674 INFO L87 Difference]: Start difference. First operand 13105 states and 41426 transitions. Second operand 3 states. [2019-11-28 18:27:28,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:28,786 INFO L93 Difference]: Finished difference Result 16057 states and 50095 transitions. [2019-11-28 18:27:28,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:28,787 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:27:28,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:28,821 INFO L225 Difference]: With dead ends: 16057 [2019-11-28 18:27:28,822 INFO L226 Difference]: Without dead ends: 16057 [2019-11-28 18:27:28,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:28,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16057 states. [2019-11-28 18:27:29,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16057 to 14186. [2019-11-28 18:27:29,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14186 states. [2019-11-28 18:27:29,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14186 states to 14186 states and 44710 transitions. [2019-11-28 18:27:29,230 INFO L78 Accepts]: Start accepts. Automaton has 14186 states and 44710 transitions. Word has length 25 [2019-11-28 18:27:29,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:29,232 INFO L462 AbstractCegarLoop]: Abstraction has 14186 states and 44710 transitions. [2019-11-28 18:27:29,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:29,232 INFO L276 IsEmpty]: Start isEmpty. Operand 14186 states and 44710 transitions. [2019-11-28 18:27:29,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:27:29,246 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:29,246 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:29,246 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:29,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:29,247 INFO L82 PathProgramCache]: Analyzing trace with hash 933194542, now seen corresponding path program 1 times [2019-11-28 18:27:29,247 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:29,247 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2109340394] [2019-11-28 18:27:29,248 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:29,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:29,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:29,315 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2109340394] [2019-11-28 18:27:29,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:29,316 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:29,316 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071766239] [2019-11-28 18:27:29,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:29,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:29,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:29,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:29,319 INFO L87 Difference]: Start difference. First operand 14186 states and 44710 transitions. Second operand 4 states. [2019-11-28 18:27:29,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:29,353 INFO L93 Difference]: Finished difference Result 2296 states and 5226 transitions. [2019-11-28 18:27:29,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:27:29,354 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-11-28 18:27:29,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:29,358 INFO L225 Difference]: With dead ends: 2296 [2019-11-28 18:27:29,358 INFO L226 Difference]: Without dead ends: 2019 [2019-11-28 18:27:29,359 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:29,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2019 states. [2019-11-28 18:27:29,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2019 to 2019. [2019-11-28 18:27:29,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-11-28 18:27:29,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4460 transitions. [2019-11-28 18:27:29,396 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4460 transitions. Word has length 25 [2019-11-28 18:27:29,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:29,396 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4460 transitions. [2019-11-28 18:27:29,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:29,397 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4460 transitions. [2019-11-28 18:27:29,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:27:29,400 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:29,400 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:29,400 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:29,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:29,401 INFO L82 PathProgramCache]: Analyzing trace with hash -568804126, now seen corresponding path program 1 times [2019-11-28 18:27:29,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:29,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662979934] [2019-11-28 18:27:29,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:29,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:29,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:29,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662979934] [2019-11-28 18:27:29,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:29,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:27:29,555 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380981553] [2019-11-28 18:27:29,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:29,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:29,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:29,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:29,557 INFO L87 Difference]: Start difference. First operand 2019 states and 4460 transitions. Second operand 5 states. [2019-11-28 18:27:29,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:29,606 INFO L93 Difference]: Finished difference Result 416 states and 758 transitions. [2019-11-28 18:27:29,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:29,607 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:27:29,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:29,608 INFO L225 Difference]: With dead ends: 416 [2019-11-28 18:27:29,608 INFO L226 Difference]: Without dead ends: 371 [2019-11-28 18:27:29,608 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:27:29,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-11-28 18:27:29,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 343. [2019-11-28 18:27:29,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-11-28 18:27:29,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 618 transitions. [2019-11-28 18:27:29,614 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 618 transitions. Word has length 37 [2019-11-28 18:27:29,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:29,615 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 618 transitions. [2019-11-28 18:27:29,615 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:29,615 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 618 transitions. [2019-11-28 18:27:29,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:29,616 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:29,616 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:29,617 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:29,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:29,617 INFO L82 PathProgramCache]: Analyzing trace with hash -506418728, now seen corresponding path program 1 times [2019-11-28 18:27:29,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:29,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215187137] [2019-11-28 18:27:29,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:29,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:29,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:29,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215187137] [2019-11-28 18:27:29,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:29,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:29,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1127893387] [2019-11-28 18:27:29,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:29,742 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:29,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:29,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:29,742 INFO L87 Difference]: Start difference. First operand 343 states and 618 transitions. Second operand 3 states. [2019-11-28 18:27:29,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:29,757 INFO L93 Difference]: Finished difference Result 331 states and 582 transitions. [2019-11-28 18:27:29,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:29,757 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:27:29,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:29,758 INFO L225 Difference]: With dead ends: 331 [2019-11-28 18:27:29,758 INFO L226 Difference]: Without dead ends: 331 [2019-11-28 18:27:29,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:29,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2019-11-28 18:27:29,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 331. [2019-11-28 18:27:29,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2019-11-28 18:27:29,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 582 transitions. [2019-11-28 18:27:29,764 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 582 transitions. Word has length 52 [2019-11-28 18:27:29,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:29,766 INFO L462 AbstractCegarLoop]: Abstraction has 331 states and 582 transitions. [2019-11-28 18:27:29,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:29,766 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 582 transitions. [2019-11-28 18:27:29,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:29,769 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:29,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:29,769 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:29,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:29,770 INFO L82 PathProgramCache]: Analyzing trace with hash -156128935, now seen corresponding path program 1 times [2019-11-28 18:27:29,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:29,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350695745] [2019-11-28 18:27:29,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:29,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:29,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:29,920 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350695745] [2019-11-28 18:27:29,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:29,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:27:29,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091085416] [2019-11-28 18:27:29,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:29,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:29,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:29,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:29,924 INFO L87 Difference]: Start difference. First operand 331 states and 582 transitions. Second operand 5 states. [2019-11-28 18:27:30,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:30,104 INFO L93 Difference]: Finished difference Result 487 states and 864 transitions. [2019-11-28 18:27:30,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:27:30,106 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-11-28 18:27:30,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:30,107 INFO L225 Difference]: With dead ends: 487 [2019-11-28 18:27:30,107 INFO L226 Difference]: Without dead ends: 487 [2019-11-28 18:27:30,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:27:30,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 487 states. [2019-11-28 18:27:30,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 487 to 422. [2019-11-28 18:27:30,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 422 states. [2019-11-28 18:27:30,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 748 transitions. [2019-11-28 18:27:30,114 INFO L78 Accepts]: Start accepts. Automaton has 422 states and 748 transitions. Word has length 53 [2019-11-28 18:27:30,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:30,115 INFO L462 AbstractCegarLoop]: Abstraction has 422 states and 748 transitions. [2019-11-28 18:27:30,115 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:30,115 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 748 transitions. [2019-11-28 18:27:30,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:30,116 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:30,116 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:30,117 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:30,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:30,117 INFO L82 PathProgramCache]: Analyzing trace with hash -2022513439, now seen corresponding path program 2 times [2019-11-28 18:27:30,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:30,118 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760845824] [2019-11-28 18:27:30,118 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:30,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:30,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:30,277 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760845824] [2019-11-28 18:27:30,277 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:30,277 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:30,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163323579] [2019-11-28 18:27:30,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:30,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:30,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:30,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:30,280 INFO L87 Difference]: Start difference. First operand 422 states and 748 transitions. Second operand 3 states. [2019-11-28 18:27:30,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:30,322 INFO L93 Difference]: Finished difference Result 422 states and 747 transitions. [2019-11-28 18:27:30,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:30,323 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:27:30,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:30,325 INFO L225 Difference]: With dead ends: 422 [2019-11-28 18:27:30,325 INFO L226 Difference]: Without dead ends: 422 [2019-11-28 18:27:30,325 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:30,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states. [2019-11-28 18:27:30,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 331. [2019-11-28 18:27:30,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2019-11-28 18:27:30,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 581 transitions. [2019-11-28 18:27:30,331 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 581 transitions. Word has length 53 [2019-11-28 18:27:30,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:30,332 INFO L462 AbstractCegarLoop]: Abstraction has 331 states and 581 transitions. [2019-11-28 18:27:30,332 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:30,332 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 581 transitions. [2019-11-28 18:27:30,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:30,333 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:30,334 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:30,334 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:30,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:30,334 INFO L82 PathProgramCache]: Analyzing trace with hash -731863498, now seen corresponding path program 1 times [2019-11-28 18:27:30,335 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:30,335 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497627990] [2019-11-28 18:27:30,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:30,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:30,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:30,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497627990] [2019-11-28 18:27:30,506 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:30,507 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:27:30,507 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570961768] [2019-11-28 18:27:30,507 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:27:30,508 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:30,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:27:30,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:27:30,509 INFO L87 Difference]: Start difference. First operand 331 states and 581 transitions. Second operand 6 states. [2019-11-28 18:27:30,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:30,574 INFO L93 Difference]: Finished difference Result 510 states and 893 transitions. [2019-11-28 18:27:30,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:27:30,574 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-11-28 18:27:30,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:30,575 INFO L225 Difference]: With dead ends: 510 [2019-11-28 18:27:30,575 INFO L226 Difference]: Without dead ends: 221 [2019-11-28 18:27:30,578 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:27:30,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2019-11-28 18:27:30,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 221. [2019-11-28 18:27:30,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2019-11-28 18:27:30,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 391 transitions. [2019-11-28 18:27:30,583 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 391 transitions. Word has length 54 [2019-11-28 18:27:30,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:30,583 INFO L462 AbstractCegarLoop]: Abstraction has 221 states and 391 transitions. [2019-11-28 18:27:30,583 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:27:30,584 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 391 transitions. [2019-11-28 18:27:30,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:30,585 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:30,585 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:30,585 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:30,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:30,585 INFO L82 PathProgramCache]: Analyzing trace with hash -1034362442, now seen corresponding path program 2 times [2019-11-28 18:27:30,585 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:30,586 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751091049] [2019-11-28 18:27:30,586 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:30,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:31,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:31,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1751091049] [2019-11-28 18:27:31,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:31,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:27:31,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2032240797] [2019-11-28 18:27:31,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:27:31,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:31,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:27:31,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:27:31,289 INFO L87 Difference]: Start difference. First operand 221 states and 391 transitions. Second operand 13 states. [2019-11-28 18:27:31,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:31,823 INFO L93 Difference]: Finished difference Result 380 states and 651 transitions. [2019-11-28 18:27:31,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-28 18:27:31,823 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-11-28 18:27:31,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:31,824 INFO L225 Difference]: With dead ends: 380 [2019-11-28 18:27:31,824 INFO L226 Difference]: Without dead ends: 347 [2019-11-28 18:27:31,825 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=71, Invalid=309, Unknown=0, NotChecked=0, Total=380 [2019-11-28 18:27:31,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2019-11-28 18:27:31,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 317. [2019-11-28 18:27:31,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-11-28 18:27:31,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 555 transitions. [2019-11-28 18:27:31,829 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 555 transitions. Word has length 54 [2019-11-28 18:27:31,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:31,829 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 555 transitions. [2019-11-28 18:27:31,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:27:31,830 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 555 transitions. [2019-11-28 18:27:31,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:31,830 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:31,830 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:31,831 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:31,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:31,831 INFO L82 PathProgramCache]: Analyzing trace with hash -1623394108, now seen corresponding path program 3 times [2019-11-28 18:27:31,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:31,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217963314] [2019-11-28 18:27:31,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:31,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:32,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:32,186 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217963314] [2019-11-28 18:27:32,186 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:32,187 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-28 18:27:32,187 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1202968758] [2019-11-28 18:27:32,187 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-11-28 18:27:32,188 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:32,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-11-28 18:27:32,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:27:32,189 INFO L87 Difference]: Start difference. First operand 317 states and 555 transitions. Second operand 14 states. [2019-11-28 18:27:32,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:32,692 INFO L93 Difference]: Finished difference Result 436 states and 737 transitions. [2019-11-28 18:27:32,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-28 18:27:32,692 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-11-28 18:27:32,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:32,693 INFO L225 Difference]: With dead ends: 436 [2019-11-28 18:27:32,694 INFO L226 Difference]: Without dead ends: 403 [2019-11-28 18:27:32,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=82, Invalid=380, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:27:32,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403 states. [2019-11-28 18:27:32,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403 to 321. [2019-11-28 18:27:32,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2019-11-28 18:27:32,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 562 transitions. [2019-11-28 18:27:32,701 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 562 transitions. Word has length 54 [2019-11-28 18:27:32,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:32,701 INFO L462 AbstractCegarLoop]: Abstraction has 321 states and 562 transitions. [2019-11-28 18:27:32,701 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-11-28 18:27:32,701 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 562 transitions. [2019-11-28 18:27:32,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:32,702 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:32,703 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:32,703 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:32,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:32,703 INFO L82 PathProgramCache]: Analyzing trace with hash 1326135034, now seen corresponding path program 4 times [2019-11-28 18:27:32,704 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:32,704 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842965352] [2019-11-28 18:27:32,704 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:32,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:32,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:32,917 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842965352] [2019-11-28 18:27:32,917 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:32,917 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:27:32,917 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679065738] [2019-11-28 18:27:32,917 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:27:32,917 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:32,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:27:32,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:27:32,918 INFO L87 Difference]: Start difference. First operand 321 states and 562 transitions. Second operand 12 states. [2019-11-28 18:27:33,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:33,229 INFO L93 Difference]: Finished difference Result 424 states and 716 transitions. [2019-11-28 18:27:33,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:27:33,230 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-11-28 18:27:33,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:33,231 INFO L225 Difference]: With dead ends: 424 [2019-11-28 18:27:33,231 INFO L226 Difference]: Without dead ends: 391 [2019-11-28 18:27:33,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-11-28 18:27:33,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2019-11-28 18:27:33,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 329. [2019-11-28 18:27:33,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2019-11-28 18:27:33,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 576 transitions. [2019-11-28 18:27:33,236 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 576 transitions. Word has length 54 [2019-11-28 18:27:33,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:33,237 INFO L462 AbstractCegarLoop]: Abstraction has 329 states and 576 transitions. [2019-11-28 18:27:33,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:27:33,237 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 576 transitions. [2019-11-28 18:27:33,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:33,238 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:33,238 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:33,239 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:33,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:33,239 INFO L82 PathProgramCache]: Analyzing trace with hash -91775718, now seen corresponding path program 5 times [2019-11-28 18:27:33,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:33,240 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212762324] [2019-11-28 18:27:33,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:33,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:27:33,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:27:33,356 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:27:33,356 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:27:33,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2009~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2009~0.base_24|) |v_ULTIMATE.start_main_~#t2009~0.offset_19| 0))) (= v_~y$r_buff1_thd0~0_329 0) (= v_~y$w_buff0_used~0_834 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2009~0.base_24|) (= 0 v_~__unbuffered_cnt~0_61) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2009~0.base_24|)) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= 0 |v_ULTIMATE.start_main_~#t2009~0.offset_19|) (= |v_#NULL.offset_3| 0) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2009~0.base_24| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2009~0.base_24| 4)) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, ULTIMATE.start_main_~#t2009~0.offset=|v_ULTIMATE.start_main_~#t2009~0.offset_19|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_~#t2010~0.base=|v_ULTIMATE.start_main_~#t2010~0.base_19|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_~#t2009~0.base=|v_ULTIMATE.start_main_~#t2009~0.base_24|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_~#t2010~0.offset=|v_ULTIMATE.start_main_~#t2010~0.offset_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2009~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_~#t2010~0.base, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t2009~0.base, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t2010~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:33,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (= |v_ULTIMATE.start_main_~#t2010~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t2010~0.base_11| 0)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2010~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2010~0.base_11|) |v_ULTIMATE.start_main_~#t2010~0.offset_10| 1)) |v_#memory_int_7|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2010~0.base_11|)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2010~0.base_11| 4) |v_#length_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2010~0.base_11| 1)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2010~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t2010~0.base=|v_ULTIMATE.start_main_~#t2010~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2010~0.offset=|v_ULTIMATE.start_main_~#t2010~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2010~0.base, ULTIMATE.start_main_~#t2010~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:27:33,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:33,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1586782825 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1586782825 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1586782825 |P1Thread1of1ForFork1_#t~ite9_Out-1586782825|) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out-1586782825| ~y~0_In-1586782825)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1586782825, ~y$w_buff1~0=~y$w_buff1~0_In-1586782825, ~y~0=~y~0_In-1586782825, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1586782825} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1586782825, ~y$w_buff1~0=~y$w_buff1~0_In-1586782825, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1586782825|, ~y~0=~y~0_In-1586782825, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1586782825} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:27:33,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:27:33,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1575932751 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-1575932751 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1575932751| ~y$w_buff0_used~0_In-1575932751)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1575932751|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1575932751, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1575932751} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1575932751, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1575932751, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1575932751|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:27:33,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-554810856 256))) (.cse2 (= (mod ~y$r_buff1_thd2~0_In-554810856 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-554810856 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-554810856 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-554810856 |P1Thread1of1ForFork1_#t~ite12_Out-554810856|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-554810856|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-554810856, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-554810856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-554810856, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-554810856} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-554810856, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-554810856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-554810856, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-554810856|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-554810856} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:27:33,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In470297281 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In470297281 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out470297281| ~y$r_buff0_thd2~0_In470297281)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out470297281|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In470297281, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In470297281} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In470297281, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In470297281, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out470297281|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:27:33,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-591146775 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-591146775 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-591146775 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-591146775 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-591146775|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out-591146775| ~y$r_buff1_thd2~0_In-591146775)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-591146775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-591146775, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-591146775, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-591146775} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-591146775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-591146775, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-591146775, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-591146775|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-591146775} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:27:33,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:27:33,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In479357156 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In479357156 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In479357156 |P0Thread1of1ForFork0_#t~ite5_Out479357156|)) (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out479357156|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In479357156, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In479357156} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out479357156|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In479357156, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In479357156} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:27:33,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd1~0_In1095409174 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1095409174 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1095409174 256))) (.cse0 (= (mod ~y$r_buff1_thd1~0_In1095409174 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1095409174|)) (and (or .cse2 .cse3) (= ~y$w_buff1_used~0_In1095409174 |P0Thread1of1ForFork0_#t~ite6_Out1095409174|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1095409174, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1095409174, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1095409174, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1095409174} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1095409174|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1095409174, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1095409174, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1095409174, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1095409174} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:27:33,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-552784531 256))) (.cse2 (= ~y$r_buff0_thd1~0_Out-552784531 ~y$r_buff0_thd1~0_In-552784531)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In-552784531 256) 0))) (or (and (not .cse0) (= ~y$r_buff0_thd1~0_Out-552784531 0) (not .cse1)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-552784531, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-552784531} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-552784531, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-552784531|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-552784531} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:27:33,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd1~0_In-170886724 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-170886724 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-170886724 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-170886724 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-170886724| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-170886724| ~y$r_buff1_thd1~0_In-170886724) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-170886724, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-170886724, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-170886724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-170886724} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-170886724, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-170886724, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-170886724|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-170886724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-170886724} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:27:33,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:27:33,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:27:33,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-2035783309| |ULTIMATE.start_main_#t~ite17_Out-2035783309|)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-2035783309 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2035783309 256)))) (or (and .cse0 (= ~y~0_In-2035783309 |ULTIMATE.start_main_#t~ite17_Out-2035783309|) (or .cse1 .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~ite17_Out-2035783309| ~y$w_buff1~0_In-2035783309) (not .cse2) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-2035783309, ~y~0=~y~0_In-2035783309, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2035783309, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2035783309} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-2035783309|, ~y$w_buff1~0=~y$w_buff1~0_In-2035783309, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-2035783309|, ~y~0=~y~0_In-2035783309, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2035783309, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2035783309} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:27:33,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1111595850 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1111595850 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out1111595850|) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In1111595850 |ULTIMATE.start_main_#t~ite19_Out1111595850|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1111595850, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1111595850} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1111595850, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1111595850|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1111595850} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:27:33,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1101768961 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1101768961 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In1101768961 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In1101768961 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out1101768961| ~y$w_buff1_used~0_In1101768961)) (and (= |ULTIMATE.start_main_#t~ite20_Out1101768961| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1101768961, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1101768961, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1101768961, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1101768961} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1101768961, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1101768961, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1101768961|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1101768961, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1101768961} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:27:33,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In340754628 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In340754628 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out340754628| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite21_Out340754628| ~y$r_buff0_thd0~0_In340754628)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In340754628, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In340754628} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In340754628, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In340754628, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out340754628|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:27:33,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-189116676 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-189116676 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-189116676 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-189116676 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-189116676|)) (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-189116676 |ULTIMATE.start_main_#t~ite22_Out-189116676|) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-189116676, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-189116676, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-189116676, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-189116676} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-189116676, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-189116676, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-189116676, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-189116676|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-189116676} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:27:33,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2020430813 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite32_Out2020430813| ~y$w_buff1~0_In2020430813) (= |ULTIMATE.start_main_#t~ite31_In2020430813| |ULTIMATE.start_main_#t~ite31_Out2020430813|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2020430813 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In2020430813 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd0~0_In2020430813 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In2020430813 256)))) (= |ULTIMATE.start_main_#t~ite31_Out2020430813| |ULTIMATE.start_main_#t~ite32_Out2020430813|) .cse0 (= |ULTIMATE.start_main_#t~ite31_Out2020430813| ~y$w_buff1~0_In2020430813)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In2020430813, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2020430813, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2020430813, ~weak$$choice2~0=~weak$$choice2~0_In2020430813, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In2020430813|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2020430813, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2020430813} OutVars{~y$w_buff1~0=~y$w_buff1~0_In2020430813, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2020430813, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2020430813, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out2020430813|, ~weak$$choice2~0=~weak$$choice2~0_In2020430813, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out2020430813|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2020430813, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2020430813} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:27:33,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:27:33,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:27:33,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:27:33,476 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:27:33 BasicIcfg [2019-11-28 18:27:33,476 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:27:33,477 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:27:33,477 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:27:33,477 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:27:33,478 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:18" (3/4) ... [2019-11-28 18:27:33,484 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:27:33,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2009~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2009~0.base_24|) |v_ULTIMATE.start_main_~#t2009~0.offset_19| 0))) (= v_~y$r_buff1_thd0~0_329 0) (= v_~y$w_buff0_used~0_834 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2009~0.base_24|) (= 0 v_~__unbuffered_cnt~0_61) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2009~0.base_24|)) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= 0 |v_ULTIMATE.start_main_~#t2009~0.offset_19|) (= |v_#NULL.offset_3| 0) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2009~0.base_24| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2009~0.base_24| 4)) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, ULTIMATE.start_main_~#t2009~0.offset=|v_ULTIMATE.start_main_~#t2009~0.offset_19|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_~#t2010~0.base=|v_ULTIMATE.start_main_~#t2010~0.base_19|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_~#t2009~0.base=|v_ULTIMATE.start_main_~#t2009~0.base_24|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_~#t2010~0.offset=|v_ULTIMATE.start_main_~#t2010~0.offset_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2009~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_~#t2010~0.base, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t2009~0.base, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t2010~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:33,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (= |v_ULTIMATE.start_main_~#t2010~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t2010~0.base_11| 0)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2010~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2010~0.base_11|) |v_ULTIMATE.start_main_~#t2010~0.offset_10| 1)) |v_#memory_int_7|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2010~0.base_11|)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2010~0.base_11| 4) |v_#length_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2010~0.base_11| 1)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2010~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t2010~0.base=|v_ULTIMATE.start_main_~#t2010~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2010~0.offset=|v_ULTIMATE.start_main_~#t2010~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2010~0.base, ULTIMATE.start_main_~#t2010~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:27:33,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:33,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1586782825 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1586782825 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1586782825 |P1Thread1of1ForFork1_#t~ite9_Out-1586782825|) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out-1586782825| ~y~0_In-1586782825)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1586782825, ~y$w_buff1~0=~y$w_buff1~0_In-1586782825, ~y~0=~y~0_In-1586782825, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1586782825} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1586782825, ~y$w_buff1~0=~y$w_buff1~0_In-1586782825, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1586782825|, ~y~0=~y~0_In-1586782825, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1586782825} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:27:33,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:27:33,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1575932751 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-1575932751 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1575932751| ~y$w_buff0_used~0_In-1575932751)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1575932751|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1575932751, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1575932751} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1575932751, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1575932751, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1575932751|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:27:33,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-554810856 256))) (.cse2 (= (mod ~y$r_buff1_thd2~0_In-554810856 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-554810856 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-554810856 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-554810856 |P1Thread1of1ForFork1_#t~ite12_Out-554810856|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-554810856|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-554810856, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-554810856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-554810856, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-554810856} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-554810856, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-554810856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-554810856, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-554810856|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-554810856} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:27:33,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In470297281 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In470297281 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out470297281| ~y$r_buff0_thd2~0_In470297281)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out470297281|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In470297281, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In470297281} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In470297281, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In470297281, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out470297281|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:27:33,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-591146775 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-591146775 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-591146775 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-591146775 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-591146775|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out-591146775| ~y$r_buff1_thd2~0_In-591146775)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-591146775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-591146775, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-591146775, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-591146775} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-591146775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-591146775, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-591146775, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-591146775|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-591146775} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:27:33,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:27:33,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In479357156 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In479357156 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In479357156 |P0Thread1of1ForFork0_#t~ite5_Out479357156|)) (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out479357156|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In479357156, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In479357156} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out479357156|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In479357156, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In479357156} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:27:33,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd1~0_In1095409174 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1095409174 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1095409174 256))) (.cse0 (= (mod ~y$r_buff1_thd1~0_In1095409174 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1095409174|)) (and (or .cse2 .cse3) (= ~y$w_buff1_used~0_In1095409174 |P0Thread1of1ForFork0_#t~ite6_Out1095409174|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1095409174, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1095409174, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1095409174, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1095409174} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1095409174|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1095409174, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1095409174, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1095409174, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1095409174} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:27:33,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-552784531 256))) (.cse2 (= ~y$r_buff0_thd1~0_Out-552784531 ~y$r_buff0_thd1~0_In-552784531)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In-552784531 256) 0))) (or (and (not .cse0) (= ~y$r_buff0_thd1~0_Out-552784531 0) (not .cse1)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-552784531, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-552784531} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-552784531, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-552784531|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-552784531} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:27:33,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd1~0_In-170886724 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-170886724 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-170886724 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-170886724 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-170886724| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-170886724| ~y$r_buff1_thd1~0_In-170886724) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-170886724, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-170886724, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-170886724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-170886724} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-170886724, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-170886724, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-170886724|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-170886724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-170886724} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:27:33,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:27:33,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:27:33,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-2035783309| |ULTIMATE.start_main_#t~ite17_Out-2035783309|)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-2035783309 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2035783309 256)))) (or (and .cse0 (= ~y~0_In-2035783309 |ULTIMATE.start_main_#t~ite17_Out-2035783309|) (or .cse1 .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~ite17_Out-2035783309| ~y$w_buff1~0_In-2035783309) (not .cse2) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-2035783309, ~y~0=~y~0_In-2035783309, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2035783309, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2035783309} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-2035783309|, ~y$w_buff1~0=~y$w_buff1~0_In-2035783309, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-2035783309|, ~y~0=~y~0_In-2035783309, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2035783309, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2035783309} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:27:33,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1111595850 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1111595850 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out1111595850|) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In1111595850 |ULTIMATE.start_main_#t~ite19_Out1111595850|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1111595850, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1111595850} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1111595850, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1111595850|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1111595850} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:27:33,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1101768961 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1101768961 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In1101768961 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In1101768961 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out1101768961| ~y$w_buff1_used~0_In1101768961)) (and (= |ULTIMATE.start_main_#t~ite20_Out1101768961| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1101768961, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1101768961, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1101768961, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1101768961} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1101768961, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1101768961, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1101768961|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1101768961, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1101768961} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:27:33,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In340754628 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In340754628 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out340754628| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite21_Out340754628| ~y$r_buff0_thd0~0_In340754628)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In340754628, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In340754628} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In340754628, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In340754628, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out340754628|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:27:33,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-189116676 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-189116676 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-189116676 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-189116676 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-189116676|)) (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-189116676 |ULTIMATE.start_main_#t~ite22_Out-189116676|) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-189116676, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-189116676, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-189116676, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-189116676} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-189116676, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-189116676, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-189116676, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-189116676|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-189116676} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:27:33,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2020430813 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite32_Out2020430813| ~y$w_buff1~0_In2020430813) (= |ULTIMATE.start_main_#t~ite31_In2020430813| |ULTIMATE.start_main_#t~ite31_Out2020430813|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2020430813 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In2020430813 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd0~0_In2020430813 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In2020430813 256)))) (= |ULTIMATE.start_main_#t~ite31_Out2020430813| |ULTIMATE.start_main_#t~ite32_Out2020430813|) .cse0 (= |ULTIMATE.start_main_#t~ite31_Out2020430813| ~y$w_buff1~0_In2020430813)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In2020430813, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2020430813, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2020430813, ~weak$$choice2~0=~weak$$choice2~0_In2020430813, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In2020430813|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2020430813, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2020430813} OutVars{~y$w_buff1~0=~y$w_buff1~0_In2020430813, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2020430813, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2020430813, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out2020430813|, ~weak$$choice2~0=~weak$$choice2~0_In2020430813, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out2020430813|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2020430813, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2020430813} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:27:33,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:27:33,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:27:33,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:27:33,607 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:27:33,607 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:27:33,609 INFO L168 Benchmark]: Toolchain (without parser) took 17274.22 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 513.8 MB). Free memory was 952.3 MB in the beginning and 1.0 GB in the end (delta: -73.2 MB). Peak memory consumption was 440.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:33,617 INFO L168 Benchmark]: CDTParser took 0.33 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:27:33,618 INFO L168 Benchmark]: CACSL2BoogieTranslator took 745.67 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.2 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -161.4 MB). Peak memory consumption was 26.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:33,618 INFO L168 Benchmark]: Boogie Procedure Inliner took 76.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:33,618 INFO L168 Benchmark]: Boogie Preprocessor took 51.39 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:27:33,619 INFO L168 Benchmark]: RCFGBuilder took 825.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 43.9 MB). Peak memory consumption was 43.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:33,619 INFO L168 Benchmark]: TraceAbstraction took 15438.78 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 368.6 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 19.1 MB). Peak memory consumption was 387.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:33,620 INFO L168 Benchmark]: Witness Printer took 130.50 ms. Allocated memory is still 1.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:33,622 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 745.67 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.2 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -161.4 MB). Peak memory consumption was 26.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 76.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 51.39 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 825.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 43.9 MB). Peak memory consumption was 43.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 15438.78 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 368.6 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 19.1 MB). Peak memory consumption was 387.7 MB. Max. memory is 11.5 GB. * Witness Printer took 130.50 ms. Allocated memory is still 1.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.2s, 146 ProgramPointsBefore, 79 ProgramPointsAfterwards, 180 TransitionsBefore, 91 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 3678 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 221 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.7s, 0 MoverChecksTotal, 46090 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t2009, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2010, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L756] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 15.2s, OverallIterations: 15, TraceHistogramMax: 1, AutomataDifference: 3.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1420 SDtfs, 1394 SDslu, 3456 SDs, 0 SdLazy, 1739 SolverSat, 139 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 115 GetRequests, 17 SyntacticMatches, 6 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14186occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.5s AutomataMinimizationTime, 14 MinimizatonAttempts, 9400 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 557 NumberOfCodeBlocks, 557 NumberOfCodeBlocksAsserted, 15 NumberOfCheckSat, 489 ConstructedInterpolants, 0 QuantifiedInterpolants, 117058 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 14 InterpolantComputations, 14 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...