./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe010_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe010_power.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 31d6964eed2cb94ec120d453769c6230ed3a07c6 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:27:18,219 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:27:18,222 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:27:18,245 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:27:18,245 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:27:18,248 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:27:18,250 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:27:18,260 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:27:18,261 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:27:18,263 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:27:18,264 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:27:18,265 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:27:18,266 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:27:18,267 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:27:18,268 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:27:18,269 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:27:18,270 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:27:18,271 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:27:18,273 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:27:18,275 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:27:18,276 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:27:18,278 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:27:18,279 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:27:18,280 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:27:18,282 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:27:18,283 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:27:18,283 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:27:18,284 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:27:18,284 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:27:18,285 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:27:18,286 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:27:18,287 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:27:18,287 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:27:18,288 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:27:18,290 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:27:18,290 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:27:18,291 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:27:18,291 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:27:18,291 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:27:18,293 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:27:18,295 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:27:18,297 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:27:18,325 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:27:18,325 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:27:18,327 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:27:18,327 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:27:18,327 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:27:18,328 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:27:18,328 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:27:18,328 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:27:18,328 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:27:18,329 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:27:18,329 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:27:18,329 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:27:18,330 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:27:18,330 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:27:18,330 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:27:18,330 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:27:18,331 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:27:18,331 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:27:18,331 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:27:18,331 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:27:18,332 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:27:18,332 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:27:18,332 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:27:18,333 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:27:18,333 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:27:18,333 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:27:18,333 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:27:18,334 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:27:18,334 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:27:18,334 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 31d6964eed2cb94ec120d453769c6230ed3a07c6 [2019-11-28 18:27:18,671 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:27:18,685 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:27:18,689 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:27:18,691 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:27:18,691 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:27:18,692 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe010_power.opt.i [2019-11-28 18:27:18,769 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dc12f1e30/c60c1cf5bb644a8d824df9c9b59cc5dc/FLAGe49d16e6d [2019-11-28 18:27:19,369 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:27:19,369 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe010_power.opt.i [2019-11-28 18:27:19,389 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dc12f1e30/c60c1cf5bb644a8d824df9c9b59cc5dc/FLAGe49d16e6d [2019-11-28 18:27:19,627 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dc12f1e30/c60c1cf5bb644a8d824df9c9b59cc5dc [2019-11-28 18:27:19,631 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:27:19,633 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:27:19,634 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:27:19,635 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:27:19,638 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:27:19,639 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:27:19" (1/1) ... [2019-11-28 18:27:19,642 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6bcb722f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:19, skipping insertion in model container [2019-11-28 18:27:19,643 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:27:19" (1/1) ... [2019-11-28 18:27:19,651 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:27:19,726 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:27:20,377 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:27:20,390 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:27:20,497 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:27:20,608 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:27:20,609 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20 WrapperNode [2019-11-28 18:27:20,609 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:27:20,610 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:27:20,610 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:27:20,610 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:27:20,620 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,653 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,696 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:27:20,696 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:27:20,697 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:27:20,698 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:27:20,709 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,710 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,728 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,729 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,738 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,742 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,746 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... [2019-11-28 18:27:20,751 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:27:20,752 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:27:20,752 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:27:20,753 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:27:20,754 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:27:20,840 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:27:20,840 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:27:20,840 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:27:20,841 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:27:20,841 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:27:20,841 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:27:20,841 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:27:20,842 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:27:20,842 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:27:20,842 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:27:20,842 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:27:20,844 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:27:21,592 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:27:21,593 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:27:21,594 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:21 BoogieIcfgContainer [2019-11-28 18:27:21,594 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:27:21,596 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:27:21,596 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:27:21,600 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:27:21,600 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:27:19" (1/3) ... [2019-11-28 18:27:21,601 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2714c350 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:27:21, skipping insertion in model container [2019-11-28 18:27:21,601 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:20" (2/3) ... [2019-11-28 18:27:21,602 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2714c350 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:27:21, skipping insertion in model container [2019-11-28 18:27:21,602 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:21" (3/3) ... [2019-11-28 18:27:21,604 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_power.opt.i [2019-11-28 18:27:21,615 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:27:21,616 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:27:21,624 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:27:21,626 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:27:21,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,663 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,663 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,664 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,664 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,665 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,666 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,666 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,666 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,668 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,668 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,668 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,668 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,674 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,675 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:21,700 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:27:21,718 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:27:21,718 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:27:21,719 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:27:21,719 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:27:21,719 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:27:21,719 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:27:21,719 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:27:21,719 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:27:21,738 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-11-28 18:27:21,740 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:27:21,826 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:27:21,826 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:27:21,843 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:27:21,870 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:27:21,931 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:27:21,932 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:27:21,937 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:27:21,952 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-11-28 18:27:21,954 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:27:25,079 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 24 [2019-11-28 18:27:26,917 WARN L192 SmtUtils]: Spent 270.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-11-28 18:27:27,024 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 77 [2019-11-28 18:27:27,057 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46090 [2019-11-28 18:27:27,057 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-11-28 18:27:27,061 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 91 transitions [2019-11-28 18:27:27,703 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8654 states. [2019-11-28 18:27:27,706 INFO L276 IsEmpty]: Start isEmpty. Operand 8654 states. [2019-11-28 18:27:27,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-11-28 18:27:27,715 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:27,716 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-11-28 18:27:27,717 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:27,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:27,725 INFO L82 PathProgramCache]: Analyzing trace with hash 722891, now seen corresponding path program 1 times [2019-11-28 18:27:27,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:27,739 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776236974] [2019-11-28 18:27:27,739 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:27,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:28,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:28,057 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776236974] [2019-11-28 18:27:28,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:28,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:27:28,062 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [309142946] [2019-11-28 18:27:28,068 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:28,075 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:28,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:28,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:28,102 INFO L87 Difference]: Start difference. First operand 8654 states. Second operand 3 states. [2019-11-28 18:27:28,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:28,406 INFO L93 Difference]: Finished difference Result 8604 states and 28108 transitions. [2019-11-28 18:27:28,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:28,408 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-11-28 18:27:28,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:28,517 INFO L225 Difference]: With dead ends: 8604 [2019-11-28 18:27:28,518 INFO L226 Difference]: Without dead ends: 8436 [2019-11-28 18:27:28,522 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:28,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8436 states. [2019-11-28 18:27:28,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8436 to 8436. [2019-11-28 18:27:28,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8436 states. [2019-11-28 18:27:29,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8436 states to 8436 states and 27590 transitions. [2019-11-28 18:27:29,012 INFO L78 Accepts]: Start accepts. Automaton has 8436 states and 27590 transitions. Word has length 3 [2019-11-28 18:27:29,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:29,013 INFO L462 AbstractCegarLoop]: Abstraction has 8436 states and 27590 transitions. [2019-11-28 18:27:29,013 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:29,013 INFO L276 IsEmpty]: Start isEmpty. Operand 8436 states and 27590 transitions. [2019-11-28 18:27:29,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:27:29,016 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:29,016 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:29,017 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:29,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:29,018 INFO L82 PathProgramCache]: Analyzing trace with hash -1596153002, now seen corresponding path program 1 times [2019-11-28 18:27:29,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:29,018 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072312907] [2019-11-28 18:27:29,019 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:29,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:29,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:29,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1072312907] [2019-11-28 18:27:29,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:29,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:29,129 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87808925] [2019-11-28 18:27:29,131 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:29,131 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:29,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:29,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:29,131 INFO L87 Difference]: Start difference. First operand 8436 states and 27590 transitions. Second operand 4 states. [2019-11-28 18:27:29,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:29,544 INFO L93 Difference]: Finished difference Result 13130 states and 41153 transitions. [2019-11-28 18:27:29,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:29,546 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:27:29,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:29,652 INFO L225 Difference]: With dead ends: 13130 [2019-11-28 18:27:29,652 INFO L226 Difference]: Without dead ends: 13123 [2019-11-28 18:27:29,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:29,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13123 states. [2019-11-28 18:27:30,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13123 to 11988. [2019-11-28 18:27:30,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11988 states. [2019-11-28 18:27:30,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11988 states to 11988 states and 38075 transitions. [2019-11-28 18:27:30,294 INFO L78 Accepts]: Start accepts. Automaton has 11988 states and 38075 transitions. Word has length 11 [2019-11-28 18:27:30,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:30,294 INFO L462 AbstractCegarLoop]: Abstraction has 11988 states and 38075 transitions. [2019-11-28 18:27:30,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:30,295 INFO L276 IsEmpty]: Start isEmpty. Operand 11988 states and 38075 transitions. [2019-11-28 18:27:30,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:27:30,298 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:30,298 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:30,298 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:30,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:30,299 INFO L82 PathProgramCache]: Analyzing trace with hash 1194917716, now seen corresponding path program 1 times [2019-11-28 18:27:30,299 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:30,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772114094] [2019-11-28 18:27:30,300 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:30,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:30,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:30,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772114094] [2019-11-28 18:27:30,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:30,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:30,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1868113742] [2019-11-28 18:27:30,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:30,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:30,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:30,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:30,391 INFO L87 Difference]: Start difference. First operand 11988 states and 38075 transitions. Second operand 4 states. [2019-11-28 18:27:30,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:30,696 INFO L93 Difference]: Finished difference Result 14736 states and 46267 transitions. [2019-11-28 18:27:30,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:30,697 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:27:30,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:30,736 INFO L225 Difference]: With dead ends: 14736 [2019-11-28 18:27:30,736 INFO L226 Difference]: Without dead ends: 14736 [2019-11-28 18:27:30,737 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:30,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14736 states. [2019-11-28 18:27:31,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14736 to 13160. [2019-11-28 18:27:31,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13160 states. [2019-11-28 18:27:31,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13160 states to 13160 states and 41689 transitions. [2019-11-28 18:27:31,174 INFO L78 Accepts]: Start accepts. Automaton has 13160 states and 41689 transitions. Word has length 11 [2019-11-28 18:27:31,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:31,174 INFO L462 AbstractCegarLoop]: Abstraction has 13160 states and 41689 transitions. [2019-11-28 18:27:31,174 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:31,175 INFO L276 IsEmpty]: Start isEmpty. Operand 13160 states and 41689 transitions. [2019-11-28 18:27:31,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:27:31,180 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:31,180 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:31,181 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:31,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:31,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1502155024, now seen corresponding path program 1 times [2019-11-28 18:27:31,182 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:31,182 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [734458984] [2019-11-28 18:27:31,182 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:31,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:31,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:31,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [734458984] [2019-11-28 18:27:31,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:31,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:31,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076698480] [2019-11-28 18:27:31,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:31,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:31,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:31,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:31,289 INFO L87 Difference]: Start difference. First operand 13160 states and 41689 transitions. Second operand 5 states. [2019-11-28 18:27:31,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:31,796 INFO L93 Difference]: Finished difference Result 17572 states and 54523 transitions. [2019-11-28 18:27:31,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:27:31,800 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-11-28 18:27:31,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:31,856 INFO L225 Difference]: With dead ends: 17572 [2019-11-28 18:27:31,856 INFO L226 Difference]: Without dead ends: 17565 [2019-11-28 18:27:31,857 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:27:31,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17565 states. [2019-11-28 18:27:32,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17565 to 13105. [2019-11-28 18:27:32,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13105 states. [2019-11-28 18:27:32,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13105 states to 13105 states and 41426 transitions. [2019-11-28 18:27:32,454 INFO L78 Accepts]: Start accepts. Automaton has 13105 states and 41426 transitions. Word has length 17 [2019-11-28 18:27:32,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:32,455 INFO L462 AbstractCegarLoop]: Abstraction has 13105 states and 41426 transitions. [2019-11-28 18:27:32,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:32,455 INFO L276 IsEmpty]: Start isEmpty. Operand 13105 states and 41426 transitions. [2019-11-28 18:27:32,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:27:32,469 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:32,469 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:32,470 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:32,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:32,470 INFO L82 PathProgramCache]: Analyzing trace with hash 933350131, now seen corresponding path program 1 times [2019-11-28 18:27:32,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:32,471 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1590810941] [2019-11-28 18:27:32,471 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:32,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:32,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:32,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1590810941] [2019-11-28 18:27:32,515 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:32,515 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:32,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [853470458] [2019-11-28 18:27:32,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:32,516 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:32,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:32,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:32,517 INFO L87 Difference]: Start difference. First operand 13105 states and 41426 transitions. Second operand 3 states. [2019-11-28 18:27:32,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:32,649 INFO L93 Difference]: Finished difference Result 16057 states and 50095 transitions. [2019-11-28 18:27:32,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:32,650 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:27:32,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:32,694 INFO L225 Difference]: With dead ends: 16057 [2019-11-28 18:27:32,694 INFO L226 Difference]: Without dead ends: 16057 [2019-11-28 18:27:32,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:32,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16057 states. [2019-11-28 18:27:33,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16057 to 14186. [2019-11-28 18:27:33,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14186 states. [2019-11-28 18:27:33,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14186 states to 14186 states and 44710 transitions. [2019-11-28 18:27:33,112 INFO L78 Accepts]: Start accepts. Automaton has 14186 states and 44710 transitions. Word has length 25 [2019-11-28 18:27:33,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:33,113 INFO L462 AbstractCegarLoop]: Abstraction has 14186 states and 44710 transitions. [2019-11-28 18:27:33,114 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:33,114 INFO L276 IsEmpty]: Start isEmpty. Operand 14186 states and 44710 transitions. [2019-11-28 18:27:33,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:27:33,126 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:33,126 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:33,127 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:33,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:33,127 INFO L82 PathProgramCache]: Analyzing trace with hash 933194542, now seen corresponding path program 1 times [2019-11-28 18:27:33,128 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:33,128 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1530766001] [2019-11-28 18:27:33,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:33,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:33,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:33,214 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1530766001] [2019-11-28 18:27:33,215 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:33,215 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:33,215 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2030976906] [2019-11-28 18:27:33,215 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:33,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:33,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:33,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:33,216 INFO L87 Difference]: Start difference. First operand 14186 states and 44710 transitions. Second operand 4 states. [2019-11-28 18:27:33,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:33,250 INFO L93 Difference]: Finished difference Result 2296 states and 5226 transitions. [2019-11-28 18:27:33,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:27:33,250 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-11-28 18:27:33,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:33,256 INFO L225 Difference]: With dead ends: 2296 [2019-11-28 18:27:33,256 INFO L226 Difference]: Without dead ends: 2019 [2019-11-28 18:27:33,257 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:33,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2019 states. [2019-11-28 18:27:33,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2019 to 2019. [2019-11-28 18:27:33,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-11-28 18:27:33,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4460 transitions. [2019-11-28 18:27:33,294 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4460 transitions. Word has length 25 [2019-11-28 18:27:33,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:33,295 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4460 transitions. [2019-11-28 18:27:33,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:33,295 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4460 transitions. [2019-11-28 18:27:33,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:27:33,299 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:33,299 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:33,299 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:33,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:33,300 INFO L82 PathProgramCache]: Analyzing trace with hash -568804126, now seen corresponding path program 1 times [2019-11-28 18:27:33,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:33,301 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [369916957] [2019-11-28 18:27:33,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:33,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:33,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:33,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [369916957] [2019-11-28 18:27:33,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:33,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:27:33,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390366449] [2019-11-28 18:27:33,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:33,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:33,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:33,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:33,423 INFO L87 Difference]: Start difference. First operand 2019 states and 4460 transitions. Second operand 5 states. [2019-11-28 18:27:33,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:33,470 INFO L93 Difference]: Finished difference Result 416 states and 758 transitions. [2019-11-28 18:27:33,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:33,471 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:27:33,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:33,472 INFO L225 Difference]: With dead ends: 416 [2019-11-28 18:27:33,472 INFO L226 Difference]: Without dead ends: 371 [2019-11-28 18:27:33,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:27:33,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-11-28 18:27:33,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 343. [2019-11-28 18:27:33,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-11-28 18:27:33,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 618 transitions. [2019-11-28 18:27:33,479 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 618 transitions. Word has length 37 [2019-11-28 18:27:33,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:33,479 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 618 transitions. [2019-11-28 18:27:33,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:33,480 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 618 transitions. [2019-11-28 18:27:33,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:33,481 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:33,482 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:33,482 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:33,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:33,482 INFO L82 PathProgramCache]: Analyzing trace with hash -506418728, now seen corresponding path program 1 times [2019-11-28 18:27:33,483 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:33,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690940937] [2019-11-28 18:27:33,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:33,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:33,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:33,600 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690940937] [2019-11-28 18:27:33,600 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:33,601 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:33,601 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063409631] [2019-11-28 18:27:33,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:33,602 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:33,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:33,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:33,603 INFO L87 Difference]: Start difference. First operand 343 states and 618 transitions. Second operand 3 states. [2019-11-28 18:27:33,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:33,654 INFO L93 Difference]: Finished difference Result 343 states and 617 transitions. [2019-11-28 18:27:33,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:33,655 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:27:33,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:33,656 INFO L225 Difference]: With dead ends: 343 [2019-11-28 18:27:33,657 INFO L226 Difference]: Without dead ends: 343 [2019-11-28 18:27:33,657 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:33,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2019-11-28 18:27:33,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 343. [2019-11-28 18:27:33,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-11-28 18:27:33,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 617 transitions. [2019-11-28 18:27:33,662 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 617 transitions. Word has length 52 [2019-11-28 18:27:33,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:33,662 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 617 transitions. [2019-11-28 18:27:33,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:33,663 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 617 transitions. [2019-11-28 18:27:33,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:33,664 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:33,664 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:33,664 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:33,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:33,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1294054807, now seen corresponding path program 1 times [2019-11-28 18:27:33,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:33,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313281750] [2019-11-28 18:27:33,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:33,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:33,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:33,795 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [313281750] [2019-11-28 18:27:33,795 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:33,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:27:33,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [41181163] [2019-11-28 18:27:33,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:27:33,797 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:33,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:27:33,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:27:33,798 INFO L87 Difference]: Start difference. First operand 343 states and 617 transitions. Second operand 6 states. [2019-11-28 18:27:33,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:33,865 INFO L93 Difference]: Finished difference Result 533 states and 962 transitions. [2019-11-28 18:27:33,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:27:33,866 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-28 18:27:33,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:33,867 INFO L225 Difference]: With dead ends: 533 [2019-11-28 18:27:33,867 INFO L226 Difference]: Without dead ends: 232 [2019-11-28 18:27:33,867 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:27:33,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2019-11-28 18:27:33,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 232. [2019-11-28 18:27:33,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2019-11-28 18:27:33,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 424 transitions. [2019-11-28 18:27:33,872 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 424 transitions. Word has length 53 [2019-11-28 18:27:33,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:33,873 INFO L462 AbstractCegarLoop]: Abstraction has 232 states and 424 transitions. [2019-11-28 18:27:33,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:27:33,873 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 424 transitions. [2019-11-28 18:27:33,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:33,874 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:33,874 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:33,875 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:33,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:33,875 INFO L82 PathProgramCache]: Analyzing trace with hash -983517111, now seen corresponding path program 2 times [2019-11-28 18:27:33,876 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:33,876 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076801153] [2019-11-28 18:27:33,876 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:33,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:33,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:33,949 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076801153] [2019-11-28 18:27:33,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:33,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:33,950 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879707289] [2019-11-28 18:27:33,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:33,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:33,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:33,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:33,951 INFO L87 Difference]: Start difference. First operand 232 states and 424 transitions. Second operand 3 states. [2019-11-28 18:27:33,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:33,964 INFO L93 Difference]: Finished difference Result 221 states and 391 transitions. [2019-11-28 18:27:33,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:33,965 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:27:33,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:33,966 INFO L225 Difference]: With dead ends: 221 [2019-11-28 18:27:33,966 INFO L226 Difference]: Without dead ends: 221 [2019-11-28 18:27:33,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:33,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2019-11-28 18:27:33,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 221. [2019-11-28 18:27:33,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2019-11-28 18:27:33,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 391 transitions. [2019-11-28 18:27:33,970 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 391 transitions. Word has length 53 [2019-11-28 18:27:33,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:33,971 INFO L462 AbstractCegarLoop]: Abstraction has 221 states and 391 transitions. [2019-11-28 18:27:33,971 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:33,971 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 391 transitions. [2019-11-28 18:27:33,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:33,973 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:33,973 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:33,973 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:33,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:33,974 INFO L82 PathProgramCache]: Analyzing trace with hash -1034362442, now seen corresponding path program 1 times [2019-11-28 18:27:33,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:33,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133483932] [2019-11-28 18:27:33,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:34,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:34,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:34,593 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133483932] [2019-11-28 18:27:34,593 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:34,594 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-11-28 18:27:34,594 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187749506] [2019-11-28 18:27:34,595 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-11-28 18:27:34,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:34,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-11-28 18:27:34,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:27:34,597 INFO L87 Difference]: Start difference. First operand 221 states and 391 transitions. Second operand 18 states. [2019-11-28 18:27:35,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:35,996 INFO L93 Difference]: Finished difference Result 512 states and 883 transitions. [2019-11-28 18:27:35,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-11-28 18:27:35,997 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 54 [2019-11-28 18:27:35,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:35,999 INFO L225 Difference]: With dead ends: 512 [2019-11-28 18:27:36,001 INFO L226 Difference]: Without dead ends: 479 [2019-11-28 18:27:36,002 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 191 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=197, Invalid=925, Unknown=0, NotChecked=0, Total=1122 [2019-11-28 18:27:36,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2019-11-28 18:27:36,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 331. [2019-11-28 18:27:36,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2019-11-28 18:27:36,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 581 transitions. [2019-11-28 18:27:36,008 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 581 transitions. Word has length 54 [2019-11-28 18:27:36,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:36,009 INFO L462 AbstractCegarLoop]: Abstraction has 331 states and 581 transitions. [2019-11-28 18:27:36,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-11-28 18:27:36,009 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 581 transitions. [2019-11-28 18:27:36,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:36,012 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:36,012 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:36,013 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:36,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:36,013 INFO L82 PathProgramCache]: Analyzing trace with hash -633776330, now seen corresponding path program 2 times [2019-11-28 18:27:36,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:36,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818856267] [2019-11-28 18:27:36,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:36,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:36,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:36,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [818856267] [2019-11-28 18:27:36,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:36,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-11-28 18:27:36,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67050261] [2019-11-28 18:27:36,401 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-11-28 18:27:36,401 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:36,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-11-28 18:27:36,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2019-11-28 18:27:36,403 INFO L87 Difference]: Start difference. First operand 331 states and 581 transitions. Second operand 15 states. [2019-11-28 18:27:36,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:36,940 INFO L93 Difference]: Finished difference Result 593 states and 995 transitions. [2019-11-28 18:27:36,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-28 18:27:36,940 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 54 [2019-11-28 18:27:36,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:36,942 INFO L225 Difference]: With dead ends: 593 [2019-11-28 18:27:36,942 INFO L226 Difference]: Without dead ends: 560 [2019-11-28 18:27:36,944 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=89, Invalid=373, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:27:36,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 560 states. [2019-11-28 18:27:36,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 560 to 340. [2019-11-28 18:27:36,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2019-11-28 18:27:36,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 599 transitions. [2019-11-28 18:27:36,950 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 599 transitions. Word has length 54 [2019-11-28 18:27:36,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:36,950 INFO L462 AbstractCegarLoop]: Abstraction has 340 states and 599 transitions. [2019-11-28 18:27:36,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-11-28 18:27:36,951 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 599 transitions. [2019-11-28 18:27:36,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:36,952 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:36,952 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:36,953 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:36,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:36,953 INFO L82 PathProgramCache]: Analyzing trace with hash 923118888, now seen corresponding path program 3 times [2019-11-28 18:27:36,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:36,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289659603] [2019-11-28 18:27:36,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:36,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:37,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:37,327 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1289659603] [2019-11-28 18:27:37,327 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:37,327 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:27:37,327 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187627796] [2019-11-28 18:27:37,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:27:37,328 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:37,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:27:37,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:27:37,329 INFO L87 Difference]: Start difference. First operand 340 states and 599 transitions. Second operand 13 states. [2019-11-28 18:27:37,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:37,841 INFO L93 Difference]: Finished difference Result 517 states and 873 transitions. [2019-11-28 18:27:37,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-28 18:27:37,841 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-11-28 18:27:37,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:37,843 INFO L225 Difference]: With dead ends: 517 [2019-11-28 18:27:37,843 INFO L226 Difference]: Without dead ends: 484 [2019-11-28 18:27:37,844 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=71, Invalid=309, Unknown=0, NotChecked=0, Total=380 [2019-11-28 18:27:37,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 484 states. [2019-11-28 18:27:37,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 484 to 331. [2019-11-28 18:27:37,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2019-11-28 18:27:37,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 581 transitions. [2019-11-28 18:27:37,851 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 581 transitions. Word has length 54 [2019-11-28 18:27:37,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:37,851 INFO L462 AbstractCegarLoop]: Abstraction has 331 states and 581 transitions. [2019-11-28 18:27:37,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:27:37,852 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 581 transitions. [2019-11-28 18:27:37,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:37,853 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:37,853 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:37,854 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:37,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:37,854 INFO L82 PathProgramCache]: Analyzing trace with hash 1628225012, now seen corresponding path program 4 times [2019-11-28 18:27:37,854 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:37,855 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [642386291] [2019-11-28 18:27:37,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:37,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:38,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:38,193 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [642386291] [2019-11-28 18:27:38,193 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:38,193 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:27:38,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689366528] [2019-11-28 18:27:38,194 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:27:38,194 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:38,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:27:38,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:27:38,194 INFO L87 Difference]: Start difference. First operand 331 states and 581 transitions. Second operand 13 states. [2019-11-28 18:27:38,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:38,757 INFO L93 Difference]: Finished difference Result 500 states and 838 transitions. [2019-11-28 18:27:38,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-28 18:27:38,758 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-11-28 18:27:38,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:38,760 INFO L225 Difference]: With dead ends: 500 [2019-11-28 18:27:38,760 INFO L226 Difference]: Without dead ends: 467 [2019-11-28 18:27:38,761 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=82, Invalid=380, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:27:38,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 467 states. [2019-11-28 18:27:38,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 467 to 327. [2019-11-28 18:27:38,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-11-28 18:27:38,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 573 transitions. [2019-11-28 18:27:38,768 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 573 transitions. Word has length 54 [2019-11-28 18:27:38,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:38,770 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 573 transitions. [2019-11-28 18:27:38,770 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:27:38,770 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 573 transitions. [2019-11-28 18:27:38,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:38,771 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:38,771 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:38,772 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:38,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:38,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1347403058, now seen corresponding path program 5 times [2019-11-28 18:27:38,772 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:38,773 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712252686] [2019-11-28 18:27:38,773 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:38,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:39,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:39,046 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [712252686] [2019-11-28 18:27:39,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:39,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:27:39,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479044987] [2019-11-28 18:27:39,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:27:39,047 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:39,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:27:39,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:27:39,048 INFO L87 Difference]: Start difference. First operand 327 states and 573 transitions. Second operand 12 states. [2019-11-28 18:27:39,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:39,360 INFO L93 Difference]: Finished difference Result 430 states and 727 transitions. [2019-11-28 18:27:39,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:27:39,360 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-11-28 18:27:39,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:39,362 INFO L225 Difference]: With dead ends: 430 [2019-11-28 18:27:39,362 INFO L226 Difference]: Without dead ends: 397 [2019-11-28 18:27:39,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-11-28 18:27:39,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2019-11-28 18:27:39,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 329. [2019-11-28 18:27:39,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2019-11-28 18:27:39,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 576 transitions. [2019-11-28 18:27:39,367 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 576 transitions. Word has length 54 [2019-11-28 18:27:39,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:39,367 INFO L462 AbstractCegarLoop]: Abstraction has 329 states and 576 transitions. [2019-11-28 18:27:39,368 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:27:39,368 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 576 transitions. [2019-11-28 18:27:39,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:39,369 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:39,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:39,369 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:39,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:39,370 INFO L82 PathProgramCache]: Analyzing trace with hash -91775718, now seen corresponding path program 6 times [2019-11-28 18:27:39,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:39,370 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800497273] [2019-11-28 18:27:39,370 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:39,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:27:39,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:27:39,472 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:27:39,473 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:27:39,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2011~0.base_24| 1)) (= v_~y$w_buff0_used~0_834 0) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2011~0.base_24|) 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2011~0.base_24|) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= |v_ULTIMATE.start_main_~#t2011~0.offset_19| 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2011~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2011~0.base_24|) |v_ULTIMATE.start_main_~#t2011~0.offset_19| 0))) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2011~0.base_24| 4) |v_#length_13|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, ULTIMATE.start_main_~#t2011~0.base=|v_ULTIMATE.start_main_~#t2011~0.base_24|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_~#t2012~0.offset=|v_ULTIMATE.start_main_~#t2012~0.offset_16|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_~#t2012~0.base=|v_ULTIMATE.start_main_~#t2012~0.base_19|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_~#t2011~0.offset=|v_ULTIMATE.start_main_~#t2011~0.offset_19|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2011~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t2012~0.offset, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t2012~0.base, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_~#t2011~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:39,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2012~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2012~0.base_11|) |v_ULTIMATE.start_main_~#t2012~0.offset_10| 1)) |v_#memory_int_7|) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2012~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t2012~0.base_11| 0)) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2012~0.base_11| 1) |v_#valid_27|) (= |v_ULTIMATE.start_main_~#t2012~0.offset_10| 0) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2012~0.base_11|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2012~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2012~0.base=|v_ULTIMATE.start_main_~#t2012~0.base_11|, ULTIMATE.start_main_~#t2012~0.offset=|v_ULTIMATE.start_main_~#t2012~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2012~0.base, ULTIMATE.start_main_~#t2012~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:27:39,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:39,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In174838476 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In174838476 256)))) (or (and (= ~y$w_buff1~0_In174838476 |P1Thread1of1ForFork1_#t~ite9_Out174838476|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out174838476| ~y~0_In174838476)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In174838476, ~y$w_buff1~0=~y$w_buff1~0_In174838476, ~y~0=~y~0_In174838476, ~y$w_buff1_used~0=~y$w_buff1_used~0_In174838476} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In174838476, ~y$w_buff1~0=~y$w_buff1~0_In174838476, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out174838476|, ~y~0=~y~0_In174838476, ~y$w_buff1_used~0=~y$w_buff1_used~0_In174838476} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:27:39,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:27:39,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In82560263 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In82560263 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out82560263|) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out82560263| ~y$w_buff0_used~0_In82560263)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In82560263, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In82560263} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In82560263, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In82560263, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out82560263|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:27:39,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In2090176556 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In2090176556 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In2090176556 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In2090176556 256) 0))) (or (and (= ~y$w_buff1_used~0_In2090176556 |P1Thread1of1ForFork1_#t~ite12_Out2090176556|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out2090176556|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2090176556, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2090176556, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2090176556, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2090176556} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2090176556, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2090176556, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2090176556, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out2090176556|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2090176556} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:27:39,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-528179484 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-528179484 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-528179484|)) (and (= ~y$r_buff0_thd2~0_In-528179484 |P1Thread1of1ForFork1_#t~ite13_Out-528179484|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-528179484, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-528179484} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-528179484, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-528179484, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-528179484|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:27:39,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In351154061 256))) (.cse2 (= (mod ~y$r_buff0_thd2~0_In351154061 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In351154061 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In351154061 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out351154061| ~y$r_buff1_thd2~0_In351154061)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out351154061| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In351154061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In351154061, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In351154061, ~y$w_buff1_used~0=~y$w_buff1_used~0_In351154061} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In351154061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In351154061, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In351154061, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out351154061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In351154061} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:27:39,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:27:39,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-828878817 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-828878817 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-828878817|) (not .cse1)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-828878817| ~y$w_buff0_used~0_In-828878817)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-828878817, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-828878817} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-828878817|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-828878817, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-828878817} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:27:39,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In719881886 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In719881886 256))) (.cse3 (= (mod ~y$r_buff0_thd1~0_In719881886 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In719881886 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out719881886| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite6_Out719881886| ~y$w_buff1_used~0_In719881886)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In719881886, ~y$w_buff0_used~0=~y$w_buff0_used~0_In719881886, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In719881886, ~y$w_buff1_used~0=~y$w_buff1_used~0_In719881886} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out719881886|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In719881886, ~y$w_buff0_used~0=~y$w_buff0_used~0_In719881886, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In719881886, ~y$w_buff1_used~0=~y$w_buff1_used~0_In719881886} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:27:39,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1139352582 256) 0)) (.cse1 (= ~y$r_buff0_thd1~0_In-1139352582 ~y$r_buff0_thd1~0_Out-1139352582)) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-1139352582 256) 0))) (or (and .cse0 .cse1) (and (= ~y$r_buff0_thd1~0_Out-1139352582 0) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1139352582, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1139352582} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1139352582, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1139352582|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-1139352582} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:27:39,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd1~0_In1805281949 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1805281949 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1805281949 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd1~0_In1805281949 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out1805281949| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite8_Out1805281949| ~y$r_buff1_thd1~0_In1805281949)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1805281949, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1805281949, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1805281949, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1805281949} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1805281949, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1805281949, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1805281949|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1805281949, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1805281949} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:27:39,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:27:39,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:27:39,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-663410552| |ULTIMATE.start_main_#t~ite17_Out-663410552|)) (.cse1 (= (mod ~y$w_buff1_used~0_In-663410552 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-663410552 256)))) (or (and (= ~y~0_In-663410552 |ULTIMATE.start_main_#t~ite17_Out-663410552|) (or .cse0 .cse1) .cse2) (and .cse2 (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-663410552| ~y$w_buff1~0_In-663410552)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-663410552, ~y~0=~y~0_In-663410552, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-663410552, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-663410552} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-663410552|, ~y$w_buff1~0=~y$w_buff1~0_In-663410552, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-663410552|, ~y~0=~y~0_In-663410552, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-663410552, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-663410552} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:27:39,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1939850903 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1939850903 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite19_Out1939850903|)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In1939850903 |ULTIMATE.start_main_#t~ite19_Out1939850903|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1939850903, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1939850903} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1939850903, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1939850903|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1939850903} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:27:39,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-394923037 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-394923037 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In-394923037 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-394923037 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-394923037 |ULTIMATE.start_main_#t~ite20_Out-394923037|)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-394923037|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-394923037, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-394923037, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-394923037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-394923037} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-394923037, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-394923037, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-394923037|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-394923037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-394923037} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:27:39,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-550112095 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-550112095 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out-550112095|)) (and (= ~y$r_buff0_thd0~0_In-550112095 |ULTIMATE.start_main_#t~ite21_Out-550112095|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-550112095, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-550112095} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-550112095, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-550112095, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-550112095|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:27:39,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In-1504967373 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1504967373 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1504967373 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1504967373 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-1504967373| ~y$r_buff1_thd0~0_In-1504967373) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite22_Out-1504967373| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1504967373, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1504967373, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1504967373, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1504967373} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1504967373, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1504967373, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1504967373, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1504967373|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1504967373} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:27:39,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1099564317 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1099564317 256) 0))) (or (and (= (mod ~y$r_buff1_thd0~0_In-1099564317 256) 0) .cse0) (and (= (mod ~y$w_buff1_used~0_In-1099564317 256) 0) .cse0) (= (mod ~y$w_buff0_used~0_In-1099564317 256) 0))) .cse1 (= |ULTIMATE.start_main_#t~ite32_Out-1099564317| |ULTIMATE.start_main_#t~ite31_Out-1099564317|) (= ~y$w_buff1~0_In-1099564317 |ULTIMATE.start_main_#t~ite31_Out-1099564317|)) (and (= ~y$w_buff1~0_In-1099564317 |ULTIMATE.start_main_#t~ite32_Out-1099564317|) (= |ULTIMATE.start_main_#t~ite31_In-1099564317| |ULTIMATE.start_main_#t~ite31_Out-1099564317|) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1099564317, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1099564317, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1099564317, ~weak$$choice2~0=~weak$$choice2~0_In-1099564317, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-1099564317|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1099564317, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1099564317} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1099564317, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1099564317, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1099564317, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1099564317|, ~weak$$choice2~0=~weak$$choice2~0_In-1099564317, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1099564317|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1099564317, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1099564317} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:27:39,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:27:39,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:27:39,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:27:39,603 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:27:39 BasicIcfg [2019-11-28 18:27:39,603 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:27:39,606 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:27:39,606 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:27:39,607 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:27:39,607 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:21" (3/4) ... [2019-11-28 18:27:39,610 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:27:39,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2011~0.base_24| 1)) (= v_~y$w_buff0_used~0_834 0) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2011~0.base_24|) 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2011~0.base_24|) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= |v_ULTIMATE.start_main_~#t2011~0.offset_19| 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2011~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2011~0.base_24|) |v_ULTIMATE.start_main_~#t2011~0.offset_19| 0))) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2011~0.base_24| 4) |v_#length_13|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, ULTIMATE.start_main_~#t2011~0.base=|v_ULTIMATE.start_main_~#t2011~0.base_24|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_~#t2012~0.offset=|v_ULTIMATE.start_main_~#t2012~0.offset_16|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_~#t2012~0.base=|v_ULTIMATE.start_main_~#t2012~0.base_19|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_~#t2011~0.offset=|v_ULTIMATE.start_main_~#t2011~0.offset_19|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2011~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t2012~0.offset, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t2012~0.base, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_~#t2011~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:39,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2012~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2012~0.base_11|) |v_ULTIMATE.start_main_~#t2012~0.offset_10| 1)) |v_#memory_int_7|) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2012~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t2012~0.base_11| 0)) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2012~0.base_11| 1) |v_#valid_27|) (= |v_ULTIMATE.start_main_~#t2012~0.offset_10| 0) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2012~0.base_11|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2012~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2012~0.base=|v_ULTIMATE.start_main_~#t2012~0.base_11|, ULTIMATE.start_main_~#t2012~0.offset=|v_ULTIMATE.start_main_~#t2012~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2012~0.base, ULTIMATE.start_main_~#t2012~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:27:39,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:39,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In174838476 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In174838476 256)))) (or (and (= ~y$w_buff1~0_In174838476 |P1Thread1of1ForFork1_#t~ite9_Out174838476|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out174838476| ~y~0_In174838476)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In174838476, ~y$w_buff1~0=~y$w_buff1~0_In174838476, ~y~0=~y~0_In174838476, ~y$w_buff1_used~0=~y$w_buff1_used~0_In174838476} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In174838476, ~y$w_buff1~0=~y$w_buff1~0_In174838476, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out174838476|, ~y~0=~y~0_In174838476, ~y$w_buff1_used~0=~y$w_buff1_used~0_In174838476} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:27:39,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:27:39,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In82560263 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In82560263 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out82560263|) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out82560263| ~y$w_buff0_used~0_In82560263)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In82560263, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In82560263} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In82560263, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In82560263, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out82560263|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:27:39,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In2090176556 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In2090176556 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In2090176556 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In2090176556 256) 0))) (or (and (= ~y$w_buff1_used~0_In2090176556 |P1Thread1of1ForFork1_#t~ite12_Out2090176556|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out2090176556|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2090176556, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2090176556, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2090176556, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2090176556} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2090176556, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2090176556, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2090176556, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out2090176556|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2090176556} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:27:39,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-528179484 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-528179484 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-528179484|)) (and (= ~y$r_buff0_thd2~0_In-528179484 |P1Thread1of1ForFork1_#t~ite13_Out-528179484|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-528179484, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-528179484} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-528179484, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-528179484, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-528179484|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:27:39,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In351154061 256))) (.cse2 (= (mod ~y$r_buff0_thd2~0_In351154061 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In351154061 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In351154061 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out351154061| ~y$r_buff1_thd2~0_In351154061)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out351154061| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In351154061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In351154061, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In351154061, ~y$w_buff1_used~0=~y$w_buff1_used~0_In351154061} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In351154061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In351154061, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In351154061, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out351154061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In351154061} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:27:39,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:27:39,621 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-828878817 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-828878817 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-828878817|) (not .cse1)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-828878817| ~y$w_buff0_used~0_In-828878817)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-828878817, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-828878817} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-828878817|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-828878817, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-828878817} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:27:39,621 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In719881886 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In719881886 256))) (.cse3 (= (mod ~y$r_buff0_thd1~0_In719881886 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In719881886 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out719881886| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite6_Out719881886| ~y$w_buff1_used~0_In719881886)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In719881886, ~y$w_buff0_used~0=~y$w_buff0_used~0_In719881886, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In719881886, ~y$w_buff1_used~0=~y$w_buff1_used~0_In719881886} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out719881886|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In719881886, ~y$w_buff0_used~0=~y$w_buff0_used~0_In719881886, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In719881886, ~y$w_buff1_used~0=~y$w_buff1_used~0_In719881886} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:27:39,622 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1139352582 256) 0)) (.cse1 (= ~y$r_buff0_thd1~0_In-1139352582 ~y$r_buff0_thd1~0_Out-1139352582)) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-1139352582 256) 0))) (or (and .cse0 .cse1) (and (= ~y$r_buff0_thd1~0_Out-1139352582 0) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1139352582, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1139352582} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1139352582, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1139352582|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-1139352582} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:27:39,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd1~0_In1805281949 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1805281949 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1805281949 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd1~0_In1805281949 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out1805281949| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite8_Out1805281949| ~y$r_buff1_thd1~0_In1805281949)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1805281949, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1805281949, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1805281949, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1805281949} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1805281949, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1805281949, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1805281949|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1805281949, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1805281949} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:27:39,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:27:39,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:27:39,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-663410552| |ULTIMATE.start_main_#t~ite17_Out-663410552|)) (.cse1 (= (mod ~y$w_buff1_used~0_In-663410552 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-663410552 256)))) (or (and (= ~y~0_In-663410552 |ULTIMATE.start_main_#t~ite17_Out-663410552|) (or .cse0 .cse1) .cse2) (and .cse2 (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-663410552| ~y$w_buff1~0_In-663410552)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-663410552, ~y~0=~y~0_In-663410552, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-663410552, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-663410552} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-663410552|, ~y$w_buff1~0=~y$w_buff1~0_In-663410552, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-663410552|, ~y~0=~y~0_In-663410552, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-663410552, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-663410552} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:27:39,624 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1939850903 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1939850903 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite19_Out1939850903|)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In1939850903 |ULTIMATE.start_main_#t~ite19_Out1939850903|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1939850903, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1939850903} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1939850903, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1939850903|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1939850903} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:27:39,624 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-394923037 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-394923037 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In-394923037 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-394923037 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-394923037 |ULTIMATE.start_main_#t~ite20_Out-394923037|)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-394923037|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-394923037, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-394923037, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-394923037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-394923037} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-394923037, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-394923037, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-394923037|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-394923037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-394923037} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:27:39,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-550112095 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-550112095 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out-550112095|)) (and (= ~y$r_buff0_thd0~0_In-550112095 |ULTIMATE.start_main_#t~ite21_Out-550112095|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-550112095, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-550112095} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-550112095, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-550112095, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-550112095|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:27:39,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In-1504967373 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1504967373 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1504967373 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1504967373 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-1504967373| ~y$r_buff1_thd0~0_In-1504967373) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite22_Out-1504967373| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1504967373, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1504967373, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1504967373, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1504967373} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1504967373, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1504967373, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1504967373, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1504967373|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1504967373} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:27:39,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1099564317 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1099564317 256) 0))) (or (and (= (mod ~y$r_buff1_thd0~0_In-1099564317 256) 0) .cse0) (and (= (mod ~y$w_buff1_used~0_In-1099564317 256) 0) .cse0) (= (mod ~y$w_buff0_used~0_In-1099564317 256) 0))) .cse1 (= |ULTIMATE.start_main_#t~ite32_Out-1099564317| |ULTIMATE.start_main_#t~ite31_Out-1099564317|) (= ~y$w_buff1~0_In-1099564317 |ULTIMATE.start_main_#t~ite31_Out-1099564317|)) (and (= ~y$w_buff1~0_In-1099564317 |ULTIMATE.start_main_#t~ite32_Out-1099564317|) (= |ULTIMATE.start_main_#t~ite31_In-1099564317| |ULTIMATE.start_main_#t~ite31_Out-1099564317|) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1099564317, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1099564317, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1099564317, ~weak$$choice2~0=~weak$$choice2~0_In-1099564317, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-1099564317|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1099564317, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1099564317} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1099564317, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1099564317, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1099564317, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1099564317|, ~weak$$choice2~0=~weak$$choice2~0_In-1099564317, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1099564317|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1099564317, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1099564317} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:27:39,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:27:39,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:27:39,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:27:39,713 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:27:39,713 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:27:39,715 INFO L168 Benchmark]: Toolchain (without parser) took 20081.80 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 513.8 MB). Free memory was 957.7 MB in the beginning and 770.5 MB in the end (delta: 187.1 MB). Peak memory consumption was 700.9 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,715 INFO L168 Benchmark]: CDTParser took 0.34 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:27:39,720 INFO L168 Benchmark]: CACSL2BoogieTranslator took 975.29 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.2 MB). Free memory was 957.7 MB in the beginning and 1.1 GB in the end (delta: -136.7 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,721 INFO L168 Benchmark]: Boogie Procedure Inliner took 86.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,723 INFO L168 Benchmark]: Boogie Preprocessor took 55.38 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:27:39,724 INFO L168 Benchmark]: RCFGBuilder took 843.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,724 INFO L168 Benchmark]: TraceAbstraction took 18007.01 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 380.6 MB). Free memory was 1.0 GB in the beginning and 788.0 MB in the end (delta: 255.2 MB). Peak memory consumption was 635.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,725 INFO L168 Benchmark]: Witness Printer took 106.94 ms. Allocated memory is still 1.5 GB. Free memory was 788.0 MB in the beginning and 770.5 MB in the end (delta: 17.5 MB). Peak memory consumption was 17.5 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,734 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 975.29 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.2 MB). Free memory was 957.7 MB in the beginning and 1.1 GB in the end (delta: -136.7 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 86.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 55.38 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 843.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18007.01 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 380.6 MB). Free memory was 1.0 GB in the beginning and 788.0 MB in the end (delta: 255.2 MB). Peak memory consumption was 635.8 MB. Max. memory is 11.5 GB. * Witness Printer took 106.94 ms. Allocated memory is still 1.5 GB. Free memory was 788.0 MB in the beginning and 770.5 MB in the end (delta: 17.5 MB). Peak memory consumption was 17.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.3s, 146 ProgramPointsBefore, 79 ProgramPointsAfterwards, 180 TransitionsBefore, 91 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 3678 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 221 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.7s, 0 MoverChecksTotal, 46090 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t2011, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2012, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L756] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 17.7s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 5.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1510 SDtfs, 1715 SDslu, 4918 SDs, 0 SdLazy, 2976 SolverSat, 182 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 163 GetRequests, 19 SyntacticMatches, 4 SemanticMatches, 140 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 420 ImplicationChecksByTransitivity, 2.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14186occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.6s AutomataMinimizationTime, 15 MinimizatonAttempts, 9799 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 611 NumberOfCodeBlocks, 611 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 542 ConstructedInterpolants, 0 QuantifiedInterpolants, 144796 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...