./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe010_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe010_pso.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 91d6ad7ac966b9170f1c4fb60f8a5eb3423f5597 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:27:22,119 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:27:22,122 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:27:22,141 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:27:22,141 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:27:22,144 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:27:22,146 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:27:22,157 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:27:22,162 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:27:22,166 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:27:22,168 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:27:22,170 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:27:22,171 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:27:22,174 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:27:22,175 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:27:22,177 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:27:22,180 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:27:22,182 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:27:22,185 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:27:22,189 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:27:22,194 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:27:22,199 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:27:22,200 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:27:22,202 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:27:22,207 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:27:22,208 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:27:22,208 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:27:22,210 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:27:22,211 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:27:22,212 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:27:22,212 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:27:22,213 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:27:22,213 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:27:22,215 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:27:22,216 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:27:22,216 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:27:22,217 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:27:22,218 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:27:22,218 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:27:22,219 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:27:22,221 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:27:22,222 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:27:22,259 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:27:22,262 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:27:22,263 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:27:22,264 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:27:22,265 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:27:22,265 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:27:22,265 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:27:22,267 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:27:22,267 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:27:22,267 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:27:22,267 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:27:22,268 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:27:22,269 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:27:22,269 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:27:22,269 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:27:22,270 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:27:22,270 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:27:22,271 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:27:22,271 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:27:22,271 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:27:22,271 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:27:22,272 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:27:22,272 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:27:22,273 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:27:22,273 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:27:22,273 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:27:22,274 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:27:22,274 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:27:22,275 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:27:22,275 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 91d6ad7ac966b9170f1c4fb60f8a5eb3423f5597 [2019-11-28 18:27:22,612 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:27:22,629 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:27:22,632 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:27:22,634 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:27:22,636 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:27:22,637 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe010_pso.opt.i [2019-11-28 18:27:22,712 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5b0b0945a/28652f4c3bb84b2e9b1e35d6d5a5aaac/FLAG9b3706b08 [2019-11-28 18:27:23,250 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:27:23,251 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe010_pso.opt.i [2019-11-28 18:27:23,274 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5b0b0945a/28652f4c3bb84b2e9b1e35d6d5a5aaac/FLAG9b3706b08 [2019-11-28 18:27:23,589 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5b0b0945a/28652f4c3bb84b2e9b1e35d6d5a5aaac [2019-11-28 18:27:23,592 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:27:23,594 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:27:23,595 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:27:23,595 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:27:23,600 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:27:23,601 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:27:23" (1/1) ... [2019-11-28 18:27:23,604 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12ebd404 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:23, skipping insertion in model container [2019-11-28 18:27:23,605 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:27:23" (1/1) ... [2019-11-28 18:27:23,613 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:27:23,681 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:27:24,242 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:27:24,266 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:27:24,340 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:27:24,417 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:27:24,418 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24 WrapperNode [2019-11-28 18:27:24,418 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:27:24,419 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:27:24,419 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:27:24,419 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:27:24,428 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,447 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,493 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:27:24,493 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:27:24,494 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:27:24,494 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:27:24,504 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,505 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,509 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,510 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,519 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,523 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,526 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... [2019-11-28 18:27:24,531 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:27:24,532 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:27:24,532 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:27:24,532 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:27:24,533 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:27:24,609 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:27:24,610 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:27:24,610 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:27:24,610 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:27:24,610 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:27:24,611 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:27:24,611 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:27:24,611 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:27:24,611 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:27:24,611 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:27:24,612 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:27:24,614 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:27:25,356 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:27:25,356 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:27:25,360 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:25 BoogieIcfgContainer [2019-11-28 18:27:25,360 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:27:25,361 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:27:25,363 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:27:25,367 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:27:25,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:27:23" (1/3) ... [2019-11-28 18:27:25,370 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72f49f5b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:27:25, skipping insertion in model container [2019-11-28 18:27:25,370 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:24" (2/3) ... [2019-11-28 18:27:25,371 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72f49f5b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:27:25, skipping insertion in model container [2019-11-28 18:27:25,371 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:25" (3/3) ... [2019-11-28 18:27:25,374 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_pso.opt.i [2019-11-28 18:27:25,385 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:27:25,385 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:27:25,396 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:27:25,398 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:27:25,452 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,452 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,453 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,453 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,453 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,454 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,454 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,454 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,455 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,455 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,455 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,456 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,456 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,464 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,465 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,466 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,466 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,470 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,470 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,471 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,474 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,474 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,474 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,475 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,476 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,476 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,477 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,477 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,477 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,477 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,478 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,478 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,478 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,479 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:25,496 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:27:25,513 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:27:25,513 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:27:25,513 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:27:25,513 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:27:25,514 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:27:25,514 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:27:25,514 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:27:25,514 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:27:25,532 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-11-28 18:27:25,534 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:27:25,618 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:27:25,618 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:27:25,634 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:27:25,657 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:27:25,705 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:27:25,705 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:27:25,716 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:27:25,732 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-11-28 18:27:25,734 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:27:30,508 WARN L192 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-11-28 18:27:30,638 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46090 [2019-11-28 18:27:30,639 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-11-28 18:27:30,643 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 91 transitions [2019-11-28 18:27:31,168 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8654 states. [2019-11-28 18:27:31,171 INFO L276 IsEmpty]: Start isEmpty. Operand 8654 states. [2019-11-28 18:27:31,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-11-28 18:27:31,179 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:31,180 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-11-28 18:27:31,180 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:31,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:31,188 INFO L82 PathProgramCache]: Analyzing trace with hash 722891, now seen corresponding path program 1 times [2019-11-28 18:27:31,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:31,201 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429061883] [2019-11-28 18:27:31,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:31,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:31,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:31,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429061883] [2019-11-28 18:27:31,426 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:31,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:27:31,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1683617993] [2019-11-28 18:27:31,432 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:31,432 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:31,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:31,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:31,451 INFO L87 Difference]: Start difference. First operand 8654 states. Second operand 3 states. [2019-11-28 18:27:31,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:31,753 INFO L93 Difference]: Finished difference Result 8604 states and 28108 transitions. [2019-11-28 18:27:31,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:31,755 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-11-28 18:27:31,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:31,835 INFO L225 Difference]: With dead ends: 8604 [2019-11-28 18:27:31,836 INFO L226 Difference]: Without dead ends: 8436 [2019-11-28 18:27:31,837 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:31,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8436 states. [2019-11-28 18:27:32,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8436 to 8436. [2019-11-28 18:27:32,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8436 states. [2019-11-28 18:27:32,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8436 states to 8436 states and 27590 transitions. [2019-11-28 18:27:32,280 INFO L78 Accepts]: Start accepts. Automaton has 8436 states and 27590 transitions. Word has length 3 [2019-11-28 18:27:32,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:32,280 INFO L462 AbstractCegarLoop]: Abstraction has 8436 states and 27590 transitions. [2019-11-28 18:27:32,280 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:32,280 INFO L276 IsEmpty]: Start isEmpty. Operand 8436 states and 27590 transitions. [2019-11-28 18:27:32,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:27:32,283 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:32,283 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:32,283 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:32,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:32,284 INFO L82 PathProgramCache]: Analyzing trace with hash -1596153002, now seen corresponding path program 1 times [2019-11-28 18:27:32,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:32,284 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469348176] [2019-11-28 18:27:32,284 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:32,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:32,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:32,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469348176] [2019-11-28 18:27:32,423 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:32,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:32,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612821444] [2019-11-28 18:27:32,425 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:32,425 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:32,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:32,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:32,426 INFO L87 Difference]: Start difference. First operand 8436 states and 27590 transitions. Second operand 4 states. [2019-11-28 18:27:32,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:32,764 INFO L93 Difference]: Finished difference Result 13130 states and 41153 transitions. [2019-11-28 18:27:32,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:32,765 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:27:32,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:32,855 INFO L225 Difference]: With dead ends: 13130 [2019-11-28 18:27:32,856 INFO L226 Difference]: Without dead ends: 13123 [2019-11-28 18:27:32,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:32,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13123 states. [2019-11-28 18:27:33,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13123 to 11988. [2019-11-28 18:27:33,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11988 states. [2019-11-28 18:27:33,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11988 states to 11988 states and 38075 transitions. [2019-11-28 18:27:33,442 INFO L78 Accepts]: Start accepts. Automaton has 11988 states and 38075 transitions. Word has length 11 [2019-11-28 18:27:33,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:33,443 INFO L462 AbstractCegarLoop]: Abstraction has 11988 states and 38075 transitions. [2019-11-28 18:27:33,443 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:33,443 INFO L276 IsEmpty]: Start isEmpty. Operand 11988 states and 38075 transitions. [2019-11-28 18:27:33,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:27:33,461 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:33,461 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:33,462 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:33,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:33,462 INFO L82 PathProgramCache]: Analyzing trace with hash 1194917716, now seen corresponding path program 1 times [2019-11-28 18:27:33,463 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:33,463 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813715531] [2019-11-28 18:27:33,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:33,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:33,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:33,587 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813715531] [2019-11-28 18:27:33,588 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:33,588 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:33,588 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1251218622] [2019-11-28 18:27:33,589 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:33,589 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:33,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:33,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:33,590 INFO L87 Difference]: Start difference. First operand 11988 states and 38075 transitions. Second operand 4 states. [2019-11-28 18:27:33,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:33,852 INFO L93 Difference]: Finished difference Result 14736 states and 46267 transitions. [2019-11-28 18:27:33,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:33,853 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:27:33,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:33,905 INFO L225 Difference]: With dead ends: 14736 [2019-11-28 18:27:33,905 INFO L226 Difference]: Without dead ends: 14736 [2019-11-28 18:27:33,906 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:34,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14736 states. [2019-11-28 18:27:34,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14736 to 13160. [2019-11-28 18:27:34,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13160 states. [2019-11-28 18:27:34,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13160 states to 13160 states and 41689 transitions. [2019-11-28 18:27:34,346 INFO L78 Accepts]: Start accepts. Automaton has 13160 states and 41689 transitions. Word has length 11 [2019-11-28 18:27:34,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:34,346 INFO L462 AbstractCegarLoop]: Abstraction has 13160 states and 41689 transitions. [2019-11-28 18:27:34,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:34,348 INFO L276 IsEmpty]: Start isEmpty. Operand 13160 states and 41689 transitions. [2019-11-28 18:27:34,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:27:34,352 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:34,352 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:34,352 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:34,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:34,353 INFO L82 PathProgramCache]: Analyzing trace with hash -1502155024, now seen corresponding path program 1 times [2019-11-28 18:27:34,353 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:34,354 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1440779684] [2019-11-28 18:27:34,354 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:34,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:34,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:34,465 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1440779684] [2019-11-28 18:27:34,465 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:34,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:34,470 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1003994404] [2019-11-28 18:27:34,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:34,470 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:34,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:34,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:34,471 INFO L87 Difference]: Start difference. First operand 13160 states and 41689 transitions. Second operand 5 states. [2019-11-28 18:27:34,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:34,894 INFO L93 Difference]: Finished difference Result 17572 states and 54523 transitions. [2019-11-28 18:27:34,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:27:34,894 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-11-28 18:27:34,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:34,938 INFO L225 Difference]: With dead ends: 17572 [2019-11-28 18:27:34,939 INFO L226 Difference]: Without dead ends: 17565 [2019-11-28 18:27:34,939 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:27:35,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17565 states. [2019-11-28 18:27:35,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17565 to 13105. [2019-11-28 18:27:35,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13105 states. [2019-11-28 18:27:35,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13105 states to 13105 states and 41426 transitions. [2019-11-28 18:27:35,533 INFO L78 Accepts]: Start accepts. Automaton has 13105 states and 41426 transitions. Word has length 17 [2019-11-28 18:27:35,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:35,534 INFO L462 AbstractCegarLoop]: Abstraction has 13105 states and 41426 transitions. [2019-11-28 18:27:35,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:35,543 INFO L276 IsEmpty]: Start isEmpty. Operand 13105 states and 41426 transitions. [2019-11-28 18:27:35,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:27:35,559 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:35,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:35,560 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:35,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:35,560 INFO L82 PathProgramCache]: Analyzing trace with hash 933350131, now seen corresponding path program 1 times [2019-11-28 18:27:35,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:35,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146559664] [2019-11-28 18:27:35,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:35,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:35,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:35,608 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146559664] [2019-11-28 18:27:35,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:35,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:35,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [823132822] [2019-11-28 18:27:35,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:35,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:35,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:35,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:35,610 INFO L87 Difference]: Start difference. First operand 13105 states and 41426 transitions. Second operand 3 states. [2019-11-28 18:27:35,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:35,717 INFO L93 Difference]: Finished difference Result 16057 states and 50095 transitions. [2019-11-28 18:27:35,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:35,718 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:27:35,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:35,762 INFO L225 Difference]: With dead ends: 16057 [2019-11-28 18:27:35,762 INFO L226 Difference]: Without dead ends: 16057 [2019-11-28 18:27:35,763 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:35,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16057 states. [2019-11-28 18:27:36,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16057 to 14186. [2019-11-28 18:27:36,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14186 states. [2019-11-28 18:27:36,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14186 states to 14186 states and 44710 transitions. [2019-11-28 18:27:36,162 INFO L78 Accepts]: Start accepts. Automaton has 14186 states and 44710 transitions. Word has length 25 [2019-11-28 18:27:36,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:36,164 INFO L462 AbstractCegarLoop]: Abstraction has 14186 states and 44710 transitions. [2019-11-28 18:27:36,164 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:36,164 INFO L276 IsEmpty]: Start isEmpty. Operand 14186 states and 44710 transitions. [2019-11-28 18:27:36,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:27:36,178 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:36,178 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:36,178 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:36,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:36,179 INFO L82 PathProgramCache]: Analyzing trace with hash 933194542, now seen corresponding path program 1 times [2019-11-28 18:27:36,179 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:36,179 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147463385] [2019-11-28 18:27:36,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:36,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:36,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:36,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147463385] [2019-11-28 18:27:36,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:36,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:36,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801726938] [2019-11-28 18:27:36,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:36,248 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:36,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:36,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:36,249 INFO L87 Difference]: Start difference. First operand 14186 states and 44710 transitions. Second operand 4 states. [2019-11-28 18:27:36,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:36,283 INFO L93 Difference]: Finished difference Result 2296 states and 5226 transitions. [2019-11-28 18:27:36,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:27:36,283 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-11-28 18:27:36,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:36,287 INFO L225 Difference]: With dead ends: 2296 [2019-11-28 18:27:36,288 INFO L226 Difference]: Without dead ends: 2019 [2019-11-28 18:27:36,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:36,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2019 states. [2019-11-28 18:27:36,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2019 to 2019. [2019-11-28 18:27:36,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-11-28 18:27:36,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4460 transitions. [2019-11-28 18:27:36,323 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4460 transitions. Word has length 25 [2019-11-28 18:27:36,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:36,324 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4460 transitions. [2019-11-28 18:27:36,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:36,324 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4460 transitions. [2019-11-28 18:27:36,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:27:36,328 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:36,328 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:36,328 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:36,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:36,329 INFO L82 PathProgramCache]: Analyzing trace with hash -568804126, now seen corresponding path program 1 times [2019-11-28 18:27:36,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:36,329 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074685021] [2019-11-28 18:27:36,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:36,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:36,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:36,426 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074685021] [2019-11-28 18:27:36,426 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:36,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:27:36,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1146955406] [2019-11-28 18:27:36,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:36,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:36,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:36,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:36,428 INFO L87 Difference]: Start difference. First operand 2019 states and 4460 transitions. Second operand 5 states. [2019-11-28 18:27:36,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:36,480 INFO L93 Difference]: Finished difference Result 416 states and 758 transitions. [2019-11-28 18:27:36,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:36,481 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:27:36,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:36,482 INFO L225 Difference]: With dead ends: 416 [2019-11-28 18:27:36,482 INFO L226 Difference]: Without dead ends: 371 [2019-11-28 18:27:36,482 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:27:36,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-11-28 18:27:36,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 343. [2019-11-28 18:27:36,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-11-28 18:27:36,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 618 transitions. [2019-11-28 18:27:36,488 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 618 transitions. Word has length 37 [2019-11-28 18:27:36,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:36,489 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 618 transitions. [2019-11-28 18:27:36,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:36,489 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 618 transitions. [2019-11-28 18:27:36,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:36,491 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:36,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:36,491 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:36,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:36,492 INFO L82 PathProgramCache]: Analyzing trace with hash -506418728, now seen corresponding path program 1 times [2019-11-28 18:27:36,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:36,493 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075649978] [2019-11-28 18:27:36,493 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:36,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:36,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:36,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075649978] [2019-11-28 18:27:36,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:36,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:27:36,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [702578868] [2019-11-28 18:27:36,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:27:36,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:36,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:27:36,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:27:36,625 INFO L87 Difference]: Start difference. First operand 343 states and 618 transitions. Second operand 7 states. [2019-11-28 18:27:37,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:37,032 INFO L93 Difference]: Finished difference Result 539 states and 970 transitions. [2019-11-28 18:27:37,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:27:37,033 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:27:37,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:37,034 INFO L225 Difference]: With dead ends: 539 [2019-11-28 18:27:37,035 INFO L226 Difference]: Without dead ends: 539 [2019-11-28 18:27:37,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:27:37,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-11-28 18:27:37,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 444. [2019-11-28 18:27:37,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 444 states. [2019-11-28 18:27:37,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 802 transitions. [2019-11-28 18:27:37,042 INFO L78 Accepts]: Start accepts. Automaton has 444 states and 802 transitions. Word has length 52 [2019-11-28 18:27:37,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:37,044 INFO L462 AbstractCegarLoop]: Abstraction has 444 states and 802 transitions. [2019-11-28 18:27:37,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:27:37,045 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 802 transitions. [2019-11-28 18:27:37,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:37,046 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:37,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:37,046 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:37,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:37,047 INFO L82 PathProgramCache]: Analyzing trace with hash 22285210, now seen corresponding path program 2 times [2019-11-28 18:27:37,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:37,047 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [732799947] [2019-11-28 18:27:37,047 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:37,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:37,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:37,155 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [732799947] [2019-11-28 18:27:37,156 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:37,156 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:27:37,156 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476148985] [2019-11-28 18:27:37,156 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:37,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:37,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:37,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:37,157 INFO L87 Difference]: Start difference. First operand 444 states and 802 transitions. Second operand 5 states. [2019-11-28 18:27:37,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:37,359 INFO L93 Difference]: Finished difference Result 621 states and 1127 transitions. [2019-11-28 18:27:37,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:27:37,360 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-28 18:27:37,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:37,361 INFO L225 Difference]: With dead ends: 621 [2019-11-28 18:27:37,361 INFO L226 Difference]: Without dead ends: 621 [2019-11-28 18:27:37,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:27:37,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2019-11-28 18:27:37,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 504. [2019-11-28 18:27:37,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 504 states. [2019-11-28 18:27:37,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 921 transitions. [2019-11-28 18:27:37,372 INFO L78 Accepts]: Start accepts. Automaton has 504 states and 921 transitions. Word has length 52 [2019-11-28 18:27:37,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:37,373 INFO L462 AbstractCegarLoop]: Abstraction has 504 states and 921 transitions. [2019-11-28 18:27:37,373 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:37,374 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 921 transitions. [2019-11-28 18:27:37,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:37,378 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:37,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:37,379 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:37,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:37,380 INFO L82 PathProgramCache]: Analyzing trace with hash 260455414, now seen corresponding path program 3 times [2019-11-28 18:27:37,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:37,381 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785766582] [2019-11-28 18:27:37,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:37,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:37,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:37,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [785766582] [2019-11-28 18:27:37,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:37,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:27:37,565 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370683251] [2019-11-28 18:27:37,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:27:37,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:37,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:27:37,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:27:37,568 INFO L87 Difference]: Start difference. First operand 504 states and 921 transitions. Second operand 6 states. [2019-11-28 18:27:37,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:37,661 INFO L93 Difference]: Finished difference Result 830 states and 1522 transitions. [2019-11-28 18:27:37,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:27:37,661 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:27:37,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:37,663 INFO L225 Difference]: With dead ends: 830 [2019-11-28 18:27:37,663 INFO L226 Difference]: Without dead ends: 395 [2019-11-28 18:27:37,664 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:27:37,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2019-11-28 18:27:37,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 395. [2019-11-28 18:27:37,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 395 states. [2019-11-28 18:27:37,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 731 transitions. [2019-11-28 18:27:37,674 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 731 transitions. Word has length 52 [2019-11-28 18:27:37,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:37,677 INFO L462 AbstractCegarLoop]: Abstraction has 395 states and 731 transitions. [2019-11-28 18:27:37,677 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:27:37,677 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 731 transitions. [2019-11-28 18:27:37,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:37,681 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:37,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:37,681 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:37,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:37,682 INFO L82 PathProgramCache]: Analyzing trace with hash 48438020, now seen corresponding path program 4 times [2019-11-28 18:27:37,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:37,683 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095982314] [2019-11-28 18:27:37,683 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:37,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:37,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:37,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095982314] [2019-11-28 18:27:37,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:37,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:27:37,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853748971] [2019-11-28 18:27:37,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:27:37,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:37,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:27:37,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:27:37,865 INFO L87 Difference]: Start difference. First operand 395 states and 731 transitions. Second operand 6 states. [2019-11-28 18:27:38,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:38,112 INFO L93 Difference]: Finished difference Result 555 states and 1010 transitions. [2019-11-28 18:27:38,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:27:38,112 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:27:38,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:38,113 INFO L225 Difference]: With dead ends: 555 [2019-11-28 18:27:38,113 INFO L226 Difference]: Without dead ends: 555 [2019-11-28 18:27:38,113 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:27:38,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2019-11-28 18:27:38,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 407. [2019-11-28 18:27:38,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 407 states. [2019-11-28 18:27:38,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 753 transitions. [2019-11-28 18:27:38,121 INFO L78 Accepts]: Start accepts. Automaton has 407 states and 753 transitions. Word has length 52 [2019-11-28 18:27:38,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:38,122 INFO L462 AbstractCegarLoop]: Abstraction has 407 states and 753 transitions. [2019-11-28 18:27:38,122 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:27:38,122 INFO L276 IsEmpty]: Start isEmpty. Operand 407 states and 753 transitions. [2019-11-28 18:27:38,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:38,123 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:38,123 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:38,124 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:38,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:38,124 INFO L82 PathProgramCache]: Analyzing trace with hash -983517111, now seen corresponding path program 1 times [2019-11-28 18:27:38,124 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:38,125 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555546211] [2019-11-28 18:27:38,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:38,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:38,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:38,180 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555546211] [2019-11-28 18:27:38,181 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:38,181 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:38,181 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856915024] [2019-11-28 18:27:38,182 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:38,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:38,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:38,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:38,183 INFO L87 Difference]: Start difference. First operand 407 states and 753 transitions. Second operand 3 states. [2019-11-28 18:27:38,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:38,198 INFO L93 Difference]: Finished difference Result 357 states and 640 transitions. [2019-11-28 18:27:38,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:38,199 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:27:38,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:38,199 INFO L225 Difference]: With dead ends: 357 [2019-11-28 18:27:38,200 INFO L226 Difference]: Without dead ends: 357 [2019-11-28 18:27:38,200 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:38,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2019-11-28 18:27:38,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 357. [2019-11-28 18:27:38,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 357 states. [2019-11-28 18:27:38,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 640 transitions. [2019-11-28 18:27:38,207 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 640 transitions. Word has length 53 [2019-11-28 18:27:38,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:38,207 INFO L462 AbstractCegarLoop]: Abstraction has 357 states and 640 transitions. [2019-11-28 18:27:38,207 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:38,208 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 640 transitions. [2019-11-28 18:27:38,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:38,209 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:38,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:38,209 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:38,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:38,210 INFO L82 PathProgramCache]: Analyzing trace with hash -1828454951, now seen corresponding path program 1 times [2019-11-28 18:27:38,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:38,211 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171358079] [2019-11-28 18:27:38,211 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:38,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:38,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:38,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171358079] [2019-11-28 18:27:38,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:38,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:38,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1471530806] [2019-11-28 18:27:38,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:38,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:38,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:38,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:38,389 INFO L87 Difference]: Start difference. First operand 357 states and 640 transitions. Second operand 3 states. [2019-11-28 18:27:38,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:38,424 INFO L93 Difference]: Finished difference Result 357 states and 639 transitions. [2019-11-28 18:27:38,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:38,424 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:27:38,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:38,425 INFO L225 Difference]: With dead ends: 357 [2019-11-28 18:27:38,425 INFO L226 Difference]: Without dead ends: 357 [2019-11-28 18:27:38,426 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:38,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2019-11-28 18:27:38,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 221. [2019-11-28 18:27:38,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2019-11-28 18:27:38,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 391 transitions. [2019-11-28 18:27:38,430 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 391 transitions. Word has length 53 [2019-11-28 18:27:38,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:38,431 INFO L462 AbstractCegarLoop]: Abstraction has 221 states and 391 transitions. [2019-11-28 18:27:38,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:38,431 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 391 transitions. [2019-11-28 18:27:38,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:38,432 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:38,432 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:38,432 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:38,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:38,433 INFO L82 PathProgramCache]: Analyzing trace with hash -1034362442, now seen corresponding path program 1 times [2019-11-28 18:27:38,433 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:38,433 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674069360] [2019-11-28 18:27:38,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:38,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:38,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:38,627 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [674069360] [2019-11-28 18:27:38,627 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:38,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:27:38,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1686452474] [2019-11-28 18:27:38,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:27:38,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:38,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:27:38,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:27:38,629 INFO L87 Difference]: Start difference. First operand 221 states and 391 transitions. Second operand 13 states. [2019-11-28 18:27:38,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:38,928 INFO L93 Difference]: Finished difference Result 372 states and 637 transitions. [2019-11-28 18:27:38,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:27:38,928 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-11-28 18:27:38,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:38,929 INFO L225 Difference]: With dead ends: 372 [2019-11-28 18:27:38,929 INFO L226 Difference]: Without dead ends: 339 [2019-11-28 18:27:38,930 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=272, Unknown=0, NotChecked=0, Total=342 [2019-11-28 18:27:38,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states. [2019-11-28 18:27:38,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 329. [2019-11-28 18:27:38,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2019-11-28 18:27:38,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 576 transitions. [2019-11-28 18:27:38,934 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 576 transitions. Word has length 54 [2019-11-28 18:27:38,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:38,935 INFO L462 AbstractCegarLoop]: Abstraction has 329 states and 576 transitions. [2019-11-28 18:27:38,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:27:38,935 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 576 transitions. [2019-11-28 18:27:38,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:38,936 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:38,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:38,936 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:38,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:38,937 INFO L82 PathProgramCache]: Analyzing trace with hash -91775718, now seen corresponding path program 2 times [2019-11-28 18:27:38,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:38,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534684443] [2019-11-28 18:27:38,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:38,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:27:38,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:27:39,043 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:27:39,044 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:27:39,048 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2015~0.base_24| 4)) (= v_~y$w_buff0_used~0_834 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2015~0.base_24|) 0) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2015~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2015~0.base_24|) |v_ULTIMATE.start_main_~#t2015~0.offset_19| 0)) |v_#memory_int_11|) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (= |v_ULTIMATE.start_main_~#t2015~0.offset_19| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2015~0.base_24|) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2015~0.base_24| 1)) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, ULTIMATE.start_main_~#t2016~0.offset=|v_ULTIMATE.start_main_~#t2016~0.offset_16|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ULTIMATE.start_main_~#t2016~0.base=|v_ULTIMATE.start_main_~#t2016~0.base_19|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_~#t2015~0.base=|v_ULTIMATE.start_main_~#t2015~0.base_24|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_~#t2015~0.offset=|v_ULTIMATE.start_main_~#t2015~0.offset_19|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2016~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2016~0.base, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t2015~0.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t2015~0.offset, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:39,049 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2016~0.base_11|) 0) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2016~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2016~0.base_11|) |v_ULTIMATE.start_main_~#t2016~0.offset_10| 1)) |v_#memory_int_7|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2016~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2016~0.offset_10|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2016~0.base_11|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2016~0.base_11| 4) |v_#length_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2016~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2016~0.offset=|v_ULTIMATE.start_main_~#t2016~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2016~0.base=|v_ULTIMATE.start_main_~#t2016~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2016~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2016~0.base] because there is no mapped edge [2019-11-28 18:27:39,049 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:39,051 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd2~0_In-1078132183 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In-1078132183 256) 0))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1078132183 |P1Thread1of1ForFork1_#t~ite9_Out-1078132183|) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out-1078132183| ~y~0_In-1078132183)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1078132183, ~y$w_buff1~0=~y$w_buff1~0_In-1078132183, ~y~0=~y~0_In-1078132183, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1078132183} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1078132183, ~y$w_buff1~0=~y$w_buff1~0_In-1078132183, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1078132183|, ~y~0=~y~0_In-1078132183, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1078132183} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:27:39,051 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:27:39,052 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In617802978 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In617802978 256) 0))) (or (and (= ~y$w_buff0_used~0_In617802978 |P1Thread1of1ForFork1_#t~ite11_Out617802978|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out617802978|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In617802978, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In617802978} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In617802978, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In617802978, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out617802978|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:27:39,052 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In517435720 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In517435720 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In517435720 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In517435720 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out517435720| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out517435720| ~y$w_buff1_used~0_In517435720)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In517435720, ~y$w_buff0_used~0=~y$w_buff0_used~0_In517435720, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In517435720, ~y$w_buff1_used~0=~y$w_buff1_used~0_In517435720} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In517435720, ~y$w_buff0_used~0=~y$w_buff0_used~0_In517435720, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In517435720, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out517435720|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In517435720} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:27:39,053 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In2103101925 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In2103101925 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out2103101925| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$r_buff0_thd2~0_In2103101925 |P1Thread1of1ForFork1_#t~ite13_Out2103101925|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2103101925, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2103101925} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2103101925, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2103101925, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out2103101925|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:27:39,053 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In1870454522 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1870454522 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1870454522 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1870454522 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out1870454522| ~y$r_buff1_thd2~0_In1870454522) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out1870454522| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1870454522, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1870454522, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1870454522, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1870454522} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1870454522, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1870454522, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1870454522, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1870454522|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1870454522} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:27:39,053 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:27:39,054 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In753789739 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In753789739 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out753789739|)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out753789739| ~y$w_buff0_used~0_In753789739)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In753789739, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In753789739} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out753789739|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In753789739, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In753789739} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:27:39,054 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-1775241265 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1775241265 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1775241265 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-1775241265 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite6_Out-1775241265| ~y$w_buff1_used~0_In-1775241265) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1775241265| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1775241265, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1775241265, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1775241265, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1775241265} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1775241265|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1775241265, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1775241265, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1775241265, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1775241265} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:27:39,055 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse0 (= ~y$r_buff0_thd1~0_Out-222092626 ~y$r_buff0_thd1~0_In-222092626)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-222092626 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In-222092626 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse1) (= ~y$r_buff0_thd1~0_Out-222092626 0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-222092626, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-222092626} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-222092626, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-222092626|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-222092626} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:27:39,055 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd1~0_In411941893 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In411941893 256))) (.cse2 (= (mod ~y$r_buff0_thd1~0_In411941893 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In411941893 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd1~0_In411941893 |P0Thread1of1ForFork0_#t~ite8_Out411941893|)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out411941893| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In411941893, ~y$w_buff0_used~0=~y$w_buff0_used~0_In411941893, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In411941893, ~y$w_buff1_used~0=~y$w_buff1_used~0_In411941893} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In411941893, ~y$w_buff0_used~0=~y$w_buff0_used~0_In411941893, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out411941893|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In411941893, ~y$w_buff1_used~0=~y$w_buff1_used~0_In411941893} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:27:39,055 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:27:39,056 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:27:39,056 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In92226724 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In92226724 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out92226724| |ULTIMATE.start_main_#t~ite17_Out92226724|))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite17_Out92226724| ~y~0_In92226724) .cse2) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out92226724| ~y$w_buff1~0_In92226724) (not .cse1) .cse2))) InVars {~y$w_buff1~0=~y$w_buff1~0_In92226724, ~y~0=~y~0_In92226724, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In92226724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In92226724} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out92226724|, ~y$w_buff1~0=~y$w_buff1~0_In92226724, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out92226724|, ~y~0=~y~0_In92226724, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In92226724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In92226724} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:27:39,056 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1361949290 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1361949290 256) 0))) (or (and (= ~y$w_buff0_used~0_In-1361949290 |ULTIMATE.start_main_#t~ite19_Out-1361949290|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out-1361949290|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1361949290, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1361949290} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1361949290, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1361949290|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1361949290} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:27:39,057 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-58387039 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-58387039 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-58387039 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-58387039 256)))) (or (and (= ~y$w_buff1_used~0_In-58387039 |ULTIMATE.start_main_#t~ite20_Out-58387039|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-58387039|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-58387039, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-58387039, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-58387039, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-58387039} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-58387039, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-58387039, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-58387039|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-58387039, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-58387039} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:27:39,057 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1514595794 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1514595794 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out-1514595794|) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-1514595794 |ULTIMATE.start_main_#t~ite21_Out-1514595794|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1514595794, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1514595794} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1514595794, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1514595794, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1514595794|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:27:39,058 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-106787182 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-106787182 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-106787182 256))) (.cse3 (= (mod ~y$r_buff0_thd0~0_In-106787182 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-106787182| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite22_Out-106787182| ~y$r_buff1_thd0~0_In-106787182)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-106787182, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-106787182, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-106787182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-106787182} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-106787182, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-106787182, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-106787182, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-106787182|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-106787182} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:27:39,059 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1261966611 256)))) (or (and .cse0 (= ~y$w_buff1~0_In-1261966611 |ULTIMATE.start_main_#t~ite31_Out-1261966611|) (= |ULTIMATE.start_main_#t~ite32_Out-1261966611| |ULTIMATE.start_main_#t~ite31_Out-1261966611|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1261966611 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-1261966611 256)) .cse1) (and (= (mod ~y$r_buff1_thd0~0_In-1261966611 256) 0) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-1261966611 256))))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite31_In-1261966611| |ULTIMATE.start_main_#t~ite31_Out-1261966611|) (= ~y$w_buff1~0_In-1261966611 |ULTIMATE.start_main_#t~ite32_Out-1261966611|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1261966611, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1261966611, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1261966611, ~weak$$choice2~0=~weak$$choice2~0_In-1261966611, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-1261966611|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1261966611, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1261966611} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1261966611, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1261966611, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1261966611, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1261966611|, ~weak$$choice2~0=~weak$$choice2~0_In-1261966611, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1261966611|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1261966611, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1261966611} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:27:39,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:27:39,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:27:39,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:27:39,127 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:27:39 BasicIcfg [2019-11-28 18:27:39,127 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:27:39,128 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:27:39,128 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:27:39,128 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:27:39,129 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:25" (3/4) ... [2019-11-28 18:27:39,131 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:27:39,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2015~0.base_24| 4)) (= v_~y$w_buff0_used~0_834 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2015~0.base_24|) 0) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2015~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2015~0.base_24|) |v_ULTIMATE.start_main_~#t2015~0.offset_19| 0)) |v_#memory_int_11|) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (= |v_ULTIMATE.start_main_~#t2015~0.offset_19| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2015~0.base_24|) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2015~0.base_24| 1)) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, ULTIMATE.start_main_~#t2016~0.offset=|v_ULTIMATE.start_main_~#t2016~0.offset_16|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ULTIMATE.start_main_~#t2016~0.base=|v_ULTIMATE.start_main_~#t2016~0.base_19|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_~#t2015~0.base=|v_ULTIMATE.start_main_~#t2015~0.base_24|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_~#t2015~0.offset=|v_ULTIMATE.start_main_~#t2015~0.offset_19|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2016~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2016~0.base, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t2015~0.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t2015~0.offset, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:39,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2016~0.base_11|) 0) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2016~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2016~0.base_11|) |v_ULTIMATE.start_main_~#t2016~0.offset_10| 1)) |v_#memory_int_7|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2016~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2016~0.offset_10|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2016~0.base_11|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2016~0.base_11| 4) |v_#length_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2016~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2016~0.offset=|v_ULTIMATE.start_main_~#t2016~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2016~0.base=|v_ULTIMATE.start_main_~#t2016~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2016~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2016~0.base] because there is no mapped edge [2019-11-28 18:27:39,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:39,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd2~0_In-1078132183 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In-1078132183 256) 0))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1078132183 |P1Thread1of1ForFork1_#t~ite9_Out-1078132183|) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out-1078132183| ~y~0_In-1078132183)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1078132183, ~y$w_buff1~0=~y$w_buff1~0_In-1078132183, ~y~0=~y~0_In-1078132183, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1078132183} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1078132183, ~y$w_buff1~0=~y$w_buff1~0_In-1078132183, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1078132183|, ~y~0=~y~0_In-1078132183, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1078132183} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:27:39,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:27:39,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In617802978 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In617802978 256) 0))) (or (and (= ~y$w_buff0_used~0_In617802978 |P1Thread1of1ForFork1_#t~ite11_Out617802978|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out617802978|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In617802978, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In617802978} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In617802978, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In617802978, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out617802978|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:27:39,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In517435720 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In517435720 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In517435720 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In517435720 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out517435720| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out517435720| ~y$w_buff1_used~0_In517435720)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In517435720, ~y$w_buff0_used~0=~y$w_buff0_used~0_In517435720, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In517435720, ~y$w_buff1_used~0=~y$w_buff1_used~0_In517435720} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In517435720, ~y$w_buff0_used~0=~y$w_buff0_used~0_In517435720, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In517435720, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out517435720|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In517435720} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:27:39,136 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In2103101925 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In2103101925 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out2103101925| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$r_buff0_thd2~0_In2103101925 |P1Thread1of1ForFork1_#t~ite13_Out2103101925|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2103101925, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2103101925} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2103101925, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2103101925, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out2103101925|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:27:39,136 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In1870454522 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1870454522 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1870454522 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1870454522 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out1870454522| ~y$r_buff1_thd2~0_In1870454522) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out1870454522| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1870454522, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1870454522, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1870454522, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1870454522} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1870454522, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1870454522, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1870454522, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1870454522|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1870454522} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:27:39,136 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:27:39,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In753789739 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In753789739 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out753789739|)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out753789739| ~y$w_buff0_used~0_In753789739)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In753789739, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In753789739} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out753789739|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In753789739, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In753789739} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:27:39,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-1775241265 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1775241265 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1775241265 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-1775241265 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite6_Out-1775241265| ~y$w_buff1_used~0_In-1775241265) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1775241265| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1775241265, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1775241265, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1775241265, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1775241265} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1775241265|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1775241265, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1775241265, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1775241265, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1775241265} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:27:39,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse0 (= ~y$r_buff0_thd1~0_Out-222092626 ~y$r_buff0_thd1~0_In-222092626)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-222092626 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In-222092626 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse1) (= ~y$r_buff0_thd1~0_Out-222092626 0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-222092626, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-222092626} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-222092626, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-222092626|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-222092626} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:27:39,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd1~0_In411941893 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In411941893 256))) (.cse2 (= (mod ~y$r_buff0_thd1~0_In411941893 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In411941893 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd1~0_In411941893 |P0Thread1of1ForFork0_#t~ite8_Out411941893|)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out411941893| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In411941893, ~y$w_buff0_used~0=~y$w_buff0_used~0_In411941893, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In411941893, ~y$w_buff1_used~0=~y$w_buff1_used~0_In411941893} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In411941893, ~y$w_buff0_used~0=~y$w_buff0_used~0_In411941893, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out411941893|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In411941893, ~y$w_buff1_used~0=~y$w_buff1_used~0_In411941893} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:27:39,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:27:39,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:27:39,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In92226724 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In92226724 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out92226724| |ULTIMATE.start_main_#t~ite17_Out92226724|))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite17_Out92226724| ~y~0_In92226724) .cse2) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out92226724| ~y$w_buff1~0_In92226724) (not .cse1) .cse2))) InVars {~y$w_buff1~0=~y$w_buff1~0_In92226724, ~y~0=~y~0_In92226724, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In92226724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In92226724} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out92226724|, ~y$w_buff1~0=~y$w_buff1~0_In92226724, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out92226724|, ~y~0=~y~0_In92226724, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In92226724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In92226724} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:27:39,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1361949290 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1361949290 256) 0))) (or (and (= ~y$w_buff0_used~0_In-1361949290 |ULTIMATE.start_main_#t~ite19_Out-1361949290|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out-1361949290|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1361949290, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1361949290} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1361949290, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1361949290|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1361949290} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:27:39,140 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-58387039 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-58387039 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-58387039 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-58387039 256)))) (or (and (= ~y$w_buff1_used~0_In-58387039 |ULTIMATE.start_main_#t~ite20_Out-58387039|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-58387039|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-58387039, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-58387039, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-58387039, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-58387039} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-58387039, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-58387039, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-58387039|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-58387039, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-58387039} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:27:39,140 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1514595794 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1514595794 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out-1514595794|) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-1514595794 |ULTIMATE.start_main_#t~ite21_Out-1514595794|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1514595794, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1514595794} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1514595794, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1514595794, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1514595794|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:27:39,141 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-106787182 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-106787182 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-106787182 256))) (.cse3 (= (mod ~y$r_buff0_thd0~0_In-106787182 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-106787182| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite22_Out-106787182| ~y$r_buff1_thd0~0_In-106787182)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-106787182, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-106787182, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-106787182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-106787182} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-106787182, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-106787182, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-106787182, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-106787182|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-106787182} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:27:39,142 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1261966611 256)))) (or (and .cse0 (= ~y$w_buff1~0_In-1261966611 |ULTIMATE.start_main_#t~ite31_Out-1261966611|) (= |ULTIMATE.start_main_#t~ite32_Out-1261966611| |ULTIMATE.start_main_#t~ite31_Out-1261966611|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1261966611 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-1261966611 256)) .cse1) (and (= (mod ~y$r_buff1_thd0~0_In-1261966611 256) 0) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-1261966611 256))))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite31_In-1261966611| |ULTIMATE.start_main_#t~ite31_Out-1261966611|) (= ~y$w_buff1~0_In-1261966611 |ULTIMATE.start_main_#t~ite32_Out-1261966611|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1261966611, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1261966611, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1261966611, ~weak$$choice2~0=~weak$$choice2~0_In-1261966611, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-1261966611|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1261966611, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1261966611} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1261966611, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1261966611, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1261966611, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1261966611|, ~weak$$choice2~0=~weak$$choice2~0_In-1261966611, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1261966611|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1261966611, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1261966611} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:27:39,144 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:27:39,144 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:27:39,144 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:27:39,219 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:27:39,219 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:27:39,221 INFO L168 Benchmark]: Toolchain (without parser) took 15626.95 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 529.5 MB). Free memory was 955.0 MB in the beginning and 1.3 GB in the end (delta: -309.2 MB). Peak memory consumption was 220.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,221 INFO L168 Benchmark]: CDTParser took 0.88 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:27:39,222 INFO L168 Benchmark]: CACSL2BoogieTranslator took 823.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -135.7 MB). Peak memory consumption was 20.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,222 INFO L168 Benchmark]: Boogie Procedure Inliner took 74.69 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,223 INFO L168 Benchmark]: Boogie Preprocessor took 38.30 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:27:39,223 INFO L168 Benchmark]: RCFGBuilder took 828.18 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.2 MB). Peak memory consumption was 45.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,224 INFO L168 Benchmark]: TraceAbstraction took 13766.17 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 395.3 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -238.0 MB). Peak memory consumption was 157.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,224 INFO L168 Benchmark]: Witness Printer took 91.19 ms. Allocated memory is still 1.6 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:39,227 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.88 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 823.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -135.7 MB). Peak memory consumption was 20.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 74.69 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 38.30 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 828.18 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.2 MB). Peak memory consumption was 45.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13766.17 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 395.3 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -238.0 MB). Peak memory consumption was 157.3 MB. Max. memory is 11.5 GB. * Witness Printer took 91.19 ms. Allocated memory is still 1.6 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.1s, 146 ProgramPointsBefore, 79 ProgramPointsAfterwards, 180 TransitionsBefore, 91 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 3678 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 221 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.7s, 0 MoverChecksTotal, 46090 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t2015, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2016, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L756] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 13.5s, OverallIterations: 15, TraceHistogramMax: 1, AutomataDifference: 3.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1513 SDtfs, 1132 SDslu, 3100 SDs, 0 SdLazy, 1624 SolverSat, 93 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 99 GetRequests, 22 SyntacticMatches, 9 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14186occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.5s AutomataMinimizationTime, 14 MinimizatonAttempts, 9576 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 551 NumberOfCodeBlocks, 551 NumberOfCodeBlocksAsserted, 15 NumberOfCheckSat, 483 ConstructedInterpolants, 0 QuantifiedInterpolants, 70071 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 14 InterpolantComputations, 14 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...