./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a006136170cf9498b8ab21bde8c3aefce8094f73 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:27:36,961 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:27:36,964 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:27:36,983 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:27:36,983 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:27:36,986 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:27:36,988 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:27:36,997 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:27:37,003 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:27:37,007 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:27:37,008 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:27:37,010 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:27:37,010 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:27:37,013 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:27:37,015 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:27:37,017 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:27:37,018 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:27:37,019 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:27:37,022 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:27:37,027 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:27:37,033 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:27:37,039 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:27:37,040 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:27:37,043 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:27:37,047 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:27:37,047 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:27:37,047 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:27:37,050 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:27:37,050 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:27:37,052 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:27:37,052 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:27:37,053 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:27:37,054 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:27:37,055 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:27:37,056 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:27:37,056 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:27:37,057 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:27:37,057 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:27:37,058 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:27:37,059 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:27:37,059 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:27:37,060 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:27:37,075 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:27:37,076 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:27:37,077 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:27:37,078 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:27:37,078 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:27:37,078 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:27:37,079 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:27:37,079 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:27:37,079 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:27:37,080 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:27:37,080 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:27:37,080 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:27:37,081 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:27:37,081 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:27:37,081 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:27:37,081 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:27:37,082 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:27:37,082 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:27:37,082 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:27:37,083 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:27:37,083 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:27:37,083 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:27:37,083 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:27:37,084 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:27:37,084 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:27:37,084 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:27:37,085 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:27:37,085 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:27:37,085 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:27:37,085 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a006136170cf9498b8ab21bde8c3aefce8094f73 [2019-11-28 18:27:37,396 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:27:37,410 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:27:37,414 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:27:37,415 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:27:37,416 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:27:37,417 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i [2019-11-28 18:27:37,485 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/42a0dd82d/39e1acf191c5460faeb58a2996ebd2f5/FLAG9a34a79b2 [2019-11-28 18:27:38,058 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:27:38,059 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i [2019-11-28 18:27:38,082 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/42a0dd82d/39e1acf191c5460faeb58a2996ebd2f5/FLAG9a34a79b2 [2019-11-28 18:27:38,308 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/42a0dd82d/39e1acf191c5460faeb58a2996ebd2f5 [2019-11-28 18:27:38,312 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:27:38,314 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:27:38,315 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:27:38,315 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:27:38,319 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:27:38,320 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:27:38" (1/1) ... [2019-11-28 18:27:38,323 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7539c191 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:38, skipping insertion in model container [2019-11-28 18:27:38,323 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:27:38" (1/1) ... [2019-11-28 18:27:38,330 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:27:38,398 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:27:38,962 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:27:38,978 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:27:39,056 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:27:39,128 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:27:39,129 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39 WrapperNode [2019-11-28 18:27:39,129 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:27:39,130 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:27:39,130 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:27:39,130 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:27:39,139 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,159 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,199 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:27:39,199 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:27:39,200 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:27:39,200 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:27:39,210 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,211 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,216 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,216 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,226 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,230 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,234 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... [2019-11-28 18:27:39,240 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:27:39,240 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:27:39,241 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:27:39,241 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:27:39,242 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:27:39,311 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:27:39,312 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:27:39,312 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:27:39,312 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:27:39,313 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:27:39,313 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:27:39,313 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:27:39,313 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:27:39,314 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:27:39,314 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:27:39,314 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:27:39,316 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:27:40,054 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:27:40,054 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:27:40,056 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:40 BoogieIcfgContainer [2019-11-28 18:27:40,056 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:27:40,057 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:27:40,057 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:27:40,061 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:27:40,062 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:27:38" (1/3) ... [2019-11-28 18:27:40,063 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@542ace47 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:27:40, skipping insertion in model container [2019-11-28 18:27:40,064 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:27:39" (2/3) ... [2019-11-28 18:27:40,064 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@542ace47 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:27:40, skipping insertion in model container [2019-11-28 18:27:40,064 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:40" (3/3) ... [2019-11-28 18:27:40,066 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_rmo.opt.i [2019-11-28 18:27:40,078 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:27:40,078 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:27:40,087 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:27:40,088 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:27:40,124 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,124 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,125 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,125 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,125 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,126 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,126 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,129 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,129 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,129 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,129 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,130 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,130 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,130 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,131 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,131 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,131 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,131 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,132 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,132 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,132 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,133 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,133 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,133 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,133 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,134 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,134 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,135 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,135 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,135 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,135 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,136 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,136 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,136 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,137 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,137 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,137 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,137 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,138 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,138 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,138 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,139 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,139 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,139 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,139 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,140 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,140 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,140 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,141 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,141 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,141 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,142 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,142 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,142 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,142 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,143 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,143 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:27:40,162 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:27:40,185 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:27:40,185 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:27:40,185 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:27:40,186 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:27:40,186 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:27:40,186 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:27:40,186 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:27:40,187 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:27:40,205 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-11-28 18:27:40,207 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:27:40,292 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:27:40,293 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:27:40,310 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:27:40,335 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-11-28 18:27:40,389 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-11-28 18:27:40,389 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:27:40,399 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:27:40,414 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-11-28 18:27:40,416 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:27:45,395 WARN L192 SmtUtils]: Spent 257.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-11-28 18:27:45,521 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46090 [2019-11-28 18:27:45,521 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-11-28 18:27:45,524 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 91 transitions [2019-11-28 18:27:46,112 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8654 states. [2019-11-28 18:27:46,115 INFO L276 IsEmpty]: Start isEmpty. Operand 8654 states. [2019-11-28 18:27:46,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-11-28 18:27:46,122 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:46,123 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-11-28 18:27:46,123 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:46,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:46,131 INFO L82 PathProgramCache]: Analyzing trace with hash 722891, now seen corresponding path program 1 times [2019-11-28 18:27:46,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:46,143 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784153627] [2019-11-28 18:27:46,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:46,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:46,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:46,445 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [784153627] [2019-11-28 18:27:46,447 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:46,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:27:46,450 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722501054] [2019-11-28 18:27:46,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:46,457 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:46,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:46,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:46,499 INFO L87 Difference]: Start difference. First operand 8654 states. Second operand 3 states. [2019-11-28 18:27:46,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:46,809 INFO L93 Difference]: Finished difference Result 8604 states and 28108 transitions. [2019-11-28 18:27:46,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:46,811 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-11-28 18:27:46,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:46,968 INFO L225 Difference]: With dead ends: 8604 [2019-11-28 18:27:46,973 INFO L226 Difference]: Without dead ends: 8436 [2019-11-28 18:27:46,978 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:47,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8436 states. [2019-11-28 18:27:47,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8436 to 8436. [2019-11-28 18:27:47,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8436 states. [2019-11-28 18:27:47,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8436 states to 8436 states and 27590 transitions. [2019-11-28 18:27:47,610 INFO L78 Accepts]: Start accepts. Automaton has 8436 states and 27590 transitions. Word has length 3 [2019-11-28 18:27:47,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:47,611 INFO L462 AbstractCegarLoop]: Abstraction has 8436 states and 27590 transitions. [2019-11-28 18:27:47,611 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:47,611 INFO L276 IsEmpty]: Start isEmpty. Operand 8436 states and 27590 transitions. [2019-11-28 18:27:47,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:27:47,614 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:47,614 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:47,615 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:47,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:47,616 INFO L82 PathProgramCache]: Analyzing trace with hash -1596153002, now seen corresponding path program 1 times [2019-11-28 18:27:47,616 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:47,616 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [986534401] [2019-11-28 18:27:47,616 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:47,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:47,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:47,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [986534401] [2019-11-28 18:27:47,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:47,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:47,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2103291857] [2019-11-28 18:27:47,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:47,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:47,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:47,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:47,737 INFO L87 Difference]: Start difference. First operand 8436 states and 27590 transitions. Second operand 4 states. [2019-11-28 18:27:48,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:48,138 INFO L93 Difference]: Finished difference Result 13130 states and 41153 transitions. [2019-11-28 18:27:48,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:48,138 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:27:48,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:48,236 INFO L225 Difference]: With dead ends: 13130 [2019-11-28 18:27:48,236 INFO L226 Difference]: Without dead ends: 13123 [2019-11-28 18:27:48,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:48,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13123 states. [2019-11-28 18:27:48,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13123 to 11988. [2019-11-28 18:27:48,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11988 states. [2019-11-28 18:27:48,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11988 states to 11988 states and 38075 transitions. [2019-11-28 18:27:48,863 INFO L78 Accepts]: Start accepts. Automaton has 11988 states and 38075 transitions. Word has length 11 [2019-11-28 18:27:48,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:48,864 INFO L462 AbstractCegarLoop]: Abstraction has 11988 states and 38075 transitions. [2019-11-28 18:27:48,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:48,865 INFO L276 IsEmpty]: Start isEmpty. Operand 11988 states and 38075 transitions. [2019-11-28 18:27:48,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:27:48,875 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:48,875 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:48,876 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:48,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:48,876 INFO L82 PathProgramCache]: Analyzing trace with hash 1194917716, now seen corresponding path program 1 times [2019-11-28 18:27:48,876 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:48,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532074885] [2019-11-28 18:27:48,877 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:48,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:48,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:48,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532074885] [2019-11-28 18:27:48,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:48,962 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:48,962 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [658981430] [2019-11-28 18:27:48,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:48,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:48,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:48,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:48,964 INFO L87 Difference]: Start difference. First operand 11988 states and 38075 transitions. Second operand 4 states. [2019-11-28 18:27:49,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:49,231 INFO L93 Difference]: Finished difference Result 14736 states and 46267 transitions. [2019-11-28 18:27:49,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:49,232 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:27:49,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:49,283 INFO L225 Difference]: With dead ends: 14736 [2019-11-28 18:27:49,283 INFO L226 Difference]: Without dead ends: 14736 [2019-11-28 18:27:49,284 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:49,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14736 states. [2019-11-28 18:27:49,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14736 to 13160. [2019-11-28 18:27:49,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13160 states. [2019-11-28 18:27:49,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13160 states to 13160 states and 41689 transitions. [2019-11-28 18:27:49,722 INFO L78 Accepts]: Start accepts. Automaton has 13160 states and 41689 transitions. Word has length 11 [2019-11-28 18:27:49,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:49,723 INFO L462 AbstractCegarLoop]: Abstraction has 13160 states and 41689 transitions. [2019-11-28 18:27:49,723 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:49,723 INFO L276 IsEmpty]: Start isEmpty. Operand 13160 states and 41689 transitions. [2019-11-28 18:27:49,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:27:49,727 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:49,727 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:49,727 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:49,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:49,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1502155024, now seen corresponding path program 1 times [2019-11-28 18:27:49,728 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:49,728 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443671513] [2019-11-28 18:27:49,728 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:49,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:49,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:49,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443671513] [2019-11-28 18:27:49,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:49,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:49,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [136210285] [2019-11-28 18:27:49,821 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:49,821 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:49,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:49,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:49,822 INFO L87 Difference]: Start difference. First operand 13160 states and 41689 transitions. Second operand 5 states. [2019-11-28 18:27:50,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:50,280 INFO L93 Difference]: Finished difference Result 17572 states and 54523 transitions. [2019-11-28 18:27:50,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:27:50,281 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-11-28 18:27:50,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:50,324 INFO L225 Difference]: With dead ends: 17572 [2019-11-28 18:27:50,324 INFO L226 Difference]: Without dead ends: 17565 [2019-11-28 18:27:50,324 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:27:50,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17565 states. [2019-11-28 18:27:50,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17565 to 13105. [2019-11-28 18:27:50,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13105 states. [2019-11-28 18:27:50,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13105 states to 13105 states and 41426 transitions. [2019-11-28 18:27:50,952 INFO L78 Accepts]: Start accepts. Automaton has 13105 states and 41426 transitions. Word has length 17 [2019-11-28 18:27:50,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:50,953 INFO L462 AbstractCegarLoop]: Abstraction has 13105 states and 41426 transitions. [2019-11-28 18:27:50,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:50,953 INFO L276 IsEmpty]: Start isEmpty. Operand 13105 states and 41426 transitions. [2019-11-28 18:27:50,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:27:50,966 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:50,966 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:50,967 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:50,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:50,967 INFO L82 PathProgramCache]: Analyzing trace with hash 933350131, now seen corresponding path program 1 times [2019-11-28 18:27:50,967 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:50,968 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1970360599] [2019-11-28 18:27:50,968 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:50,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:51,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:51,045 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1970360599] [2019-11-28 18:27:51,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:51,046 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:51,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121476188] [2019-11-28 18:27:51,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:51,047 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:51,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:51,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:51,048 INFO L87 Difference]: Start difference. First operand 13105 states and 41426 transitions. Second operand 3 states. [2019-11-28 18:27:51,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:51,172 INFO L93 Difference]: Finished difference Result 16057 states and 50095 transitions. [2019-11-28 18:27:51,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:51,173 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:27:51,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:51,207 INFO L225 Difference]: With dead ends: 16057 [2019-11-28 18:27:51,208 INFO L226 Difference]: Without dead ends: 16057 [2019-11-28 18:27:51,208 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:51,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16057 states. [2019-11-28 18:27:51,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16057 to 14186. [2019-11-28 18:27:51,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14186 states. [2019-11-28 18:27:51,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14186 states to 14186 states and 44710 transitions. [2019-11-28 18:27:51,687 INFO L78 Accepts]: Start accepts. Automaton has 14186 states and 44710 transitions. Word has length 25 [2019-11-28 18:27:51,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:51,689 INFO L462 AbstractCegarLoop]: Abstraction has 14186 states and 44710 transitions. [2019-11-28 18:27:51,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:51,690 INFO L276 IsEmpty]: Start isEmpty. Operand 14186 states and 44710 transitions. [2019-11-28 18:27:51,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:27:51,712 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:51,712 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:51,713 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:51,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:51,713 INFO L82 PathProgramCache]: Analyzing trace with hash 933194542, now seen corresponding path program 1 times [2019-11-28 18:27:51,714 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:51,714 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796676962] [2019-11-28 18:27:51,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:51,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:51,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:51,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796676962] [2019-11-28 18:27:51,855 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:51,856 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:27:51,857 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914519813] [2019-11-28 18:27:51,858 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:27:51,858 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:51,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:27:51,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:27:51,860 INFO L87 Difference]: Start difference. First operand 14186 states and 44710 transitions. Second operand 4 states. [2019-11-28 18:27:51,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:51,910 INFO L93 Difference]: Finished difference Result 2296 states and 5226 transitions. [2019-11-28 18:27:51,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:27:51,911 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-11-28 18:27:51,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:51,918 INFO L225 Difference]: With dead ends: 2296 [2019-11-28 18:27:51,919 INFO L226 Difference]: Without dead ends: 2019 [2019-11-28 18:27:51,921 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:51,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2019 states. [2019-11-28 18:27:51,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2019 to 2019. [2019-11-28 18:27:51,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-11-28 18:27:51,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4460 transitions. [2019-11-28 18:27:51,973 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4460 transitions. Word has length 25 [2019-11-28 18:27:51,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:51,974 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4460 transitions. [2019-11-28 18:27:51,974 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:27:51,974 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4460 transitions. [2019-11-28 18:27:51,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:27:51,980 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:51,981 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:51,981 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:51,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:51,982 INFO L82 PathProgramCache]: Analyzing trace with hash -568804126, now seen corresponding path program 1 times [2019-11-28 18:27:51,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:51,983 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307705471] [2019-11-28 18:27:51,983 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:52,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:52,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:52,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307705471] [2019-11-28 18:27:52,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:52,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:27:52,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [467511977] [2019-11-28 18:27:52,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:52,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:52,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:52,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:52,129 INFO L87 Difference]: Start difference. First operand 2019 states and 4460 transitions. Second operand 5 states. [2019-11-28 18:27:52,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:52,176 INFO L93 Difference]: Finished difference Result 416 states and 758 transitions. [2019-11-28 18:27:52,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:27:52,176 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:27:52,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:52,178 INFO L225 Difference]: With dead ends: 416 [2019-11-28 18:27:52,178 INFO L226 Difference]: Without dead ends: 371 [2019-11-28 18:27:52,178 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:27:52,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-11-28 18:27:52,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 343. [2019-11-28 18:27:52,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-11-28 18:27:52,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 618 transitions. [2019-11-28 18:27:52,188 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 618 transitions. Word has length 37 [2019-11-28 18:27:52,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:52,188 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 618 transitions. [2019-11-28 18:27:52,189 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:52,189 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 618 transitions. [2019-11-28 18:27:52,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:52,193 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:52,193 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:52,194 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:52,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:52,196 INFO L82 PathProgramCache]: Analyzing trace with hash -506418728, now seen corresponding path program 1 times [2019-11-28 18:27:52,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:52,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1692143433] [2019-11-28 18:27:52,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:52,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:52,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:52,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1692143433] [2019-11-28 18:27:52,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:52,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:27:52,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058002895] [2019-11-28 18:27:52,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:27:52,366 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:52,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:27:52,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:27:52,366 INFO L87 Difference]: Start difference. First operand 343 states and 618 transitions. Second operand 7 states. [2019-11-28 18:27:52,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:52,804 INFO L93 Difference]: Finished difference Result 539 states and 970 transitions. [2019-11-28 18:27:52,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:27:52,804 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:27:52,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:52,806 INFO L225 Difference]: With dead ends: 539 [2019-11-28 18:27:52,806 INFO L226 Difference]: Without dead ends: 539 [2019-11-28 18:27:52,806 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:27:52,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-11-28 18:27:52,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 444. [2019-11-28 18:27:52,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 444 states. [2019-11-28 18:27:52,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 802 transitions. [2019-11-28 18:27:52,812 INFO L78 Accepts]: Start accepts. Automaton has 444 states and 802 transitions. Word has length 52 [2019-11-28 18:27:52,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:52,813 INFO L462 AbstractCegarLoop]: Abstraction has 444 states and 802 transitions. [2019-11-28 18:27:52,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:27:52,813 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 802 transitions. [2019-11-28 18:27:52,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:52,814 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:52,814 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:52,815 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:52,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:52,815 INFO L82 PathProgramCache]: Analyzing trace with hash 22285210, now seen corresponding path program 2 times [2019-11-28 18:27:52,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:52,815 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202027328] [2019-11-28 18:27:52,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:52,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:52,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:52,939 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202027328] [2019-11-28 18:27:52,939 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:52,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:27:52,940 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771772734] [2019-11-28 18:27:52,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:27:52,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:52,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:27:52,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:27:52,941 INFO L87 Difference]: Start difference. First operand 444 states and 802 transitions. Second operand 5 states. [2019-11-28 18:27:53,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:53,131 INFO L93 Difference]: Finished difference Result 621 states and 1127 transitions. [2019-11-28 18:27:53,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:27:53,132 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-28 18:27:53,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:53,133 INFO L225 Difference]: With dead ends: 621 [2019-11-28 18:27:53,134 INFO L226 Difference]: Without dead ends: 621 [2019-11-28 18:27:53,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:27:53,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2019-11-28 18:27:53,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 504. [2019-11-28 18:27:53,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 504 states. [2019-11-28 18:27:53,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 921 transitions. [2019-11-28 18:27:53,142 INFO L78 Accepts]: Start accepts. Automaton has 504 states and 921 transitions. Word has length 52 [2019-11-28 18:27:53,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:53,143 INFO L462 AbstractCegarLoop]: Abstraction has 504 states and 921 transitions. [2019-11-28 18:27:53,143 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:27:53,143 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 921 transitions. [2019-11-28 18:27:53,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:27:53,145 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:53,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:53,146 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:53,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:53,146 INFO L82 PathProgramCache]: Analyzing trace with hash 260455414, now seen corresponding path program 3 times [2019-11-28 18:27:53,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:53,147 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795104332] [2019-11-28 18:27:53,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:53,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:53,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:53,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795104332] [2019-11-28 18:27:53,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:53,262 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:27:53,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884170018] [2019-11-28 18:27:53,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:27:53,263 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:53,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:27:53,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:27:53,264 INFO L87 Difference]: Start difference. First operand 504 states and 921 transitions. Second operand 6 states. [2019-11-28 18:27:53,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:53,615 INFO L93 Difference]: Finished difference Result 719 states and 1302 transitions. [2019-11-28 18:27:53,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:27:53,615 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:27:53,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:53,617 INFO L225 Difference]: With dead ends: 719 [2019-11-28 18:27:53,617 INFO L226 Difference]: Without dead ends: 719 [2019-11-28 18:27:53,618 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:27:53,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 719 states. [2019-11-28 18:27:53,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 719 to 516. [2019-11-28 18:27:53,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 516 states. [2019-11-28 18:27:53,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 516 states to 516 states and 943 transitions. [2019-11-28 18:27:53,627 INFO L78 Accepts]: Start accepts. Automaton has 516 states and 943 transitions. Word has length 52 [2019-11-28 18:27:53,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:53,627 INFO L462 AbstractCegarLoop]: Abstraction has 516 states and 943 transitions. [2019-11-28 18:27:53,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:27:53,628 INFO L276 IsEmpty]: Start isEmpty. Operand 516 states and 943 transitions. [2019-11-28 18:27:53,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:53,629 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:53,630 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:53,630 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:53,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:53,630 INFO L82 PathProgramCache]: Analyzing trace with hash -681731879, now seen corresponding path program 1 times [2019-11-28 18:27:53,631 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:53,631 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [162318823] [2019-11-28 18:27:53,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:53,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:54,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:54,079 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [162318823] [2019-11-28 18:27:54,079 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:54,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-28 18:27:54,080 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1516340220] [2019-11-28 18:27:54,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-28 18:27:54,080 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:54,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-28 18:27:54,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-11-28 18:27:54,082 INFO L87 Difference]: Start difference. First operand 516 states and 943 transitions. Second operand 10 states. [2019-11-28 18:27:54,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:54,575 INFO L93 Difference]: Finished difference Result 618 states and 1070 transitions. [2019-11-28 18:27:54,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:27:54,575 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 53 [2019-11-28 18:27:54,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:54,577 INFO L225 Difference]: With dead ends: 618 [2019-11-28 18:27:54,577 INFO L226 Difference]: Without dead ends: 618 [2019-11-28 18:27:54,577 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=77, Invalid=229, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:27:54,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 618 states. [2019-11-28 18:27:54,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 618 to 413. [2019-11-28 18:27:54,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 413 states. [2019-11-28 18:27:54,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 718 transitions. [2019-11-28 18:27:54,584 INFO L78 Accepts]: Start accepts. Automaton has 413 states and 718 transitions. Word has length 53 [2019-11-28 18:27:54,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:54,584 INFO L462 AbstractCegarLoop]: Abstraction has 413 states and 718 transitions. [2019-11-28 18:27:54,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-28 18:27:54,585 INFO L276 IsEmpty]: Start isEmpty. Operand 413 states and 718 transitions. [2019-11-28 18:27:54,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:54,586 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:54,586 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:54,586 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:54,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:54,587 INFO L82 PathProgramCache]: Analyzing trace with hash 31866971, now seen corresponding path program 2 times [2019-11-28 18:27:54,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:54,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771413735] [2019-11-28 18:27:54,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:54,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:54,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:54,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [771413735] [2019-11-28 18:27:54,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:54,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:27:54,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018720345] [2019-11-28 18:27:54,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:27:54,713 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:54,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:27:54,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:27:54,714 INFO L87 Difference]: Start difference. First operand 413 states and 718 transitions. Second operand 7 states. [2019-11-28 18:27:54,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:54,785 INFO L93 Difference]: Finished difference Result 653 states and 1125 transitions. [2019-11-28 18:27:54,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:27:54,785 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2019-11-28 18:27:54,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:54,786 INFO L225 Difference]: With dead ends: 653 [2019-11-28 18:27:54,786 INFO L226 Difference]: Without dead ends: 279 [2019-11-28 18:27:54,786 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-11-28 18:27:54,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2019-11-28 18:27:54,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 255. [2019-11-28 18:27:54,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 255 states. [2019-11-28 18:27:54,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 432 transitions. [2019-11-28 18:27:54,790 INFO L78 Accepts]: Start accepts. Automaton has 255 states and 432 transitions. Word has length 53 [2019-11-28 18:27:54,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:54,790 INFO L462 AbstractCegarLoop]: Abstraction has 255 states and 432 transitions. [2019-11-28 18:27:54,791 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:27:54,791 INFO L276 IsEmpty]: Start isEmpty. Operand 255 states and 432 transitions. [2019-11-28 18:27:54,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:27:54,792 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:54,792 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:54,792 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:54,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:54,792 INFO L82 PathProgramCache]: Analyzing trace with hash -1114856101, now seen corresponding path program 3 times [2019-11-28 18:27:54,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:54,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [909882275] [2019-11-28 18:27:54,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:54,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:54,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:54,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [909882275] [2019-11-28 18:27:54,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:54,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:27:54,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364455040] [2019-11-28 18:27:54,871 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:27:54,871 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:54,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:27:54,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:54,872 INFO L87 Difference]: Start difference. First operand 255 states and 432 transitions. Second operand 3 states. [2019-11-28 18:27:54,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:54,910 INFO L93 Difference]: Finished difference Result 255 states and 431 transitions. [2019-11-28 18:27:54,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:27:54,911 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:27:54,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:54,911 INFO L225 Difference]: With dead ends: 255 [2019-11-28 18:27:54,911 INFO L226 Difference]: Without dead ends: 255 [2019-11-28 18:27:54,912 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:27:54,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states. [2019-11-28 18:27:54,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 206. [2019-11-28 18:27:54,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2019-11-28 18:27:54,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 347 transitions. [2019-11-28 18:27:54,918 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 347 transitions. Word has length 53 [2019-11-28 18:27:54,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:54,918 INFO L462 AbstractCegarLoop]: Abstraction has 206 states and 347 transitions. [2019-11-28 18:27:54,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:27:54,919 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 347 transitions. [2019-11-28 18:27:54,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:54,920 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:54,920 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:54,920 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:54,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:54,921 INFO L82 PathProgramCache]: Analyzing trace with hash -1034362442, now seen corresponding path program 1 times [2019-11-28 18:27:54,921 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:54,921 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034967966] [2019-11-28 18:27:54,922 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:54,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:55,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:55,177 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034967966] [2019-11-28 18:27:55,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:55,178 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:27:55,178 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282792508] [2019-11-28 18:27:55,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:27:55,178 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:55,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:27:55,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:27:55,179 INFO L87 Difference]: Start difference. First operand 206 states and 347 transitions. Second operand 12 states. [2019-11-28 18:27:55,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:55,601 INFO L93 Difference]: Finished difference Result 365 states and 607 transitions. [2019-11-28 18:27:55,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-28 18:27:55,602 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-11-28 18:27:55,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:55,603 INFO L225 Difference]: With dead ends: 365 [2019-11-28 18:27:55,603 INFO L226 Difference]: Without dead ends: 332 [2019-11-28 18:27:55,603 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=280, Unknown=0, NotChecked=0, Total=342 [2019-11-28 18:27:55,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 332 states. [2019-11-28 18:27:55,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 332 to 302. [2019-11-28 18:27:55,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302 states. [2019-11-28 18:27:55,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 511 transitions. [2019-11-28 18:27:55,608 INFO L78 Accepts]: Start accepts. Automaton has 302 states and 511 transitions. Word has length 54 [2019-11-28 18:27:55,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:55,608 INFO L462 AbstractCegarLoop]: Abstraction has 302 states and 511 transitions. [2019-11-28 18:27:55,609 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:27:55,609 INFO L276 IsEmpty]: Start isEmpty. Operand 302 states and 511 transitions. [2019-11-28 18:27:55,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:55,610 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:55,610 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:55,611 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:55,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:55,611 INFO L82 PathProgramCache]: Analyzing trace with hash -1623394108, now seen corresponding path program 2 times [2019-11-28 18:27:55,611 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:55,612 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592034579] [2019-11-28 18:27:55,612 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:55,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:55,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:55,929 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592034579] [2019-11-28 18:27:55,929 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:55,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-28 18:27:55,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [228641473] [2019-11-28 18:27:55,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-11-28 18:27:55,930 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:55,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-11-28 18:27:55,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:27:55,931 INFO L87 Difference]: Start difference. First operand 302 states and 511 transitions. Second operand 14 states. [2019-11-28 18:27:56,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:56,549 INFO L93 Difference]: Finished difference Result 423 states and 696 transitions. [2019-11-28 18:27:56,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:27:56,549 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-11-28 18:27:56,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:56,550 INFO L225 Difference]: With dead ends: 423 [2019-11-28 18:27:56,550 INFO L226 Difference]: Without dead ends: 388 [2019-11-28 18:27:56,551 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=97, Invalid=503, Unknown=0, NotChecked=0, Total=600 [2019-11-28 18:27:56,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388 states. [2019-11-28 18:27:56,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388 to 306. [2019-11-28 18:27:56,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 306 states. [2019-11-28 18:27:56,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 306 states and 518 transitions. [2019-11-28 18:27:56,556 INFO L78 Accepts]: Start accepts. Automaton has 306 states and 518 transitions. Word has length 54 [2019-11-28 18:27:56,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:56,557 INFO L462 AbstractCegarLoop]: Abstraction has 306 states and 518 transitions. [2019-11-28 18:27:56,557 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-11-28 18:27:56,557 INFO L276 IsEmpty]: Start isEmpty. Operand 306 states and 518 transitions. [2019-11-28 18:27:56,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:56,559 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:56,559 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:56,559 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:56,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:56,560 INFO L82 PathProgramCache]: Analyzing trace with hash 1326135034, now seen corresponding path program 3 times [2019-11-28 18:27:56,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:56,560 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112913093] [2019-11-28 18:27:56,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:56,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:27:56,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:27:56,810 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1112913093] [2019-11-28 18:27:56,812 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:27:56,812 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-28 18:27:56,812 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235685744] [2019-11-28 18:27:56,813 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-11-28 18:27:56,813 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:27:56,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-11-28 18:27:56,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:27:56,813 INFO L87 Difference]: Start difference. First operand 306 states and 518 transitions. Second operand 14 states. [2019-11-28 18:27:57,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:27:57,218 INFO L93 Difference]: Finished difference Result 409 states and 672 transitions. [2019-11-28 18:27:57,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:27:57,218 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-11-28 18:27:57,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:27:57,219 INFO L225 Difference]: With dead ends: 409 [2019-11-28 18:27:57,219 INFO L226 Difference]: Without dead ends: 376 [2019-11-28 18:27:57,220 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=102, Invalid=450, Unknown=0, NotChecked=0, Total=552 [2019-11-28 18:27:57,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 376 states. [2019-11-28 18:27:57,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 376 to 314. [2019-11-28 18:27:57,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2019-11-28 18:27:57,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 532 transitions. [2019-11-28 18:27:57,226 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 532 transitions. Word has length 54 [2019-11-28 18:27:57,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:27:57,226 INFO L462 AbstractCegarLoop]: Abstraction has 314 states and 532 transitions. [2019-11-28 18:27:57,226 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-11-28 18:27:57,226 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 532 transitions. [2019-11-28 18:27:57,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:27:57,230 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:27:57,230 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:27:57,230 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:27:57,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:27:57,231 INFO L82 PathProgramCache]: Analyzing trace with hash -91775718, now seen corresponding path program 4 times [2019-11-28 18:27:57,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:27:57,232 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450297475] [2019-11-28 18:27:57,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:27:57,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:27:57,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:27:57,367 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:27:57,367 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:27:57,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= v_~y$w_buff0_used~0_834 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2019~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2019~0.base_24|) |v_ULTIMATE.start_main_~#t2019~0.offset_19| 0)) |v_#memory_int_11|) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2019~0.base_24|) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2019~0.base_24| 4) |v_#length_13|) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2019~0.base_24|) 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= 0 |v_ULTIMATE.start_main_~#t2019~0.offset_19|) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2019~0.base_24| 1) |v_#valid_45|) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2019~0.offset=|v_ULTIMATE.start_main_~#t2019~0.offset_19|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t2020~0.base=|v_ULTIMATE.start_main_~#t2020~0.base_19|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_~#t2019~0.base=|v_ULTIMATE.start_main_~#t2019~0.base_24|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t2020~0.offset=|v_ULTIMATE.start_main_~#t2020~0.offset_16|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2019~0.offset, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2020~0.base, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_~#t2019~0.base, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t2020~0.offset, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:57,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2020~0.base_11|) (= |v_ULTIMATE.start_main_~#t2020~0.offset_10| 0) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2020~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2020~0.base_11|) |v_ULTIMATE.start_main_~#t2020~0.offset_10| 1)) |v_#memory_int_7|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2020~0.base_11|)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2020~0.base_11| 4) |v_#length_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2020~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t2020~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ULTIMATE.start_main_~#t2020~0.offset=|v_ULTIMATE.start_main_~#t2020~0.offset_10|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2020~0.base=|v_ULTIMATE.start_main_~#t2020~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t2020~0.offset, #length, ULTIMATE.start_main_~#t2020~0.base] because there is no mapped edge [2019-11-28 18:27:57,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:57,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1586959137 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-1586959137 256) 0))) (or (and (= ~y$w_buff1~0_In-1586959137 |P1Thread1of1ForFork1_#t~ite9_Out-1586959137|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out-1586959137| ~y~0_In-1586959137)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1586959137, ~y$w_buff1~0=~y$w_buff1~0_In-1586959137, ~y~0=~y~0_In-1586959137, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1586959137} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1586959137, ~y$w_buff1~0=~y$w_buff1~0_In-1586959137, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1586959137|, ~y~0=~y~0_In-1586959137, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1586959137} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:27:57,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:27:57,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In2128399818 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In2128399818 256) 0))) (or (and (= ~y$w_buff0_used~0_In2128399818 |P1Thread1of1ForFork1_#t~ite11_Out2128399818|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out2128399818|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2128399818, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2128399818} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2128399818, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2128399818, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out2128399818|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:27:57,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1579790546 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1579790546 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In1579790546 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1579790546 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1579790546|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In1579790546 |P1Thread1of1ForFork1_#t~ite12_Out1579790546|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1579790546, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1579790546, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1579790546, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1579790546} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1579790546, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1579790546, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1579790546, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1579790546|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1579790546} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:27:57,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In736315869 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In736315869 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out736315869|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd2~0_In736315869 |P1Thread1of1ForFork1_#t~ite13_Out736315869|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In736315869, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In736315869} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In736315869, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In736315869, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out736315869|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:27:57,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1010432124 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1010432124 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In1010432124 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd2~0_In1010432124 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out1010432124| ~y$r_buff1_thd2~0_In1010432124)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork1_#t~ite14_Out1010432124| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1010432124, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1010432124, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1010432124, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1010432124} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1010432124, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1010432124, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1010432124, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1010432124|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1010432124} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:27:57,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:27:57,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1471910948 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1471910948 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1471910948|) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1471910948 |P0Thread1of1ForFork0_#t~ite5_Out-1471910948|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1471910948, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1471910948} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1471910948|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1471910948, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1471910948} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:27:57,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In1536885840 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In1536885840 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd1~0_In1536885840 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1536885840 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out1536885840| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1536885840 |P0Thread1of1ForFork0_#t~ite6_Out1536885840|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1536885840, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1536885840, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1536885840, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1536885840} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1536885840|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1536885840, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1536885840, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1536885840, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1536885840} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:27:57,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse1 (= ~y$r_buff0_thd1~0_Out1748612295 ~y$r_buff0_thd1~0_In1748612295)) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In1748612295 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1748612295 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse2) (= ~y$r_buff0_thd1~0_Out1748612295 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1748612295, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1748612295} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1748612295, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1748612295|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out1748612295} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:27:57,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1832628457 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1832628457 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1832628457 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In1832628457 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1832628457|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~y$r_buff1_thd1~0_In1832628457 |P0Thread1of1ForFork0_#t~ite8_Out1832628457|) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1832628457, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1832628457, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1832628457, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832628457} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1832628457, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1832628457, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1832628457|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1832628457, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832628457} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:27:57,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:27:57,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:27:57,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1431690316 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1431690316 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1431690316| |ULTIMATE.start_main_#t~ite17_Out-1431690316|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite17_Out-1431690316| ~y~0_In-1431690316)) (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite17_Out-1431690316| ~y$w_buff1~0_In-1431690316)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1431690316, ~y~0=~y~0_In-1431690316, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1431690316, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1431690316} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1431690316|, ~y$w_buff1~0=~y$w_buff1~0_In-1431690316, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1431690316|, ~y~0=~y~0_In-1431690316, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1431690316, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1431690316} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:27:57,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1634771871 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1634771871 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite19_Out-1634771871|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1634771871 |ULTIMATE.start_main_#t~ite19_Out-1634771871|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1634771871, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1634771871} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1634771871, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1634771871|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1634771871} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:27:57,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In408085590 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In408085590 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In408085590 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In408085590 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In408085590 |ULTIMATE.start_main_#t~ite20_Out408085590|)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out408085590|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In408085590, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In408085590, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In408085590, ~y$w_buff1_used~0=~y$w_buff1_used~0_In408085590} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In408085590, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In408085590, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out408085590|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In408085590, ~y$w_buff1_used~0=~y$w_buff1_used~0_In408085590} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:27:57,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1722780 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1722780 256)))) (or (and (= ~y$r_buff0_thd0~0_In-1722780 |ULTIMATE.start_main_#t~ite21_Out-1722780|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-1722780|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1722780, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1722780} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1722780, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1722780, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1722780|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:27:57,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1910146606 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1910146606 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1910146606 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1910146606 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-1910146606| ~y$r_buff1_thd0~0_In-1910146606) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out-1910146606| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1910146606, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1910146606, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1910146606, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1910146606} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1910146606, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1910146606, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1910146606, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1910146606|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1910146606} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:27:57,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-200506423 256)))) (or (and (= |ULTIMATE.start_main_#t~ite32_Out-200506423| ~y$w_buff1~0_In-200506423) (= |ULTIMATE.start_main_#t~ite31_In-200506423| |ULTIMATE.start_main_#t~ite31_Out-200506423|) (not .cse0)) (and (= ~y$w_buff1~0_In-200506423 |ULTIMATE.start_main_#t~ite31_Out-200506423|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-200506423 256)))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-200506423 256))) (and (= 0 (mod ~y$r_buff1_thd0~0_In-200506423 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-200506423 256)))) .cse0 (= |ULTIMATE.start_main_#t~ite32_Out-200506423| |ULTIMATE.start_main_#t~ite31_Out-200506423|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-200506423, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-200506423, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-200506423, ~weak$$choice2~0=~weak$$choice2~0_In-200506423, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-200506423|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-200506423, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-200506423} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-200506423, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-200506423, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-200506423, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-200506423|, ~weak$$choice2~0=~weak$$choice2~0_In-200506423, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-200506423|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-200506423, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-200506423} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:27:57,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:27:57,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:27:57,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:27:57,507 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:27:57 BasicIcfg [2019-11-28 18:27:57,507 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:27:57,507 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:27:57,508 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:27:57,508 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:27:57,509 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:27:40" (3/4) ... [2019-11-28 18:27:57,511 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:27:57,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= v_~y$w_buff0_used~0_834 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2019~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2019~0.base_24|) |v_ULTIMATE.start_main_~#t2019~0.offset_19| 0)) |v_#memory_int_11|) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2019~0.base_24|) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2019~0.base_24| 4) |v_#length_13|) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2019~0.base_24|) 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= 0 |v_ULTIMATE.start_main_~#t2019~0.offset_19|) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2019~0.base_24| 1) |v_#valid_45|) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2019~0.offset=|v_ULTIMATE.start_main_~#t2019~0.offset_19|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t2020~0.base=|v_ULTIMATE.start_main_~#t2020~0.base_19|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_~#t2019~0.base=|v_ULTIMATE.start_main_~#t2019~0.base_24|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t2020~0.offset=|v_ULTIMATE.start_main_~#t2020~0.offset_16|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2019~0.offset, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2020~0.base, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_~#t2019~0.base, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t2020~0.offset, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:57,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2020~0.base_11|) (= |v_ULTIMATE.start_main_~#t2020~0.offset_10| 0) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2020~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2020~0.base_11|) |v_ULTIMATE.start_main_~#t2020~0.offset_10| 1)) |v_#memory_int_7|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2020~0.base_11|)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2020~0.base_11| 4) |v_#length_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2020~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t2020~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ULTIMATE.start_main_~#t2020~0.offset=|v_ULTIMATE.start_main_~#t2020~0.offset_10|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2020~0.base=|v_ULTIMATE.start_main_~#t2020~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t2020~0.offset, #length, ULTIMATE.start_main_~#t2020~0.base] because there is no mapped edge [2019-11-28 18:27:57,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:27:57,513 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1586959137 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-1586959137 256) 0))) (or (and (= ~y$w_buff1~0_In-1586959137 |P1Thread1of1ForFork1_#t~ite9_Out-1586959137|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out-1586959137| ~y~0_In-1586959137)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1586959137, ~y$w_buff1~0=~y$w_buff1~0_In-1586959137, ~y~0=~y~0_In-1586959137, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1586959137} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1586959137, ~y$w_buff1~0=~y$w_buff1~0_In-1586959137, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1586959137|, ~y~0=~y~0_In-1586959137, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1586959137} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:27:57,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:27:57,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In2128399818 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In2128399818 256) 0))) (or (and (= ~y$w_buff0_used~0_In2128399818 |P1Thread1of1ForFork1_#t~ite11_Out2128399818|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out2128399818|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2128399818, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2128399818} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2128399818, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2128399818, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out2128399818|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:27:57,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1579790546 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1579790546 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In1579790546 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1579790546 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1579790546|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In1579790546 |P1Thread1of1ForFork1_#t~ite12_Out1579790546|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1579790546, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1579790546, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1579790546, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1579790546} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1579790546, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1579790546, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1579790546, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1579790546|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1579790546} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:27:57,515 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In736315869 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In736315869 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out736315869|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd2~0_In736315869 |P1Thread1of1ForFork1_#t~ite13_Out736315869|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In736315869, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In736315869} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In736315869, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In736315869, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out736315869|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:27:57,515 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1010432124 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1010432124 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In1010432124 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd2~0_In1010432124 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out1010432124| ~y$r_buff1_thd2~0_In1010432124)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork1_#t~ite14_Out1010432124| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1010432124, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1010432124, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1010432124, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1010432124} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1010432124, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1010432124, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1010432124, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1010432124|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1010432124} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:27:57,515 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:27:57,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1471910948 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1471910948 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1471910948|) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1471910948 |P0Thread1of1ForFork0_#t~ite5_Out-1471910948|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1471910948, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1471910948} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1471910948|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1471910948, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1471910948} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:27:57,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In1536885840 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In1536885840 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd1~0_In1536885840 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1536885840 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out1536885840| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1536885840 |P0Thread1of1ForFork0_#t~ite6_Out1536885840|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1536885840, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1536885840, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1536885840, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1536885840} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1536885840|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1536885840, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1536885840, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1536885840, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1536885840} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:27:57,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse1 (= ~y$r_buff0_thd1~0_Out1748612295 ~y$r_buff0_thd1~0_In1748612295)) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In1748612295 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1748612295 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse2) (= ~y$r_buff0_thd1~0_Out1748612295 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1748612295, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1748612295} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1748612295, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1748612295|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out1748612295} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:27:57,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1832628457 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1832628457 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1832628457 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In1832628457 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1832628457|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~y$r_buff1_thd1~0_In1832628457 |P0Thread1of1ForFork0_#t~ite8_Out1832628457|) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1832628457, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1832628457, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1832628457, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832628457} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1832628457, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1832628457, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1832628457|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1832628457, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1832628457} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:27:57,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:27:57,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:27:57,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1431690316 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1431690316 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1431690316| |ULTIMATE.start_main_#t~ite17_Out-1431690316|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite17_Out-1431690316| ~y~0_In-1431690316)) (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite17_Out-1431690316| ~y$w_buff1~0_In-1431690316)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1431690316, ~y~0=~y~0_In-1431690316, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1431690316, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1431690316} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1431690316|, ~y$w_buff1~0=~y$w_buff1~0_In-1431690316, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1431690316|, ~y~0=~y~0_In-1431690316, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1431690316, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1431690316} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-11-28 18:27:57,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1634771871 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1634771871 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite19_Out-1634771871|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1634771871 |ULTIMATE.start_main_#t~ite19_Out-1634771871|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1634771871, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1634771871} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1634771871, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1634771871|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1634771871} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:27:57,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In408085590 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In408085590 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In408085590 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In408085590 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In408085590 |ULTIMATE.start_main_#t~ite20_Out408085590|)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out408085590|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In408085590, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In408085590, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In408085590, ~y$w_buff1_used~0=~y$w_buff1_used~0_In408085590} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In408085590, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In408085590, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out408085590|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In408085590, ~y$w_buff1_used~0=~y$w_buff1_used~0_In408085590} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:27:57,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1722780 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1722780 256)))) (or (and (= ~y$r_buff0_thd0~0_In-1722780 |ULTIMATE.start_main_#t~ite21_Out-1722780|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-1722780|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1722780, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1722780} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1722780, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1722780, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1722780|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:27:57,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1910146606 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1910146606 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1910146606 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1910146606 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-1910146606| ~y$r_buff1_thd0~0_In-1910146606) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out-1910146606| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1910146606, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1910146606, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1910146606, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1910146606} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1910146606, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1910146606, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1910146606, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1910146606|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1910146606} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:27:57,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-200506423 256)))) (or (and (= |ULTIMATE.start_main_#t~ite32_Out-200506423| ~y$w_buff1~0_In-200506423) (= |ULTIMATE.start_main_#t~ite31_In-200506423| |ULTIMATE.start_main_#t~ite31_Out-200506423|) (not .cse0)) (and (= ~y$w_buff1~0_In-200506423 |ULTIMATE.start_main_#t~ite31_Out-200506423|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-200506423 256)))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-200506423 256))) (and (= 0 (mod ~y$r_buff1_thd0~0_In-200506423 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-200506423 256)))) .cse0 (= |ULTIMATE.start_main_#t~ite32_Out-200506423| |ULTIMATE.start_main_#t~ite31_Out-200506423|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-200506423, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-200506423, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-200506423, ~weak$$choice2~0=~weak$$choice2~0_In-200506423, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-200506423|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-200506423, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-200506423} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-200506423, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-200506423, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-200506423, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-200506423|, ~weak$$choice2~0=~weak$$choice2~0_In-200506423, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-200506423|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-200506423, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-200506423} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-11-28 18:27:57,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:27:57,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:27:57,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:27:57,615 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:27:57,617 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:27:57,619 INFO L168 Benchmark]: Toolchain (without parser) took 19305.57 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 535.8 MB). Free memory was 952.3 MB in the beginning and 810.5 MB in the end (delta: 141.8 MB). Peak memory consumption was 677.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:57,620 INFO L168 Benchmark]: CDTParser took 0.38 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:27:57,620 INFO L168 Benchmark]: CACSL2BoogieTranslator took 814.53 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.8 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -161.8 MB). Peak memory consumption was 26.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:57,621 INFO L168 Benchmark]: Boogie Procedure Inliner took 69.28 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:57,621 INFO L168 Benchmark]: Boogie Preprocessor took 40.57 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:27:57,622 INFO L168 Benchmark]: RCFGBuilder took 815.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.1 MB). Peak memory consumption was 44.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:57,623 INFO L168 Benchmark]: TraceAbstraction took 17449.81 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 390.1 MB). Free memory was 1.1 GB in the beginning and 834.7 MB in the end (delta: 228.6 MB). Peak memory consumption was 618.7 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:57,625 INFO L168 Benchmark]: Witness Printer took 110.06 ms. Allocated memory is still 1.6 GB. Free memory was 834.7 MB in the beginning and 810.5 MB in the end (delta: 24.2 MB). Peak memory consumption was 24.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:27:57,629 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.38 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 814.53 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.8 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -161.8 MB). Peak memory consumption was 26.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 69.28 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 40.57 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 815.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.1 MB). Peak memory consumption was 44.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 17449.81 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 390.1 MB). Free memory was 1.1 GB in the beginning and 834.7 MB in the end (delta: 228.6 MB). Peak memory consumption was 618.7 MB. Max. memory is 11.5 GB. * Witness Printer took 110.06 ms. Allocated memory is still 1.6 GB. Free memory was 834.7 MB in the beginning and 810.5 MB in the end (delta: 24.2 MB). Peak memory consumption was 24.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.3s, 146 ProgramPointsBefore, 79 ProgramPointsAfterwards, 180 TransitionsBefore, 91 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 3678 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 221 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.8s, 0 MoverChecksTotal, 46090 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t2019, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2020, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L756] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 17.1s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 5.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1699 SDtfs, 1661 SDslu, 4536 SDs, 0 SdLazy, 2780 SolverSat, 166 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 173 GetRequests, 24 SyntacticMatches, 17 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 294 ImplicationChecksByTransitivity, 2.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14186occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.8s AutomataMinimizationTime, 16 MinimizatonAttempts, 9937 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.1s InterpolantComputationTime, 660 NumberOfCodeBlocks, 660 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 590 ConstructedInterpolants, 0 QuantifiedInterpolants, 121255 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...