./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe029_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe029_pso.oepc.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c9cb150e40ff5be2465128aade66c395f6c686f1 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:32:29,456 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:32:29,458 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:32:29,470 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:32:29,470 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:32:29,472 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:32:29,473 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:32:29,475 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:32:29,477 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:32:29,478 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:32:29,479 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:32:29,480 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:32:29,480 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:32:29,482 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:32:29,483 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:32:29,484 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:32:29,485 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:32:29,486 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:32:29,487 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:32:29,489 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:32:29,491 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:32:29,492 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:32:29,493 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:32:29,494 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:32:29,497 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:32:29,497 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:32:29,497 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:32:29,498 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:32:29,499 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:32:29,500 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:32:29,500 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:32:29,501 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:32:29,501 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:32:29,502 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:32:29,503 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:32:29,504 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:32:29,504 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:32:29,505 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:32:29,505 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:32:29,506 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:32:29,507 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:32:29,508 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:32:29,522 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:32:29,523 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:32:29,524 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:32:29,524 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:32:29,525 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:32:29,525 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:32:29,525 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:32:29,526 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:32:29,526 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:32:29,526 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:32:29,526 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:32:29,527 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:32:29,527 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:32:29,527 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:32:29,527 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:32:29,528 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:32:29,528 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:32:29,528 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:32:29,529 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:32:29,529 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:32:29,529 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:32:29,530 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:32:29,530 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:32:29,530 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:32:29,530 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:32:29,531 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:32:29,531 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:32:29,531 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:32:29,532 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:32:29,532 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c9cb150e40ff5be2465128aade66c395f6c686f1 [2019-11-28 18:32:29,842 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:32:29,855 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:32:29,859 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:32:29,860 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:32:29,861 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:32:29,862 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe029_pso.oepc.i [2019-11-28 18:32:29,920 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/02f3ded38/8bc7a79cce004351999c7f2275e6bf0d/FLAG4ad7da1aa [2019-11-28 18:32:30,431 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:32:30,432 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe029_pso.oepc.i [2019-11-28 18:32:30,451 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/02f3ded38/8bc7a79cce004351999c7f2275e6bf0d/FLAG4ad7da1aa [2019-11-28 18:32:30,750 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/02f3ded38/8bc7a79cce004351999c7f2275e6bf0d [2019-11-28 18:32:30,753 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:32:30,755 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:32:30,756 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:32:30,756 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:32:30,759 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:32:30,760 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:32:30" (1/1) ... [2019-11-28 18:32:30,763 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6822e6d4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:30, skipping insertion in model container [2019-11-28 18:32:30,763 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:32:30" (1/1) ... [2019-11-28 18:32:30,771 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:32:30,831 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:32:31,307 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:32:31,319 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:32:31,408 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:32:31,487 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:32:31,488 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31 WrapperNode [2019-11-28 18:32:31,488 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:32:31,489 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:32:31,489 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:32:31,489 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:32:31,497 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,517 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,560 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:32:31,561 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:32:31,561 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:32:31,561 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:32:31,571 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,572 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,577 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,577 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,587 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,591 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,594 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... [2019-11-28 18:32:31,599 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:32:31,599 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:32:31,599 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:32:31,600 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:32:31,601 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:32:31,685 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:32:31,685 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:32:31,685 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:32:31,685 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:32:31,686 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:32:31,686 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:32:31,686 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:32:31,686 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:32:31,687 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:32:31,687 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:32:31,687 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:32:31,689 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:32:32,362 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:32:32,362 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:32:32,363 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:32 BoogieIcfgContainer [2019-11-28 18:32:32,363 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:32:32,364 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:32:32,364 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:32:32,367 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:32:32,367 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:32:30" (1/3) ... [2019-11-28 18:32:32,368 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@24eb342b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:32:32, skipping insertion in model container [2019-11-28 18:32:32,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:31" (2/3) ... [2019-11-28 18:32:32,369 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@24eb342b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:32:32, skipping insertion in model container [2019-11-28 18:32:32,369 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:32" (3/3) ... [2019-11-28 18:32:32,371 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_pso.oepc.i [2019-11-28 18:32:32,380 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:32:32,380 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:32:32,388 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:32:32,389 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:32:32,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,422 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,422 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,422 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,423 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,423 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,426 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,426 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,426 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,426 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,427 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,427 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,427 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,428 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,428 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,428 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,428 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,428 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,429 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,429 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,429 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,429 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,430 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,430 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,431 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,431 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,431 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,431 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,432 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,432 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,432 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,432 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,432 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,433 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,433 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,433 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,433 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,433 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,434 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,434 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,434 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,434 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,434 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,435 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,435 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,435 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,435 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,436 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,436 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:32,453 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:32:32,474 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:32:32,474 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:32:32,474 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:32:32,474 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:32:32,475 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:32:32,475 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:32:32,475 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:32:32,475 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:32:32,491 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 145 places, 179 transitions [2019-11-28 18:32:32,493 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-11-28 18:32:32,574 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-11-28 18:32:32,574 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:32:32,592 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:32:32,612 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-11-28 18:32:32,688 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-11-28 18:32:32,688 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:32:32,696 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:32:32,715 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-11-28 18:32:32,716 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:32:37,081 WARN L192 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 77 [2019-11-28 18:32:37,213 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46212 [2019-11-28 18:32:37,213 INFO L214 etLargeBlockEncoding]: Total number of compositions: 97 [2019-11-28 18:32:37,217 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-11-28 18:32:37,857 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8458 states. [2019-11-28 18:32:37,860 INFO L276 IsEmpty]: Start isEmpty. Operand 8458 states. [2019-11-28 18:32:37,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-11-28 18:32:37,868 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:37,869 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-11-28 18:32:37,870 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:37,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:37,879 INFO L82 PathProgramCache]: Analyzing trace with hash 717058, now seen corresponding path program 1 times [2019-11-28 18:32:37,892 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:37,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [465839515] [2019-11-28 18:32:37,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:38,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:38,270 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:38,272 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [465839515] [2019-11-28 18:32:38,272 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:38,274 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:32:38,275 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [885192550] [2019-11-28 18:32:38,281 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:38,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:38,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:38,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:38,312 INFO L87 Difference]: Start difference. First operand 8458 states. Second operand 3 states. [2019-11-28 18:32:38,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:38,559 INFO L93 Difference]: Finished difference Result 8394 states and 27476 transitions. [2019-11-28 18:32:38,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:38,561 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-11-28 18:32:38,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:38,667 INFO L225 Difference]: With dead ends: 8394 [2019-11-28 18:32:38,667 INFO L226 Difference]: Without dead ends: 8226 [2019-11-28 18:32:38,669 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:38,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8226 states. [2019-11-28 18:32:39,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8226 to 8226. [2019-11-28 18:32:39,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8226 states. [2019-11-28 18:32:39,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8226 states to 8226 states and 26958 transitions. [2019-11-28 18:32:39,137 INFO L78 Accepts]: Start accepts. Automaton has 8226 states and 26958 transitions. Word has length 3 [2019-11-28 18:32:39,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:39,138 INFO L462 AbstractCegarLoop]: Abstraction has 8226 states and 26958 transitions. [2019-11-28 18:32:39,138 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:39,138 INFO L276 IsEmpty]: Start isEmpty. Operand 8226 states and 26958 transitions. [2019-11-28 18:32:39,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:32:39,141 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:39,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:39,142 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:39,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:39,142 INFO L82 PathProgramCache]: Analyzing trace with hash 651590314, now seen corresponding path program 1 times [2019-11-28 18:32:39,143 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:39,143 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866083765] [2019-11-28 18:32:39,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:39,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:39,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:39,235 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [866083765] [2019-11-28 18:32:39,235 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:39,235 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:39,235 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [657647443] [2019-11-28 18:32:39,237 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:32:39,237 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:39,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:32:39,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:32:39,238 INFO L87 Difference]: Start difference. First operand 8226 states and 26958 transitions. Second operand 4 states. [2019-11-28 18:32:39,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:39,610 INFO L93 Difference]: Finished difference Result 12778 states and 40134 transitions. [2019-11-28 18:32:39,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:32:39,611 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:32:39,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:39,699 INFO L225 Difference]: With dead ends: 12778 [2019-11-28 18:32:39,699 INFO L226 Difference]: Without dead ends: 12771 [2019-11-28 18:32:39,700 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:39,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12771 states. [2019-11-28 18:32:40,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12771 to 11467. [2019-11-28 18:32:40,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11467 states. [2019-11-28 18:32:40,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11467 states to 11467 states and 36507 transitions. [2019-11-28 18:32:40,142 INFO L78 Accepts]: Start accepts. Automaton has 11467 states and 36507 transitions. Word has length 11 [2019-11-28 18:32:40,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:40,143 INFO L462 AbstractCegarLoop]: Abstraction has 11467 states and 36507 transitions. [2019-11-28 18:32:40,143 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:32:40,143 INFO L276 IsEmpty]: Start isEmpty. Operand 11467 states and 36507 transitions. [2019-11-28 18:32:40,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:32:40,153 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:40,154 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:40,154 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:40,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:40,155 INFO L82 PathProgramCache]: Analyzing trace with hash -1968692504, now seen corresponding path program 1 times [2019-11-28 18:32:40,155 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:40,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1511065693] [2019-11-28 18:32:40,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:40,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:40,435 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 7 DAG size of output: 5 [2019-11-28 18:32:40,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:40,440 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1511065693] [2019-11-28 18:32:40,440 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:40,440 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:40,441 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1569444428] [2019-11-28 18:32:40,441 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:32:40,441 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:40,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:32:40,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:32:40,443 INFO L87 Difference]: Start difference. First operand 11467 states and 36507 transitions. Second operand 4 states. [2019-11-28 18:32:40,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:40,669 INFO L93 Difference]: Finished difference Result 14268 states and 44852 transitions. [2019-11-28 18:32:40,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:32:40,669 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:32:40,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:40,718 INFO L225 Difference]: With dead ends: 14268 [2019-11-28 18:32:40,718 INFO L226 Difference]: Without dead ends: 14268 [2019-11-28 18:32:40,719 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:40,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14268 states. [2019-11-28 18:32:41,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14268 to 12752. [2019-11-28 18:32:41,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12752 states. [2019-11-28 18:32:41,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12752 states to 12752 states and 40448 transitions. [2019-11-28 18:32:41,104 INFO L78 Accepts]: Start accepts. Automaton has 12752 states and 40448 transitions. Word has length 11 [2019-11-28 18:32:41,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:41,104 INFO L462 AbstractCegarLoop]: Abstraction has 12752 states and 40448 transitions. [2019-11-28 18:32:41,104 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:32:41,104 INFO L276 IsEmpty]: Start isEmpty. Operand 12752 states and 40448 transitions. [2019-11-28 18:32:41,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:32:41,108 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:41,108 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:41,108 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:41,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:41,109 INFO L82 PathProgramCache]: Analyzing trace with hash -1372508181, now seen corresponding path program 1 times [2019-11-28 18:32:41,109 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:41,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [903281736] [2019-11-28 18:32:41,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:41,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:41,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:41,184 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [903281736] [2019-11-28 18:32:41,184 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:41,184 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:32:41,184 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656688124] [2019-11-28 18:32:41,185 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:32:41,185 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:41,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:32:41,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:32:41,186 INFO L87 Difference]: Start difference. First operand 12752 states and 40448 transitions. Second operand 6 states. [2019-11-28 18:32:41,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:41,591 INFO L93 Difference]: Finished difference Result 17010 states and 52843 transitions. [2019-11-28 18:32:41,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:32:41,599 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2019-11-28 18:32:41,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:41,646 INFO L225 Difference]: With dead ends: 17010 [2019-11-28 18:32:41,646 INFO L226 Difference]: Without dead ends: 17003 [2019-11-28 18:32:41,647 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:32:41,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17003 states. [2019-11-28 18:32:42,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17003 to 12755. [2019-11-28 18:32:42,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12755 states. [2019-11-28 18:32:42,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12755 states to 12755 states and 40342 transitions. [2019-11-28 18:32:42,043 INFO L78 Accepts]: Start accepts. Automaton has 12755 states and 40342 transitions. Word has length 17 [2019-11-28 18:32:42,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:42,044 INFO L462 AbstractCegarLoop]: Abstraction has 12755 states and 40342 transitions. [2019-11-28 18:32:42,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:32:42,045 INFO L276 IsEmpty]: Start isEmpty. Operand 12755 states and 40342 transitions. [2019-11-28 18:32:42,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:32:42,254 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:42,254 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:42,254 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:42,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:42,255 INFO L82 PathProgramCache]: Analyzing trace with hash -1155459573, now seen corresponding path program 1 times [2019-11-28 18:32:42,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:42,256 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365875919] [2019-11-28 18:32:42,256 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:42,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:42,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:42,317 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [365875919] [2019-11-28 18:32:42,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:42,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:32:42,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127414970] [2019-11-28 18:32:42,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:42,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:42,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:42,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:42,320 INFO L87 Difference]: Start difference. First operand 12755 states and 40342 transitions. Second operand 3 states. [2019-11-28 18:32:42,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:42,433 INFO L93 Difference]: Finished difference Result 15529 states and 48523 transitions. [2019-11-28 18:32:42,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:42,434 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-11-28 18:32:42,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:42,473 INFO L225 Difference]: With dead ends: 15529 [2019-11-28 18:32:42,474 INFO L226 Difference]: Without dead ends: 15529 [2019-11-28 18:32:42,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:42,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15529 states. [2019-11-28 18:32:42,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15529 to 13746. [2019-11-28 18:32:42,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13746 states. [2019-11-28 18:32:42,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13746 states to 13746 states and 43375 transitions. [2019-11-28 18:32:42,859 INFO L78 Accepts]: Start accepts. Automaton has 13746 states and 43375 transitions. Word has length 25 [2019-11-28 18:32:42,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:42,860 INFO L462 AbstractCegarLoop]: Abstraction has 13746 states and 43375 transitions. [2019-11-28 18:32:42,860 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:42,860 INFO L276 IsEmpty]: Start isEmpty. Operand 13746 states and 43375 transitions. [2019-11-28 18:32:42,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-11-28 18:32:42,874 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:42,874 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:42,874 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:42,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:42,875 INFO L82 PathProgramCache]: Analyzing trace with hash -1248228747, now seen corresponding path program 1 times [2019-11-28 18:32:42,875 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:42,876 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615069140] [2019-11-28 18:32:42,876 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:42,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:42,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:42,965 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [615069140] [2019-11-28 18:32:42,965 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:42,966 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:32:42,966 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [628421687] [2019-11-28 18:32:42,966 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:32:42,966 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:42,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:32:42,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:32:42,967 INFO L87 Difference]: Start difference. First operand 13746 states and 43375 transitions. Second operand 4 states. [2019-11-28 18:32:43,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:43,006 INFO L93 Difference]: Finished difference Result 2247 states and 5122 transitions. [2019-11-28 18:32:43,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:32:43,007 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-11-28 18:32:43,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:43,011 INFO L225 Difference]: With dead ends: 2247 [2019-11-28 18:32:43,011 INFO L226 Difference]: Without dead ends: 1970 [2019-11-28 18:32:43,012 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:43,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1970 states. [2019-11-28 18:32:43,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1970 to 1970. [2019-11-28 18:32:43,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1970 states. [2019-11-28 18:32:43,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1970 states to 1970 states and 4356 transitions. [2019-11-28 18:32:43,042 INFO L78 Accepts]: Start accepts. Automaton has 1970 states and 4356 transitions. Word has length 25 [2019-11-28 18:32:43,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:43,042 INFO L462 AbstractCegarLoop]: Abstraction has 1970 states and 4356 transitions. [2019-11-28 18:32:43,042 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:32:43,042 INFO L276 IsEmpty]: Start isEmpty. Operand 1970 states and 4356 transitions. [2019-11-28 18:32:43,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:32:43,046 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:43,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:43,047 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:43,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:43,047 INFO L82 PathProgramCache]: Analyzing trace with hash -1011623832, now seen corresponding path program 1 times [2019-11-28 18:32:43,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:43,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [279648281] [2019-11-28 18:32:43,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:43,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:43,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:43,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [279648281] [2019-11-28 18:32:43,185 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:43,185 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:32:43,186 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024208413] [2019-11-28 18:32:43,187 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:32:43,187 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:43,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:32:43,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:43,187 INFO L87 Difference]: Start difference. First operand 1970 states and 4356 transitions. Second operand 5 states. [2019-11-28 18:32:43,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:43,230 INFO L93 Difference]: Finished difference Result 415 states and 757 transitions. [2019-11-28 18:32:43,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:32:43,230 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:32:43,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:43,231 INFO L225 Difference]: With dead ends: 415 [2019-11-28 18:32:43,231 INFO L226 Difference]: Without dead ends: 370 [2019-11-28 18:32:43,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:32:43,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2019-11-28 18:32:43,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 342. [2019-11-28 18:32:43,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 342 states. [2019-11-28 18:32:43,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 617 transitions. [2019-11-28 18:32:43,238 INFO L78 Accepts]: Start accepts. Automaton has 342 states and 617 transitions. Word has length 37 [2019-11-28 18:32:43,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:43,239 INFO L462 AbstractCegarLoop]: Abstraction has 342 states and 617 transitions. [2019-11-28 18:32:43,239 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:32:43,239 INFO L276 IsEmpty]: Start isEmpty. Operand 342 states and 617 transitions. [2019-11-28 18:32:43,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:32:43,242 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:43,245 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:43,245 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:43,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:43,246 INFO L82 PathProgramCache]: Analyzing trace with hash 1093435048, now seen corresponding path program 1 times [2019-11-28 18:32:43,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:43,246 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025792925] [2019-11-28 18:32:43,246 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:43,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:43,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:43,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025792925] [2019-11-28 18:32:43,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:43,394 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:43,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777167239] [2019-11-28 18:32:43,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:43,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:43,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:43,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:43,395 INFO L87 Difference]: Start difference. First operand 342 states and 617 transitions. Second operand 3 states. [2019-11-28 18:32:43,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:43,409 INFO L93 Difference]: Finished difference Result 330 states and 581 transitions. [2019-11-28 18:32:43,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:43,409 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-28 18:32:43,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:43,410 INFO L225 Difference]: With dead ends: 330 [2019-11-28 18:32:43,410 INFO L226 Difference]: Without dead ends: 330 [2019-11-28 18:32:43,410 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:43,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2019-11-28 18:32:43,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 330. [2019-11-28 18:32:43,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 330 states. [2019-11-28 18:32:43,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330 states to 330 states and 581 transitions. [2019-11-28 18:32:43,416 INFO L78 Accepts]: Start accepts. Automaton has 330 states and 581 transitions. Word has length 52 [2019-11-28 18:32:43,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:43,418 INFO L462 AbstractCegarLoop]: Abstraction has 330 states and 581 transitions. [2019-11-28 18:32:43,418 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:43,419 INFO L276 IsEmpty]: Start isEmpty. Operand 330 states and 581 transitions. [2019-11-28 18:32:43,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:32:43,420 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:43,420 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:43,420 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:43,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:43,421 INFO L82 PathProgramCache]: Analyzing trace with hash 456891136, now seen corresponding path program 1 times [2019-11-28 18:32:43,421 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:43,421 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461729767] [2019-11-28 18:32:43,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:43,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:43,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:43,532 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461729767] [2019-11-28 18:32:43,532 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:43,532 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:32:43,532 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118877404] [2019-11-28 18:32:43,533 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:32:43,533 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:43,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:32:43,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:43,534 INFO L87 Difference]: Start difference. First operand 330 states and 581 transitions. Second operand 5 states. [2019-11-28 18:32:43,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:43,714 INFO L93 Difference]: Finished difference Result 486 states and 863 transitions. [2019-11-28 18:32:43,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:32:43,715 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-11-28 18:32:43,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:43,716 INFO L225 Difference]: With dead ends: 486 [2019-11-28 18:32:43,716 INFO L226 Difference]: Without dead ends: 486 [2019-11-28 18:32:43,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:32:43,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 486 states. [2019-11-28 18:32:43,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 486 to 421. [2019-11-28 18:32:43,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 421 states. [2019-11-28 18:32:43,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 747 transitions. [2019-11-28 18:32:43,725 INFO L78 Accepts]: Start accepts. Automaton has 421 states and 747 transitions. Word has length 53 [2019-11-28 18:32:43,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:43,726 INFO L462 AbstractCegarLoop]: Abstraction has 421 states and 747 transitions. [2019-11-28 18:32:43,726 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:32:43,726 INFO L276 IsEmpty]: Start isEmpty. Operand 421 states and 747 transitions. [2019-11-28 18:32:43,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:32:43,728 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:43,728 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:43,729 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:43,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:43,729 INFO L82 PathProgramCache]: Analyzing trace with hash 923557156, now seen corresponding path program 2 times [2019-11-28 18:32:43,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:43,730 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825317477] [2019-11-28 18:32:43,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:43,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:43,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:43,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825317477] [2019-11-28 18:32:43,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:43,990 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:32:43,990 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357372954] [2019-11-28 18:32:43,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:32:43,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:43,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:32:43,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:32:43,992 INFO L87 Difference]: Start difference. First operand 421 states and 747 transitions. Second operand 6 states. [2019-11-28 18:32:44,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:44,122 INFO L93 Difference]: Finished difference Result 510 states and 902 transitions. [2019-11-28 18:32:44,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:32:44,123 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-28 18:32:44,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:44,124 INFO L225 Difference]: With dead ends: 510 [2019-11-28 18:32:44,124 INFO L226 Difference]: Without dead ends: 510 [2019-11-28 18:32:44,124 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:32:44,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 510 states. [2019-11-28 18:32:44,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 510 to 428. [2019-11-28 18:32:44,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 428 states. [2019-11-28 18:32:44,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 760 transitions. [2019-11-28 18:32:44,131 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 760 transitions. Word has length 53 [2019-11-28 18:32:44,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:44,132 INFO L462 AbstractCegarLoop]: Abstraction has 428 states and 760 transitions. [2019-11-28 18:32:44,132 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:32:44,132 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 760 transitions. [2019-11-28 18:32:44,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:32:44,134 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:44,134 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:44,134 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:44,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:44,134 INFO L82 PathProgramCache]: Analyzing trace with hash 660947046, now seen corresponding path program 3 times [2019-11-28 18:32:44,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:44,135 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410481409] [2019-11-28 18:32:44,135 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:44,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:44,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:44,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410481409] [2019-11-28 18:32:44,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:44,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:44,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382947920] [2019-11-28 18:32:44,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:44,248 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:44,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:44,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:44,249 INFO L87 Difference]: Start difference. First operand 428 states and 760 transitions. Second operand 3 states. [2019-11-28 18:32:44,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:44,288 INFO L93 Difference]: Finished difference Result 427 states and 758 transitions. [2019-11-28 18:32:44,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:44,289 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:32:44,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:44,290 INFO L225 Difference]: With dead ends: 427 [2019-11-28 18:32:44,290 INFO L226 Difference]: Without dead ends: 427 [2019-11-28 18:32:44,290 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:44,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states. [2019-11-28 18:32:44,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 329. [2019-11-28 18:32:44,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2019-11-28 18:32:44,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 579 transitions. [2019-11-28 18:32:44,298 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 579 transitions. Word has length 53 [2019-11-28 18:32:44,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:44,299 INFO L462 AbstractCegarLoop]: Abstraction has 329 states and 579 transitions. [2019-11-28 18:32:44,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:44,299 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 579 transitions. [2019-11-28 18:32:44,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:32:44,300 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:44,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:44,301 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:44,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:44,301 INFO L82 PathProgramCache]: Analyzing trace with hash 1896622654, now seen corresponding path program 1 times [2019-11-28 18:32:44,302 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:44,302 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1556141615] [2019-11-28 18:32:44,302 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:44,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:44,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:44,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1556141615] [2019-11-28 18:32:44,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:44,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:32:44,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1239883467] [2019-11-28 18:32:44,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:32:44,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:44,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:32:44,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:32:44,624 INFO L87 Difference]: Start difference. First operand 329 states and 579 transitions. Second operand 13 states. [2019-11-28 18:32:45,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:45,136 INFO L93 Difference]: Finished difference Result 745 states and 1301 transitions. [2019-11-28 18:32:45,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-28 18:32:45,137 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-11-28 18:32:45,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:45,138 INFO L225 Difference]: With dead ends: 745 [2019-11-28 18:32:45,139 INFO L226 Difference]: Without dead ends: 648 [2019-11-28 18:32:45,139 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=116, Invalid=484, Unknown=0, NotChecked=0, Total=600 [2019-11-28 18:32:45,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 648 states. [2019-11-28 18:32:45,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 648 to 440. [2019-11-28 18:32:45,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 440 states. [2019-11-28 18:32:45,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 440 states to 440 states and 782 transitions. [2019-11-28 18:32:45,148 INFO L78 Accepts]: Start accepts. Automaton has 440 states and 782 transitions. Word has length 54 [2019-11-28 18:32:45,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:45,149 INFO L462 AbstractCegarLoop]: Abstraction has 440 states and 782 transitions. [2019-11-28 18:32:45,149 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:32:45,149 INFO L276 IsEmpty]: Start isEmpty. Operand 440 states and 782 transitions. [2019-11-28 18:32:45,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:32:45,151 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:45,151 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:45,151 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:45,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:45,152 INFO L82 PathProgramCache]: Analyzing trace with hash 1383855850, now seen corresponding path program 2 times [2019-11-28 18:32:45,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:45,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500621995] [2019-11-28 18:32:45,153 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:45,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:45,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:45,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500621995] [2019-11-28 18:32:45,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:45,296 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:32:45,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [273664716] [2019-11-28 18:32:45,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:32:45,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:45,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:32:45,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:32:45,299 INFO L87 Difference]: Start difference. First operand 440 states and 782 transitions. Second operand 6 states. [2019-11-28 18:32:45,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:45,370 INFO L93 Difference]: Finished difference Result 629 states and 1102 transitions. [2019-11-28 18:32:45,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:32:45,370 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-11-28 18:32:45,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:45,371 INFO L225 Difference]: With dead ends: 629 [2019-11-28 18:32:45,371 INFO L226 Difference]: Without dead ends: 243 [2019-11-28 18:32:45,372 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:32:45,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2019-11-28 18:32:45,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 219. [2019-11-28 18:32:45,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2019-11-28 18:32:45,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 389 transitions. [2019-11-28 18:32:45,377 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 389 transitions. Word has length 54 [2019-11-28 18:32:45,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:45,377 INFO L462 AbstractCegarLoop]: Abstraction has 219 states and 389 transitions. [2019-11-28 18:32:45,377 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:32:45,378 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 389 transitions. [2019-11-28 18:32:45,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:32:45,378 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:45,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:45,379 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:45,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:45,380 INFO L82 PathProgramCache]: Analyzing trace with hash 133727006, now seen corresponding path program 3 times [2019-11-28 18:32:45,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:45,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284782726] [2019-11-28 18:32:45,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:45,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:45,749 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 8 [2019-11-28 18:32:45,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:45,783 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284782726] [2019-11-28 18:32:45,783 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:45,783 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-28 18:32:45,784 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [41858525] [2019-11-28 18:32:45,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-11-28 18:32:45,784 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:45,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-11-28 18:32:45,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:32:45,785 INFO L87 Difference]: Start difference. First operand 219 states and 389 transitions. Second operand 14 states. [2019-11-28 18:32:46,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:46,260 INFO L93 Difference]: Finished difference Result 368 states and 633 transitions. [2019-11-28 18:32:46,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-28 18:32:46,260 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-11-28 18:32:46,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:46,261 INFO L225 Difference]: With dead ends: 368 [2019-11-28 18:32:46,262 INFO L226 Difference]: Without dead ends: 337 [2019-11-28 18:32:46,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=119, Invalid=481, Unknown=0, NotChecked=0, Total=600 [2019-11-28 18:32:46,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337 states. [2019-11-28 18:32:46,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337 to 327. [2019-11-28 18:32:46,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-11-28 18:32:46,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 574 transitions. [2019-11-28 18:32:46,266 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 574 transitions. Word has length 54 [2019-11-28 18:32:46,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:46,267 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 574 transitions. [2019-11-28 18:32:46,267 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-11-28 18:32:46,267 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 574 transitions. [2019-11-28 18:32:46,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:32:46,268 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:46,268 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:46,268 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:46,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:46,268 INFO L82 PathProgramCache]: Analyzing trace with hash 2067211286, now seen corresponding path program 4 times [2019-11-28 18:32:46,269 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:46,269 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060710667] [2019-11-28 18:32:46,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:46,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:32:46,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:32:46,402 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:32:46,403 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:32:46,406 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_40| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= 0 v_~__unbuffered_cnt~0_61) (= v_~weak$$choice2~0_132 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1_used~0_444 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2477~0.base_19|) 0) (= v_~y$r_buff1_thd0~0_304 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2477~0.base_19|) (= v_~main$tmp_guard0~0_23 0) (= v_~y$r_buff0_thd0~0_394 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2477~0.base_19| 1) |v_#valid_38|) (= 0 v_~y$w_buff0~0_376) (= 0 |v_#NULL.base_6|) (= v_~y$r_buff1_thd1~0_220 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2477~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2477~0.base_19|) |v_ULTIMATE.start_main_~#t2477~0.offset_16| 0)) |v_#memory_int_15|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2477~0.base_19| 4)) (= v_~y~0_141 0) (= v_~y$r_buff0_thd1~0_301 0) (= 0 v_~weak$$choice0~0_24) (= 0 v_~y$flush_delayed~0_48) (= 0 v_~y$r_buff0_thd2~0_175) (= v_~y$w_buff1~0_254 0) (= 0 |v_ULTIMATE.start_main_~#t2477~0.offset_16|) (= v_~y$mem_tmp~0_31 0) (= v_~y$w_buff0_used~0_753 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~y$r_buff1_thd2~0_205) (= 0 v_~x~0_168) (< 0 |v_#StackHeapBarrier_13|) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_32|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_32|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_56|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_301, ~y$flush_delayed~0=v_~y$flush_delayed~0_48, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_32|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_~#t2477~0.base=|v_ULTIMATE.start_main_~#t2477~0.base_19|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_35|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_51|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_45|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_24, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t2478~0.base=|v_ULTIMATE.start_main_~#t2478~0.base_19|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_30|, ~y$w_buff1~0=v_~y$w_buff1~0_254, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_175, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_304, ~x~0=v_~x~0_168, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_753, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_28|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_28|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ULTIMATE.start_main_~#t2478~0.offset=|v_ULTIMATE.start_main_~#t2478~0.offset_15|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_220, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_39|, ~y$w_buff0~0=v_~y$w_buff0~0_376, ~y~0=v_~y~0_141, ULTIMATE.start_main_~#t2477~0.offset=|v_ULTIMATE.start_main_~#t2477~0.offset_16|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_30|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_44|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_26|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_37|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_28|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_39|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_15|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_394, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_13|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_444} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_~#t2477~0.base, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_~#t2478~0.base, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2478~0.offset, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_~#t2477~0.offset, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:32:46,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L777-1-->L779: Formula: (and (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2478~0.base_11| 1)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2478~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2478~0.base_11|) |v_ULTIMATE.start_main_~#t2478~0.offset_10| 1))) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2478~0.base_11|)) (not (= 0 |v_ULTIMATE.start_main_~#t2478~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t2478~0.offset_10|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2478~0.base_11|) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2478~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t2478~0.offset=|v_ULTIMATE.start_main_~#t2478~0.offset_10|, ULTIMATE.start_main_~#t2478~0.base=|v_ULTIMATE.start_main_~#t2478~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2478~0.offset, ULTIMATE.start_main_~#t2478~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:32:46,408 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P0ENTRY-->L4-3: Formula: (and (= 2 v_~y$w_buff0~0_172) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 0)) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_290 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_162 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_~y$w_buff0_used~0_290 1) (= v_P0Thread1of1ForFork0_~arg.offset_77 |v_P0Thread1of1ForFork0_#in~arg.offset_79|) (= v_P0Thread1of1ForFork0_~arg.base_77 |v_P0Thread1of1ForFork0_#in~arg.base_79|) (= v_~y$w_buff0_used~0_291 v_~y$w_buff1_used~0_162) (= v_~y$w_buff1~0_100 v_~y$w_buff0~0_173)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_291, ~y$w_buff0~0=v_~y$w_buff0~0_173, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_290, ~y$w_buff1~0=v_~y$w_buff1~0_100, ~y$w_buff0~0=v_~y$w_buff0~0_172, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_77, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_77, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_162} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:32:46,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-1575932751 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1575932751 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1575932751| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-1575932751| ~y$w_buff0_used~0_In-1575932751)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1575932751, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1575932751} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1575932751|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1575932751, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1575932751} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:32:46,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L754-2-->L754-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-330043530 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-330043530 256) 0))) (or (and (= ~y~0_In-330043530 |P1Thread1of1ForFork1_#t~ite9_Out-330043530|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In-330043530 |P1Thread1of1ForFork1_#t~ite9_Out-330043530|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-330043530, ~y$w_buff1~0=~y$w_buff1~0_In-330043530, ~y~0=~y~0_In-330043530, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-330043530} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-330043530, ~y$w_buff1~0=~y$w_buff1~0_In-330043530, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-330043530|, ~y~0=~y~0_In-330043530, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-330043530} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:32:46,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [630] [630] L754-4-->L755: Formula: (= v_~y~0_50 |v_P1Thread1of1ForFork1_#t~ite9_12|) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_12|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_11|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_50} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:32:46,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In502986957 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In502986957 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out502986957|)) (and (= ~y$w_buff0_used~0_In502986957 |P1Thread1of1ForFork1_#t~ite11_Out502986957|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In502986957, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In502986957} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In502986957, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In502986957, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out502986957|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:32:46,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In439924727 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In439924727 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In439924727 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In439924727 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out439924727| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite6_Out439924727| ~y$w_buff1_used~0_In439924727) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In439924727, ~y$w_buff0_used~0=~y$w_buff0_used~0_In439924727, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In439924727, ~y$w_buff1_used~0=~y$w_buff1_used~0_In439924727} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out439924727|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In439924727, ~y$w_buff0_used~0=~y$w_buff0_used~0_In439924727, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In439924727, ~y$w_buff1_used~0=~y$w_buff1_used~0_In439924727} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:32:46,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L737-->L738: Formula: (let ((.cse0 (= ~y$r_buff0_thd1~0_In-1937141926 ~y$r_buff0_thd1~0_Out-1937141926)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1937141926 256))) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-1937141926 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (= 0 ~y$r_buff0_thd1~0_Out-1937141926) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1937141926, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1937141926} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1937141926, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1937141926|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-1937141926} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:32:46,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L756-->L756-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd2~0_In1278367555 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1278367555 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1278367555 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1278367555 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1278367555|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1278367555 |P1Thread1of1ForFork1_#t~ite12_Out1278367555|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1278367555, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1278367555, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1278367555, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1278367555} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1278367555, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1278367555, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1278367555, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1278367555|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1278367555} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:32:46,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In420519582 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In420519582 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out420519582|)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out420519582| ~y$r_buff0_thd2~0_In420519582) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In420519582, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In420519582} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In420519582, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In420519582, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out420519582|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:32:46,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1521563323 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-1521563323 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1521563323 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1521563323 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1521563323 |P1Thread1of1ForFork1_#t~ite14_Out-1521563323|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1521563323| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1521563323, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1521563323, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1521563323, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1521563323} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1521563323, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1521563323, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1521563323, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1521563323|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1521563323} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:32:46,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39) (= |v_P1Thread1of1ForFork1_#t~ite14_32| v_~y$r_buff1_thd2~0_85)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_85, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:32:46,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In470297281 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In470297281 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd1~0_In470297281 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In470297281 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out470297281|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$r_buff1_thd1~0_In470297281 |P0Thread1of1ForFork0_#t~ite8_Out470297281|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In470297281, ~y$w_buff0_used~0=~y$w_buff0_used~0_In470297281, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In470297281, ~y$w_buff1_used~0=~y$w_buff1_used~0_In470297281} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In470297281, ~y$w_buff0_used~0=~y$w_buff0_used~0_In470297281, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out470297281|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In470297281, ~y$w_buff1_used~0=~y$w_buff1_used~0_In470297281} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:32:46,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L738-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:32:46,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [592] [592] L783-->L785-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= (mod v_~y$w_buff0_used~0_159 256) 0) (= (mod v_~y$r_buff0_thd0~0_61 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:32:46,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L785-2-->L785-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In1111595850 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1111595850 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite17_Out1111595850| ~y~0_In1111595850) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite17_Out1111595850| ~y$w_buff1~0_In1111595850) (not .cse0) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1111595850, ~y~0=~y~0_In1111595850, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1111595850, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1111595850} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out1111595850|, ~y$w_buff1~0=~y$w_buff1~0_In1111595850, ~y~0=~y~0_In1111595850, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1111595850, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1111595850} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:32:46,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L785-4-->L786: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-11-28 18:32:46,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-784309596 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-784309596 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out-784309596|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-784309596 |ULTIMATE.start_main_#t~ite19_Out-784309596|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-784309596, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-784309596} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-784309596, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-784309596|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-784309596} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:32:46,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L787-->L787-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In291869625 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In291869625 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In291869625 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In291869625 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out291869625|)) (and (= ~y$w_buff1_used~0_In291869625 |ULTIMATE.start_main_#t~ite20_Out291869625|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In291869625, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In291869625, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In291869625, ~y$w_buff1_used~0=~y$w_buff1_used~0_In291869625} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In291869625, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In291869625, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out291869625|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In291869625, ~y$w_buff1_used~0=~y$w_buff1_used~0_In291869625} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:32:46,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In751410806 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In751410806 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out751410806| ~y$r_buff0_thd0~0_In751410806)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out751410806| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In751410806, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In751410806} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In751410806, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In751410806, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out751410806|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:32:46,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In806292319 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In806292319 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In806292319 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In806292319 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out806292319| ~y$r_buff1_thd0~0_In806292319) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out806292319|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In806292319, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In806292319, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In806292319, ~y$w_buff1_used~0=~y$w_buff1_used~0_In806292319} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In806292319, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In806292319, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In806292319, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out806292319|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In806292319} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:32:46,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L799-->L799-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-591146775 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite34_Out-591146775| |ULTIMATE.start_main_#t~ite35_Out-591146775|) (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-591146775 256) 0))) (or (and (= 0 (mod ~y$r_buff1_thd0~0_In-591146775 256)) .cse0) (and (= 0 (mod ~y$w_buff1_used~0_In-591146775 256)) .cse0) (= 0 (mod ~y$w_buff0_used~0_In-591146775 256)))) .cse1 (= ~y$w_buff0_used~0_In-591146775 |ULTIMATE.start_main_#t~ite34_Out-591146775|)) (and (= |ULTIMATE.start_main_#t~ite34_In-591146775| |ULTIMATE.start_main_#t~ite34_Out-591146775|) (not .cse1) (= ~y$w_buff0_used~0_In-591146775 |ULTIMATE.start_main_#t~ite35_Out-591146775|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-591146775, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-591146775, ~weak$$choice2~0=~weak$$choice2~0_In-591146775, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-591146775, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-591146775, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_In-591146775|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-591146775, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-591146775, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-591146775|, ~weak$$choice2~0=~weak$$choice2~0_In-591146775, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-591146775, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out-591146775|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-591146775} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-11-28 18:32:46,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [597] [597] L801-->L802: Formula: (and (= v_~y$r_buff0_thd0~0_72 v_~y$r_buff0_thd0~0_71) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_72, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:32:46,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L804-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_21) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_10 256)) (not (= 0 (mod v_~y$flush_delayed~0_36 256))) (= 0 v_~y$flush_delayed~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~y~0=v_~y~0_99, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_28|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:32:46,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:32:46,492 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:32:46 BasicIcfg [2019-11-28 18:32:46,492 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:32:46,493 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:32:46,493 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:32:46,493 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:32:46,494 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:32" (3/4) ... [2019-11-28 18:32:46,496 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:32:46,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_40| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= 0 v_~__unbuffered_cnt~0_61) (= v_~weak$$choice2~0_132 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1_used~0_444 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2477~0.base_19|) 0) (= v_~y$r_buff1_thd0~0_304 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2477~0.base_19|) (= v_~main$tmp_guard0~0_23 0) (= v_~y$r_buff0_thd0~0_394 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2477~0.base_19| 1) |v_#valid_38|) (= 0 v_~y$w_buff0~0_376) (= 0 |v_#NULL.base_6|) (= v_~y$r_buff1_thd1~0_220 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2477~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2477~0.base_19|) |v_ULTIMATE.start_main_~#t2477~0.offset_16| 0)) |v_#memory_int_15|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2477~0.base_19| 4)) (= v_~y~0_141 0) (= v_~y$r_buff0_thd1~0_301 0) (= 0 v_~weak$$choice0~0_24) (= 0 v_~y$flush_delayed~0_48) (= 0 v_~y$r_buff0_thd2~0_175) (= v_~y$w_buff1~0_254 0) (= 0 |v_ULTIMATE.start_main_~#t2477~0.offset_16|) (= v_~y$mem_tmp~0_31 0) (= v_~y$w_buff0_used~0_753 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~y$r_buff1_thd2~0_205) (= 0 v_~x~0_168) (< 0 |v_#StackHeapBarrier_13|) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_32|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_32|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_56|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_301, ~y$flush_delayed~0=v_~y$flush_delayed~0_48, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_32|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_~#t2477~0.base=|v_ULTIMATE.start_main_~#t2477~0.base_19|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_35|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_51|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_45|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_24, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t2478~0.base=|v_ULTIMATE.start_main_~#t2478~0.base_19|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_30|, ~y$w_buff1~0=v_~y$w_buff1~0_254, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_175, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_304, ~x~0=v_~x~0_168, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_753, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_28|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_28|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ULTIMATE.start_main_~#t2478~0.offset=|v_ULTIMATE.start_main_~#t2478~0.offset_15|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_220, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_39|, ~y$w_buff0~0=v_~y$w_buff0~0_376, ~y~0=v_~y~0_141, ULTIMATE.start_main_~#t2477~0.offset=|v_ULTIMATE.start_main_~#t2477~0.offset_16|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_30|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_44|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_26|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_37|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_28|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_39|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_15|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_394, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_13|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_444} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_~#t2477~0.base, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_~#t2478~0.base, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2478~0.offset, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_~#t2477~0.offset, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:32:46,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L777-1-->L779: Formula: (and (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2478~0.base_11| 1)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2478~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2478~0.base_11|) |v_ULTIMATE.start_main_~#t2478~0.offset_10| 1))) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2478~0.base_11|)) (not (= 0 |v_ULTIMATE.start_main_~#t2478~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t2478~0.offset_10|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2478~0.base_11|) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2478~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t2478~0.offset=|v_ULTIMATE.start_main_~#t2478~0.offset_10|, ULTIMATE.start_main_~#t2478~0.base=|v_ULTIMATE.start_main_~#t2478~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2478~0.offset, ULTIMATE.start_main_~#t2478~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:32:46,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P0ENTRY-->L4-3: Formula: (and (= 2 v_~y$w_buff0~0_172) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 0)) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_290 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_162 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_~y$w_buff0_used~0_290 1) (= v_P0Thread1of1ForFork0_~arg.offset_77 |v_P0Thread1of1ForFork0_#in~arg.offset_79|) (= v_P0Thread1of1ForFork0_~arg.base_77 |v_P0Thread1of1ForFork0_#in~arg.base_79|) (= v_~y$w_buff0_used~0_291 v_~y$w_buff1_used~0_162) (= v_~y$w_buff1~0_100 v_~y$w_buff0~0_173)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_291, ~y$w_buff0~0=v_~y$w_buff0~0_173, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_290, ~y$w_buff1~0=v_~y$w_buff1~0_100, ~y$w_buff0~0=v_~y$w_buff0~0_172, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_77, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_77, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_162} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:32:46,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-1575932751 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1575932751 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1575932751| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out-1575932751| ~y$w_buff0_used~0_In-1575932751)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1575932751, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1575932751} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1575932751|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1575932751, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1575932751} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:32:46,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L754-2-->L754-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-330043530 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-330043530 256) 0))) (or (and (= ~y~0_In-330043530 |P1Thread1of1ForFork1_#t~ite9_Out-330043530|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In-330043530 |P1Thread1of1ForFork1_#t~ite9_Out-330043530|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-330043530, ~y$w_buff1~0=~y$w_buff1~0_In-330043530, ~y~0=~y~0_In-330043530, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-330043530} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-330043530, ~y$w_buff1~0=~y$w_buff1~0_In-330043530, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-330043530|, ~y~0=~y~0_In-330043530, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-330043530} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-11-28 18:32:46,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [630] [630] L754-4-->L755: Formula: (= v_~y~0_50 |v_P1Thread1of1ForFork1_#t~ite9_12|) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_12|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_11|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_50} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-11-28 18:32:46,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In502986957 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In502986957 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out502986957|)) (and (= ~y$w_buff0_used~0_In502986957 |P1Thread1of1ForFork1_#t~ite11_Out502986957|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In502986957, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In502986957} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In502986957, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In502986957, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out502986957|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:32:46,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In439924727 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In439924727 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In439924727 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In439924727 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out439924727| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite6_Out439924727| ~y$w_buff1_used~0_In439924727) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In439924727, ~y$w_buff0_used~0=~y$w_buff0_used~0_In439924727, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In439924727, ~y$w_buff1_used~0=~y$w_buff1_used~0_In439924727} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out439924727|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In439924727, ~y$w_buff0_used~0=~y$w_buff0_used~0_In439924727, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In439924727, ~y$w_buff1_used~0=~y$w_buff1_used~0_In439924727} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:32:46,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L737-->L738: Formula: (let ((.cse0 (= ~y$r_buff0_thd1~0_In-1937141926 ~y$r_buff0_thd1~0_Out-1937141926)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1937141926 256))) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-1937141926 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (= 0 ~y$r_buff0_thd1~0_Out-1937141926) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1937141926, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1937141926} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1937141926, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1937141926|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-1937141926} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-11-28 18:32:46,501 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L756-->L756-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd2~0_In1278367555 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1278367555 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1278367555 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1278367555 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1278367555|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1278367555 |P1Thread1of1ForFork1_#t~ite12_Out1278367555|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1278367555, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1278367555, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1278367555, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1278367555} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1278367555, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1278367555, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1278367555, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1278367555|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1278367555} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:32:46,501 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In420519582 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In420519582 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out420519582|)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out420519582| ~y$r_buff0_thd2~0_In420519582) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In420519582, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In420519582} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In420519582, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In420519582, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out420519582|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-11-28 18:32:46,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1521563323 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-1521563323 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1521563323 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1521563323 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1521563323 |P1Thread1of1ForFork1_#t~ite14_Out-1521563323|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1521563323| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1521563323, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1521563323, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1521563323, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1521563323} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1521563323, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1521563323, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1521563323, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1521563323|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1521563323} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:32:46,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39) (= |v_P1Thread1of1ForFork1_#t~ite14_32| v_~y$r_buff1_thd2~0_85)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_85, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:32:46,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In470297281 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In470297281 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd1~0_In470297281 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In470297281 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out470297281|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$r_buff1_thd1~0_In470297281 |P0Thread1of1ForFork0_#t~ite8_Out470297281|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In470297281, ~y$w_buff0_used~0=~y$w_buff0_used~0_In470297281, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In470297281, ~y$w_buff1_used~0=~y$w_buff1_used~0_In470297281} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In470297281, ~y$w_buff0_used~0=~y$w_buff0_used~0_In470297281, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out470297281|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In470297281, ~y$w_buff1_used~0=~y$w_buff1_used~0_In470297281} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:32:46,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L738-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-11-28 18:32:46,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [592] [592] L783-->L785-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= (mod v_~y$w_buff0_used~0_159 256) 0) (= (mod v_~y$r_buff0_thd0~0_61 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:32:46,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L785-2-->L785-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In1111595850 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1111595850 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite17_Out1111595850| ~y~0_In1111595850) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite17_Out1111595850| ~y$w_buff1~0_In1111595850) (not .cse0) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1111595850, ~y~0=~y~0_In1111595850, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1111595850, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1111595850} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out1111595850|, ~y$w_buff1~0=~y$w_buff1~0_In1111595850, ~y~0=~y~0_In1111595850, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1111595850, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1111595850} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:32:46,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L785-4-->L786: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-11-28 18:32:46,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-784309596 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-784309596 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out-784309596|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-784309596 |ULTIMATE.start_main_#t~ite19_Out-784309596|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-784309596, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-784309596} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-784309596, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-784309596|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-784309596} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:32:46,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L787-->L787-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In291869625 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In291869625 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In291869625 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In291869625 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out291869625|)) (and (= ~y$w_buff1_used~0_In291869625 |ULTIMATE.start_main_#t~ite20_Out291869625|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In291869625, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In291869625, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In291869625, ~y$w_buff1_used~0=~y$w_buff1_used~0_In291869625} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In291869625, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In291869625, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out291869625|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In291869625, ~y$w_buff1_used~0=~y$w_buff1_used~0_In291869625} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:32:46,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In751410806 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In751410806 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out751410806| ~y$r_buff0_thd0~0_In751410806)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out751410806| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In751410806, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In751410806} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In751410806, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In751410806, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out751410806|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:32:46,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In806292319 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In806292319 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In806292319 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In806292319 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out806292319| ~y$r_buff1_thd0~0_In806292319) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out806292319|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In806292319, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In806292319, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In806292319, ~y$w_buff1_used~0=~y$w_buff1_used~0_In806292319} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In806292319, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In806292319, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In806292319, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out806292319|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In806292319} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:32:46,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L799-->L799-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-591146775 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite34_Out-591146775| |ULTIMATE.start_main_#t~ite35_Out-591146775|) (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-591146775 256) 0))) (or (and (= 0 (mod ~y$r_buff1_thd0~0_In-591146775 256)) .cse0) (and (= 0 (mod ~y$w_buff1_used~0_In-591146775 256)) .cse0) (= 0 (mod ~y$w_buff0_used~0_In-591146775 256)))) .cse1 (= ~y$w_buff0_used~0_In-591146775 |ULTIMATE.start_main_#t~ite34_Out-591146775|)) (and (= |ULTIMATE.start_main_#t~ite34_In-591146775| |ULTIMATE.start_main_#t~ite34_Out-591146775|) (not .cse1) (= ~y$w_buff0_used~0_In-591146775 |ULTIMATE.start_main_#t~ite35_Out-591146775|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-591146775, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-591146775, ~weak$$choice2~0=~weak$$choice2~0_In-591146775, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-591146775, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-591146775, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_In-591146775|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-591146775, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-591146775, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-591146775|, ~weak$$choice2~0=~weak$$choice2~0_In-591146775, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-591146775, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out-591146775|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-591146775} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-11-28 18:32:46,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [597] [597] L801-->L802: Formula: (and (= v_~y$r_buff0_thd0~0_72 v_~y$r_buff0_thd0~0_71) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_72, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-11-28 18:32:46,509 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L804-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_21) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_10 256)) (not (= 0 (mod v_~y$flush_delayed~0_36 256))) (= 0 v_~y$flush_delayed~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~y~0=v_~y~0_99, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_28|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:32:46,509 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:32:46,592 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:32:46,593 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:32:46,594 INFO L168 Benchmark]: Toolchain (without parser) took 15839.48 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 507.0 MB). Free memory was 952.3 MB in the beginning and 1.3 GB in the end (delta: -300.7 MB). Peak memory consumption was 206.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:46,595 INFO L168 Benchmark]: CDTParser took 0.28 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:32:46,595 INFO L168 Benchmark]: CACSL2BoogieTranslator took 732.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 107.5 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -122.0 MB). Peak memory consumption was 26.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:46,596 INFO L168 Benchmark]: Boogie Procedure Inliner took 71.52 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:32:46,596 INFO L168 Benchmark]: Boogie Preprocessor took 38.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:46,597 INFO L168 Benchmark]: RCFGBuilder took 763.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.6 MB). Peak memory consumption was 45.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:46,597 INFO L168 Benchmark]: TraceAbstraction took 14128.24 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 399.5 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -243.9 MB). Peak memory consumption was 155.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:46,598 INFO L168 Benchmark]: Witness Printer took 100.03 ms. Allocated memory is still 1.5 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 12.8 MB). Peak memory consumption was 12.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:46,601 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.28 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 732.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 107.5 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -122.0 MB). Peak memory consumption was 26.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 71.52 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 38.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 763.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.6 MB). Peak memory consumption was 45.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 14128.24 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 399.5 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -243.9 MB). Peak memory consumption was 155.6 MB. Max. memory is 11.5 GB. * Witness Printer took 100.03 ms. Allocated memory is still 1.5 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 12.8 MB). Peak memory consumption was 12.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.7s, 145 ProgramPointsBefore, 78 ProgramPointsAfterwards, 179 TransitionsBefore, 90 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 27 TrivialSequentialCompositions, 38 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 3579 VarBasedMoverChecksPositive, 213 VarBasedMoverChecksNegative, 67 SemBasedMoverChecksPositive, 198 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.5s, 0 MoverChecksTotal, 46212 CheckedPairsTotal, 97 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L777] FCALL, FORK 0 pthread_create(&t2477, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2478, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L725] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L726] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L727] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L728] 1 y$r_buff0_thd1 = (_Bool)1 [L731] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L748] 2 x = 2 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L754] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L736] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L786] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 y$flush_delayed = weak$$choice2 [L795] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L796] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L796] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L797] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L802] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 13.9s, OverallIterations: 15, TraceHistogramMax: 1, AutomataDifference: 3.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1480 SDtfs, 1489 SDslu, 3260 SDs, 0 SdLazy, 1631 SolverSat, 107 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 112 GetRequests, 15 SyntacticMatches, 11 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 162 ImplicationChecksByTransitivity, 1.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=13746occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.1s AutomataMinimizationTime, 14 MinimizatonAttempts, 9366 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 556 NumberOfCodeBlocks, 556 NumberOfCodeBlocksAsserted, 15 NumberOfCheckSat, 488 ConstructedInterpolants, 0 QuantifiedInterpolants, 92702 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 14 InterpolantComputations, 14 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...