./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3915ac96bf19657900740412bd5789f6788284da ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:32:34,136 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:32:34,138 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:32:34,151 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:32:34,151 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:32:34,152 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:32:34,154 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:32:34,156 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:32:34,158 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:32:34,159 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:32:34,160 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:32:34,162 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:32:34,162 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:32:34,163 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:32:34,164 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:32:34,166 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:32:34,167 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:32:34,168 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:32:34,170 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:32:34,172 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:32:34,174 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:32:34,175 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:32:34,176 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:32:34,177 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:32:34,179 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:32:34,180 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:32:34,180 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:32:34,181 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:32:34,182 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:32:34,183 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:32:34,183 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:32:34,184 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:32:34,185 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:32:34,186 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:32:34,187 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:32:34,187 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:32:34,188 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:32:34,188 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:32:34,189 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:32:34,190 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:32:34,191 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:32:34,191 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:32:34,206 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:32:34,207 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:32:34,208 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:32:34,209 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:32:34,209 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:32:34,209 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:32:34,210 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:32:34,210 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:32:34,210 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:32:34,210 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:32:34,211 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:32:34,211 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:32:34,211 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:32:34,211 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:32:34,212 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:32:34,212 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:32:34,212 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:32:34,213 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:32:34,213 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:32:34,213 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:32:34,213 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:32:34,214 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:32:34,214 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:32:34,214 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:32:34,215 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:32:34,215 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:32:34,215 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:32:34,215 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:32:34,216 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:32:34,216 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3915ac96bf19657900740412bd5789f6788284da [2019-11-28 18:32:34,543 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:32:34,556 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:32:34,560 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:32:34,561 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:32:34,562 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:32:34,563 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i [2019-11-28 18:32:34,627 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/08a9b94e5/c79f0c56b470493cae81707e02bb893e/FLAG0963fdeb4 [2019-11-28 18:32:35,211 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:32:35,212 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i [2019-11-28 18:32:35,235 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/08a9b94e5/c79f0c56b470493cae81707e02bb893e/FLAG0963fdeb4 [2019-11-28 18:32:35,456 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/08a9b94e5/c79f0c56b470493cae81707e02bb893e [2019-11-28 18:32:35,460 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:32:35,462 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:32:35,463 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:32:35,463 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:32:35,467 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:32:35,468 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:32:35" (1/1) ... [2019-11-28 18:32:35,471 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2f8bbb41 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:35, skipping insertion in model container [2019-11-28 18:32:35,471 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:32:35" (1/1) ... [2019-11-28 18:32:35,479 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:32:35,542 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:32:36,024 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:32:36,041 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:32:36,129 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:32:36,211 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:32:36,212 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36 WrapperNode [2019-11-28 18:32:36,212 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:32:36,214 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:32:36,214 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:32:36,215 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:32:36,223 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,248 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,287 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:32:36,288 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:32:36,288 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:32:36,288 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:32:36,297 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,297 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,302 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,303 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,312 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,316 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,320 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... [2019-11-28 18:32:36,326 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:32:36,327 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:32:36,327 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:32:36,327 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:32:36,328 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:32:36,396 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:32:36,397 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:32:36,397 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:32:36,397 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:32:36,399 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:32:36,399 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:32:36,400 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:32:36,400 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:32:36,400 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:32:36,401 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:32:36,402 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:32:36,404 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:32:37,111 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:32:37,111 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:32:37,113 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:37 BoogieIcfgContainer [2019-11-28 18:32:37,113 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:32:37,114 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:32:37,114 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:32:37,118 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:32:37,118 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:32:35" (1/3) ... [2019-11-28 18:32:37,119 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6463bb79 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:32:37, skipping insertion in model container [2019-11-28 18:32:37,119 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:36" (2/3) ... [2019-11-28 18:32:37,120 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6463bb79 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:32:37, skipping insertion in model container [2019-11-28 18:32:37,120 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:37" (3/3) ... [2019-11-28 18:32:37,122 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_rmo.opt.i [2019-11-28 18:32:37,133 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:32:37,134 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:32:37,149 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:32:37,150 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:32:37,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,209 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,209 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,209 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,210 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,211 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,211 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,211 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,211 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,212 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,212 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,212 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,212 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,213 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,213 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,213 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,213 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,216 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,216 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,217 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,217 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,217 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,218 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,218 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,218 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:37,249 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-11-28 18:32:37,272 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:32:37,272 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:32:37,272 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:32:37,273 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:32:37,273 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:32:37,273 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:32:37,273 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:32:37,274 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:32:37,291 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 145 places, 179 transitions [2019-11-28 18:32:37,294 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-11-28 18:32:37,380 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-11-28 18:32:37,380 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:32:37,397 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 462 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:32:37,420 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-11-28 18:32:37,509 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-11-28 18:32:37,509 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:32:37,518 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 462 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-11-28 18:32:37,537 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-11-28 18:32:37,538 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:32:41,599 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 67 [2019-11-28 18:32:41,933 WARN L192 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 77 [2019-11-28 18:32:42,035 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 75 [2019-11-28 18:32:42,070 INFO L206 etLargeBlockEncoding]: Checked pairs total: 47380 [2019-11-28 18:32:42,070 INFO L214 etLargeBlockEncoding]: Total number of compositions: 96 [2019-11-28 18:32:42,074 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 90 transitions [2019-11-28 18:32:42,701 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8608 states. [2019-11-28 18:32:42,705 INFO L276 IsEmpty]: Start isEmpty. Operand 8608 states. [2019-11-28 18:32:42,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-11-28 18:32:42,713 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:42,714 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-11-28 18:32:42,714 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:42,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:42,724 INFO L82 PathProgramCache]: Analyzing trace with hash 689103523, now seen corresponding path program 1 times [2019-11-28 18:32:42,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:42,739 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1671070625] [2019-11-28 18:32:42,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:42,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:43,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:43,076 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1671070625] [2019-11-28 18:32:43,077 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:43,078 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:32:43,079 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24232121] [2019-11-28 18:32:43,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:43,086 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:43,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:43,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:43,115 INFO L87 Difference]: Start difference. First operand 8608 states. Second operand 3 states. [2019-11-28 18:32:43,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:43,352 INFO L93 Difference]: Finished difference Result 8560 states and 27962 transitions. [2019-11-28 18:32:43,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:43,354 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-11-28 18:32:43,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:43,462 INFO L225 Difference]: With dead ends: 8560 [2019-11-28 18:32:43,464 INFO L226 Difference]: Without dead ends: 8391 [2019-11-28 18:32:43,465 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:43,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8391 states. [2019-11-28 18:32:43,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8391 to 8391. [2019-11-28 18:32:43,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8391 states. [2019-11-28 18:32:43,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8391 states to 8391 states and 27442 transitions. [2019-11-28 18:32:43,891 INFO L78 Accepts]: Start accepts. Automaton has 8391 states and 27442 transitions. Word has length 5 [2019-11-28 18:32:43,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:43,891 INFO L462 AbstractCegarLoop]: Abstraction has 8391 states and 27442 transitions. [2019-11-28 18:32:43,892 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:43,892 INFO L276 IsEmpty]: Start isEmpty. Operand 8391 states and 27442 transitions. [2019-11-28 18:32:43,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:32:43,895 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:43,895 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:43,895 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:43,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:43,896 INFO L82 PathProgramCache]: Analyzing trace with hash -1296433146, now seen corresponding path program 1 times [2019-11-28 18:32:43,896 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:43,897 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1168349901] [2019-11-28 18:32:43,897 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:43,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:44,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:44,061 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1168349901] [2019-11-28 18:32:44,061 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:44,061 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:44,062 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478436380] [2019-11-28 18:32:44,064 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:32:44,064 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:44,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:32:44,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:32:44,065 INFO L87 Difference]: Start difference. First operand 8391 states and 27442 transitions. Second operand 4 states. [2019-11-28 18:32:44,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:44,527 INFO L93 Difference]: Finished difference Result 13399 states and 41962 transitions. [2019-11-28 18:32:44,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:32:44,528 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:32:44,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:44,610 INFO L225 Difference]: With dead ends: 13399 [2019-11-28 18:32:44,611 INFO L226 Difference]: Without dead ends: 13392 [2019-11-28 18:32:44,612 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:44,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13392 states. [2019-11-28 18:32:45,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13392 to 11787. [2019-11-28 18:32:45,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11787 states. [2019-11-28 18:32:45,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11787 states to 11787 states and 37494 transitions. [2019-11-28 18:32:45,107 INFO L78 Accepts]: Start accepts. Automaton has 11787 states and 37494 transitions. Word has length 11 [2019-11-28 18:32:45,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:45,108 INFO L462 AbstractCegarLoop]: Abstraction has 11787 states and 37494 transitions. [2019-11-28 18:32:45,108 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:32:45,108 INFO L276 IsEmpty]: Start isEmpty. Operand 11787 states and 37494 transitions. [2019-11-28 18:32:45,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-11-28 18:32:45,111 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:45,112 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:45,112 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:45,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:45,113 INFO L82 PathProgramCache]: Analyzing trace with hash 825675890, now seen corresponding path program 1 times [2019-11-28 18:32:45,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:45,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512864990] [2019-11-28 18:32:45,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:45,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:45,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:45,349 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [512864990] [2019-11-28 18:32:45,349 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:45,350 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:45,350 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [408378993] [2019-11-28 18:32:45,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:32:45,351 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:45,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:32:45,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:32:45,351 INFO L87 Difference]: Start difference. First operand 11787 states and 37494 transitions. Second operand 4 states. [2019-11-28 18:32:45,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:45,693 INFO L93 Difference]: Finished difference Result 14846 states and 46774 transitions. [2019-11-28 18:32:45,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:32:45,693 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-11-28 18:32:45,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:45,748 INFO L225 Difference]: With dead ends: 14846 [2019-11-28 18:32:45,749 INFO L226 Difference]: Without dead ends: 14846 [2019-11-28 18:32:45,750 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:45,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14846 states. [2019-11-28 18:32:46,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14846 to 13070. [2019-11-28 18:32:46,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13070 states. [2019-11-28 18:32:46,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13070 states to 13070 states and 41519 transitions. [2019-11-28 18:32:46,219 INFO L78 Accepts]: Start accepts. Automaton has 13070 states and 41519 transitions. Word has length 11 [2019-11-28 18:32:46,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:46,220 INFO L462 AbstractCegarLoop]: Abstraction has 13070 states and 41519 transitions. [2019-11-28 18:32:46,220 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:32:46,220 INFO L276 IsEmpty]: Start isEmpty. Operand 13070 states and 41519 transitions. [2019-11-28 18:32:46,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-28 18:32:46,225 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:46,225 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:46,226 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:46,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:46,226 INFO L82 PathProgramCache]: Analyzing trace with hash 727521173, now seen corresponding path program 1 times [2019-11-28 18:32:46,227 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:46,227 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891012027] [2019-11-28 18:32:46,227 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:46,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:46,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:46,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1891012027] [2019-11-28 18:32:46,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:46,340 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:32:46,344 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809410566] [2019-11-28 18:32:46,344 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:32:46,345 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:46,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:32:46,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:32:46,346 INFO L87 Difference]: Start difference. First operand 13070 states and 41519 transitions. Second operand 4 states. [2019-11-28 18:32:46,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:46,386 INFO L93 Difference]: Finished difference Result 1949 states and 4516 transitions. [2019-11-28 18:32:46,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:32:46,387 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2019-11-28 18:32:46,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:46,393 INFO L225 Difference]: With dead ends: 1949 [2019-11-28 18:32:46,394 INFO L226 Difference]: Without dead ends: 1663 [2019-11-28 18:32:46,394 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:46,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1663 states. [2019-11-28 18:32:46,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1663 to 1663. [2019-11-28 18:32:46,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1663 states. [2019-11-28 18:32:46,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1663 states to 1663 states and 3725 transitions. [2019-11-28 18:32:46,426 INFO L78 Accepts]: Start accepts. Automaton has 1663 states and 3725 transitions. Word has length 17 [2019-11-28 18:32:46,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:46,426 INFO L462 AbstractCegarLoop]: Abstraction has 1663 states and 3725 transitions. [2019-11-28 18:32:46,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:32:46,427 INFO L276 IsEmpty]: Start isEmpty. Operand 1663 states and 3725 transitions. [2019-11-28 18:32:46,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-11-28 18:32:46,428 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:46,428 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:46,429 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:46,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:46,429 INFO L82 PathProgramCache]: Analyzing trace with hash 1402369775, now seen corresponding path program 1 times [2019-11-28 18:32:46,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:46,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402656376] [2019-11-28 18:32:46,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:46,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:46,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:46,557 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1402656376] [2019-11-28 18:32:46,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:46,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:32:46,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479353455] [2019-11-28 18:32:46,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:32:46,558 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:46,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:32:46,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:46,558 INFO L87 Difference]: Start difference. First operand 1663 states and 3725 transitions. Second operand 5 states. [2019-11-28 18:32:46,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:46,870 INFO L93 Difference]: Finished difference Result 2141 states and 4701 transitions. [2019-11-28 18:32:46,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-28 18:32:46,871 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2019-11-28 18:32:46,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:46,878 INFO L225 Difference]: With dead ends: 2141 [2019-11-28 18:32:46,878 INFO L226 Difference]: Without dead ends: 2141 [2019-11-28 18:32:46,879 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:32:46,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2141 states. [2019-11-28 18:32:46,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2141 to 1897. [2019-11-28 18:32:46,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1897 states. [2019-11-28 18:32:46,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1897 states to 1897 states and 4214 transitions. [2019-11-28 18:32:46,916 INFO L78 Accepts]: Start accepts. Automaton has 1897 states and 4214 transitions. Word has length 23 [2019-11-28 18:32:46,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:46,916 INFO L462 AbstractCegarLoop]: Abstraction has 1897 states and 4214 transitions. [2019-11-28 18:32:46,917 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:32:46,917 INFO L276 IsEmpty]: Start isEmpty. Operand 1897 states and 4214 transitions. [2019-11-28 18:32:46,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:32:46,921 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:46,921 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:46,921 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:46,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:46,922 INFO L82 PathProgramCache]: Analyzing trace with hash 356058779, now seen corresponding path program 1 times [2019-11-28 18:32:46,922 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:46,923 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045843839] [2019-11-28 18:32:46,923 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:46,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:47,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:47,013 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2045843839] [2019-11-28 18:32:47,013 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:47,013 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:32:47,013 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942187145] [2019-11-28 18:32:47,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:47,014 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:47,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:47,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:47,014 INFO L87 Difference]: Start difference. First operand 1897 states and 4214 transitions. Second operand 3 states. [2019-11-28 18:32:47,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:47,073 INFO L93 Difference]: Finished difference Result 2231 states and 4886 transitions. [2019-11-28 18:32:47,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:47,074 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 37 [2019-11-28 18:32:47,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:47,081 INFO L225 Difference]: With dead ends: 2231 [2019-11-28 18:32:47,081 INFO L226 Difference]: Without dead ends: 2231 [2019-11-28 18:32:47,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:47,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2231 states. [2019-11-28 18:32:47,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2231 to 2024. [2019-11-28 18:32:47,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2024 states. [2019-11-28 18:32:47,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2024 states to 2024 states and 4476 transitions. [2019-11-28 18:32:47,118 INFO L78 Accepts]: Start accepts. Automaton has 2024 states and 4476 transitions. Word has length 37 [2019-11-28 18:32:47,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:47,119 INFO L462 AbstractCegarLoop]: Abstraction has 2024 states and 4476 transitions. [2019-11-28 18:32:47,119 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:47,119 INFO L276 IsEmpty]: Start isEmpty. Operand 2024 states and 4476 transitions. [2019-11-28 18:32:47,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-28 18:32:47,123 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:47,123 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:47,123 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:47,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:47,124 INFO L82 PathProgramCache]: Analyzing trace with hash 355873678, now seen corresponding path program 1 times [2019-11-28 18:32:47,124 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:47,124 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1657429011] [2019-11-28 18:32:47,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:47,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:47,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:47,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1657429011] [2019-11-28 18:32:47,207 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:47,207 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:32:47,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789887647] [2019-11-28 18:32:47,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:32:47,208 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:47,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:32:47,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:47,209 INFO L87 Difference]: Start difference. First operand 2024 states and 4476 transitions. Second operand 5 states. [2019-11-28 18:32:47,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:47,249 INFO L93 Difference]: Finished difference Result 426 states and 776 transitions. [2019-11-28 18:32:47,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:32:47,250 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-11-28 18:32:47,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:47,251 INFO L225 Difference]: With dead ends: 426 [2019-11-28 18:32:47,252 INFO L226 Difference]: Without dead ends: 380 [2019-11-28 18:32:47,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:32:47,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states. [2019-11-28 18:32:47,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 345. [2019-11-28 18:32:47,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-11-28 18:32:47,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 621 transitions. [2019-11-28 18:32:47,258 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 621 transitions. Word has length 37 [2019-11-28 18:32:47,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:47,259 INFO L462 AbstractCegarLoop]: Abstraction has 345 states and 621 transitions. [2019-11-28 18:32:47,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:32:47,259 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 621 transitions. [2019-11-28 18:32:47,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:32:47,261 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:47,261 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:47,262 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:47,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:47,262 INFO L82 PathProgramCache]: Analyzing trace with hash -1678296005, now seen corresponding path program 1 times [2019-11-28 18:32:47,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:47,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47731905] [2019-11-28 18:32:47,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:47,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:47,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:47,363 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47731905] [2019-11-28 18:32:47,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:47,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:32:47,364 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043241493] [2019-11-28 18:32:47,365 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:32:47,365 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:47,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:32:47,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:47,366 INFO L87 Difference]: Start difference. First operand 345 states and 621 transitions. Second operand 5 states. [2019-11-28 18:32:47,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:47,564 INFO L93 Difference]: Finished difference Result 476 states and 857 transitions. [2019-11-28 18:32:47,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:32:47,564 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-28 18:32:47,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:47,565 INFO L225 Difference]: With dead ends: 476 [2019-11-28 18:32:47,566 INFO L226 Difference]: Without dead ends: 476 [2019-11-28 18:32:47,566 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:32:47,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 476 states. [2019-11-28 18:32:47,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 476 to 435. [2019-11-28 18:32:47,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 435 states. [2019-11-28 18:32:47,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 785 transitions. [2019-11-28 18:32:47,574 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 785 transitions. Word has length 52 [2019-11-28 18:32:47,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:47,576 INFO L462 AbstractCegarLoop]: Abstraction has 435 states and 785 transitions. [2019-11-28 18:32:47,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:32:47,576 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 785 transitions. [2019-11-28 18:32:47,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:32:47,577 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:47,578 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:47,578 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:47,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:47,578 INFO L82 PathProgramCache]: Analyzing trace with hash -856791897, now seen corresponding path program 2 times [2019-11-28 18:32:47,579 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:47,579 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570250321] [2019-11-28 18:32:47,579 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:47,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:47,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:47,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570250321] [2019-11-28 18:32:47,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:47,679 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:32:47,680 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [978960424] [2019-11-28 18:32:47,680 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:32:47,680 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:47,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:32:47,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:32:47,681 INFO L87 Difference]: Start difference. First operand 435 states and 785 transitions. Second operand 6 states. [2019-11-28 18:32:48,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:48,065 INFO L93 Difference]: Finished difference Result 661 states and 1197 transitions. [2019-11-28 18:32:48,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:32:48,065 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:32:48,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:48,067 INFO L225 Difference]: With dead ends: 661 [2019-11-28 18:32:48,067 INFO L226 Difference]: Without dead ends: 661 [2019-11-28 18:32:48,068 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:32:48,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 661 states. [2019-11-28 18:32:48,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 661 to 480. [2019-11-28 18:32:48,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 480 states. [2019-11-28 18:32:48,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 480 states to 480 states and 875 transitions. [2019-11-28 18:32:48,076 INFO L78 Accepts]: Start accepts. Automaton has 480 states and 875 transitions. Word has length 52 [2019-11-28 18:32:48,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:48,077 INFO L462 AbstractCegarLoop]: Abstraction has 480 states and 875 transitions. [2019-11-28 18:32:48,077 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:32:48,077 INFO L276 IsEmpty]: Start isEmpty. Operand 480 states and 875 transitions. [2019-11-28 18:32:48,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:32:48,078 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:48,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:48,079 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:48,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:48,080 INFO L82 PathProgramCache]: Analyzing trace with hash 1692114105, now seen corresponding path program 3 times [2019-11-28 18:32:48,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:48,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [847016780] [2019-11-28 18:32:48,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:48,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:48,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:48,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [847016780] [2019-11-28 18:32:48,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:48,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:32:48,182 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1286392232] [2019-11-28 18:32:48,182 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:32:48,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:48,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:32:48,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:32:48,183 INFO L87 Difference]: Start difference. First operand 480 states and 875 transitions. Second operand 6 states. [2019-11-28 18:32:48,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:48,522 INFO L93 Difference]: Finished difference Result 682 states and 1232 transitions. [2019-11-28 18:32:48,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-28 18:32:48,522 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-28 18:32:48,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:48,524 INFO L225 Difference]: With dead ends: 682 [2019-11-28 18:32:48,525 INFO L226 Difference]: Without dead ends: 682 [2019-11-28 18:32:48,525 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:32:48,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 682 states. [2019-11-28 18:32:48,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 682 to 514. [2019-11-28 18:32:48,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 514 states. [2019-11-28 18:32:48,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 514 states to 514 states and 938 transitions. [2019-11-28 18:32:48,534 INFO L78 Accepts]: Start accepts. Automaton has 514 states and 938 transitions. Word has length 52 [2019-11-28 18:32:48,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:48,534 INFO L462 AbstractCegarLoop]: Abstraction has 514 states and 938 transitions. [2019-11-28 18:32:48,534 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:32:48,535 INFO L276 IsEmpty]: Start isEmpty. Operand 514 states and 938 transitions. [2019-11-28 18:32:48,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-28 18:32:48,536 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:48,536 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:48,536 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:48,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:48,537 INFO L82 PathProgramCache]: Analyzing trace with hash -1537444781, now seen corresponding path program 4 times [2019-11-28 18:32:48,537 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:48,537 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774129468] [2019-11-28 18:32:48,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:48,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:48,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:48,662 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774129468] [2019-11-28 18:32:48,662 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:48,663 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-28 18:32:48,663 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1144339975] [2019-11-28 18:32:48,664 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:32:48,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:48,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:32:48,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:32:48,665 INFO L87 Difference]: Start difference. First operand 514 states and 938 transitions. Second operand 7 states. [2019-11-28 18:32:49,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:49,071 INFO L93 Difference]: Finished difference Result 770 states and 1392 transitions. [2019-11-28 18:32:49,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:32:49,072 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-28 18:32:49,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:49,073 INFO L225 Difference]: With dead ends: 770 [2019-11-28 18:32:49,073 INFO L226 Difference]: Without dead ends: 770 [2019-11-28 18:32:49,074 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:32:49,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 770 states. [2019-11-28 18:32:49,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 770 to 500. [2019-11-28 18:32:49,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 500 states. [2019-11-28 18:32:49,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 500 states to 500 states and 912 transitions. [2019-11-28 18:32:49,084 INFO L78 Accepts]: Start accepts. Automaton has 500 states and 912 transitions. Word has length 52 [2019-11-28 18:32:49,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:49,084 INFO L462 AbstractCegarLoop]: Abstraction has 500 states and 912 transitions. [2019-11-28 18:32:49,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:32:49,085 INFO L276 IsEmpty]: Start isEmpty. Operand 500 states and 912 transitions. [2019-11-28 18:32:49,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:32:49,088 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:49,088 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:49,088 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:49,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:49,089 INFO L82 PathProgramCache]: Analyzing trace with hash 1548250017, now seen corresponding path program 1 times [2019-11-28 18:32:49,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:49,089 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094868124] [2019-11-28 18:32:49,089 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:49,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:49,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:49,192 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094868124] [2019-11-28 18:32:49,193 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:49,193 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:49,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [701257028] [2019-11-28 18:32:49,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:49,193 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:49,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:49,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:49,196 INFO L87 Difference]: Start difference. First operand 500 states and 912 transitions. Second operand 3 states. [2019-11-28 18:32:49,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:49,260 INFO L93 Difference]: Finished difference Result 499 states and 910 transitions. [2019-11-28 18:32:49,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:49,260 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:32:49,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:49,262 INFO L225 Difference]: With dead ends: 499 [2019-11-28 18:32:49,262 INFO L226 Difference]: Without dead ends: 499 [2019-11-28 18:32:49,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:49,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2019-11-28 18:32:49,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 366. [2019-11-28 18:32:49,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366 states. [2019-11-28 18:32:49,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 666 transitions. [2019-11-28 18:32:49,269 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 666 transitions. Word has length 53 [2019-11-28 18:32:49,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:49,269 INFO L462 AbstractCegarLoop]: Abstraction has 366 states and 666 transitions. [2019-11-28 18:32:49,269 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:49,270 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 666 transitions. [2019-11-28 18:32:49,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-28 18:32:49,271 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:49,271 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:49,271 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:49,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:49,272 INFO L82 PathProgramCache]: Analyzing trace with hash 768058421, now seen corresponding path program 1 times [2019-11-28 18:32:49,272 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:49,272 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619479873] [2019-11-28 18:32:49,272 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:49,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:49,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:49,329 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619479873] [2019-11-28 18:32:49,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:49,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:49,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568613989] [2019-11-28 18:32:49,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:49,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:49,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:49,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:49,330 INFO L87 Difference]: Start difference. First operand 366 states and 666 transitions. Second operand 3 states. [2019-11-28 18:32:49,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:49,349 INFO L93 Difference]: Finished difference Result 360 states and 636 transitions. [2019-11-28 18:32:49,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:49,349 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-28 18:32:49,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:49,350 INFO L225 Difference]: With dead ends: 360 [2019-11-28 18:32:49,350 INFO L226 Difference]: Without dead ends: 360 [2019-11-28 18:32:49,350 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:49,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 360 states. [2019-11-28 18:32:49,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 360 to 344. [2019-11-28 18:32:49,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344 states. [2019-11-28 18:32:49,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 606 transitions. [2019-11-28 18:32:49,357 INFO L78 Accepts]: Start accepts. Automaton has 344 states and 606 transitions. Word has length 53 [2019-11-28 18:32:49,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:49,357 INFO L462 AbstractCegarLoop]: Abstraction has 344 states and 606 transitions. [2019-11-28 18:32:49,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:49,358 INFO L276 IsEmpty]: Start isEmpty. Operand 344 states and 606 transitions. [2019-11-28 18:32:49,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:32:49,359 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:49,359 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:49,360 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:49,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:49,360 INFO L82 PathProgramCache]: Analyzing trace with hash 1826767497, now seen corresponding path program 1 times [2019-11-28 18:32:49,360 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:49,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479478186] [2019-11-28 18:32:49,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:49,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:49,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:49,468 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479478186] [2019-11-28 18:32:49,468 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:49,468 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:32:49,468 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [792330747] [2019-11-28 18:32:49,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:32:49,469 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:49,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:32:49,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:49,469 INFO L87 Difference]: Start difference. First operand 344 states and 606 transitions. Second operand 5 states. [2019-11-28 18:32:49,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:49,515 INFO L93 Difference]: Finished difference Result 534 states and 940 transitions. [2019-11-28 18:32:49,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:32:49,516 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-11-28 18:32:49,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:49,517 INFO L225 Difference]: With dead ends: 534 [2019-11-28 18:32:49,517 INFO L226 Difference]: Without dead ends: 209 [2019-11-28 18:32:49,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:32:49,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2019-11-28 18:32:49,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2019-11-28 18:32:49,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-11-28 18:32:49,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 365 transitions. [2019-11-28 18:32:49,522 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 365 transitions. Word has length 54 [2019-11-28 18:32:49,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:49,522 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 365 transitions. [2019-11-28 18:32:49,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:32:49,523 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 365 transitions. [2019-11-28 18:32:49,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:32:49,524 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:49,524 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:49,524 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:49,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:49,524 INFO L82 PathProgramCache]: Analyzing trace with hash 584180705, now seen corresponding path program 2 times [2019-11-28 18:32:49,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:49,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1794158104] [2019-11-28 18:32:49,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:49,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:49,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:49,760 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1794158104] [2019-11-28 18:32:49,760 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:49,760 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:32:49,761 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782622179] [2019-11-28 18:32:49,762 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:32:49,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:49,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:32:49,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:32:49,763 INFO L87 Difference]: Start difference. First operand 209 states and 365 transitions. Second operand 13 states. [2019-11-28 18:32:50,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:50,155 INFO L93 Difference]: Finished difference Result 359 states and 610 transitions. [2019-11-28 18:32:50,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-28 18:32:50,155 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-11-28 18:32:50,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:50,157 INFO L225 Difference]: With dead ends: 359 [2019-11-28 18:32:50,157 INFO L226 Difference]: Without dead ends: 327 [2019-11-28 18:32:50,158 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=372, Unknown=0, NotChecked=0, Total=462 [2019-11-28 18:32:50,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2019-11-28 18:32:50,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 317. [2019-11-28 18:32:50,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-11-28 18:32:50,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 550 transitions. [2019-11-28 18:32:50,163 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 550 transitions. Word has length 54 [2019-11-28 18:32:50,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:50,164 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 550 transitions. [2019-11-28 18:32:50,164 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:32:50,164 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 550 transitions. [2019-11-28 18:32:50,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:32:50,165 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:50,166 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:50,166 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:50,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:50,166 INFO L82 PathProgramCache]: Analyzing trace with hash -695821945, now seen corresponding path program 3 times [2019-11-28 18:32:50,167 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:50,167 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654199797] [2019-11-28 18:32:50,167 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:50,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:32:50,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:32:50,268 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:32:50,269 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:32:50,273 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~x$w_buff1_used~0_344) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2483~0.base_19| 4)) (= v_~x$r_buff0_thd0~0_298 0) (= v_~x$r_buff0_thd1~0_128 0) (= 0 v_~weak$$choice0~0_26) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t2483~0.base_19| 1)) (= 0 |v_ULTIMATE.start_main_~#t2483~0.offset_16|) (= v_~x$r_buff1_thd2~0_87 0) (= v_~x$flush_delayed~0_47 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2483~0.base_19|)) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_200) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2483~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2483~0.base_19|) |v_ULTIMATE.start_main_~#t2483~0.offset_16| 0)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2483~0.base_19|) (= v_~x$r_buff1_thd0~0_184 0) (= v_~y~0_77 0) (= 0 v_~x$w_buff0_used~0_631) (= v_~x$mem_tmp~0_31 0) (= 0 v_~x$read_delayed~0_7) (= v_~main$tmp_guard1~0_19 0) (= |v_#NULL.offset_5| 0) (= 0 v_~x$r_buff0_thd2~0_137) (= 0 v_~x~0_143) (= v_~weak$$choice2~0_101 0) (= v_~x$r_buff1_thd1~0_135 0) (= 0 v_~__unbuffered_cnt~0_59) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_24 0) (= 0 |v_#NULL.base_5|) (= 0 v_~x$w_buff0~0_255) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_255, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~x$flush_delayed~0=v_~x$flush_delayed~0_47, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_27|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_31|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_57|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t2484~0.offset=|v_ULTIMATE.start_main_~#t2484~0.offset_16|, #length=|v_#length_19|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_298, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_25|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_45|, ~x$w_buff1~0=v_~x$w_buff1~0_200, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_25|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_344, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_87, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_38|, ULTIMATE.start_main_~#t2483~0.base=|v_ULTIMATE.start_main_~#t2483~0.base_19|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_26, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ULTIMATE.start_main_~#t2484~0.base=|v_ULTIMATE.start_main_~#t2484~0.base_20|, ULTIMATE.start_main_~#t2483~0.offset=|v_ULTIMATE.start_main_~#t2483~0.offset_16|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, ~x~0=v_~x~0_143, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_128, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_23|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_38|, ~x$mem_tmp~0=v_~x$mem_tmp~0_31, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_27|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_39|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_21|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_40|, ~y~0=v_~y~0_77, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_45|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_25|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_184, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_137, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_27|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_30|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_631, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_25|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~weak$$choice2~0=v_~weak$$choice2~0_101, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2484~0.offset, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t2483~0.base, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2484~0.base, ULTIMATE.start_main_~#t2483~0.offset, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:32:50,274 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L777-1-->L779: Formula: (and (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t2484~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t2484~0.offset_9|) (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2484~0.base_10| 1)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t2484~0.base_10|) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2484~0.base_10|)) (not (= 0 |v_ULTIMATE.start_main_~#t2484~0.base_10|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2484~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2484~0.base_10|) |v_ULTIMATE.start_main_~#t2484~0.offset_9| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, ULTIMATE.start_main_~#t2484~0.base=|v_ULTIMATE.start_main_~#t2484~0.base_10|, ULTIMATE.start_main_~#t2484~0.offset=|v_ULTIMATE.start_main_~#t2484~0.offset_9|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2484~0.base, ULTIMATE.start_main_~#t2484~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:32:50,275 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L4-3: Formula: (and (= P1Thread1of1ForFork1_~arg.offset_Out-2103973097 |P1Thread1of1ForFork1_#in~arg.offset_In-2103973097|) (= |P1Thread1of1ForFork1_#in~arg.base_In-2103973097| P1Thread1of1ForFork1_~arg.base_Out-2103973097) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2103973097 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2103973097|) (= ~x$w_buff0~0_Out-2103973097 2) (= (ite (not (and (not (= 0 (mod ~x$w_buff1_used~0_Out-2103973097 256))) (not (= (mod ~x$w_buff0_used~0_Out-2103973097 256) 0)))) 1 0) |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2103973097|) (= ~x$w_buff1~0_Out-2103973097 ~x$w_buff0~0_In-2103973097) (= 1 ~x$w_buff0_used~0_Out-2103973097) (not (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2103973097 0)) (= ~x$w_buff0_used~0_In-2103973097 ~x$w_buff1_used~0_Out-2103973097)) InVars {~x$w_buff0~0=~x$w_buff0~0_In-2103973097, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-2103973097|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-2103973097|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2103973097} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2103973097, ~x$w_buff0~0=~x$w_buff0~0_Out-2103973097, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out-2103973097, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2103973097|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out-2103973097, ~x$w_buff1~0=~x$w_buff1~0_Out-2103973097, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-2103973097|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-2103973097|, ~x$w_buff1_used~0=~x$w_buff1_used~0_Out-2103973097, ~x$w_buff0_used~0=~x$w_buff0_used~0_Out-2103973097} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:32:50,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L726-2-->L726-5: Formula: (let ((.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out-411514620| |P0Thread1of1ForFork0_#t~ite3_Out-411514620|)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-411514620 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-411514620 256)))) (or (and .cse0 (or .cse1 .cse2) (= ~x~0_In-411514620 |P0Thread1of1ForFork0_#t~ite3_Out-411514620|)) (and .cse0 (not .cse2) (not .cse1) (= ~x$w_buff1~0_In-411514620 |P0Thread1of1ForFork0_#t~ite3_Out-411514620|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-411514620, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-411514620, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-411514620, ~x~0=~x~0_In-411514620} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-411514620|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-411514620|, ~x$w_buff1~0=~x$w_buff1~0_In-411514620, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-411514620, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-411514620, ~x~0=~x~0_In-411514620} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:32:50,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In574469751 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In574469751 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out574469751| 0)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out574469751| ~x$w_buff0_used~0_In574469751) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In574469751, ~x$w_buff0_used~0=~x$w_buff0_used~0_In574469751} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out574469751|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In574469751, ~x$w_buff0_used~0=~x$w_buff0_used~0_In574469751} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:32:50,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L727-->L727-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In2103960474 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In2103960474 256) 0))) (or (and (= ~x$w_buff0_used~0_In2103960474 |P0Thread1of1ForFork0_#t~ite5_Out2103960474|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2103960474|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2103960474, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2103960474} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2103960474|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2103960474, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2103960474} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:32:50,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L728-->L728-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In1102403073 256))) (.cse0 (= (mod ~x$r_buff1_thd1~0_In1102403073 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd1~0_In1102403073 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In1102403073 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1102403073|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~x$w_buff1_used~0_In1102403073 |P0Thread1of1ForFork0_#t~ite6_Out1102403073|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1102403073, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1102403073, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1102403073, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1102403073} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1102403073|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1102403073, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1102403073, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1102403073, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1102403073} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:32:50,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L729-->L729-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-1042940166 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1042940166 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out-1042940166| ~x$r_buff0_thd1~0_In-1042940166) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out-1042940166| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1042940166, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1042940166} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1042940166, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1042940166|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1042940166} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:32:50,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L730-->L730-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd1~0_In1508006394 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1508006394 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1508006394 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In1508006394 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out1508006394| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1508006394| ~x$r_buff1_thd1~0_In1508006394)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1508006394, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1508006394, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1508006394, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1508006394} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1508006394, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1508006394|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1508006394, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1508006394, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1508006394} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:32:50,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L730-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_43 1) v_~__unbuffered_cnt~0_42) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd1~0_79 |v_P0Thread1of1ForFork0_#t~ite8_34|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_79} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:32:50,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L756-->L756-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1018606122 256))) (.cse3 (= (mod ~x$r_buff1_thd2~0_In-1018606122 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1018606122 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-1018606122 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1018606122 |P1Thread1of1ForFork1_#t~ite12_Out-1018606122|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1018606122|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1018606122, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1018606122, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1018606122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1018606122} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1018606122, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1018606122, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1018606122|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1018606122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1018606122} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:32:50,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L757-->L758: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out-1884324660 ~x$r_buff0_thd2~0_In-1884324660)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-1884324660 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1884324660 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= ~x$r_buff0_thd2~0_Out-1884324660 0) (not .cse2) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1884324660, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1884324660} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1884324660|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1884324660, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1884324660} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:32:50,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L758-->L758-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd2~0_In1391005594 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In1391005594 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In1391005594 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1391005594 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out1391005594| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite14_Out1391005594| ~x$r_buff1_thd2~0_In1391005594)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1391005594, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1391005594, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1391005594, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1391005594} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1391005594, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1391005594, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1391005594, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1391005594|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1391005594} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:32:50,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L758-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_45 |v_P1Thread1of1ForFork1_#t~ite14_28|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_45, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:32:50,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [585] [585] L783-->L785-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_91 256) 0) (= (mod v_~x$r_buff0_thd0~0_49 256) 0)) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:32:50,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L785-2-->L785-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-368636298 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-368636298 256)))) (or (and (= ~x~0_In-368636298 |ULTIMATE.start_main_#t~ite17_Out-368636298|) (or .cse0 .cse1)) (and (not .cse1) (= ~x$w_buff1~0_In-368636298 |ULTIMATE.start_main_#t~ite17_Out-368636298|) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-368636298, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-368636298, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-368636298, ~x~0=~x~0_In-368636298} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-368636298|, ~x$w_buff1~0=~x$w_buff1~0_In-368636298, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-368636298, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-368636298, ~x~0=~x~0_In-368636298} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:32:50,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [609] [609] L785-4-->L786: Formula: (= v_~x~0_39 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-11-28 18:32:50,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L786-->L786-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In2132823169 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In2132823169 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out2132823169|) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In2132823169 |ULTIMATE.start_main_#t~ite19_Out2132823169|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2132823169, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2132823169} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2132823169, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out2132823169|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2132823169} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:32:50,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-->L787-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1946982996 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1946982996 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1946982996 256))) (.cse3 (= (mod ~x$r_buff0_thd0~0_In-1946982996 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In-1946982996 |ULTIMATE.start_main_#t~ite20_Out-1946982996|)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-1946982996|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1946982996, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1946982996, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1946982996, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1946982996} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1946982996, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1946982996, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1946982996|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1946982996, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1946982996} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:32:50,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1293562792 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1293562792 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-1293562792| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite21_Out-1293562792| ~x$r_buff0_thd0~0_In-1293562792)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1293562792, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1293562792} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1293562792, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1293562792|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1293562792} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:32:50,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L789-->L789-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In1665529271 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1665529271 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1665529271 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1665529271 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out1665529271| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite22_Out1665529271| ~x$r_buff1_thd0~0_In1665529271) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1665529271, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1665529271, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1665529271, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1665529271} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1665529271, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1665529271, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1665529271, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1665529271|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1665529271} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:32:50,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1005217856 256)))) (or (and (= |ULTIMATE.start_main_#t~ite37_In1005217856| |ULTIMATE.start_main_#t~ite37_Out1005217856|) (= |ULTIMATE.start_main_#t~ite38_Out1005217856| ~x$w_buff1_used~0_In1005217856) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite38_Out1005217856| |ULTIMATE.start_main_#t~ite37_Out1005217856|) (= ~x$w_buff1_used~0_In1005217856 |ULTIMATE.start_main_#t~ite37_Out1005217856|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1005217856 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In1005217856 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd0~0_In1005217856 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In1005217856 256)))) .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1005217856, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1005217856, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In1005217856|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1005217856, ~weak$$choice2~0=~weak$$choice2~0_In1005217856, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1005217856} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1005217856, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1005217856, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1005217856|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out1005217856|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1005217856, ~weak$$choice2~0=~weak$$choice2~0_In1005217856, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1005217856} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-11-28 18:32:50,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [590] [590] L801-->L802: Formula: (and (= v_~x$r_buff0_thd0~0_57 v_~x$r_buff0_thd0~0_56) (not (= (mod v_~weak$$choice2~0_21 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_57, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_56, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:32:50,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L804-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_10 256)) (= v_~x~0_75 v_~x$mem_tmp~0_14) (= v_~x$flush_delayed~0_25 0) (not (= (mod v_~x$flush_delayed~0_26 256) 0))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_75, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:32:50,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:32:50,381 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:32:50 BasicIcfg [2019-11-28 18:32:50,382 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:32:50,383 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:32:50,383 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:32:50,383 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:32:50,384 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:37" (3/4) ... [2019-11-28 18:32:50,386 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:32:50,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~x$w_buff1_used~0_344) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2483~0.base_19| 4)) (= v_~x$r_buff0_thd0~0_298 0) (= v_~x$r_buff0_thd1~0_128 0) (= 0 v_~weak$$choice0~0_26) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t2483~0.base_19| 1)) (= 0 |v_ULTIMATE.start_main_~#t2483~0.offset_16|) (= v_~x$r_buff1_thd2~0_87 0) (= v_~x$flush_delayed~0_47 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2483~0.base_19|)) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_200) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2483~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2483~0.base_19|) |v_ULTIMATE.start_main_~#t2483~0.offset_16| 0)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2483~0.base_19|) (= v_~x$r_buff1_thd0~0_184 0) (= v_~y~0_77 0) (= 0 v_~x$w_buff0_used~0_631) (= v_~x$mem_tmp~0_31 0) (= 0 v_~x$read_delayed~0_7) (= v_~main$tmp_guard1~0_19 0) (= |v_#NULL.offset_5| 0) (= 0 v_~x$r_buff0_thd2~0_137) (= 0 v_~x~0_143) (= v_~weak$$choice2~0_101 0) (= v_~x$r_buff1_thd1~0_135 0) (= 0 v_~__unbuffered_cnt~0_59) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_24 0) (= 0 |v_#NULL.base_5|) (= 0 v_~x$w_buff0~0_255) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_255, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~x$flush_delayed~0=v_~x$flush_delayed~0_47, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_27|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_31|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_57|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t2484~0.offset=|v_ULTIMATE.start_main_~#t2484~0.offset_16|, #length=|v_#length_19|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_298, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_25|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_45|, ~x$w_buff1~0=v_~x$w_buff1~0_200, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_25|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_344, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_87, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_38|, ULTIMATE.start_main_~#t2483~0.base=|v_ULTIMATE.start_main_~#t2483~0.base_19|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_26, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ULTIMATE.start_main_~#t2484~0.base=|v_ULTIMATE.start_main_~#t2484~0.base_20|, ULTIMATE.start_main_~#t2483~0.offset=|v_ULTIMATE.start_main_~#t2483~0.offset_16|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, ~x~0=v_~x~0_143, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_128, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_23|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_38|, ~x$mem_tmp~0=v_~x$mem_tmp~0_31, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_27|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_39|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_21|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_40|, ~y~0=v_~y~0_77, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_45|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_25|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_184, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_137, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_27|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_30|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_631, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_25|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~weak$$choice2~0=v_~weak$$choice2~0_101, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2484~0.offset, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t2483~0.base, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2484~0.base, ULTIMATE.start_main_~#t2483~0.offset, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-11-28 18:32:50,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L777-1-->L779: Formula: (and (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t2484~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t2484~0.offset_9|) (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2484~0.base_10| 1)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t2484~0.base_10|) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2484~0.base_10|)) (not (= 0 |v_ULTIMATE.start_main_~#t2484~0.base_10|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2484~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2484~0.base_10|) |v_ULTIMATE.start_main_~#t2484~0.offset_9| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, ULTIMATE.start_main_~#t2484~0.base=|v_ULTIMATE.start_main_~#t2484~0.base_10|, ULTIMATE.start_main_~#t2484~0.offset=|v_ULTIMATE.start_main_~#t2484~0.offset_9|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2484~0.base, ULTIMATE.start_main_~#t2484~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:32:50,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L4-3: Formula: (and (= P1Thread1of1ForFork1_~arg.offset_Out-2103973097 |P1Thread1of1ForFork1_#in~arg.offset_In-2103973097|) (= |P1Thread1of1ForFork1_#in~arg.base_In-2103973097| P1Thread1of1ForFork1_~arg.base_Out-2103973097) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2103973097 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2103973097|) (= ~x$w_buff0~0_Out-2103973097 2) (= (ite (not (and (not (= 0 (mod ~x$w_buff1_used~0_Out-2103973097 256))) (not (= (mod ~x$w_buff0_used~0_Out-2103973097 256) 0)))) 1 0) |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2103973097|) (= ~x$w_buff1~0_Out-2103973097 ~x$w_buff0~0_In-2103973097) (= 1 ~x$w_buff0_used~0_Out-2103973097) (not (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2103973097 0)) (= ~x$w_buff0_used~0_In-2103973097 ~x$w_buff1_used~0_Out-2103973097)) InVars {~x$w_buff0~0=~x$w_buff0~0_In-2103973097, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-2103973097|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-2103973097|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2103973097} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2103973097, ~x$w_buff0~0=~x$w_buff0~0_Out-2103973097, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out-2103973097, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2103973097|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out-2103973097, ~x$w_buff1~0=~x$w_buff1~0_Out-2103973097, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-2103973097|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-2103973097|, ~x$w_buff1_used~0=~x$w_buff1_used~0_Out-2103973097, ~x$w_buff0_used~0=~x$w_buff0_used~0_Out-2103973097} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-11-28 18:32:50,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L726-2-->L726-5: Formula: (let ((.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out-411514620| |P0Thread1of1ForFork0_#t~ite3_Out-411514620|)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-411514620 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-411514620 256)))) (or (and .cse0 (or .cse1 .cse2) (= ~x~0_In-411514620 |P0Thread1of1ForFork0_#t~ite3_Out-411514620|)) (and .cse0 (not .cse2) (not .cse1) (= ~x$w_buff1~0_In-411514620 |P0Thread1of1ForFork0_#t~ite3_Out-411514620|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-411514620, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-411514620, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-411514620, ~x~0=~x~0_In-411514620} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-411514620|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-411514620|, ~x$w_buff1~0=~x$w_buff1~0_In-411514620, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-411514620, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-411514620, ~x~0=~x~0_In-411514620} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-11-28 18:32:50,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In574469751 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In574469751 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out574469751| 0)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out574469751| ~x$w_buff0_used~0_In574469751) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In574469751, ~x$w_buff0_used~0=~x$w_buff0_used~0_In574469751} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out574469751|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In574469751, ~x$w_buff0_used~0=~x$w_buff0_used~0_In574469751} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-11-28 18:32:50,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L727-->L727-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In2103960474 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In2103960474 256) 0))) (or (and (= ~x$w_buff0_used~0_In2103960474 |P0Thread1of1ForFork0_#t~ite5_Out2103960474|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2103960474|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2103960474, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2103960474} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2103960474|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2103960474, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2103960474} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-11-28 18:32:50,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L728-->L728-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In1102403073 256))) (.cse0 (= (mod ~x$r_buff1_thd1~0_In1102403073 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd1~0_In1102403073 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In1102403073 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1102403073|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~x$w_buff1_used~0_In1102403073 |P0Thread1of1ForFork0_#t~ite6_Out1102403073|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1102403073, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1102403073, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1102403073, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1102403073} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1102403073|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1102403073, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1102403073, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1102403073, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1102403073} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-11-28 18:32:50,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L729-->L729-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-1042940166 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1042940166 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out-1042940166| ~x$r_buff0_thd1~0_In-1042940166) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out-1042940166| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1042940166, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1042940166} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1042940166, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1042940166|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1042940166} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-11-28 18:32:50,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L730-->L730-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd1~0_In1508006394 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1508006394 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1508006394 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In1508006394 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out1508006394| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1508006394| ~x$r_buff1_thd1~0_In1508006394)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1508006394, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1508006394, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1508006394, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1508006394} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1508006394, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1508006394|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1508006394, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1508006394, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1508006394} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-11-28 18:32:50,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L730-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_43 1) v_~__unbuffered_cnt~0_42) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd1~0_79 |v_P0Thread1of1ForFork0_#t~ite8_34|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_79} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-11-28 18:32:50,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L756-->L756-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1018606122 256))) (.cse3 (= (mod ~x$r_buff1_thd2~0_In-1018606122 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1018606122 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-1018606122 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1018606122 |P1Thread1of1ForFork1_#t~ite12_Out-1018606122|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1018606122|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1018606122, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1018606122, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1018606122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1018606122} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1018606122, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1018606122, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1018606122|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1018606122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1018606122} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-11-28 18:32:50,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L757-->L758: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out-1884324660 ~x$r_buff0_thd2~0_In-1884324660)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-1884324660 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1884324660 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= ~x$r_buff0_thd2~0_Out-1884324660 0) (not .cse2) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1884324660, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1884324660} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1884324660|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1884324660, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1884324660} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-11-28 18:32:50,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L758-->L758-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd2~0_In1391005594 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In1391005594 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In1391005594 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1391005594 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out1391005594| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite14_Out1391005594| ~x$r_buff1_thd2~0_In1391005594)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1391005594, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1391005594, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1391005594, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1391005594} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1391005594, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1391005594, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1391005594, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1391005594|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1391005594} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-11-28 18:32:50,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L758-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_45 |v_P1Thread1of1ForFork1_#t~ite14_28|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_45, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-11-28 18:32:50,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [585] [585] L783-->L785-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_91 256) 0) (= (mod v_~x$r_buff0_thd0~0_49 256) 0)) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} AuxVars[] AssignedVars[] because there is no mapped edge [2019-11-28 18:32:50,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L785-2-->L785-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-368636298 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-368636298 256)))) (or (and (= ~x~0_In-368636298 |ULTIMATE.start_main_#t~ite17_Out-368636298|) (or .cse0 .cse1)) (and (not .cse1) (= ~x$w_buff1~0_In-368636298 |ULTIMATE.start_main_#t~ite17_Out-368636298|) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-368636298, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-368636298, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-368636298, ~x~0=~x~0_In-368636298} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-368636298|, ~x$w_buff1~0=~x$w_buff1~0_In-368636298, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-368636298, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-368636298, ~x~0=~x~0_In-368636298} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-11-28 18:32:50,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [609] [609] L785-4-->L786: Formula: (= v_~x~0_39 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-11-28 18:32:50,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L786-->L786-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In2132823169 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In2132823169 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out2132823169|) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In2132823169 |ULTIMATE.start_main_#t~ite19_Out2132823169|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2132823169, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2132823169} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2132823169, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out2132823169|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2132823169} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:32:50,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-->L787-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1946982996 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1946982996 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1946982996 256))) (.cse3 (= (mod ~x$r_buff0_thd0~0_In-1946982996 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In-1946982996 |ULTIMATE.start_main_#t~ite20_Out-1946982996|)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out-1946982996|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1946982996, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1946982996, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1946982996, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1946982996} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1946982996, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1946982996, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1946982996|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1946982996, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1946982996} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:32:50,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1293562792 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1293562792 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-1293562792| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite21_Out-1293562792| ~x$r_buff0_thd0~0_In-1293562792)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1293562792, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1293562792} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1293562792, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1293562792|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1293562792} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:32:50,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L789-->L789-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In1665529271 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1665529271 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1665529271 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1665529271 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out1665529271| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite22_Out1665529271| ~x$r_buff1_thd0~0_In1665529271) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1665529271, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1665529271, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1665529271, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1665529271} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1665529271, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1665529271, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1665529271, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1665529271|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1665529271} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:32:50,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1005217856 256)))) (or (and (= |ULTIMATE.start_main_#t~ite37_In1005217856| |ULTIMATE.start_main_#t~ite37_Out1005217856|) (= |ULTIMATE.start_main_#t~ite38_Out1005217856| ~x$w_buff1_used~0_In1005217856) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite38_Out1005217856| |ULTIMATE.start_main_#t~ite37_Out1005217856|) (= ~x$w_buff1_used~0_In1005217856 |ULTIMATE.start_main_#t~ite37_Out1005217856|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1005217856 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In1005217856 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd0~0_In1005217856 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In1005217856 256)))) .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1005217856, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1005217856, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In1005217856|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1005217856, ~weak$$choice2~0=~weak$$choice2~0_In1005217856, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1005217856} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1005217856, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1005217856, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1005217856|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out1005217856|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1005217856, ~weak$$choice2~0=~weak$$choice2~0_In1005217856, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1005217856} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-11-28 18:32:50,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [590] [590] L801-->L802: Formula: (and (= v_~x$r_buff0_thd0~0_57 v_~x$r_buff0_thd0~0_56) (not (= (mod v_~weak$$choice2~0_21 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_57, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_56, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-11-28 18:32:50,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L804-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_10 256)) (= v_~x~0_75 v_~x$mem_tmp~0_14) (= v_~x$flush_delayed~0_25 0) (not (= (mod v_~x$flush_delayed~0_26 256) 0))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_75, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:32:50,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:32:50,507 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:32:50,508 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:32:50,509 INFO L168 Benchmark]: Toolchain (without parser) took 15047.70 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 521.7 MB). Free memory was 951.0 MB in the beginning and 1.1 GB in the end (delta: -102.6 MB). Peak memory consumption was 419.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:50,510 INFO L168 Benchmark]: CDTParser took 0.29 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:32:50,511 INFO L168 Benchmark]: CACSL2BoogieTranslator took 749.81 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.2 MB). Free memory was 951.0 MB in the beginning and 1.1 GB in the end (delta: -139.5 MB). Peak memory consumption was 20.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:50,511 INFO L168 Benchmark]: Boogie Procedure Inliner took 73.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:50,512 INFO L168 Benchmark]: Boogie Preprocessor took 38.31 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:32:50,512 INFO L168 Benchmark]: RCFGBuilder took 786.57 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.2 MB). Peak memory consumption was 45.2 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:50,513 INFO L168 Benchmark]: TraceAbstraction took 13268.20 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 398.5 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -28.4 MB). Peak memory consumption was 370.1 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:50,516 INFO L168 Benchmark]: Witness Printer took 125.28 ms. Allocated memory is still 1.6 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 13.3 MB). Peak memory consumption was 13.3 MB. Max. memory is 11.5 GB. [2019-11-28 18:32:50,519 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 749.81 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.2 MB). Free memory was 951.0 MB in the beginning and 1.1 GB in the end (delta: -139.5 MB). Peak memory consumption was 20.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 73.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 38.31 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 786.57 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 45.2 MB). Peak memory consumption was 45.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13268.20 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 398.5 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -28.4 MB). Peak memory consumption was 370.1 MB. Max. memory is 11.5 GB. * Witness Printer took 125.28 ms. Allocated memory is still 1.6 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 13.3 MB). Peak memory consumption was 13.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.7s, 145 ProgramPointsBefore, 79 ProgramPointsAfterwards, 179 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 27 TrivialSequentialCompositions, 41 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 28 ConcurrentYvCompositions, 26 ChoiceCompositions, 3606 VarBasedMoverChecksPositive, 166 VarBasedMoverChecksNegative, 18 SemBasedMoverChecksPositive, 205 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 47380 CheckedPairsTotal, 96 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L777] FCALL, FORK 0 pthread_create(&t2483, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t2484, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L745] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L746] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L747] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L748] 2 x$r_buff0_thd2 = (_Bool)1 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L720] 1 y = 2 [L723] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L754] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L726] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L727] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L728] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L729] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L755] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L756] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L787] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L788] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L789] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 x$flush_delayed = weak$$choice2 [L795] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L797] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L797] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L798] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L798] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L799] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L799] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L800] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L802] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L802] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 13.0s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 3.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1643 SDtfs, 1310 SDslu, 3090 SDs, 0 SdLazy, 1851 SolverSat, 113 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 123 GetRequests, 29 SyntacticMatches, 17 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=13070occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.5s AutomataMinimizationTime, 15 MinimizatonAttempts, 4686 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 617 NumberOfCodeBlocks, 617 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 548 ConstructedInterpolants, 0 QuantifiedInterpolants, 76857 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...