./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe030_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe030_pso.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a4926ac2dce683c4edbf3416b646f7aec42cebb1 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:32:45,827 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:32:45,830 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:32:45,848 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:32:45,848 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:32:45,851 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:32:45,854 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:32:45,858 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:32:45,860 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:32:45,865 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:32:45,867 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:32:45,868 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:32:45,868 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:32:45,869 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:32:45,870 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:32:45,872 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:32:45,873 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:32:45,874 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:32:45,875 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:32:45,877 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:32:45,879 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:32:45,881 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:32:45,882 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:32:45,883 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:32:45,885 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:32:45,885 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:32:45,886 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:32:45,887 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:32:45,887 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:32:45,889 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:32:45,889 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:32:45,890 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:32:45,891 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:32:45,891 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:32:45,893 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:32:45,893 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:32:45,894 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:32:45,894 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:32:45,894 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:32:45,895 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:32:45,896 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:32:45,897 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:32:45,912 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:32:45,913 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:32:45,915 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:32:45,917 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:32:45,917 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:32:45,917 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:32:45,918 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:32:45,918 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:32:45,918 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:32:45,919 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:32:45,921 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:32:45,921 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:32:45,921 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:32:45,922 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:32:45,922 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:32:45,923 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:32:45,923 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:32:45,923 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:32:45,924 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:32:45,924 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:32:45,924 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:32:45,925 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:32:45,925 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:32:45,926 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:32:45,926 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:32:45,926 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:32:45,927 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:32:45,927 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:32:45,927 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:32:45,927 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a4926ac2dce683c4edbf3416b646f7aec42cebb1 [2019-11-28 18:32:46,223 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:32:46,241 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:32:46,244 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:32:46,246 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:32:46,247 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:32:46,248 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe030_pso.opt.i [2019-11-28 18:32:46,327 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db8f81385/8d754bfda1254589aab7c29267ee3247/FLAGea4773be9 [2019-11-28 18:32:46,931 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:32:46,932 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe030_pso.opt.i [2019-11-28 18:32:46,949 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db8f81385/8d754bfda1254589aab7c29267ee3247/FLAGea4773be9 [2019-11-28 18:32:47,190 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db8f81385/8d754bfda1254589aab7c29267ee3247 [2019-11-28 18:32:47,194 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:32:47,195 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:32:47,196 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:32:47,196 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:32:47,200 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:32:47,201 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:47,204 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2c3e2fce and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47, skipping insertion in model container [2019-11-28 18:32:47,204 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:47,212 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:32:47,265 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:32:47,764 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:32:47,786 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:32:47,889 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:32:47,984 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:32:47,984 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47 WrapperNode [2019-11-28 18:32:47,985 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:32:47,985 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:32:47,986 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:32:47,986 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:32:47,995 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,027 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,064 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:32:48,065 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:32:48,065 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:32:48,065 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:32:48,075 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,075 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,079 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,080 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,090 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,094 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,098 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... [2019-11-28 18:32:48,104 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:32:48,104 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:32:48,105 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:32:48,105 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:32:48,106 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:32:48,167 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:32:48,168 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:32:48,168 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:32:48,168 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:32:48,169 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:32:48,169 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:32:48,169 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:32:48,169 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:32:48,169 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:32:48,170 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:32:48,170 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:32:48,170 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:32:48,170 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:32:48,172 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:32:48,901 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:32:48,901 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:32:48,903 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:48 BoogieIcfgContainer [2019-11-28 18:32:48,903 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:32:48,904 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:32:48,904 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:32:48,908 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:32:48,908 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:32:47" (1/3) ... [2019-11-28 18:32:48,909 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@741f3dd8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:32:48, skipping insertion in model container [2019-11-28 18:32:48,909 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:32:47" (2/3) ... [2019-11-28 18:32:48,910 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@741f3dd8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:32:48, skipping insertion in model container [2019-11-28 18:32:48,910 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:48" (3/3) ... [2019-11-28 18:32:48,912 INFO L109 eAbstractionObserver]: Analyzing ICFG safe030_pso.opt.i [2019-11-28 18:32:48,923 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:32:48,923 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:32:48,931 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:32:48,932 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:32:48,974 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,975 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,975 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,976 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,976 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,977 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,979 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,979 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,980 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,980 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,981 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,981 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,981 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,982 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,982 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,983 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,986 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,987 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,988 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,989 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,989 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,989 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,990 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,990 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,991 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,991 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,991 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,992 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,992 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,992 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,993 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,993 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,998 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,998 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,998 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:48,999 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,000 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,002 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,003 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,012 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,012 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,012 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:32:49,037 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-11-28 18:32:49,060 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:32:49,061 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:32:49,061 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:32:49,061 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:32:49,062 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:32:49,062 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:32:49,062 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:32:49,062 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:32:49,088 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 161 places, 192 transitions [2019-11-28 18:32:49,091 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 161 places, 192 transitions [2019-11-28 18:32:49,181 INFO L134 PetriNetUnfolder]: 41/189 cut-off events. [2019-11-28 18:32:49,181 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:32:49,201 INFO L76 FinitePrefix]: Finished finitePrefix Result has 199 conditions, 189 events. 41/189 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 462 event pairs. 9/155 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:32:49,230 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 161 places, 192 transitions [2019-11-28 18:32:49,286 INFO L134 PetriNetUnfolder]: 41/189 cut-off events. [2019-11-28 18:32:49,287 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:32:49,297 INFO L76 FinitePrefix]: Finished finitePrefix Result has 199 conditions, 189 events. 41/189 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 462 event pairs. 9/155 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:32:49,318 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-11-28 18:32:49,319 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:32:54,410 WARN L192 SmtUtils]: Spent 279.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-11-28 18:32:54,531 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-11-28 18:32:54,556 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46210 [2019-11-28 18:32:54,556 INFO L214 etLargeBlockEncoding]: Total number of compositions: 110 [2019-11-28 18:32:54,560 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 81 places, 86 transitions [2019-11-28 18:32:55,728 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 15658 states. [2019-11-28 18:32:55,730 INFO L276 IsEmpty]: Start isEmpty. Operand 15658 states. [2019-11-28 18:32:55,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-11-28 18:32:55,737 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:55,738 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:55,738 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:55,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:55,745 INFO L82 PathProgramCache]: Analyzing trace with hash 430910871, now seen corresponding path program 1 times [2019-11-28 18:32:55,755 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:55,755 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [83504815] [2019-11-28 18:32:55,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:55,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:56,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:56,035 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [83504815] [2019-11-28 18:32:56,036 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:56,036 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:32:56,036 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24436192] [2019-11-28 18:32:56,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:56,042 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:56,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:56,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:56,061 INFO L87 Difference]: Start difference. First operand 15658 states. Second operand 3 states. [2019-11-28 18:32:56,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:56,392 INFO L93 Difference]: Finished difference Result 15586 states and 57554 transitions. [2019-11-28 18:32:56,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:56,394 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-11-28 18:32:56,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:56,567 INFO L225 Difference]: With dead ends: 15586 [2019-11-28 18:32:56,569 INFO L226 Difference]: Without dead ends: 15248 [2019-11-28 18:32:56,571 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:57,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15248 states. [2019-11-28 18:32:57,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15248 to 15248. [2019-11-28 18:32:57,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15248 states. [2019-11-28 18:32:57,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15248 states to 15248 states and 56345 transitions. [2019-11-28 18:32:57,619 INFO L78 Accepts]: Start accepts. Automaton has 15248 states and 56345 transitions. Word has length 7 [2019-11-28 18:32:57,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:57,620 INFO L462 AbstractCegarLoop]: Abstraction has 15248 states and 56345 transitions. [2019-11-28 18:32:57,620 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:32:57,621 INFO L276 IsEmpty]: Start isEmpty. Operand 15248 states and 56345 transitions. [2019-11-28 18:32:57,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:32:57,626 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:57,626 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:57,627 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:57,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:57,627 INFO L82 PathProgramCache]: Analyzing trace with hash 1550259791, now seen corresponding path program 1 times [2019-11-28 18:32:57,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:57,628 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701329505] [2019-11-28 18:32:57,628 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:57,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:57,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:57,764 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701329505] [2019-11-28 18:32:57,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:57,765 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:57,765 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469863256] [2019-11-28 18:32:57,768 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:32:57,768 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:57,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:32:57,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:32:57,769 INFO L87 Difference]: Start difference. First operand 15248 states and 56345 transitions. Second operand 4 states. [2019-11-28 18:32:58,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:58,316 INFO L93 Difference]: Finished difference Result 24364 states and 86703 transitions. [2019-11-28 18:32:58,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:32:58,316 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:32:58,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:58,428 INFO L225 Difference]: With dead ends: 24364 [2019-11-28 18:32:58,428 INFO L226 Difference]: Without dead ends: 24350 [2019-11-28 18:32:58,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:32:58,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24350 states. [2019-11-28 18:32:59,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24350 to 21678. [2019-11-28 18:32:59,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21678 states. [2019-11-28 18:32:59,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21678 states to 21678 states and 78082 transitions. [2019-11-28 18:32:59,516 INFO L78 Accepts]: Start accepts. Automaton has 21678 states and 78082 transitions. Word has length 13 [2019-11-28 18:32:59,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:32:59,516 INFO L462 AbstractCegarLoop]: Abstraction has 21678 states and 78082 transitions. [2019-11-28 18:32:59,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:32:59,517 INFO L276 IsEmpty]: Start isEmpty. Operand 21678 states and 78082 transitions. [2019-11-28 18:32:59,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:32:59,523 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:32:59,523 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:32:59,524 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:32:59,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:32:59,524 INFO L82 PathProgramCache]: Analyzing trace with hash -1785022215, now seen corresponding path program 1 times [2019-11-28 18:32:59,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:32:59,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540118818] [2019-11-28 18:32:59,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:32:59,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:32:59,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:32:59,641 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540118818] [2019-11-28 18:32:59,641 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:32:59,643 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:32:59,643 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [730756241] [2019-11-28 18:32:59,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:32:59,644 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:32:59,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:32:59,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:59,645 INFO L87 Difference]: Start difference. First operand 21678 states and 78082 transitions. Second operand 3 states. [2019-11-28 18:32:59,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:32:59,709 INFO L93 Difference]: Finished difference Result 12388 states and 38538 transitions. [2019-11-28 18:32:59,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:32:59,709 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-11-28 18:32:59,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:32:59,750 INFO L225 Difference]: With dead ends: 12388 [2019-11-28 18:32:59,750 INFO L226 Difference]: Without dead ends: 12388 [2019-11-28 18:32:59,751 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:32:59,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12388 states. [2019-11-28 18:33:00,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12388 to 12388. [2019-11-28 18:33:00,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12388 states. [2019-11-28 18:33:00,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12388 states to 12388 states and 38538 transitions. [2019-11-28 18:33:00,098 INFO L78 Accepts]: Start accepts. Automaton has 12388 states and 38538 transitions. Word has length 13 [2019-11-28 18:33:00,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:00,098 INFO L462 AbstractCegarLoop]: Abstraction has 12388 states and 38538 transitions. [2019-11-28 18:33:00,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:00,099 INFO L276 IsEmpty]: Start isEmpty. Operand 12388 states and 38538 transitions. [2019-11-28 18:33:00,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:33:00,101 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:00,101 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:00,101 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:00,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:00,102 INFO L82 PathProgramCache]: Analyzing trace with hash -1922152669, now seen corresponding path program 1 times [2019-11-28 18:33:00,102 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:00,102 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [346688942] [2019-11-28 18:33:00,102 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:00,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:00,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:00,155 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [346688942] [2019-11-28 18:33:00,155 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:00,155 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:33:00,155 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853612559] [2019-11-28 18:33:00,156 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:33:00,156 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:00,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:33:00,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:33:00,156 INFO L87 Difference]: Start difference. First operand 12388 states and 38538 transitions. Second operand 4 states. [2019-11-28 18:33:00,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:00,182 INFO L93 Difference]: Finished difference Result 1903 states and 4374 transitions. [2019-11-28 18:33:00,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:33:00,182 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:33:00,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:00,187 INFO L225 Difference]: With dead ends: 1903 [2019-11-28 18:33:00,187 INFO L226 Difference]: Without dead ends: 1903 [2019-11-28 18:33:00,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:33:00,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1903 states. [2019-11-28 18:33:00,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1903 to 1903. [2019-11-28 18:33:00,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1903 states. [2019-11-28 18:33:00,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1903 states to 1903 states and 4374 transitions. [2019-11-28 18:33:00,222 INFO L78 Accepts]: Start accepts. Automaton has 1903 states and 4374 transitions. Word has length 14 [2019-11-28 18:33:00,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:00,223 INFO L462 AbstractCegarLoop]: Abstraction has 1903 states and 4374 transitions. [2019-11-28 18:33:00,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:33:00,223 INFO L276 IsEmpty]: Start isEmpty. Operand 1903 states and 4374 transitions. [2019-11-28 18:33:00,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:33:00,226 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:00,226 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:00,226 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:00,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:00,227 INFO L82 PathProgramCache]: Analyzing trace with hash -560054606, now seen corresponding path program 1 times [2019-11-28 18:33:00,227 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:00,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595884722] [2019-11-28 18:33:00,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:00,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:00,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:00,343 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1595884722] [2019-11-28 18:33:00,343 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:00,343 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:33:00,344 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107243810] [2019-11-28 18:33:00,345 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:33:00,345 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:00,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:33:00,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:33:00,345 INFO L87 Difference]: Start difference. First operand 1903 states and 4374 transitions. Second operand 5 states. [2019-11-28 18:33:00,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:00,375 INFO L93 Difference]: Finished difference Result 669 states and 1571 transitions. [2019-11-28 18:33:00,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:33:00,376 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-11-28 18:33:00,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:00,377 INFO L225 Difference]: With dead ends: 669 [2019-11-28 18:33:00,377 INFO L226 Difference]: Without dead ends: 669 [2019-11-28 18:33:00,378 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:33:00,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 669 states. [2019-11-28 18:33:00,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 669 to 599. [2019-11-28 18:33:00,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 599 states. [2019-11-28 18:33:00,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 599 states to 599 states and 1406 transitions. [2019-11-28 18:33:00,390 INFO L78 Accepts]: Start accepts. Automaton has 599 states and 1406 transitions. Word has length 26 [2019-11-28 18:33:00,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:00,390 INFO L462 AbstractCegarLoop]: Abstraction has 599 states and 1406 transitions. [2019-11-28 18:33:00,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:33:00,391 INFO L276 IsEmpty]: Start isEmpty. Operand 599 states and 1406 transitions. [2019-11-28 18:33:00,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:33:00,394 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:00,395 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:00,395 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:00,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:00,395 INFO L82 PathProgramCache]: Analyzing trace with hash 958609681, now seen corresponding path program 1 times [2019-11-28 18:33:00,396 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:00,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382285831] [2019-11-28 18:33:00,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:00,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:00,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:00,493 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382285831] [2019-11-28 18:33:00,493 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:00,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:33:00,493 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721766448] [2019-11-28 18:33:00,494 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:33:00,494 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:00,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:33:00,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:00,494 INFO L87 Difference]: Start difference. First operand 599 states and 1406 transitions. Second operand 3 states. [2019-11-28 18:33:00,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:00,538 INFO L93 Difference]: Finished difference Result 610 states and 1420 transitions. [2019-11-28 18:33:00,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:33:00,538 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-11-28 18:33:00,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:00,541 INFO L225 Difference]: With dead ends: 610 [2019-11-28 18:33:00,541 INFO L226 Difference]: Without dead ends: 610 [2019-11-28 18:33:00,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:00,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2019-11-28 18:33:00,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 605. [2019-11-28 18:33:00,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 605 states. [2019-11-28 18:33:00,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 1415 transitions. [2019-11-28 18:33:00,554 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 1415 transitions. Word has length 54 [2019-11-28 18:33:00,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:00,555 INFO L462 AbstractCegarLoop]: Abstraction has 605 states and 1415 transitions. [2019-11-28 18:33:00,555 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:00,555 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 1415 transitions. [2019-11-28 18:33:00,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-28 18:33:00,558 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:00,558 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:00,558 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:00,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:00,559 INFO L82 PathProgramCache]: Analyzing trace with hash -1927722319, now seen corresponding path program 1 times [2019-11-28 18:33:00,559 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:00,559 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969599462] [2019-11-28 18:33:00,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:00,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:00,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:00,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969599462] [2019-11-28 18:33:00,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:00,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:33:00,672 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272544423] [2019-11-28 18:33:00,672 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:33:00,672 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:00,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:33:00,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:00,673 INFO L87 Difference]: Start difference. First operand 605 states and 1415 transitions. Second operand 3 states. [2019-11-28 18:33:00,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:00,690 INFO L93 Difference]: Finished difference Result 605 states and 1389 transitions. [2019-11-28 18:33:00,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:33:00,691 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-11-28 18:33:00,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:00,693 INFO L225 Difference]: With dead ends: 605 [2019-11-28 18:33:00,693 INFO L226 Difference]: Without dead ends: 605 [2019-11-28 18:33:00,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:00,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2019-11-28 18:33:00,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2019-11-28 18:33:00,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 605 states. [2019-11-28 18:33:00,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 1389 transitions. [2019-11-28 18:33:00,705 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 1389 transitions. Word has length 54 [2019-11-28 18:33:00,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:00,706 INFO L462 AbstractCegarLoop]: Abstraction has 605 states and 1389 transitions. [2019-11-28 18:33:00,706 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:00,706 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 1389 transitions. [2019-11-28 18:33:00,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-28 18:33:00,708 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:00,709 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:00,709 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:00,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:00,709 INFO L82 PathProgramCache]: Analyzing trace with hash 1649873410, now seen corresponding path program 1 times [2019-11-28 18:33:00,710 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:00,710 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160328648] [2019-11-28 18:33:00,710 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:00,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:00,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:00,864 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160328648] [2019-11-28 18:33:00,864 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:00,864 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-28 18:33:00,865 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404038078] [2019-11-28 18:33:00,865 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-28 18:33:00,865 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:00,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-28 18:33:00,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:33:00,866 INFO L87 Difference]: Start difference. First operand 605 states and 1389 transitions. Second operand 8 states. [2019-11-28 18:33:01,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:01,326 INFO L93 Difference]: Finished difference Result 1054 states and 2429 transitions. [2019-11-28 18:33:01,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:33:01,327 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 55 [2019-11-28 18:33:01,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:01,332 INFO L225 Difference]: With dead ends: 1054 [2019-11-28 18:33:01,332 INFO L226 Difference]: Without dead ends: 1054 [2019-11-28 18:33:01,333 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:33:01,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1054 states. [2019-11-28 18:33:01,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1054 to 743. [2019-11-28 18:33:01,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 743 states. [2019-11-28 18:33:01,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 743 states to 743 states and 1718 transitions. [2019-11-28 18:33:01,352 INFO L78 Accepts]: Start accepts. Automaton has 743 states and 1718 transitions. Word has length 55 [2019-11-28 18:33:01,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:01,354 INFO L462 AbstractCegarLoop]: Abstraction has 743 states and 1718 transitions. [2019-11-28 18:33:01,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-28 18:33:01,355 INFO L276 IsEmpty]: Start isEmpty. Operand 743 states and 1718 transitions. [2019-11-28 18:33:01,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-28 18:33:01,358 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:01,359 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:01,359 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:01,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:01,360 INFO L82 PathProgramCache]: Analyzing trace with hash -1435069556, now seen corresponding path program 2 times [2019-11-28 18:33:01,360 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:01,360 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613661448] [2019-11-28 18:33:01,360 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:01,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:01,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:01,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613661448] [2019-11-28 18:33:01,518 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:01,518 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:33:01,518 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1852437395] [2019-11-28 18:33:01,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:33:01,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:01,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:33:01,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:33:01,525 INFO L87 Difference]: Start difference. First operand 743 states and 1718 transitions. Second operand 5 states. [2019-11-28 18:33:01,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:01,722 INFO L93 Difference]: Finished difference Result 963 states and 2203 transitions. [2019-11-28 18:33:01,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:33:01,723 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-11-28 18:33:01,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:01,725 INFO L225 Difference]: With dead ends: 963 [2019-11-28 18:33:01,725 INFO L226 Difference]: Without dead ends: 963 [2019-11-28 18:33:01,726 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:33:01,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 963 states. [2019-11-28 18:33:01,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 963 to 735. [2019-11-28 18:33:01,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 735 states. [2019-11-28 18:33:01,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 735 states to 735 states and 1698 transitions. [2019-11-28 18:33:01,743 INFO L78 Accepts]: Start accepts. Automaton has 735 states and 1698 transitions. Word has length 55 [2019-11-28 18:33:01,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:01,744 INFO L462 AbstractCegarLoop]: Abstraction has 735 states and 1698 transitions. [2019-11-28 18:33:01,744 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:33:01,744 INFO L276 IsEmpty]: Start isEmpty. Operand 735 states and 1698 transitions. [2019-11-28 18:33:01,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-28 18:33:01,746 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:01,747 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:01,747 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:01,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:01,748 INFO L82 PathProgramCache]: Analyzing trace with hash 2008175174, now seen corresponding path program 3 times [2019-11-28 18:33:01,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:01,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432558941] [2019-11-28 18:33:01,749 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:01,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:01,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:01,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432558941] [2019-11-28 18:33:01,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:01,871 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:33:01,871 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2050816079] [2019-11-28 18:33:01,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:33:01,872 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:01,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:33:01,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:01,873 INFO L87 Difference]: Start difference. First operand 735 states and 1698 transitions. Second operand 3 states. [2019-11-28 18:33:01,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:01,934 INFO L93 Difference]: Finished difference Result 735 states and 1697 transitions. [2019-11-28 18:33:01,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:33:01,935 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-11-28 18:33:01,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:01,939 INFO L225 Difference]: With dead ends: 735 [2019-11-28 18:33:01,939 INFO L226 Difference]: Without dead ends: 735 [2019-11-28 18:33:01,940 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:01,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 735 states. [2019-11-28 18:33:01,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 735 to 498. [2019-11-28 18:33:01,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 498 states. [2019-11-28 18:33:01,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 498 states to 498 states and 1149 transitions. [2019-11-28 18:33:01,954 INFO L78 Accepts]: Start accepts. Automaton has 498 states and 1149 transitions. Word has length 55 [2019-11-28 18:33:01,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:01,954 INFO L462 AbstractCegarLoop]: Abstraction has 498 states and 1149 transitions. [2019-11-28 18:33:01,954 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:01,955 INFO L276 IsEmpty]: Start isEmpty. Operand 498 states and 1149 transitions. [2019-11-28 18:33:01,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:01,957 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:01,958 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:01,958 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:01,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:01,959 INFO L82 PathProgramCache]: Analyzing trace with hash -529490788, now seen corresponding path program 1 times [2019-11-28 18:33:01,959 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:01,960 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546193911] [2019-11-28 18:33:01,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:01,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:02,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:02,301 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546193911] [2019-11-28 18:33:02,301 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:02,301 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:33:02,302 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2056176030] [2019-11-28 18:33:02,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:33:02,303 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:02,303 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:33:02,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:33:02,304 INFO L87 Difference]: Start difference. First operand 498 states and 1149 transitions. Second operand 6 states. [2019-11-28 18:33:02,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:02,377 INFO L93 Difference]: Finished difference Result 892 states and 1870 transitions. [2019-11-28 18:33:02,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:33:02,377 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-11-28 18:33:02,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:02,380 INFO L225 Difference]: With dead ends: 892 [2019-11-28 18:33:02,380 INFO L226 Difference]: Without dead ends: 579 [2019-11-28 18:33:02,380 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:33:02,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 579 states. [2019-11-28 18:33:02,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 579 to 436. [2019-11-28 18:33:02,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 436 states. [2019-11-28 18:33:02,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 970 transitions. [2019-11-28 18:33:02,391 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 970 transitions. Word has length 56 [2019-11-28 18:33:02,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:02,391 INFO L462 AbstractCegarLoop]: Abstraction has 436 states and 970 transitions. [2019-11-28 18:33:02,392 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:33:02,392 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 970 transitions. [2019-11-28 18:33:02,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:02,393 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:02,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:02,394 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:02,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:02,394 INFO L82 PathProgramCache]: Analyzing trace with hash -933211760, now seen corresponding path program 2 times [2019-11-28 18:33:02,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:02,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2071942937] [2019-11-28 18:33:02,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:02,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:02,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:02,552 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2071942937] [2019-11-28 18:33:02,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:02,552 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:33:02,552 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1336349808] [2019-11-28 18:33:02,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:33:02,553 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:02,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:33:02,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:33:02,554 INFO L87 Difference]: Start difference. First operand 436 states and 970 transitions. Second operand 6 states. [2019-11-28 18:33:02,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:02,622 INFO L93 Difference]: Finished difference Result 707 states and 1527 transitions. [2019-11-28 18:33:02,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:33:02,623 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-11-28 18:33:02,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:02,623 INFO L225 Difference]: With dead ends: 707 [2019-11-28 18:33:02,624 INFO L226 Difference]: Without dead ends: 244 [2019-11-28 18:33:02,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:33:02,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2019-11-28 18:33:02,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 220. [2019-11-28 18:33:02,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-11-28 18:33:02,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 387 transitions. [2019-11-28 18:33:02,629 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 387 transitions. Word has length 56 [2019-11-28 18:33:02,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:02,629 INFO L462 AbstractCegarLoop]: Abstraction has 220 states and 387 transitions. [2019-11-28 18:33:02,629 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:33:02,629 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 387 transitions. [2019-11-28 18:33:02,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:02,630 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:02,631 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:02,631 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:02,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:02,631 INFO L82 PathProgramCache]: Analyzing trace with hash -1590264344, now seen corresponding path program 3 times [2019-11-28 18:33:02,632 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:02,632 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040992518] [2019-11-28 18:33:02,632 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:02,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:02,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:02,859 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2040992518] [2019-11-28 18:33:02,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:02,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-28 18:33:02,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2005577530] [2019-11-28 18:33:02,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-28 18:33:02,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:02,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-28 18:33:02,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:33:02,862 INFO L87 Difference]: Start difference. First operand 220 states and 387 transitions. Second operand 12 states. [2019-11-28 18:33:03,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:03,102 INFO L93 Difference]: Finished difference Result 368 states and 629 transitions. [2019-11-28 18:33:03,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-28 18:33:03,102 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-11-28 18:33:03,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:03,104 INFO L225 Difference]: With dead ends: 368 [2019-11-28 18:33:03,104 INFO L226 Difference]: Without dead ends: 338 [2019-11-28 18:33:03,104 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2019-11-28 18:33:03,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 338 states. [2019-11-28 18:33:03,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 338 to 328. [2019-11-28 18:33:03,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-11-28 18:33:03,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 572 transitions. [2019-11-28 18:33:03,110 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 572 transitions. Word has length 56 [2019-11-28 18:33:03,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:03,111 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 572 transitions. [2019-11-28 18:33:03,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-28 18:33:03,111 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 572 transitions. [2019-11-28 18:33:03,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:03,112 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:03,113 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:03,113 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:03,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:03,113 INFO L82 PathProgramCache]: Analyzing trace with hash -1475134232, now seen corresponding path program 4 times [2019-11-28 18:33:03,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:03,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16580298] [2019-11-28 18:33:03,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:03,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:33:03,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:33:03,236 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:33:03,237 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:33:03,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] ULTIMATE.startENTRY-->L798: Formula: (let ((.cse0 (store |v_#valid_61| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2498~0.base_27| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2498~0.base_27|) |v_ULTIMATE.start_main_~#t2498~0.offset_20| 0))) (= (store .cse0 |v_ULTIMATE.start_main_~#t2498~0.base_27| 1) |v_#valid_59|) (= 0 v_~y$r_buff1_thd1~0_54) (= (select .cse0 |v_ULTIMATE.start_main_~#t2498~0.base_27|) 0) (= 0 v_~y$r_buff1_thd3~0_115) (= 0 v_~y$r_buff1_thd2~0_106) (= v_~weak$$choice2~0_112 0) (= v_~y$r_buff0_thd1~0_53 0) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$w_buff0_used~0_737 0) (= v_~y$w_buff1~0_230 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~y$r_buff0_thd3~0_169) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2498~0.base_27|) (= |v_ULTIMATE.start_main_~#t2498~0.offset_20| 0) (= 0 v_~y$w_buff0~0_338) (< 0 |v_#StackHeapBarrier_18|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2498~0.base_27| 4)) (= 0 v_~y$r_buff0_thd2~0_108) (= v_~y$mem_tmp~0_19 0) (= v_~z~0_90 0) (= v_~x~0_77 0) (= v_~y$w_buff1_used~0_407 0) (= v_~main$tmp_guard0~0_21 0) (= |v_#NULL.offset_5| 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~__unbuffered_cnt~0_90) (= v_~y$r_buff1_thd0~0_237 0) (= 0 v_~y$flush_delayed~0_38) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y~0_150 0) (= 0 |v_#NULL.base_5|) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_61|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_34|, ULTIMATE.start_main_~#t2499~0.offset=|v_ULTIMATE.start_main_~#t2499~0.offset_17|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_39|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_62|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_71|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_115, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_53, ~y$flush_delayed~0=v_~y$flush_delayed~0_38, #length=|v_#length_25|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_33|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_118|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_45|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_34|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_37|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_40|, ~y$w_buff1~0=v_~y$w_buff1~0_230, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_237, ~x~0=v_~x~0_77, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t2499~0.base=|v_ULTIMATE.start_main_~#t2499~0.base_20|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_737, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_45|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_37|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_43|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_24|, ULTIMATE.start_main_~#t2500~0.offset=|v_ULTIMATE.start_main_~#t2500~0.offset_16|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_62|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_54, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~y$w_buff0~0=v_~y$w_buff0~0_338, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_169, ~y~0=v_~y~0_150, ULTIMATE.start_main_~#t2498~0.offset=|v_ULTIMATE.start_main_~#t2498~0.offset_20|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_37|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_206|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_43|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_114|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_106, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_42|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_59|, ULTIMATE.start_main_~#t2500~0.base=|v_ULTIMATE.start_main_~#t2500~0.base_20|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t2498~0.base=|v_ULTIMATE.start_main_~#t2498~0.base_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_90, ~weak$$choice2~0=v_~weak$$choice2~0_112, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2499~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2499~0.base, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2500~0.offset, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t2498~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, ULTIMATE.start_main_~#t2500~0.base, #memory_int, ULTIMATE.start_main_~#t2498~0.base, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:33:03,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L798-1-->L800: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2499~0.base_9| 1)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2499~0.base_9|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2499~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2499~0.base_9|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2499~0.base_9| 4) |v_#length_15|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2499~0.base_9| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2499~0.base_9|) |v_ULTIMATE.start_main_~#t2499~0.offset_9| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t2499~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2499~0.base=|v_ULTIMATE.start_main_~#t2499~0.base_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2499~0.offset=|v_ULTIMATE.start_main_~#t2499~0.offset_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2499~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t2499~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:33:03,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L800-1-->L802: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2500~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2500~0.base_10|) |v_ULTIMATE.start_main_~#t2500~0.offset_9| 2)) |v_#memory_int_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2500~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t2500~0.offset_9|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2500~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2500~0.base_10|)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2500~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2500~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t2500~0.base=|v_ULTIMATE.start_main_~#t2500~0.base_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2500~0.offset=|v_ULTIMATE.start_main_~#t2500~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2500~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t2500~0.offset] because there is no mapped edge [2019-11-28 18:33:03,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P2ENTRY-->L4-3: Formula: (and (= ~y$w_buff1_used~0_Out-1329858827 ~y$w_buff0_used~0_In-1329858827) (= |P2Thread1of1ForFork0_#in~arg.base_In-1329858827| P2Thread1of1ForFork0_~arg.base_Out-1329858827) (= |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-1329858827| (ite (not (and (not (= (mod ~y$w_buff0_used~0_Out-1329858827 256) 0)) (not (= (mod ~y$w_buff1_used~0_Out-1329858827 256) 0)))) 1 0)) (= 2 ~y$w_buff0~0_Out-1329858827) (not (= P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out-1329858827 0)) (= 1 ~y$w_buff0_used~0_Out-1329858827) (= ~y$w_buff1~0_Out-1329858827 ~y$w_buff0~0_In-1329858827) (= |P2Thread1of1ForFork0_#in~arg.offset_In-1329858827| P2Thread1of1ForFork0_~arg.offset_Out-1329858827) (= P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out-1329858827 |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-1329858827|)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|P2Thread1of1ForFork0_#in~arg.offset_In-1329858827|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1329858827, ~y$w_buff0~0=~y$w_buff0~0_In-1329858827, P2Thread1of1ForFork0_#in~arg.base=|P2Thread1of1ForFork0_#in~arg.base_In-1329858827|} OutVars{P2Thread1of1ForFork0_~arg.base=P2Thread1of1ForFork0_~arg.base_Out-1329858827, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-1329858827|, P2Thread1of1ForFork0_#in~arg.offset=|P2Thread1of1ForFork0_#in~arg.offset_In-1329858827|, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out-1329858827, ~y$w_buff1~0=~y$w_buff1~0_Out-1329858827, ~y$w_buff0~0=~y$w_buff0~0_Out-1329858827, P2Thread1of1ForFork0_~arg.offset=P2Thread1of1ForFork0_~arg.offset_Out-1329858827, P2Thread1of1ForFork0_#in~arg.base=|P2Thread1of1ForFork0_#in~arg.base_In-1329858827|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out-1329858827, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-1329858827} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:33:03,245 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_60 1) (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= |v_P0Thread1of1ForFork1_#in~arg.base_17| v_P0Thread1of1ForFork1_~arg.base_15) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= v_P0Thread1of1ForFork1_~arg.offset_15 |v_P0Thread1of1ForFork1_#in~arg.offset_17|) (= v_~z~0_51 2) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|} OutVars{P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_15, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, ~z~0=v_~z~0_51, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|, ~x~0=v_~x~0_60, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_15} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:33:03,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-198516417 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-198516417 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite11_Out-198516417|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-198516417 |P2Thread1of1ForFork0_#t~ite11_Out-198516417|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-198516417, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-198516417} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-198516417, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-198516417|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-198516417} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:33:03,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L746-2-->L746-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out-727778669| |P1Thread1of1ForFork2_#t~ite4_Out-727778669|)) (.cse2 (= (mod ~y$w_buff1_used~0_In-727778669 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-727778669 256) 0))) (or (and (not .cse0) .cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out-727778669| ~y$w_buff1~0_In-727778669) (not .cse2)) (and .cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out-727778669| ~y~0_In-727778669) (or .cse2 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-727778669, ~y$w_buff1~0=~y$w_buff1~0_In-727778669, ~y~0=~y~0_In-727778669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-727778669} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-727778669, ~y$w_buff1~0=~y$w_buff1~0_In-727778669, P1Thread1of1ForFork2_#t~ite4=|P1Thread1of1ForFork2_#t~ite4_Out-727778669|, ~y~0=~y~0_In-727778669, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-727778669|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-727778669} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:33:03,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-2059169880 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-2059169880 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-2059169880 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2059169880 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-2059169880|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-2059169880 |P2Thread1of1ForFork0_#t~ite12_Out-2059169880|) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2059169880, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2059169880, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2059169880, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2059169880} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2059169880, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2059169880, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-2059169880|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2059169880, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2059169880} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:33:03,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In427440792 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In427440792 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite5_Out427440792| ~y$w_buff0_used~0_In427440792)) (and (= 0 |P1Thread1of1ForFork2_#t~ite5_Out427440792|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In427440792, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In427440792} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In427440792, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In427440792, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out427440792|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:33:03,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L748-->L748-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In-1977889335 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-1977889335 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1977889335 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1977889335 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite6_Out-1977889335| ~y$w_buff1_used~0_In-1977889335) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite6_Out-1977889335|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1977889335, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1977889335, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1977889335, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1977889335} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1977889335, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1977889335, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1977889335, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out-1977889335|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1977889335} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:33:03,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-609653734 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-609653734 256)))) (or (and (= ~y$r_buff0_thd2~0_In-609653734 |P1Thread1of1ForFork2_#t~ite7_Out-609653734|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-609653734|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-609653734, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-609653734} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-609653734, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-609653734, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-609653734|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:33:03,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-717166831 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-717166831 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-717166831 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-717166831 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-717166831|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite8_Out-717166831| ~y$r_buff1_thd2~0_In-717166831) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-717166831, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-717166831, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-717166831, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-717166831} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-717166831, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-717166831, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-717166831|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-717166831, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-717166831} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:33:03,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L750-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_34| v_~y$r_buff1_thd2~0_71) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_71, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:33:03,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L778-->L779: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1748024342 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1748024342 256))) (.cse1 (= ~y$r_buff0_thd3~0_In-1748024342 ~y$r_buff0_thd3~0_Out-1748024342))) (or (and .cse0 .cse1) (and (= 0 ~y$r_buff0_thd3~0_Out-1748024342) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1748024342, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1748024342} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1748024342, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1748024342, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1748024342|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:33:03,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L779-->L779-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd3~0_In1558306597 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In1558306597 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In1558306597 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1558306597 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out1558306597| 0)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite14_Out1558306597| ~y$r_buff1_thd3~0_In1558306597)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1558306597, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1558306597, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1558306597, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1558306597} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1558306597|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1558306597, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1558306597, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1558306597, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1558306597} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:33:03,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L779-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_32| v_~y$r_buff1_thd3~0_66) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_31|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_66, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:33:03,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L802-1-->L808: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:33:03,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L808-2-->L808-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite19_Out1210383497| |ULTIMATE.start_main_#t~ite18_Out1210383497|)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1210383497 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1210383497 256) 0))) (or (and (not .cse0) (not .cse1) .cse2 (= ~y$w_buff1~0_In1210383497 |ULTIMATE.start_main_#t~ite18_Out1210383497|)) (and .cse2 (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite18_Out1210383497| ~y~0_In1210383497)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1210383497, ~y~0=~y~0_In1210383497, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1210383497, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1210383497} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1210383497, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1210383497|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1210383497|, ~y~0=~y~0_In1210383497, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1210383497, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1210383497} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:33:03,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-282069831 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-282069831 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-282069831| ~y$w_buff0_used~0_In-282069831) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-282069831| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-282069831, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-282069831} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-282069831, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-282069831, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-282069831|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:33:03,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L810-->L810-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-1223402845 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1223402845 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1223402845 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1223402845 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite21_Out-1223402845| 0)) (and (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-1223402845 |ULTIMATE.start_main_#t~ite21_Out-1223402845|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1223402845, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1223402845, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1223402845, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1223402845} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1223402845, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1223402845, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1223402845|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1223402845, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1223402845} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:33:03,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-731769655 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-731769655 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out-731769655|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite22_Out-731769655| ~y$r_buff0_thd0~0_In-731769655) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-731769655, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-731769655} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-731769655, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-731769655, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-731769655|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:33:03,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L812-->L812-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-564767715 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-564767715 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-564767715 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-564767715 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite23_Out-564767715|)) (and (or .cse2 .cse3) (= ~y$r_buff1_thd0~0_In-564767715 |ULTIMATE.start_main_#t~ite23_Out-564767715|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-564767715, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-564767715, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-564767715, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-564767715} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-564767715, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-564767715, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-564767715, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-564767715|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-564767715} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:33:03,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L820-->L820-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-953274489 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-953274489 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-953274489 256)) .cse0) (and (= 0 (mod ~y$r_buff1_thd0~0_In-953274489 256)) .cse0) (= (mod ~y$w_buff0_used~0_In-953274489 256) 0))) (= ~y$w_buff0~0_In-953274489 |ULTIMATE.start_main_#t~ite29_Out-953274489|) (= |ULTIMATE.start_main_#t~ite30_Out-953274489| |ULTIMATE.start_main_#t~ite29_Out-953274489|) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite29_In-953274489| |ULTIMATE.start_main_#t~ite29_Out-953274489|) (= |ULTIMATE.start_main_#t~ite30_Out-953274489| ~y$w_buff0~0_In-953274489)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-953274489, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-953274489|, ~y$w_buff0~0=~y$w_buff0~0_In-953274489, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-953274489, ~weak$$choice2~0=~weak$$choice2~0_In-953274489, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-953274489, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-953274489} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-953274489|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-953274489, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-953274489|, ~y$w_buff0~0=~y$w_buff0~0_In-953274489, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-953274489, ~weak$$choice2~0=~weak$$choice2~0_In-953274489, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-953274489, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-953274489} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-11-28 18:33:03,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L821-->L821-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1963784482 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite32_Out1963784482| ~y$w_buff1~0_In1963784482) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1963784482 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd0~0_In1963784482 256) 0)) (and .cse1 (= (mod ~y$w_buff1_used~0_In1963784482 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In1963784482 256)))) (= |ULTIMATE.start_main_#t~ite32_Out1963784482| |ULTIMATE.start_main_#t~ite33_Out1963784482|)) (and (= ~y$w_buff1~0_In1963784482 |ULTIMATE.start_main_#t~ite33_Out1963784482|) (not .cse0) (= |ULTIMATE.start_main_#t~ite32_In1963784482| |ULTIMATE.start_main_#t~ite32_Out1963784482|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1963784482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1963784482, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1963784482, ~weak$$choice2~0=~weak$$choice2~0_In1963784482, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1963784482, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In1963784482|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1963784482} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1963784482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1963784482, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1963784482, ~weak$$choice2~0=~weak$$choice2~0_In1963784482, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1963784482|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1963784482, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out1963784482|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1963784482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:33:03,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L822-->L822-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In232027416 256)))) (or (and (= |ULTIMATE.start_main_#t~ite35_In232027416| |ULTIMATE.start_main_#t~ite35_Out232027416|) (not .cse0) (= ~y$w_buff0_used~0_In232027416 |ULTIMATE.start_main_#t~ite36_Out232027416|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In232027416 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd0~0_In232027416 256) 0)) (and .cse1 (= (mod ~y$w_buff1_used~0_In232027416 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In232027416 256)))) .cse0 (= ~y$w_buff0_used~0_In232027416 |ULTIMATE.start_main_#t~ite35_Out232027416|) (= |ULTIMATE.start_main_#t~ite36_Out232027416| |ULTIMATE.start_main_#t~ite35_Out232027416|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In232027416, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In232027416, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In232027416|, ~weak$$choice2~0=~weak$$choice2~0_In232027416, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In232027416, ~y$w_buff1_used~0=~y$w_buff1_used~0_In232027416} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In232027416, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In232027416, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out232027416|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out232027416|, ~weak$$choice2~0=~weak$$choice2~0_In232027416, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In232027416, ~y$w_buff1_used~0=~y$w_buff1_used~0_In232027416} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:33:03,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L824-->L825-8: Formula: (and (= v_~y$r_buff1_thd0~0_226 |v_ULTIMATE.start_main_#t~ite45_60|) (not (= 0 (mod v_~weak$$choice2~0_105 256))) (= |v_ULTIMATE.start_main_#t~ite43_49| |v_ULTIMATE.start_main_#t~ite43_48|) (= |v_ULTIMATE.start_main_#t~ite44_49| |v_ULTIMATE.start_main_#t~ite44_48|) (= v_~y$r_buff0_thd0~0_339 v_~y$r_buff0_thd0~0_338)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_339, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_49|, ~weak$$choice2~0=v_~weak$$choice2~0_105, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_226, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_49|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_35|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_338, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ~weak$$choice2~0=v_~weak$$choice2~0_105, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_226, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_19|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_48|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:33:03,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] L827-->L830-1: Formula: (and (= (mod v_~main$tmp_guard1~0_21 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_~y~0_89 v_~y$mem_tmp~0_11) (= 0 v_~y$flush_delayed~0_23) (not (= (mod v_~y$flush_delayed~0_24 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_23, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~y~0=v_~y~0_89, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:33:03,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L830-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:33:03,332 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:33:03 BasicIcfg [2019-11-28 18:33:03,333 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:33:03,333 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:33:03,334 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:33:03,334 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:33:03,335 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:32:48" (3/4) ... [2019-11-28 18:33:03,337 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:33:03,338 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] ULTIMATE.startENTRY-->L798: Formula: (let ((.cse0 (store |v_#valid_61| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2498~0.base_27| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2498~0.base_27|) |v_ULTIMATE.start_main_~#t2498~0.offset_20| 0))) (= (store .cse0 |v_ULTIMATE.start_main_~#t2498~0.base_27| 1) |v_#valid_59|) (= 0 v_~y$r_buff1_thd1~0_54) (= (select .cse0 |v_ULTIMATE.start_main_~#t2498~0.base_27|) 0) (= 0 v_~y$r_buff1_thd3~0_115) (= 0 v_~y$r_buff1_thd2~0_106) (= v_~weak$$choice2~0_112 0) (= v_~y$r_buff0_thd1~0_53 0) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$w_buff0_used~0_737 0) (= v_~y$w_buff1~0_230 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~y$r_buff0_thd3~0_169) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2498~0.base_27|) (= |v_ULTIMATE.start_main_~#t2498~0.offset_20| 0) (= 0 v_~y$w_buff0~0_338) (< 0 |v_#StackHeapBarrier_18|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2498~0.base_27| 4)) (= 0 v_~y$r_buff0_thd2~0_108) (= v_~y$mem_tmp~0_19 0) (= v_~z~0_90 0) (= v_~x~0_77 0) (= v_~y$w_buff1_used~0_407 0) (= v_~main$tmp_guard0~0_21 0) (= |v_#NULL.offset_5| 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~__unbuffered_cnt~0_90) (= v_~y$r_buff1_thd0~0_237 0) (= 0 v_~y$flush_delayed~0_38) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y~0_150 0) (= 0 |v_#NULL.base_5|) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_61|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_34|, ULTIMATE.start_main_~#t2499~0.offset=|v_ULTIMATE.start_main_~#t2499~0.offset_17|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_39|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_62|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_71|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_115, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_53, ~y$flush_delayed~0=v_~y$flush_delayed~0_38, #length=|v_#length_25|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_33|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_118|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_45|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_34|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_37|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_40|, ~y$w_buff1~0=v_~y$w_buff1~0_230, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_237, ~x~0=v_~x~0_77, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t2499~0.base=|v_ULTIMATE.start_main_~#t2499~0.base_20|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_737, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_45|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_37|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_43|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_24|, ULTIMATE.start_main_~#t2500~0.offset=|v_ULTIMATE.start_main_~#t2500~0.offset_16|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_62|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_54, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~y$w_buff0~0=v_~y$w_buff0~0_338, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_169, ~y~0=v_~y~0_150, ULTIMATE.start_main_~#t2498~0.offset=|v_ULTIMATE.start_main_~#t2498~0.offset_20|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_37|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_206|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_43|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_114|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_106, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_42|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_59|, ULTIMATE.start_main_~#t2500~0.base=|v_ULTIMATE.start_main_~#t2500~0.base_20|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t2498~0.base=|v_ULTIMATE.start_main_~#t2498~0.base_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_90, ~weak$$choice2~0=v_~weak$$choice2~0_112, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2499~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2499~0.base, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2500~0.offset, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t2498~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, ULTIMATE.start_main_~#t2500~0.base, #memory_int, ULTIMATE.start_main_~#t2498~0.base, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:33:03,339 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L798-1-->L800: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2499~0.base_9| 1)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2499~0.base_9|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2499~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2499~0.base_9|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2499~0.base_9| 4) |v_#length_15|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2499~0.base_9| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2499~0.base_9|) |v_ULTIMATE.start_main_~#t2499~0.offset_9| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t2499~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2499~0.base=|v_ULTIMATE.start_main_~#t2499~0.base_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2499~0.offset=|v_ULTIMATE.start_main_~#t2499~0.offset_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2499~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t2499~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-11-28 18:33:03,339 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L800-1-->L802: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2500~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2500~0.base_10|) |v_ULTIMATE.start_main_~#t2500~0.offset_9| 2)) |v_#memory_int_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2500~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t2500~0.offset_9|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2500~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2500~0.base_10|)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2500~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2500~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t2500~0.base=|v_ULTIMATE.start_main_~#t2500~0.base_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2500~0.offset=|v_ULTIMATE.start_main_~#t2500~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2500~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t2500~0.offset] because there is no mapped edge [2019-11-28 18:33:03,340 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P2ENTRY-->L4-3: Formula: (and (= ~y$w_buff1_used~0_Out-1329858827 ~y$w_buff0_used~0_In-1329858827) (= |P2Thread1of1ForFork0_#in~arg.base_In-1329858827| P2Thread1of1ForFork0_~arg.base_Out-1329858827) (= |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-1329858827| (ite (not (and (not (= (mod ~y$w_buff0_used~0_Out-1329858827 256) 0)) (not (= (mod ~y$w_buff1_used~0_Out-1329858827 256) 0)))) 1 0)) (= 2 ~y$w_buff0~0_Out-1329858827) (not (= P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out-1329858827 0)) (= 1 ~y$w_buff0_used~0_Out-1329858827) (= ~y$w_buff1~0_Out-1329858827 ~y$w_buff0~0_In-1329858827) (= |P2Thread1of1ForFork0_#in~arg.offset_In-1329858827| P2Thread1of1ForFork0_~arg.offset_Out-1329858827) (= P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out-1329858827 |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-1329858827|)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|P2Thread1of1ForFork0_#in~arg.offset_In-1329858827|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1329858827, ~y$w_buff0~0=~y$w_buff0~0_In-1329858827, P2Thread1of1ForFork0_#in~arg.base=|P2Thread1of1ForFork0_#in~arg.base_In-1329858827|} OutVars{P2Thread1of1ForFork0_~arg.base=P2Thread1of1ForFork0_~arg.base_Out-1329858827, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-1329858827|, P2Thread1of1ForFork0_#in~arg.offset=|P2Thread1of1ForFork0_#in~arg.offset_In-1329858827|, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out-1329858827, ~y$w_buff1~0=~y$w_buff1~0_Out-1329858827, ~y$w_buff0~0=~y$w_buff0~0_Out-1329858827, P2Thread1of1ForFork0_~arg.offset=P2Thread1of1ForFork0_~arg.offset_Out-1329858827, P2Thread1of1ForFork0_#in~arg.base=|P2Thread1of1ForFork0_#in~arg.base_In-1329858827|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out-1329858827, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-1329858827} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:33:03,341 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_60 1) (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= |v_P0Thread1of1ForFork1_#in~arg.base_17| v_P0Thread1of1ForFork1_~arg.base_15) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= v_P0Thread1of1ForFork1_~arg.offset_15 |v_P0Thread1of1ForFork1_#in~arg.offset_17|) (= v_~z~0_51 2) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|} OutVars{P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_15, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, ~z~0=v_~z~0_51, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|, ~x~0=v_~x~0_60, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_15} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:33:03,341 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-198516417 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-198516417 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite11_Out-198516417|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-198516417 |P2Thread1of1ForFork0_#t~ite11_Out-198516417|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-198516417, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-198516417} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-198516417, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-198516417|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-198516417} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:33:03,342 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L746-2-->L746-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out-727778669| |P1Thread1of1ForFork2_#t~ite4_Out-727778669|)) (.cse2 (= (mod ~y$w_buff1_used~0_In-727778669 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In-727778669 256) 0))) (or (and (not .cse0) .cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out-727778669| ~y$w_buff1~0_In-727778669) (not .cse2)) (and .cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out-727778669| ~y~0_In-727778669) (or .cse2 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-727778669, ~y$w_buff1~0=~y$w_buff1~0_In-727778669, ~y~0=~y~0_In-727778669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-727778669} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-727778669, ~y$w_buff1~0=~y$w_buff1~0_In-727778669, P1Thread1of1ForFork2_#t~ite4=|P1Thread1of1ForFork2_#t~ite4_Out-727778669|, ~y~0=~y~0_In-727778669, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-727778669|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-727778669} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:33:03,342 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-2059169880 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-2059169880 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-2059169880 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2059169880 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-2059169880|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-2059169880 |P2Thread1of1ForFork0_#t~ite12_Out-2059169880|) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2059169880, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2059169880, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2059169880, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2059169880} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2059169880, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2059169880, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-2059169880|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2059169880, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2059169880} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:33:03,343 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In427440792 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In427440792 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite5_Out427440792| ~y$w_buff0_used~0_In427440792)) (and (= 0 |P1Thread1of1ForFork2_#t~ite5_Out427440792|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In427440792, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In427440792} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In427440792, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In427440792, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out427440792|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:33:03,344 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L748-->L748-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In-1977889335 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-1977889335 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1977889335 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1977889335 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite6_Out-1977889335| ~y$w_buff1_used~0_In-1977889335) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite6_Out-1977889335|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1977889335, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1977889335, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1977889335, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1977889335} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1977889335, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1977889335, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1977889335, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out-1977889335|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1977889335} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:33:03,344 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-609653734 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-609653734 256)))) (or (and (= ~y$r_buff0_thd2~0_In-609653734 |P1Thread1of1ForFork2_#t~ite7_Out-609653734|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-609653734|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-609653734, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-609653734} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-609653734, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-609653734, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-609653734|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:33:03,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-717166831 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-717166831 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-717166831 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-717166831 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-717166831|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite8_Out-717166831| ~y$r_buff1_thd2~0_In-717166831) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-717166831, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-717166831, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-717166831, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-717166831} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-717166831, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-717166831, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-717166831|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-717166831, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-717166831} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:33:03,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L750-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_34| v_~y$r_buff1_thd2~0_71) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_71, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:33:03,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L778-->L779: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1748024342 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1748024342 256))) (.cse1 (= ~y$r_buff0_thd3~0_In-1748024342 ~y$r_buff0_thd3~0_Out-1748024342))) (or (and .cse0 .cse1) (and (= 0 ~y$r_buff0_thd3~0_Out-1748024342) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1748024342, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1748024342} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1748024342, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1748024342, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1748024342|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:33:03,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L779-->L779-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd3~0_In1558306597 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In1558306597 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In1558306597 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1558306597 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out1558306597| 0)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite14_Out1558306597| ~y$r_buff1_thd3~0_In1558306597)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1558306597, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1558306597, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1558306597, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1558306597} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1558306597|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1558306597, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1558306597, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1558306597, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1558306597} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:33:03,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L779-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_32| v_~y$r_buff1_thd3~0_66) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_31|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_66, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:33:03,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L802-1-->L808: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:33:03,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L808-2-->L808-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite19_Out1210383497| |ULTIMATE.start_main_#t~ite18_Out1210383497|)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1210383497 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1210383497 256) 0))) (or (and (not .cse0) (not .cse1) .cse2 (= ~y$w_buff1~0_In1210383497 |ULTIMATE.start_main_#t~ite18_Out1210383497|)) (and .cse2 (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite18_Out1210383497| ~y~0_In1210383497)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1210383497, ~y~0=~y~0_In1210383497, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1210383497, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1210383497} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1210383497, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1210383497|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1210383497|, ~y~0=~y~0_In1210383497, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1210383497, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1210383497} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:33:03,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-282069831 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-282069831 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-282069831| ~y$w_buff0_used~0_In-282069831) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-282069831| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-282069831, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-282069831} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-282069831, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-282069831, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-282069831|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:33:03,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L810-->L810-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-1223402845 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1223402845 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1223402845 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1223402845 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite21_Out-1223402845| 0)) (and (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-1223402845 |ULTIMATE.start_main_#t~ite21_Out-1223402845|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1223402845, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1223402845, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1223402845, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1223402845} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1223402845, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1223402845, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1223402845|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1223402845, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1223402845} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:33:03,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-731769655 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-731769655 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out-731769655|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite22_Out-731769655| ~y$r_buff0_thd0~0_In-731769655) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-731769655, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-731769655} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-731769655, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-731769655, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-731769655|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:33:03,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L812-->L812-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-564767715 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-564767715 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-564767715 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-564767715 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite23_Out-564767715|)) (and (or .cse2 .cse3) (= ~y$r_buff1_thd0~0_In-564767715 |ULTIMATE.start_main_#t~ite23_Out-564767715|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-564767715, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-564767715, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-564767715, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-564767715} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-564767715, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-564767715, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-564767715, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-564767715|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-564767715} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:33:03,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L820-->L820-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-953274489 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-953274489 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-953274489 256)) .cse0) (and (= 0 (mod ~y$r_buff1_thd0~0_In-953274489 256)) .cse0) (= (mod ~y$w_buff0_used~0_In-953274489 256) 0))) (= ~y$w_buff0~0_In-953274489 |ULTIMATE.start_main_#t~ite29_Out-953274489|) (= |ULTIMATE.start_main_#t~ite30_Out-953274489| |ULTIMATE.start_main_#t~ite29_Out-953274489|) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite29_In-953274489| |ULTIMATE.start_main_#t~ite29_Out-953274489|) (= |ULTIMATE.start_main_#t~ite30_Out-953274489| ~y$w_buff0~0_In-953274489)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-953274489, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-953274489|, ~y$w_buff0~0=~y$w_buff0~0_In-953274489, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-953274489, ~weak$$choice2~0=~weak$$choice2~0_In-953274489, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-953274489, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-953274489} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-953274489|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-953274489, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-953274489|, ~y$w_buff0~0=~y$w_buff0~0_In-953274489, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-953274489, ~weak$$choice2~0=~weak$$choice2~0_In-953274489, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-953274489, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-953274489} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-11-28 18:33:03,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L821-->L821-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1963784482 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite32_Out1963784482| ~y$w_buff1~0_In1963784482) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1963784482 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd0~0_In1963784482 256) 0)) (and .cse1 (= (mod ~y$w_buff1_used~0_In1963784482 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In1963784482 256)))) (= |ULTIMATE.start_main_#t~ite32_Out1963784482| |ULTIMATE.start_main_#t~ite33_Out1963784482|)) (and (= ~y$w_buff1~0_In1963784482 |ULTIMATE.start_main_#t~ite33_Out1963784482|) (not .cse0) (= |ULTIMATE.start_main_#t~ite32_In1963784482| |ULTIMATE.start_main_#t~ite32_Out1963784482|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1963784482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1963784482, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1963784482, ~weak$$choice2~0=~weak$$choice2~0_In1963784482, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1963784482, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In1963784482|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1963784482} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1963784482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1963784482, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1963784482, ~weak$$choice2~0=~weak$$choice2~0_In1963784482, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1963784482|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1963784482, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out1963784482|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1963784482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-11-28 18:33:03,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L822-->L822-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In232027416 256)))) (or (and (= |ULTIMATE.start_main_#t~ite35_In232027416| |ULTIMATE.start_main_#t~ite35_Out232027416|) (not .cse0) (= ~y$w_buff0_used~0_In232027416 |ULTIMATE.start_main_#t~ite36_Out232027416|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In232027416 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd0~0_In232027416 256) 0)) (and .cse1 (= (mod ~y$w_buff1_used~0_In232027416 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In232027416 256)))) .cse0 (= ~y$w_buff0_used~0_In232027416 |ULTIMATE.start_main_#t~ite35_Out232027416|) (= |ULTIMATE.start_main_#t~ite36_Out232027416| |ULTIMATE.start_main_#t~ite35_Out232027416|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In232027416, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In232027416, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In232027416|, ~weak$$choice2~0=~weak$$choice2~0_In232027416, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In232027416, ~y$w_buff1_used~0=~y$w_buff1_used~0_In232027416} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In232027416, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In232027416, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out232027416|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out232027416|, ~weak$$choice2~0=~weak$$choice2~0_In232027416, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In232027416, ~y$w_buff1_used~0=~y$w_buff1_used~0_In232027416} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-11-28 18:33:03,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L824-->L825-8: Formula: (and (= v_~y$r_buff1_thd0~0_226 |v_ULTIMATE.start_main_#t~ite45_60|) (not (= 0 (mod v_~weak$$choice2~0_105 256))) (= |v_ULTIMATE.start_main_#t~ite43_49| |v_ULTIMATE.start_main_#t~ite43_48|) (= |v_ULTIMATE.start_main_#t~ite44_49| |v_ULTIMATE.start_main_#t~ite44_48|) (= v_~y$r_buff0_thd0~0_339 v_~y$r_buff0_thd0~0_338)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_339, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_49|, ~weak$$choice2~0=v_~weak$$choice2~0_105, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_226, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_49|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_35|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_338, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ~weak$$choice2~0=v_~weak$$choice2~0_105, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_226, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_19|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_48|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-11-28 18:33:03,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] L827-->L830-1: Formula: (and (= (mod v_~main$tmp_guard1~0_21 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_~y~0_89 v_~y$mem_tmp~0_11) (= 0 v_~y$flush_delayed~0_23) (not (= (mod v_~y$flush_delayed~0_24 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_23, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~y~0=v_~y~0_89, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:33:03,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L830-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:33:03,488 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:33:03,490 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:33:03,492 INFO L168 Benchmark]: Toolchain (without parser) took 16297.17 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 578.8 MB). Free memory was 951.0 MB in the beginning and 1.2 GB in the end (delta: -238.0 MB). Peak memory consumption was 340.8 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:03,493 INFO L168 Benchmark]: CDTParser took 0.93 ms. Allocated memory is still 1.0 GB. Free memory is still 976.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:33:03,493 INFO L168 Benchmark]: CACSL2BoogieTranslator took 788.83 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.8 MB). Free memory was 945.6 MB in the beginning and 1.1 GB in the end (delta: -168.6 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:03,494 INFO L168 Benchmark]: Boogie Procedure Inliner took 79.41 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:03,494 INFO L168 Benchmark]: Boogie Preprocessor took 39.06 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:33:03,495 INFO L168 Benchmark]: RCFGBuilder took 798.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:03,498 INFO L168 Benchmark]: TraceAbstraction took 14428.96 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 433.1 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -157.5 MB). Peak memory consumption was 275.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:03,498 INFO L168 Benchmark]: Witness Printer took 157.18 ms. Allocated memory is still 1.6 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 25.5 MB). Peak memory consumption was 25.5 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:03,503 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.93 ms. Allocated memory is still 1.0 GB. Free memory is still 976.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 788.83 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.8 MB). Free memory was 945.6 MB in the beginning and 1.1 GB in the end (delta: -168.6 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 79.41 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 39.06 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 798.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 14428.96 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 433.1 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -157.5 MB). Peak memory consumption was 275.6 MB. Max. memory is 11.5 GB. * Witness Printer took 157.18 ms. Allocated memory is still 1.6 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 25.5 MB). Peak memory consumption was 25.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.4s, 161 ProgramPointsBefore, 81 ProgramPointsAfterwards, 192 TransitionsBefore, 86 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 46 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 4050 VarBasedMoverChecksPositive, 194 VarBasedMoverChecksNegative, 29 SemBasedMoverChecksPositive, 227 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.5s, 0 MoverChecksTotal, 46210 CheckedPairsTotal, 110 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L798] FCALL, FORK 0 pthread_create(&t2498, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L800] FCALL, FORK 0 pthread_create(&t2499, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L802] FCALL, FORK 0 pthread_create(&t2500, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L765] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L766] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L767] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L768] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L769] 3 y$r_buff0_thd3 = (_Bool)1 [L772] 3 z = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L775] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 x = 2 [L743] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L775] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L746] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L776] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L746] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L777] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L747] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L748] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L749] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L808] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L809] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L810] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L811] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L812] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L815] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L816] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L817] 0 y$flush_delayed = weak$$choice2 [L818] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L819] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L819] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L820] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L821] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L822] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L823] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L823] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L825] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L826] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 152 locations, 2 error locations. Result: UNSAFE, OverallTime: 14.1s, OverallIterations: 14, TraceHistogramMax: 1, AutomataDifference: 2.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1224 SDtfs, 925 SDslu, 2538 SDs, 0 SdLazy, 1034 SolverSat, 63 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 85 GetRequests, 22 SyntacticMatches, 6 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21678occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.6s AutomataMinimizationTime, 13 MinimizatonAttempts, 3700 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 570 NumberOfCodeBlocks, 570 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 501 ConstructedInterpolants, 0 QuantifiedInterpolants, 102676 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 13 InterpolantComputations, 13 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...