./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe031_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe031_rmo.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2b02757bf4ae4f54cb849d3632e927e001c40b7b ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 18:33:00,688 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 18:33:00,691 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 18:33:00,704 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 18:33:00,705 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 18:33:00,706 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 18:33:00,708 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 18:33:00,710 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 18:33:00,712 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 18:33:00,713 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 18:33:00,714 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 18:33:00,715 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 18:33:00,716 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 18:33:00,717 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 18:33:00,718 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 18:33:00,720 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 18:33:00,721 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 18:33:00,722 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 18:33:00,724 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 18:33:00,726 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 18:33:00,728 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 18:33:00,729 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 18:33:00,730 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 18:33:00,732 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 18:33:00,734 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 18:33:00,735 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 18:33:00,735 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 18:33:00,736 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 18:33:00,736 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 18:33:00,738 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 18:33:00,738 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 18:33:00,739 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 18:33:00,740 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 18:33:00,741 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 18:33:00,742 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 18:33:00,742 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 18:33:00,743 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 18:33:00,743 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 18:33:00,744 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 18:33:00,745 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 18:33:00,746 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 18:33:00,747 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 18:33:00,762 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 18:33:00,762 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 18:33:00,764 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 18:33:00,764 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 18:33:00,764 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 18:33:00,765 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 18:33:00,765 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 18:33:00,765 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 18:33:00,766 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 18:33:00,766 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 18:33:00,766 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 18:33:00,766 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 18:33:00,767 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 18:33:00,767 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 18:33:00,767 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 18:33:00,768 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 18:33:00,768 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 18:33:00,768 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 18:33:00,768 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 18:33:00,769 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 18:33:00,769 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 18:33:00,769 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:33:00,770 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 18:33:00,770 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 18:33:00,770 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 18:33:00,771 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 18:33:00,771 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 18:33:00,771 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 18:33:00,771 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 18:33:00,772 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2b02757bf4ae4f54cb849d3632e927e001c40b7b [2019-11-28 18:33:01,078 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 18:33:01,092 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 18:33:01,096 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 18:33:01,097 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 18:33:01,098 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 18:33:01,099 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe031_rmo.opt.i [2019-11-28 18:33:01,163 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ee57f385a/8ac02410443243bc9af9ad195601e5b9/FLAGaec3eda27 [2019-11-28 18:33:01,736 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 18:33:01,737 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe031_rmo.opt.i [2019-11-28 18:33:01,770 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ee57f385a/8ac02410443243bc9af9ad195601e5b9/FLAGaec3eda27 [2019-11-28 18:33:02,026 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ee57f385a/8ac02410443243bc9af9ad195601e5b9 [2019-11-28 18:33:02,030 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 18:33:02,031 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 18:33:02,032 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 18:33:02,033 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 18:33:02,036 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 18:33:02,037 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,040 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c1dbb8c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02, skipping insertion in model container [2019-11-28 18:33:02,041 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,049 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 18:33:02,117 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 18:33:02,699 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:33:02,712 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 18:33:02,803 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 18:33:02,890 INFO L208 MainTranslator]: Completed translation [2019-11-28 18:33:02,891 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02 WrapperNode [2019-11-28 18:33:02,891 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 18:33:02,892 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 18:33:02,892 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 18:33:02,892 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 18:33:02,901 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,924 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,962 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 18:33:02,963 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 18:33:02,963 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 18:33:02,963 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 18:33:02,974 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,974 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,983 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,984 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,994 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:02,998 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:03,002 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... [2019-11-28 18:33:03,007 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 18:33:03,008 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 18:33:03,008 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 18:33:03,008 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 18:33:03,009 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 18:33:03,089 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-28 18:33:03,089 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-28 18:33:03,090 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-28 18:33:03,090 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-28 18:33:03,091 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-28 18:33:03,091 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-28 18:33:03,091 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-28 18:33:03,091 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-28 18:33:03,091 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-28 18:33:03,092 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-28 18:33:03,093 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-28 18:33:03,093 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 18:33:03,093 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 18:33:03,096 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-28 18:33:03,855 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 18:33:03,855 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-28 18:33:03,857 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:33:03 BoogieIcfgContainer [2019-11-28 18:33:03,858 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 18:33:03,859 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 18:33:03,859 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 18:33:03,863 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 18:33:03,863 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 06:33:02" (1/3) ... [2019-11-28 18:33:03,864 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@577d8b6f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:33:03, skipping insertion in model container [2019-11-28 18:33:03,865 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 06:33:02" (2/3) ... [2019-11-28 18:33:03,865 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@577d8b6f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 06:33:03, skipping insertion in model container [2019-11-28 18:33:03,866 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:33:03" (3/3) ... [2019-11-28 18:33:03,868 INFO L109 eAbstractionObserver]: Analyzing ICFG safe031_rmo.opt.i [2019-11-28 18:33:03,879 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-28 18:33:03,879 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 18:33:03,893 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-28 18:33:03,894 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-11-28 18:33:03,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,933 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,933 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,934 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,935 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,935 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,939 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,943 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,946 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,946 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,946 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,946 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,951 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,952 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,953 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,953 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,954 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,958 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,958 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,958 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,960 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,960 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,961 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,961 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,961 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,962 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,962 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,962 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,963 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,964 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,964 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,964 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,965 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,965 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,965 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-28 18:33:03,985 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-11-28 18:33:04,005 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 18:33:04,005 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 18:33:04,005 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 18:33:04,006 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 18:33:04,006 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 18:33:04,006 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 18:33:04,006 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 18:33:04,006 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 18:33:04,024 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 162 places, 193 transitions [2019-11-28 18:33:04,026 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 162 places, 193 transitions [2019-11-28 18:33:04,117 INFO L134 PetriNetUnfolder]: 41/190 cut-off events. [2019-11-28 18:33:04,117 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:33:04,132 INFO L76 FinitePrefix]: Finished finitePrefix Result has 200 conditions, 190 events. 41/190 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 476 event pairs. 9/156 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:33:04,154 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 162 places, 193 transitions [2019-11-28 18:33:04,211 INFO L134 PetriNetUnfolder]: 41/190 cut-off events. [2019-11-28 18:33:04,211 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-11-28 18:33:04,221 INFO L76 FinitePrefix]: Finished finitePrefix Result has 200 conditions, 190 events. 41/190 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 476 event pairs. 9/156 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-11-28 18:33:04,239 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-11-28 18:33:04,240 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-11-28 18:33:08,956 WARN L192 SmtUtils]: Spent 293.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-11-28 18:33:09,074 WARN L192 SmtUtils]: Spent 114.00 ms on a formula simplification that was a NOOP. DAG size: 83 [2019-11-28 18:33:09,095 INFO L206 etLargeBlockEncoding]: Checked pairs total: 48124 [2019-11-28 18:33:09,095 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-11-28 18:33:09,099 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 94 transitions [2019-11-28 18:33:10,641 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 15710 states. [2019-11-28 18:33:10,644 INFO L276 IsEmpty]: Start isEmpty. Operand 15710 states. [2019-11-28 18:33:10,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-11-28 18:33:10,651 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:10,652 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:10,653 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:10,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:10,660 INFO L82 PathProgramCache]: Analyzing trace with hash 2126234855, now seen corresponding path program 1 times [2019-11-28 18:33:10,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:10,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698866520] [2019-11-28 18:33:10,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:10,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:10,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:10,950 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698866520] [2019-11-28 18:33:10,951 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:10,951 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-11-28 18:33:10,952 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1719187491] [2019-11-28 18:33:10,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:33:10,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:10,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:33:10,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:10,974 INFO L87 Difference]: Start difference. First operand 15710 states. Second operand 3 states. [2019-11-28 18:33:11,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:11,379 INFO L93 Difference]: Finished difference Result 15638 states and 59348 transitions. [2019-11-28 18:33:11,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:33:11,382 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-11-28 18:33:11,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:11,584 INFO L225 Difference]: With dead ends: 15638 [2019-11-28 18:33:11,584 INFO L226 Difference]: Without dead ends: 15326 [2019-11-28 18:33:11,585 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:11,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15326 states. [2019-11-28 18:33:12,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15326 to 15326. [2019-11-28 18:33:12,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15326 states. [2019-11-28 18:33:12,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15326 states to 15326 states and 58230 transitions. [2019-11-28 18:33:12,468 INFO L78 Accepts]: Start accepts. Automaton has 15326 states and 58230 transitions. Word has length 7 [2019-11-28 18:33:12,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:12,469 INFO L462 AbstractCegarLoop]: Abstraction has 15326 states and 58230 transitions. [2019-11-28 18:33:12,470 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:12,470 INFO L276 IsEmpty]: Start isEmpty. Operand 15326 states and 58230 transitions. [2019-11-28 18:33:12,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:33:12,475 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:12,475 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:12,475 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:12,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:12,476 INFO L82 PathProgramCache]: Analyzing trace with hash -380072381, now seen corresponding path program 1 times [2019-11-28 18:33:12,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:12,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1910526407] [2019-11-28 18:33:12,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:12,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:12,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:12,656 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1910526407] [2019-11-28 18:33:12,656 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:12,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:33:12,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012084992] [2019-11-28 18:33:12,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:33:12,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:12,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:33:12,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:33:12,660 INFO L87 Difference]: Start difference. First operand 15326 states and 58230 transitions. Second operand 4 states. [2019-11-28 18:33:13,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:13,120 INFO L93 Difference]: Finished difference Result 24490 states and 89350 transitions. [2019-11-28 18:33:13,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:33:13,120 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-28 18:33:13,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:13,225 INFO L225 Difference]: With dead ends: 24490 [2019-11-28 18:33:13,226 INFO L226 Difference]: Without dead ends: 24476 [2019-11-28 18:33:13,228 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:33:13,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24476 states. [2019-11-28 18:33:14,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24476 to 22206. [2019-11-28 18:33:14,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22206 states. [2019-11-28 18:33:14,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22206 states to 22206 states and 82052 transitions. [2019-11-28 18:33:14,418 INFO L78 Accepts]: Start accepts. Automaton has 22206 states and 82052 transitions. Word has length 13 [2019-11-28 18:33:14,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:14,419 INFO L462 AbstractCegarLoop]: Abstraction has 22206 states and 82052 transitions. [2019-11-28 18:33:14,419 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:33:14,420 INFO L276 IsEmpty]: Start isEmpty. Operand 22206 states and 82052 transitions. [2019-11-28 18:33:14,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-28 18:33:14,427 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:14,428 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:14,428 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:14,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:14,429 INFO L82 PathProgramCache]: Analyzing trace with hash 691839138, now seen corresponding path program 1 times [2019-11-28 18:33:14,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:14,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604010221] [2019-11-28 18:33:14,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:14,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:14,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:14,533 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604010221] [2019-11-28 18:33:14,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:14,534 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:33:14,534 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [513926582] [2019-11-28 18:33:14,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:33:14,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:14,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:33:14,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:14,535 INFO L87 Difference]: Start difference. First operand 22206 states and 82052 transitions. Second operand 3 states. [2019-11-28 18:33:14,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:14,602 INFO L93 Difference]: Finished difference Result 12702 states and 40687 transitions. [2019-11-28 18:33:14,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:33:14,603 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-11-28 18:33:14,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:14,643 INFO L225 Difference]: With dead ends: 12702 [2019-11-28 18:33:14,643 INFO L226 Difference]: Without dead ends: 12702 [2019-11-28 18:33:14,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:14,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12702 states. [2019-11-28 18:33:14,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12702 to 12702. [2019-11-28 18:33:14,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12702 states. [2019-11-28 18:33:15,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12702 states to 12702 states and 40687 transitions. [2019-11-28 18:33:15,022 INFO L78 Accepts]: Start accepts. Automaton has 12702 states and 40687 transitions. Word has length 13 [2019-11-28 18:33:15,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:15,022 INFO L462 AbstractCegarLoop]: Abstraction has 12702 states and 40687 transitions. [2019-11-28 18:33:15,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:15,022 INFO L276 IsEmpty]: Start isEmpty. Operand 12702 states and 40687 transitions. [2019-11-28 18:33:15,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-28 18:33:15,024 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:15,024 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:15,024 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:15,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:15,025 INFO L82 PathProgramCache]: Analyzing trace with hash 1718037058, now seen corresponding path program 1 times [2019-11-28 18:33:15,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:15,026 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1366847235] [2019-11-28 18:33:15,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:15,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:15,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:15,075 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1366847235] [2019-11-28 18:33:15,075 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:15,075 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:33:15,076 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533200620] [2019-11-28 18:33:15,076 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-28 18:33:15,076 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:15,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-28 18:33:15,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:33:15,077 INFO L87 Difference]: Start difference. First operand 12702 states and 40687 transitions. Second operand 4 states. [2019-11-28 18:33:15,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:15,100 INFO L93 Difference]: Finished difference Result 1935 states and 4569 transitions. [2019-11-28 18:33:15,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-28 18:33:15,101 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-28 18:33:15,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:15,106 INFO L225 Difference]: With dead ends: 1935 [2019-11-28 18:33:15,106 INFO L226 Difference]: Without dead ends: 1935 [2019-11-28 18:33:15,107 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-28 18:33:15,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1935 states. [2019-11-28 18:33:15,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1935 to 1935. [2019-11-28 18:33:15,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1935 states. [2019-11-28 18:33:15,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1935 states to 1935 states and 4569 transitions. [2019-11-28 18:33:15,147 INFO L78 Accepts]: Start accepts. Automaton has 1935 states and 4569 transitions. Word has length 14 [2019-11-28 18:33:15,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:15,148 INFO L462 AbstractCegarLoop]: Abstraction has 1935 states and 4569 transitions. [2019-11-28 18:33:15,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-28 18:33:15,148 INFO L276 IsEmpty]: Start isEmpty. Operand 1935 states and 4569 transitions. [2019-11-28 18:33:15,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-28 18:33:15,150 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:15,150 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:15,150 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:15,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:15,151 INFO L82 PathProgramCache]: Analyzing trace with hash 968226525, now seen corresponding path program 1 times [2019-11-28 18:33:15,151 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:15,151 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65595069] [2019-11-28 18:33:15,151 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:15,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:15,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:15,409 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65595069] [2019-11-28 18:33:15,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:15,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:33:15,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037035350] [2019-11-28 18:33:15,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-28 18:33:15,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:15,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-28 18:33:15,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-28 18:33:15,411 INFO L87 Difference]: Start difference. First operand 1935 states and 4569 transitions. Second operand 7 states. [2019-11-28 18:33:16,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:16,028 INFO L93 Difference]: Finished difference Result 2383 states and 5481 transitions. [2019-11-28 18:33:16,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-28 18:33:16,028 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2019-11-28 18:33:16,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:16,033 INFO L225 Difference]: With dead ends: 2383 [2019-11-28 18:33:16,033 INFO L226 Difference]: Without dead ends: 2383 [2019-11-28 18:33:16,034 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:33:16,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2383 states. [2019-11-28 18:33:16,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2383 to 2164. [2019-11-28 18:33:16,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2164 states. [2019-11-28 18:33:16,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2164 states to 2164 states and 5049 transitions. [2019-11-28 18:33:16,079 INFO L78 Accepts]: Start accepts. Automaton has 2164 states and 5049 transitions. Word has length 26 [2019-11-28 18:33:16,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:16,080 INFO L462 AbstractCegarLoop]: Abstraction has 2164 states and 5049 transitions. [2019-11-28 18:33:16,080 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-28 18:33:16,080 INFO L276 IsEmpty]: Start isEmpty. Operand 2164 states and 5049 transitions. [2019-11-28 18:33:16,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-11-28 18:33:16,085 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:16,086 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:16,086 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:16,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:16,086 INFO L82 PathProgramCache]: Analyzing trace with hash 1740964695, now seen corresponding path program 1 times [2019-11-28 18:33:16,087 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:16,087 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751431498] [2019-11-28 18:33:16,087 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:16,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:16,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:16,151 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [751431498] [2019-11-28 18:33:16,151 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:16,151 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 18:33:16,151 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1097993803] [2019-11-28 18:33:16,152 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:33:16,153 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:16,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:33:16,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:16,154 INFO L87 Difference]: Start difference. First operand 2164 states and 5049 transitions. Second operand 3 states. [2019-11-28 18:33:16,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:16,217 INFO L93 Difference]: Finished difference Result 2506 states and 5736 transitions. [2019-11-28 18:33:16,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:33:16,218 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-11-28 18:33:16,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:16,223 INFO L225 Difference]: With dead ends: 2506 [2019-11-28 18:33:16,224 INFO L226 Difference]: Without dead ends: 2506 [2019-11-28 18:33:16,224 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:16,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2506 states. [2019-11-28 18:33:16,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2506 to 2291. [2019-11-28 18:33:16,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2291 states. [2019-11-28 18:33:16,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2291 states to 2291 states and 5311 transitions. [2019-11-28 18:33:16,278 INFO L78 Accepts]: Start accepts. Automaton has 2291 states and 5311 transitions. Word has length 40 [2019-11-28 18:33:16,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:16,278 INFO L462 AbstractCegarLoop]: Abstraction has 2291 states and 5311 transitions. [2019-11-28 18:33:16,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:16,279 INFO L276 IsEmpty]: Start isEmpty. Operand 2291 states and 5311 transitions. [2019-11-28 18:33:16,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-11-28 18:33:16,284 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:16,284 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:16,285 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:16,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:16,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1644769556, now seen corresponding path program 1 times [2019-11-28 18:33:16,286 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:16,286 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122764986] [2019-11-28 18:33:16,286 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:16,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:16,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:16,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122764986] [2019-11-28 18:33:16,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:16,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-28 18:33:16,687 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2106740089] [2019-11-28 18:33:16,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-28 18:33:16,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:16,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-28 18:33:16,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:33:16,688 INFO L87 Difference]: Start difference. First operand 2291 states and 5311 transitions. Second operand 8 states. [2019-11-28 18:33:17,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:17,277 INFO L93 Difference]: Finished difference Result 2641 states and 5989 transitions. [2019-11-28 18:33:17,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:33:17,278 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2019-11-28 18:33:17,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:17,282 INFO L225 Difference]: With dead ends: 2641 [2019-11-28 18:33:17,282 INFO L226 Difference]: Without dead ends: 2640 [2019-11-28 18:33:17,283 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-28 18:33:17,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2640 states. [2019-11-28 18:33:17,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2640 to 2314. [2019-11-28 18:33:17,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2314 states. [2019-11-28 18:33:17,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2314 states to 2314 states and 5358 transitions. [2019-11-28 18:33:17,325 INFO L78 Accepts]: Start accepts. Automaton has 2314 states and 5358 transitions. Word has length 40 [2019-11-28 18:33:17,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:17,326 INFO L462 AbstractCegarLoop]: Abstraction has 2314 states and 5358 transitions. [2019-11-28 18:33:17,326 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-28 18:33:17,326 INFO L276 IsEmpty]: Start isEmpty. Operand 2314 states and 5358 transitions. [2019-11-28 18:33:17,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-11-28 18:33:17,330 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:17,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:17,330 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:17,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:17,331 INFO L82 PathProgramCache]: Analyzing trace with hash 1745362377, now seen corresponding path program 1 times [2019-11-28 18:33:17,331 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:17,331 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066466868] [2019-11-28 18:33:17,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:17,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:17,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:17,405 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066466868] [2019-11-28 18:33:17,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:17,406 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-28 18:33:17,406 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2001900626] [2019-11-28 18:33:17,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:33:17,407 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:17,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:33:17,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:33:17,407 INFO L87 Difference]: Start difference. First operand 2314 states and 5358 transitions. Second operand 5 states. [2019-11-28 18:33:17,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:17,442 INFO L93 Difference]: Finished difference Result 653 states and 1502 transitions. [2019-11-28 18:33:17,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-28 18:33:17,443 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-11-28 18:33:17,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:17,445 INFO L225 Difference]: With dead ends: 653 [2019-11-28 18:33:17,445 INFO L226 Difference]: Without dead ends: 653 [2019-11-28 18:33:17,447 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:33:17,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 653 states. [2019-11-28 18:33:17,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 653 to 597. [2019-11-28 18:33:17,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 597 states. [2019-11-28 18:33:17,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 597 states to 597 states and 1370 transitions. [2019-11-28 18:33:17,461 INFO L78 Accepts]: Start accepts. Automaton has 597 states and 1370 transitions. Word has length 40 [2019-11-28 18:33:17,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:17,462 INFO L462 AbstractCegarLoop]: Abstraction has 597 states and 1370 transitions. [2019-11-28 18:33:17,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:33:17,462 INFO L276 IsEmpty]: Start isEmpty. Operand 597 states and 1370 transitions. [2019-11-28 18:33:17,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-28 18:33:17,466 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:17,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:17,466 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:17,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:17,467 INFO L82 PathProgramCache]: Analyzing trace with hash -922835002, now seen corresponding path program 1 times [2019-11-28 18:33:17,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:17,468 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833097776] [2019-11-28 18:33:17,468 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:17,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:17,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:17,594 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [833097776] [2019-11-28 18:33:17,595 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:17,595 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:33:17,596 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1691389070] [2019-11-28 18:33:17,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:33:17,596 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:17,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:33:17,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:17,597 INFO L87 Difference]: Start difference. First operand 597 states and 1370 transitions. Second operand 3 states. [2019-11-28 18:33:17,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:17,612 INFO L93 Difference]: Finished difference Result 597 states and 1346 transitions. [2019-11-28 18:33:17,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:33:17,613 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-11-28 18:33:17,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:17,613 INFO L225 Difference]: With dead ends: 597 [2019-11-28 18:33:17,614 INFO L226 Difference]: Without dead ends: 597 [2019-11-28 18:33:17,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:17,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 597 states. [2019-11-28 18:33:17,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 597 to 597. [2019-11-28 18:33:17,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 597 states. [2019-11-28 18:33:17,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 597 states to 597 states and 1346 transitions. [2019-11-28 18:33:17,625 INFO L78 Accepts]: Start accepts. Automaton has 597 states and 1346 transitions. Word has length 55 [2019-11-28 18:33:17,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:17,628 INFO L462 AbstractCegarLoop]: Abstraction has 597 states and 1346 transitions. [2019-11-28 18:33:17,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:17,628 INFO L276 IsEmpty]: Start isEmpty. Operand 597 states and 1346 transitions. [2019-11-28 18:33:17,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:17,631 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:17,632 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:17,632 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:17,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:17,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1916501781, now seen corresponding path program 1 times [2019-11-28 18:33:17,633 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:17,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [421362909] [2019-11-28 18:33:17,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:17,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:17,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:17,740 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [421362909] [2019-11-28 18:33:17,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:17,741 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:33:17,741 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1283283186] [2019-11-28 18:33:17,741 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 18:33:17,741 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:17,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 18:33:17,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 18:33:17,742 INFO L87 Difference]: Start difference. First operand 597 states and 1346 transitions. Second operand 5 states. [2019-11-28 18:33:17,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:17,931 INFO L93 Difference]: Finished difference Result 868 states and 1969 transitions. [2019-11-28 18:33:17,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:33:17,932 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-11-28 18:33:17,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:17,934 INFO L225 Difference]: With dead ends: 868 [2019-11-28 18:33:17,934 INFO L226 Difference]: Without dead ends: 868 [2019-11-28 18:33:17,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:33:17,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 868 states. [2019-11-28 18:33:17,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 868 to 766. [2019-11-28 18:33:17,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 766 states. [2019-11-28 18:33:17,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 766 states to 766 states and 1736 transitions. [2019-11-28 18:33:17,956 INFO L78 Accepts]: Start accepts. Automaton has 766 states and 1736 transitions. Word has length 56 [2019-11-28 18:33:17,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:17,956 INFO L462 AbstractCegarLoop]: Abstraction has 766 states and 1736 transitions. [2019-11-28 18:33:17,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 18:33:17,957 INFO L276 IsEmpty]: Start isEmpty. Operand 766 states and 1736 transitions. [2019-11-28 18:33:17,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:17,959 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:17,959 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:17,959 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:17,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:17,960 INFO L82 PathProgramCache]: Analyzing trace with hash 510672277, now seen corresponding path program 2 times [2019-11-28 18:33:17,960 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:17,961 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612075512] [2019-11-28 18:33:17,961 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:18,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:18,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:18,371 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612075512] [2019-11-28 18:33:18,372 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:18,372 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-28 18:33:18,372 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1273421513] [2019-11-28 18:33:18,373 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-28 18:33:18,373 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:18,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-28 18:33:18,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:33:18,374 INFO L87 Difference]: Start difference. First operand 766 states and 1736 transitions. Second operand 9 states. [2019-11-28 18:33:18,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:18,748 INFO L93 Difference]: Finished difference Result 990 states and 2225 transitions. [2019-11-28 18:33:18,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-28 18:33:18,749 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 56 [2019-11-28 18:33:18,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:18,751 INFO L225 Difference]: With dead ends: 990 [2019-11-28 18:33:18,751 INFO L226 Difference]: Without dead ends: 990 [2019-11-28 18:33:18,752 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:33:18,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 990 states. [2019-11-28 18:33:18,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 990 to 782. [2019-11-28 18:33:18,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 782 states. [2019-11-28 18:33:18,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 782 states to 782 states and 1776 transitions. [2019-11-28 18:33:18,768 INFO L78 Accepts]: Start accepts. Automaton has 782 states and 1776 transitions. Word has length 56 [2019-11-28 18:33:18,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:18,768 INFO L462 AbstractCegarLoop]: Abstraction has 782 states and 1776 transitions. [2019-11-28 18:33:18,768 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-28 18:33:18,768 INFO L276 IsEmpty]: Start isEmpty. Operand 782 states and 1776 transitions. [2019-11-28 18:33:18,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:18,770 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:18,771 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:18,771 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:18,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:18,771 INFO L82 PathProgramCache]: Analyzing trace with hash 931750229, now seen corresponding path program 3 times [2019-11-28 18:33:18,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:18,772 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433419088] [2019-11-28 18:33:18,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:18,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:18,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:18,894 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [433419088] [2019-11-28 18:33:18,894 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:18,894 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:33:18,895 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053988438] [2019-11-28 18:33:18,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:33:18,895 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:18,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:33:18,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:33:18,896 INFO L87 Difference]: Start difference. First operand 782 states and 1776 transitions. Second operand 6 states. [2019-11-28 18:33:18,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:18,972 INFO L93 Difference]: Finished difference Result 1196 states and 2517 transitions. [2019-11-28 18:33:18,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:33:18,972 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-11-28 18:33:18,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:18,974 INFO L225 Difference]: With dead ends: 1196 [2019-11-28 18:33:18,974 INFO L226 Difference]: Without dead ends: 762 [2019-11-28 18:33:18,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:33:18,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 762 states. [2019-11-28 18:33:18,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 762 to 720. [2019-11-28 18:33:18,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 720 states. [2019-11-28 18:33:18,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 720 states to 720 states and 1597 transitions. [2019-11-28 18:33:18,988 INFO L78 Accepts]: Start accepts. Automaton has 720 states and 1597 transitions. Word has length 56 [2019-11-28 18:33:18,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:18,988 INFO L462 AbstractCegarLoop]: Abstraction has 720 states and 1597 transitions. [2019-11-28 18:33:18,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:33:18,988 INFO L276 IsEmpty]: Start isEmpty. Operand 720 states and 1597 transitions. [2019-11-28 18:33:18,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:18,990 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:18,991 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:18,991 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:18,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:18,991 INFO L82 PathProgramCache]: Analyzing trace with hash 1194857685, now seen corresponding path program 4 times [2019-11-28 18:33:18,992 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:18,992 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644371759] [2019-11-28 18:33:18,992 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:19,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:19,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:19,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644371759] [2019-11-28 18:33:19,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:19,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 18:33:19,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466114177] [2019-11-28 18:33:19,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-28 18:33:19,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:19,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-28 18:33:19,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-28 18:33:19,098 INFO L87 Difference]: Start difference. First operand 720 states and 1597 transitions. Second operand 6 states. [2019-11-28 18:33:19,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:19,162 INFO L93 Difference]: Finished difference Result 977 states and 2052 transitions. [2019-11-28 18:33:19,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 18:33:19,163 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-11-28 18:33:19,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:19,164 INFO L225 Difference]: With dead ends: 977 [2019-11-28 18:33:19,164 INFO L226 Difference]: Without dead ends: 294 [2019-11-28 18:33:19,164 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-28 18:33:19,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2019-11-28 18:33:19,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 294. [2019-11-28 18:33:19,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2019-11-28 18:33:19,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 520 transitions. [2019-11-28 18:33:19,171 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 520 transitions. Word has length 56 [2019-11-28 18:33:19,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:19,171 INFO L462 AbstractCegarLoop]: Abstraction has 294 states and 520 transitions. [2019-11-28 18:33:19,171 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-28 18:33:19,171 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 520 transitions. [2019-11-28 18:33:19,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:19,172 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:19,173 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:19,173 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:19,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:19,173 INFO L82 PathProgramCache]: Analyzing trace with hash 125210929, now seen corresponding path program 5 times [2019-11-28 18:33:19,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:19,174 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387328807] [2019-11-28 18:33:19,174 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:19,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:19,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:19,323 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387328807] [2019-11-28 18:33:19,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:19,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-28 18:33:19,325 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [323950787] [2019-11-28 18:33:19,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-28 18:33:19,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:19,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-28 18:33:19,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-11-28 18:33:19,326 INFO L87 Difference]: Start difference. First operand 294 states and 520 transitions. Second operand 8 states. [2019-11-28 18:33:19,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:19,769 INFO L93 Difference]: Finished difference Result 525 states and 930 transitions. [2019-11-28 18:33:19,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-28 18:33:19,769 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2019-11-28 18:33:19,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:19,770 INFO L225 Difference]: With dead ends: 525 [2019-11-28 18:33:19,770 INFO L226 Difference]: Without dead ends: 525 [2019-11-28 18:33:19,771 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2019-11-28 18:33:19,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states. [2019-11-28 18:33:19,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 336. [2019-11-28 18:33:19,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 336 states. [2019-11-28 18:33:19,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 336 states to 336 states and 597 transitions. [2019-11-28 18:33:19,779 INFO L78 Accepts]: Start accepts. Automaton has 336 states and 597 transitions. Word has length 56 [2019-11-28 18:33:19,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:19,779 INFO L462 AbstractCegarLoop]: Abstraction has 336 states and 597 transitions. [2019-11-28 18:33:19,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-28 18:33:19,780 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 597 transitions. [2019-11-28 18:33:19,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-28 18:33:19,781 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:19,781 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:19,781 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:19,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:19,782 INFO L82 PathProgramCache]: Analyzing trace with hash 791586909, now seen corresponding path program 6 times [2019-11-28 18:33:19,782 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:19,783 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997846008] [2019-11-28 18:33:19,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:19,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:19,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:19,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997846008] [2019-11-28 18:33:19,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:19,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 18:33:19,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2056478030] [2019-11-28 18:33:19,839 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 18:33:19,839 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:19,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 18:33:19,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:19,840 INFO L87 Difference]: Start difference. First operand 336 states and 597 transitions. Second operand 3 states. [2019-11-28 18:33:19,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:19,881 INFO L93 Difference]: Finished difference Result 336 states and 596 transitions. [2019-11-28 18:33:19,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 18:33:19,881 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-11-28 18:33:19,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:19,882 INFO L225 Difference]: With dead ends: 336 [2019-11-28 18:33:19,882 INFO L226 Difference]: Without dead ends: 336 [2019-11-28 18:33:19,883 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 18:33:19,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2019-11-28 18:33:19,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 209. [2019-11-28 18:33:19,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-11-28 18:33:19,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 365 transitions. [2019-11-28 18:33:19,888 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 365 transitions. Word has length 56 [2019-11-28 18:33:19,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:19,889 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 365 transitions. [2019-11-28 18:33:19,889 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 18:33:19,889 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 365 transitions. [2019-11-28 18:33:19,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:33:19,890 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:19,890 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:19,891 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:19,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:19,891 INFO L82 PathProgramCache]: Analyzing trace with hash -431408076, now seen corresponding path program 1 times [2019-11-28 18:33:19,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:19,892 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047214785] [2019-11-28 18:33:19,892 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:19,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:20,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:20,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047214785] [2019-11-28 18:33:20,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:20,376 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-28 18:33:20,376 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [94378258] [2019-11-28 18:33:20,376 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-11-28 18:33:20,376 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:20,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-11-28 18:33:20,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-11-28 18:33:20,379 INFO L87 Difference]: Start difference. First operand 209 states and 365 transitions. Second operand 14 states. [2019-11-28 18:33:21,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:21,064 INFO L93 Difference]: Finished difference Result 378 states and 643 transitions. [2019-11-28 18:33:21,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-28 18:33:21,064 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 57 [2019-11-28 18:33:21,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:21,065 INFO L225 Difference]: With dead ends: 378 [2019-11-28 18:33:21,066 INFO L226 Difference]: Without dead ends: 343 [2019-11-28 18:33:21,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=113, Invalid=537, Unknown=0, NotChecked=0, Total=650 [2019-11-28 18:33:21,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2019-11-28 18:33:21,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 309. [2019-11-28 18:33:21,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 309 states. [2019-11-28 18:33:21,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 309 states to 309 states and 536 transitions. [2019-11-28 18:33:21,072 INFO L78 Accepts]: Start accepts. Automaton has 309 states and 536 transitions. Word has length 57 [2019-11-28 18:33:21,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:21,072 INFO L462 AbstractCegarLoop]: Abstraction has 309 states and 536 transitions. [2019-11-28 18:33:21,072 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-11-28 18:33:21,072 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 536 transitions. [2019-11-28 18:33:21,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:33:21,073 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:21,073 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:21,074 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:21,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:21,074 INFO L82 PathProgramCache]: Analyzing trace with hash -1239613688, now seen corresponding path program 2 times [2019-11-28 18:33:21,074 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:21,074 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [734495382] [2019-11-28 18:33:21,074 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:21,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 18:33:21,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 18:33:21,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [734495382] [2019-11-28 18:33:21,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 18:33:21,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-28 18:33:21,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364570372] [2019-11-28 18:33:21,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-28 18:33:21,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 18:33:21,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-28 18:33:21,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-11-28 18:33:21,330 INFO L87 Difference]: Start difference. First operand 309 states and 536 transitions. Second operand 13 states. [2019-11-28 18:33:21,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 18:33:21,897 INFO L93 Difference]: Finished difference Result 414 states and 694 transitions. [2019-11-28 18:33:21,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-28 18:33:21,898 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-11-28 18:33:21,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 18:33:21,898 INFO L225 Difference]: With dead ends: 414 [2019-11-28 18:33:21,898 INFO L226 Difference]: Without dead ends: 379 [2019-11-28 18:33:21,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=112, Invalid=488, Unknown=0, NotChecked=0, Total=600 [2019-11-28 18:33:21,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states. [2019-11-28 18:33:21,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 317. [2019-11-28 18:33:21,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-11-28 18:33:21,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 550 transitions. [2019-11-28 18:33:21,906 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 550 transitions. Word has length 57 [2019-11-28 18:33:21,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 18:33:21,906 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 550 transitions. [2019-11-28 18:33:21,907 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-28 18:33:21,907 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 550 transitions. [2019-11-28 18:33:21,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-11-28 18:33:21,908 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 18:33:21,908 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 18:33:21,908 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 18:33:21,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 18:33:21,909 INFO L82 PathProgramCache]: Analyzing trace with hash -97225810, now seen corresponding path program 3 times [2019-11-28 18:33:21,909 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 18:33:21,909 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532304492] [2019-11-28 18:33:21,909 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 18:33:21,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:33:21,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 18:33:22,014 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 18:33:22,015 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 18:33:22,019 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] ULTIMATE.startENTRY-->L802: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= v_~y$w_buff1~0_198 0) (= v_~x~0_55 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t2528~0.base_22|) 0) (= v_~weak$$choice2~0_120 0) (= v_~main$tmp_guard1~0_31 0) (= v_~y$r_buff1_thd0~0_279 0) (= 0 v_~y$r_buff1_thd2~0_191) (= v_~y$read_delayed~0_7 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2528~0.base_22| 1) |v_#valid_53|) (= 0 v_~y$w_buff0~0_215) (= 0 v_~y$r_buff0_thd3~0_201) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff0_thd0~0_331 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2528~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2528~0.base_22|) |v_ULTIMATE.start_main_~#t2528~0.offset_17| 0)) |v_#memory_int_19|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2528~0.base_22| 4)) (= v_~y$r_buff0_thd1~0_37 0) (= v_~y$w_buff0_used~0_623 0) (= 0 |v_#NULL.base_4|) (= v_~y~0_147 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2528~0.base_22|) (= 0 v_~__unbuffered_p0_EAX~0_42) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$mem_tmp~0_20 0) (= 0 v_~weak$$choice0~0_16) (= 0 v_~y$flush_delayed~0_42) (= 0 v_~y$r_buff0_thd2~0_116) (= v_~y$w_buff1_used~0_397 0) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard0~0_26 0) (= |v_ULTIMATE.start_main_~#t2528~0.offset_17| 0) (= 0 v_~y$r_buff1_thd3~0_162) (= v_~z~0_148 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~y$r_buff1_thd1~0_116 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_40|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_23|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_23|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_46|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_40|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_42, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_162, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_37, ~y$flush_delayed~0=v_~y$flush_delayed~0_42, #length=|v_#length_21|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_27|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_35|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_60|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_65|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_198, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_116, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_279, ~x~0=v_~x~0_55, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_623, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_44|, ULTIMATE.start_main_~#t2530~0.base=|v_ULTIMATE.start_main_~#t2530~0.base_18|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_31, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_31|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_129|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_28|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_37|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_~#t2529~0.offset=|v_ULTIMATE.start_main_~#t2529~0.offset_15|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_116, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_25|, ~y$w_buff0~0=v_~y$w_buff0~0_215, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_201, ~y~0=v_~y~0_147, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_31|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_19|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_34|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_64|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_24|, ULTIMATE.start_main_~#t2529~0.base=|v_ULTIMATE.start_main_~#t2529~0.base_19|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_191, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_33|, ULTIMATE.start_main_~#t2528~0.base=|v_ULTIMATE.start_main_~#t2528~0.base_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_331, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_148, ~weak$$choice2~0=v_~weak$$choice2~0_120, ULTIMATE.start_main_~#t2530~0.offset=|v_ULTIMATE.start_main_~#t2530~0.offset_15|, ULTIMATE.start_main_~#t2528~0.offset=|v_ULTIMATE.start_main_~#t2528~0.offset_17|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_397} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t2530~0.base, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2529~0.offset, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t2529~0.base, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t2528~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t2530~0.offset, ULTIMATE.start_main_~#t2528~0.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:33:22,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L802-1-->L804: Formula: (and (= |v_ULTIMATE.start_main_~#t2529~0.offset_10| 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2529~0.base_11|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2529~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t2529~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2529~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2529~0.base_11|) |v_ULTIMATE.start_main_~#t2529~0.offset_10| 1)) |v_#memory_int_15|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2529~0.base_11| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2529~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2529~0.base=|v_ULTIMATE.start_main_~#t2529~0.base_11|, ULTIMATE.start_main_~#t2529~0.offset=|v_ULTIMATE.start_main_~#t2529~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2529~0.base, ULTIMATE.start_main_~#t2529~0.offset] because there is no mapped edge [2019-11-28 18:33:22,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L804-1-->L806: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2530~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2530~0.base_10|) |v_ULTIMATE.start_main_~#t2530~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2530~0.base_10|) (not (= |v_ULTIMATE.start_main_~#t2530~0.base_10| 0)) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t2530~0.base_10|)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t2530~0.base_10| 1)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2530~0.base_10| 4) |v_#length_15|) (= 0 |v_ULTIMATE.start_main_~#t2530~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2530~0.base=|v_ULTIMATE.start_main_~#t2530~0.base_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2530~0.offset=|v_ULTIMATE.start_main_~#t2530~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2530~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t2530~0.offset] because there is no mapped edge [2019-11-28 18:33:22,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [616] [616] P2ENTRY-->L4-3: Formula: (and (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_24) (= v_P2Thread1of1ForFork0_~arg.base_9 |v_P2Thread1of1ForFork0_#in~arg.base_11|) (= 2 v_~y$w_buff0~0_28) (= (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_54 256))) (not (= (mod v_~y$w_buff0_used~0_103 256) 0)))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (= v_~y$w_buff0_used~0_103 1) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11)) (= v_~y$w_buff1_used~0_54 v_~y$w_buff0_used~0_104) (= |v_P2Thread1of1ForFork0_#in~arg.offset_11| v_P2Thread1of1ForFork0_~arg.offset_9)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_11|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_104, ~y$w_buff0~0=v_~y$w_buff0~0_29, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_11|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_9, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_11|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_103, ~y$w_buff1~0=v_~y$w_buff1~0_24, ~y$w_buff0~0=v_~y$w_buff0~0_28, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_9, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_11|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:33:22,022 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_47 v_~__unbuffered_p0_EAX~0_32) (= 0 |v_P0Thread1of1ForFork1_#res.offset_13|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80) (= v_~z~0_109 2) (= v_P0Thread1of1ForFork1_~arg.offset_19 |v_P0Thread1of1ForFork1_#in~arg.offset_21|) (= |v_P0Thread1of1ForFork1_#in~arg.base_21| v_P0Thread1of1ForFork1_~arg.base_19) (= |v_P0Thread1of1ForFork1_#res.base_13| 0)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_47} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_32, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_13|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_13|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, ~z~0=v_~z~0_109, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_47, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_19} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:33:22,023 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In-2022411272 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-2022411272 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-2022411272 |P2Thread1of1ForFork0_#t~ite11_Out-2022411272|)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-2022411272| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2022411272, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2022411272} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2022411272, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-2022411272|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2022411272} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:33:22,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L750-2-->L750-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out-1065981356| |P1Thread1of1ForFork2_#t~ite4_Out-1065981356|)) (.cse0 (= (mod ~y$w_buff1_used~0_In-1065981356 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1065981356 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite3_Out-1065981356| ~y$w_buff1~0_In-1065981356) (not .cse0) .cse1 (not .cse2)) (and .cse1 (or .cse0 .cse2) (= |P1Thread1of1ForFork2_#t~ite3_Out-1065981356| ~y~0_In-1065981356)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1065981356, ~y$w_buff1~0=~y$w_buff1~0_In-1065981356, ~y~0=~y~0_In-1065981356, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1065981356} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1065981356, ~y$w_buff1~0=~y$w_buff1~0_In-1065981356, P1Thread1of1ForFork2_#t~ite4=|P1Thread1of1ForFork2_#t~ite4_Out-1065981356|, ~y~0=~y~0_In-1065981356, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-1065981356|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1065981356} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:33:22,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-166407933 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-166407933 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite5_Out-166407933| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-166407933 |P1Thread1of1ForFork2_#t~ite5_Out-166407933|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-166407933, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-166407933} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-166407933, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-166407933, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out-166407933|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:33:22,025 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L781-->L781-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1341488572 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1341488572 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1341488572 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1341488572 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-1341488572|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In-1341488572 |P2Thread1of1ForFork0_#t~ite12_Out-1341488572|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1341488572, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1341488572, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1341488572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1341488572} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1341488572, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1341488572, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1341488572|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1341488572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1341488572} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:33:22,025 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L752-->L752-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd2~0_In628962757 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In628962757 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In628962757 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In628962757 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite6_Out628962757| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite6_Out628962757| ~y$w_buff1_used~0_In628962757) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In628962757, ~y$w_buff0_used~0=~y$w_buff0_used~0_In628962757, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In628962757, ~y$w_buff1_used~0=~y$w_buff1_used~0_In628962757} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In628962757, ~y$w_buff0_used~0=~y$w_buff0_used~0_In628962757, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In628962757, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out628962757|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In628962757} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:33:22,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1886402434 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1886402434 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out1886402434| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out1886402434| ~y$r_buff0_thd2~0_In1886402434)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1886402434, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1886402434} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1886402434, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1886402434, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out1886402434|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:33:22,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L754-->L754-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1464514939 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-1464514939 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1464514939 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-1464514939 256) 0))) (or (and (= ~y$r_buff1_thd2~0_In-1464514939 |P1Thread1of1ForFork2_#t~ite8_Out-1464514939|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite8_Out-1464514939| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1464514939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1464514939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1464514939, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1464514939} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1464514939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1464514939, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-1464514939|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1464514939, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1464514939} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:33:22,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L754-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_24| v_~y$r_buff1_thd2~0_103) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1))) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_103, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:33:22,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L782-->L783: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In-346538768 256) 0)) (.cse2 (= ~y$r_buff0_thd3~0_Out-346538768 ~y$r_buff0_thd3~0_In-346538768)) (.cse1 (= (mod ~y$w_buff0_used~0_In-346538768 256) 0))) (or (and (not .cse0) (= ~y$r_buff0_thd3~0_Out-346538768 0) (not .cse1)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-346538768, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-346538768} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-346538768, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-346538768, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-346538768|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:33:22,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L783-->L783-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In1549957953 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1549957953 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1549957953 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1549957953 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out1549957953| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite14_Out1549957953| ~y$r_buff1_thd3~0_In1549957953)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1549957953, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1549957953, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1549957953, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1549957953} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1549957953|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1549957953, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1549957953, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1549957953, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1549957953} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:33:22,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L783-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_24| v_~y$r_buff1_thd3~0_99) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_23|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_99, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:33:22,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [614] [614] L806-1-->L812: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:33:22,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L812-2-->L812-5: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1875903627 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite19_Out-1875903627| |ULTIMATE.start_main_#t~ite18_Out-1875903627|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1875903627 256)))) (or (and .cse0 (or .cse1 .cse2) (= ~y~0_In-1875903627 |ULTIMATE.start_main_#t~ite18_Out-1875903627|)) (and (not .cse2) .cse0 (not .cse1) (= ~y$w_buff1~0_In-1875903627 |ULTIMATE.start_main_#t~ite18_Out-1875903627|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1875903627, ~y~0=~y~0_In-1875903627, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1875903627, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1875903627} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1875903627, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1875903627|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1875903627|, ~y~0=~y~0_In-1875903627, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1875903627, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1875903627} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:33:22,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-790187478 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-790187478 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-790187478| ~y$w_buff0_used~0_In-790187478)) (and (= |ULTIMATE.start_main_#t~ite20_Out-790187478| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-790187478, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-790187478} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-790187478, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-790187478, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-790187478|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:33:22,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L814-->L814-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In334040249 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In334040249 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In334040249 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In334040249 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out334040249| ~y$w_buff1_used~0_In334040249) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out334040249|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In334040249, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In334040249, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In334040249, ~y$w_buff1_used~0=~y$w_buff1_used~0_In334040249} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In334040249, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In334040249, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out334040249|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In334040249, ~y$w_buff1_used~0=~y$w_buff1_used~0_In334040249} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:33:22,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1587786209 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1587786209 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite22_Out1587786209|) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite22_Out1587786209| ~y$r_buff0_thd0~0_In1587786209) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1587786209, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1587786209} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1587786209, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1587786209, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1587786209|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:33:22,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L816-->L816-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd0~0_In-1568199253 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1568199253 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1568199253 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1568199253 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite23_Out-1568199253| ~y$r_buff1_thd0~0_In-1568199253)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite23_Out-1568199253| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1568199253, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1568199253, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1568199253, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1568199253} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1568199253, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1568199253, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1568199253, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1568199253|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1568199253} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:33:22,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L827-->L827-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1277146073 256) 0))) (or (and (= ~y$w_buff1_used~0_In1277146073 |ULTIMATE.start_main_#t~ite38_Out1277146073|) (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In1277146073 256) 0))) (or (and .cse0 (= (mod ~y$r_buff1_thd0~0_In1277146073 256) 0)) (= (mod ~y$w_buff0_used~0_In1277146073 256) 0) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In1277146073 256))))) (= |ULTIMATE.start_main_#t~ite38_Out1277146073| |ULTIMATE.start_main_#t~ite39_Out1277146073|) .cse1) (and (not .cse1) (= ~y$w_buff1_used~0_In1277146073 |ULTIMATE.start_main_#t~ite39_Out1277146073|) (= |ULTIMATE.start_main_#t~ite38_In1277146073| |ULTIMATE.start_main_#t~ite38_Out1277146073|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1277146073, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1277146073, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1277146073|, ~weak$$choice2~0=~weak$$choice2~0_In1277146073, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1277146073, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1277146073} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1277146073, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1277146073|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1277146073, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1277146073|, ~weak$$choice2~0=~weak$$choice2~0_In1277146073, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1277146073, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1277146073} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:33:22,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L828-->L829: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_25, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:33:22,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L831-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_10) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4| (mod v_~main$tmp_guard1~0_12 256)) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_10, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_10, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_99, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:33:22,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:33:22,154 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 06:33:22 BasicIcfg [2019-11-28 18:33:22,155 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 18:33:22,155 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 18:33:22,155 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 18:33:22,155 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 18:33:22,160 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 06:33:03" (3/4) ... [2019-11-28 18:33:22,162 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 18:33:22,163 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] ULTIMATE.startENTRY-->L802: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= v_~y$w_buff1~0_198 0) (= v_~x~0_55 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t2528~0.base_22|) 0) (= v_~weak$$choice2~0_120 0) (= v_~main$tmp_guard1~0_31 0) (= v_~y$r_buff1_thd0~0_279 0) (= 0 v_~y$r_buff1_thd2~0_191) (= v_~y$read_delayed~0_7 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2528~0.base_22| 1) |v_#valid_53|) (= 0 v_~y$w_buff0~0_215) (= 0 v_~y$r_buff0_thd3~0_201) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff0_thd0~0_331 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2528~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2528~0.base_22|) |v_ULTIMATE.start_main_~#t2528~0.offset_17| 0)) |v_#memory_int_19|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2528~0.base_22| 4)) (= v_~y$r_buff0_thd1~0_37 0) (= v_~y$w_buff0_used~0_623 0) (= 0 |v_#NULL.base_4|) (= v_~y~0_147 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2528~0.base_22|) (= 0 v_~__unbuffered_p0_EAX~0_42) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$mem_tmp~0_20 0) (= 0 v_~weak$$choice0~0_16) (= 0 v_~y$flush_delayed~0_42) (= 0 v_~y$r_buff0_thd2~0_116) (= v_~y$w_buff1_used~0_397 0) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard0~0_26 0) (= |v_ULTIMATE.start_main_~#t2528~0.offset_17| 0) (= 0 v_~y$r_buff1_thd3~0_162) (= v_~z~0_148 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~y$r_buff1_thd1~0_116 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_40|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_23|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_23|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_46|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_40|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_42, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_162, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_37, ~y$flush_delayed~0=v_~y$flush_delayed~0_42, #length=|v_#length_21|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_27|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_35|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_60|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_65|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_198, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_116, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_279, ~x~0=v_~x~0_55, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_623, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_44|, ULTIMATE.start_main_~#t2530~0.base=|v_ULTIMATE.start_main_~#t2530~0.base_18|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_31, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_31|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_129|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_28|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_37|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_~#t2529~0.offset=|v_ULTIMATE.start_main_~#t2529~0.offset_15|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_116, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_25|, ~y$w_buff0~0=v_~y$w_buff0~0_215, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_201, ~y~0=v_~y~0_147, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_31|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_19|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_34|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_64|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_24|, ULTIMATE.start_main_~#t2529~0.base=|v_ULTIMATE.start_main_~#t2529~0.base_19|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_191, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_33|, ULTIMATE.start_main_~#t2528~0.base=|v_ULTIMATE.start_main_~#t2528~0.base_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_331, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_148, ~weak$$choice2~0=v_~weak$$choice2~0_120, ULTIMATE.start_main_~#t2530~0.offset=|v_ULTIMATE.start_main_~#t2530~0.offset_15|, ULTIMATE.start_main_~#t2528~0.offset=|v_ULTIMATE.start_main_~#t2528~0.offset_17|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_397} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t2530~0.base, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2529~0.offset, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t2529~0.base, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t2528~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t2530~0.offset, ULTIMATE.start_main_~#t2528~0.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:33:22,163 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L802-1-->L804: Formula: (and (= |v_ULTIMATE.start_main_~#t2529~0.offset_10| 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2529~0.base_11|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2529~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t2529~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2529~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2529~0.base_11|) |v_ULTIMATE.start_main_~#t2529~0.offset_10| 1)) |v_#memory_int_15|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2529~0.base_11| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2529~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2529~0.base=|v_ULTIMATE.start_main_~#t2529~0.base_11|, ULTIMATE.start_main_~#t2529~0.offset=|v_ULTIMATE.start_main_~#t2529~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2529~0.base, ULTIMATE.start_main_~#t2529~0.offset] because there is no mapped edge [2019-11-28 18:33:22,164 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L804-1-->L806: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2530~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2530~0.base_10|) |v_ULTIMATE.start_main_~#t2530~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2530~0.base_10|) (not (= |v_ULTIMATE.start_main_~#t2530~0.base_10| 0)) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t2530~0.base_10|)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t2530~0.base_10| 1)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2530~0.base_10| 4) |v_#length_15|) (= 0 |v_ULTIMATE.start_main_~#t2530~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2530~0.base=|v_ULTIMATE.start_main_~#t2530~0.base_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2530~0.offset=|v_ULTIMATE.start_main_~#t2530~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2530~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t2530~0.offset] because there is no mapped edge [2019-11-28 18:33:22,164 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [616] [616] P2ENTRY-->L4-3: Formula: (and (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_24) (= v_P2Thread1of1ForFork0_~arg.base_9 |v_P2Thread1of1ForFork0_#in~arg.base_11|) (= 2 v_~y$w_buff0~0_28) (= (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_54 256))) (not (= (mod v_~y$w_buff0_used~0_103 256) 0)))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (= v_~y$w_buff0_used~0_103 1) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11)) (= v_~y$w_buff1_used~0_54 v_~y$w_buff0_used~0_104) (= |v_P2Thread1of1ForFork0_#in~arg.offset_11| v_P2Thread1of1ForFork0_~arg.offset_9)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_11|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_104, ~y$w_buff0~0=v_~y$w_buff0~0_29, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_11|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_9, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_11|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_103, ~y$w_buff1~0=v_~y$w_buff1~0_24, ~y$w_buff0~0=v_~y$w_buff0~0_28, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_9, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_11|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-11-28 18:33:22,165 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_47 v_~__unbuffered_p0_EAX~0_32) (= 0 |v_P0Thread1of1ForFork1_#res.offset_13|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80) (= v_~z~0_109 2) (= v_P0Thread1of1ForFork1_~arg.offset_19 |v_P0Thread1of1ForFork1_#in~arg.offset_21|) (= |v_P0Thread1of1ForFork1_#in~arg.base_21| v_P0Thread1of1ForFork1_~arg.base_19) (= |v_P0Thread1of1ForFork1_#res.base_13| 0)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_47} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_32, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_13|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_13|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, ~z~0=v_~z~0_109, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_47, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_19} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-11-28 18:33:22,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In-2022411272 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-2022411272 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-2022411272 |P2Thread1of1ForFork0_#t~ite11_Out-2022411272|)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-2022411272| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2022411272, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2022411272} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2022411272, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-2022411272|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2022411272} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-11-28 18:33:22,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L750-2-->L750-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out-1065981356| |P1Thread1of1ForFork2_#t~ite4_Out-1065981356|)) (.cse0 (= (mod ~y$w_buff1_used~0_In-1065981356 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1065981356 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite3_Out-1065981356| ~y$w_buff1~0_In-1065981356) (not .cse0) .cse1 (not .cse2)) (and .cse1 (or .cse0 .cse2) (= |P1Thread1of1ForFork2_#t~ite3_Out-1065981356| ~y~0_In-1065981356)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1065981356, ~y$w_buff1~0=~y$w_buff1~0_In-1065981356, ~y~0=~y~0_In-1065981356, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1065981356} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1065981356, ~y$w_buff1~0=~y$w_buff1~0_In-1065981356, P1Thread1of1ForFork2_#t~ite4=|P1Thread1of1ForFork2_#t~ite4_Out-1065981356|, ~y~0=~y~0_In-1065981356, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-1065981356|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1065981356} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-11-28 18:33:22,168 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-166407933 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-166407933 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite5_Out-166407933| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-166407933 |P1Thread1of1ForFork2_#t~ite5_Out-166407933|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-166407933, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-166407933} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-166407933, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-166407933, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out-166407933|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-11-28 18:33:22,168 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L781-->L781-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1341488572 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1341488572 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1341488572 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1341488572 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-1341488572|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In-1341488572 |P2Thread1of1ForFork0_#t~ite12_Out-1341488572|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1341488572, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1341488572, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1341488572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1341488572} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1341488572, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1341488572, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1341488572|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1341488572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1341488572} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-11-28 18:33:22,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L752-->L752-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd2~0_In628962757 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In628962757 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In628962757 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In628962757 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite6_Out628962757| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite6_Out628962757| ~y$w_buff1_used~0_In628962757) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In628962757, ~y$w_buff0_used~0=~y$w_buff0_used~0_In628962757, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In628962757, ~y$w_buff1_used~0=~y$w_buff1_used~0_In628962757} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In628962757, ~y$w_buff0_used~0=~y$w_buff0_used~0_In628962757, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In628962757, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out628962757|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In628962757} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-11-28 18:33:22,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1886402434 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1886402434 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out1886402434| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out1886402434| ~y$r_buff0_thd2~0_In1886402434)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1886402434, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1886402434} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1886402434, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1886402434, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out1886402434|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-11-28 18:33:22,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L754-->L754-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1464514939 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-1464514939 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1464514939 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-1464514939 256) 0))) (or (and (= ~y$r_buff1_thd2~0_In-1464514939 |P1Thread1of1ForFork2_#t~ite8_Out-1464514939|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite8_Out-1464514939| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1464514939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1464514939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1464514939, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1464514939} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1464514939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1464514939, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-1464514939|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1464514939, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1464514939} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-11-28 18:33:22,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L754-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_24| v_~y$r_buff1_thd2~0_103) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1))) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_103, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-11-28 18:33:22,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L782-->L783: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In-346538768 256) 0)) (.cse2 (= ~y$r_buff0_thd3~0_Out-346538768 ~y$r_buff0_thd3~0_In-346538768)) (.cse1 (= (mod ~y$w_buff0_used~0_In-346538768 256) 0))) (or (and (not .cse0) (= ~y$r_buff0_thd3~0_Out-346538768 0) (not .cse1)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-346538768, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-346538768} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-346538768, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-346538768, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-346538768|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-11-28 18:33:22,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L783-->L783-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In1549957953 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1549957953 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1549957953 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1549957953 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out1549957953| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite14_Out1549957953| ~y$r_buff1_thd3~0_In1549957953)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1549957953, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1549957953, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1549957953, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1549957953} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1549957953|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1549957953, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1549957953, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1549957953, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1549957953} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-11-28 18:33:22,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L783-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_24| v_~y$r_buff1_thd3~0_99) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_23|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_99, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-11-28 18:33:22,171 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [614] [614] L806-1-->L812: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-11-28 18:33:22,171 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L812-2-->L812-5: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1875903627 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite19_Out-1875903627| |ULTIMATE.start_main_#t~ite18_Out-1875903627|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1875903627 256)))) (or (and .cse0 (or .cse1 .cse2) (= ~y~0_In-1875903627 |ULTIMATE.start_main_#t~ite18_Out-1875903627|)) (and (not .cse2) .cse0 (not .cse1) (= ~y$w_buff1~0_In-1875903627 |ULTIMATE.start_main_#t~ite18_Out-1875903627|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1875903627, ~y~0=~y~0_In-1875903627, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1875903627, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1875903627} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1875903627, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1875903627|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1875903627|, ~y~0=~y~0_In-1875903627, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1875903627, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1875903627} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-11-28 18:33:22,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-790187478 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-790187478 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-790187478| ~y$w_buff0_used~0_In-790187478)) (and (= |ULTIMATE.start_main_#t~ite20_Out-790187478| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-790187478, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-790187478} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-790187478, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-790187478, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-790187478|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-11-28 18:33:22,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L814-->L814-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In334040249 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In334040249 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In334040249 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In334040249 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out334040249| ~y$w_buff1_used~0_In334040249) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out334040249|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In334040249, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In334040249, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In334040249, ~y$w_buff1_used~0=~y$w_buff1_used~0_In334040249} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In334040249, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In334040249, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out334040249|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In334040249, ~y$w_buff1_used~0=~y$w_buff1_used~0_In334040249} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-11-28 18:33:22,173 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1587786209 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1587786209 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite22_Out1587786209|) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite22_Out1587786209| ~y$r_buff0_thd0~0_In1587786209) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1587786209, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1587786209} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1587786209, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1587786209, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1587786209|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-11-28 18:33:22,174 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L816-->L816-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd0~0_In-1568199253 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1568199253 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1568199253 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1568199253 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite23_Out-1568199253| ~y$r_buff1_thd0~0_In-1568199253)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite23_Out-1568199253| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1568199253, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1568199253, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1568199253, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1568199253} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1568199253, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1568199253, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1568199253, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1568199253|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1568199253} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-11-28 18:33:22,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L827-->L827-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1277146073 256) 0))) (or (and (= ~y$w_buff1_used~0_In1277146073 |ULTIMATE.start_main_#t~ite38_Out1277146073|) (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In1277146073 256) 0))) (or (and .cse0 (= (mod ~y$r_buff1_thd0~0_In1277146073 256) 0)) (= (mod ~y$w_buff0_used~0_In1277146073 256) 0) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In1277146073 256))))) (= |ULTIMATE.start_main_#t~ite38_Out1277146073| |ULTIMATE.start_main_#t~ite39_Out1277146073|) .cse1) (and (not .cse1) (= ~y$w_buff1_used~0_In1277146073 |ULTIMATE.start_main_#t~ite39_Out1277146073|) (= |ULTIMATE.start_main_#t~ite38_In1277146073| |ULTIMATE.start_main_#t~ite38_Out1277146073|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1277146073, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1277146073, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1277146073|, ~weak$$choice2~0=~weak$$choice2~0_In1277146073, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1277146073, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1277146073} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1277146073, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1277146073|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1277146073, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1277146073|, ~weak$$choice2~0=~weak$$choice2~0_In1277146073, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1277146073, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1277146073} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-11-28 18:33:22,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L828-->L829: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_25, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-11-28 18:33:22,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L831-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_10) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4| (mod v_~main$tmp_guard1~0_12 256)) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_10, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_10, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_99, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-11-28 18:33:22,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-11-28 18:33:22,355 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 18:33:22,355 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 18:33:22,357 INFO L168 Benchmark]: Toolchain (without parser) took 20326.29 ms. Allocated memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: 849.3 MB). Free memory was 952.3 MB in the beginning and 1.4 GB in the end (delta: -446.8 MB). Peak memory consumption was 402.5 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:22,358 INFO L168 Benchmark]: CDTParser took 0.35 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:33:22,358 INFO L168 Benchmark]: CACSL2BoogieTranslator took 858.67 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 148.9 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -153.5 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:22,359 INFO L168 Benchmark]: Boogie Procedure Inliner took 70.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:22,359 INFO L168 Benchmark]: Boogie Preprocessor took 44.56 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 18:33:22,359 INFO L168 Benchmark]: RCFGBuilder took 849.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:22,360 INFO L168 Benchmark]: TraceAbstraction took 18295.80 ms. Allocated memory was 1.2 GB in the beginning and 1.9 GB in the end (delta: 700.4 MB). Free memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: -369.0 MB). Peak memory consumption was 331.5 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:22,360 INFO L168 Benchmark]: Witness Printer took 200.49 ms. Allocated memory is still 1.9 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 18.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-11-28 18:33:22,362 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.35 ms. Allocated memory is still 1.0 GB. Free memory is still 987.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 858.67 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 148.9 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -153.5 MB). Peak memory consumption was 20.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 70.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 44.56 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 849.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18295.80 ms. Allocated memory was 1.2 GB in the beginning and 1.9 GB in the end (delta: 700.4 MB). Free memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: -369.0 MB). Peak memory consumption was 331.5 MB. Max. memory is 11.5 GB. * Witness Printer took 200.49 ms. Allocated memory is still 1.9 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 18.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 5.0s, 162 ProgramPointsBefore, 83 ProgramPointsAfterwards, 193 TransitionsBefore, 94 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 43 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 24 ChoiceCompositions, 4225 VarBasedMoverChecksPositive, 199 VarBasedMoverChecksNegative, 61 SemBasedMoverChecksPositive, 194 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 48124 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L802] FCALL, FORK 0 pthread_create(&t2528, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L804] FCALL, FORK 0 pthread_create(&t2529, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L806] FCALL, FORK 0 pthread_create(&t2530, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L770] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L771] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L772] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L773] 3 y$r_buff0_thd3 = (_Bool)1 [L776] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L779] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L744] 2 x = 1 [L747] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L779] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L750] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L780] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L750] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L751] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L752] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L753] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L781] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L812] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L812] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L813] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L814] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L815] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L816] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L819] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L820] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L821] 0 y$flush_delayed = weak$$choice2 [L822] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L823] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L823] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L824] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L824] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L825] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L826] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L826] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L827] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L829] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L829] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L830] 0 main$tmp_guard1 = !(y == 2 && z == 2 && __unbuffered_p0_EAX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 153 locations, 2 error locations. Result: UNSAFE, OverallTime: 18.0s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 5.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1926 SDtfs, 1642 SDslu, 4954 SDs, 0 SdLazy, 3026 SolverSat, 121 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 151 GetRequests, 22 SyntacticMatches, 16 SemanticMatches, 113 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 193 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22206occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.7s AutomataMinimizationTime, 17 MinimizatonAttempts, 3850 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 755 NumberOfCodeBlocks, 755 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 681 ConstructedInterpolants, 0 QuantifiedInterpolants, 157487 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...