./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/systemc/transmitter.02.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/systemc/transmitter.02.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0c244c639ec9718adcbacffa967b748c52a23cd0 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-11-28 17:32:41,853 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-28 17:32:41,856 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-28 17:32:41,876 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-28 17:32:41,877 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-28 17:32:41,879 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-28 17:32:41,881 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-28 17:32:41,892 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-28 17:32:41,897 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-28 17:32:41,901 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-28 17:32:41,902 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-28 17:32:41,905 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-28 17:32:41,905 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-28 17:32:41,908 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-28 17:32:41,909 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-28 17:32:41,912 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-28 17:32:41,915 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-28 17:32:41,916 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-28 17:32:41,919 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-28 17:32:41,923 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-28 17:32:41,929 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-28 17:32:41,934 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-28 17:32:41,936 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-28 17:32:41,938 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-28 17:32:41,939 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-28 17:32:41,939 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-28 17:32:41,940 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-28 17:32:41,941 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-28 17:32:41,941 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-28 17:32:41,942 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-28 17:32:41,942 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-28 17:32:41,943 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-28 17:32:41,944 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-28 17:32:41,944 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-28 17:32:41,945 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-28 17:32:41,946 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-28 17:32:41,946 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-28 17:32:41,947 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-28 17:32:41,947 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-28 17:32:41,948 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-28 17:32:41,948 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-28 17:32:41,949 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-28 17:32:41,965 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-28 17:32:41,965 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-28 17:32:41,966 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-28 17:32:41,966 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-28 17:32:41,967 INFO L138 SettingsManager]: * Use SBE=true [2019-11-28 17:32:41,967 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-28 17:32:41,967 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-28 17:32:41,967 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-28 17:32:41,968 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-28 17:32:41,968 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-28 17:32:41,968 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-28 17:32:41,968 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-28 17:32:41,969 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-28 17:32:41,969 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-28 17:32:41,969 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-28 17:32:41,969 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-28 17:32:41,969 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-28 17:32:41,970 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-28 17:32:41,970 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-28 17:32:41,970 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-28 17:32:41,970 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-28 17:32:41,971 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 17:32:41,971 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-28 17:32:41,971 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-28 17:32:41,971 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-28 17:32:41,972 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-28 17:32:41,972 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-28 17:32:41,972 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-28 17:32:41,972 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-11-28 17:32:41,973 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0c244c639ec9718adcbacffa967b748c52a23cd0 [2019-11-28 17:32:42,277 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-28 17:32:42,291 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-28 17:32:42,294 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-28 17:32:42,296 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-28 17:32:42,296 INFO L275 PluginConnector]: CDTParser initialized [2019-11-28 17:32:42,297 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/transmitter.02.cil.c [2019-11-28 17:32:42,365 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/721bf34bf/5c6477b4f8b044afaad92e79e4df4bdf/FLAG5a22e2445 [2019-11-28 17:32:42,892 INFO L306 CDTParser]: Found 1 translation units. [2019-11-28 17:32:42,893 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/transmitter.02.cil.c [2019-11-28 17:32:42,901 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/721bf34bf/5c6477b4f8b044afaad92e79e4df4bdf/FLAG5a22e2445 [2019-11-28 17:32:43,218 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/721bf34bf/5c6477b4f8b044afaad92e79e4df4bdf [2019-11-28 17:32:43,222 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-28 17:32:43,223 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-28 17:32:43,224 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-28 17:32:43,225 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-28 17:32:43,228 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-28 17:32:43,229 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,232 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@57f6393 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43, skipping insertion in model container [2019-11-28 17:32:43,233 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,243 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-28 17:32:43,295 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-28 17:32:43,585 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 17:32:43,595 INFO L203 MainTranslator]: Completed pre-run [2019-11-28 17:32:43,698 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-28 17:32:43,722 INFO L208 MainTranslator]: Completed translation [2019-11-28 17:32:43,723 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43 WrapperNode [2019-11-28 17:32:43,723 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-28 17:32:43,729 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-28 17:32:43,729 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-28 17:32:43,729 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-28 17:32:43,736 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,743 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,785 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-28 17:32:43,786 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-28 17:32:43,786 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-28 17:32:43,786 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-28 17:32:43,796 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,797 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,800 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,801 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,809 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,821 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,825 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... [2019-11-28 17:32:43,830 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-28 17:32:43,831 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-28 17:32:43,831 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-28 17:32:43,832 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-28 17:32:43,833 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-28 17:32:43,905 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-28 17:32:43,905 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-28 17:32:44,776 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-28 17:32:44,776 INFO L287 CfgBuilder]: Removed 94 assume(true) statements. [2019-11-28 17:32:44,778 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 05:32:44 BoogieIcfgContainer [2019-11-28 17:32:44,778 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-28 17:32:44,781 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-28 17:32:44,781 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-28 17:32:44,784 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-28 17:32:44,785 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 05:32:43" (1/3) ... [2019-11-28 17:32:44,786 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@418d80ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 05:32:44, skipping insertion in model container [2019-11-28 17:32:44,787 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:32:43" (2/3) ... [2019-11-28 17:32:44,787 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@418d80ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 05:32:44, skipping insertion in model container [2019-11-28 17:32:44,787 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 05:32:44" (3/3) ... [2019-11-28 17:32:44,789 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.02.cil.c [2019-11-28 17:32:44,798 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-28 17:32:44,805 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-11-28 17:32:44,818 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-11-28 17:32:44,847 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-28 17:32:44,847 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-28 17:32:44,847 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-28 17:32:44,847 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-28 17:32:44,849 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-28 17:32:44,851 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-28 17:32:44,851 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-28 17:32:44,852 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-28 17:32:44,876 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states. [2019-11-28 17:32:44,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 17:32:44,884 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:44,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:44,885 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:44,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:44,890 INFO L82 PathProgramCache]: Analyzing trace with hash 550865253, now seen corresponding path program 1 times [2019-11-28 17:32:44,898 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:44,898 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [475829595] [2019-11-28 17:32:44,898 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:44,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:45,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:45,064 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [475829595] [2019-11-28 17:32:45,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:45,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:45,068 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059449478] [2019-11-28 17:32:45,076 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:45,077 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:45,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:45,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,094 INFO L87 Difference]: Start difference. First operand 192 states. Second operand 3 states. [2019-11-28 17:32:45,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:45,158 INFO L93 Difference]: Finished difference Result 379 states and 595 transitions. [2019-11-28 17:32:45,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:45,160 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 17:32:45,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:45,174 INFO L225 Difference]: With dead ends: 379 [2019-11-28 17:32:45,174 INFO L226 Difference]: Without dead ends: 188 [2019-11-28 17:32:45,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2019-11-28 17:32:45,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 188. [2019-11-28 17:32:45,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2019-11-28 17:32:45,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 283 transitions. [2019-11-28 17:32:45,235 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 283 transitions. Word has length 49 [2019-11-28 17:32:45,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:45,235 INFO L462 AbstractCegarLoop]: Abstraction has 188 states and 283 transitions. [2019-11-28 17:32:45,236 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:45,236 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 283 transitions. [2019-11-28 17:32:45,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 17:32:45,238 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:45,238 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:45,238 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:45,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:45,239 INFO L82 PathProgramCache]: Analyzing trace with hash -342621085, now seen corresponding path program 1 times [2019-11-28 17:32:45,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:45,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885466355] [2019-11-28 17:32:45,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:45,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:45,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:45,298 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885466355] [2019-11-28 17:32:45,298 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:45,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 17:32:45,299 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212759625] [2019-11-28 17:32:45,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:45,304 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:45,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:45,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,305 INFO L87 Difference]: Start difference. First operand 188 states and 283 transitions. Second operand 3 states. [2019-11-28 17:32:45,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:45,414 INFO L93 Difference]: Finished difference Result 498 states and 749 transitions. [2019-11-28 17:32:45,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:45,415 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 17:32:45,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:45,419 INFO L225 Difference]: With dead ends: 498 [2019-11-28 17:32:45,420 INFO L226 Difference]: Without dead ends: 317 [2019-11-28 17:32:45,422 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2019-11-28 17:32:45,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 315. [2019-11-28 17:32:45,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 17:32:45,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 467 transitions. [2019-11-28 17:32:45,467 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 467 transitions. Word has length 49 [2019-11-28 17:32:45,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:45,468 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 467 transitions. [2019-11-28 17:32:45,468 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:45,468 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 467 transitions. [2019-11-28 17:32:45,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 17:32:45,470 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:45,471 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:45,471 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:45,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:45,472 INFO L82 PathProgramCache]: Analyzing trace with hash -2057662813, now seen corresponding path program 1 times [2019-11-28 17:32:45,472 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:45,472 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057993003] [2019-11-28 17:32:45,473 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:45,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:45,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:45,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057993003] [2019-11-28 17:32:45,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:45,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 17:32:45,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [135219555] [2019-11-28 17:32:45,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:45,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:45,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:45,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,540 INFO L87 Difference]: Start difference. First operand 315 states and 467 transitions. Second operand 3 states. [2019-11-28 17:32:45,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:45,590 INFO L93 Difference]: Finished difference Result 622 states and 923 transitions. [2019-11-28 17:32:45,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:45,591 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 17:32:45,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:45,594 INFO L225 Difference]: With dead ends: 622 [2019-11-28 17:32:45,594 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 17:32:45,596 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 17:32:45,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-11-28 17:32:45,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 17:32:45,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 459 transitions. [2019-11-28 17:32:45,635 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 459 transitions. Word has length 49 [2019-11-28 17:32:45,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:45,636 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 459 transitions. [2019-11-28 17:32:45,636 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:45,636 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 459 transitions. [2019-11-28 17:32:45,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 17:32:45,642 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:45,642 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:45,643 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:45,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:45,643 INFO L82 PathProgramCache]: Analyzing trace with hash 796507235, now seen corresponding path program 1 times [2019-11-28 17:32:45,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:45,644 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822847673] [2019-11-28 17:32:45,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:45,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:45,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:45,691 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822847673] [2019-11-28 17:32:45,691 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:45,691 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 17:32:45,692 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914790621] [2019-11-28 17:32:45,692 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:45,692 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:45,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:45,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,695 INFO L87 Difference]: Start difference. First operand 315 states and 459 transitions. Second operand 3 states. [2019-11-28 17:32:45,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:45,736 INFO L93 Difference]: Finished difference Result 621 states and 906 transitions. [2019-11-28 17:32:45,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:45,737 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 17:32:45,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:45,739 INFO L225 Difference]: With dead ends: 621 [2019-11-28 17:32:45,739 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 17:32:45,740 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 17:32:45,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-11-28 17:32:45,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 17:32:45,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 451 transitions. [2019-11-28 17:32:45,766 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 451 transitions. Word has length 49 [2019-11-28 17:32:45,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:45,766 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 451 transitions. [2019-11-28 17:32:45,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:45,767 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 451 transitions. [2019-11-28 17:32:45,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 17:32:45,768 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:45,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:45,769 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:45,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:45,769 INFO L82 PathProgramCache]: Analyzing trace with hash -773990749, now seen corresponding path program 1 times [2019-11-28 17:32:45,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:45,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29334454] [2019-11-28 17:32:45,771 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:45,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:45,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:45,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [29334454] [2019-11-28 17:32:45,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:45,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 17:32:45,817 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053502415] [2019-11-28 17:32:45,817 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:45,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:45,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:45,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,819 INFO L87 Difference]: Start difference. First operand 315 states and 451 transitions. Second operand 3 states. [2019-11-28 17:32:45,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:45,883 INFO L93 Difference]: Finished difference Result 620 states and 889 transitions. [2019-11-28 17:32:45,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:45,884 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 17:32:45,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:45,886 INFO L225 Difference]: With dead ends: 620 [2019-11-28 17:32:45,887 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 17:32:45,888 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 17:32:45,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-11-28 17:32:45,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 17:32:45,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 437 transitions. [2019-11-28 17:32:45,907 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 437 transitions. Word has length 49 [2019-11-28 17:32:45,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:45,908 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 437 transitions. [2019-11-28 17:32:45,908 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:45,909 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 437 transitions. [2019-11-28 17:32:45,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 17:32:45,910 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:45,910 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:45,910 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:45,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:45,911 INFO L82 PathProgramCache]: Analyzing trace with hash -1210649628, now seen corresponding path program 1 times [2019-11-28 17:32:45,911 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:45,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66741968] [2019-11-28 17:32:45,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:45,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:45,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:45,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [66741968] [2019-11-28 17:32:45,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:45,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 17:32:45,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1127380668] [2019-11-28 17:32:45,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:45,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:45,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:45,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:45,959 INFO L87 Difference]: Start difference. First operand 315 states and 437 transitions. Second operand 3 states. [2019-11-28 17:32:46,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:46,019 INFO L93 Difference]: Finished difference Result 619 states and 860 transitions. [2019-11-28 17:32:46,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:46,020 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 17:32:46,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:46,023 INFO L225 Difference]: With dead ends: 619 [2019-11-28 17:32:46,023 INFO L226 Difference]: Without dead ends: 315 [2019-11-28 17:32:46,024 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:46,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-11-28 17:32:46,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-11-28 17:32:46,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-11-28 17:32:46,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 423 transitions. [2019-11-28 17:32:46,043 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 423 transitions. Word has length 49 [2019-11-28 17:32:46,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:46,043 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 423 transitions. [2019-11-28 17:32:46,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:46,043 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 423 transitions. [2019-11-28 17:32:46,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-28 17:32:46,045 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:46,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:46,045 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:46,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:46,046 INFO L82 PathProgramCache]: Analyzing trace with hash 217882148, now seen corresponding path program 1 times [2019-11-28 17:32:46,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:46,046 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225132903] [2019-11-28 17:32:46,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:46,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:46,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:46,131 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1225132903] [2019-11-28 17:32:46,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:46,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:46,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [866312389] [2019-11-28 17:32:46,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:46,137 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:46,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:46,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:46,138 INFO L87 Difference]: Start difference. First operand 315 states and 423 transitions. Second operand 3 states. [2019-11-28 17:32:46,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:46,241 INFO L93 Difference]: Finished difference Result 870 states and 1162 transitions. [2019-11-28 17:32:46,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:46,242 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-28 17:32:46,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:46,246 INFO L225 Difference]: With dead ends: 870 [2019-11-28 17:32:46,247 INFO L226 Difference]: Without dead ends: 592 [2019-11-28 17:32:46,249 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:46,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2019-11-28 17:32:46,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 556. [2019-11-28 17:32:46,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 556 states. [2019-11-28 17:32:46,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 731 transitions. [2019-11-28 17:32:46,285 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 731 transitions. Word has length 49 [2019-11-28 17:32:46,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:46,286 INFO L462 AbstractCegarLoop]: Abstraction has 556 states and 731 transitions. [2019-11-28 17:32:46,286 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:46,286 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 731 transitions. [2019-11-28 17:32:46,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-11-28 17:32:46,290 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:46,291 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:46,291 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:46,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:46,292 INFO L82 PathProgramCache]: Analyzing trace with hash -397727545, now seen corresponding path program 1 times [2019-11-28 17:32:46,292 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:46,293 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393634090] [2019-11-28 17:32:46,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:46,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:46,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:46,406 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393634090] [2019-11-28 17:32:46,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:46,407 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:46,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363149894] [2019-11-28 17:32:46,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:46,408 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:46,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:46,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:46,409 INFO L87 Difference]: Start difference. First operand 556 states and 731 transitions. Second operand 3 states. [2019-11-28 17:32:46,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:46,509 INFO L93 Difference]: Finished difference Result 1454 states and 1913 transitions. [2019-11-28 17:32:46,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:46,510 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2019-11-28 17:32:46,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:46,518 INFO L225 Difference]: With dead ends: 1454 [2019-11-28 17:32:46,518 INFO L226 Difference]: Without dead ends: 968 [2019-11-28 17:32:46,520 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:46,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 968 states. [2019-11-28 17:32:46,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 968 to 926. [2019-11-28 17:32:46,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 926 states. [2019-11-28 17:32:46,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 926 states to 926 states and 1204 transitions. [2019-11-28 17:32:46,572 INFO L78 Accepts]: Start accepts. Automaton has 926 states and 1204 transitions. Word has length 50 [2019-11-28 17:32:46,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:46,573 INFO L462 AbstractCegarLoop]: Abstraction has 926 states and 1204 transitions. [2019-11-28 17:32:46,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:46,574 INFO L276 IsEmpty]: Start isEmpty. Operand 926 states and 1204 transitions. [2019-11-28 17:32:46,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-28 17:32:46,575 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:46,575 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:46,575 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:46,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:46,576 INFO L82 PathProgramCache]: Analyzing trace with hash 765911831, now seen corresponding path program 1 times [2019-11-28 17:32:46,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:46,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786380270] [2019-11-28 17:32:46,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:46,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:46,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:46,656 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786380270] [2019-11-28 17:32:46,656 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:46,656 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-28 17:32:46,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505190746] [2019-11-28 17:32:46,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:46,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:46,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:46,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:46,658 INFO L87 Difference]: Start difference. First operand 926 states and 1204 transitions. Second operand 3 states. [2019-11-28 17:32:46,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:46,791 INFO L93 Difference]: Finished difference Result 2626 states and 3421 transitions. [2019-11-28 17:32:46,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:46,792 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-11-28 17:32:46,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:46,801 INFO L225 Difference]: With dead ends: 2626 [2019-11-28 17:32:46,801 INFO L226 Difference]: Without dead ends: 1750 [2019-11-28 17:32:46,804 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:46,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1750 states. [2019-11-28 17:32:46,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1750 to 1734. [2019-11-28 17:32:46,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1734 states. [2019-11-28 17:32:46,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1734 states to 1734 states and 2234 transitions. [2019-11-28 17:32:46,939 INFO L78 Accepts]: Start accepts. Automaton has 1734 states and 2234 transitions. Word has length 51 [2019-11-28 17:32:46,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:46,940 INFO L462 AbstractCegarLoop]: Abstraction has 1734 states and 2234 transitions. [2019-11-28 17:32:46,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:46,940 INFO L276 IsEmpty]: Start isEmpty. Operand 1734 states and 2234 transitions. [2019-11-28 17:32:46,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-28 17:32:46,942 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:46,943 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:46,943 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:46,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:46,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1533277321, now seen corresponding path program 1 times [2019-11-28 17:32:46,944 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:46,944 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096935298] [2019-11-28 17:32:46,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:46,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:47,006 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:47,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096935298] [2019-11-28 17:32:47,007 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:47,007 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:47,007 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115347305] [2019-11-28 17:32:47,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:47,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:47,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:47,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:47,008 INFO L87 Difference]: Start difference. First operand 1734 states and 2234 transitions. Second operand 3 states. [2019-11-28 17:32:47,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:47,198 INFO L93 Difference]: Finished difference Result 5068 states and 6521 transitions. [2019-11-28 17:32:47,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:47,200 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-11-28 17:32:47,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:47,218 INFO L225 Difference]: With dead ends: 5068 [2019-11-28 17:32:47,219 INFO L226 Difference]: Without dead ends: 3402 [2019-11-28 17:32:47,223 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:47,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3402 states. [2019-11-28 17:32:47,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3402 to 3402. [2019-11-28 17:32:47,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3402 states. [2019-11-28 17:32:47,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3402 states to 3402 states and 4340 transitions. [2019-11-28 17:32:47,384 INFO L78 Accepts]: Start accepts. Automaton has 3402 states and 4340 transitions. Word has length 66 [2019-11-28 17:32:47,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:47,386 INFO L462 AbstractCegarLoop]: Abstraction has 3402 states and 4340 transitions. [2019-11-28 17:32:47,386 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:47,387 INFO L276 IsEmpty]: Start isEmpty. Operand 3402 states and 4340 transitions. [2019-11-28 17:32:47,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-28 17:32:47,390 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:47,391 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:47,391 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:47,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:47,392 INFO L82 PathProgramCache]: Analyzing trace with hash -883662481, now seen corresponding path program 1 times [2019-11-28 17:32:47,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:47,392 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255069328] [2019-11-28 17:32:47,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:47,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:47,469 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 17:32:47,470 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255069328] [2019-11-28 17:32:47,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:47,471 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 17:32:47,471 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [804272222] [2019-11-28 17:32:47,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 17:32:47,472 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:47,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 17:32:47,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 17:32:47,473 INFO L87 Difference]: Start difference. First operand 3402 states and 4340 transitions. Second operand 5 states. [2019-11-28 17:32:47,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:47,901 INFO L93 Difference]: Finished difference Result 10802 states and 13699 transitions. [2019-11-28 17:32:47,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 17:32:47,902 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2019-11-28 17:32:47,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:47,947 INFO L225 Difference]: With dead ends: 10802 [2019-11-28 17:32:47,947 INFO L226 Difference]: Without dead ends: 7492 [2019-11-28 17:32:47,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 17:32:47,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7492 states. [2019-11-28 17:32:48,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7492 to 3546. [2019-11-28 17:32:48,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3546 states. [2019-11-28 17:32:48,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3546 states to 3546 states and 4448 transitions. [2019-11-28 17:32:48,338 INFO L78 Accepts]: Start accepts. Automaton has 3546 states and 4448 transitions. Word has length 89 [2019-11-28 17:32:48,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:48,340 INFO L462 AbstractCegarLoop]: Abstraction has 3546 states and 4448 transitions. [2019-11-28 17:32:48,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 17:32:48,341 INFO L276 IsEmpty]: Start isEmpty. Operand 3546 states and 4448 transitions. [2019-11-28 17:32:48,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-28 17:32:48,344 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:48,344 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:48,345 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:48,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:48,345 INFO L82 PathProgramCache]: Analyzing trace with hash -305176077, now seen corresponding path program 1 times [2019-11-28 17:32:48,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:48,348 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713033034] [2019-11-28 17:32:48,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:48,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:48,424 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 17:32:48,424 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713033034] [2019-11-28 17:32:48,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:48,425 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:48,425 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415352664] [2019-11-28 17:32:48,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:48,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:48,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:48,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:48,427 INFO L87 Difference]: Start difference. First operand 3546 states and 4448 transitions. Second operand 3 states. [2019-11-28 17:32:48,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:48,875 INFO L93 Difference]: Finished difference Result 10194 states and 12806 transitions. [2019-11-28 17:32:48,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:48,876 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-11-28 17:32:48,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:48,910 INFO L225 Difference]: With dead ends: 10194 [2019-11-28 17:32:48,911 INFO L226 Difference]: Without dead ends: 6712 [2019-11-28 17:32:48,919 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:48,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6712 states. [2019-11-28 17:32:49,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6712 to 6494. [2019-11-28 17:32:49,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6494 states. [2019-11-28 17:32:49,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6494 states to 6494 states and 8084 transitions. [2019-11-28 17:32:49,344 INFO L78 Accepts]: Start accepts. Automaton has 6494 states and 8084 transitions. Word has length 89 [2019-11-28 17:32:49,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:49,344 INFO L462 AbstractCegarLoop]: Abstraction has 6494 states and 8084 transitions. [2019-11-28 17:32:49,345 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:49,345 INFO L276 IsEmpty]: Start isEmpty. Operand 6494 states and 8084 transitions. [2019-11-28 17:32:49,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-28 17:32:49,350 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:49,351 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:49,351 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:49,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:49,351 INFO L82 PathProgramCache]: Analyzing trace with hash -1278665036, now seen corresponding path program 1 times [2019-11-28 17:32:49,352 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:49,352 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412986642] [2019-11-28 17:32:49,353 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:49,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:49,424 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 17:32:49,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [412986642] [2019-11-28 17:32:49,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:49,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 17:32:49,426 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897060106] [2019-11-28 17:32:49,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 17:32:49,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:49,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 17:32:49,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 17:32:49,428 INFO L87 Difference]: Start difference. First operand 6494 states and 8084 transitions. Second operand 5 states. [2019-11-28 17:32:50,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:50,190 INFO L93 Difference]: Finished difference Result 15348 states and 19199 transitions. [2019-11-28 17:32:50,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 17:32:50,190 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2019-11-28 17:32:50,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:50,235 INFO L225 Difference]: With dead ends: 15348 [2019-11-28 17:32:50,235 INFO L226 Difference]: Without dead ends: 8934 [2019-11-28 17:32:50,248 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 17:32:50,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8934 states. [2019-11-28 17:32:50,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8934 to 6542. [2019-11-28 17:32:50,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6542 states. [2019-11-28 17:32:50,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6542 states to 6542 states and 8000 transitions. [2019-11-28 17:32:50,666 INFO L78 Accepts]: Start accepts. Automaton has 6542 states and 8000 transitions. Word has length 89 [2019-11-28 17:32:50,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:50,666 INFO L462 AbstractCegarLoop]: Abstraction has 6542 states and 8000 transitions. [2019-11-28 17:32:50,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 17:32:50,666 INFO L276 IsEmpty]: Start isEmpty. Operand 6542 states and 8000 transitions. [2019-11-28 17:32:50,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-28 17:32:50,671 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:50,672 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:50,672 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:50,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:50,673 INFO L82 PathProgramCache]: Analyzing trace with hash 211800632, now seen corresponding path program 1 times [2019-11-28 17:32:50,673 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:50,673 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689945059] [2019-11-28 17:32:50,673 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:50,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:50,715 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:50,716 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689945059] [2019-11-28 17:32:50,717 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:50,717 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:50,717 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96730703] [2019-11-28 17:32:50,718 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:50,718 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:50,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:50,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:50,718 INFO L87 Difference]: Start difference. First operand 6542 states and 8000 transitions. Second operand 3 states. [2019-11-28 17:32:51,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:51,018 INFO L93 Difference]: Finished difference Result 9812 states and 12049 transitions. [2019-11-28 17:32:51,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:51,019 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-11-28 17:32:51,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:51,052 INFO L225 Difference]: With dead ends: 9812 [2019-11-28 17:32:51,053 INFO L226 Difference]: Without dead ends: 6542 [2019-11-28 17:32:51,063 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:51,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6542 states. [2019-11-28 17:32:51,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6542 to 6512. [2019-11-28 17:32:51,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6512 states. [2019-11-28 17:32:51,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6512 states to 6512 states and 7866 transitions. [2019-11-28 17:32:51,519 INFO L78 Accepts]: Start accepts. Automaton has 6512 states and 7866 transitions. Word has length 89 [2019-11-28 17:32:51,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:51,520 INFO L462 AbstractCegarLoop]: Abstraction has 6512 states and 7866 transitions. [2019-11-28 17:32:51,520 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:51,520 INFO L276 IsEmpty]: Start isEmpty. Operand 6512 states and 7866 transitions. [2019-11-28 17:32:51,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-11-28 17:32:51,525 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:51,525 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:51,525 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:51,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:51,526 INFO L82 PathProgramCache]: Analyzing trace with hash -974468191, now seen corresponding path program 1 times [2019-11-28 17:32:51,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:51,528 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161144204] [2019-11-28 17:32:51,528 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:51,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:51,602 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 17:32:51,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1161144204] [2019-11-28 17:32:51,603 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:51,603 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-28 17:32:51,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785977751] [2019-11-28 17:32:51,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-28 17:32:51,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:51,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-28 17:32:51,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-28 17:32:51,605 INFO L87 Difference]: Start difference. First operand 6512 states and 7866 transitions. Second operand 5 states. [2019-11-28 17:32:52,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:52,048 INFO L93 Difference]: Finished difference Result 12634 states and 15323 transitions. [2019-11-28 17:32:52,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-28 17:32:52,049 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-11-28 17:32:52,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:52,062 INFO L225 Difference]: With dead ends: 12634 [2019-11-28 17:32:52,062 INFO L226 Difference]: Without dead ends: 6178 [2019-11-28 17:32:52,075 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-28 17:32:52,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6178 states. [2019-11-28 17:32:52,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6178 to 4920. [2019-11-28 17:32:52,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4920 states. [2019-11-28 17:32:52,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4920 states to 4920 states and 5854 transitions. [2019-11-28 17:32:52,435 INFO L78 Accepts]: Start accepts. Automaton has 4920 states and 5854 transitions. Word has length 90 [2019-11-28 17:32:52,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:52,436 INFO L462 AbstractCegarLoop]: Abstraction has 4920 states and 5854 transitions. [2019-11-28 17:32:52,436 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-28 17:32:52,436 INFO L276 IsEmpty]: Start isEmpty. Operand 4920 states and 5854 transitions. [2019-11-28 17:32:52,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-28 17:32:52,440 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:52,440 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:52,440 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:52,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:52,441 INFO L82 PathProgramCache]: Analyzing trace with hash 724986355, now seen corresponding path program 1 times [2019-11-28 17:32:52,441 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:52,441 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682319418] [2019-11-28 17:32:52,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:52,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:52,498 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:52,499 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682319418] [2019-11-28 17:32:52,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:52,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:52,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1543566313] [2019-11-28 17:32:52,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:52,503 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:52,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:52,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:52,504 INFO L87 Difference]: Start difference. First operand 4920 states and 5854 transitions. Second operand 3 states. [2019-11-28 17:32:52,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:52,845 INFO L93 Difference]: Finished difference Result 9778 states and 11642 transitions. [2019-11-28 17:32:52,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:52,845 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2019-11-28 17:32:52,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:52,854 INFO L225 Difference]: With dead ends: 9778 [2019-11-28 17:32:52,854 INFO L226 Difference]: Without dead ends: 4190 [2019-11-28 17:32:52,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:52,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4190 states. [2019-11-28 17:32:53,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4190 to 4186. [2019-11-28 17:32:53,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4186 states. [2019-11-28 17:32:53,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4186 states to 4186 states and 4930 transitions. [2019-11-28 17:32:53,093 INFO L78 Accepts]: Start accepts. Automaton has 4186 states and 4930 transitions. Word has length 92 [2019-11-28 17:32:53,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:53,093 INFO L462 AbstractCegarLoop]: Abstraction has 4186 states and 4930 transitions. [2019-11-28 17:32:53,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:53,093 INFO L276 IsEmpty]: Start isEmpty. Operand 4186 states and 4930 transitions. [2019-11-28 17:32:53,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-11-28 17:32:53,097 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:53,097 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:53,097 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:53,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:53,098 INFO L82 PathProgramCache]: Analyzing trace with hash 2141342848, now seen corresponding path program 1 times [2019-11-28 17:32:53,098 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:53,098 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303629883] [2019-11-28 17:32:53,098 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:53,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:53,138 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-28 17:32:53,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303629883] [2019-11-28 17:32:53,139 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:53,139 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:53,139 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181069] [2019-11-28 17:32:53,139 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:53,140 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:53,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:53,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:53,140 INFO L87 Difference]: Start difference. First operand 4186 states and 4930 transitions. Second operand 3 states. [2019-11-28 17:32:53,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:53,376 INFO L93 Difference]: Finished difference Result 8752 states and 10233 transitions. [2019-11-28 17:32:53,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:53,376 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 116 [2019-11-28 17:32:53,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:53,382 INFO L225 Difference]: With dead ends: 8752 [2019-11-28 17:32:53,382 INFO L226 Difference]: Without dead ends: 2868 [2019-11-28 17:32:53,390 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:53,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2868 states. [2019-11-28 17:32:53,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2868 to 2790. [2019-11-28 17:32:53,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2790 states. [2019-11-28 17:32:53,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2790 states to 2790 states and 3146 transitions. [2019-11-28 17:32:53,532 INFO L78 Accepts]: Start accepts. Automaton has 2790 states and 3146 transitions. Word has length 116 [2019-11-28 17:32:53,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:53,533 INFO L462 AbstractCegarLoop]: Abstraction has 2790 states and 3146 transitions. [2019-11-28 17:32:53,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:53,533 INFO L276 IsEmpty]: Start isEmpty. Operand 2790 states and 3146 transitions. [2019-11-28 17:32:53,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-11-28 17:32:53,536 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:53,536 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:53,536 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:53,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:53,537 INFO L82 PathProgramCache]: Analyzing trace with hash 1717534558, now seen corresponding path program 1 times [2019-11-28 17:32:53,537 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:53,537 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218313730] [2019-11-28 17:32:53,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:53,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-28 17:32:53,602 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-28 17:32:53,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218313730] [2019-11-28 17:32:53,603 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-28 17:32:53,603 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-28 17:32:53,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879721826] [2019-11-28 17:32:53,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-28 17:32:53,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-28 17:32:53,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-28 17:32:53,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:53,610 INFO L87 Difference]: Start difference. First operand 2790 states and 3146 transitions. Second operand 3 states. [2019-11-28 17:32:53,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-28 17:32:53,739 INFO L93 Difference]: Finished difference Result 3172 states and 3583 transitions. [2019-11-28 17:32:53,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-28 17:32:53,739 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2019-11-28 17:32:53,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-28 17:32:53,744 INFO L225 Difference]: With dead ends: 3172 [2019-11-28 17:32:53,744 INFO L226 Difference]: Without dead ends: 2470 [2019-11-28 17:32:53,747 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-28 17:32:53,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2470 states. [2019-11-28 17:32:53,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2470 to 2470. [2019-11-28 17:32:53,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2470 states. [2019-11-28 17:32:53,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2470 states to 2470 states and 2766 transitions. [2019-11-28 17:32:53,876 INFO L78 Accepts]: Start accepts. Automaton has 2470 states and 2766 transitions. Word has length 117 [2019-11-28 17:32:53,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-28 17:32:53,876 INFO L462 AbstractCegarLoop]: Abstraction has 2470 states and 2766 transitions. [2019-11-28 17:32:53,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-28 17:32:53,877 INFO L276 IsEmpty]: Start isEmpty. Operand 2470 states and 2766 transitions. [2019-11-28 17:32:53,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-11-28 17:32:53,880 INFO L402 BasicCegarLoop]: Found error trace [2019-11-28 17:32:53,880 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-28 17:32:53,881 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-28 17:32:53,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-28 17:32:53,881 INFO L82 PathProgramCache]: Analyzing trace with hash -692010475, now seen corresponding path program 1 times [2019-11-28 17:32:53,882 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-28 17:32:53,882 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1790192507] [2019-11-28 17:32:53,882 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-28 17:32:53,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 17:32:53,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-28 17:32:53,965 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-28 17:32:53,965 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-28 17:32:54,062 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 05:32:54 BoogieIcfgContainer [2019-11-28 17:32:54,063 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-28 17:32:54,063 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-28 17:32:54,063 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-28 17:32:54,064 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-28 17:32:54,064 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 05:32:44" (3/4) ... [2019-11-28 17:32:54,067 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-28 17:32:54,263 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-28 17:32:54,263 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-28 17:32:54,266 INFO L168 Benchmark]: Toolchain (without parser) took 11042.20 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 777.5 MB). Free memory was 953.7 MB in the beginning and 1.8 GB in the end (delta: -808.8 MB). Peak memory consumption was 645.5 MB. Max. memory is 11.5 GB. [2019-11-28 17:32:54,266 INFO L168 Benchmark]: CDTParser took 0.33 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 17:32:54,267 INFO L168 Benchmark]: CACSL2BoogieTranslator took 499.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 953.7 MB in the beginning and 1.1 GB in the end (delta: -178.6 MB). Peak memory consumption was 20.4 MB. Max. memory is 11.5 GB. [2019-11-28 17:32:54,267 INFO L168 Benchmark]: Boogie Procedure Inliner took 56.53 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-28 17:32:54,267 INFO L168 Benchmark]: Boogie Preprocessor took 45.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-11-28 17:32:54,268 INFO L168 Benchmark]: RCFGBuilder took 947.54 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.9 MB). Peak memory consumption was 51.9 MB. Max. memory is 11.5 GB. [2019-11-28 17:32:54,268 INFO L168 Benchmark]: TraceAbstraction took 9281.99 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 374.9 MB). Free memory was 1.1 GB in the beginning and 830.4 MB in the end (delta: 243.5 MB). Peak memory consumption was 618.3 MB. Max. memory is 11.5 GB. [2019-11-28 17:32:54,268 INFO L168 Benchmark]: Witness Printer took 200.47 ms. Allocated memory was 1.5 GB in the beginning and 1.8 GB in the end (delta: 260.6 MB). Free memory was 830.4 MB in the beginning and 1.8 GB in the end (delta: -932.1 MB). Peak memory consumption was 5.3 MB. Max. memory is 11.5 GB. [2019-11-28 17:32:54,271 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 499.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 953.7 MB in the beginning and 1.1 GB in the end (delta: -178.6 MB). Peak memory consumption was 20.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 56.53 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 45.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * RCFGBuilder took 947.54 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.9 MB). Peak memory consumption was 51.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 9281.99 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 374.9 MB). Free memory was 1.1 GB in the beginning and 830.4 MB in the end (delta: 243.5 MB). Peak memory consumption was 618.3 MB. Max. memory is 11.5 GB. * Witness Printer took 200.47 ms. Allocated memory was 1.5 GB in the beginning and 1.8 GB in the end (delta: 260.6 MB). Free memory was 830.4 MB in the beginning and 1.8 GB in the end (delta: -932.1 MB). Peak memory consumption was 5.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int t2_i ; [L24] int M_E = 2; [L25] int T1_E = 2; [L26] int T2_E = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; VAL [E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L563] int __retres1 ; [L477] m_i = 1 [L478] t1_i = 1 [L479] t2_i = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L504] int kernel_st ; [L505] int tmp ; [L506] int tmp___0 ; [L510] kernel_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L211] COND TRUE m_i == 1 [L212] m_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L216] COND TRUE t1_i == 1 [L217] t1_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L221] COND TRUE t2_i == 1 [L222] t2_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L324] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L329] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L334] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L339] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L344] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L146] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L156] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L158] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L162] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L165] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L175] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L177] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L181] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L184] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L194] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L196] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L357] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L362] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L367] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L372] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L377] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L518] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L521] kernel_st = 1 [L257] int tmp ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L261] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L231] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L252] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L78] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L89] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L113] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L124] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L126] t2_pc = 1 [L127] t2_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L261] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L231] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L252] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND TRUE \read(tmp_ndt_1) [L276] m_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L37] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L48] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L51] E_1 = 1 [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND TRUE E_1 == 1 [L167] __retres1 = 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] tmp___0 = is_transmit1_triggered() [L403] COND TRUE \read(tmp___0) [L404] t1_st = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L194] __retres1 = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L53] E_1 = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L56] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L58] m_pc = 1 [L59] m_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L78] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L81] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L97] E_2 = 1 [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L147] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L175] __retres1 = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND TRUE E_2 == 1 [L186] __retres1 = 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] tmp___1 = is_transmit2_triggered() [L411] COND TRUE \read(tmp___1) [L412] t2_st = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L99] E_2 = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L89] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L113] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L116] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L11] __VERIFIER_error() VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 192 locations, 1 error locations. Result: UNSAFE, OverallTime: 9.1s, OverallIterations: 19, TraceHistogramMax: 2, AutomataDifference: 4.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5274 SDtfs, 4949 SDslu, 4000 SDs, 0 SdLazy, 329 SolverSat, 161 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 66 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6542occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.1s AutomataMinimizationTime, 18 MinimizatonAttempts, 8022 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 1399 NumberOfCodeBlocks, 1399 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 1263 ConstructedInterpolants, 0 QuantifiedInterpolants, 148665 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 126/126 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...