./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-overflow.prp --file ../../sv-benchmarks/c/bitvector/soft_float_1-3a.c.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for overflows Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_1-3a.c.cil.c -s /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/config/svcomp-Overflow-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! overflow) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0e04f2515dd5c7ce697460622800d33932bf1903 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/config using search string *Overflow*32bit*_Bitvector*.epf No suitable settings file found using Overflow*32bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:46:24,801 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:46:24,803 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:46:24,810 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:46:24,811 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:46:24,811 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:46:24,812 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:46:24,813 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:46:24,815 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:46:24,815 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:46:24,816 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:46:24,817 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:46:24,817 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:46:24,818 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:46:24,818 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:46:24,819 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:46:24,819 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:46:24,820 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:46:24,821 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:46:24,823 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:46:24,824 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:46:24,825 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:46:24,825 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:46:24,826 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:46:24,828 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:46:24,828 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:46:24,828 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:46:24,828 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:46:24,829 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:46:24,829 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:46:24,829 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:46:24,830 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:46:24,830 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:46:24,831 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:46:24,831 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:46:24,832 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:46:24,832 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:46:24,832 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:46:24,832 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:46:24,833 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:46:24,833 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:46:24,834 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/config/svcomp-Overflow-32bit-Automizer_Default.epf [2019-12-07 18:46:24,843 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:46:24,844 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:46:24,844 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:46:24,845 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:46:24,845 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:46:24,845 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:46:24,845 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:46:24,845 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2019-12-07 18:46:24,845 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:46:24,845 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:46:24,846 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:46:24,846 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:46:24,846 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:46:24,846 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:46:24,846 INFO L138 SettingsManager]: * Check absence of signed integer overflows=true [2019-12-07 18:46:24,846 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:46:24,846 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:46:24,847 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:46:24,847 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:46:24,847 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:46:24,847 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:46:24,847 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:46:24,847 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:46:24,847 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:46:24,848 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:46:24,848 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:46:24,848 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:46:24,848 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:46:24,848 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:46:24,848 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:46:24,848 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:46:24,848 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! overflow) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0e04f2515dd5c7ce697460622800d33932bf1903 [2019-12-07 18:46:24,948 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:46:24,958 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:46:24,961 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:46:24,962 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:46:24,962 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:46:24,963 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/../../sv-benchmarks/c/bitvector/soft_float_1-3a.c.cil.c [2019-12-07 18:46:25,006 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/data/6920e7cea/8499524dc55047dc9aaed522f3691d75/FLAGd6f598fe7 [2019-12-07 18:46:25,365 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:46:25,366 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/sv-benchmarks/c/bitvector/soft_float_1-3a.c.cil.c [2019-12-07 18:46:25,372 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/data/6920e7cea/8499524dc55047dc9aaed522f3691d75/FLAGd6f598fe7 [2019-12-07 18:46:25,381 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/data/6920e7cea/8499524dc55047dc9aaed522f3691d75 [2019-12-07 18:46:25,383 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:46:25,384 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:46:25,385 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:46:25,385 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:46:25,387 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:46:25,387 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,389 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@60a684a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25, skipping insertion in model container [2019-12-07 18:46:25,389 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,393 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:46:25,416 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:46:25,581 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:46:25,583 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:46:25,613 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:46:25,622 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:46:25,622 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25 WrapperNode [2019-12-07 18:46:25,622 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:46:25,623 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:46:25,623 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:46:25,623 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:46:25,628 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,634 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,654 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:46:25,654 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:46:25,654 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:46:25,654 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:46:25,661 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,661 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,663 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,663 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,668 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,673 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,675 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... [2019-12-07 18:46:25,678 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:46:25,678 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:46:25,678 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:46:25,678 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:46:25,679 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_f63600a0-900c-452e-bc40-c2678628e7b8/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:46:25,717 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:46:25,718 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:46:26,040 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:46:26,040 INFO L287 CfgBuilder]: Removed 30 assume(true) statements. [2019-12-07 18:46:26,041 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:26 BoogieIcfgContainer [2019-12-07 18:46:26,041 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:46:26,042 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:46:26,042 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:46:26,044 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:46:26,044 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:46:25" (1/3) ... [2019-12-07 18:46:26,044 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@59f1ed84 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:46:26, skipping insertion in model container [2019-12-07 18:46:26,045 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:25" (2/3) ... [2019-12-07 18:46:26,045 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@59f1ed84 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:46:26, skipping insertion in model container [2019-12-07 18:46:26,045 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:26" (3/3) ... [2019-12-07 18:46:26,046 INFO L109 eAbstractionObserver]: Analyzing ICFG soft_float_1-3a.c.cil.c [2019-12-07 18:46:26,052 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:46:26,057 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 28 error locations. [2019-12-07 18:46:26,064 INFO L249 AbstractCegarLoop]: Starting to check reachability of 28 error locations. [2019-12-07 18:46:26,080 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:46:26,080 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:46:26,080 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:46:26,080 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:46:26,080 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:46:26,080 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:46:26,081 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:46:26,081 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:46:26,096 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states. [2019-12-07 18:46:26,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2019-12-07 18:46:26,099 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,100 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,100 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,104 INFO L82 PathProgramCache]: Analyzing trace with hash 922901410, now seen corresponding path program 1 times [2019-12-07 18:46:26,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1805896217] [2019-12-07 18:46:26,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,187 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1805896217] [2019-12-07 18:46:26,188 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,188 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:26,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1145722510] [2019-12-07 18:46:26,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 2 states [2019-12-07 18:46:26,192 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2019-12-07 18:46:26,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2019-12-07 18:46:26,202 INFO L87 Difference]: Start difference. First operand 144 states. Second operand 2 states. [2019-12-07 18:46:26,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,223 INFO L93 Difference]: Finished difference Result 269 states and 377 transitions. [2019-12-07 18:46:26,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2019-12-07 18:46:26,223 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 6 [2019-12-07 18:46:26,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,231 INFO L225 Difference]: With dead ends: 269 [2019-12-07 18:46:26,231 INFO L226 Difference]: Without dead ends: 106 [2019-12-07 18:46:26,234 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2019-12-07 18:46:26,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2019-12-07 18:46:26,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2019-12-07 18:46:26,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2019-12-07 18:46:26,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 129 transitions. [2019-12-07 18:46:26,262 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 129 transitions. Word has length 6 [2019-12-07 18:46:26,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,262 INFO L462 AbstractCegarLoop]: Abstraction has 106 states and 129 transitions. [2019-12-07 18:46:26,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 2 states. [2019-12-07 18:46:26,262 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 129 transitions. [2019-12-07 18:46:26,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2019-12-07 18:46:26,263 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,263 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,263 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,264 INFO L82 PathProgramCache]: Analyzing trace with hash 921960144, now seen corresponding path program 1 times [2019-12-07 18:46:26,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451534976] [2019-12-07 18:46:26,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,299 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451534976] [2019-12-07 18:46:26,300 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,300 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:26,300 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952048863] [2019-12-07 18:46:26,301 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:26,301 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:26,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,301 INFO L87 Difference]: Start difference. First operand 106 states and 129 transitions. Second operand 4 states. [2019-12-07 18:46:26,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,389 INFO L93 Difference]: Finished difference Result 230 states and 275 transitions. [2019-12-07 18:46:26,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:26,389 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 6 [2019-12-07 18:46:26,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,390 INFO L225 Difference]: With dead ends: 230 [2019-12-07 18:46:26,391 INFO L226 Difference]: Without dead ends: 126 [2019-12-07 18:46:26,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2019-12-07 18:46:26,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 86. [2019-12-07 18:46:26,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2019-12-07 18:46:26,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 103 transitions. [2019-12-07 18:46:26,399 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 103 transitions. Word has length 6 [2019-12-07 18:46:26,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,399 INFO L462 AbstractCegarLoop]: Abstraction has 86 states and 103 transitions. [2019-12-07 18:46:26,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:26,399 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 103 transitions. [2019-12-07 18:46:26,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 18:46:26,399 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,399 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,400 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,400 INFO L82 PathProgramCache]: Analyzing trace with hash -118682603, now seen corresponding path program 1 times [2019-12-07 18:46:26,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,400 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497475222] [2019-12-07 18:46:26,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,430 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497475222] [2019-12-07 18:46:26,430 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,430 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:26,430 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [832720815] [2019-12-07 18:46:26,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:26,430 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:26,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,431 INFO L87 Difference]: Start difference. First operand 86 states and 103 transitions. Second operand 4 states. [2019-12-07 18:46:26,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,476 INFO L93 Difference]: Finished difference Result 133 states and 158 transitions. [2019-12-07 18:46:26,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:26,477 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 [2019-12-07 18:46:26,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,478 INFO L225 Difference]: With dead ends: 133 [2019-12-07 18:46:26,478 INFO L226 Difference]: Without dead ends: 129 [2019-12-07 18:46:26,478 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:26,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2019-12-07 18:46:26,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 87. [2019-12-07 18:46:26,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2019-12-07 18:46:26,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 105 transitions. [2019-12-07 18:46:26,485 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 105 transitions. Word has length 9 [2019-12-07 18:46:26,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,485 INFO L462 AbstractCegarLoop]: Abstraction has 87 states and 105 transitions. [2019-12-07 18:46:26,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:26,485 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 105 transitions. [2019-12-07 18:46:26,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-12-07 18:46:26,486 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,486 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,486 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,486 INFO L82 PathProgramCache]: Analyzing trace with hash 615806736, now seen corresponding path program 1 times [2019-12-07 18:46:26,487 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,487 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067162807] [2019-12-07 18:46:26,487 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067162807] [2019-12-07 18:46:26,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:26,504 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1893638556] [2019-12-07 18:46:26,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:26,505 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:26,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:26,505 INFO L87 Difference]: Start difference. First operand 87 states and 105 transitions. Second operand 3 states. [2019-12-07 18:46:26,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,538 INFO L93 Difference]: Finished difference Result 127 states and 150 transitions. [2019-12-07 18:46:26,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:26,538 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 [2019-12-07 18:46:26,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,539 INFO L225 Difference]: With dead ends: 127 [2019-12-07 18:46:26,539 INFO L226 Difference]: Without dead ends: 125 [2019-12-07 18:46:26,539 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:26,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2019-12-07 18:46:26,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 85. [2019-12-07 18:46:26,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2019-12-07 18:46:26,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 103 transitions. [2019-12-07 18:46:26,545 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 103 transitions. Word has length 10 [2019-12-07 18:46:26,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,546 INFO L462 AbstractCegarLoop]: Abstraction has 85 states and 103 transitions. [2019-12-07 18:46:26,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:26,546 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 103 transitions. [2019-12-07 18:46:26,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:46:26,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,546 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,547 INFO L82 PathProgramCache]: Analyzing trace with hash -1497311933, now seen corresponding path program 1 times [2019-12-07 18:46:26,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079041763] [2019-12-07 18:46:26,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,569 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079041763] [2019-12-07 18:46:26,569 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,569 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:26,569 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1311251293] [2019-12-07 18:46:26,569 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:26,569 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:26,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,570 INFO L87 Difference]: Start difference. First operand 85 states and 103 transitions. Second operand 4 states. [2019-12-07 18:46:26,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,609 INFO L93 Difference]: Finished difference Result 131 states and 155 transitions. [2019-12-07 18:46:26,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:26,609 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:46:26,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,610 INFO L225 Difference]: With dead ends: 131 [2019-12-07 18:46:26,610 INFO L226 Difference]: Without dead ends: 129 [2019-12-07 18:46:26,610 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:26,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2019-12-07 18:46:26,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 87. [2019-12-07 18:46:26,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2019-12-07 18:46:26,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 105 transitions. [2019-12-07 18:46:26,616 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 105 transitions. Word has length 11 [2019-12-07 18:46:26,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,616 INFO L462 AbstractCegarLoop]: Abstraction has 87 states and 105 transitions. [2019-12-07 18:46:26,616 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:26,617 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 105 transitions. [2019-12-07 18:46:26,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2019-12-07 18:46:26,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,617 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,618 INFO L82 PathProgramCache]: Analyzing trace with hash -832741477, now seen corresponding path program 1 times [2019-12-07 18:46:26,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751597672] [2019-12-07 18:46:26,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,640 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1751597672] [2019-12-07 18:46:26,640 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,640 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:26,641 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [356924826] [2019-12-07 18:46:26,641 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:26,641 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:26,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,641 INFO L87 Difference]: Start difference. First operand 87 states and 105 transitions. Second operand 4 states. [2019-12-07 18:46:26,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,684 INFO L93 Difference]: Finished difference Result 134 states and 160 transitions. [2019-12-07 18:46:26,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:26,684 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2019-12-07 18:46:26,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,685 INFO L225 Difference]: With dead ends: 134 [2019-12-07 18:46:26,685 INFO L226 Difference]: Without dead ends: 132 [2019-12-07 18:46:26,685 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:26,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2019-12-07 18:46:26,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 90. [2019-12-07 18:46:26,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2019-12-07 18:46:26,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 109 transitions. [2019-12-07 18:46:26,691 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 109 transitions. Word has length 12 [2019-12-07 18:46:26,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,692 INFO L462 AbstractCegarLoop]: Abstraction has 90 states and 109 transitions. [2019-12-07 18:46:26,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:26,692 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 109 transitions. [2019-12-07 18:46:26,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:46:26,692 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,692 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,693 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,693 INFO L82 PathProgramCache]: Analyzing trace with hash 952355221, now seen corresponding path program 1 times [2019-12-07 18:46:26,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019013864] [2019-12-07 18:46:26,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019013864] [2019-12-07 18:46:26,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:26,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [12817657] [2019-12-07 18:46:26,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:26,713 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:26,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,713 INFO L87 Difference]: Start difference. First operand 90 states and 109 transitions. Second operand 4 states. [2019-12-07 18:46:26,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,759 INFO L93 Difference]: Finished difference Result 178 states and 209 transitions. [2019-12-07 18:46:26,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:26,759 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 18:46:26,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,760 INFO L225 Difference]: With dead ends: 178 [2019-12-07 18:46:26,760 INFO L226 Difference]: Without dead ends: 176 [2019-12-07 18:46:26,761 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2019-12-07 18:46:26,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 89. [2019-12-07 18:46:26,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2019-12-07 18:46:26,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 108 transitions. [2019-12-07 18:46:26,767 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 108 transitions. Word has length 14 [2019-12-07 18:46:26,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,767 INFO L462 AbstractCegarLoop]: Abstraction has 89 states and 108 transitions. [2019-12-07 18:46:26,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:26,767 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 108 transitions. [2019-12-07 18:46:26,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:46:26,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,768 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,769 INFO L82 PathProgramCache]: Analyzing trace with hash -513187613, now seen corresponding path program 1 times [2019-12-07 18:46:26,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,769 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611052054] [2019-12-07 18:46:26,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611052054] [2019-12-07 18:46:26,797 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,797 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:26,797 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281159780] [2019-12-07 18:46:26,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:26,797 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:26,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,798 INFO L87 Difference]: Start difference. First operand 89 states and 108 transitions. Second operand 4 states. [2019-12-07 18:46:26,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,836 INFO L93 Difference]: Finished difference Result 131 states and 156 transitions. [2019-12-07 18:46:26,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:26,837 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 18:46:26,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,837 INFO L225 Difference]: With dead ends: 131 [2019-12-07 18:46:26,837 INFO L226 Difference]: Without dead ends: 129 [2019-12-07 18:46:26,838 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:26,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2019-12-07 18:46:26,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 84. [2019-12-07 18:46:26,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2019-12-07 18:46:26,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 103 transitions. [2019-12-07 18:46:26,843 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 103 transitions. Word has length 14 [2019-12-07 18:46:26,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,843 INFO L462 AbstractCegarLoop]: Abstraction has 84 states and 103 transitions. [2019-12-07 18:46:26,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:26,844 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 103 transitions. [2019-12-07 18:46:26,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:46:26,844 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,844 INFO L410 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,845 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,845 INFO L82 PathProgramCache]: Analyzing trace with hash 2134556229, now seen corresponding path program 1 times [2019-12-07 18:46:26,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1068919260] [2019-12-07 18:46:26,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,868 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,868 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1068919260] [2019-12-07 18:46:26,868 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,868 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:26,868 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1246037696] [2019-12-07 18:46:26,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:26,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:26,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,870 INFO L87 Difference]: Start difference. First operand 84 states and 103 transitions. Second operand 4 states. [2019-12-07 18:46:26,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,917 INFO L93 Difference]: Finished difference Result 168 states and 199 transitions. [2019-12-07 18:46:26,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:26,918 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:46:26,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,919 INFO L225 Difference]: With dead ends: 168 [2019-12-07 18:46:26,919 INFO L226 Difference]: Without dead ends: 166 [2019-12-07 18:46:26,919 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:26,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2019-12-07 18:46:26,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 74. [2019-12-07 18:46:26,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2019-12-07 18:46:26,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 91 transitions. [2019-12-07 18:46:26,923 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 91 transitions. Word has length 15 [2019-12-07 18:46:26,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,924 INFO L462 AbstractCegarLoop]: Abstraction has 74 states and 91 transitions. [2019-12-07 18:46:26,924 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:26,924 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 91 transitions. [2019-12-07 18:46:26,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 18:46:26,924 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,925 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,925 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:26,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,925 INFO L82 PathProgramCache]: Analyzing trace with hash -324557016, now seen corresponding path program 1 times [2019-12-07 18:46:26,925 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,925 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312204749] [2019-12-07 18:46:26,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:27,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:27,046 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312204749] [2019-12-07 18:46:27,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:27,046 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:46:27,046 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476574871] [2019-12-07 18:46:27,046 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:46:27,047 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:27,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:46:27,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:27,047 INFO L87 Difference]: Start difference. First operand 74 states and 91 transitions. Second operand 9 states. [2019-12-07 18:46:27,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:27,196 INFO L93 Difference]: Finished difference Result 118 states and 141 transitions. [2019-12-07 18:46:27,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:46:27,197 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 17 [2019-12-07 18:46:27,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:27,197 INFO L225 Difference]: With dead ends: 118 [2019-12-07 18:46:27,197 INFO L226 Difference]: Without dead ends: 76 [2019-12-07 18:46:27,198 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:46:27,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2019-12-07 18:46:27,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 74. [2019-12-07 18:46:27,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2019-12-07 18:46:27,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 89 transitions. [2019-12-07 18:46:27,202 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 89 transitions. Word has length 17 [2019-12-07 18:46:27,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:27,202 INFO L462 AbstractCegarLoop]: Abstraction has 74 states and 89 transitions. [2019-12-07 18:46:27,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:46:27,202 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 89 transitions. [2019-12-07 18:46:27,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:46:27,203 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:27,203 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:27,204 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:27,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:27,204 INFO L82 PathProgramCache]: Analyzing trace with hash 1112826903, now seen corresponding path program 1 times [2019-12-07 18:46:27,204 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:27,204 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730011409] [2019-12-07 18:46:27,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:27,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:27,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:27,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [730011409] [2019-12-07 18:46:27,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:27,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:46:27,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288588880] [2019-12-07 18:46:27,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:46:27,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:27,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:46:27,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:46:27,319 INFO L87 Difference]: Start difference. First operand 74 states and 89 transitions. Second operand 8 states. [2019-12-07 18:46:27,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:27,448 INFO L93 Difference]: Finished difference Result 170 states and 193 transitions. [2019-12-07 18:46:27,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:46:27,449 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2019-12-07 18:46:27,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:27,450 INFO L225 Difference]: With dead ends: 170 [2019-12-07 18:46:27,450 INFO L226 Difference]: Without dead ends: 140 [2019-12-07 18:46:27,450 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:46:27,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2019-12-07 18:46:27,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 92. [2019-12-07 18:46:27,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2019-12-07 18:46:27,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 112 transitions. [2019-12-07 18:46:27,455 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 112 transitions. Word has length 21 [2019-12-07 18:46:27,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:27,455 INFO L462 AbstractCegarLoop]: Abstraction has 92 states and 112 transitions. [2019-12-07 18:46:27,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:46:27,455 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 112 transitions. [2019-12-07 18:46:27,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 18:46:27,456 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:27,456 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:27,456 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:27,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:27,456 INFO L82 PathProgramCache]: Analyzing trace with hash -2013141521, now seen corresponding path program 1 times [2019-12-07 18:46:27,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:27,456 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1454229531] [2019-12-07 18:46:27,457 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:27,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:27,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:27,550 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1454229531] [2019-12-07 18:46:27,550 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:27,550 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:46:27,550 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [619109136] [2019-12-07 18:46:27,550 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:46:27,550 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:27,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:46:27,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:46:27,551 INFO L87 Difference]: Start difference. First operand 92 states and 112 transitions. Second operand 8 states. [2019-12-07 18:46:27,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:27,690 INFO L93 Difference]: Finished difference Result 240 states and 281 transitions. [2019-12-07 18:46:27,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:46:27,690 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 23 [2019-12-07 18:46:27,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:27,691 INFO L225 Difference]: With dead ends: 240 [2019-12-07 18:46:27,691 INFO L226 Difference]: Without dead ends: 192 [2019-12-07 18:46:27,692 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:46:27,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2019-12-07 18:46:27,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 132. [2019-12-07 18:46:27,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2019-12-07 18:46:27,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 163 transitions. [2019-12-07 18:46:27,698 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 163 transitions. Word has length 23 [2019-12-07 18:46:27,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:27,698 INFO L462 AbstractCegarLoop]: Abstraction has 132 states and 163 transitions. [2019-12-07 18:46:27,698 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:46:27,698 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 163 transitions. [2019-12-07 18:46:27,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 18:46:27,699 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:27,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:27,699 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:27,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:27,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1836591731, now seen corresponding path program 1 times [2019-12-07 18:46:27,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:27,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630646113] [2019-12-07 18:46:27,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:27,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:27,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:27,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630646113] [2019-12-07 18:46:27,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:27,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:46:27,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651302743] [2019-12-07 18:46:27,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:46:27,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:27,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:46:27,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:46:27,760 INFO L87 Difference]: Start difference. First operand 132 states and 163 transitions. Second operand 8 states. [2019-12-07 18:46:27,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:27,876 INFO L93 Difference]: Finished difference Result 166 states and 197 transitions. [2019-12-07 18:46:27,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:46:27,877 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 23 [2019-12-07 18:46:27,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:27,878 INFO L225 Difference]: With dead ends: 166 [2019-12-07 18:46:27,878 INFO L226 Difference]: Without dead ends: 92 [2019-12-07 18:46:27,878 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:46:27,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2019-12-07 18:46:27,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2019-12-07 18:46:27,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2019-12-07 18:46:27,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 110 transitions. [2019-12-07 18:46:27,884 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 110 transitions. Word has length 23 [2019-12-07 18:46:27,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:27,884 INFO L462 AbstractCegarLoop]: Abstraction has 92 states and 110 transitions. [2019-12-07 18:46:27,884 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:46:27,884 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 110 transitions. [2019-12-07 18:46:27,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:46:27,885 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:27,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:27,885 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:27,886 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:27,886 INFO L82 PathProgramCache]: Analyzing trace with hash -1319121376, now seen corresponding path program 1 times [2019-12-07 18:46:27,886 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:27,886 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612945714] [2019-12-07 18:46:27,886 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:27,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:27,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:27,973 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612945714] [2019-12-07 18:46:27,973 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:27,973 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:27,973 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1138445772] [2019-12-07 18:46:27,973 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:46:27,974 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:27,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:46:27,974 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:27,974 INFO L87 Difference]: Start difference. First operand 92 states and 110 transitions. Second operand 7 states. [2019-12-07 18:46:28,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:28,110 INFO L93 Difference]: Finished difference Result 308 states and 346 transitions. [2019-12-07 18:46:28,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:46:28,110 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2019-12-07 18:46:28,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:28,112 INFO L225 Difference]: With dead ends: 308 [2019-12-07 18:46:28,112 INFO L226 Difference]: Without dead ends: 262 [2019-12-07 18:46:28,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:46:28,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2019-12-07 18:46:28,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 132. [2019-12-07 18:46:28,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2019-12-07 18:46:28,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 161 transitions. [2019-12-07 18:46:28,121 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 161 transitions. Word has length 27 [2019-12-07 18:46:28,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:28,121 INFO L462 AbstractCegarLoop]: Abstraction has 132 states and 161 transitions. [2019-12-07 18:46:28,121 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:46:28,121 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 161 transitions. [2019-12-07 18:46:28,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:46:28,122 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:28,122 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:28,123 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:28,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:28,123 INFO L82 PathProgramCache]: Analyzing trace with hash 590911882, now seen corresponding path program 1 times [2019-12-07 18:46:28,123 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:28,123 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185138072] [2019-12-07 18:46:28,123 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:28,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:28,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:28,261 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185138072] [2019-12-07 18:46:28,261 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:28,261 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:46:28,261 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [314984841] [2019-12-07 18:46:28,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:46:28,261 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:28,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:46:28,262 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:28,262 INFO L87 Difference]: Start difference. First operand 132 states and 161 transitions. Second operand 9 states. [2019-12-07 18:46:28,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:28,488 INFO L93 Difference]: Finished difference Result 181 states and 209 transitions. [2019-12-07 18:46:28,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:46:28,489 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2019-12-07 18:46:28,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:28,490 INFO L225 Difference]: With dead ends: 181 [2019-12-07 18:46:28,490 INFO L226 Difference]: Without dead ends: 180 [2019-12-07 18:46:28,490 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=124, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:46:28,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2019-12-07 18:46:28,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 122. [2019-12-07 18:46:28,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2019-12-07 18:46:28,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 147 transitions. [2019-12-07 18:46:28,499 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 147 transitions. Word has length 29 [2019-12-07 18:46:28,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:28,499 INFO L462 AbstractCegarLoop]: Abstraction has 122 states and 147 transitions. [2019-12-07 18:46:28,499 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:46:28,499 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 147 transitions. [2019-12-07 18:46:28,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:46:28,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:28,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:28,499 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:28,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:28,500 INFO L82 PathProgramCache]: Analyzing trace with hash 767461672, now seen corresponding path program 1 times [2019-12-07 18:46:28,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:28,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323805606] [2019-12-07 18:46:28,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:28,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:28,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:28,558 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323805606] [2019-12-07 18:46:28,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:28,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:46:28,559 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679756789] [2019-12-07 18:46:28,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:28,559 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:28,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:28,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:28,559 INFO L87 Difference]: Start difference. First operand 122 states and 147 transitions. Second operand 6 states. [2019-12-07 18:46:28,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:28,627 INFO L93 Difference]: Finished difference Result 170 states and 201 transitions. [2019-12-07 18:46:28,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:46:28,627 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2019-12-07 18:46:28,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:28,628 INFO L225 Difference]: With dead ends: 170 [2019-12-07 18:46:28,628 INFO L226 Difference]: Without dead ends: 122 [2019-12-07 18:46:28,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:46:28,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2019-12-07 18:46:28,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 119. [2019-12-07 18:46:28,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2019-12-07 18:46:28,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 140 transitions. [2019-12-07 18:46:28,633 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 140 transitions. Word has length 29 [2019-12-07 18:46:28,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:28,634 INFO L462 AbstractCegarLoop]: Abstraction has 119 states and 140 transitions. [2019-12-07 18:46:28,634 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:28,634 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 140 transitions. [2019-12-07 18:46:28,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:46:28,634 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:28,634 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:28,634 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:28,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:28,635 INFO L82 PathProgramCache]: Analyzing trace with hash 1093653162, now seen corresponding path program 1 times [2019-12-07 18:46:28,635 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:28,635 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949117721] [2019-12-07 18:46:28,635 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:28,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:28,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:28,685 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949117721] [2019-12-07 18:46:28,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:28,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:28,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862629941] [2019-12-07 18:46:28,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:28,686 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:28,686 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:28,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:28,687 INFO L87 Difference]: Start difference. First operand 119 states and 140 transitions. Second operand 6 states. [2019-12-07 18:46:28,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:28,794 INFO L93 Difference]: Finished difference Result 237 states and 261 transitions. [2019-12-07 18:46:28,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:46:28,795 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 18:46:28,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:28,796 INFO L225 Difference]: With dead ends: 237 [2019-12-07 18:46:28,796 INFO L226 Difference]: Without dead ends: 206 [2019-12-07 18:46:28,796 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:46:28,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2019-12-07 18:46:28,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 129. [2019-12-07 18:46:28,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2019-12-07 18:46:28,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 151 transitions. [2019-12-07 18:46:28,801 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 151 transitions. Word has length 31 [2019-12-07 18:46:28,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:28,802 INFO L462 AbstractCegarLoop]: Abstraction has 129 states and 151 transitions. [2019-12-07 18:46:28,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:28,802 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 151 transitions. [2019-12-07 18:46:28,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:46:28,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:28,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:28,802 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-12-07 18:46:28,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:28,803 INFO L82 PathProgramCache]: Analyzing trace with hash 964745492, now seen corresponding path program 1 times [2019-12-07 18:46:28,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:28,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786626401] [2019-12-07 18:46:28,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:28,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:46:28,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:46:28,840 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:46:28,841 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:46:28,862 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:46:28 BoogieIcfgContainer [2019-12-07 18:46:28,862 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:46:28,863 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:46:28,863 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:46:28,863 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:46:28,863 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:26" (3/4) ... [2019-12-07 18:46:28,866 INFO L140 WitnessPrinter]: No result that supports witness generation found [2019-12-07 18:46:28,866 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:46:28,867 INFO L168 Benchmark]: Toolchain (without parser) took 3482.75 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 158.3 MB). Free memory was 945.1 MB in the beginning and 1.1 GB in the end (delta: -127.0 MB). Peak memory consumption was 31.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:28,867 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:46:28,868 INFO L168 Benchmark]: CACSL2BoogieTranslator took 238.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.7 MB). Free memory was 945.1 MB in the beginning and 1.1 GB in the end (delta: -155.9 MB). Peak memory consumption was 23.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:28,868 INFO L168 Benchmark]: Boogie Procedure Inliner took 31.24 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:46:28,868 INFO L168 Benchmark]: Boogie Preprocessor took 23.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:46:28,868 INFO L168 Benchmark]: RCFGBuilder took 363.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:28,869 INFO L168 Benchmark]: TraceAbstraction took 2820.50 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 45.6 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -15.6 MB). Peak memory consumption was 30.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:28,869 INFO L168 Benchmark]: Witness Printer took 3.03 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:46:28,871 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 238.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.7 MB). Free memory was 945.1 MB in the beginning and 1.1 GB in the end (delta: -155.9 MB). Peak memory consumption was 23.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 31.24 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 363.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 2820.50 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 45.6 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -15.6 MB). Peak memory consumption was 30.1 MB. Max. memory is 11.5 GB. * Witness Printer took 3.03 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 102]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: overapproximation of bitwiseOr at line 100, overapproximation of bitwiseAnd at line 101. Possible FailurePath: [L216] unsigned int a ; [L217] unsigned int ma = __VERIFIER_nondet_uint(); [L218] signed char ea = __VERIFIER_nondet_char(); [L219] unsigned int b ; [L220] unsigned int mb = __VERIFIER_nondet_uint(); [L221] signed char eb = __VERIFIER_nondet_char(); [L222] unsigned int r_add ; [L223] unsigned int zero ; [L224] int sa ; [L225] int sb ; [L226] int tmp ; [L227] int tmp___0 ; [L228] int tmp___1 ; [L229] int tmp___2 ; [L230] int tmp___3 ; [L231] int tmp___4 ; [L232] int tmp___5 ; [L233] int tmp___6 ; [L234] int tmp___7 ; [L235] int tmp___8 ; [L236] int tmp___9 ; [L237] int __retres23 ; [L15] unsigned int res ; [L16] unsigned int __retres4 ; [L19] COND TRUE ! m [L20] __retres4 = 0U [L70] return (__retres4); [L241] zero = base2flt(0, 0) [L15] unsigned int res ; [L16] unsigned int __retres4 ; [L19] COND FALSE !(! m) [L25] COND FALSE !(m < 1U << 24U) [L47] COND TRUE 1 [L49] COND FALSE !(m >= 1U << 25U) [L66] m = m & ~ (1U << 24U) [L67] EXPR e + 128 [L67] res = m | ((unsigned int )(e + 128) << 24U) [L68] __retres4 = res [L70] return (__retres4); [L242] a = base2flt(ma, ea) [L15] unsigned int res ; [L16] unsigned int __retres4 ; [L19] COND FALSE !(! m) [L25] COND FALSE !(m < 1U << 24U) [L47] COND TRUE 1 [L49] COND TRUE m >= 1U << 25U [L54] COND TRUE e >= 127 [L55] __retres4 = 4294967295U [L70] return (__retres4); [L243] b = base2flt(mb, eb) [L245] COND FALSE !(a < zero) [L248] COND TRUE a > zero [L249] tmp = 1 [L253] sa = tmp [L255] COND FALSE !(b < zero) [L258] COND TRUE b > zero [L259] tmp___0 = 1 [L263] sb = tmp___0 [L74] unsigned int res ; [L75] unsigned int ma ; [L76] unsigned int mb ; [L77] unsigned int delta ; [L78] int ea ; [L79] int eb ; [L80] unsigned int tmp ; [L81] unsigned int __retres10 ; [L84] COND TRUE a < b [L85] tmp = a [L86] a = b [L87] b = tmp [L91] COND FALSE !(! b) [L98] ma = a & ((1U << 24U) - 1U) [L99] EXPR (int )(a >> 24U) - 128 [L99] ea = (int )(a >> 24U) - 128 [L100] ma = ma | (1U << 24U) [L101] mb = b & ((1U << 24U) - 1U) [L102] (int )(b >> 24U) - 128 - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 144 locations, 28 error locations. Result: UNSAFE, OverallTime: 2.7s, OverallIterations: 18, TraceHistogramMax: 2, AutomataDifference: 1.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1907 SDtfs, 2273 SDslu, 4236 SDs, 0 SdLazy, 1090 SolverSat, 133 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 120 GetRequests, 18 SyntacticMatches, 1 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=144occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 17 MinimizatonAttempts, 808 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 330 NumberOfCodeBlocks, 330 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 280 ConstructedInterpolants, 0 QuantifiedInterpolants, 33514 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 2/2 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...