./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix002_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix002_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5dc97c546c59ad8f9d40f501960ca5b9415829fc ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:46:13,318 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:46:13,319 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:46:13,326 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:46:13,327 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:46:13,327 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:46:13,328 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:46:13,330 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:46:13,331 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:46:13,331 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:46:13,332 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:46:13,333 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:46:13,333 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:46:13,334 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:46:13,334 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:46:13,335 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:46:13,336 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:46:13,336 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:46:13,337 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:46:13,339 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:46:13,340 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:46:13,341 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:46:13,341 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:46:13,342 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:46:13,343 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:46:13,343 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:46:13,344 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:46:13,344 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:46:13,344 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:46:13,345 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:46:13,345 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:46:13,345 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:46:13,346 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:46:13,346 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:46:13,347 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:46:13,347 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:46:13,347 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:46:13,347 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:46:13,348 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:46:13,348 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:46:13,348 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:46:13,349 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:46:13,358 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:46:13,358 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:46:13,359 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:46:13,359 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:46:13,359 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:46:13,360 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:46:13,360 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:46:13,360 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:46:13,360 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:46:13,360 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:46:13,360 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:46:13,360 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:46:13,360 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:46:13,361 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:46:13,361 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:46:13,361 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:46:13,361 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:46:13,361 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:46:13,361 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:46:13,361 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:46:13,361 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:46:13,362 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:46:13,362 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:46:13,362 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:46:13,362 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:46:13,362 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:46:13,362 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:46:13,362 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:46:13,362 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:46:13,363 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5dc97c546c59ad8f9d40f501960ca5b9415829fc [2019-12-07 18:46:13,471 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:46:13,481 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:46:13,484 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:46:13,485 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:46:13,486 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:46:13,486 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix002_tso.oepc.i [2019-12-07 18:46:13,533 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/data/dadeb1ca8/336a1c600c1f40879abb7ca2e85ac198/FLAG45981baba [2019-12-07 18:46:13,892 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:46:13,893 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/sv-benchmarks/c/pthread-wmm/mix002_tso.oepc.i [2019-12-07 18:46:13,903 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/data/dadeb1ca8/336a1c600c1f40879abb7ca2e85ac198/FLAG45981baba [2019-12-07 18:46:13,912 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/data/dadeb1ca8/336a1c600c1f40879abb7ca2e85ac198 [2019-12-07 18:46:13,914 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:46:13,915 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:46:13,916 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:46:13,916 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:46:13,918 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:46:13,919 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:46:13" (1/1) ... [2019-12-07 18:46:13,921 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:13, skipping insertion in model container [2019-12-07 18:46:13,921 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:46:13" (1/1) ... [2019-12-07 18:46:13,926 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:46:13,962 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:46:14,224 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:46:14,231 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:46:14,273 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:46:14,317 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:46:14,318 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14 WrapperNode [2019-12-07 18:46:14,318 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:46:14,318 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:46:14,318 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:46:14,318 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:46:14,324 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,337 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,354 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:46:14,355 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:46:14,355 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:46:14,355 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:46:14,361 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,361 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,365 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,365 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,372 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,375 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,377 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... [2019-12-07 18:46:14,380 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:46:14,381 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:46:14,381 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:46:14,381 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:46:14,382 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:46:14,420 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:46:14,420 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:46:14,420 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:46:14,420 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:46:14,421 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:46:14,421 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:46:14,421 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:46:14,421 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:46:14,421 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:46:14,421 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:46:14,421 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:46:14,421 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:46:14,421 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:46:14,422 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:46:14,792 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:46:14,792 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:46:14,793 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:14 BoogieIcfgContainer [2019-12-07 18:46:14,793 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:46:14,794 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:46:14,794 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:46:14,797 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:46:14,797 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:46:13" (1/3) ... [2019-12-07 18:46:14,798 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14b4df75 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:46:14, skipping insertion in model container [2019-12-07 18:46:14,798 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:46:14" (2/3) ... [2019-12-07 18:46:14,798 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14b4df75 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:46:14, skipping insertion in model container [2019-12-07 18:46:14,798 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:14" (3/3) ... [2019-12-07 18:46:14,800 INFO L109 eAbstractionObserver]: Analyzing ICFG mix002_tso.oepc.i [2019-12-07 18:46:14,806 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:46:14,806 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:46:14,811 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:46:14,811 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:46:14,837 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,837 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,837 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,837 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,837 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,837 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,837 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,838 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,838 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,838 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,838 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,838 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,838 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,838 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,838 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,839 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,839 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,839 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,839 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,839 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,839 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,839 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,840 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,840 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,840 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,840 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,840 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,840 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,840 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,841 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,841 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,841 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,841 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,841 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,842 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,842 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,842 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,842 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,843 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,843 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,843 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,843 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,843 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,843 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,844 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,844 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,844 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,844 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,844 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,844 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,845 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,845 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,845 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,845 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,845 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,845 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,846 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,846 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,846 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,846 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,846 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,846 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,847 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,847 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,848 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,848 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,849 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,849 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,849 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,849 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,849 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,849 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,850 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,850 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,850 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,850 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,850 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,851 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,851 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,851 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,851 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,851 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,851 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,852 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,852 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,852 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,852 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,852 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,852 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,852 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,853 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,853 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,853 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,853 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,853 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,854 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,854 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,854 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,854 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,854 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,854 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,854 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,855 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,855 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,855 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,855 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,855 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,855 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,856 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,856 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,856 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,856 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,856 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,856 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,856 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,857 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,857 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,857 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,857 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,857 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,858 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,858 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,858 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,858 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,858 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,858 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,858 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,859 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,859 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,859 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,859 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,859 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,859 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,860 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,860 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,860 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,860 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,860 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,860 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,860 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,861 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,861 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,861 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,861 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,861 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,861 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,862 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,862 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,862 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,862 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,862 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,862 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,863 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,863 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,863 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,863 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,863 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,863 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,863 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,864 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,864 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,864 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,864 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,864 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,864 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,865 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,865 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,865 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,865 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,865 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,866 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,866 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,866 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,866 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,866 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,866 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,867 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,867 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:46:14,880 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:46:14,893 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:46:14,893 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:46:14,893 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:46:14,893 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:46:14,893 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:46:14,893 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:46:14,893 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:46:14,894 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:46:14,904 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 180 places, 217 transitions [2019-12-07 18:46:14,905 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 217 transitions [2019-12-07 18:46:14,972 INFO L134 PetriNetUnfolder]: 47/214 cut-off events. [2019-12-07 18:46:14,972 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:46:14,982 INFO L76 FinitePrefix]: Finished finitePrefix Result has 224 conditions, 214 events. 47/214 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/174 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:46:14,998 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 217 transitions [2019-12-07 18:46:15,040 INFO L134 PetriNetUnfolder]: 47/214 cut-off events. [2019-12-07 18:46:15,040 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:46:15,046 INFO L76 FinitePrefix]: Finished finitePrefix Result has 224 conditions, 214 events. 47/214 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/174 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:46:15,061 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:46:15,062 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:46:18,028 WARN L192 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 18:46:18,212 INFO L206 etLargeBlockEncoding]: Checked pairs total: 93316 [2019-12-07 18:46:18,212 INFO L214 etLargeBlockEncoding]: Total number of compositions: 117 [2019-12-07 18:46:18,216 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 104 transitions [2019-12-07 18:46:33,379 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 120347 states. [2019-12-07 18:46:33,380 INFO L276 IsEmpty]: Start isEmpty. Operand 120347 states. [2019-12-07 18:46:33,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:46:33,384 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:33,385 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:46:33,385 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:33,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:33,389 INFO L82 PathProgramCache]: Analyzing trace with hash 922900, now seen corresponding path program 1 times [2019-12-07 18:46:33,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:33,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438818437] [2019-12-07 18:46:33,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:33,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:33,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:33,521 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1438818437] [2019-12-07 18:46:33,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:33,522 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:46:33,522 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1851163790] [2019-12-07 18:46:33,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:33,525 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:33,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:33,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:33,536 INFO L87 Difference]: Start difference. First operand 120347 states. Second operand 3 states. [2019-12-07 18:46:34,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:34,443 INFO L93 Difference]: Finished difference Result 119349 states and 508327 transitions. [2019-12-07 18:46:34,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:34,445 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:46:34,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:34,917 INFO L225 Difference]: With dead ends: 119349 [2019-12-07 18:46:34,917 INFO L226 Difference]: Without dead ends: 112420 [2019-12-07 18:46:34,918 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:39,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112420 states. [2019-12-07 18:46:40,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112420 to 112420. [2019-12-07 18:46:40,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112420 states. [2019-12-07 18:46:42,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112420 states to 112420 states and 478219 transitions. [2019-12-07 18:46:42,831 INFO L78 Accepts]: Start accepts. Automaton has 112420 states and 478219 transitions. Word has length 3 [2019-12-07 18:46:42,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:42,831 INFO L462 AbstractCegarLoop]: Abstraction has 112420 states and 478219 transitions. [2019-12-07 18:46:42,832 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:42,832 INFO L276 IsEmpty]: Start isEmpty. Operand 112420 states and 478219 transitions. [2019-12-07 18:46:42,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:46:42,835 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:42,835 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:42,835 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:42,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:42,835 INFO L82 PathProgramCache]: Analyzing trace with hash -1739393843, now seen corresponding path program 1 times [2019-12-07 18:46:42,835 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:42,835 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1811950552] [2019-12-07 18:46:42,835 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:42,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:42,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:42,896 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1811950552] [2019-12-07 18:46:42,896 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:42,897 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:42,897 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [792307698] [2019-12-07 18:46:42,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:42,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:42,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:42,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:42,898 INFO L87 Difference]: Start difference. First operand 112420 states and 478219 transitions. Second operand 4 states. [2019-12-07 18:46:43,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:43,795 INFO L93 Difference]: Finished difference Result 179210 states and 732067 transitions. [2019-12-07 18:46:43,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:46:43,796 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:46:43,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:44,602 INFO L225 Difference]: With dead ends: 179210 [2019-12-07 18:46:44,602 INFO L226 Difference]: Without dead ends: 179161 [2019-12-07 18:46:44,602 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:49,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179161 states. [2019-12-07 18:46:51,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179161 to 162301. [2019-12-07 18:46:51,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162301 states. [2019-12-07 18:46:52,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162301 states to 162301 states and 672031 transitions. [2019-12-07 18:46:52,357 INFO L78 Accepts]: Start accepts. Automaton has 162301 states and 672031 transitions. Word has length 11 [2019-12-07 18:46:52,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:52,357 INFO L462 AbstractCegarLoop]: Abstraction has 162301 states and 672031 transitions. [2019-12-07 18:46:52,357 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:52,357 INFO L276 IsEmpty]: Start isEmpty. Operand 162301 states and 672031 transitions. [2019-12-07 18:46:52,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:46:52,362 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:52,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:52,362 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:52,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:52,362 INFO L82 PathProgramCache]: Analyzing trace with hash 53844596, now seen corresponding path program 1 times [2019-12-07 18:46:52,362 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:52,362 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [166020863] [2019-12-07 18:46:52,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:52,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:52,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:52,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [166020863] [2019-12-07 18:46:52,411 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:52,411 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:52,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830378597] [2019-12-07 18:46:52,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:52,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:52,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:52,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:52,412 INFO L87 Difference]: Start difference. First operand 162301 states and 672031 transitions. Second operand 4 states. [2019-12-07 18:46:55,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:55,218 INFO L93 Difference]: Finished difference Result 228309 states and 925057 transitions. [2019-12-07 18:46:55,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:46:55,218 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:46:55,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:55,799 INFO L225 Difference]: With dead ends: 228309 [2019-12-07 18:46:55,799 INFO L226 Difference]: Without dead ends: 228253 [2019-12-07 18:46:55,800 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:47:01,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228253 states. [2019-12-07 18:47:04,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228253 to 192006. [2019-12-07 18:47:04,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192006 states. [2019-12-07 18:47:05,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192006 states to 192006 states and 791382 transitions. [2019-12-07 18:47:05,292 INFO L78 Accepts]: Start accepts. Automaton has 192006 states and 791382 transitions. Word has length 13 [2019-12-07 18:47:05,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:05,293 INFO L462 AbstractCegarLoop]: Abstraction has 192006 states and 791382 transitions. [2019-12-07 18:47:05,293 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:47:05,293 INFO L276 IsEmpty]: Start isEmpty. Operand 192006 states and 791382 transitions. [2019-12-07 18:47:05,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:47:05,300 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:05,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:05,300 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:05,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:05,300 INFO L82 PathProgramCache]: Analyzing trace with hash -2104175705, now seen corresponding path program 1 times [2019-12-07 18:47:05,301 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:05,301 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [178511712] [2019-12-07 18:47:05,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:05,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:05,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:05,366 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [178511712] [2019-12-07 18:47:05,367 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:05,367 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:47:05,367 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2001170948] [2019-12-07 18:47:05,367 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:47:05,367 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:05,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:47:05,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:47:05,368 INFO L87 Difference]: Start difference. First operand 192006 states and 791382 transitions. Second operand 5 states. [2019-12-07 18:47:06,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:06,734 INFO L93 Difference]: Finished difference Result 261525 states and 1067824 transitions. [2019-12-07 18:47:06,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:47:06,735 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:47:06,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:07,394 INFO L225 Difference]: With dead ends: 261525 [2019-12-07 18:47:07,394 INFO L226 Difference]: Without dead ends: 261525 [2019-12-07 18:47:07,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:47:16,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261525 states. [2019-12-07 18:47:19,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261525 to 219155. [2019-12-07 18:47:19,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219155 states. [2019-12-07 18:47:19,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219155 states to 219155 states and 902019 transitions. [2019-12-07 18:47:19,701 INFO L78 Accepts]: Start accepts. Automaton has 219155 states and 902019 transitions. Word has length 16 [2019-12-07 18:47:19,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:19,701 INFO L462 AbstractCegarLoop]: Abstraction has 219155 states and 902019 transitions. [2019-12-07 18:47:19,701 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:47:19,701 INFO L276 IsEmpty]: Start isEmpty. Operand 219155 states and 902019 transitions. [2019-12-07 18:47:19,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:47:19,712 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:19,712 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:19,712 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:19,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:19,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1841081636, now seen corresponding path program 1 times [2019-12-07 18:47:19,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:19,713 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016961960] [2019-12-07 18:47:19,713 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:19,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:19,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:19,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016961960] [2019-12-07 18:47:19,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:19,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:47:19,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1232966424] [2019-12-07 18:47:19,762 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:47:19,762 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:19,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:47:19,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:19,763 INFO L87 Difference]: Start difference. First operand 219155 states and 902019 transitions. Second operand 3 states. [2019-12-07 18:47:21,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:21,069 INFO L93 Difference]: Finished difference Result 206599 states and 841454 transitions. [2019-12-07 18:47:21,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:47:21,070 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:47:21,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:21,598 INFO L225 Difference]: With dead ends: 206599 [2019-12-07 18:47:21,598 INFO L226 Difference]: Without dead ends: 206599 [2019-12-07 18:47:21,598 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:26,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206599 states. [2019-12-07 18:47:32,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206599 to 203319. [2019-12-07 18:47:32,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203319 states. [2019-12-07 18:47:33,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203319 states to 203319 states and 829292 transitions. [2019-12-07 18:47:33,521 INFO L78 Accepts]: Start accepts. Automaton has 203319 states and 829292 transitions. Word has length 18 [2019-12-07 18:47:33,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:33,521 INFO L462 AbstractCegarLoop]: Abstraction has 203319 states and 829292 transitions. [2019-12-07 18:47:33,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:47:33,522 INFO L276 IsEmpty]: Start isEmpty. Operand 203319 states and 829292 transitions. [2019-12-07 18:47:33,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:47:33,532 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:33,532 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:33,532 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:33,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:33,532 INFO L82 PathProgramCache]: Analyzing trace with hash 1116134768, now seen corresponding path program 1 times [2019-12-07 18:47:33,532 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:33,533 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672345312] [2019-12-07 18:47:33,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:33,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:33,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:33,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672345312] [2019-12-07 18:47:33,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:33,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:47:33,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915348856] [2019-12-07 18:47:33,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:47:33,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:33,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:47:33,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:33,567 INFO L87 Difference]: Start difference. First operand 203319 states and 829292 transitions. Second operand 3 states. [2019-12-07 18:47:33,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:33,684 INFO L93 Difference]: Finished difference Result 37471 states and 120568 transitions. [2019-12-07 18:47:33,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:47:33,684 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:47:33,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:33,735 INFO L225 Difference]: With dead ends: 37471 [2019-12-07 18:47:33,735 INFO L226 Difference]: Without dead ends: 37471 [2019-12-07 18:47:33,736 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:33,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37471 states. [2019-12-07 18:47:34,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37471 to 37471. [2019-12-07 18:47:34,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37471 states. [2019-12-07 18:47:34,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37471 states to 37471 states and 120568 transitions. [2019-12-07 18:47:34,320 INFO L78 Accepts]: Start accepts. Automaton has 37471 states and 120568 transitions. Word has length 18 [2019-12-07 18:47:34,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:34,320 INFO L462 AbstractCegarLoop]: Abstraction has 37471 states and 120568 transitions. [2019-12-07 18:47:34,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:47:34,320 INFO L276 IsEmpty]: Start isEmpty. Operand 37471 states and 120568 transitions. [2019-12-07 18:47:34,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:47:34,325 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:34,325 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:34,325 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:34,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:34,325 INFO L82 PathProgramCache]: Analyzing trace with hash 1566659883, now seen corresponding path program 1 times [2019-12-07 18:47:34,325 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:34,326 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356373285] [2019-12-07 18:47:34,326 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:34,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:34,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:34,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356373285] [2019-12-07 18:47:34,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:34,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:47:34,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1991961775] [2019-12-07 18:47:34,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:47:34,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:34,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:47:34,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:47:34,374 INFO L87 Difference]: Start difference. First operand 37471 states and 120568 transitions. Second operand 6 states. [2019-12-07 18:47:34,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:34,994 INFO L93 Difference]: Finished difference Result 57567 states and 180868 transitions. [2019-12-07 18:47:34,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:47:34,995 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:47:34,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:35,078 INFO L225 Difference]: With dead ends: 57567 [2019-12-07 18:47:35,078 INFO L226 Difference]: Without dead ends: 57560 [2019-12-07 18:47:35,078 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:47:35,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57560 states. [2019-12-07 18:47:35,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57560 to 37220. [2019-12-07 18:47:35,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37220 states. [2019-12-07 18:47:35,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37220 states to 37220 states and 119129 transitions. [2019-12-07 18:47:35,798 INFO L78 Accepts]: Start accepts. Automaton has 37220 states and 119129 transitions. Word has length 22 [2019-12-07 18:47:35,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:35,799 INFO L462 AbstractCegarLoop]: Abstraction has 37220 states and 119129 transitions. [2019-12-07 18:47:35,799 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:47:35,799 INFO L276 IsEmpty]: Start isEmpty. Operand 37220 states and 119129 transitions. [2019-12-07 18:47:35,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:47:35,806 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:35,806 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:35,806 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:35,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:35,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1076429505, now seen corresponding path program 1 times [2019-12-07 18:47:35,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:35,807 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960957510] [2019-12-07 18:47:35,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:35,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:36,067 WARN L192 SmtUtils]: Spent 212.00 ms on a formula simplification that was a NOOP. DAG size: 3 [2019-12-07 18:47:36,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:36,068 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960957510] [2019-12-07 18:47:36,068 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:36,068 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:47:36,069 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1252898410] [2019-12-07 18:47:36,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:47:36,069 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:36,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:47:36,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:47:36,069 INFO L87 Difference]: Start difference. First operand 37220 states and 119129 transitions. Second operand 5 states. [2019-12-07 18:47:36,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:36,448 INFO L93 Difference]: Finished difference Result 53851 states and 169001 transitions. [2019-12-07 18:47:36,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:47:36,448 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:47:36,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:36,526 INFO L225 Difference]: With dead ends: 53851 [2019-12-07 18:47:36,527 INFO L226 Difference]: Without dead ends: 53838 [2019-12-07 18:47:36,527 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:47:36,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53838 states. [2019-12-07 18:47:37,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53838 to 45327. [2019-12-07 18:47:37,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45327 states. [2019-12-07 18:47:37,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45327 states to 45327 states and 144470 transitions. [2019-12-07 18:47:37,301 INFO L78 Accepts]: Start accepts. Automaton has 45327 states and 144470 transitions. Word has length 25 [2019-12-07 18:47:37,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:37,301 INFO L462 AbstractCegarLoop]: Abstraction has 45327 states and 144470 transitions. [2019-12-07 18:47:37,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:47:37,301 INFO L276 IsEmpty]: Start isEmpty. Operand 45327 states and 144470 transitions. [2019-12-07 18:47:37,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:47:37,312 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:37,312 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:37,312 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:37,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:37,313 INFO L82 PathProgramCache]: Analyzing trace with hash -877586735, now seen corresponding path program 1 times [2019-12-07 18:47:37,313 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:37,313 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [861419179] [2019-12-07 18:47:37,313 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:37,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:37,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:37,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [861419179] [2019-12-07 18:47:37,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:37,340 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:47:37,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [912527141] [2019-12-07 18:47:37,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:47:37,341 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:37,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:47:37,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:37,341 INFO L87 Difference]: Start difference. First operand 45327 states and 144470 transitions. Second operand 3 states. [2019-12-07 18:47:37,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:37,532 INFO L93 Difference]: Finished difference Result 64967 states and 204237 transitions. [2019-12-07 18:47:37,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:47:37,533 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 18:47:37,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:37,623 INFO L225 Difference]: With dead ends: 64967 [2019-12-07 18:47:37,623 INFO L226 Difference]: Without dead ends: 64967 [2019-12-07 18:47:37,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:37,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64967 states. [2019-12-07 18:47:38,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64967 to 50523. [2019-12-07 18:47:38,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50523 states. [2019-12-07 18:47:38,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50523 states to 50523 states and 159451 transitions. [2019-12-07 18:47:38,558 INFO L78 Accepts]: Start accepts. Automaton has 50523 states and 159451 transitions. Word has length 27 [2019-12-07 18:47:38,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:38,559 INFO L462 AbstractCegarLoop]: Abstraction has 50523 states and 159451 transitions. [2019-12-07 18:47:38,559 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:47:38,559 INFO L276 IsEmpty]: Start isEmpty. Operand 50523 states and 159451 transitions. [2019-12-07 18:47:38,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:47:38,573 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:38,573 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:38,573 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:38,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:38,573 INFO L82 PathProgramCache]: Analyzing trace with hash -603523497, now seen corresponding path program 1 times [2019-12-07 18:47:38,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:38,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5890955] [2019-12-07 18:47:38,573 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:38,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:38,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:38,615 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5890955] [2019-12-07 18:47:38,616 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:38,616 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:47:38,616 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1797860042] [2019-12-07 18:47:38,616 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:47:38,616 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:38,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:47:38,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:47:38,617 INFO L87 Difference]: Start difference. First operand 50523 states and 159451 transitions. Second operand 6 states. [2019-12-07 18:47:39,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:39,118 INFO L93 Difference]: Finished difference Result 71197 states and 220410 transitions. [2019-12-07 18:47:39,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:47:39,119 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:47:39,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:39,217 INFO L225 Difference]: With dead ends: 71197 [2019-12-07 18:47:39,218 INFO L226 Difference]: Without dead ends: 71155 [2019-12-07 18:47:39,218 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:47:39,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71155 states. [2019-12-07 18:47:40,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71155 to 52480. [2019-12-07 18:47:40,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52480 states. [2019-12-07 18:47:40,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52480 states to 52480 states and 165372 transitions. [2019-12-07 18:47:40,309 INFO L78 Accepts]: Start accepts. Automaton has 52480 states and 165372 transitions. Word has length 27 [2019-12-07 18:47:40,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:40,309 INFO L462 AbstractCegarLoop]: Abstraction has 52480 states and 165372 transitions. [2019-12-07 18:47:40,309 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:47:40,309 INFO L276 IsEmpty]: Start isEmpty. Operand 52480 states and 165372 transitions. [2019-12-07 18:47:40,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:47:40,327 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:40,327 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:40,327 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:40,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:40,327 INFO L82 PathProgramCache]: Analyzing trace with hash 1195565268, now seen corresponding path program 1 times [2019-12-07 18:47:40,327 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:40,327 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68468815] [2019-12-07 18:47:40,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:40,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:40,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:40,364 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68468815] [2019-12-07 18:47:40,364 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:40,364 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:47:40,364 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043816368] [2019-12-07 18:47:40,364 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:47:40,364 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:40,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:47:40,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:47:40,365 INFO L87 Difference]: Start difference. First operand 52480 states and 165372 transitions. Second operand 4 states. [2019-12-07 18:47:40,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:40,424 INFO L93 Difference]: Finished difference Result 20300 states and 61144 transitions. [2019-12-07 18:47:40,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:47:40,424 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 18:47:40,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:40,446 INFO L225 Difference]: With dead ends: 20300 [2019-12-07 18:47:40,446 INFO L226 Difference]: Without dead ends: 20300 [2019-12-07 18:47:40,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:47:40,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20300 states. [2019-12-07 18:47:40,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20300 to 18893. [2019-12-07 18:47:40,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18893 states. [2019-12-07 18:47:40,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18893 states to 18893 states and 56921 transitions. [2019-12-07 18:47:40,707 INFO L78 Accepts]: Start accepts. Automaton has 18893 states and 56921 transitions. Word has length 29 [2019-12-07 18:47:40,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:40,707 INFO L462 AbstractCegarLoop]: Abstraction has 18893 states and 56921 transitions. [2019-12-07 18:47:40,707 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:47:40,707 INFO L276 IsEmpty]: Start isEmpty. Operand 18893 states and 56921 transitions. [2019-12-07 18:47:40,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:47:40,724 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:40,724 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:40,724 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:40,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:40,724 INFO L82 PathProgramCache]: Analyzing trace with hash 94968403, now seen corresponding path program 1 times [2019-12-07 18:47:40,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:40,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179828220] [2019-12-07 18:47:40,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:40,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:40,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:40,776 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [179828220] [2019-12-07 18:47:40,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:40,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:47:40,777 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2049869254] [2019-12-07 18:47:40,777 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:47:40,777 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:40,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:47:40,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:47:40,777 INFO L87 Difference]: Start difference. First operand 18893 states and 56921 transitions. Second operand 7 states. [2019-12-07 18:47:41,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:41,385 INFO L93 Difference]: Finished difference Result 26152 states and 76784 transitions. [2019-12-07 18:47:41,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:47:41,385 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:47:41,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:41,413 INFO L225 Difference]: With dead ends: 26152 [2019-12-07 18:47:41,413 INFO L226 Difference]: Without dead ends: 26152 [2019-12-07 18:47:41,413 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:47:41,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26152 states. [2019-12-07 18:47:41,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26152 to 18344. [2019-12-07 18:47:41,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18344 states. [2019-12-07 18:47:41,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18344 states to 18344 states and 55324 transitions. [2019-12-07 18:47:41,708 INFO L78 Accepts]: Start accepts. Automaton has 18344 states and 55324 transitions. Word has length 33 [2019-12-07 18:47:41,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:41,708 INFO L462 AbstractCegarLoop]: Abstraction has 18344 states and 55324 transitions. [2019-12-07 18:47:41,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:47:41,708 INFO L276 IsEmpty]: Start isEmpty. Operand 18344 states and 55324 transitions. [2019-12-07 18:47:41,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:47:41,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:41,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:41,723 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:41,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:41,724 INFO L82 PathProgramCache]: Analyzing trace with hash 1576704066, now seen corresponding path program 1 times [2019-12-07 18:47:41,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:41,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047719158] [2019-12-07 18:47:41,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:41,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:41,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:41,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047719158] [2019-12-07 18:47:41,787 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:41,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:47:41,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1341398509] [2019-12-07 18:47:41,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:47:41,787 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:41,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:47:41,787 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:47:41,788 INFO L87 Difference]: Start difference. First operand 18344 states and 55324 transitions. Second operand 4 states. [2019-12-07 18:47:41,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:41,844 INFO L93 Difference]: Finished difference Result 18342 states and 55320 transitions. [2019-12-07 18:47:41,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:47:41,845 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 40 [2019-12-07 18:47:41,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:41,864 INFO L225 Difference]: With dead ends: 18342 [2019-12-07 18:47:41,864 INFO L226 Difference]: Without dead ends: 18342 [2019-12-07 18:47:41,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:47:41,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18342 states. [2019-12-07 18:47:42,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18342 to 18342. [2019-12-07 18:47:42,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18342 states. [2019-12-07 18:47:42,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18342 states to 18342 states and 55320 transitions. [2019-12-07 18:47:42,102 INFO L78 Accepts]: Start accepts. Automaton has 18342 states and 55320 transitions. Word has length 40 [2019-12-07 18:47:42,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:42,103 INFO L462 AbstractCegarLoop]: Abstraction has 18342 states and 55320 transitions. [2019-12-07 18:47:42,103 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:47:42,103 INFO L276 IsEmpty]: Start isEmpty. Operand 18342 states and 55320 transitions. [2019-12-07 18:47:42,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:47:42,117 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:42,118 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:42,118 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:42,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:42,118 INFO L82 PathProgramCache]: Analyzing trace with hash -1873584483, now seen corresponding path program 1 times [2019-12-07 18:47:42,118 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:42,118 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134904255] [2019-12-07 18:47:42,118 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:42,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:42,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:42,154 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134904255] [2019-12-07 18:47:42,154 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:42,154 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:47:42,155 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295789381] [2019-12-07 18:47:42,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:47:42,155 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:42,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:47:42,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:47:42,156 INFO L87 Difference]: Start difference. First operand 18342 states and 55320 transitions. Second operand 5 states. [2019-12-07 18:47:42,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:42,213 INFO L93 Difference]: Finished difference Result 16845 states and 52030 transitions. [2019-12-07 18:47:42,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:47:42,213 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 18:47:42,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:42,233 INFO L225 Difference]: With dead ends: 16845 [2019-12-07 18:47:42,233 INFO L226 Difference]: Without dead ends: 16845 [2019-12-07 18:47:42,233 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:47:42,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16845 states. [2019-12-07 18:47:42,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16845 to 15143. [2019-12-07 18:47:42,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15143 states. [2019-12-07 18:47:42,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15143 states to 15143 states and 47024 transitions. [2019-12-07 18:47:42,452 INFO L78 Accepts]: Start accepts. Automaton has 15143 states and 47024 transitions. Word has length 41 [2019-12-07 18:47:42,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:42,453 INFO L462 AbstractCegarLoop]: Abstraction has 15143 states and 47024 transitions. [2019-12-07 18:47:42,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:47:42,453 INFO L276 IsEmpty]: Start isEmpty. Operand 15143 states and 47024 transitions. [2019-12-07 18:47:42,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:47:42,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:42,467 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:42,467 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:42,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:42,467 INFO L82 PathProgramCache]: Analyzing trace with hash 628999064, now seen corresponding path program 1 times [2019-12-07 18:47:42,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:42,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072365255] [2019-12-07 18:47:42,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:42,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:42,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:42,495 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072365255] [2019-12-07 18:47:42,495 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:42,495 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:47:42,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117037701] [2019-12-07 18:47:42,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:47:42,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:42,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:47:42,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:42,496 INFO L87 Difference]: Start difference. First operand 15143 states and 47024 transitions. Second operand 3 states. [2019-12-07 18:47:42,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:42,565 INFO L93 Difference]: Finished difference Result 19655 states and 59985 transitions. [2019-12-07 18:47:42,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:47:42,565 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:47:42,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:42,585 INFO L225 Difference]: With dead ends: 19655 [2019-12-07 18:47:42,585 INFO L226 Difference]: Without dead ends: 19655 [2019-12-07 18:47:42,585 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:42,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19655 states. [2019-12-07 18:47:42,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19655 to 14961. [2019-12-07 18:47:42,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14961 states. [2019-12-07 18:47:42,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14961 states to 14961 states and 45870 transitions. [2019-12-07 18:47:42,978 INFO L78 Accepts]: Start accepts. Automaton has 14961 states and 45870 transitions. Word has length 65 [2019-12-07 18:47:42,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:42,978 INFO L462 AbstractCegarLoop]: Abstraction has 14961 states and 45870 transitions. [2019-12-07 18:47:42,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:47:42,978 INFO L276 IsEmpty]: Start isEmpty. Operand 14961 states and 45870 transitions. [2019-12-07 18:47:42,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:47:42,992 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:42,992 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:42,992 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:42,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:42,992 INFO L82 PathProgramCache]: Analyzing trace with hash 1958678932, now seen corresponding path program 1 times [2019-12-07 18:47:42,992 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:42,992 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608210848] [2019-12-07 18:47:42,992 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:43,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:43,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:43,045 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608210848] [2019-12-07 18:47:43,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:43,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:47:43,046 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [316840066] [2019-12-07 18:47:43,046 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:47:43,046 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:43,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:47:43,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:43,047 INFO L87 Difference]: Start difference. First operand 14961 states and 45870 transitions. Second operand 3 states. [2019-12-07 18:47:43,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:43,142 INFO L93 Difference]: Finished difference Result 18028 states and 55353 transitions. [2019-12-07 18:47:43,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:47:43,143 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:47:43,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:43,162 INFO L225 Difference]: With dead ends: 18028 [2019-12-07 18:47:43,162 INFO L226 Difference]: Without dead ends: 18028 [2019-12-07 18:47:43,162 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:43,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18028 states. [2019-12-07 18:47:43,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18028 to 14395. [2019-12-07 18:47:43,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14395 states. [2019-12-07 18:47:43,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14395 states to 14395 states and 44555 transitions. [2019-12-07 18:47:43,381 INFO L78 Accepts]: Start accepts. Automaton has 14395 states and 44555 transitions. Word has length 65 [2019-12-07 18:47:43,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:43,381 INFO L462 AbstractCegarLoop]: Abstraction has 14395 states and 44555 transitions. [2019-12-07 18:47:43,381 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:47:43,381 INFO L276 IsEmpty]: Start isEmpty. Operand 14395 states and 44555 transitions. [2019-12-07 18:47:43,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:47:43,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:43,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:43,393 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:43,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:43,393 INFO L82 PathProgramCache]: Analyzing trace with hash -1193255729, now seen corresponding path program 1 times [2019-12-07 18:47:43,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:43,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466162068] [2019-12-07 18:47:43,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:43,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:43,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:43,467 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466162068] [2019-12-07 18:47:43,467 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:43,467 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:47:43,467 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1440069350] [2019-12-07 18:47:43,468 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:47:43,468 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:43,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:47:43,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:47:43,468 INFO L87 Difference]: Start difference. First operand 14395 states and 44555 transitions. Second operand 8 states. [2019-12-07 18:47:44,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:44,394 INFO L93 Difference]: Finished difference Result 33438 states and 102093 transitions. [2019-12-07 18:47:44,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:47:44,394 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 18:47:44,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:44,431 INFO L225 Difference]: With dead ends: 33438 [2019-12-07 18:47:44,431 INFO L226 Difference]: Without dead ends: 33438 [2019-12-07 18:47:44,431 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=99, Invalid=321, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:47:44,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33438 states. [2019-12-07 18:47:44,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33438 to 16037. [2019-12-07 18:47:44,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16037 states. [2019-12-07 18:47:44,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16037 states to 16037 states and 49820 transitions. [2019-12-07 18:47:44,757 INFO L78 Accepts]: Start accepts. Automaton has 16037 states and 49820 transitions. Word has length 66 [2019-12-07 18:47:44,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:44,758 INFO L462 AbstractCegarLoop]: Abstraction has 16037 states and 49820 transitions. [2019-12-07 18:47:44,758 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:47:44,758 INFO L276 IsEmpty]: Start isEmpty. Operand 16037 states and 49820 transitions. [2019-12-07 18:47:44,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:47:44,771 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:44,771 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:44,771 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:44,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:44,771 INFO L82 PathProgramCache]: Analyzing trace with hash -467753823, now seen corresponding path program 1 times [2019-12-07 18:47:44,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:44,771 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551104288] [2019-12-07 18:47:44,771 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:44,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:44,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:44,811 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551104288] [2019-12-07 18:47:44,811 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:44,811 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:47:44,811 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [554892281] [2019-12-07 18:47:44,811 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:47:44,812 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:44,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:47:44,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:47:44,812 INFO L87 Difference]: Start difference. First operand 16037 states and 49820 transitions. Second operand 4 states. [2019-12-07 18:47:44,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:44,904 INFO L93 Difference]: Finished difference Result 15832 states and 48995 transitions. [2019-12-07 18:47:44,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:47:44,904 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 18:47:44,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:44,921 INFO L225 Difference]: With dead ends: 15832 [2019-12-07 18:47:44,921 INFO L226 Difference]: Without dead ends: 15832 [2019-12-07 18:47:44,922 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:47:44,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15832 states. [2019-12-07 18:47:45,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15832 to 14198. [2019-12-07 18:47:45,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14198 states. [2019-12-07 18:47:45,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14198 states to 14198 states and 43879 transitions. [2019-12-07 18:47:45,127 INFO L78 Accepts]: Start accepts. Automaton has 14198 states and 43879 transitions. Word has length 66 [2019-12-07 18:47:45,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:45,127 INFO L462 AbstractCegarLoop]: Abstraction has 14198 states and 43879 transitions. [2019-12-07 18:47:45,127 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:47:45,127 INFO L276 IsEmpty]: Start isEmpty. Operand 14198 states and 43879 transitions. [2019-12-07 18:47:45,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:47:45,139 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:45,139 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:45,140 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:45,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:45,140 INFO L82 PathProgramCache]: Analyzing trace with hash -612810128, now seen corresponding path program 1 times [2019-12-07 18:47:45,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:45,140 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207207347] [2019-12-07 18:47:45,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:45,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:45,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:45,172 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207207347] [2019-12-07 18:47:45,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:45,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:47:45,173 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1912979642] [2019-12-07 18:47:45,173 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:47:45,173 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:45,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:47:45,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:45,173 INFO L87 Difference]: Start difference. First operand 14198 states and 43879 transitions. Second operand 3 states. [2019-12-07 18:47:45,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:45,211 INFO L93 Difference]: Finished difference Result 12796 states and 38720 transitions. [2019-12-07 18:47:45,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:47:45,211 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:47:45,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:45,224 INFO L225 Difference]: With dead ends: 12796 [2019-12-07 18:47:45,224 INFO L226 Difference]: Without dead ends: 12796 [2019-12-07 18:47:45,225 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:47:45,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12796 states. [2019-12-07 18:47:45,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12796 to 12268. [2019-12-07 18:47:45,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12268 states. [2019-12-07 18:47:45,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12268 states to 12268 states and 37184 transitions. [2019-12-07 18:47:45,396 INFO L78 Accepts]: Start accepts. Automaton has 12268 states and 37184 transitions. Word has length 66 [2019-12-07 18:47:45,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:45,396 INFO L462 AbstractCegarLoop]: Abstraction has 12268 states and 37184 transitions. [2019-12-07 18:47:45,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:47:45,396 INFO L276 IsEmpty]: Start isEmpty. Operand 12268 states and 37184 transitions. [2019-12-07 18:47:45,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:45,405 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:45,405 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:45,405 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:45,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:45,405 INFO L82 PathProgramCache]: Analyzing trace with hash 1717710349, now seen corresponding path program 1 times [2019-12-07 18:47:45,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:45,406 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1442632397] [2019-12-07 18:47:45,406 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:45,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:45,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:45,553 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1442632397] [2019-12-07 18:47:45,553 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:45,553 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:47:45,553 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [660015639] [2019-12-07 18:47:45,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:47:45,554 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:45,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:47:45,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:47:45,554 INFO L87 Difference]: Start difference. First operand 12268 states and 37184 transitions. Second operand 10 states. [2019-12-07 18:47:46,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:46,895 INFO L93 Difference]: Finished difference Result 27828 states and 84051 transitions. [2019-12-07 18:47:46,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:47:46,896 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:47:46,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:46,916 INFO L225 Difference]: With dead ends: 27828 [2019-12-07 18:47:46,916 INFO L226 Difference]: Without dead ends: 20334 [2019-12-07 18:47:46,916 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 137 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:47:46,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20334 states. [2019-12-07 18:47:47,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20334 to 14854. [2019-12-07 18:47:47,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14854 states. [2019-12-07 18:47:47,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14854 states to 14854 states and 44884 transitions. [2019-12-07 18:47:47,154 INFO L78 Accepts]: Start accepts. Automaton has 14854 states and 44884 transitions. Word has length 67 [2019-12-07 18:47:47,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:47,154 INFO L462 AbstractCegarLoop]: Abstraction has 14854 states and 44884 transitions. [2019-12-07 18:47:47,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:47:47,154 INFO L276 IsEmpty]: Start isEmpty. Operand 14854 states and 44884 transitions. [2019-12-07 18:47:47,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:47,167 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:47,167 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:47,167 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:47,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:47,167 INFO L82 PathProgramCache]: Analyzing trace with hash -1732898859, now seen corresponding path program 2 times [2019-12-07 18:47:47,167 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:47,168 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111518269] [2019-12-07 18:47:47,168 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:47,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:47,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:47,321 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111518269] [2019-12-07 18:47:47,321 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:47,322 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:47:47,322 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1160113234] [2019-12-07 18:47:47,322 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:47:47,322 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:47,322 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:47:47,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:47:47,322 INFO L87 Difference]: Start difference. First operand 14854 states and 44884 transitions. Second operand 10 states. [2019-12-07 18:47:47,509 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification that was a NOOP. DAG size: 29 [2019-12-07 18:47:48,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:48,399 INFO L93 Difference]: Finished difference Result 21073 states and 62603 transitions. [2019-12-07 18:47:48,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:47:48,400 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:47:48,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:48,429 INFO L225 Difference]: With dead ends: 21073 [2019-12-07 18:47:48,429 INFO L226 Difference]: Without dead ends: 18222 [2019-12-07 18:47:48,430 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:47:48,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18222 states. [2019-12-07 18:47:48,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18222 to 15122. [2019-12-07 18:47:48,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15122 states. [2019-12-07 18:47:48,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15122 states to 15122 states and 45571 transitions. [2019-12-07 18:47:48,662 INFO L78 Accepts]: Start accepts. Automaton has 15122 states and 45571 transitions. Word has length 67 [2019-12-07 18:47:48,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:48,662 INFO L462 AbstractCegarLoop]: Abstraction has 15122 states and 45571 transitions. [2019-12-07 18:47:48,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:47:48,662 INFO L276 IsEmpty]: Start isEmpty. Operand 15122 states and 45571 transitions. [2019-12-07 18:47:48,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:48,674 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:48,674 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:48,674 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:48,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:48,674 INFO L82 PathProgramCache]: Analyzing trace with hash 1111610073, now seen corresponding path program 3 times [2019-12-07 18:47:48,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:48,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209531421] [2019-12-07 18:47:48,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:48,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:48,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:48,805 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209531421] [2019-12-07 18:47:48,805 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:48,805 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:47:48,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1893272284] [2019-12-07 18:47:48,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:47:48,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:48,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:47:48,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:47:48,806 INFO L87 Difference]: Start difference. First operand 15122 states and 45571 transitions. Second operand 11 states. [2019-12-07 18:47:50,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:50,600 INFO L93 Difference]: Finished difference Result 26114 states and 77740 transitions. [2019-12-07 18:47:50,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:47:50,601 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:47:50,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:50,633 INFO L225 Difference]: With dead ends: 26114 [2019-12-07 18:47:50,633 INFO L226 Difference]: Without dead ends: 20690 [2019-12-07 18:47:50,634 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=157, Invalid=655, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:47:50,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20690 states. [2019-12-07 18:47:50,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20690 to 14870. [2019-12-07 18:47:50,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14870 states. [2019-12-07 18:47:50,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14870 states to 14870 states and 44770 transitions. [2019-12-07 18:47:50,875 INFO L78 Accepts]: Start accepts. Automaton has 14870 states and 44770 transitions. Word has length 67 [2019-12-07 18:47:50,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:50,876 INFO L462 AbstractCegarLoop]: Abstraction has 14870 states and 44770 transitions. [2019-12-07 18:47:50,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:47:50,876 INFO L276 IsEmpty]: Start isEmpty. Operand 14870 states and 44770 transitions. [2019-12-07 18:47:50,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:50,888 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:50,888 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:50,888 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:50,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:50,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1715738515, now seen corresponding path program 4 times [2019-12-07 18:47:50,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:50,889 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992160292] [2019-12-07 18:47:50,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:50,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:51,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:51,015 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1992160292] [2019-12-07 18:47:51,015 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:51,015 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:47:51,015 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971524368] [2019-12-07 18:47:51,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:47:51,016 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:51,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:47:51,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:47:51,016 INFO L87 Difference]: Start difference. First operand 14870 states and 44770 transitions. Second operand 11 states. [2019-12-07 18:47:51,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:51,963 INFO L93 Difference]: Finished difference Result 37477 states and 111746 transitions. [2019-12-07 18:47:51,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 18:47:51,963 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:47:51,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:51,994 INFO L225 Difference]: With dead ends: 37477 [2019-12-07 18:47:51,994 INFO L226 Difference]: Without dead ends: 26597 [2019-12-07 18:47:51,995 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=277, Invalid=1129, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 18:47:52,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26597 states. [2019-12-07 18:47:52,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26597 to 14900. [2019-12-07 18:47:52,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14900 states. [2019-12-07 18:47:52,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14900 states to 14900 states and 44707 transitions. [2019-12-07 18:47:52,272 INFO L78 Accepts]: Start accepts. Automaton has 14900 states and 44707 transitions. Word has length 67 [2019-12-07 18:47:52,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:52,272 INFO L462 AbstractCegarLoop]: Abstraction has 14900 states and 44707 transitions. [2019-12-07 18:47:52,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:47:52,272 INFO L276 IsEmpty]: Start isEmpty. Operand 14900 states and 44707 transitions. [2019-12-07 18:47:52,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:52,285 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:52,285 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:52,285 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:52,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:52,285 INFO L82 PathProgramCache]: Analyzing trace with hash -1475658587, now seen corresponding path program 5 times [2019-12-07 18:47:52,285 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:52,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672247073] [2019-12-07 18:47:52,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:52,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:52,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:52,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672247073] [2019-12-07 18:47:52,833 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:52,833 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 18:47:52,833 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1515905734] [2019-12-07 18:47:52,833 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 18:47:52,833 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:52,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 18:47:52,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=413, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:47:52,833 INFO L87 Difference]: Start difference. First operand 14900 states and 44707 transitions. Second operand 22 states. [2019-12-07 18:47:55,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:55,681 INFO L93 Difference]: Finished difference Result 15300 states and 45154 transitions. [2019-12-07 18:47:55,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 18:47:55,682 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 67 [2019-12-07 18:47:55,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:55,706 INFO L225 Difference]: With dead ends: 15300 [2019-12-07 18:47:55,706 INFO L226 Difference]: Without dead ends: 15144 [2019-12-07 18:47:55,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 415 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=319, Invalid=2231, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 18:47:55,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15144 states. [2019-12-07 18:47:55,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15144 to 14612. [2019-12-07 18:47:55,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14612 states. [2019-12-07 18:47:55,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14612 states to 14612 states and 43423 transitions. [2019-12-07 18:47:55,906 INFO L78 Accepts]: Start accepts. Automaton has 14612 states and 43423 transitions. Word has length 67 [2019-12-07 18:47:55,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:55,906 INFO L462 AbstractCegarLoop]: Abstraction has 14612 states and 43423 transitions. [2019-12-07 18:47:55,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 18:47:55,906 INFO L276 IsEmpty]: Start isEmpty. Operand 14612 states and 43423 transitions. [2019-12-07 18:47:55,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:55,918 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:55,918 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:55,918 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:55,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:55,919 INFO L82 PathProgramCache]: Analyzing trace with hash -1184379749, now seen corresponding path program 6 times [2019-12-07 18:47:55,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:55,919 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514432467] [2019-12-07 18:47:55,919 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:55,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:56,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:56,263 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1514432467] [2019-12-07 18:47:56,263 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:56,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 18:47:56,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1286276071] [2019-12-07 18:47:56,264 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 18:47:56,264 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:56,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 18:47:56,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=298, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:47:56,264 INFO L87 Difference]: Start difference. First operand 14612 states and 43423 transitions. Second operand 19 states. [2019-12-07 18:47:57,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:57,683 INFO L93 Difference]: Finished difference Result 15933 states and 46716 transitions. [2019-12-07 18:47:57,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 18:47:57,684 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 18:47:57,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:57,699 INFO L225 Difference]: With dead ends: 15933 [2019-12-07 18:47:57,699 INFO L226 Difference]: Without dead ends: 15793 [2019-12-07 18:47:57,700 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=217, Invalid=1265, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 18:47:57,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15793 states. [2019-12-07 18:47:57,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15793 to 14781. [2019-12-07 18:47:57,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14781 states. [2019-12-07 18:47:57,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14781 states to 14781 states and 43876 transitions. [2019-12-07 18:47:57,902 INFO L78 Accepts]: Start accepts. Automaton has 14781 states and 43876 transitions. Word has length 67 [2019-12-07 18:47:57,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:57,902 INFO L462 AbstractCegarLoop]: Abstraction has 14781 states and 43876 transitions. [2019-12-07 18:47:57,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 18:47:57,902 INFO L276 IsEmpty]: Start isEmpty. Operand 14781 states and 43876 transitions. [2019-12-07 18:47:57,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:57,914 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:57,914 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:57,915 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:57,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:57,915 INFO L82 PathProgramCache]: Analyzing trace with hash -1110370993, now seen corresponding path program 7 times [2019-12-07 18:47:57,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:57,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578446375] [2019-12-07 18:47:57,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:57,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:47:58,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:47:58,018 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578446375] [2019-12-07 18:47:58,018 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:47:58,019 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:47:58,019 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206830039] [2019-12-07 18:47:58,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:47:58,019 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:47:58,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:47:58,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:47:58,019 INFO L87 Difference]: Start difference. First operand 14781 states and 43876 transitions. Second operand 11 states. [2019-12-07 18:47:59,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:47:59,076 INFO L93 Difference]: Finished difference Result 22316 states and 65690 transitions. [2019-12-07 18:47:59,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:47:59,076 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:47:59,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:47:59,097 INFO L225 Difference]: With dead ends: 22316 [2019-12-07 18:47:59,097 INFO L226 Difference]: Without dead ends: 22033 [2019-12-07 18:47:59,097 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=483, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:47:59,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22033 states. [2019-12-07 18:47:59,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22033 to 14573. [2019-12-07 18:47:59,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14573 states. [2019-12-07 18:47:59,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14573 states to 14573 states and 43356 transitions. [2019-12-07 18:47:59,337 INFO L78 Accepts]: Start accepts. Automaton has 14573 states and 43356 transitions. Word has length 67 [2019-12-07 18:47:59,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:47:59,337 INFO L462 AbstractCegarLoop]: Abstraction has 14573 states and 43356 transitions. [2019-12-07 18:47:59,337 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:47:59,337 INFO L276 IsEmpty]: Start isEmpty. Operand 14573 states and 43356 transitions. [2019-12-07 18:47:59,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:47:59,348 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:47:59,348 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:47:59,349 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:47:59,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:47:59,349 INFO L82 PathProgramCache]: Analyzing trace with hash -200373485, now seen corresponding path program 8 times [2019-12-07 18:47:59,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:47:59,349 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176722811] [2019-12-07 18:47:59,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:47:59,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:47:59,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:47:59,420 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:47:59,421 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:47:59,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L842: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 |v_ULTIMATE.start_main_~#t56~0.offset_18|) (= v_~__unbuffered_cnt~0_134 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t56~0.base_23| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t56~0.base_23|) |v_ULTIMATE.start_main_~#t56~0.offset_18| 0)) |v_#memory_int_21|) (= v_~a$r_buff1_thd0~0_110 0) (= v_~x~0_44 0) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$r_buff0_thd1~0_147) (= 0 v_~a$read_delayed~0_7) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t56~0.base_23| 1)) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~__unbuffered_p0_EAX~0_60) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t56~0.base_23| 4) |v_#length_23|) (= 0 v_~a$w_buff0_used~0_862) (= v_~__unbuffered_p0_EBX~0_60 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t56~0.base_23|) (= 0 v_~a$r_buff1_thd1~0_105) (= v_~main$tmp_guard1~0_27 0) (= v_~a$flush_delayed~0_24 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~a~0_173 0) (= v_~a$r_buff1_thd3~0_219 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~a$r_buff0_thd3~0_314 0) (= 0 v_~__unbuffered_p2_EAX~0_29) (= v_~__unbuffered_p2_EBX~0_35 0) (= 0 v_~a$r_buff1_thd2~0_106) (= 0 |v_#NULL.base_4|) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$w_buff0~0_390 0) (= 0 v_~a$r_buff0_thd2~0_104) (= v_~y~0_53 0) (= v_~a$mem_tmp~0_13 0) (= |v_#NULL.offset_4| 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t56~0.base_23|)) (= v_~main$tmp_guard0~0_22 0) (= v_~z~0_20 0) (= 0 v_~a$w_buff1~0_260) (= v_~weak$$choice2~0_108 0) (= v_~a$r_buff0_thd0~0_142 0) (= 0 v_~a$w_buff1_used~0_471) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_106, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_83|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_241|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_142, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_~#t58~0.offset=|v_ULTIMATE.start_main_~#t58~0.offset_15|, ~a~0=v_~a~0_173, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_53|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_60, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_29, ULTIMATE.start_main_~#t57~0.offset=|v_ULTIMATE.start_main_~#t57~0.offset_18|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_35, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_60, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_219, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_862, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_147, ULTIMATE.start_main_~#t58~0.base=|v_ULTIMATE.start_main_~#t58~0.base_20|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t56~0.offset=|v_ULTIMATE.start_main_~#t56~0.offset_18|, ~a$w_buff0~0=v_~a$w_buff0~0_390, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_110, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_134, ~x~0=v_~x~0_44, ULTIMATE.start_main_~#t57~0.base=|v_ULTIMATE.start_main_~#t57~0.base_23|, ~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_104, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_61|, ~a$mem_tmp~0=v_~a$mem_tmp~0_13, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_37|, ~a$w_buff1~0=v_~a$w_buff1~0_260, ~y~0=v_~y~0_53, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_105, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_314, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_24, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_471, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t56~0.base=|v_ULTIMATE.start_main_~#t56~0.base_23|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t58~0.offset, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t57~0.offset, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t58~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t56~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t57~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t56~0.base] because there is no mapped edge [2019-12-07 18:47:59,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] P0ENTRY-->L4-3: Formula: (and (= ~a$w_buff0_used~0_In477509915 ~a$w_buff1_used~0_Out477509915) (= P0Thread1of1ForFork2___VERIFIER_assert_~expression_Out477509915 |P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_Out477509915|) (= |P0Thread1of1ForFork2_#in~arg.offset_In477509915| P0Thread1of1ForFork2_~arg.offset_Out477509915) (= ~a$w_buff0~0_Out477509915 1) (= ~a$w_buff0~0_In477509915 ~a$w_buff1~0_Out477509915) (= |P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_Out477509915| (ite (not (and (not (= (mod ~a$w_buff0_used~0_Out477509915 256) 0)) (not (= (mod ~a$w_buff1_used~0_Out477509915 256) 0)))) 1 0)) (not (= P0Thread1of1ForFork2___VERIFIER_assert_~expression_Out477509915 0)) (= 1 ~a$w_buff0_used~0_Out477509915) (= |P0Thread1of1ForFork2_#in~arg.base_In477509915| P0Thread1of1ForFork2_~arg.base_Out477509915)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|P0Thread1of1ForFork2_#in~arg.offset_In477509915|, ~a$w_buff0~0=~a$w_buff0~0_In477509915, ~a$w_buff0_used~0=~a$w_buff0_used~0_In477509915, P0Thread1of1ForFork2_#in~arg.base=|P0Thread1of1ForFork2_#in~arg.base_In477509915|} OutVars{~a$w_buff1~0=~a$w_buff1~0_Out477509915, P0Thread1of1ForFork2_#in~arg.offset=|P0Thread1of1ForFork2_#in~arg.offset_In477509915|, ~a$w_buff0~0=~a$w_buff0~0_Out477509915, P0Thread1of1ForFork2_~arg.offset=P0Thread1of1ForFork2_~arg.offset_Out477509915, ~a$w_buff0_used~0=~a$w_buff0_used~0_Out477509915, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_Out477509915, P0Thread1of1ForFork2_#in~arg.base=|P0Thread1of1ForFork2_#in~arg.base_In477509915|, ~a$w_buff1_used~0=~a$w_buff1_used~0_Out477509915, P0Thread1of1ForFork2_~arg.base=P0Thread1of1ForFork2_~arg.base_Out477509915, P0Thread1of1ForFork2___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_Out477509915|} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork2_~arg.offset, ~a$w_buff0_used~0, P0Thread1of1ForFork2___VERIFIER_assert_~expression, ~a$w_buff1_used~0, P0Thread1of1ForFork2_~arg.base, P0Thread1of1ForFork2___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:47:59,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L842-1-->L844: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t57~0.base_13| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t57~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t57~0.base_13|) |v_ULTIMATE.start_main_~#t57~0.offset_11| 1)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t57~0.base_13| 0)) (= 0 |v_ULTIMATE.start_main_~#t57~0.offset_11|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t57~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t57~0.base_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t57~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t57~0.offset=|v_ULTIMATE.start_main_~#t57~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t57~0.base=|v_ULTIMATE.start_main_~#t57~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t57~0.offset, ULTIMATE.start_main_~#t57~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:47:59,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L783-2-->L783-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork0_#t~ite10_Out233556834| |P1Thread1of1ForFork0_#t~ite9_Out233556834|)) (.cse2 (= (mod ~a$r_buff1_thd2~0_In233556834 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In233556834 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= |P1Thread1of1ForFork0_#t~ite9_Out233556834| ~a$w_buff1~0_In233556834)) (and .cse0 (or .cse2 .cse1) (= ~a~0_In233556834 |P1Thread1of1ForFork0_#t~ite9_Out233556834|)))) InVars {~a~0=~a~0_In233556834, ~a$w_buff1~0=~a$w_buff1~0_In233556834, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In233556834, ~a$w_buff1_used~0=~a$w_buff1_used~0_In233556834} OutVars{~a~0=~a~0_In233556834, ~a$w_buff1~0=~a$w_buff1~0_In233556834, P1Thread1of1ForFork0_#t~ite10=|P1Thread1of1ForFork0_#t~ite10_Out233556834|, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In233556834, P1Thread1of1ForFork0_#t~ite9=|P1Thread1of1ForFork0_#t~ite9_Out233556834|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In233556834} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite10, P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 18:47:59,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L784-->L784-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1025202143 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1025202143 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite11_Out1025202143| 0)) (and (= |P1Thread1of1ForFork0_#t~ite11_Out1025202143| ~a$w_buff0_used~0_In1025202143) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1025202143, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1025202143} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1025202143, P1Thread1of1ForFork0_#t~ite11=|P1Thread1of1ForFork0_#t~ite11_Out1025202143|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1025202143} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 18:47:59,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L785-->L785-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-987323291 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-987323291 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-987323291 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-987323291 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite12_Out-987323291| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite12_Out-987323291| ~a$w_buff1_used~0_In-987323291) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-987323291, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-987323291, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-987323291, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-987323291} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-987323291, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-987323291, P1Thread1of1ForFork0_#t~ite12=|P1Thread1of1ForFork0_#t~ite12_Out-987323291|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-987323291, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-987323291} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 18:47:59,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-958481548 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-958481548 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite13_Out-958481548| 0)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-958481548 |P1Thread1of1ForFork0_#t~ite13_Out-958481548|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-958481548, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-958481548} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-958481548, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-958481548, P1Thread1of1ForFork0_#t~ite13=|P1Thread1of1ForFork0_#t~ite13_Out-958481548|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 18:47:59,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L787-->L787-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In896287032 256))) (.cse2 (= (mod ~a$r_buff1_thd2~0_In896287032 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In896287032 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In896287032 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite14_Out896287032| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd2~0_In896287032 |P1Thread1of1ForFork0_#t~ite14_Out896287032|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In896287032, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In896287032, ~a$w_buff0_used~0=~a$w_buff0_used~0_In896287032, ~a$w_buff1_used~0=~a$w_buff1_used~0_In896287032} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In896287032, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In896287032, ~a$w_buff0_used~0=~a$w_buff0_used~0_In896287032, P1Thread1of1ForFork0_#t~ite14=|P1Thread1of1ForFork0_#t~ite14_Out896287032|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In896287032} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 18:47:59,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L787-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~a$r_buff1_thd2~0_53 |v_P1Thread1of1ForFork0_#t~ite14_26|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_53, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_25|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#t~ite14, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:47:59,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L844-1-->L846: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t58~0.base_12| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t58~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t58~0.base_12|) |v_ULTIMATE.start_main_~#t58~0.offset_10| 2)) |v_#memory_int_11|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t58~0.base_12|) 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t58~0.base_12|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t58~0.base_12| 4)) (= 0 |v_ULTIMATE.start_main_~#t58~0.offset_10|) (not (= 0 |v_ULTIMATE.start_main_~#t58~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t58~0.offset=|v_ULTIMATE.start_main_~#t58~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t58~0.base=|v_ULTIMATE.start_main_~#t58~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t58~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t58~0.base] because there is no mapped edge [2019-12-07 18:47:59,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L808-->L808-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In364898873 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite21_Out364898873| ~a$w_buff0~0_In364898873) (= |P2Thread1of1ForFork1_#t~ite20_In364898873| |P2Thread1of1ForFork1_#t~ite20_Out364898873|)) (and (= |P2Thread1of1ForFork1_#t~ite21_Out364898873| |P2Thread1of1ForFork1_#t~ite20_Out364898873|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In364898873 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In364898873 256) 0)) (and (= 0 (mod ~a$w_buff1_used~0_In364898873 256)) .cse1) (= (mod ~a$w_buff0_used~0_In364898873 256) 0))) (= ~a$w_buff0~0_In364898873 |P2Thread1of1ForFork1_#t~ite20_Out364898873|)))) InVars {P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_In364898873|, ~a$w_buff0~0=~a$w_buff0~0_In364898873, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In364898873, ~a$w_buff0_used~0=~a$w_buff0_used~0_In364898873, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In364898873, ~a$w_buff1_used~0=~a$w_buff1_used~0_In364898873, ~weak$$choice2~0=~weak$$choice2~0_In364898873} OutVars{P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_Out364898873|, P2Thread1of1ForFork1_#t~ite21=|P2Thread1of1ForFork1_#t~ite21_Out364898873|, ~a$w_buff0~0=~a$w_buff0~0_In364898873, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In364898873, ~a$w_buff0_used~0=~a$w_buff0_used~0_In364898873, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In364898873, ~a$w_buff1_used~0=~a$w_buff1_used~0_In364898873, ~weak$$choice2~0=~weak$$choice2~0_In364898873} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite20, P2Thread1of1ForFork1_#t~ite21] because there is no mapped edge [2019-12-07 18:47:59,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L810-->L810-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-114203289 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite27_Out-114203289| ~a$w_buff0_used~0_In-114203289) (= |P2Thread1of1ForFork1_#t~ite26_In-114203289| |P2Thread1of1ForFork1_#t~ite26_Out-114203289|)) (and (= |P2Thread1of1ForFork1_#t~ite26_Out-114203289| ~a$w_buff0_used~0_In-114203289) .cse0 (= |P2Thread1of1ForFork1_#t~ite26_Out-114203289| |P2Thread1of1ForFork1_#t~ite27_Out-114203289|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-114203289 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-114203289 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In-114203289 256)) .cse1) (and .cse1 (= (mod ~a$w_buff1_used~0_In-114203289 256) 0))))))) InVars {P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_In-114203289|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-114203289, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-114203289, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-114203289, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-114203289, ~weak$$choice2~0=~weak$$choice2~0_In-114203289} OutVars{P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_Out-114203289|, P2Thread1of1ForFork1_#t~ite27=|P2Thread1of1ForFork1_#t~ite27_Out-114203289|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-114203289, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-114203289, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-114203289, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-114203289, ~weak$$choice2~0=~weak$$choice2~0_In-114203289} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite26, P2Thread1of1ForFork1_#t~ite27] because there is no mapped edge [2019-12-07 18:47:59,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L812-->L813: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite31=|v_P2Thread1of1ForFork1_#t~ite31_6|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_7|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite31, P2Thread1of1ForFork1_#t~ite33, ~a$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:47:59,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L815-->L819: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_42 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{~a~0=v_~a~0_42, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_5|, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork1_#t~ite37, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:47:59,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L819-2-->L819-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-2128902244 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-2128902244 256)))) (or (and (= ~a$w_buff1~0_In-2128902244 |P2Thread1of1ForFork1_#t~ite38_Out-2128902244|) (not .cse0) (not .cse1)) (and (= ~a~0_In-2128902244 |P2Thread1of1ForFork1_#t~ite38_Out-2128902244|) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-2128902244, ~a$w_buff1~0=~a$w_buff1~0_In-2128902244, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128902244, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128902244} OutVars{~a~0=~a~0_In-2128902244, P2Thread1of1ForFork1_#t~ite38=|P2Thread1of1ForFork1_#t~ite38_Out-2128902244|, ~a$w_buff1~0=~a$w_buff1~0_In-2128902244, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128902244, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128902244} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38] because there is no mapped edge [2019-12-07 18:47:59,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L819-4-->L820: Formula: (= v_~a~0_31 |v_P2Thread1of1ForFork1_#t~ite38_12|) InVars {P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_12|} OutVars{~a~0=v_~a~0_31, P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_11|, P2Thread1of1ForFork1_#t~ite39=|v_P2Thread1of1ForFork1_#t~ite39_11|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork1_#t~ite38, P2Thread1of1ForFork1_#t~ite39] because there is no mapped edge [2019-12-07 18:47:59,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L820-->L820-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-977118759 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-977118759 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite40_Out-977118759|) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-977118759 |P2Thread1of1ForFork1_#t~ite40_Out-977118759|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-977118759, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-977118759} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-977118759, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-977118759, P2Thread1of1ForFork1_#t~ite40=|P2Thread1of1ForFork1_#t~ite40_Out-977118759|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 18:47:59,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-94073127 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-94073127 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-94073127 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-94073127 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite41_Out-94073127|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-94073127 |P2Thread1of1ForFork1_#t~ite41_Out-94073127|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-94073127, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-94073127, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-94073127, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-94073127} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-94073127, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-94073127, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-94073127, P2Thread1of1ForFork1_#t~ite41=|P2Thread1of1ForFork1_#t~ite41_Out-94073127|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-94073127} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite41] because there is no mapped edge [2019-12-07 18:47:59,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L822-->L822-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1189180660 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1189180660 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite42_Out1189180660| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite42_Out1189180660| ~a$r_buff0_thd3~0_In1189180660)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660} OutVars{P2Thread1of1ForFork1_#t~ite42=|P2Thread1of1ForFork1_#t~ite42_Out1189180660|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite42] because there is no mapped edge [2019-12-07 18:47:59,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L823-->L823-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-6436047 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-6436047 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-6436047 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-6436047 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite43_Out-6436047|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~a$r_buff1_thd3~0_In-6436047 |P2Thread1of1ForFork1_#t~ite43_Out-6436047|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047} OutVars{P2Thread1of1ForFork1_#t~ite43=|P2Thread1of1ForFork1_#t~ite43_Out-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43] because there is no mapped edge [2019-12-07 18:47:59,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L823-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= v_~a$r_buff1_thd3~0_109 |v_P2Thread1of1ForFork1_#t~ite43_32|)) InVars {P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_31|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_109, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43, P2Thread1of1ForFork1_#res.base, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:47:59,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L761-->L761-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-725845716 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-725845716 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork2_#t~ite5_Out-725845716| ~a$w_buff0_used~0_In-725845716)) (and (not .cse1) (= |P0Thread1of1ForFork2_#t~ite5_Out-725845716| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-725845716, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-725845716} OutVars{P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out-725845716|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-725845716, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-725845716} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:47:59,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L762-->L762-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In114749455 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In114749455 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In114749455 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd1~0_In114749455 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork2_#t~ite6_Out114749455|)) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In114749455 |P0Thread1of1ForFork2_#t~ite6_Out114749455|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In114749455, ~a$w_buff0_used~0=~a$w_buff0_used~0_In114749455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In114749455, ~a$w_buff1_used~0=~a$w_buff1_used~0_In114749455} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In114749455, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out114749455|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In114749455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In114749455, ~a$w_buff1_used~0=~a$w_buff1_used~0_In114749455} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:47:59,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L763-->L764: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1687707866 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-1687707866 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_In-1687707866 ~a$r_buff0_thd1~0_Out-1687707866))) (or (and (not .cse0) (= 0 ~a$r_buff0_thd1~0_Out-1687707866) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687707866, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1687707866} OutVars{P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out-1687707866|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687707866, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1687707866} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:47:59,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L764-->L764-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1041411881 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1041411881 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1041411881 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1041411881 256) 0))) (or (and (= 0 |P0Thread1of1ForFork2_#t~ite8_Out1041411881|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$r_buff1_thd1~0_In1041411881 |P0Thread1of1ForFork2_#t~ite8_Out1041411881|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1041411881, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1041411881, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1041411881, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1041411881} OutVars{P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out1041411881|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1041411881, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1041411881, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1041411881, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1041411881} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:47:59,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L764-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite8_42| v_~a$r_buff1_thd1~0_72) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_41|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, ~a$r_buff1_thd1~0, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:47:59,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L846-1-->L852: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_33) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:47:59,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L852-2-->L852-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In976816567 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In976816567 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out976816567| ~a~0_In976816567) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out976816567| ~a$w_buff1~0_In976816567)))) InVars {~a~0=~a~0_In976816567, ~a$w_buff1~0=~a$w_buff1~0_In976816567, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In976816567, ~a$w_buff1_used~0=~a$w_buff1_used~0_In976816567} OutVars{~a~0=~a~0_In976816567, ~a$w_buff1~0=~a$w_buff1~0_In976816567, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out976816567|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In976816567, ~a$w_buff1_used~0=~a$w_buff1_used~0_In976816567} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:47:59,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L852-4-->L853: Formula: (= v_~a~0_58 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_58, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:47:59,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L853-->L853-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In2098222730 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In2098222730 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out2098222730| ~a$w_buff0_used~0_In2098222730) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out2098222730|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2098222730, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2098222730} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2098222730, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2098222730|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2098222730} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:47:59,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L854-->L854-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-1339576252 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In-1339576252 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1339576252 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1339576252 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-1339576252| 0)) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-1339576252 |ULTIMATE.start_main_#t~ite50_Out-1339576252|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1339576252, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1339576252, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1339576252, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1339576252} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1339576252|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1339576252, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1339576252, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1339576252, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1339576252} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:47:59,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L855-->L855-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In1935730888 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1935730888 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1935730888|)) (and (= ~a$r_buff0_thd0~0_In1935730888 |ULTIMATE.start_main_#t~ite51_Out1935730888|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1935730888, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1935730888} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1935730888|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1935730888, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1935730888} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:47:59,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L856-->L856-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In293287755 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In293287755 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In293287755 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In293287755 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out293287755| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite52_Out293287755| ~a$r_buff1_thd0~0_In293287755) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In293287755, ~a$w_buff0_used~0=~a$w_buff0_used~0_In293287755, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In293287755, ~a$w_buff1_used~0=~a$w_buff1_used~0_In293287755} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out293287755|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In293287755, ~a$w_buff0_used~0=~a$w_buff0_used~0_In293287755, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In293287755, ~a$w_buff1_used~0=~a$w_buff1_used~0_In293287755} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:47:59,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] L856-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_21 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_~a$r_buff1_thd0~0_104 |v_ULTIMATE.start_main_#t~ite52_44|) (= v_~main$tmp_guard1~0_21 (ite (= (ite (not (and (= v_~__unbuffered_p0_EBX~0_54 0) (= v_~__unbuffered_p1_EBX~0_27 0) (= 1 v_~__unbuffered_p1_EAX~0_27) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p0_EAX~0_54) (= 1 v_~__unbuffered_p2_EAX~0_24))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_44|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_54, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_27, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_24} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_54, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_27, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_104, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_24, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:47:59,505 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:47:59 BasicIcfg [2019-12-07 18:47:59,505 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:47:59,506 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:47:59,506 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:47:59,506 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:47:59,506 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:46:14" (3/4) ... [2019-12-07 18:47:59,508 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:47:59,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L842: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 |v_ULTIMATE.start_main_~#t56~0.offset_18|) (= v_~__unbuffered_cnt~0_134 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t56~0.base_23| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t56~0.base_23|) |v_ULTIMATE.start_main_~#t56~0.offset_18| 0)) |v_#memory_int_21|) (= v_~a$r_buff1_thd0~0_110 0) (= v_~x~0_44 0) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$r_buff0_thd1~0_147) (= 0 v_~a$read_delayed~0_7) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t56~0.base_23| 1)) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~__unbuffered_p0_EAX~0_60) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t56~0.base_23| 4) |v_#length_23|) (= 0 v_~a$w_buff0_used~0_862) (= v_~__unbuffered_p0_EBX~0_60 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t56~0.base_23|) (= 0 v_~a$r_buff1_thd1~0_105) (= v_~main$tmp_guard1~0_27 0) (= v_~a$flush_delayed~0_24 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~a~0_173 0) (= v_~a$r_buff1_thd3~0_219 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~a$r_buff0_thd3~0_314 0) (= 0 v_~__unbuffered_p2_EAX~0_29) (= v_~__unbuffered_p2_EBX~0_35 0) (= 0 v_~a$r_buff1_thd2~0_106) (= 0 |v_#NULL.base_4|) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$w_buff0~0_390 0) (= 0 v_~a$r_buff0_thd2~0_104) (= v_~y~0_53 0) (= v_~a$mem_tmp~0_13 0) (= |v_#NULL.offset_4| 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t56~0.base_23|)) (= v_~main$tmp_guard0~0_22 0) (= v_~z~0_20 0) (= 0 v_~a$w_buff1~0_260) (= v_~weak$$choice2~0_108 0) (= v_~a$r_buff0_thd0~0_142 0) (= 0 v_~a$w_buff1_used~0_471) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_106, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_83|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_241|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_142, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_~#t58~0.offset=|v_ULTIMATE.start_main_~#t58~0.offset_15|, ~a~0=v_~a~0_173, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_53|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_60, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_29, ULTIMATE.start_main_~#t57~0.offset=|v_ULTIMATE.start_main_~#t57~0.offset_18|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_35, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_60, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_219, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_862, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_147, ULTIMATE.start_main_~#t58~0.base=|v_ULTIMATE.start_main_~#t58~0.base_20|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t56~0.offset=|v_ULTIMATE.start_main_~#t56~0.offset_18|, ~a$w_buff0~0=v_~a$w_buff0~0_390, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_110, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_134, ~x~0=v_~x~0_44, ULTIMATE.start_main_~#t57~0.base=|v_ULTIMATE.start_main_~#t57~0.base_23|, ~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_104, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_61|, ~a$mem_tmp~0=v_~a$mem_tmp~0_13, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_37|, ~a$w_buff1~0=v_~a$w_buff1~0_260, ~y~0=v_~y~0_53, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_105, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_314, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_24, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_471, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t56~0.base=|v_ULTIMATE.start_main_~#t56~0.base_23|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t58~0.offset, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t57~0.offset, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t58~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t56~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t57~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t56~0.base] because there is no mapped edge [2019-12-07 18:47:59,509 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] P0ENTRY-->L4-3: Formula: (and (= ~a$w_buff0_used~0_In477509915 ~a$w_buff1_used~0_Out477509915) (= P0Thread1of1ForFork2___VERIFIER_assert_~expression_Out477509915 |P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_Out477509915|) (= |P0Thread1of1ForFork2_#in~arg.offset_In477509915| P0Thread1of1ForFork2_~arg.offset_Out477509915) (= ~a$w_buff0~0_Out477509915 1) (= ~a$w_buff0~0_In477509915 ~a$w_buff1~0_Out477509915) (= |P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_Out477509915| (ite (not (and (not (= (mod ~a$w_buff0_used~0_Out477509915 256) 0)) (not (= (mod ~a$w_buff1_used~0_Out477509915 256) 0)))) 1 0)) (not (= P0Thread1of1ForFork2___VERIFIER_assert_~expression_Out477509915 0)) (= 1 ~a$w_buff0_used~0_Out477509915) (= |P0Thread1of1ForFork2_#in~arg.base_In477509915| P0Thread1of1ForFork2_~arg.base_Out477509915)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|P0Thread1of1ForFork2_#in~arg.offset_In477509915|, ~a$w_buff0~0=~a$w_buff0~0_In477509915, ~a$w_buff0_used~0=~a$w_buff0_used~0_In477509915, P0Thread1of1ForFork2_#in~arg.base=|P0Thread1of1ForFork2_#in~arg.base_In477509915|} OutVars{~a$w_buff1~0=~a$w_buff1~0_Out477509915, P0Thread1of1ForFork2_#in~arg.offset=|P0Thread1of1ForFork2_#in~arg.offset_In477509915|, ~a$w_buff0~0=~a$w_buff0~0_Out477509915, P0Thread1of1ForFork2_~arg.offset=P0Thread1of1ForFork2_~arg.offset_Out477509915, ~a$w_buff0_used~0=~a$w_buff0_used~0_Out477509915, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_Out477509915, P0Thread1of1ForFork2_#in~arg.base=|P0Thread1of1ForFork2_#in~arg.base_In477509915|, ~a$w_buff1_used~0=~a$w_buff1_used~0_Out477509915, P0Thread1of1ForFork2_~arg.base=P0Thread1of1ForFork2_~arg.base_Out477509915, P0Thread1of1ForFork2___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_Out477509915|} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork2_~arg.offset, ~a$w_buff0_used~0, P0Thread1of1ForFork2___VERIFIER_assert_~expression, ~a$w_buff1_used~0, P0Thread1of1ForFork2_~arg.base, P0Thread1of1ForFork2___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:47:59,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L842-1-->L844: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t57~0.base_13| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t57~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t57~0.base_13|) |v_ULTIMATE.start_main_~#t57~0.offset_11| 1)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t57~0.base_13| 0)) (= 0 |v_ULTIMATE.start_main_~#t57~0.offset_11|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t57~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t57~0.base_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t57~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t57~0.offset=|v_ULTIMATE.start_main_~#t57~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t57~0.base=|v_ULTIMATE.start_main_~#t57~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t57~0.offset, ULTIMATE.start_main_~#t57~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:47:59,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L783-2-->L783-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork0_#t~ite10_Out233556834| |P1Thread1of1ForFork0_#t~ite9_Out233556834|)) (.cse2 (= (mod ~a$r_buff1_thd2~0_In233556834 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In233556834 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= |P1Thread1of1ForFork0_#t~ite9_Out233556834| ~a$w_buff1~0_In233556834)) (and .cse0 (or .cse2 .cse1) (= ~a~0_In233556834 |P1Thread1of1ForFork0_#t~ite9_Out233556834|)))) InVars {~a~0=~a~0_In233556834, ~a$w_buff1~0=~a$w_buff1~0_In233556834, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In233556834, ~a$w_buff1_used~0=~a$w_buff1_used~0_In233556834} OutVars{~a~0=~a~0_In233556834, ~a$w_buff1~0=~a$w_buff1~0_In233556834, P1Thread1of1ForFork0_#t~ite10=|P1Thread1of1ForFork0_#t~ite10_Out233556834|, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In233556834, P1Thread1of1ForFork0_#t~ite9=|P1Thread1of1ForFork0_#t~ite9_Out233556834|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In233556834} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite10, P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 18:47:59,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L784-->L784-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1025202143 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1025202143 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite11_Out1025202143| 0)) (and (= |P1Thread1of1ForFork0_#t~ite11_Out1025202143| ~a$w_buff0_used~0_In1025202143) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1025202143, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1025202143} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1025202143, P1Thread1of1ForFork0_#t~ite11=|P1Thread1of1ForFork0_#t~ite11_Out1025202143|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1025202143} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 18:47:59,513 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L785-->L785-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-987323291 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-987323291 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-987323291 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-987323291 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite12_Out-987323291| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite12_Out-987323291| ~a$w_buff1_used~0_In-987323291) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-987323291, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-987323291, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-987323291, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-987323291} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-987323291, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-987323291, P1Thread1of1ForFork0_#t~ite12=|P1Thread1of1ForFork0_#t~ite12_Out-987323291|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-987323291, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-987323291} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 18:47:59,513 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-958481548 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-958481548 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite13_Out-958481548| 0)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-958481548 |P1Thread1of1ForFork0_#t~ite13_Out-958481548|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-958481548, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-958481548} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-958481548, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-958481548, P1Thread1of1ForFork0_#t~ite13=|P1Thread1of1ForFork0_#t~ite13_Out-958481548|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 18:47:59,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L787-->L787-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In896287032 256))) (.cse2 (= (mod ~a$r_buff1_thd2~0_In896287032 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In896287032 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In896287032 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite14_Out896287032| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd2~0_In896287032 |P1Thread1of1ForFork0_#t~ite14_Out896287032|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In896287032, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In896287032, ~a$w_buff0_used~0=~a$w_buff0_used~0_In896287032, ~a$w_buff1_used~0=~a$w_buff1_used~0_In896287032} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In896287032, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In896287032, ~a$w_buff0_used~0=~a$w_buff0_used~0_In896287032, P1Thread1of1ForFork0_#t~ite14=|P1Thread1of1ForFork0_#t~ite14_Out896287032|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In896287032} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 18:47:59,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L787-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~a$r_buff1_thd2~0_53 |v_P1Thread1of1ForFork0_#t~ite14_26|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_53, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_25|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#t~ite14, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:47:59,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L844-1-->L846: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t58~0.base_12| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t58~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t58~0.base_12|) |v_ULTIMATE.start_main_~#t58~0.offset_10| 2)) |v_#memory_int_11|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t58~0.base_12|) 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t58~0.base_12|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t58~0.base_12| 4)) (= 0 |v_ULTIMATE.start_main_~#t58~0.offset_10|) (not (= 0 |v_ULTIMATE.start_main_~#t58~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t58~0.offset=|v_ULTIMATE.start_main_~#t58~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t58~0.base=|v_ULTIMATE.start_main_~#t58~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t58~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t58~0.base] because there is no mapped edge [2019-12-07 18:47:59,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L808-->L808-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In364898873 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite21_Out364898873| ~a$w_buff0~0_In364898873) (= |P2Thread1of1ForFork1_#t~ite20_In364898873| |P2Thread1of1ForFork1_#t~ite20_Out364898873|)) (and (= |P2Thread1of1ForFork1_#t~ite21_Out364898873| |P2Thread1of1ForFork1_#t~ite20_Out364898873|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In364898873 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In364898873 256) 0)) (and (= 0 (mod ~a$w_buff1_used~0_In364898873 256)) .cse1) (= (mod ~a$w_buff0_used~0_In364898873 256) 0))) (= ~a$w_buff0~0_In364898873 |P2Thread1of1ForFork1_#t~ite20_Out364898873|)))) InVars {P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_In364898873|, ~a$w_buff0~0=~a$w_buff0~0_In364898873, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In364898873, ~a$w_buff0_used~0=~a$w_buff0_used~0_In364898873, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In364898873, ~a$w_buff1_used~0=~a$w_buff1_used~0_In364898873, ~weak$$choice2~0=~weak$$choice2~0_In364898873} OutVars{P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_Out364898873|, P2Thread1of1ForFork1_#t~ite21=|P2Thread1of1ForFork1_#t~ite21_Out364898873|, ~a$w_buff0~0=~a$w_buff0~0_In364898873, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In364898873, ~a$w_buff0_used~0=~a$w_buff0_used~0_In364898873, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In364898873, ~a$w_buff1_used~0=~a$w_buff1_used~0_In364898873, ~weak$$choice2~0=~weak$$choice2~0_In364898873} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite20, P2Thread1of1ForFork1_#t~ite21] because there is no mapped edge [2019-12-07 18:47:59,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L810-->L810-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-114203289 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite27_Out-114203289| ~a$w_buff0_used~0_In-114203289) (= |P2Thread1of1ForFork1_#t~ite26_In-114203289| |P2Thread1of1ForFork1_#t~ite26_Out-114203289|)) (and (= |P2Thread1of1ForFork1_#t~ite26_Out-114203289| ~a$w_buff0_used~0_In-114203289) .cse0 (= |P2Thread1of1ForFork1_#t~ite26_Out-114203289| |P2Thread1of1ForFork1_#t~ite27_Out-114203289|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-114203289 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-114203289 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In-114203289 256)) .cse1) (and .cse1 (= (mod ~a$w_buff1_used~0_In-114203289 256) 0))))))) InVars {P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_In-114203289|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-114203289, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-114203289, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-114203289, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-114203289, ~weak$$choice2~0=~weak$$choice2~0_In-114203289} OutVars{P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_Out-114203289|, P2Thread1of1ForFork1_#t~ite27=|P2Thread1of1ForFork1_#t~ite27_Out-114203289|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-114203289, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-114203289, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-114203289, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-114203289, ~weak$$choice2~0=~weak$$choice2~0_In-114203289} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite26, P2Thread1of1ForFork1_#t~ite27] because there is no mapped edge [2019-12-07 18:47:59,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L812-->L813: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite31=|v_P2Thread1of1ForFork1_#t~ite31_6|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_7|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite31, P2Thread1of1ForFork1_#t~ite33, ~a$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:47:59,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L815-->L819: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_42 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{~a~0=v_~a~0_42, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_5|, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork1_#t~ite37, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:47:59,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L819-2-->L819-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-2128902244 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-2128902244 256)))) (or (and (= ~a$w_buff1~0_In-2128902244 |P2Thread1of1ForFork1_#t~ite38_Out-2128902244|) (not .cse0) (not .cse1)) (and (= ~a~0_In-2128902244 |P2Thread1of1ForFork1_#t~ite38_Out-2128902244|) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-2128902244, ~a$w_buff1~0=~a$w_buff1~0_In-2128902244, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128902244, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128902244} OutVars{~a~0=~a~0_In-2128902244, P2Thread1of1ForFork1_#t~ite38=|P2Thread1of1ForFork1_#t~ite38_Out-2128902244|, ~a$w_buff1~0=~a$w_buff1~0_In-2128902244, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128902244, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128902244} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38] because there is no mapped edge [2019-12-07 18:47:59,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L819-4-->L820: Formula: (= v_~a~0_31 |v_P2Thread1of1ForFork1_#t~ite38_12|) InVars {P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_12|} OutVars{~a~0=v_~a~0_31, P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_11|, P2Thread1of1ForFork1_#t~ite39=|v_P2Thread1of1ForFork1_#t~ite39_11|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork1_#t~ite38, P2Thread1of1ForFork1_#t~ite39] because there is no mapped edge [2019-12-07 18:47:59,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L820-->L820-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-977118759 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-977118759 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite40_Out-977118759|) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-977118759 |P2Thread1of1ForFork1_#t~ite40_Out-977118759|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-977118759, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-977118759} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-977118759, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-977118759, P2Thread1of1ForFork1_#t~ite40=|P2Thread1of1ForFork1_#t~ite40_Out-977118759|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 18:47:59,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-94073127 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-94073127 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-94073127 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-94073127 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite41_Out-94073127|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-94073127 |P2Thread1of1ForFork1_#t~ite41_Out-94073127|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-94073127, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-94073127, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-94073127, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-94073127} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-94073127, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-94073127, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-94073127, P2Thread1of1ForFork1_#t~ite41=|P2Thread1of1ForFork1_#t~ite41_Out-94073127|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-94073127} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite41] because there is no mapped edge [2019-12-07 18:47:59,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L822-->L822-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1189180660 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1189180660 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite42_Out1189180660| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite42_Out1189180660| ~a$r_buff0_thd3~0_In1189180660)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660} OutVars{P2Thread1of1ForFork1_#t~ite42=|P2Thread1of1ForFork1_#t~ite42_Out1189180660|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite42] because there is no mapped edge [2019-12-07 18:47:59,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L823-->L823-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-6436047 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-6436047 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-6436047 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-6436047 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite43_Out-6436047|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~a$r_buff1_thd3~0_In-6436047 |P2Thread1of1ForFork1_#t~ite43_Out-6436047|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047} OutVars{P2Thread1of1ForFork1_#t~ite43=|P2Thread1of1ForFork1_#t~ite43_Out-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43] because there is no mapped edge [2019-12-07 18:47:59,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L823-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= v_~a$r_buff1_thd3~0_109 |v_P2Thread1of1ForFork1_#t~ite43_32|)) InVars {P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_31|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_109, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43, P2Thread1of1ForFork1_#res.base, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:47:59,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L761-->L761-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-725845716 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-725845716 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork2_#t~ite5_Out-725845716| ~a$w_buff0_used~0_In-725845716)) (and (not .cse1) (= |P0Thread1of1ForFork2_#t~ite5_Out-725845716| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-725845716, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-725845716} OutVars{P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out-725845716|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-725845716, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-725845716} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:47:59,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L762-->L762-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In114749455 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In114749455 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In114749455 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd1~0_In114749455 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork2_#t~ite6_Out114749455|)) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In114749455 |P0Thread1of1ForFork2_#t~ite6_Out114749455|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In114749455, ~a$w_buff0_used~0=~a$w_buff0_used~0_In114749455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In114749455, ~a$w_buff1_used~0=~a$w_buff1_used~0_In114749455} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In114749455, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out114749455|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In114749455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In114749455, ~a$w_buff1_used~0=~a$w_buff1_used~0_In114749455} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:47:59,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L763-->L764: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1687707866 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-1687707866 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_In-1687707866 ~a$r_buff0_thd1~0_Out-1687707866))) (or (and (not .cse0) (= 0 ~a$r_buff0_thd1~0_Out-1687707866) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687707866, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1687707866} OutVars{P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out-1687707866|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687707866, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1687707866} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:47:59,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L764-->L764-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1041411881 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1041411881 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1041411881 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1041411881 256) 0))) (or (and (= 0 |P0Thread1of1ForFork2_#t~ite8_Out1041411881|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$r_buff1_thd1~0_In1041411881 |P0Thread1of1ForFork2_#t~ite8_Out1041411881|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1041411881, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1041411881, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1041411881, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1041411881} OutVars{P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out1041411881|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1041411881, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1041411881, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1041411881, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1041411881} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:47:59,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L764-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite8_42| v_~a$r_buff1_thd1~0_72) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_41|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, ~a$r_buff1_thd1~0, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:47:59,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L846-1-->L852: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_33) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:47:59,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L852-2-->L852-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In976816567 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In976816567 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out976816567| ~a~0_In976816567) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out976816567| ~a$w_buff1~0_In976816567)))) InVars {~a~0=~a~0_In976816567, ~a$w_buff1~0=~a$w_buff1~0_In976816567, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In976816567, ~a$w_buff1_used~0=~a$w_buff1_used~0_In976816567} OutVars{~a~0=~a~0_In976816567, ~a$w_buff1~0=~a$w_buff1~0_In976816567, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out976816567|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In976816567, ~a$w_buff1_used~0=~a$w_buff1_used~0_In976816567} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:47:59,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L852-4-->L853: Formula: (= v_~a~0_58 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_58, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:47:59,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L853-->L853-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In2098222730 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In2098222730 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out2098222730| ~a$w_buff0_used~0_In2098222730) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out2098222730|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2098222730, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2098222730} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2098222730, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2098222730|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2098222730} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:47:59,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L854-->L854-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-1339576252 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In-1339576252 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1339576252 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1339576252 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-1339576252| 0)) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-1339576252 |ULTIMATE.start_main_#t~ite50_Out-1339576252|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1339576252, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1339576252, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1339576252, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1339576252} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1339576252|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1339576252, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1339576252, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1339576252, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1339576252} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:47:59,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L855-->L855-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In1935730888 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1935730888 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1935730888|)) (and (= ~a$r_buff0_thd0~0_In1935730888 |ULTIMATE.start_main_#t~ite51_Out1935730888|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1935730888, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1935730888} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1935730888|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1935730888, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1935730888} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:47:59,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L856-->L856-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In293287755 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In293287755 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In293287755 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In293287755 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out293287755| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite52_Out293287755| ~a$r_buff1_thd0~0_In293287755) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In293287755, ~a$w_buff0_used~0=~a$w_buff0_used~0_In293287755, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In293287755, ~a$w_buff1_used~0=~a$w_buff1_used~0_In293287755} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out293287755|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In293287755, ~a$w_buff0_used~0=~a$w_buff0_used~0_In293287755, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In293287755, ~a$w_buff1_used~0=~a$w_buff1_used~0_In293287755} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:47:59,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] L856-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_21 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_~a$r_buff1_thd0~0_104 |v_ULTIMATE.start_main_#t~ite52_44|) (= v_~main$tmp_guard1~0_21 (ite (= (ite (not (and (= v_~__unbuffered_p0_EBX~0_54 0) (= v_~__unbuffered_p1_EBX~0_27 0) (= 1 v_~__unbuffered_p1_EAX~0_27) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p0_EAX~0_54) (= 1 v_~__unbuffered_p2_EAX~0_24))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_44|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_54, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_27, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_24} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_54, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_27, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_104, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_24, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:47:59,592 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1243e433-c47c-46f2-b35a-95c136e31f70/bin/uautomizer/witness.graphml [2019-12-07 18:47:59,592 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:47:59,593 INFO L168 Benchmark]: Toolchain (without parser) took 105678.59 ms. Allocated memory was 1.0 GB in the beginning and 7.9 GB in the end (delta: 6.9 GB). Free memory was 938.1 MB in the beginning and 3.6 GB in the end (delta: -2.7 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 18:47:59,594 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:47:59,594 INFO L168 Benchmark]: CACSL2BoogieTranslator took 402.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -128.1 MB). Peak memory consumption was 18.0 MB. Max. memory is 11.5 GB. [2019-12-07 18:47:59,594 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.37 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:47:59,595 INFO L168 Benchmark]: Boogie Preprocessor took 25.75 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:47:59,595 INFO L168 Benchmark]: RCFGBuilder took 412.64 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:47:59,595 INFO L168 Benchmark]: TraceAbstraction took 104711.27 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 3.7 GB in the end (delta: -2.7 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:47:59,596 INFO L168 Benchmark]: Witness Printer took 86.71 ms. Allocated memory is still 7.9 GB. Free memory was 3.7 GB in the beginning and 3.6 GB in the end (delta: 56.9 MB). Peak memory consumption was 56.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:47:59,598 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 402.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -128.1 MB). Peak memory consumption was 18.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.37 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.75 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 412.64 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 104711.27 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 3.7 GB in the end (delta: -2.7 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. * Witness Printer took 86.71 ms. Allocated memory is still 7.9 GB. Free memory was 3.7 GB in the beginning and 3.6 GB in the end (delta: 56.9 MB). Peak memory consumption was 56.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 180 ProgramPointsBefore, 95 ProgramPointsAfterwards, 217 TransitionsBefore, 104 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 37 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 32 ChoiceCompositions, 7415 VarBasedMoverChecksPositive, 242 VarBasedMoverChecksNegative, 41 SemBasedMoverChecksPositive, 273 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 93316 CheckedPairsTotal, 117 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L842] FCALL, FORK 0 pthread_create(&t56, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L744] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L745] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L746] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L747] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L748] 1 a$r_buff0_thd1 = (_Bool)1 [L751] 1 x = 1 [L754] 1 __unbuffered_p0_EAX = x [L757] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L760] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L844] FCALL, FORK 0 pthread_create(&t57, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L774] 2 y = 1 [L777] 2 __unbuffered_p1_EAX = y [L780] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L783] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L760] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L783] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L784] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L785] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L786] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L846] FCALL, FORK 0 pthread_create(&t58, ((void *)0), P2, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L797] 3 z = 1 [L800] 3 __unbuffered_p2_EAX = z [L803] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L804] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L805] 3 a$flush_delayed = weak$$choice2 [L806] 3 a$mem_tmp = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L807] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L807] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L808] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L809] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L809] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L810] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L811] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L811] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L813] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L814] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L819] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L820] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L821] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L822] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L761] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L762] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L852] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L853] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L854] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L855] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 171 locations, 2 error locations. Result: UNSAFE, OverallTime: 104.5s, OverallIterations: 27, TraceHistogramMax: 1, AutomataDifference: 25.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5692 SDtfs, 6570 SDslu, 21428 SDs, 0 SdLazy, 16776 SolverSat, 362 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 372 GetRequests, 49 SyntacticMatches, 19 SemanticMatches, 304 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1551 ImplicationChecksByTransitivity, 3.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=219155occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 57.4s AutomataMinimizationTime, 26 MinimizatonAttempts, 234635 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 1187 NumberOfCodeBlocks, 1187 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 1094 ConstructedInterpolants, 0 QuantifiedInterpolants, 440307 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...