./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix003_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix003_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9e1cdb3f919a24d539ca06bd7ad88d50ca947cda ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:08:06,457 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:08:06,459 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:08:06,466 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:08:06,466 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:08:06,467 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:08:06,468 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:08:06,469 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:08:06,470 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:08:06,471 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:08:06,472 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:08:06,472 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:08:06,472 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:08:06,473 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:08:06,474 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:08:06,475 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:08:06,475 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:08:06,476 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:08:06,477 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:08:06,478 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:08:06,480 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:08:06,480 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:08:06,481 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:08:06,481 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:08:06,483 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:08:06,483 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:08:06,483 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:08:06,484 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:08:06,484 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:08:06,485 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:08:06,485 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:08:06,485 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:08:06,486 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:08:06,486 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:08:06,487 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:08:06,487 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:08:06,487 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:08:06,488 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:08:06,488 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:08:06,489 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:08:06,489 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:08:06,490 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:08:06,502 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:08:06,502 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:08:06,503 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:08:06,504 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:08:06,504 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:08:06,504 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:08:06,504 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:08:06,504 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:08:06,505 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:08:06,505 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:08:06,505 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:08:06,505 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:08:06,505 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:08:06,505 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:08:06,506 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:08:06,506 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:08:06,506 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:08:06,506 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:08:06,506 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:08:06,507 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:08:06,507 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:08:06,507 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:08:06,507 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:08:06,507 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:08:06,508 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:08:06,508 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:08:06,508 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:08:06,508 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:08:06,508 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:08:06,508 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9e1cdb3f919a24d539ca06bd7ad88d50ca947cda [2019-12-07 10:08:06,616 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:08:06,624 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:08:06,626 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:08:06,627 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:08:06,627 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:08:06,628 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix003_power.oepc.i [2019-12-07 10:08:06,664 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/data/ff9e9c7f6/d6392c3d2f9c46389ee9d89c11e90b86/FLAGe49e73fc8 [2019-12-07 10:08:07,105 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:08:07,106 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/sv-benchmarks/c/pthread-wmm/mix003_power.oepc.i [2019-12-07 10:08:07,116 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/data/ff9e9c7f6/d6392c3d2f9c46389ee9d89c11e90b86/FLAGe49e73fc8 [2019-12-07 10:08:07,125 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/data/ff9e9c7f6/d6392c3d2f9c46389ee9d89c11e90b86 [2019-12-07 10:08:07,127 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:08:07,128 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:08:07,128 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:08:07,129 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:08:07,131 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:08:07,131 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,133 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07, skipping insertion in model container [2019-12-07 10:08:07,133 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,138 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:08:07,169 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:08:07,420 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:08:07,427 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:08:07,470 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:08:07,515 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:08:07,515 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07 WrapperNode [2019-12-07 10:08:07,515 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:08:07,516 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:08:07,516 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:08:07,516 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:08:07,521 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,534 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,552 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:08:07,552 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:08:07,552 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:08:07,552 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:08:07,558 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,558 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,562 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,562 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,569 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,572 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,575 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... [2019-12-07 10:08:07,578 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:08:07,578 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:08:07,578 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:08:07,578 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:08:07,579 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:08:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:08:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:08:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:08:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:08:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:08:07,618 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:08:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:08:07,619 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:08:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:08:07,619 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:08:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:08:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:08:07,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:08:07,620 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:08:07,988 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:08:07,988 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:08:07,989 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:08:07 BoogieIcfgContainer [2019-12-07 10:08:07,989 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:08:07,990 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:08:07,990 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:08:07,991 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:08:07,992 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:08:07" (1/3) ... [2019-12-07 10:08:07,992 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ad751bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:08:07, skipping insertion in model container [2019-12-07 10:08:07,992 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:08:07" (2/3) ... [2019-12-07 10:08:07,992 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ad751bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:08:07, skipping insertion in model container [2019-12-07 10:08:07,993 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:08:07" (3/3) ... [2019-12-07 10:08:07,994 INFO L109 eAbstractionObserver]: Analyzing ICFG mix003_power.oepc.i [2019-12-07 10:08:08,000 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:08:08,000 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:08:08,005 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:08:08,006 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:08:08,032 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,032 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,032 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,032 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,032 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,032 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,033 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,033 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,036 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,036 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,036 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,036 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,037 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,038 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,039 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,039 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,039 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,039 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,039 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,039 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,039 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,040 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,040 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,040 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,040 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,041 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,042 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,043 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:08:08,065 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:08:08,077 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:08:08,077 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:08:08,077 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:08:08,077 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:08:08,077 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:08:08,077 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:08:08,077 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:08:08,078 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:08:08,089 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 10:08:08,090 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 10:08:08,145 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 10:08:08,145 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:08:08,156 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:08:08,174 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 10:08:08,205 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 10:08:08,206 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:08:08,211 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:08:08,227 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 10:08:08,227 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:08:11,153 WARN L192 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 10:08:11,470 INFO L206 etLargeBlockEncoding]: Checked pairs total: 132619 [2019-12-07 10:08:11,470 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 10:08:11,472 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 10:08:27,813 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 120347 states. [2019-12-07 10:08:27,815 INFO L276 IsEmpty]: Start isEmpty. Operand 120347 states. [2019-12-07 10:08:27,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 10:08:27,819 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:08:27,819 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 10:08:27,819 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:08:27,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:08:27,823 INFO L82 PathProgramCache]: Analyzing trace with hash 919842, now seen corresponding path program 1 times [2019-12-07 10:08:27,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:08:27,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982037748] [2019-12-07 10:08:27,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:08:27,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:08:27,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:08:27,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982037748] [2019-12-07 10:08:27,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:08:27,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:08:27,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [133569688] [2019-12-07 10:08:27,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:08:27,962 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:08:27,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:08:27,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:08:27,972 INFO L87 Difference]: Start difference. First operand 120347 states. Second operand 3 states. [2019-12-07 10:08:28,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:08:28,789 INFO L93 Difference]: Finished difference Result 119613 states and 515253 transitions. [2019-12-07 10:08:28,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:08:28,791 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 10:08:28,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:08:29,213 INFO L225 Difference]: With dead ends: 119613 [2019-12-07 10:08:29,213 INFO L226 Difference]: Without dead ends: 105755 [2019-12-07 10:08:29,214 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:08:34,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105755 states. [2019-12-07 10:08:36,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105755 to 105755. [2019-12-07 10:08:36,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105755 states. [2019-12-07 10:08:36,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105755 states to 105755 states and 454361 transitions. [2019-12-07 10:08:36,786 INFO L78 Accepts]: Start accepts. Automaton has 105755 states and 454361 transitions. Word has length 3 [2019-12-07 10:08:36,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:08:36,786 INFO L462 AbstractCegarLoop]: Abstraction has 105755 states and 454361 transitions. [2019-12-07 10:08:36,786 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:08:36,786 INFO L276 IsEmpty]: Start isEmpty. Operand 105755 states and 454361 transitions. [2019-12-07 10:08:36,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 10:08:36,789 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:08:36,789 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:08:36,789 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:08:36,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:08:36,790 INFO L82 PathProgramCache]: Analyzing trace with hash 474732739, now seen corresponding path program 1 times [2019-12-07 10:08:36,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:08:36,790 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683910764] [2019-12-07 10:08:36,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:08:36,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:08:36,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:08:36,852 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683910764] [2019-12-07 10:08:36,852 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:08:36,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:08:36,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [740535665] [2019-12-07 10:08:36,853 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:08:36,853 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:08:36,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:08:36,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:08:36,854 INFO L87 Difference]: Start difference. First operand 105755 states and 454361 transitions. Second operand 4 states. [2019-12-07 10:08:37,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:08:37,748 INFO L93 Difference]: Finished difference Result 168845 states and 694815 transitions. [2019-12-07 10:08:37,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:08:37,749 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 10:08:37,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:08:38,155 INFO L225 Difference]: With dead ends: 168845 [2019-12-07 10:08:38,155 INFO L226 Difference]: Without dead ends: 168747 [2019-12-07 10:08:38,156 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:08:43,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168747 states. [2019-12-07 10:08:47,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168747 to 153153. [2019-12-07 10:08:47,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153153 states. [2019-12-07 10:08:47,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153153 states to 153153 states and 639357 transitions. [2019-12-07 10:08:47,767 INFO L78 Accepts]: Start accepts. Automaton has 153153 states and 639357 transitions. Word has length 11 [2019-12-07 10:08:47,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:08:47,768 INFO L462 AbstractCegarLoop]: Abstraction has 153153 states and 639357 transitions. [2019-12-07 10:08:47,768 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:08:47,768 INFO L276 IsEmpty]: Start isEmpty. Operand 153153 states and 639357 transitions. [2019-12-07 10:08:47,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:08:47,772 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:08:47,772 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:08:47,773 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:08:47,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:08:47,773 INFO L82 PathProgramCache]: Analyzing trace with hash -512415605, now seen corresponding path program 1 times [2019-12-07 10:08:47,773 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:08:47,773 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532497426] [2019-12-07 10:08:47,773 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:08:47,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:08:47,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:08:47,823 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532497426] [2019-12-07 10:08:47,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:08:47,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:08:47,823 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [250093560] [2019-12-07 10:08:47,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:08:47,824 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:08:47,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:08:47,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:08:47,824 INFO L87 Difference]: Start difference. First operand 153153 states and 639357 transitions. Second operand 4 states. [2019-12-07 10:08:48,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:08:48,928 INFO L93 Difference]: Finished difference Result 220024 states and 896381 transitions. [2019-12-07 10:08:48,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:08:48,928 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:08:48,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:08:49,507 INFO L225 Difference]: With dead ends: 220024 [2019-12-07 10:08:49,507 INFO L226 Difference]: Without dead ends: 219912 [2019-12-07 10:08:49,508 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:08:58,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219912 states. [2019-12-07 10:09:00,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219912 to 183120. [2019-12-07 10:09:00,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183120 states. [2019-12-07 10:09:01,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183120 states to 183120 states and 760223 transitions. [2019-12-07 10:09:01,267 INFO L78 Accepts]: Start accepts. Automaton has 183120 states and 760223 transitions. Word has length 13 [2019-12-07 10:09:01,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:09:01,268 INFO L462 AbstractCegarLoop]: Abstraction has 183120 states and 760223 transitions. [2019-12-07 10:09:01,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:09:01,268 INFO L276 IsEmpty]: Start isEmpty. Operand 183120 states and 760223 transitions. [2019-12-07 10:09:01,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:09:01,275 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:09:01,275 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:09:01,275 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:09:01,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:09:01,275 INFO L82 PathProgramCache]: Analyzing trace with hash -1719969010, now seen corresponding path program 1 times [2019-12-07 10:09:01,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:09:01,276 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124843690] [2019-12-07 10:09:01,276 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:09:01,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:09:01,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:09:01,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124843690] [2019-12-07 10:09:01,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:09:01,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:09:01,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389402782] [2019-12-07 10:09:01,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:09:01,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:09:01,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:09:01,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:09:01,320 INFO L87 Difference]: Start difference. First operand 183120 states and 760223 transitions. Second operand 4 states. [2019-12-07 10:09:02,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:09:02,465 INFO L93 Difference]: Finished difference Result 225249 states and 927434 transitions. [2019-12-07 10:09:02,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:09:02,466 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:09:02,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:09:03,053 INFO L225 Difference]: With dead ends: 225249 [2019-12-07 10:09:03,053 INFO L226 Difference]: Without dead ends: 225249 [2019-12-07 10:09:03,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:09:09,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225249 states. [2019-12-07 10:09:12,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225249 to 195075. [2019-12-07 10:09:12,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195075 states. [2019-12-07 10:09:15,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195075 states to 195075 states and 809283 transitions. [2019-12-07 10:09:15,842 INFO L78 Accepts]: Start accepts. Automaton has 195075 states and 809283 transitions. Word has length 16 [2019-12-07 10:09:15,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:09:15,842 INFO L462 AbstractCegarLoop]: Abstraction has 195075 states and 809283 transitions. [2019-12-07 10:09:15,842 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:09:15,842 INFO L276 IsEmpty]: Start isEmpty. Operand 195075 states and 809283 transitions. [2019-12-07 10:09:15,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:09:15,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:09:15,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:09:15,848 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:09:15,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:09:15,848 INFO L82 PathProgramCache]: Analyzing trace with hash -1720071868, now seen corresponding path program 1 times [2019-12-07 10:09:15,848 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:09:15,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131599464] [2019-12-07 10:09:15,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:09:15,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:09:15,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:09:15,879 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131599464] [2019-12-07 10:09:15,879 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:09:15,879 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:09:15,879 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1684997079] [2019-12-07 10:09:15,880 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:09:15,880 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:09:15,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:09:15,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:09:15,880 INFO L87 Difference]: Start difference. First operand 195075 states and 809283 transitions. Second operand 3 states. [2019-12-07 10:09:17,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:09:17,033 INFO L93 Difference]: Finished difference Result 282572 states and 1168256 transitions. [2019-12-07 10:09:17,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:09:17,034 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 10:09:17,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:09:18,097 INFO L225 Difference]: With dead ends: 282572 [2019-12-07 10:09:18,097 INFO L226 Difference]: Without dead ends: 282572 [2019-12-07 10:09:18,098 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:09:24,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282572 states. [2019-12-07 10:09:28,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282572 to 224589. [2019-12-07 10:09:28,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224589 states. [2019-12-07 10:09:28,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224589 states to 224589 states and 936012 transitions. [2019-12-07 10:09:28,998 INFO L78 Accepts]: Start accepts. Automaton has 224589 states and 936012 transitions. Word has length 16 [2019-12-07 10:09:28,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:09:28,999 INFO L462 AbstractCegarLoop]: Abstraction has 224589 states and 936012 transitions. [2019-12-07 10:09:28,999 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:09:28,999 INFO L276 IsEmpty]: Start isEmpty. Operand 224589 states and 936012 transitions. [2019-12-07 10:09:29,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:09:29,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:09:29,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:09:29,005 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:09:29,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:09:29,005 INFO L82 PathProgramCache]: Analyzing trace with hash 759335912, now seen corresponding path program 1 times [2019-12-07 10:09:29,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:09:29,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393147619] [2019-12-07 10:09:29,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:09:29,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:09:29,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:09:29,042 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393147619] [2019-12-07 10:09:29,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:09:29,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:09:29,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284315187] [2019-12-07 10:09:29,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:09:29,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:09:29,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:09:29,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:09:29,044 INFO L87 Difference]: Start difference. First operand 224589 states and 936012 transitions. Second operand 4 states. [2019-12-07 10:09:30,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:09:30,329 INFO L93 Difference]: Finished difference Result 265350 states and 1097413 transitions. [2019-12-07 10:09:30,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:09:30,330 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:09:30,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:09:31,514 INFO L225 Difference]: With dead ends: 265350 [2019-12-07 10:09:31,514 INFO L226 Difference]: Without dead ends: 265350 [2019-12-07 10:09:31,515 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:09:40,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265350 states. [2019-12-07 10:09:43,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265350 to 227267. [2019-12-07 10:09:43,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227267 states. [2019-12-07 10:09:44,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227267 states to 227267 states and 947978 transitions. [2019-12-07 10:09:44,461 INFO L78 Accepts]: Start accepts. Automaton has 227267 states and 947978 transitions. Word has length 16 [2019-12-07 10:09:44,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:09:44,461 INFO L462 AbstractCegarLoop]: Abstraction has 227267 states and 947978 transitions. [2019-12-07 10:09:44,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:09:44,461 INFO L276 IsEmpty]: Start isEmpty. Operand 227267 states and 947978 transitions. [2019-12-07 10:09:44,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 10:09:44,471 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:09:44,471 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:09:44,471 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:09:44,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:09:44,471 INFO L82 PathProgramCache]: Analyzing trace with hash 980787520, now seen corresponding path program 1 times [2019-12-07 10:09:44,471 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:09:44,471 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253312506] [2019-12-07 10:09:44,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:09:44,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:09:44,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:09:44,532 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253312506] [2019-12-07 10:09:44,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:09:44,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:09:44,533 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346797794] [2019-12-07 10:09:44,533 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:09:44,533 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:09:44,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:09:44,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:09:44,534 INFO L87 Difference]: Start difference. First operand 227267 states and 947978 transitions. Second operand 3 states. [2019-12-07 10:09:45,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:09:45,989 INFO L93 Difference]: Finished difference Result 230656 states and 958288 transitions. [2019-12-07 10:09:45,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:09:45,990 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 10:09:45,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:09:46,572 INFO L225 Difference]: With dead ends: 230656 [2019-12-07 10:09:46,572 INFO L226 Difference]: Without dead ends: 230656 [2019-12-07 10:09:46,572 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:09:52,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230656 states. [2019-12-07 10:09:56,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230656 to 227264. [2019-12-07 10:09:56,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227264 states. [2019-12-07 10:09:56,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227264 states to 227264 states and 947966 transitions. [2019-12-07 10:09:56,812 INFO L78 Accepts]: Start accepts. Automaton has 227264 states and 947966 transitions. Word has length 18 [2019-12-07 10:09:56,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:09:56,812 INFO L462 AbstractCegarLoop]: Abstraction has 227264 states and 947966 transitions. [2019-12-07 10:09:56,812 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:09:56,812 INFO L276 IsEmpty]: Start isEmpty. Operand 227264 states and 947966 transitions. [2019-12-07 10:09:56,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:09:56,824 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:09:56,824 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:09:56,824 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:09:56,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:09:56,825 INFO L82 PathProgramCache]: Analyzing trace with hash 699473802, now seen corresponding path program 1 times [2019-12-07 10:09:56,825 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:09:56,825 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939764058] [2019-12-07 10:09:56,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:09:56,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:09:56,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:09:56,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939764058] [2019-12-07 10:09:56,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:09:56,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:09:56,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905515583] [2019-12-07 10:09:56,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:09:56,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:09:56,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:09:56,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:09:56,870 INFO L87 Difference]: Start difference. First operand 227264 states and 947966 transitions. Second operand 4 states. [2019-12-07 10:09:58,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:09:58,282 INFO L93 Difference]: Finished difference Result 230229 states and 956657 transitions. [2019-12-07 10:09:58,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:09:58,282 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 10:09:58,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:09:58,859 INFO L225 Difference]: With dead ends: 230229 [2019-12-07 10:09:58,859 INFO L226 Difference]: Without dead ends: 230229 [2019-12-07 10:09:58,859 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:10:07,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230229 states. [2019-12-07 10:10:10,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230229 to 226875. [2019-12-07 10:10:10,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226875 states. [2019-12-07 10:10:11,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226875 states to 226875 states and 946440 transitions. [2019-12-07 10:10:11,113 INFO L78 Accepts]: Start accepts. Automaton has 226875 states and 946440 transitions. Word has length 19 [2019-12-07 10:10:11,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:11,114 INFO L462 AbstractCegarLoop]: Abstraction has 226875 states and 946440 transitions. [2019-12-07 10:10:11,114 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:10:11,114 INFO L276 IsEmpty]: Start isEmpty. Operand 226875 states and 946440 transitions. [2019-12-07 10:10:11,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:10:11,126 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:11,126 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:11,126 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:11,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:11,127 INFO L82 PathProgramCache]: Analyzing trace with hash 72566767, now seen corresponding path program 1 times [2019-12-07 10:10:11,127 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:11,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913946787] [2019-12-07 10:10:11,127 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:11,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:11,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:11,156 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913946787] [2019-12-07 10:10:11,157 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:11,157 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:10:11,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2013512335] [2019-12-07 10:10:11,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:10:11,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:11,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:10:11,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:11,158 INFO L87 Difference]: Start difference. First operand 226875 states and 946440 transitions. Second operand 3 states. [2019-12-07 10:10:12,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:12,563 INFO L93 Difference]: Finished difference Result 226875 states and 937018 transitions. [2019-12-07 10:10:12,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:10:12,563 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 10:10:12,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:13,182 INFO L225 Difference]: With dead ends: 226875 [2019-12-07 10:10:13,182 INFO L226 Difference]: Without dead ends: 226875 [2019-12-07 10:10:13,182 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:19,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226875 states. [2019-12-07 10:10:22,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226875 to 223441. [2019-12-07 10:10:22,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223441 states. [2019-12-07 10:10:22,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223441 states to 223441 states and 924276 transitions. [2019-12-07 10:10:22,958 INFO L78 Accepts]: Start accepts. Automaton has 223441 states and 924276 transitions. Word has length 19 [2019-12-07 10:10:22,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:22,958 INFO L462 AbstractCegarLoop]: Abstraction has 223441 states and 924276 transitions. [2019-12-07 10:10:22,958 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:10:22,958 INFO L276 IsEmpty]: Start isEmpty. Operand 223441 states and 924276 transitions. [2019-12-07 10:10:22,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:10:22,970 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:22,970 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:22,970 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:22,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:22,971 INFO L82 PathProgramCache]: Analyzing trace with hash 793088017, now seen corresponding path program 1 times [2019-12-07 10:10:22,971 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:22,971 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705001925] [2019-12-07 10:10:22,971 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:22,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:23,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:23,018 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705001925] [2019-12-07 10:10:23,018 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:23,018 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:10:23,018 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951369428] [2019-12-07 10:10:23,018 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:10:23,019 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:23,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:10:23,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:10:23,019 INFO L87 Difference]: Start difference. First operand 223441 states and 924276 transitions. Second operand 5 states. [2019-12-07 10:10:25,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:25,222 INFO L93 Difference]: Finished difference Result 326541 states and 1318597 transitions. [2019-12-07 10:10:25,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:10:25,223 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 10:10:25,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:26,035 INFO L225 Difference]: With dead ends: 326541 [2019-12-07 10:10:26,036 INFO L226 Difference]: Without dead ends: 326359 [2019-12-07 10:10:26,036 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:10:35,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326359 states. [2019-12-07 10:10:39,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326359 to 238430. [2019-12-07 10:10:39,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238430 states. [2019-12-07 10:10:40,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238430 states to 238430 states and 983122 transitions. [2019-12-07 10:10:40,526 INFO L78 Accepts]: Start accepts. Automaton has 238430 states and 983122 transitions. Word has length 19 [2019-12-07 10:10:40,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:40,526 INFO L462 AbstractCegarLoop]: Abstraction has 238430 states and 983122 transitions. [2019-12-07 10:10:40,526 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:10:40,526 INFO L276 IsEmpty]: Start isEmpty. Operand 238430 states and 983122 transitions. [2019-12-07 10:10:40,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:10:40,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:40,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:40,539 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:40,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:40,539 INFO L82 PathProgramCache]: Analyzing trace with hash -1014655917, now seen corresponding path program 1 times [2019-12-07 10:10:40,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:40,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970334742] [2019-12-07 10:10:40,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:40,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:40,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:40,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970334742] [2019-12-07 10:10:40,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:40,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:10:40,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026624757] [2019-12-07 10:10:40,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:10:40,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:40,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:10:40,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:40,565 INFO L87 Difference]: Start difference. First operand 238430 states and 983122 transitions. Second operand 3 states. [2019-12-07 10:10:41,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:41,588 INFO L93 Difference]: Finished difference Result 236869 states and 976584 transitions. [2019-12-07 10:10:41,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:10:41,589 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 10:10:41,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:42,222 INFO L225 Difference]: With dead ends: 236869 [2019-12-07 10:10:42,222 INFO L226 Difference]: Without dead ends: 236869 [2019-12-07 10:10:42,223 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:49,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236869 states. [2019-12-07 10:10:51,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236869 to 236869. [2019-12-07 10:10:51,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236869 states. [2019-12-07 10:10:52,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236869 states to 236869 states and 976584 transitions. [2019-12-07 10:10:52,939 INFO L78 Accepts]: Start accepts. Automaton has 236869 states and 976584 transitions. Word has length 19 [2019-12-07 10:10:52,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:52,939 INFO L462 AbstractCegarLoop]: Abstraction has 236869 states and 976584 transitions. [2019-12-07 10:10:52,939 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:10:52,939 INFO L276 IsEmpty]: Start isEmpty. Operand 236869 states and 976584 transitions. [2019-12-07 10:10:52,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 10:10:52,957 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:52,957 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:52,957 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:52,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:52,957 INFO L82 PathProgramCache]: Analyzing trace with hash -1109806255, now seen corresponding path program 1 times [2019-12-07 10:10:52,957 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:52,958 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718954934] [2019-12-07 10:10:52,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:52,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:52,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:52,978 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718954934] [2019-12-07 10:10:52,978 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:52,978 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:10:52,978 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76983177] [2019-12-07 10:10:52,979 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:10:52,979 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:52,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:10:52,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:52,979 INFO L87 Difference]: Start difference. First operand 236869 states and 976584 transitions. Second operand 3 states. [2019-12-07 10:10:53,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:53,116 INFO L93 Difference]: Finished difference Result 47306 states and 153879 transitions. [2019-12-07 10:10:53,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:10:53,116 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 10:10:53,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:53,187 INFO L225 Difference]: With dead ends: 47306 [2019-12-07 10:10:53,187 INFO L226 Difference]: Without dead ends: 47306 [2019-12-07 10:10:53,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:53,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47306 states. [2019-12-07 10:10:53,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47306 to 47306. [2019-12-07 10:10:53,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47306 states. [2019-12-07 10:10:53,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47306 states to 47306 states and 153879 transitions. [2019-12-07 10:10:53,946 INFO L78 Accepts]: Start accepts. Automaton has 47306 states and 153879 transitions. Word has length 20 [2019-12-07 10:10:53,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:53,946 INFO L462 AbstractCegarLoop]: Abstraction has 47306 states and 153879 transitions. [2019-12-07 10:10:53,946 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:10:53,946 INFO L276 IsEmpty]: Start isEmpty. Operand 47306 states and 153879 transitions. [2019-12-07 10:10:53,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:10:53,951 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:53,951 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:53,951 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:53,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:53,952 INFO L82 PathProgramCache]: Analyzing trace with hash -390431288, now seen corresponding path program 1 times [2019-12-07 10:10:53,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:53,952 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204878796] [2019-12-07 10:10:53,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:53,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:53,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:53,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204878796] [2019-12-07 10:10:53,993 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:53,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:10:53,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1773531055] [2019-12-07 10:10:53,993 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:10:53,993 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:53,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:10:53,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:10:53,994 INFO L87 Difference]: Start difference. First operand 47306 states and 153879 transitions. Second operand 5 states. [2019-12-07 10:10:54,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:54,408 INFO L93 Difference]: Finished difference Result 63732 states and 202340 transitions. [2019-12-07 10:10:54,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:10:54,409 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:10:54,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:54,501 INFO L225 Difference]: With dead ends: 63732 [2019-12-07 10:10:54,501 INFO L226 Difference]: Without dead ends: 63718 [2019-12-07 10:10:54,502 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:10:54,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63718 states. [2019-12-07 10:10:56,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63718 to 50153. [2019-12-07 10:10:56,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50153 states. [2019-12-07 10:10:56,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50153 states to 50153 states and 162547 transitions. [2019-12-07 10:10:56,388 INFO L78 Accepts]: Start accepts. Automaton has 50153 states and 162547 transitions. Word has length 22 [2019-12-07 10:10:56,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:56,388 INFO L462 AbstractCegarLoop]: Abstraction has 50153 states and 162547 transitions. [2019-12-07 10:10:56,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:10:56,388 INFO L276 IsEmpty]: Start isEmpty. Operand 50153 states and 162547 transitions. [2019-12-07 10:10:56,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:10:56,394 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:56,394 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:56,395 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:56,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:56,395 INFO L82 PathProgramCache]: Analyzing trace with hash 2088873634, now seen corresponding path program 1 times [2019-12-07 10:10:56,395 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:56,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025695754] [2019-12-07 10:10:56,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:56,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:56,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:56,437 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025695754] [2019-12-07 10:10:56,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:56,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:10:56,438 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019452111] [2019-12-07 10:10:56,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:10:56,438 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:56,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:10:56,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:10:56,438 INFO L87 Difference]: Start difference. First operand 50153 states and 162547 transitions. Second operand 5 states. [2019-12-07 10:10:56,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:56,868 INFO L93 Difference]: Finished difference Result 65772 states and 209381 transitions. [2019-12-07 10:10:56,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:10:56,869 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:10:56,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:56,966 INFO L225 Difference]: With dead ends: 65772 [2019-12-07 10:10:56,966 INFO L226 Difference]: Without dead ends: 65758 [2019-12-07 10:10:56,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:10:57,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65758 states. [2019-12-07 10:10:57,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65758 to 48781. [2019-12-07 10:10:57,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48781 states. [2019-12-07 10:10:57,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48781 states to 48781 states and 158351 transitions. [2019-12-07 10:10:57,860 INFO L78 Accepts]: Start accepts. Automaton has 48781 states and 158351 transitions. Word has length 22 [2019-12-07 10:10:57,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:57,861 INFO L462 AbstractCegarLoop]: Abstraction has 48781 states and 158351 transitions. [2019-12-07 10:10:57,861 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:10:57,861 INFO L276 IsEmpty]: Start isEmpty. Operand 48781 states and 158351 transitions. [2019-12-07 10:10:57,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:10:57,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:57,871 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:57,872 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:57,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:57,872 INFO L82 PathProgramCache]: Analyzing trace with hash 967503752, now seen corresponding path program 1 times [2019-12-07 10:10:57,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:57,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [59140285] [2019-12-07 10:10:57,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:57,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:57,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:57,893 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [59140285] [2019-12-07 10:10:57,893 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:57,893 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:10:57,893 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1693632649] [2019-12-07 10:10:57,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:10:57,894 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:57,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:10:57,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:57,894 INFO L87 Difference]: Start difference. First operand 48781 states and 158351 transitions. Second operand 3 states. [2019-12-07 10:10:58,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:58,077 INFO L93 Difference]: Finished difference Result 62590 states and 194296 transitions. [2019-12-07 10:10:58,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:10:58,078 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 10:10:58,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:58,161 INFO L225 Difference]: With dead ends: 62590 [2019-12-07 10:10:58,161 INFO L226 Difference]: Without dead ends: 62590 [2019-12-07 10:10:58,161 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:58,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62590 states. [2019-12-07 10:10:59,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62590 to 48305. [2019-12-07 10:10:59,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48305 states. [2019-12-07 10:10:59,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48305 states to 48305 states and 149984 transitions. [2019-12-07 10:10:59,136 INFO L78 Accepts]: Start accepts. Automaton has 48305 states and 149984 transitions. Word has length 27 [2019-12-07 10:10:59,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:59,137 INFO L462 AbstractCegarLoop]: Abstraction has 48305 states and 149984 transitions. [2019-12-07 10:10:59,137 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:10:59,137 INFO L276 IsEmpty]: Start isEmpty. Operand 48305 states and 149984 transitions. [2019-12-07 10:10:59,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:10:59,145 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:59,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:59,145 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:59,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:59,146 INFO L82 PathProgramCache]: Analyzing trace with hash 196927527, now seen corresponding path program 1 times [2019-12-07 10:10:59,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:59,146 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1926996634] [2019-12-07 10:10:59,146 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:59,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:59,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:59,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1926996634] [2019-12-07 10:10:59,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:59,183 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:10:59,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1595691340] [2019-12-07 10:10:59,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:10:59,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:59,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:10:59,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:10:59,184 INFO L87 Difference]: Start difference. First operand 48305 states and 149984 transitions. Second operand 5 states. [2019-12-07 10:10:59,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:59,496 INFO L93 Difference]: Finished difference Result 59318 states and 182383 transitions. [2019-12-07 10:10:59,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:10:59,496 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 10:10:59,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:59,578 INFO L225 Difference]: With dead ends: 59318 [2019-12-07 10:10:59,578 INFO L226 Difference]: Without dead ends: 59276 [2019-12-07 10:10:59,579 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:10:59,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59276 states. [2019-12-07 10:11:00,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59276 to 50441. [2019-12-07 10:11:00,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50441 states. [2019-12-07 10:11:00,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50441 states to 50441 states and 156499 transitions. [2019-12-07 10:11:00,452 INFO L78 Accepts]: Start accepts. Automaton has 50441 states and 156499 transitions. Word has length 27 [2019-12-07 10:11:00,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:00,453 INFO L462 AbstractCegarLoop]: Abstraction has 50441 states and 156499 transitions. [2019-12-07 10:11:00,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:11:00,453 INFO L276 IsEmpty]: Start isEmpty. Operand 50441 states and 156499 transitions. [2019-12-07 10:11:00,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 10:11:00,465 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:00,465 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:00,465 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:00,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:00,466 INFO L82 PathProgramCache]: Analyzing trace with hash -1188103809, now seen corresponding path program 1 times [2019-12-07 10:11:00,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:00,466 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530694351] [2019-12-07 10:11:00,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:00,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:00,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:00,502 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [530694351] [2019-12-07 10:11:00,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:00,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:11:00,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504526313] [2019-12-07 10:11:00,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:11:00,503 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:00,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:11:00,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:11:00,503 INFO L87 Difference]: Start difference. First operand 50441 states and 156499 transitions. Second operand 5 states. [2019-12-07 10:11:00,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:00,846 INFO L93 Difference]: Finished difference Result 61171 states and 187912 transitions. [2019-12-07 10:11:00,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:11:00,847 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 10:11:00,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:00,931 INFO L225 Difference]: With dead ends: 61171 [2019-12-07 10:11:00,931 INFO L226 Difference]: Without dead ends: 61127 [2019-12-07 10:11:00,932 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:11:01,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61127 states. [2019-12-07 10:11:01,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61127 to 50255. [2019-12-07 10:11:01,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50255 states. [2019-12-07 10:11:01,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50255 states to 50255 states and 155837 transitions. [2019-12-07 10:11:01,870 INFO L78 Accepts]: Start accepts. Automaton has 50255 states and 155837 transitions. Word has length 28 [2019-12-07 10:11:01,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:01,871 INFO L462 AbstractCegarLoop]: Abstraction has 50255 states and 155837 transitions. [2019-12-07 10:11:01,871 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:11:01,871 INFO L276 IsEmpty]: Start isEmpty. Operand 50255 states and 155837 transitions. [2019-12-07 10:11:01,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 10:11:01,886 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:01,887 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:01,887 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:01,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:01,887 INFO L82 PathProgramCache]: Analyzing trace with hash 623425171, now seen corresponding path program 1 times [2019-12-07 10:11:01,887 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:01,887 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565442566] [2019-12-07 10:11:01,887 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:01,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:01,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:01,916 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1565442566] [2019-12-07 10:11:01,916 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:01,916 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:11:01,917 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1234335597] [2019-12-07 10:11:01,917 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:11:01,917 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:01,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:11:01,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:11:01,918 INFO L87 Difference]: Start difference. First operand 50255 states and 155837 transitions. Second operand 4 states. [2019-12-07 10:11:01,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:01,982 INFO L93 Difference]: Finished difference Result 19537 states and 57983 transitions. [2019-12-07 10:11:01,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:11:01,982 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 10:11:01,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:02,003 INFO L225 Difference]: With dead ends: 19537 [2019-12-07 10:11:02,003 INFO L226 Difference]: Without dead ends: 19537 [2019-12-07 10:11:02,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:11:02,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19537 states. [2019-12-07 10:11:02,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19537 to 18347. [2019-12-07 10:11:02,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18347 states. [2019-12-07 10:11:02,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18347 states to 18347 states and 54527 transitions. [2019-12-07 10:11:02,263 INFO L78 Accepts]: Start accepts. Automaton has 18347 states and 54527 transitions. Word has length 31 [2019-12-07 10:11:02,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:02,264 INFO L462 AbstractCegarLoop]: Abstraction has 18347 states and 54527 transitions. [2019-12-07 10:11:02,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:11:02,264 INFO L276 IsEmpty]: Start isEmpty. Operand 18347 states and 54527 transitions. [2019-12-07 10:11:02,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 10:11:02,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:02,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:02,276 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:02,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:02,276 INFO L82 PathProgramCache]: Analyzing trace with hash 1042720045, now seen corresponding path program 1 times [2019-12-07 10:11:02,276 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:02,276 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310359776] [2019-12-07 10:11:02,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:02,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:02,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:02,312 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310359776] [2019-12-07 10:11:02,312 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:02,313 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:11:02,313 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653355733] [2019-12-07 10:11:02,313 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:11:02,313 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:02,313 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:11:02,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:11:02,313 INFO L87 Difference]: Start difference. First operand 18347 states and 54527 transitions. Second operand 6 states. [2019-12-07 10:11:02,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:02,710 INFO L93 Difference]: Finished difference Result 23133 states and 67936 transitions. [2019-12-07 10:11:02,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:11:02,710 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 10:11:02,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:02,733 INFO L225 Difference]: With dead ends: 23133 [2019-12-07 10:11:02,733 INFO L226 Difference]: Without dead ends: 23133 [2019-12-07 10:11:02,733 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:11:02,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23133 states. [2019-12-07 10:11:02,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23133 to 18515. [2019-12-07 10:11:02,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18515 states. [2019-12-07 10:11:03,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18515 states to 18515 states and 55057 transitions. [2019-12-07 10:11:03,019 INFO L78 Accepts]: Start accepts. Automaton has 18515 states and 55057 transitions. Word has length 33 [2019-12-07 10:11:03,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:03,019 INFO L462 AbstractCegarLoop]: Abstraction has 18515 states and 55057 transitions. [2019-12-07 10:11:03,019 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:11:03,019 INFO L276 IsEmpty]: Start isEmpty. Operand 18515 states and 55057 transitions. [2019-12-07 10:11:03,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 10:11:03,031 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:03,031 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:03,031 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:03,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:03,031 INFO L82 PathProgramCache]: Analyzing trace with hash -738339527, now seen corresponding path program 1 times [2019-12-07 10:11:03,031 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:03,031 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1442814023] [2019-12-07 10:11:03,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:03,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:03,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:03,078 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1442814023] [2019-12-07 10:11:03,078 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:03,078 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:11:03,078 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694944713] [2019-12-07 10:11:03,079 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:11:03,079 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:03,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:11:03,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:11:03,079 INFO L87 Difference]: Start difference. First operand 18515 states and 55057 transitions. Second operand 6 states. [2019-12-07 10:11:03,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:03,489 INFO L93 Difference]: Finished difference Result 22604 states and 66411 transitions. [2019-12-07 10:11:03,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:11:03,489 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 10:11:03,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:03,512 INFO L225 Difference]: With dead ends: 22604 [2019-12-07 10:11:03,512 INFO L226 Difference]: Without dead ends: 22604 [2019-12-07 10:11:03,512 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:11:03,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22604 states. [2019-12-07 10:11:03,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22604 to 17798. [2019-12-07 10:11:03,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17798 states. [2019-12-07 10:11:03,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17798 states to 17798 states and 52944 transitions. [2019-12-07 10:11:03,807 INFO L78 Accepts]: Start accepts. Automaton has 17798 states and 52944 transitions. Word has length 34 [2019-12-07 10:11:03,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:03,807 INFO L462 AbstractCegarLoop]: Abstraction has 17798 states and 52944 transitions. [2019-12-07 10:11:03,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:11:03,807 INFO L276 IsEmpty]: Start isEmpty. Operand 17798 states and 52944 transitions. [2019-12-07 10:11:03,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 10:11:03,820 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:03,820 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:03,820 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:03,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:03,821 INFO L82 PathProgramCache]: Analyzing trace with hash -935567252, now seen corresponding path program 1 times [2019-12-07 10:11:03,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:03,821 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043292600] [2019-12-07 10:11:03,821 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:03,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:03,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:03,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043292600] [2019-12-07 10:11:03,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:03,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:11:03,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526483245] [2019-12-07 10:11:03,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:11:03,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:03,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:11:03,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:03,852 INFO L87 Difference]: Start difference. First operand 17798 states and 52944 transitions. Second operand 3 states. [2019-12-07 10:11:03,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:03,899 INFO L93 Difference]: Finished difference Result 17798 states and 52256 transitions. [2019-12-07 10:11:03,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:11:03,900 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 10:11:03,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:03,918 INFO L225 Difference]: With dead ends: 17798 [2019-12-07 10:11:03,918 INFO L226 Difference]: Without dead ends: 17798 [2019-12-07 10:11:03,918 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:03,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17798 states. [2019-12-07 10:11:04,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17798 to 17524. [2019-12-07 10:11:04,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17524 states. [2019-12-07 10:11:04,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17524 states to 17524 states and 51488 transitions. [2019-12-07 10:11:04,156 INFO L78 Accepts]: Start accepts. Automaton has 17524 states and 51488 transitions. Word has length 41 [2019-12-07 10:11:04,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:04,156 INFO L462 AbstractCegarLoop]: Abstraction has 17524 states and 51488 transitions. [2019-12-07 10:11:04,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:11:04,156 INFO L276 IsEmpty]: Start isEmpty. Operand 17524 states and 51488 transitions. [2019-12-07 10:11:04,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 10:11:04,168 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:04,168 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:04,168 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:04,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:04,169 INFO L82 PathProgramCache]: Analyzing trace with hash 936590377, now seen corresponding path program 1 times [2019-12-07 10:11:04,169 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:04,169 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1817395012] [2019-12-07 10:11:04,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:04,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:04,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:04,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1817395012] [2019-12-07 10:11:04,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:04,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:11:04,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723818034] [2019-12-07 10:11:04,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:11:04,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:04,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:11:04,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:11:04,207 INFO L87 Difference]: Start difference. First operand 17524 states and 51488 transitions. Second operand 5 states. [2019-12-07 10:11:04,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:04,256 INFO L93 Difference]: Finished difference Result 16109 states and 48466 transitions. [2019-12-07 10:11:04,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:11:04,257 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 10:11:04,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:04,273 INFO L225 Difference]: With dead ends: 16109 [2019-12-07 10:11:04,273 INFO L226 Difference]: Without dead ends: 16109 [2019-12-07 10:11:04,274 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:11:04,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16109 states. [2019-12-07 10:11:04,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16109 to 14604. [2019-12-07 10:11:04,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14604 states. [2019-12-07 10:11:04,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14604 states to 14604 states and 44151 transitions. [2019-12-07 10:11:04,493 INFO L78 Accepts]: Start accepts. Automaton has 14604 states and 44151 transitions. Word has length 42 [2019-12-07 10:11:04,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:04,493 INFO L462 AbstractCegarLoop]: Abstraction has 14604 states and 44151 transitions. [2019-12-07 10:11:04,493 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:11:04,493 INFO L276 IsEmpty]: Start isEmpty. Operand 14604 states and 44151 transitions. [2019-12-07 10:11:04,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:11:04,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:04,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:04,505 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:04,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:04,505 INFO L82 PathProgramCache]: Analyzing trace with hash 1653836464, now seen corresponding path program 1 times [2019-12-07 10:11:04,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:04,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133814335] [2019-12-07 10:11:04,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:04,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:04,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:04,543 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133814335] [2019-12-07 10:11:04,543 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:04,543 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:11:04,544 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [945765313] [2019-12-07 10:11:04,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:11:04,544 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:04,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:11:04,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:04,544 INFO L87 Difference]: Start difference. First operand 14604 states and 44151 transitions. Second operand 3 states. [2019-12-07 10:11:04,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:04,626 INFO L93 Difference]: Finished difference Result 17473 states and 52902 transitions. [2019-12-07 10:11:04,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:11:04,626 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 10:11:04,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:04,644 INFO L225 Difference]: With dead ends: 17473 [2019-12-07 10:11:04,645 INFO L226 Difference]: Without dead ends: 17473 [2019-12-07 10:11:04,645 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:04,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17473 states. [2019-12-07 10:11:04,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17473 to 13664. [2019-12-07 10:11:04,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13664 states. [2019-12-07 10:11:04,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13664 states to 13664 states and 41709 transitions. [2019-12-07 10:11:04,868 INFO L78 Accepts]: Start accepts. Automaton has 13664 states and 41709 transitions. Word has length 66 [2019-12-07 10:11:04,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:04,868 INFO L462 AbstractCegarLoop]: Abstraction has 13664 states and 41709 transitions. [2019-12-07 10:11:04,868 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:11:04,868 INFO L276 IsEmpty]: Start isEmpty. Operand 13664 states and 41709 transitions. [2019-12-07 10:11:04,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:04,880 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:04,880 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:04,880 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:04,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:04,880 INFO L82 PathProgramCache]: Analyzing trace with hash 731097294, now seen corresponding path program 1 times [2019-12-07 10:11:04,880 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:04,881 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612572678] [2019-12-07 10:11:04,881 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:04,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:04,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:04,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612572678] [2019-12-07 10:11:04,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:04,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:11:04,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806218154] [2019-12-07 10:11:04,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:11:04,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:04,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:11:04,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:11:04,922 INFO L87 Difference]: Start difference. First operand 13664 states and 41709 transitions. Second operand 4 states. [2019-12-07 10:11:04,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:04,992 INFO L93 Difference]: Finished difference Result 13479 states and 40986 transitions. [2019-12-07 10:11:04,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:11:04,993 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 10:11:04,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:05,006 INFO L225 Difference]: With dead ends: 13479 [2019-12-07 10:11:05,006 INFO L226 Difference]: Without dead ends: 13479 [2019-12-07 10:11:05,007 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:11:05,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13479 states. [2019-12-07 10:11:05,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13479 to 12329. [2019-12-07 10:11:05,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12329 states. [2019-12-07 10:11:05,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12329 states to 12329 states and 37348 transitions. [2019-12-07 10:11:05,193 INFO L78 Accepts]: Start accepts. Automaton has 12329 states and 37348 transitions. Word has length 67 [2019-12-07 10:11:05,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:05,193 INFO L462 AbstractCegarLoop]: Abstraction has 12329 states and 37348 transitions. [2019-12-07 10:11:05,193 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:11:05,193 INFO L276 IsEmpty]: Start isEmpty. Operand 12329 states and 37348 transitions. [2019-12-07 10:11:05,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:05,203 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:05,203 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:05,203 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:05,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:05,204 INFO L82 PathProgramCache]: Analyzing trace with hash -543525966, now seen corresponding path program 1 times [2019-12-07 10:11:05,204 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:05,204 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403394955] [2019-12-07 10:11:05,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:05,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:05,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:05,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [403394955] [2019-12-07 10:11:05,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:05,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:11:05,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [527161165] [2019-12-07 10:11:05,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:11:05,362 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:05,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:11:05,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:11:05,363 INFO L87 Difference]: Start difference. First operand 12329 states and 37348 transitions. Second operand 10 states. [2019-12-07 10:11:06,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:06,252 INFO L93 Difference]: Finished difference Result 21886 states and 66232 transitions. [2019-12-07 10:11:06,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 10:11:06,253 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 10:11:06,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:06,282 INFO L225 Difference]: With dead ends: 21886 [2019-12-07 10:11:06,282 INFO L226 Difference]: Without dead ends: 16855 [2019-12-07 10:11:06,283 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=82, Invalid=338, Unknown=0, NotChecked=0, Total=420 [2019-12-07 10:11:06,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16855 states. [2019-12-07 10:11:06,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16855 to 14354. [2019-12-07 10:11:06,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14354 states. [2019-12-07 10:11:06,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14354 states to 14354 states and 43456 transitions. [2019-12-07 10:11:06,524 INFO L78 Accepts]: Start accepts. Automaton has 14354 states and 43456 transitions. Word has length 67 [2019-12-07 10:11:06,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:06,524 INFO L462 AbstractCegarLoop]: Abstraction has 14354 states and 43456 transitions. [2019-12-07 10:11:06,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:11:06,524 INFO L276 IsEmpty]: Start isEmpty. Operand 14354 states and 43456 transitions. [2019-12-07 10:11:06,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:06,536 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:06,536 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:06,536 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:06,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:06,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1737332378, now seen corresponding path program 2 times [2019-12-07 10:11:06,536 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:06,536 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800619919] [2019-12-07 10:11:06,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:06,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:06,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:06,687 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800619919] [2019-12-07 10:11:06,687 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:06,687 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:11:06,687 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [362551887] [2019-12-07 10:11:06,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:11:06,688 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:06,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:11:06,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:11:06,688 INFO L87 Difference]: Start difference. First operand 14354 states and 43456 transitions. Second operand 11 states. [2019-12-07 10:11:07,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:07,453 INFO L93 Difference]: Finished difference Result 20818 states and 62228 transitions. [2019-12-07 10:11:07,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 10:11:07,453 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 10:11:07,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:07,471 INFO L225 Difference]: With dead ends: 20818 [2019-12-07 10:11:07,471 INFO L226 Difference]: Without dead ends: 17107 [2019-12-07 10:11:07,471 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=94, Invalid=412, Unknown=0, NotChecked=0, Total=506 [2019-12-07 10:11:07,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17107 states. [2019-12-07 10:11:07,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17107 to 14678. [2019-12-07 10:11:07,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14678 states. [2019-12-07 10:11:07,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14678 states to 14678 states and 44292 transitions. [2019-12-07 10:11:07,703 INFO L78 Accepts]: Start accepts. Automaton has 14678 states and 44292 transitions. Word has length 67 [2019-12-07 10:11:07,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:07,703 INFO L462 AbstractCegarLoop]: Abstraction has 14678 states and 44292 transitions. [2019-12-07 10:11:07,703 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:11:07,703 INFO L276 IsEmpty]: Start isEmpty. Operand 14678 states and 44292 transitions. [2019-12-07 10:11:07,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:07,715 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:07,715 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:07,715 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:07,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:07,715 INFO L82 PathProgramCache]: Analyzing trace with hash 202288426, now seen corresponding path program 3 times [2019-12-07 10:11:07,715 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:07,715 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589597771] [2019-12-07 10:11:07,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:07,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:07,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:07,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589597771] [2019-12-07 10:11:07,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:07,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:11:07,834 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834221184] [2019-12-07 10:11:07,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:11:07,834 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:07,834 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:11:07,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:11:07,835 INFO L87 Difference]: Start difference. First operand 14678 states and 44292 transitions. Second operand 10 states. [2019-12-07 10:11:08,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:08,674 INFO L93 Difference]: Finished difference Result 22243 states and 66237 transitions. [2019-12-07 10:11:08,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 10:11:08,675 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 10:11:08,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:08,706 INFO L225 Difference]: With dead ends: 22243 [2019-12-07 10:11:08,706 INFO L226 Difference]: Without dead ends: 18918 [2019-12-07 10:11:08,706 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2019-12-07 10:11:08,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18918 states. [2019-12-07 10:11:08,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18918 to 15062. [2019-12-07 10:11:08,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15062 states. [2019-12-07 10:11:08,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15062 states to 15062 states and 45278 transitions. [2019-12-07 10:11:08,947 INFO L78 Accepts]: Start accepts. Automaton has 15062 states and 45278 transitions. Word has length 67 [2019-12-07 10:11:08,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:08,947 INFO L462 AbstractCegarLoop]: Abstraction has 15062 states and 45278 transitions. [2019-12-07 10:11:08,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:11:08,947 INFO L276 IsEmpty]: Start isEmpty. Operand 15062 states and 45278 transitions. [2019-12-07 10:11:08,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:08,959 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:08,959 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:08,959 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:08,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:08,959 INFO L82 PathProgramCache]: Analyzing trace with hash -917850962, now seen corresponding path program 4 times [2019-12-07 10:11:08,960 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:08,960 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433917850] [2019-12-07 10:11:08,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:08,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:09,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:09,091 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [433917850] [2019-12-07 10:11:09,091 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:09,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:11:09,091 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780582518] [2019-12-07 10:11:09,091 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:11:09,091 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:09,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:11:09,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:11:09,092 INFO L87 Difference]: Start difference. First operand 15062 states and 45278 transitions. Second operand 11 states. [2019-12-07 10:11:09,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:09,827 INFO L93 Difference]: Finished difference Result 20785 states and 61865 transitions. [2019-12-07 10:11:09,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 10:11:09,828 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 10:11:09,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:09,846 INFO L225 Difference]: With dead ends: 20785 [2019-12-07 10:11:09,847 INFO L226 Difference]: Without dead ends: 18174 [2019-12-07 10:11:09,847 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2019-12-07 10:11:09,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18174 states. [2019-12-07 10:11:10,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18174 to 14758. [2019-12-07 10:11:10,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14758 states. [2019-12-07 10:11:10,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14758 states to 14758 states and 44362 transitions. [2019-12-07 10:11:10,128 INFO L78 Accepts]: Start accepts. Automaton has 14758 states and 44362 transitions. Word has length 67 [2019-12-07 10:11:10,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:10,129 INFO L462 AbstractCegarLoop]: Abstraction has 14758 states and 44362 transitions. [2019-12-07 10:11:10,129 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:11:10,129 INFO L276 IsEmpty]: Start isEmpty. Operand 14758 states and 44362 transitions. [2019-12-07 10:11:10,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:10,139 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:10,139 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:10,139 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:10,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:10,140 INFO L82 PathProgramCache]: Analyzing trace with hash 668274002, now seen corresponding path program 5 times [2019-12-07 10:11:10,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:10,140 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663961138] [2019-12-07 10:11:10,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:10,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:10,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:10,275 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [663961138] [2019-12-07 10:11:10,275 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:10,275 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:11:10,275 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1453330393] [2019-12-07 10:11:10,275 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:11:10,275 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:10,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:11:10,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:11:10,276 INFO L87 Difference]: Start difference. First operand 14758 states and 44362 transitions. Second operand 11 states. [2019-12-07 10:11:11,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:11,424 INFO L93 Difference]: Finished difference Result 38181 states and 113801 transitions. [2019-12-07 10:11:11,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 10:11:11,424 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 10:11:11,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:11,454 INFO L225 Difference]: With dead ends: 38181 [2019-12-07 10:11:11,454 INFO L226 Difference]: Without dead ends: 27259 [2019-12-07 10:11:11,455 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=277, Invalid=1129, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 10:11:11,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27259 states. [2019-12-07 10:11:11,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27259 to 15108. [2019-12-07 10:11:11,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15108 states. [2019-12-07 10:11:11,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15108 states to 15108 states and 45144 transitions. [2019-12-07 10:11:11,751 INFO L78 Accepts]: Start accepts. Automaton has 15108 states and 45144 transitions. Word has length 67 [2019-12-07 10:11:11,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:11,751 INFO L462 AbstractCegarLoop]: Abstraction has 15108 states and 45144 transitions. [2019-12-07 10:11:11,751 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:11:11,751 INFO L276 IsEmpty]: Start isEmpty. Operand 15108 states and 45144 transitions. [2019-12-07 10:11:11,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:11,763 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:11,763 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:11,763 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:11,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:11,764 INFO L82 PathProgramCache]: Analyzing trace with hash -222673432, now seen corresponding path program 6 times [2019-12-07 10:11:11,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:11,764 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048771089] [2019-12-07 10:11:11,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:11,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:11,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:11,912 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048771089] [2019-12-07 10:11:11,912 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:11,912 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:11:11,912 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517264160] [2019-12-07 10:11:11,912 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:11:11,912 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:11,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:11:11,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:11:11,913 INFO L87 Difference]: Start difference. First operand 15108 states and 45144 transitions. Second operand 12 states. [2019-12-07 10:11:12,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:12,705 INFO L93 Difference]: Finished difference Result 31190 states and 91410 transitions. [2019-12-07 10:11:12,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 10:11:12,705 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 10:11:12,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:12,733 INFO L225 Difference]: With dead ends: 31190 [2019-12-07 10:11:12,733 INFO L226 Difference]: Without dead ends: 25724 [2019-12-07 10:11:12,734 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=259, Invalid=1147, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 10:11:12,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25724 states. [2019-12-07 10:11:12,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25724 to 14468. [2019-12-07 10:11:12,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14468 states. [2019-12-07 10:11:13,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14468 states to 14468 states and 43479 transitions. [2019-12-07 10:11:13,018 INFO L78 Accepts]: Start accepts. Automaton has 14468 states and 43479 transitions. Word has length 67 [2019-12-07 10:11:13,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:13,018 INFO L462 AbstractCegarLoop]: Abstraction has 14468 states and 43479 transitions. [2019-12-07 10:11:13,018 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:11:13,018 INFO L276 IsEmpty]: Start isEmpty. Operand 14468 states and 43479 transitions. [2019-12-07 10:11:13,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:13,030 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:13,030 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:13,030 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:13,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:13,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1210625396, now seen corresponding path program 7 times [2019-12-07 10:11:13,031 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:13,031 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816282328] [2019-12-07 10:11:13,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:13,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:11:13,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:11:13,106 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:11:13,106 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:11:13,108 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (= 0 v_~x~0_134) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t62~0.base_32|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t62~0.base_32| 4) |v_#length_23|) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= 0 |v_ULTIMATE.start_main_~#t62~0.offset_23|) (= v_~z$read_delayed~0_6 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t62~0.base_32|) 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t62~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t62~0.base_32|) |v_ULTIMATE.start_main_~#t62~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t62~0.base_32| 1) |v_#valid_70|) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t62~0.offset=|v_ULTIMATE.start_main_~#t62~0.offset_23|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t64~0.base=|v_ULTIMATE.start_main_~#t64~0.base_16|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ULTIMATE.start_main_~#t63~0.base=|v_ULTIMATE.start_main_~#t63~0.base_29|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ~y~0=v_~y~0_24, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ULTIMATE.start_main_~#t64~0.offset=|v_ULTIMATE.start_main_~#t64~0.offset_14|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t63~0.offset=|v_ULTIMATE.start_main_~#t63~0.offset_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ULTIMATE.start_main_~#t62~0.base=|v_ULTIMATE.start_main_~#t62~0.base_32|, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t62~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t64~0.base, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t63~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t64~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t63~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t62~0.base, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:11:13,109 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246 0)) (= ~x~0_In2029572246 ~__unbuffered_p0_EAX~0_Out2029572246) (= ~z$r_buff0_thd1~0_In2029572246 ~z$r_buff1_thd1~0_Out2029572246) (= ~z$r_buff1_thd0~0_Out2029572246 ~z$r_buff0_thd0~0_In2029572246) (= ~z$r_buff1_thd3~0_Out2029572246 ~z$r_buff0_thd3~0_In2029572246) (= ~z$r_buff0_thd1~0_Out2029572246 1) (= ~z$r_buff1_thd2~0_Out2029572246 ~z$r_buff0_thd2~0_In2029572246)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2029572246, ~x~0=~x~0_In2029572246, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2029572246} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out2029572246, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2029572246, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out2029572246, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out2029572246, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out2029572246, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2029572246, ~x~0=~x~0_In2029572246, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2029572246} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:11:13,109 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t63~0.offset_10|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t63~0.base_11|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t63~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t63~0.base_11|) |v_ULTIMATE.start_main_~#t63~0.offset_10| 1)) |v_#memory_int_15|) (= (store |v_#valid_40| |v_ULTIMATE.start_main_~#t63~0.base_11| 1) |v_#valid_39|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t63~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t63~0.base_11|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t63~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t63~0.base=|v_ULTIMATE.start_main_~#t63~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t63~0.offset=|v_ULTIMATE.start_main_~#t63~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t63~0.base, ULTIMATE.start_main_~#t63~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:11:13,111 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| |P1Thread1of1ForFork2_#t~ite10_Out1138404549|)) (.cse2 (= (mod ~z$w_buff1_used~0_In1138404549 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1138404549 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| ~z~0_In1138404549) .cse0 (or .cse1 .cse2)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| ~z$w_buff1~0_In1138404549) .cse0 (not .cse2) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1138404549, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1138404549, ~z$w_buff1~0=~z$w_buff1~0_In1138404549, ~z~0=~z~0_In1138404549} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1138404549|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1138404549, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1138404549|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1138404549, ~z$w_buff1~0=~z$w_buff1~0_In1138404549, ~z~0=~z~0_In1138404549} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 10:11:13,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1998633825 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1998633825 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1998633825 |P1Thread1of1ForFork2_#t~ite11_Out-1998633825|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1998633825|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998633825, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1998633825} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998633825, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1998633825|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1998633825} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:11:13,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t64~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t64~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t64~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t64~0.base_11|) |v_ULTIMATE.start_main_~#t64~0.offset_10| 2)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t64~0.base_11| 0)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t64~0.base_11|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t64~0.base_11|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t64~0.base_11| 1) |v_#valid_31|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t64~0.base=|v_ULTIMATE.start_main_~#t64~0.base_11|, ULTIMATE.start_main_~#t64~0.offset=|v_ULTIMATE.start_main_~#t64~0.offset_10|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t64~0.base, ULTIMATE.start_main_~#t64~0.offset, #length] because there is no mapped edge [2019-12-07 10:11:13,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1951686915 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1951686915 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out1951686915| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1951686915 |P0Thread1of1ForFork1_#t~ite5_Out1951686915|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1951686915} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1951686915|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1951686915} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:11:13,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1721577792 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-1721577792 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1721577792 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1721577792 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1721577792| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite6_Out-1721577792| ~z$w_buff1_used~0_In-1721577792)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1721577792, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1721577792, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1721577792, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1721577792} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1721577792, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1721577792|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1721577792, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1721577792, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1721577792} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:11:13,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-802465787 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-802465787 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In-802465787 ~z$r_buff0_thd1~0_Out-802465787))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out-802465787) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-802465787} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-802465787|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-802465787} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:11:13,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-634165196 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-634165196 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-634165196 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-634165196 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-634165196| ~z$r_buff1_thd1~0_In-634165196) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-634165196|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-634165196, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-634165196, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-634165196, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-634165196} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-634165196|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-634165196, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-634165196, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-634165196, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-634165196} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:11:13,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:11:13,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1368216591 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1368216591 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In1368216591 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1368216591 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1368216591|)) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1368216591 |P1Thread1of1ForFork2_#t~ite12_Out1368216591|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1368216591} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1368216591|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1368216591} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:11:13,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1573265270 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1573265270 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In1573265270 |P1Thread1of1ForFork2_#t~ite13_Out1573265270|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1573265270|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1573265270, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1573265270} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1573265270, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1573265270|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1573265270} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:11:13,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-361323778 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-361323778 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-361323778 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-361323778 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-361323778| ~z$r_buff1_thd2~0_In-361323778) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite14_Out-361323778| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-361323778, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-361323778, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-361323778, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-361323778, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-361323778|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:11:13,116 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:11:13,117 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In541248209 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_In541248209| |P2Thread1of1ForFork0_#t~ite29_Out541248209|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite30_Out541248209| ~z$w_buff1_used~0_In541248209)) (and (= |P2Thread1of1ForFork0_#t~ite29_Out541248209| |P2Thread1of1ForFork0_#t~ite30_Out541248209|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In541248209 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In541248209 256)) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In541248209 256) 0)) (and .cse1 (= (mod ~z$w_buff1_used~0_In541248209 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite29_Out541248209| ~z$w_buff1_used~0_In541248209) .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In541248209, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In541248209, ~z$w_buff1_used~0=~z$w_buff1_used~0_In541248209, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In541248209, ~weak$$choice2~0=~weak$$choice2~0_In541248209, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In541248209|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In541248209, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In541248209, ~z$w_buff1_used~0=~z$w_buff1_used~0_In541248209, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In541248209, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out541248209|, ~weak$$choice2~0=~weak$$choice2~0_In541248209, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out541248209|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 10:11:13,118 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 10:11:13,119 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:11:13,119 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In1899950079 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1899950079 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1899950079| ~z$w_buff1~0_In1899950079) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1899950079| ~z~0_In1899950079) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1899950079, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1899950079, ~z$w_buff1~0=~z$w_buff1~0_In1899950079, ~z~0=~z~0_In1899950079} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1899950079|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1899950079, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1899950079, ~z$w_buff1~0=~z$w_buff1~0_In1899950079, ~z~0=~z~0_In1899950079} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 10:11:13,119 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 10:11:13,119 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-149696817 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-149696817 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-149696817| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-149696817 |P2Thread1of1ForFork0_#t~ite40_Out-149696817|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-149696817, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-149696817} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-149696817, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-149696817|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-149696817} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 10:11:13,120 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1350969871 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1350969871 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-1350969871 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1350969871 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1350969871| ~z$w_buff1_used~0_In-1350969871) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1350969871| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1350969871, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1350969871, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1350969871, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1350969871} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1350969871, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1350969871, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1350969871, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1350969871, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1350969871|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 10:11:13,120 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-204629242 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-204629242 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-204629242|)) (and (= ~z$r_buff0_thd3~0_In-204629242 |P2Thread1of1ForFork0_#t~ite42_Out-204629242|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-204629242, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-204629242} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-204629242, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-204629242, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-204629242|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 10:11:13,120 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In43252447 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In43252447 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In43252447 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In43252447 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out43252447|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$r_buff1_thd3~0_In43252447 |P2Thread1of1ForFork0_#t~ite43_Out43252447|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In43252447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In43252447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In43252447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In43252447} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out43252447|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In43252447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In43252447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In43252447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In43252447} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 10:11:13,121 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:11:13,121 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:11:13,121 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out-1303595495| |ULTIMATE.start_main_#t~ite47_Out-1303595495|)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1303595495 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1303595495 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In-1303595495 |ULTIMATE.start_main_#t~ite47_Out-1303595495|) .cse1 (not .cse2)) (and (= ~z~0_In-1303595495 |ULTIMATE.start_main_#t~ite47_Out-1303595495|) .cse1 (or .cse0 .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1303595495, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1303595495, ~z$w_buff1~0=~z$w_buff1~0_In-1303595495, ~z~0=~z~0_In-1303595495} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1303595495, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1303595495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1303595495, ~z$w_buff1~0=~z$w_buff1~0_In-1303595495, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1303595495|, ~z~0=~z~0_In-1303595495} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:11:13,121 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1504730334 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1504730334 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1504730334| ~z$w_buff0_used~0_In-1504730334)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1504730334| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1504730334, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1504730334} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1504730334, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1504730334, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1504730334|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:11:13,122 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-648599100 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-648599100 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-648599100 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-648599100 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-648599100 |ULTIMATE.start_main_#t~ite50_Out-648599100|)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-648599100|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-648599100, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-648599100, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-648599100|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-648599100, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-648599100, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:11:13,122 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1156825025 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1156825025 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1156825025 |ULTIMATE.start_main_#t~ite51_Out-1156825025|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-1156825025| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156825025, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156825025} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156825025, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1156825025|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156825025} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:11:13,123 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In194091227 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In194091227 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In194091227 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In194091227 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out194091227|)) (and (= ~z$r_buff1_thd0~0_In194091227 |ULTIMATE.start_main_#t~ite52_Out194091227|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In194091227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In194091227} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out194091227|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In194091227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In194091227} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:11:13,123 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:11:13,189 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:11:13 BasicIcfg [2019-12-07 10:11:13,189 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:11:13,190 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:11:13,190 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:11:13,190 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:11:13,191 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:08:07" (3/4) ... [2019-12-07 10:11:13,193 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:11:13,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (= 0 v_~x~0_134) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t62~0.base_32|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t62~0.base_32| 4) |v_#length_23|) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= 0 |v_ULTIMATE.start_main_~#t62~0.offset_23|) (= v_~z$read_delayed~0_6 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t62~0.base_32|) 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t62~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t62~0.base_32|) |v_ULTIMATE.start_main_~#t62~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t62~0.base_32| 1) |v_#valid_70|) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t62~0.offset=|v_ULTIMATE.start_main_~#t62~0.offset_23|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t64~0.base=|v_ULTIMATE.start_main_~#t64~0.base_16|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ULTIMATE.start_main_~#t63~0.base=|v_ULTIMATE.start_main_~#t63~0.base_29|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ~y~0=v_~y~0_24, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ULTIMATE.start_main_~#t64~0.offset=|v_ULTIMATE.start_main_~#t64~0.offset_14|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t63~0.offset=|v_ULTIMATE.start_main_~#t63~0.offset_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ULTIMATE.start_main_~#t62~0.base=|v_ULTIMATE.start_main_~#t62~0.base_32|, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t62~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t64~0.base, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t63~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t64~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t63~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t62~0.base, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:11:13,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246 0)) (= ~x~0_In2029572246 ~__unbuffered_p0_EAX~0_Out2029572246) (= ~z$r_buff0_thd1~0_In2029572246 ~z$r_buff1_thd1~0_Out2029572246) (= ~z$r_buff1_thd0~0_Out2029572246 ~z$r_buff0_thd0~0_In2029572246) (= ~z$r_buff1_thd3~0_Out2029572246 ~z$r_buff0_thd3~0_In2029572246) (= ~z$r_buff0_thd1~0_Out2029572246 1) (= ~z$r_buff1_thd2~0_Out2029572246 ~z$r_buff0_thd2~0_In2029572246)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2029572246, ~x~0=~x~0_In2029572246, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2029572246} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out2029572246, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2029572246, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out2029572246, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out2029572246, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out2029572246, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2029572246, ~x~0=~x~0_In2029572246, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2029572246} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:11:13,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t63~0.offset_10|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t63~0.base_11|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t63~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t63~0.base_11|) |v_ULTIMATE.start_main_~#t63~0.offset_10| 1)) |v_#memory_int_15|) (= (store |v_#valid_40| |v_ULTIMATE.start_main_~#t63~0.base_11| 1) |v_#valid_39|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t63~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t63~0.base_11|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t63~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t63~0.base=|v_ULTIMATE.start_main_~#t63~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t63~0.offset=|v_ULTIMATE.start_main_~#t63~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t63~0.base, ULTIMATE.start_main_~#t63~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:11:13,195 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| |P1Thread1of1ForFork2_#t~ite10_Out1138404549|)) (.cse2 (= (mod ~z$w_buff1_used~0_In1138404549 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1138404549 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| ~z~0_In1138404549) .cse0 (or .cse1 .cse2)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| ~z$w_buff1~0_In1138404549) .cse0 (not .cse2) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1138404549, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1138404549, ~z$w_buff1~0=~z$w_buff1~0_In1138404549, ~z~0=~z~0_In1138404549} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1138404549|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1138404549, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1138404549|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1138404549, ~z$w_buff1~0=~z$w_buff1~0_In1138404549, ~z~0=~z~0_In1138404549} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 10:11:13,195 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1998633825 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1998633825 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1998633825 |P1Thread1of1ForFork2_#t~ite11_Out-1998633825|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1998633825|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998633825, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1998633825} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998633825, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1998633825|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1998633825} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:11:13,196 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t64~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t64~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t64~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t64~0.base_11|) |v_ULTIMATE.start_main_~#t64~0.offset_10| 2)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t64~0.base_11| 0)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t64~0.base_11|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t64~0.base_11|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t64~0.base_11| 1) |v_#valid_31|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t64~0.base=|v_ULTIMATE.start_main_~#t64~0.base_11|, ULTIMATE.start_main_~#t64~0.offset=|v_ULTIMATE.start_main_~#t64~0.offset_10|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t64~0.base, ULTIMATE.start_main_~#t64~0.offset, #length] because there is no mapped edge [2019-12-07 10:11:13,197 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1951686915 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1951686915 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out1951686915| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1951686915 |P0Thread1of1ForFork1_#t~ite5_Out1951686915|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1951686915} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1951686915|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1951686915} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:11:13,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1721577792 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-1721577792 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1721577792 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1721577792 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1721577792| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite6_Out-1721577792| ~z$w_buff1_used~0_In-1721577792)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1721577792, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1721577792, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1721577792, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1721577792} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1721577792, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1721577792|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1721577792, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1721577792, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1721577792} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:11:13,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-802465787 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-802465787 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In-802465787 ~z$r_buff0_thd1~0_Out-802465787))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out-802465787) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-802465787} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-802465787|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-802465787} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:11:13,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-634165196 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-634165196 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-634165196 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-634165196 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-634165196| ~z$r_buff1_thd1~0_In-634165196) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-634165196|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-634165196, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-634165196, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-634165196, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-634165196} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-634165196|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-634165196, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-634165196, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-634165196, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-634165196} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:11:13,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:11:13,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1368216591 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1368216591 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In1368216591 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1368216591 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1368216591|)) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1368216591 |P1Thread1of1ForFork2_#t~ite12_Out1368216591|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1368216591} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1368216591|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1368216591} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:11:13,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1573265270 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1573265270 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In1573265270 |P1Thread1of1ForFork2_#t~ite13_Out1573265270|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1573265270|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1573265270, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1573265270} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1573265270, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1573265270|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1573265270} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:11:13,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-361323778 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-361323778 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-361323778 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-361323778 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-361323778| ~z$r_buff1_thd2~0_In-361323778) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite14_Out-361323778| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-361323778, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-361323778, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-361323778, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-361323778, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-361323778|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:11:13,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:11:13,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In541248209 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_In541248209| |P2Thread1of1ForFork0_#t~ite29_Out541248209|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite30_Out541248209| ~z$w_buff1_used~0_In541248209)) (and (= |P2Thread1of1ForFork0_#t~ite29_Out541248209| |P2Thread1of1ForFork0_#t~ite30_Out541248209|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In541248209 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In541248209 256)) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In541248209 256) 0)) (and .cse1 (= (mod ~z$w_buff1_used~0_In541248209 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite29_Out541248209| ~z$w_buff1_used~0_In541248209) .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In541248209, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In541248209, ~z$w_buff1_used~0=~z$w_buff1_used~0_In541248209, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In541248209, ~weak$$choice2~0=~weak$$choice2~0_In541248209, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In541248209|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In541248209, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In541248209, ~z$w_buff1_used~0=~z$w_buff1_used~0_In541248209, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In541248209, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out541248209|, ~weak$$choice2~0=~weak$$choice2~0_In541248209, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out541248209|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 10:11:13,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 10:11:13,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:11:13,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In1899950079 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1899950079 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1899950079| ~z$w_buff1~0_In1899950079) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1899950079| ~z~0_In1899950079) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1899950079, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1899950079, ~z$w_buff1~0=~z$w_buff1~0_In1899950079, ~z~0=~z~0_In1899950079} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1899950079|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1899950079, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1899950079, ~z$w_buff1~0=~z$w_buff1~0_In1899950079, ~z~0=~z~0_In1899950079} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 10:11:13,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 10:11:13,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-149696817 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-149696817 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-149696817| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-149696817 |P2Thread1of1ForFork0_#t~ite40_Out-149696817|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-149696817, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-149696817} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-149696817, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-149696817|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-149696817} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 10:11:13,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1350969871 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1350969871 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-1350969871 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1350969871 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1350969871| ~z$w_buff1_used~0_In-1350969871) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1350969871| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1350969871, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1350969871, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1350969871, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1350969871} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1350969871, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1350969871, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1350969871, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1350969871, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1350969871|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 10:11:13,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-204629242 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-204629242 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-204629242|)) (and (= ~z$r_buff0_thd3~0_In-204629242 |P2Thread1of1ForFork0_#t~ite42_Out-204629242|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-204629242, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-204629242} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-204629242, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-204629242, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-204629242|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 10:11:13,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In43252447 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In43252447 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In43252447 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In43252447 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out43252447|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$r_buff1_thd3~0_In43252447 |P2Thread1of1ForFork0_#t~ite43_Out43252447|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In43252447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In43252447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In43252447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In43252447} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out43252447|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In43252447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In43252447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In43252447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In43252447} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 10:11:13,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:11:13,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:11:13,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out-1303595495| |ULTIMATE.start_main_#t~ite47_Out-1303595495|)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1303595495 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1303595495 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In-1303595495 |ULTIMATE.start_main_#t~ite47_Out-1303595495|) .cse1 (not .cse2)) (and (= ~z~0_In-1303595495 |ULTIMATE.start_main_#t~ite47_Out-1303595495|) .cse1 (or .cse0 .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1303595495, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1303595495, ~z$w_buff1~0=~z$w_buff1~0_In-1303595495, ~z~0=~z~0_In-1303595495} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1303595495, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1303595495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1303595495, ~z$w_buff1~0=~z$w_buff1~0_In-1303595495, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1303595495|, ~z~0=~z~0_In-1303595495} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:11:13,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1504730334 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1504730334 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1504730334| ~z$w_buff0_used~0_In-1504730334)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1504730334| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1504730334, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1504730334} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1504730334, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1504730334, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1504730334|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:11:13,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-648599100 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-648599100 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-648599100 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-648599100 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-648599100 |ULTIMATE.start_main_#t~ite50_Out-648599100|)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-648599100|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-648599100, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-648599100, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-648599100|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-648599100, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-648599100, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:11:13,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1156825025 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1156825025 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1156825025 |ULTIMATE.start_main_#t~ite51_Out-1156825025|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-1156825025| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156825025, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156825025} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156825025, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1156825025|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156825025} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:11:13,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In194091227 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In194091227 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In194091227 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In194091227 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out194091227|)) (and (= ~z$r_buff1_thd0~0_In194091227 |ULTIMATE.start_main_#t~ite52_Out194091227|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In194091227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In194091227} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out194091227|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In194091227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In194091227} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:11:13,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:11:13,268 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_e9242e92-399d-47f5-bf74-793f8dc3f3ed/bin/uautomizer/witness.graphml [2019-12-07 10:11:13,269 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:11:13,270 INFO L168 Benchmark]: Toolchain (without parser) took 186142.03 ms. Allocated memory was 1.0 GB in the beginning and 6.8 GB in the end (delta: 5.7 GB). Free memory was 941.9 MB in the beginning and 4.8 GB in the end (delta: -3.9 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-12-07 10:11:13,270 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:11:13,271 INFO L168 Benchmark]: CACSL2BoogieTranslator took 387.22 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 941.9 MB in the beginning and 1.1 GB in the end (delta: -132.2 MB). Peak memory consumption was 19.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:13,271 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.07 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:13,271 INFO L168 Benchmark]: Boogie Preprocessor took 25.87 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:11:13,272 INFO L168 Benchmark]: RCFGBuilder took 410.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:13,272 INFO L168 Benchmark]: TraceAbstraction took 185200.03 ms. Allocated memory was 1.1 GB in the beginning and 6.8 GB in the end (delta: 5.6 GB). Free memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-12-07 10:11:13,272 INFO L168 Benchmark]: Witness Printer took 78.88 ms. Allocated memory is still 6.8 GB. Free memory was 4.9 GB in the beginning and 4.8 GB in the end (delta: 37.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:13,274 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 387.22 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 941.9 MB in the beginning and 1.1 GB in the end (delta: -132.2 MB). Peak memory consumption was 19.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.07 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.87 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 410.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 185200.03 ms. Allocated memory was 1.1 GB in the beginning and 6.8 GB in the end (delta: 5.6 GB). Free memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. * Witness Printer took 78.88 ms. Allocated memory is still 6.8 GB. Free memory was 4.9 GB in the beginning and 4.8 GB in the end (delta: 37.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 95 ProgramPointsAfterwards, 215 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 35 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 29 ChoiceCompositions, 7593 VarBasedMoverChecksPositive, 373 VarBasedMoverChecksNegative, 200 SemBasedMoverChecksPositive, 268 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 132619 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L832] FCALL, FORK 0 pthread_create(&t62, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 1 z$w_buff1 = z$w_buff0 [L736] 1 z$w_buff0 = 1 [L737] 1 z$w_buff1_used = z$w_buff0_used [L738] 1 z$w_buff0_used = (_Bool)1 [L750] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L834] FCALL, FORK 0 pthread_create(&t63, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 x = 1 [L767] 2 __unbuffered_p1_EAX = x [L770] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L773] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L750] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L773] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L774] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L836] FCALL, FORK 0 pthread_create(&t64, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 y = 1 [L790] 3 __unbuffered_p2_EAX = y [L793] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L794] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L795] 3 z$flush_delayed = weak$$choice2 [L796] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L751] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L752] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L775] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L776] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L798] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L799] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L800] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L801] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L809] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L811] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L812] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L842] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L842] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L843] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L844] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L845] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 185.0s, OverallIterations: 31, TraceHistogramMax: 1, AutomataDifference: 30.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6470 SDtfs, 6749 SDslu, 19009 SDs, 0 SdLazy, 9825 SolverSat, 229 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 281 GetRequests, 30 SyntacticMatches, 18 SemanticMatches, 233 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 927 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=238430occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 132.6s AutomataMinimizationTime, 30 MinimizatonAttempts, 394230 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 1098 NumberOfCodeBlocks, 1098 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 1001 ConstructedInterpolants, 0 QuantifiedInterpolants, 314981 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...