./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix003_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix003_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 33b3727f04ced6d73a817a5b8ed8b4184bb59de6 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:58:56,437 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:58:56,439 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:58:56,449 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:58:56,450 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:58:56,450 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:58:56,452 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:58:56,454 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:58:56,455 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:58:56,456 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:58:56,457 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:58:56,458 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:58:56,458 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:58:56,459 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:58:56,460 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:58:56,461 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:58:56,462 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:58:56,463 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:58:56,464 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:58:56,466 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:58:56,468 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:58:56,468 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:58:56,469 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:58:56,470 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:58:56,472 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:58:56,472 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:58:56,473 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:58:56,473 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:58:56,474 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:58:56,474 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:58:56,475 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:58:56,475 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:58:56,476 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:58:56,476 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:58:56,477 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:58:56,477 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:58:56,477 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:58:56,477 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:58:56,478 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:58:56,478 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:58:56,479 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:58:56,479 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:58:56,490 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:58:56,490 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:58:56,491 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:58:56,491 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:58:56,491 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:58:56,491 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:58:56,491 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:58:56,491 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:58:56,492 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:58:56,492 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:58:56,492 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:58:56,492 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:58:56,492 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:58:56,492 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:58:56,492 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:58:56,493 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:58:56,493 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:58:56,493 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:58:56,493 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:58:56,493 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:58:56,493 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:58:56,493 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:58:56,494 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:58:56,494 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:58:56,494 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:58:56,494 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:58:56,494 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:58:56,494 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:58:56,494 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:58:56,494 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 33b3727f04ced6d73a817a5b8ed8b4184bb59de6 [2019-12-07 10:58:56,607 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:58:56,618 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:58:56,620 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:58:56,622 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:58:56,622 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:58:56,623 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix003_pso.oepc.i [2019-12-07 10:58:56,672 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/data/1fbf602be/dbe3eb812b264982ab030f159f3fd009/FLAG7464b0467 [2019-12-07 10:58:57,147 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:58:57,147 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/sv-benchmarks/c/pthread-wmm/mix003_pso.oepc.i [2019-12-07 10:58:57,157 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/data/1fbf602be/dbe3eb812b264982ab030f159f3fd009/FLAG7464b0467 [2019-12-07 10:58:57,465 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/data/1fbf602be/dbe3eb812b264982ab030f159f3fd009 [2019-12-07 10:58:57,472 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:58:57,475 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:58:57,477 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:58:57,477 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:58:57,485 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:58:57,486 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,492 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4ad104b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57, skipping insertion in model container [2019-12-07 10:58:57,493 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,508 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:58:57,551 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:58:57,826 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:58:57,834 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:58:57,876 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:58:57,922 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:58:57,922 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57 WrapperNode [2019-12-07 10:58:57,922 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:58:57,923 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:58:57,923 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:58:57,923 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:58:57,928 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,942 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,961 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:58:57,962 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:58:57,962 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:58:57,962 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:58:57,968 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,968 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,972 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,972 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,979 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,983 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,985 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... [2019-12-07 10:58:57,988 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:58:57,989 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:58:57,989 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:58:57,989 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:58:57,989 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:58:58,031 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:58:58,031 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:58:58,031 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:58:58,031 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:58:58,032 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:58:58,032 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:58:58,032 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:58:58,032 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:58:58,032 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:58:58,032 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:58:58,032 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:58:58,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:58:58,032 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:58:58,033 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:58:58,409 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:58:58,410 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:58:58,410 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:58:58 BoogieIcfgContainer [2019-12-07 10:58:58,411 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:58:58,411 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:58:58,411 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:58:58,413 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:58:58,413 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:58:57" (1/3) ... [2019-12-07 10:58:58,414 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@232e82d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:58:58, skipping insertion in model container [2019-12-07 10:58:58,414 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:58:57" (2/3) ... [2019-12-07 10:58:58,415 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@232e82d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:58:58, skipping insertion in model container [2019-12-07 10:58:58,415 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:58:58" (3/3) ... [2019-12-07 10:58:58,416 INFO L109 eAbstractionObserver]: Analyzing ICFG mix003_pso.oepc.i [2019-12-07 10:58:58,422 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:58:58,422 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:58:58,428 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:58:58,428 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:58:58,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,458 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,458 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,458 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,458 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,458 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,463 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,463 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,463 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,463 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,463 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,463 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,464 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,464 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,464 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,464 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,464 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,465 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,465 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,465 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,465 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,465 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,466 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,466 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,466 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,466 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,466 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,466 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,466 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,466 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,468 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,468 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,468 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,469 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,469 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,469 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,469 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,469 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,469 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,469 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:58:58,495 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:58:58,508 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:58:58,508 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:58:58,508 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:58:58,508 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:58:58,508 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:58:58,508 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:58:58,508 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:58:58,508 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:58:58,521 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 10:58:58,522 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 10:58:58,584 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 10:58:58,584 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:58:58,595 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:58:58,611 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 10:58:58,642 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 10:58:58,642 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:58:58,647 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:58:58,663 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 10:58:58,664 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:59:01,521 WARN L192 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 10:59:01,829 INFO L206 etLargeBlockEncoding]: Checked pairs total: 132619 [2019-12-07 10:59:01,829 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 10:59:01,831 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 10:59:18,359 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 120347 states. [2019-12-07 10:59:18,361 INFO L276 IsEmpty]: Start isEmpty. Operand 120347 states. [2019-12-07 10:59:18,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 10:59:18,429 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:59:18,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 10:59:18,430 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:59:18,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:59:18,434 INFO L82 PathProgramCache]: Analyzing trace with hash 919842, now seen corresponding path program 1 times [2019-12-07 10:59:18,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:59:18,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2087461234] [2019-12-07 10:59:18,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:59:18,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:59:18,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:59:18,569 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2087461234] [2019-12-07 10:59:18,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:59:18,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:59:18,571 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1289128721] [2019-12-07 10:59:18,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:59:18,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:59:18,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:59:18,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:59:18,584 INFO L87 Difference]: Start difference. First operand 120347 states. Second operand 3 states. [2019-12-07 10:59:19,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:59:19,371 INFO L93 Difference]: Finished difference Result 119613 states and 515253 transitions. [2019-12-07 10:59:19,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:59:19,372 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 10:59:19,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:59:19,831 INFO L225 Difference]: With dead ends: 119613 [2019-12-07 10:59:19,832 INFO L226 Difference]: Without dead ends: 105755 [2019-12-07 10:59:19,833 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:59:24,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105755 states. [2019-12-07 10:59:26,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105755 to 105755. [2019-12-07 10:59:26,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105755 states. [2019-12-07 10:59:27,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105755 states to 105755 states and 454361 transitions. [2019-12-07 10:59:27,282 INFO L78 Accepts]: Start accepts. Automaton has 105755 states and 454361 transitions. Word has length 3 [2019-12-07 10:59:27,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:59:27,282 INFO L462 AbstractCegarLoop]: Abstraction has 105755 states and 454361 transitions. [2019-12-07 10:59:27,282 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:59:27,282 INFO L276 IsEmpty]: Start isEmpty. Operand 105755 states and 454361 transitions. [2019-12-07 10:59:27,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 10:59:27,286 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:59:27,286 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:59:27,287 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:59:27,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:59:27,287 INFO L82 PathProgramCache]: Analyzing trace with hash 474732739, now seen corresponding path program 1 times [2019-12-07 10:59:27,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:59:27,287 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1688884664] [2019-12-07 10:59:27,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:59:27,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:59:27,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:59:27,356 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1688884664] [2019-12-07 10:59:27,356 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:59:27,356 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:59:27,356 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479184031] [2019-12-07 10:59:27,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:59:27,357 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:59:27,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:59:27,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:59:27,358 INFO L87 Difference]: Start difference. First operand 105755 states and 454361 transitions. Second operand 4 states. [2019-12-07 10:59:28,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:59:28,357 INFO L93 Difference]: Finished difference Result 168845 states and 694815 transitions. [2019-12-07 10:59:28,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:59:28,358 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 10:59:28,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:59:28,820 INFO L225 Difference]: With dead ends: 168845 [2019-12-07 10:59:28,821 INFO L226 Difference]: Without dead ends: 168747 [2019-12-07 10:59:28,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:59:34,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168747 states. [2019-12-07 10:59:37,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168747 to 153153. [2019-12-07 10:59:37,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153153 states. [2019-12-07 10:59:38,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153153 states to 153153 states and 639357 transitions. [2019-12-07 10:59:38,278 INFO L78 Accepts]: Start accepts. Automaton has 153153 states and 639357 transitions. Word has length 11 [2019-12-07 10:59:38,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:59:38,278 INFO L462 AbstractCegarLoop]: Abstraction has 153153 states and 639357 transitions. [2019-12-07 10:59:38,279 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:59:38,279 INFO L276 IsEmpty]: Start isEmpty. Operand 153153 states and 639357 transitions. [2019-12-07 10:59:38,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:59:38,282 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:59:38,282 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:59:38,283 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:59:38,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:59:38,283 INFO L82 PathProgramCache]: Analyzing trace with hash -512415605, now seen corresponding path program 1 times [2019-12-07 10:59:38,283 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:59:38,283 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563859767] [2019-12-07 10:59:38,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:59:38,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:59:38,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:59:38,332 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563859767] [2019-12-07 10:59:38,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:59:38,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:59:38,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864434920] [2019-12-07 10:59:38,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:59:38,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:59:38,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:59:38,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:59:38,334 INFO L87 Difference]: Start difference. First operand 153153 states and 639357 transitions. Second operand 4 states. [2019-12-07 10:59:39,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:59:39,928 INFO L93 Difference]: Finished difference Result 220024 states and 896381 transitions. [2019-12-07 10:59:39,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:59:39,928 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:59:39,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:59:40,527 INFO L225 Difference]: With dead ends: 220024 [2019-12-07 10:59:40,527 INFO L226 Difference]: Without dead ends: 219912 [2019-12-07 10:59:40,528 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:59:46,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219912 states. [2019-12-07 10:59:48,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219912 to 183120. [2019-12-07 10:59:48,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183120 states. [2019-12-07 10:59:52,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183120 states to 183120 states and 760223 transitions. [2019-12-07 10:59:52,481 INFO L78 Accepts]: Start accepts. Automaton has 183120 states and 760223 transitions. Word has length 13 [2019-12-07 10:59:52,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:59:52,482 INFO L462 AbstractCegarLoop]: Abstraction has 183120 states and 760223 transitions. [2019-12-07 10:59:52,482 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:59:52,482 INFO L276 IsEmpty]: Start isEmpty. Operand 183120 states and 760223 transitions. [2019-12-07 10:59:52,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:59:52,489 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:59:52,489 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:59:52,489 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:59:52,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:59:52,489 INFO L82 PathProgramCache]: Analyzing trace with hash -1719969010, now seen corresponding path program 1 times [2019-12-07 10:59:52,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:59:52,490 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405975683] [2019-12-07 10:59:52,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:59:52,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:59:52,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:59:52,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405975683] [2019-12-07 10:59:52,540 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:59:52,541 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:59:52,541 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650033093] [2019-12-07 10:59:52,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:59:52,541 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:59:52,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:59:52,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:59:52,542 INFO L87 Difference]: Start difference. First operand 183120 states and 760223 transitions. Second operand 4 states. [2019-12-07 10:59:53,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:59:53,739 INFO L93 Difference]: Finished difference Result 225249 states and 927434 transitions. [2019-12-07 10:59:53,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:59:53,740 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:59:53,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:59:54,339 INFO L225 Difference]: With dead ends: 225249 [2019-12-07 10:59:54,339 INFO L226 Difference]: Without dead ends: 225249 [2019-12-07 10:59:54,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:00:00,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225249 states. [2019-12-07 11:00:03,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225249 to 195075. [2019-12-07 11:00:03,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195075 states. [2019-12-07 11:00:03,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195075 states to 195075 states and 809283 transitions. [2019-12-07 11:00:03,718 INFO L78 Accepts]: Start accepts. Automaton has 195075 states and 809283 transitions. Word has length 16 [2019-12-07 11:00:03,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:00:03,719 INFO L462 AbstractCegarLoop]: Abstraction has 195075 states and 809283 transitions. [2019-12-07 11:00:03,719 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:00:03,719 INFO L276 IsEmpty]: Start isEmpty. Operand 195075 states and 809283 transitions. [2019-12-07 11:00:03,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:00:03,725 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:00:03,725 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:00:03,725 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:00:03,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:00:03,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1720071868, now seen corresponding path program 1 times [2019-12-07 11:00:03,726 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:00:03,726 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031186605] [2019-12-07 11:00:03,726 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:00:03,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:00:03,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:00:03,758 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031186605] [2019-12-07 11:00:03,758 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:00:03,758 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:00:03,758 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138661770] [2019-12-07 11:00:03,758 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:00:03,759 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:00:03,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:00:03,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:00:03,759 INFO L87 Difference]: Start difference. First operand 195075 states and 809283 transitions. Second operand 3 states. [2019-12-07 11:00:05,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:00:05,027 INFO L93 Difference]: Finished difference Result 282572 states and 1168256 transitions. [2019-12-07 11:00:05,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:00:05,027 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 11:00:05,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:00:08,790 INFO L225 Difference]: With dead ends: 282572 [2019-12-07 11:00:08,790 INFO L226 Difference]: Without dead ends: 282572 [2019-12-07 11:00:08,791 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:00:14,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282572 states. [2019-12-07 11:00:18,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282572 to 224589. [2019-12-07 11:00:18,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224589 states. [2019-12-07 11:00:19,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224589 states to 224589 states and 936012 transitions. [2019-12-07 11:00:19,292 INFO L78 Accepts]: Start accepts. Automaton has 224589 states and 936012 transitions. Word has length 16 [2019-12-07 11:00:19,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:00:19,292 INFO L462 AbstractCegarLoop]: Abstraction has 224589 states and 936012 transitions. [2019-12-07 11:00:19,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:00:19,292 INFO L276 IsEmpty]: Start isEmpty. Operand 224589 states and 936012 transitions. [2019-12-07 11:00:19,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:00:19,298 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:00:19,298 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:00:19,298 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:00:19,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:00:19,298 INFO L82 PathProgramCache]: Analyzing trace with hash 759335912, now seen corresponding path program 1 times [2019-12-07 11:00:19,299 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:00:19,299 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134258248] [2019-12-07 11:00:19,299 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:00:19,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:00:19,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:00:19,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134258248] [2019-12-07 11:00:19,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:00:19,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:00:19,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1319103609] [2019-12-07 11:00:19,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:00:19,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:00:19,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:00:19,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:00:19,330 INFO L87 Difference]: Start difference. First operand 224589 states and 936012 transitions. Second operand 4 states. [2019-12-07 11:00:20,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:00:20,712 INFO L93 Difference]: Finished difference Result 265350 states and 1097413 transitions. [2019-12-07 11:00:20,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:00:20,713 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:00:20,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:00:21,415 INFO L225 Difference]: With dead ends: 265350 [2019-12-07 11:00:21,415 INFO L226 Difference]: Without dead ends: 265350 [2019-12-07 11:00:21,415 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:00:28,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265350 states. [2019-12-07 11:00:31,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265350 to 227267. [2019-12-07 11:00:31,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227267 states. [2019-12-07 11:00:33,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227267 states to 227267 states and 947978 transitions. [2019-12-07 11:00:33,002 INFO L78 Accepts]: Start accepts. Automaton has 227267 states and 947978 transitions. Word has length 16 [2019-12-07 11:00:33,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:00:33,002 INFO L462 AbstractCegarLoop]: Abstraction has 227267 states and 947978 transitions. [2019-12-07 11:00:33,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:00:33,002 INFO L276 IsEmpty]: Start isEmpty. Operand 227267 states and 947978 transitions. [2019-12-07 11:00:33,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:00:33,012 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:00:33,012 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:00:33,012 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:00:33,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:00:33,013 INFO L82 PathProgramCache]: Analyzing trace with hash 980787520, now seen corresponding path program 1 times [2019-12-07 11:00:33,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:00:33,013 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012346594] [2019-12-07 11:00:33,013 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:00:33,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:00:33,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:00:33,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012346594] [2019-12-07 11:00:33,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:00:33,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:00:33,066 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396385858] [2019-12-07 11:00:33,066 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:00:33,066 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:00:33,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:00:33,066 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:00:33,066 INFO L87 Difference]: Start difference. First operand 227267 states and 947978 transitions. Second operand 3 states. [2019-12-07 11:00:34,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:00:34,130 INFO L93 Difference]: Finished difference Result 227267 states and 938556 transitions. [2019-12-07 11:00:34,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:00:34,130 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:00:34,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:00:37,526 INFO L225 Difference]: With dead ends: 227267 [2019-12-07 11:00:37,526 INFO L226 Difference]: Without dead ends: 227267 [2019-12-07 11:00:37,527 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:00:43,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227267 states. [2019-12-07 11:00:45,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227267 to 223833. [2019-12-07 11:00:45,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223833 states. [2019-12-07 11:00:46,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223833 states to 223833 states and 925814 transitions. [2019-12-07 11:00:46,898 INFO L78 Accepts]: Start accepts. Automaton has 223833 states and 925814 transitions. Word has length 18 [2019-12-07 11:00:46,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:00:46,898 INFO L462 AbstractCegarLoop]: Abstraction has 223833 states and 925814 transitions. [2019-12-07 11:00:46,898 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:00:46,898 INFO L276 IsEmpty]: Start isEmpty. Operand 223833 states and 925814 transitions. [2019-12-07 11:00:46,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:00:46,908 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:00:46,908 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:00:46,908 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:00:46,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:00:46,908 INFO L82 PathProgramCache]: Analyzing trace with hash -907604290, now seen corresponding path program 1 times [2019-12-07 11:00:46,908 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:00:46,908 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716599378] [2019-12-07 11:00:46,909 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:00:46,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:00:46,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:00:46,952 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716599378] [2019-12-07 11:00:46,952 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:00:46,952 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:00:46,952 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709172594] [2019-12-07 11:00:46,952 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:00:46,952 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:00:46,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:00:46,953 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:00:46,953 INFO L87 Difference]: Start difference. First operand 223833 states and 925814 transitions. Second operand 3 states. [2019-12-07 11:00:48,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:00:48,010 INFO L93 Difference]: Finished difference Result 227222 states and 936124 transitions. [2019-12-07 11:00:48,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:00:48,011 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:00:48,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:00:49,127 INFO L225 Difference]: With dead ends: 227222 [2019-12-07 11:00:49,127 INFO L226 Difference]: Without dead ends: 227222 [2019-12-07 11:00:49,128 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:00:54,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227222 states. [2019-12-07 11:00:57,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227222 to 223830. [2019-12-07 11:00:57,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223830 states. [2019-12-07 11:00:58,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223830 states to 223830 states and 925802 transitions. [2019-12-07 11:00:58,750 INFO L78 Accepts]: Start accepts. Automaton has 223830 states and 925802 transitions. Word has length 18 [2019-12-07 11:00:58,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:00:58,750 INFO L462 AbstractCegarLoop]: Abstraction has 223830 states and 925802 transitions. [2019-12-07 11:00:58,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:00:58,750 INFO L276 IsEmpty]: Start isEmpty. Operand 223830 states and 925802 transitions. [2019-12-07 11:00:58,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:00:58,763 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:00:58,763 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:00:58,763 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:00:58,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:00:58,763 INFO L82 PathProgramCache]: Analyzing trace with hash 793088017, now seen corresponding path program 1 times [2019-12-07 11:00:58,763 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:00:58,763 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1882397475] [2019-12-07 11:00:58,763 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:00:58,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:00:58,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:00:58,812 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1882397475] [2019-12-07 11:00:58,812 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:00:58,812 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:00:58,812 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819861796] [2019-12-07 11:00:58,812 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:00:58,812 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:00:58,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:00:58,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:00:58,813 INFO L87 Difference]: Start difference. First operand 223830 states and 925802 transitions. Second operand 5 states. [2019-12-07 11:01:03,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:03,700 INFO L93 Difference]: Finished difference Result 327040 states and 1320543 transitions. [2019-12-07 11:01:03,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:01:03,701 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:01:03,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:04,531 INFO L225 Difference]: With dead ends: 327040 [2019-12-07 11:01:04,531 INFO L226 Difference]: Without dead ends: 326858 [2019-12-07 11:01:04,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:01:11,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326858 states. [2019-12-07 11:01:15,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326858 to 238804. [2019-12-07 11:01:15,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238804 states. [2019-12-07 11:01:16,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238804 states to 238804 states and 984590 transitions. [2019-12-07 11:01:16,101 INFO L78 Accepts]: Start accepts. Automaton has 238804 states and 984590 transitions. Word has length 19 [2019-12-07 11:01:16,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:16,101 INFO L462 AbstractCegarLoop]: Abstraction has 238804 states and 984590 transitions. [2019-12-07 11:01:16,101 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:01:16,101 INFO L276 IsEmpty]: Start isEmpty. Operand 238804 states and 984590 transitions. [2019-12-07 11:01:16,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:01:16,114 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:16,114 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:16,114 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:16,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:16,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1187768320, now seen corresponding path program 1 times [2019-12-07 11:01:16,115 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:16,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549666894] [2019-12-07 11:01:16,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:16,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:16,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:16,132 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1549666894] [2019-12-07 11:01:16,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:16,133 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:01:16,133 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232722917] [2019-12-07 11:01:16,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:01:16,133 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:16,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:01:16,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:16,133 INFO L87 Difference]: Start difference. First operand 238804 states and 984590 transitions. Second operand 3 states. [2019-12-07 11:01:16,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:16,274 INFO L93 Difference]: Finished difference Result 47432 states and 154279 transitions. [2019-12-07 11:01:16,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:01:16,274 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:01:16,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:16,342 INFO L225 Difference]: With dead ends: 47432 [2019-12-07 11:01:16,342 INFO L226 Difference]: Without dead ends: 47432 [2019-12-07 11:01:16,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:16,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47432 states. [2019-12-07 11:01:17,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47432 to 47432. [2019-12-07 11:01:17,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47432 states. [2019-12-07 11:01:17,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47432 states to 47432 states and 154279 transitions. [2019-12-07 11:01:17,113 INFO L78 Accepts]: Start accepts. Automaton has 47432 states and 154279 transitions. Word has length 19 [2019-12-07 11:01:17,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:17,113 INFO L462 AbstractCegarLoop]: Abstraction has 47432 states and 154279 transitions. [2019-12-07 11:01:17,113 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:01:17,113 INFO L276 IsEmpty]: Start isEmpty. Operand 47432 states and 154279 transitions. [2019-12-07 11:01:17,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:01:17,119 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:17,119 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:17,119 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:17,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:17,119 INFO L82 PathProgramCache]: Analyzing trace with hash -390431288, now seen corresponding path program 1 times [2019-12-07 11:01:17,119 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:17,119 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740767926] [2019-12-07 11:01:17,119 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:17,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:17,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:17,156 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740767926] [2019-12-07 11:01:17,156 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:17,156 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:01:17,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [468433658] [2019-12-07 11:01:17,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:01:17,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:17,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:01:17,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:17,157 INFO L87 Difference]: Start difference. First operand 47432 states and 154279 transitions. Second operand 5 states. [2019-12-07 11:01:17,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:17,610 INFO L93 Difference]: Finished difference Result 63875 states and 202791 transitions. [2019-12-07 11:01:17,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:01:17,610 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:01:17,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:17,706 INFO L225 Difference]: With dead ends: 63875 [2019-12-07 11:01:17,707 INFO L226 Difference]: Without dead ends: 63861 [2019-12-07 11:01:17,707 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:01:17,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63861 states. [2019-12-07 11:01:18,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63861 to 50292. [2019-12-07 11:01:18,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50292 states. [2019-12-07 11:01:19,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50292 states to 50292 states and 162986 transitions. [2019-12-07 11:01:19,005 INFO L78 Accepts]: Start accepts. Automaton has 50292 states and 162986 transitions. Word has length 22 [2019-12-07 11:01:19,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:19,005 INFO L462 AbstractCegarLoop]: Abstraction has 50292 states and 162986 transitions. [2019-12-07 11:01:19,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:01:19,005 INFO L276 IsEmpty]: Start isEmpty. Operand 50292 states and 162986 transitions. [2019-12-07 11:01:19,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:01:19,012 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:19,012 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:19,012 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:19,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:19,012 INFO L82 PathProgramCache]: Analyzing trace with hash 2088873634, now seen corresponding path program 1 times [2019-12-07 11:01:19,012 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:19,013 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408574873] [2019-12-07 11:01:19,013 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:19,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:19,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:19,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1408574873] [2019-12-07 11:01:19,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:19,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:01:19,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141263040] [2019-12-07 11:01:19,056 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:01:19,056 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:19,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:01:19,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:19,057 INFO L87 Difference]: Start difference. First operand 50292 states and 162986 transitions. Second operand 5 states. [2019-12-07 11:01:19,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:19,517 INFO L93 Difference]: Finished difference Result 65915 states and 209832 transitions. [2019-12-07 11:01:19,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:01:19,517 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:01:19,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:19,619 INFO L225 Difference]: With dead ends: 65915 [2019-12-07 11:01:19,619 INFO L226 Difference]: Without dead ends: 65901 [2019-12-07 11:01:19,619 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:01:19,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65901 states. [2019-12-07 11:01:20,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65901 to 48914. [2019-12-07 11:01:20,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48914 states. [2019-12-07 11:01:20,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48914 states to 48914 states and 158771 transitions. [2019-12-07 11:01:20,569 INFO L78 Accepts]: Start accepts. Automaton has 48914 states and 158771 transitions. Word has length 22 [2019-12-07 11:01:20,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:20,569 INFO L462 AbstractCegarLoop]: Abstraction has 48914 states and 158771 transitions. [2019-12-07 11:01:20,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:01:20,570 INFO L276 IsEmpty]: Start isEmpty. Operand 48914 states and 158771 transitions. [2019-12-07 11:01:20,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:01:20,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:20,583 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:20,584 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:20,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:20,584 INFO L82 PathProgramCache]: Analyzing trace with hash 967503752, now seen corresponding path program 1 times [2019-12-07 11:01:20,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:20,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665399410] [2019-12-07 11:01:20,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:20,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:20,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:20,607 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665399410] [2019-12-07 11:01:20,607 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:20,607 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:01:20,607 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [553500915] [2019-12-07 11:01:20,607 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:01:20,608 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:20,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:01:20,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:20,608 INFO L87 Difference]: Start difference. First operand 48914 states and 158771 transitions. Second operand 3 states. [2019-12-07 11:01:20,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:20,795 INFO L93 Difference]: Finished difference Result 62759 states and 194816 transitions. [2019-12-07 11:01:20,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:01:20,796 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 11:01:20,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:21,030 INFO L225 Difference]: With dead ends: 62759 [2019-12-07 11:01:21,030 INFO L226 Difference]: Without dead ends: 62759 [2019-12-07 11:01:21,031 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:21,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62759 states. [2019-12-07 11:01:21,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62759 to 48438. [2019-12-07 11:01:21,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48438 states. [2019-12-07 11:01:21,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48438 states to 48438 states and 150393 transitions. [2019-12-07 11:01:21,859 INFO L78 Accepts]: Start accepts. Automaton has 48438 states and 150393 transitions. Word has length 27 [2019-12-07 11:01:21,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:21,859 INFO L462 AbstractCegarLoop]: Abstraction has 48438 states and 150393 transitions. [2019-12-07 11:01:21,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:01:21,859 INFO L276 IsEmpty]: Start isEmpty. Operand 48438 states and 150393 transitions. [2019-12-07 11:01:21,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:01:21,872 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:21,872 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:21,872 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:21,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:21,873 INFO L82 PathProgramCache]: Analyzing trace with hash 196927527, now seen corresponding path program 1 times [2019-12-07 11:01:21,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:21,873 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202527957] [2019-12-07 11:01:21,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:21,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:21,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:21,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202527957] [2019-12-07 11:01:21,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:21,907 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:01:21,907 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879069101] [2019-12-07 11:01:21,907 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:01:21,907 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:21,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:01:21,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:21,907 INFO L87 Difference]: Start difference. First operand 48438 states and 150393 transitions. Second operand 5 states. [2019-12-07 11:01:22,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:22,229 INFO L93 Difference]: Finished difference Result 59466 states and 182837 transitions. [2019-12-07 11:01:22,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:01:22,229 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 11:01:22,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:22,318 INFO L225 Difference]: With dead ends: 59466 [2019-12-07 11:01:22,318 INFO L226 Difference]: Without dead ends: 59424 [2019-12-07 11:01:22,318 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:01:22,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59424 states. [2019-12-07 11:01:23,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59424 to 50589. [2019-12-07 11:01:23,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50589 states. [2019-12-07 11:01:23,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50589 states to 50589 states and 156953 transitions. [2019-12-07 11:01:23,223 INFO L78 Accepts]: Start accepts. Automaton has 50589 states and 156953 transitions. Word has length 27 [2019-12-07 11:01:23,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:23,223 INFO L462 AbstractCegarLoop]: Abstraction has 50589 states and 156953 transitions. [2019-12-07 11:01:23,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:01:23,223 INFO L276 IsEmpty]: Start isEmpty. Operand 50589 states and 156953 transitions. [2019-12-07 11:01:23,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 11:01:23,238 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:23,238 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:23,238 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:23,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:23,238 INFO L82 PathProgramCache]: Analyzing trace with hash -1188103809, now seen corresponding path program 1 times [2019-12-07 11:01:23,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:23,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [553803289] [2019-12-07 11:01:23,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:23,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:23,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:23,277 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [553803289] [2019-12-07 11:01:23,277 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:23,277 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:01:23,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747698250] [2019-12-07 11:01:23,278 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:01:23,278 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:23,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:01:23,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:23,278 INFO L87 Difference]: Start difference. First operand 50589 states and 156953 transitions. Second operand 5 states. [2019-12-07 11:01:23,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:23,653 INFO L93 Difference]: Finished difference Result 61327 states and 188389 transitions. [2019-12-07 11:01:23,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:01:23,654 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 11:01:23,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:23,742 INFO L225 Difference]: With dead ends: 61327 [2019-12-07 11:01:23,742 INFO L226 Difference]: Without dead ends: 61283 [2019-12-07 11:01:23,742 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:01:24,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61283 states. [2019-12-07 11:01:24,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61283 to 50396. [2019-12-07 11:01:24,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50396 states. [2019-12-07 11:01:24,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50396 states to 50396 states and 156269 transitions. [2019-12-07 11:01:24,660 INFO L78 Accepts]: Start accepts. Automaton has 50396 states and 156269 transitions. Word has length 28 [2019-12-07 11:01:24,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:24,661 INFO L462 AbstractCegarLoop]: Abstraction has 50396 states and 156269 transitions. [2019-12-07 11:01:24,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:01:24,661 INFO L276 IsEmpty]: Start isEmpty. Operand 50396 states and 156269 transitions. [2019-12-07 11:01:24,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 11:01:24,674 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:24,674 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:24,674 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:24,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:24,675 INFO L82 PathProgramCache]: Analyzing trace with hash -175678458, now seen corresponding path program 1 times [2019-12-07 11:01:24,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:24,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025448514] [2019-12-07 11:01:24,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:24,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:24,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:24,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025448514] [2019-12-07 11:01:24,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:24,736 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:01:24,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1765246432] [2019-12-07 11:01:24,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:01:24,736 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:24,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:01:24,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:24,737 INFO L87 Difference]: Start difference. First operand 50396 states and 156269 transitions. Second operand 4 states. [2019-12-07 11:01:24,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:24,894 INFO L93 Difference]: Finished difference Result 50543 states and 156515 transitions. [2019-12-07 11:01:24,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:01:24,894 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 11:01:24,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:24,968 INFO L225 Difference]: With dead ends: 50543 [2019-12-07 11:01:24,969 INFO L226 Difference]: Without dead ends: 50543 [2019-12-07 11:01:24,969 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:25,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50543 states. [2019-12-07 11:01:25,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50543 to 50343. [2019-12-07 11:01:25,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50343 states. [2019-12-07 11:01:25,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50343 states to 50343 states and 156111 transitions. [2019-12-07 11:01:25,802 INFO L78 Accepts]: Start accepts. Automaton has 50343 states and 156111 transitions. Word has length 29 [2019-12-07 11:01:25,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:25,803 INFO L462 AbstractCegarLoop]: Abstraction has 50343 states and 156111 transitions. [2019-12-07 11:01:25,803 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:01:25,803 INFO L276 IsEmpty]: Start isEmpty. Operand 50343 states and 156111 transitions. [2019-12-07 11:01:25,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 11:01:25,925 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:25,925 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:25,925 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:25,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:25,926 INFO L82 PathProgramCache]: Analyzing trace with hash -502361435, now seen corresponding path program 1 times [2019-12-07 11:01:25,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:25,926 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849021080] [2019-12-07 11:01:25,926 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:25,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:25,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:25,973 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1849021080] [2019-12-07 11:01:25,973 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:25,974 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:01:25,974 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037913603] [2019-12-07 11:01:25,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:01:25,974 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:25,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:01:25,974 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:25,975 INFO L87 Difference]: Start difference. First operand 50343 states and 156111 transitions. Second operand 4 states. [2019-12-07 11:01:26,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:26,131 INFO L93 Difference]: Finished difference Result 50455 states and 156241 transitions. [2019-12-07 11:01:26,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:01:26,131 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 11:01:26,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:26,202 INFO L225 Difference]: With dead ends: 50455 [2019-12-07 11:01:26,202 INFO L226 Difference]: Without dead ends: 50455 [2019-12-07 11:01:26,202 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:26,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50455 states. [2019-12-07 11:01:26,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50455 to 50255. [2019-12-07 11:01:26,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50255 states. [2019-12-07 11:01:27,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50255 states to 50255 states and 155837 transitions. [2019-12-07 11:01:27,005 INFO L78 Accepts]: Start accepts. Automaton has 50255 states and 155837 transitions. Word has length 30 [2019-12-07 11:01:27,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:27,005 INFO L462 AbstractCegarLoop]: Abstraction has 50255 states and 155837 transitions. [2019-12-07 11:01:27,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:01:27,005 INFO L276 IsEmpty]: Start isEmpty. Operand 50255 states and 155837 transitions. [2019-12-07 11:01:27,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 11:01:27,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:27,023 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:27,023 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:27,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:27,023 INFO L82 PathProgramCache]: Analyzing trace with hash 623425171, now seen corresponding path program 1 times [2019-12-07 11:01:27,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:27,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121992103] [2019-12-07 11:01:27,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:27,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:27,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:27,060 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121992103] [2019-12-07 11:01:27,060 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:27,060 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:01:27,060 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1450244948] [2019-12-07 11:01:27,060 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:01:27,061 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:27,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:01:27,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:27,061 INFO L87 Difference]: Start difference. First operand 50255 states and 155837 transitions. Second operand 4 states. [2019-12-07 11:01:27,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:27,121 INFO L93 Difference]: Finished difference Result 19537 states and 57983 transitions. [2019-12-07 11:01:27,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:01:27,121 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 11:01:27,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:27,143 INFO L225 Difference]: With dead ends: 19537 [2019-12-07 11:01:27,143 INFO L226 Difference]: Without dead ends: 19537 [2019-12-07 11:01:27,143 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:27,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19537 states. [2019-12-07 11:01:27,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19537 to 18347. [2019-12-07 11:01:27,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18347 states. [2019-12-07 11:01:27,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18347 states to 18347 states and 54527 transitions. [2019-12-07 11:01:27,411 INFO L78 Accepts]: Start accepts. Automaton has 18347 states and 54527 transitions. Word has length 31 [2019-12-07 11:01:27,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:27,411 INFO L462 AbstractCegarLoop]: Abstraction has 18347 states and 54527 transitions. [2019-12-07 11:01:27,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:01:27,411 INFO L276 IsEmpty]: Start isEmpty. Operand 18347 states and 54527 transitions. [2019-12-07 11:01:27,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:01:27,428 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:27,428 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:27,429 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:27,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:27,429 INFO L82 PathProgramCache]: Analyzing trace with hash 1042720045, now seen corresponding path program 1 times [2019-12-07 11:01:27,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:27,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461752572] [2019-12-07 11:01:27,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:27,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:27,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:27,484 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461752572] [2019-12-07 11:01:27,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:27,485 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:01:27,485 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533261989] [2019-12-07 11:01:27,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:01:27,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:27,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:01:27,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:01:27,485 INFO L87 Difference]: Start difference. First operand 18347 states and 54527 transitions. Second operand 6 states. [2019-12-07 11:01:27,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:27,874 INFO L93 Difference]: Finished difference Result 23133 states and 67936 transitions. [2019-12-07 11:01:27,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:01:27,874 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 11:01:27,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:27,897 INFO L225 Difference]: With dead ends: 23133 [2019-12-07 11:01:27,898 INFO L226 Difference]: Without dead ends: 23133 [2019-12-07 11:01:27,898 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:01:27,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23133 states. [2019-12-07 11:01:28,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23133 to 18515. [2019-12-07 11:01:28,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18515 states. [2019-12-07 11:01:28,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18515 states to 18515 states and 55057 transitions. [2019-12-07 11:01:28,191 INFO L78 Accepts]: Start accepts. Automaton has 18515 states and 55057 transitions. Word has length 33 [2019-12-07 11:01:28,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:28,192 INFO L462 AbstractCegarLoop]: Abstraction has 18515 states and 55057 transitions. [2019-12-07 11:01:28,192 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:01:28,192 INFO L276 IsEmpty]: Start isEmpty. Operand 18515 states and 55057 transitions. [2019-12-07 11:01:28,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 11:01:28,204 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:28,204 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:28,204 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:28,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:28,205 INFO L82 PathProgramCache]: Analyzing trace with hash -738339527, now seen corresponding path program 1 times [2019-12-07 11:01:28,205 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:28,205 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744134461] [2019-12-07 11:01:28,205 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:28,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:28,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:28,251 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744134461] [2019-12-07 11:01:28,251 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:28,251 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:01:28,252 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [769413265] [2019-12-07 11:01:28,252 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:01:28,252 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:28,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:01:28,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:01:28,252 INFO L87 Difference]: Start difference. First operand 18515 states and 55057 transitions. Second operand 6 states. [2019-12-07 11:01:28,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:28,698 INFO L93 Difference]: Finished difference Result 22604 states and 66411 transitions. [2019-12-07 11:01:28,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:01:28,698 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 11:01:28,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:28,723 INFO L225 Difference]: With dead ends: 22604 [2019-12-07 11:01:28,723 INFO L226 Difference]: Without dead ends: 22604 [2019-12-07 11:01:28,723 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:01:28,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22604 states. [2019-12-07 11:01:29,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22604 to 17798. [2019-12-07 11:01:29,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17798 states. [2019-12-07 11:01:29,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17798 states to 17798 states and 52944 transitions. [2019-12-07 11:01:29,026 INFO L78 Accepts]: Start accepts. Automaton has 17798 states and 52944 transitions. Word has length 34 [2019-12-07 11:01:29,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:29,026 INFO L462 AbstractCegarLoop]: Abstraction has 17798 states and 52944 transitions. [2019-12-07 11:01:29,026 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:01:29,026 INFO L276 IsEmpty]: Start isEmpty. Operand 17798 states and 52944 transitions. [2019-12-07 11:01:29,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:01:29,040 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:29,040 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:29,040 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:29,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:29,040 INFO L82 PathProgramCache]: Analyzing trace with hash -935567252, now seen corresponding path program 1 times [2019-12-07 11:01:29,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:29,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [576582598] [2019-12-07 11:01:29,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:29,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:29,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:29,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [576582598] [2019-12-07 11:01:29,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:29,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:01:29,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207931367] [2019-12-07 11:01:29,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:01:29,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:29,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:01:29,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:29,067 INFO L87 Difference]: Start difference. First operand 17798 states and 52944 transitions. Second operand 3 states. [2019-12-07 11:01:29,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:29,111 INFO L93 Difference]: Finished difference Result 17798 states and 52256 transitions. [2019-12-07 11:01:29,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:01:29,112 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 11:01:29,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:29,130 INFO L225 Difference]: With dead ends: 17798 [2019-12-07 11:01:29,130 INFO L226 Difference]: Without dead ends: 17798 [2019-12-07 11:01:29,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:29,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17798 states. [2019-12-07 11:01:29,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17798 to 17524. [2019-12-07 11:01:29,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17524 states. [2019-12-07 11:01:29,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17524 states to 17524 states and 51488 transitions. [2019-12-07 11:01:29,379 INFO L78 Accepts]: Start accepts. Automaton has 17524 states and 51488 transitions. Word has length 41 [2019-12-07 11:01:29,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:29,379 INFO L462 AbstractCegarLoop]: Abstraction has 17524 states and 51488 transitions. [2019-12-07 11:01:29,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:01:29,379 INFO L276 IsEmpty]: Start isEmpty. Operand 17524 states and 51488 transitions. [2019-12-07 11:01:29,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 11:01:29,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:29,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:29,393 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:29,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:29,393 INFO L82 PathProgramCache]: Analyzing trace with hash 936590377, now seen corresponding path program 1 times [2019-12-07 11:01:29,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:29,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006453656] [2019-12-07 11:01:29,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:29,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:29,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:29,431 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006453656] [2019-12-07 11:01:29,431 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:29,431 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:01:29,431 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100319354] [2019-12-07 11:01:29,432 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:01:29,432 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:29,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:01:29,432 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:29,432 INFO L87 Difference]: Start difference. First operand 17524 states and 51488 transitions. Second operand 5 states. [2019-12-07 11:01:29,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:29,484 INFO L93 Difference]: Finished difference Result 16109 states and 48466 transitions. [2019-12-07 11:01:29,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:01:29,484 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 11:01:29,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:29,501 INFO L225 Difference]: With dead ends: 16109 [2019-12-07 11:01:29,501 INFO L226 Difference]: Without dead ends: 16109 [2019-12-07 11:01:29,501 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:29,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16109 states. [2019-12-07 11:01:29,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16109 to 14604. [2019-12-07 11:01:29,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14604 states. [2019-12-07 11:01:29,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14604 states to 14604 states and 44151 transitions. [2019-12-07 11:01:29,724 INFO L78 Accepts]: Start accepts. Automaton has 14604 states and 44151 transitions. Word has length 42 [2019-12-07 11:01:29,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:29,724 INFO L462 AbstractCegarLoop]: Abstraction has 14604 states and 44151 transitions. [2019-12-07 11:01:29,724 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:01:29,724 INFO L276 IsEmpty]: Start isEmpty. Operand 14604 states and 44151 transitions. [2019-12-07 11:01:29,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:01:29,736 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:29,737 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:29,737 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:29,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:29,737 INFO L82 PathProgramCache]: Analyzing trace with hash 1653836464, now seen corresponding path program 1 times [2019-12-07 11:01:29,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:29,737 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346536335] [2019-12-07 11:01:29,737 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:29,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:29,878 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:29,879 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346536335] [2019-12-07 11:01:29,879 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:29,879 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:01:29,879 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1298661453] [2019-12-07 11:01:29,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:01:29,879 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:29,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:01:29,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:01:29,880 INFO L87 Difference]: Start difference. First operand 14604 states and 44151 transitions. Second operand 10 states. [2019-12-07 11:01:33,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:33,527 INFO L93 Difference]: Finished difference Result 29582 states and 87648 transitions. [2019-12-07 11:01:33,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 11:01:33,528 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 11:01:33,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:33,568 INFO L225 Difference]: With dead ends: 29582 [2019-12-07 11:01:33,568 INFO L226 Difference]: Without dead ends: 29582 [2019-12-07 11:01:33,569 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 150 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=163, Invalid=593, Unknown=0, NotChecked=0, Total=756 [2019-12-07 11:01:33,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29582 states. [2019-12-07 11:01:33,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29582 to 19522. [2019-12-07 11:01:33,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19522 states. [2019-12-07 11:01:33,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19522 states to 19522 states and 58816 transitions. [2019-12-07 11:01:33,938 INFO L78 Accepts]: Start accepts. Automaton has 19522 states and 58816 transitions. Word has length 66 [2019-12-07 11:01:33,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:33,938 INFO L462 AbstractCegarLoop]: Abstraction has 19522 states and 58816 transitions. [2019-12-07 11:01:33,939 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:01:33,939 INFO L276 IsEmpty]: Start isEmpty. Operand 19522 states and 58816 transitions. [2019-12-07 11:01:33,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:01:33,956 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:33,956 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:33,956 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:33,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:33,956 INFO L82 PathProgramCache]: Analyzing trace with hash 1461344798, now seen corresponding path program 2 times [2019-12-07 11:01:33,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:33,957 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499492535] [2019-12-07 11:01:33,957 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:33,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:34,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:34,108 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499492535] [2019-12-07 11:01:34,108 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:34,108 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:01:34,108 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1600403763] [2019-12-07 11:01:34,109 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:01:34,109 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:34,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:01:34,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:01:34,109 INFO L87 Difference]: Start difference. First operand 19522 states and 58816 transitions. Second operand 10 states. [2019-12-07 11:01:35,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:35,598 INFO L93 Difference]: Finished difference Result 33000 states and 99256 transitions. [2019-12-07 11:01:35,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 11:01:35,599 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 11:01:35,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:35,629 INFO L225 Difference]: With dead ends: 33000 [2019-12-07 11:01:35,629 INFO L226 Difference]: Without dead ends: 24727 [2019-12-07 11:01:35,630 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=82, Invalid=338, Unknown=0, NotChecked=0, Total=420 [2019-12-07 11:01:35,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24727 states. [2019-12-07 11:01:35,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24727 to 21994. [2019-12-07 11:01:35,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21994 states. [2019-12-07 11:01:35,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21994 states to 21994 states and 65795 transitions. [2019-12-07 11:01:35,989 INFO L78 Accepts]: Start accepts. Automaton has 21994 states and 65795 transitions. Word has length 66 [2019-12-07 11:01:35,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:35,990 INFO L462 AbstractCegarLoop]: Abstraction has 21994 states and 65795 transitions. [2019-12-07 11:01:35,990 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:01:35,990 INFO L276 IsEmpty]: Start isEmpty. Operand 21994 states and 65795 transitions. [2019-12-07 11:01:36,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:01:36,010 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:36,010 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:36,010 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:36,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:36,010 INFO L82 PathProgramCache]: Analyzing trace with hash 1862643750, now seen corresponding path program 3 times [2019-12-07 11:01:36,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:36,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711147033] [2019-12-07 11:01:36,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:36,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:36,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:36,175 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711147033] [2019-12-07 11:01:36,175 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:36,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:01:36,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414313845] [2019-12-07 11:01:36,175 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:01:36,175 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:36,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:01:36,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:01:36,176 INFO L87 Difference]: Start difference. First operand 21994 states and 65795 transitions. Second operand 11 states. [2019-12-07 11:01:37,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:37,271 INFO L93 Difference]: Finished difference Result 30103 states and 89153 transitions. [2019-12-07 11:01:37,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 11:01:37,272 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 11:01:37,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:37,301 INFO L225 Difference]: With dead ends: 30103 [2019-12-07 11:01:37,301 INFO L226 Difference]: Without dead ends: 24623 [2019-12-07 11:01:37,301 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=94, Invalid=412, Unknown=0, NotChecked=0, Total=506 [2019-12-07 11:01:37,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24623 states. [2019-12-07 11:01:37,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24623 to 22036. [2019-12-07 11:01:37,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22036 states. [2019-12-07 11:01:37,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22036 states to 22036 states and 65838 transitions. [2019-12-07 11:01:37,638 INFO L78 Accepts]: Start accepts. Automaton has 22036 states and 65838 transitions. Word has length 66 [2019-12-07 11:01:37,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:37,639 INFO L462 AbstractCegarLoop]: Abstraction has 22036 states and 65838 transitions. [2019-12-07 11:01:37,639 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:01:37,639 INFO L276 IsEmpty]: Start isEmpty. Operand 22036 states and 65838 transitions. [2019-12-07 11:01:37,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:01:37,659 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:37,659 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:37,659 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:37,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:37,659 INFO L82 PathProgramCache]: Analyzing trace with hash 846611000, now seen corresponding path program 4 times [2019-12-07 11:01:37,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:37,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872514995] [2019-12-07 11:01:37,660 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:37,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:37,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:37,745 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1872514995] [2019-12-07 11:01:37,745 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:37,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:01:37,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [101868586] [2019-12-07 11:01:37,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 11:01:37,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:37,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 11:01:37,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:01:37,746 INFO L87 Difference]: Start difference. First operand 22036 states and 65838 transitions. Second operand 9 states. [2019-12-07 11:01:41,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:41,146 INFO L93 Difference]: Finished difference Result 38449 states and 113285 transitions. [2019-12-07 11:01:41,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 11:01:41,146 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 11:01:41,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:41,189 INFO L225 Difference]: With dead ends: 38449 [2019-12-07 11:01:41,189 INFO L226 Difference]: Without dead ends: 38233 [2019-12-07 11:01:41,190 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=488, Unknown=0, NotChecked=0, Total=600 [2019-12-07 11:01:41,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38233 states. [2019-12-07 11:01:41,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38233 to 24254. [2019-12-07 11:01:41,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24254 states. [2019-12-07 11:01:41,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24254 states to 24254 states and 72423 transitions. [2019-12-07 11:01:41,662 INFO L78 Accepts]: Start accepts. Automaton has 24254 states and 72423 transitions. Word has length 66 [2019-12-07 11:01:41,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:41,662 INFO L462 AbstractCegarLoop]: Abstraction has 24254 states and 72423 transitions. [2019-12-07 11:01:41,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 11:01:41,662 INFO L276 IsEmpty]: Start isEmpty. Operand 24254 states and 72423 transitions. [2019-12-07 11:01:41,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:01:41,682 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:41,682 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:41,682 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:41,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:41,683 INFO L82 PathProgramCache]: Analyzing trace with hash 1362505834, now seen corresponding path program 5 times [2019-12-07 11:01:41,683 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:41,683 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047163319] [2019-12-07 11:01:41,683 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:41,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:41,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:41,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047163319] [2019-12-07 11:01:41,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:41,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:01:41,963 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691756199] [2019-12-07 11:01:41,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:01:41,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:41,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:01:41,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:01:41,963 INFO L87 Difference]: Start difference. First operand 24254 states and 72423 transitions. Second operand 15 states. [2019-12-07 11:01:47,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:47,702 INFO L93 Difference]: Finished difference Result 41752 states and 122109 transitions. [2019-12-07 11:01:47,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 11:01:47,703 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 11:01:47,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:47,753 INFO L225 Difference]: With dead ends: 41752 [2019-12-07 11:01:47,754 INFO L226 Difference]: Without dead ends: 36186 [2019-12-07 11:01:47,754 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 293 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=210, Invalid=1122, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 11:01:47,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36186 states. [2019-12-07 11:01:48,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36186 to 25186. [2019-12-07 11:01:48,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25186 states. [2019-12-07 11:01:48,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25186 states to 25186 states and 75087 transitions. [2019-12-07 11:01:48,218 INFO L78 Accepts]: Start accepts. Automaton has 25186 states and 75087 transitions. Word has length 66 [2019-12-07 11:01:48,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:48,218 INFO L462 AbstractCegarLoop]: Abstraction has 25186 states and 75087 transitions. [2019-12-07 11:01:48,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:01:48,218 INFO L276 IsEmpty]: Start isEmpty. Operand 25186 states and 75087 transitions. [2019-12-07 11:01:48,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:01:48,243 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:48,243 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:48,243 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:48,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:48,243 INFO L82 PathProgramCache]: Analyzing trace with hash 1617040844, now seen corresponding path program 6 times [2019-12-07 11:01:48,244 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:48,244 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [256533256] [2019-12-07 11:01:48,244 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:48,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:48,355 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:48,355 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [256533256] [2019-12-07 11:01:48,356 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:48,356 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:01:48,356 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031875428] [2019-12-07 11:01:48,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:01:48,356 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:48,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:01:48,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:01:48,356 INFO L87 Difference]: Start difference. First operand 25186 states and 75087 transitions. Second operand 10 states. [2019-12-07 11:01:49,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:49,144 INFO L93 Difference]: Finished difference Result 62434 states and 186671 transitions. [2019-12-07 11:01:49,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 11:01:49,144 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 11:01:49,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:49,217 INFO L225 Difference]: With dead ends: 62434 [2019-12-07 11:01:49,218 INFO L226 Difference]: Without dead ends: 55799 [2019-12-07 11:01:49,218 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2019-12-07 11:01:49,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55799 states. [2019-12-07 11:01:49,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55799 to 32034. [2019-12-07 11:01:49,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32034 states. [2019-12-07 11:01:49,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32034 states to 32034 states and 95299 transitions. [2019-12-07 11:01:49,895 INFO L78 Accepts]: Start accepts. Automaton has 32034 states and 95299 transitions. Word has length 66 [2019-12-07 11:01:49,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:49,895 INFO L462 AbstractCegarLoop]: Abstraction has 32034 states and 95299 transitions. [2019-12-07 11:01:49,895 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:01:49,895 INFO L276 IsEmpty]: Start isEmpty. Operand 32034 states and 95299 transitions. [2019-12-07 11:01:49,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:01:49,926 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:49,926 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:49,926 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:49,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:49,926 INFO L82 PathProgramCache]: Analyzing trace with hash 1762434124, now seen corresponding path program 7 times [2019-12-07 11:01:49,927 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:49,927 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846641864] [2019-12-07 11:01:49,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:49,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:50,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:50,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846641864] [2019-12-07 11:01:50,034 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:50,034 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:01:50,034 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605513280] [2019-12-07 11:01:50,035 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:01:50,035 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:50,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:01:50,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:01:50,035 INFO L87 Difference]: Start difference. First operand 32034 states and 95299 transitions. Second operand 10 states. [2019-12-07 11:01:51,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:51,330 INFO L93 Difference]: Finished difference Result 41590 states and 121879 transitions. [2019-12-07 11:01:51,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 11:01:51,331 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 11:01:51,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:51,385 INFO L225 Difference]: With dead ends: 41590 [2019-12-07 11:01:51,385 INFO L226 Difference]: Without dead ends: 37195 [2019-12-07 11:01:51,385 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-12-07 11:01:51,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37195 states. [2019-12-07 11:01:51,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37195 to 31782. [2019-12-07 11:01:51,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31782 states. [2019-12-07 11:01:51,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31782 states to 31782 states and 94166 transitions. [2019-12-07 11:01:51,904 INFO L78 Accepts]: Start accepts. Automaton has 31782 states and 94166 transitions. Word has length 66 [2019-12-07 11:01:51,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:51,905 INFO L462 AbstractCegarLoop]: Abstraction has 31782 states and 94166 transitions. [2019-12-07 11:01:51,905 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:01:51,905 INFO L276 IsEmpty]: Start isEmpty. Operand 31782 states and 94166 transitions. [2019-12-07 11:01:51,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:01:51,935 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:51,935 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:51,935 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:51,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:51,935 INFO L82 PathProgramCache]: Analyzing trace with hash 40066062, now seen corresponding path program 8 times [2019-12-07 11:01:51,936 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:01:51,936 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626468274] [2019-12-07 11:01:51,936 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:51,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:52,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:52,278 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626468274] [2019-12-07 11:01:52,278 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:52,278 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:01:52,278 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2037602831] [2019-12-07 11:01:52,278 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:01:52,278 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:01:52,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:01:52,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=204, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:01:52,278 INFO L87 Difference]: Start difference. First operand 31782 states and 94166 transitions. Second operand 16 states. [2019-12-07 11:02:01,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:01,355 INFO L93 Difference]: Finished difference Result 74664 states and 218096 transitions. [2019-12-07 11:02:01,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2019-12-07 11:02:01,356 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 66 [2019-12-07 11:02:01,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:01,469 INFO L225 Difference]: With dead ends: 74664 [2019-12-07 11:02:01,469 INFO L226 Difference]: Without dead ends: 73263 [2019-12-07 11:02:01,470 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1101 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=526, Invalid=3380, Unknown=0, NotChecked=0, Total=3906 [2019-12-07 11:02:01,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73263 states. [2019-12-07 11:02:02,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73263 to 33458. [2019-12-07 11:02:02,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33458 states. [2019-12-07 11:02:02,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33458 states to 33458 states and 99381 transitions. [2019-12-07 11:02:02,312 INFO L78 Accepts]: Start accepts. Automaton has 33458 states and 99381 transitions. Word has length 66 [2019-12-07 11:02:02,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:02,312 INFO L462 AbstractCegarLoop]: Abstraction has 33458 states and 99381 transitions. [2019-12-07 11:02:02,312 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:02:02,312 INFO L276 IsEmpty]: Start isEmpty. Operand 33458 states and 99381 transitions. [2019-12-07 11:02:02,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:02:02,344 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:02,344 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:02,344 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:02,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:02,345 INFO L82 PathProgramCache]: Analyzing trace with hash 185459342, now seen corresponding path program 9 times [2019-12-07 11:02:02,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:02,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [20766083] [2019-12-07 11:02:02,345 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:02,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:02,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:02,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [20766083] [2019-12-07 11:02:02,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:02,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:02:02,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1650989251] [2019-12-07 11:02:02,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:02:02,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:02:02,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:02:02,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:02:02,458 INFO L87 Difference]: Start difference. First operand 33458 states and 99381 transitions. Second operand 11 states. [2019-12-07 11:02:04,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:04,587 INFO L93 Difference]: Finished difference Result 61485 states and 181798 transitions. [2019-12-07 11:02:04,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 11:02:04,588 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 11:02:04,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:04,637 INFO L225 Difference]: With dead ends: 61485 [2019-12-07 11:02:04,637 INFO L226 Difference]: Without dead ends: 41344 [2019-12-07 11:02:04,638 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 192 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=183, Invalid=747, Unknown=0, NotChecked=0, Total=930 [2019-12-07 11:02:04,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41344 states. [2019-12-07 11:02:05,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41344 to 25224. [2019-12-07 11:02:05,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25224 states. [2019-12-07 11:02:05,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25224 states to 25224 states and 74604 transitions. [2019-12-07 11:02:05,145 INFO L78 Accepts]: Start accepts. Automaton has 25224 states and 74604 transitions. Word has length 66 [2019-12-07 11:02:05,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:05,145 INFO L462 AbstractCegarLoop]: Abstraction has 25224 states and 74604 transitions. [2019-12-07 11:02:05,145 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:02:05,145 INFO L276 IsEmpty]: Start isEmpty. Operand 25224 states and 74604 transitions. [2019-12-07 11:02:05,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:02:05,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:05,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:05,170 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:05,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:05,171 INFO L82 PathProgramCache]: Analyzing trace with hash -485440018, now seen corresponding path program 10 times [2019-12-07 11:02:05,171 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:05,171 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414838966] [2019-12-07 11:02:05,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:05,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:05,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:05,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414838966] [2019-12-07 11:02:05,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:05,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:02:05,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [32592798] [2019-12-07 11:02:05,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 11:02:05,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:02:05,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 11:02:05,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:02:05,254 INFO L87 Difference]: Start difference. First operand 25224 states and 74604 transitions. Second operand 9 states. [2019-12-07 11:02:08,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:08,024 INFO L93 Difference]: Finished difference Result 42508 states and 123718 transitions. [2019-12-07 11:02:08,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 11:02:08,026 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 11:02:08,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:08,094 INFO L225 Difference]: With dead ends: 42508 [2019-12-07 11:02:08,094 INFO L226 Difference]: Without dead ends: 42052 [2019-12-07 11:02:08,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=105, Invalid=447, Unknown=0, NotChecked=0, Total=552 [2019-12-07 11:02:08,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42052 states. [2019-12-07 11:02:08,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42052 to 24861. [2019-12-07 11:02:08,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24861 states. [2019-12-07 11:02:08,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24861 states to 24861 states and 73811 transitions. [2019-12-07 11:02:08,597 INFO L78 Accepts]: Start accepts. Automaton has 24861 states and 73811 transitions. Word has length 66 [2019-12-07 11:02:08,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:08,597 INFO L462 AbstractCegarLoop]: Abstraction has 24861 states and 73811 transitions. [2019-12-07 11:02:08,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 11:02:08,597 INFO L276 IsEmpty]: Start isEmpty. Operand 24861 states and 73811 transitions. [2019-12-07 11:02:08,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:02:08,622 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:08,622 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:08,622 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:08,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:08,622 INFO L82 PathProgramCache]: Analyzing trace with hash -222742524, now seen corresponding path program 11 times [2019-12-07 11:02:08,622 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:08,623 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472651424] [2019-12-07 11:02:08,623 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:08,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:08,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:08,681 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472651424] [2019-12-07 11:02:08,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:08,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:02:08,681 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511829349] [2019-12-07 11:02:08,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:02:08,681 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:02:08,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:02:08,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:02:08,682 INFO L87 Difference]: Start difference. First operand 24861 states and 73811 transitions. Second operand 4 states. [2019-12-07 11:02:08,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:08,784 INFO L93 Difference]: Finished difference Result 28611 states and 85346 transitions. [2019-12-07 11:02:08,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:02:08,785 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 11:02:08,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:08,820 INFO L225 Difference]: With dead ends: 28611 [2019-12-07 11:02:08,820 INFO L226 Difference]: Without dead ends: 28611 [2019-12-07 11:02:08,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:02:08,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28611 states. [2019-12-07 11:02:09,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28611 to 21778. [2019-12-07 11:02:09,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21778 states. [2019-12-07 11:02:09,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21778 states to 21778 states and 65533 transitions. [2019-12-07 11:02:09,202 INFO L78 Accepts]: Start accepts. Automaton has 21778 states and 65533 transitions. Word has length 66 [2019-12-07 11:02:09,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:09,202 INFO L462 AbstractCegarLoop]: Abstraction has 21778 states and 65533 transitions. [2019-12-07 11:02:09,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:02:09,202 INFO L276 IsEmpty]: Start isEmpty. Operand 21778 states and 65533 transitions. [2019-12-07 11:02:09,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:02:09,222 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:09,222 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:09,222 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:09,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:09,223 INFO L82 PathProgramCache]: Analyzing trace with hash -472703480, now seen corresponding path program 1 times [2019-12-07 11:02:09,223 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:09,223 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70831716] [2019-12-07 11:02:09,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:09,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:09,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:09,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70831716] [2019-12-07 11:02:09,304 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:09,304 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:02:09,304 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [130467956] [2019-12-07 11:02:09,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 11:02:09,304 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:02:09,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 11:02:09,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:02:09,304 INFO L87 Difference]: Start difference. First operand 21778 states and 65533 transitions. Second operand 9 states. [2019-12-07 11:02:11,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:11,603 INFO L93 Difference]: Finished difference Result 34124 states and 100557 transitions. [2019-12-07 11:02:11,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 11:02:11,604 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 11:02:11,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:11,659 INFO L225 Difference]: With dead ends: 34124 [2019-12-07 11:02:11,659 INFO L226 Difference]: Without dead ends: 34124 [2019-12-07 11:02:11,660 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=112, Invalid=488, Unknown=0, NotChecked=0, Total=600 [2019-12-07 11:02:11,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34124 states. [2019-12-07 11:02:12,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34124 to 23085. [2019-12-07 11:02:12,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23085 states. [2019-12-07 11:02:12,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23085 states to 23085 states and 69192 transitions. [2019-12-07 11:02:12,085 INFO L78 Accepts]: Start accepts. Automaton has 23085 states and 69192 transitions. Word has length 67 [2019-12-07 11:02:12,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:12,085 INFO L462 AbstractCegarLoop]: Abstraction has 23085 states and 69192 transitions. [2019-12-07 11:02:12,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 11:02:12,085 INFO L276 IsEmpty]: Start isEmpty. Operand 23085 states and 69192 transitions. [2019-12-07 11:02:12,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:02:12,106 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:12,106 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:12,107 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:12,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:12,107 INFO L82 PathProgramCache]: Analyzing trace with hash -1366538620, now seen corresponding path program 1 times [2019-12-07 11:02:12,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:12,107 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658568508] [2019-12-07 11:02:12,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:12,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:12,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:12,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658568508] [2019-12-07 11:02:12,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:12,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:02:12,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274385002] [2019-12-07 11:02:12,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:02:12,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:02:12,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:02:12,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:02:12,391 INFO L87 Difference]: Start difference. First operand 23085 states and 69192 transitions. Second operand 16 states. [2019-12-07 11:02:15,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:15,019 INFO L93 Difference]: Finished difference Result 27914 states and 82403 transitions. [2019-12-07 11:02:15,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 11:02:15,019 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 11:02:15,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:15,049 INFO L225 Difference]: With dead ends: 27914 [2019-12-07 11:02:15,049 INFO L226 Difference]: Without dead ends: 27275 [2019-12-07 11:02:15,050 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 275 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=184, Invalid=1076, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 11:02:15,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27275 states. [2019-12-07 11:02:15,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27275 to 23093. [2019-12-07 11:02:15,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23093 states. [2019-12-07 11:02:15,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23093 states to 23093 states and 69208 transitions. [2019-12-07 11:02:15,411 INFO L78 Accepts]: Start accepts. Automaton has 23093 states and 69208 transitions. Word has length 67 [2019-12-07 11:02:15,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:15,411 INFO L462 AbstractCegarLoop]: Abstraction has 23093 states and 69208 transitions. [2019-12-07 11:02:15,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:02:15,411 INFO L276 IsEmpty]: Start isEmpty. Operand 23093 states and 69208 transitions. [2019-12-07 11:02:15,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:02:15,432 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:15,432 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:15,432 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:15,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:15,432 INFO L82 PathProgramCache]: Analyzing trace with hash -222673432, now seen corresponding path program 2 times [2019-12-07 11:02:15,432 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:15,433 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072119672] [2019-12-07 11:02:15,433 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:15,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:15,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:15,572 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1072119672] [2019-12-07 11:02:15,572 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:15,572 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:02:15,572 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2081116953] [2019-12-07 11:02:15,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:02:15,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:02:15,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:02:15,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:02:15,573 INFO L87 Difference]: Start difference. First operand 23093 states and 69208 transitions. Second operand 12 states. [2019-12-07 11:02:16,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:16,379 INFO L93 Difference]: Finished difference Result 38644 states and 115488 transitions. [2019-12-07 11:02:16,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 11:02:16,380 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 11:02:16,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:16,431 INFO L225 Difference]: With dead ends: 38644 [2019-12-07 11:02:16,431 INFO L226 Difference]: Without dead ends: 37409 [2019-12-07 11:02:16,431 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=143, Invalid=669, Unknown=0, NotChecked=0, Total=812 [2019-12-07 11:02:16,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37409 states. [2019-12-07 11:02:16,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37409 to 22233. [2019-12-07 11:02:16,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22233 states. [2019-12-07 11:02:16,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22233 states to 22233 states and 66872 transitions. [2019-12-07 11:02:16,857 INFO L78 Accepts]: Start accepts. Automaton has 22233 states and 66872 transitions. Word has length 67 [2019-12-07 11:02:16,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:16,857 INFO L462 AbstractCegarLoop]: Abstraction has 22233 states and 66872 transitions. [2019-12-07 11:02:16,857 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:02:16,858 INFO L276 IsEmpty]: Start isEmpty. Operand 22233 states and 66872 transitions. [2019-12-07 11:02:16,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:02:16,876 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:16,876 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:16,876 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:16,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:16,877 INFO L82 PathProgramCache]: Analyzing trace with hash 63997864, now seen corresponding path program 2 times [2019-12-07 11:02:16,877 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:16,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963213141] [2019-12-07 11:02:16,877 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:16,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:16,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:16,983 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963213141] [2019-12-07 11:02:16,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:16,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:02:16,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949137484] [2019-12-07 11:02:16,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:02:16,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:02:16,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:02:16,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:02:16,984 INFO L87 Difference]: Start difference. First operand 22233 states and 66872 transitions. Second operand 10 states. [2019-12-07 11:02:18,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:18,339 INFO L93 Difference]: Finished difference Result 36929 states and 108752 transitions. [2019-12-07 11:02:18,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 11:02:18,339 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 11:02:18,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:18,381 INFO L225 Difference]: With dead ends: 36929 [2019-12-07 11:02:18,381 INFO L226 Difference]: Without dead ends: 36929 [2019-12-07 11:02:18,382 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 150 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=163, Invalid=593, Unknown=0, NotChecked=0, Total=756 [2019-12-07 11:02:18,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36929 states. [2019-12-07 11:02:18,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36929 to 22263. [2019-12-07 11:02:18,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22263 states. [2019-12-07 11:02:18,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22263 states to 22263 states and 66848 transitions. [2019-12-07 11:02:18,813 INFO L78 Accepts]: Start accepts. Automaton has 22263 states and 66848 transitions. Word has length 67 [2019-12-07 11:02:18,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:18,813 INFO L462 AbstractCegarLoop]: Abstraction has 22263 states and 66848 transitions. [2019-12-07 11:02:18,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:02:18,813 INFO L276 IsEmpty]: Start isEmpty. Operand 22263 states and 66848 transitions. [2019-12-07 11:02:18,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:02:18,832 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:18,832 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:18,832 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:18,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:18,832 INFO L82 PathProgramCache]: Analyzing trace with hash 1827328022, now seen corresponding path program 3 times [2019-12-07 11:02:18,833 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:18,833 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461188839] [2019-12-07 11:02:18,833 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:18,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:18,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:18,887 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [461188839] [2019-12-07 11:02:18,887 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:18,887 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:02:18,887 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809307047] [2019-12-07 11:02:18,887 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:02:18,887 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:02:18,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:02:18,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:02:18,888 INFO L87 Difference]: Start difference. First operand 22263 states and 66848 transitions. Second operand 5 states. [2019-12-07 11:02:18,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:18,986 INFO L93 Difference]: Finished difference Result 22045 states and 65822 transitions. [2019-12-07 11:02:18,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:02:18,986 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 11:02:18,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:19,010 INFO L225 Difference]: With dead ends: 22045 [2019-12-07 11:02:19,010 INFO L226 Difference]: Without dead ends: 22045 [2019-12-07 11:02:19,011 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:02:19,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22045 states. [2019-12-07 11:02:19,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22045 to 19351. [2019-12-07 11:02:19,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19351 states. [2019-12-07 11:02:19,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19351 states to 19351 states and 57717 transitions. [2019-12-07 11:02:19,305 INFO L78 Accepts]: Start accepts. Automaton has 19351 states and 57717 transitions. Word has length 67 [2019-12-07 11:02:19,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:19,305 INFO L462 AbstractCegarLoop]: Abstraction has 19351 states and 57717 transitions. [2019-12-07 11:02:19,305 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:02:19,305 INFO L276 IsEmpty]: Start isEmpty. Operand 19351 states and 57717 transitions. [2019-12-07 11:02:19,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:02:19,321 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:19,321 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:19,321 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:19,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:19,321 INFO L82 PathProgramCache]: Analyzing trace with hash -1210625396, now seen corresponding path program 3 times [2019-12-07 11:02:19,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:02:19,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959057354] [2019-12-07 11:02:19,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:19,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:02:19,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:02:19,391 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:02:19,391 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:02:19,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t68~0.base_32|) (= 0 v_~x~0_134) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t68~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t68~0.base_32|) |v_ULTIMATE.start_main_~#t68~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t68~0.base_32|)) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~z$read_delayed~0_6 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t68~0.base_32| 1)) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= |v_ULTIMATE.start_main_~#t68~0.offset_23| 0) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t68~0.base_32| 4)) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ULTIMATE.start_main_~#t68~0.offset=|v_ULTIMATE.start_main_~#t68~0.offset_23|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t70~0.offset=|v_ULTIMATE.start_main_~#t70~0.offset_14|, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_~#t70~0.base=|v_ULTIMATE.start_main_~#t70~0.base_16|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ULTIMATE.start_main_~#t69~0.offset=|v_ULTIMATE.start_main_~#t69~0.offset_22|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ~y~0=v_~y~0_24, ULTIMATE.start_main_~#t69~0.base=|v_ULTIMATE.start_main_~#t69~0.base_29|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t68~0.base=|v_ULTIMATE.start_main_~#t68~0.base_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t68~0.offset, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t70~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_~#t70~0.base, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ULTIMATE.start_main_~#t69~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ULTIMATE.start_main_~#t69~0.base, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t68~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:02:19,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (= ~__unbuffered_p0_EAX~0_Out-1055924683 ~x~0_In-1055924683) (= ~z$r_buff0_thd0~0_In-1055924683 ~z$r_buff1_thd0~0_Out-1055924683) (= 1 ~z$r_buff0_thd1~0_Out-1055924683) (= ~z$r_buff0_thd3~0_In-1055924683 ~z$r_buff1_thd3~0_Out-1055924683) (= ~z$r_buff0_thd2~0_In-1055924683 ~z$r_buff1_thd2~0_Out-1055924683) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1055924683)) (= ~z$r_buff1_thd1~0_Out-1055924683 ~z$r_buff0_thd1~0_In-1055924683)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1055924683, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1055924683, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1055924683, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1055924683, ~x~0=~x~0_In-1055924683, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1055924683} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-1055924683, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1055924683, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-1055924683, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-1055924683, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-1055924683, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-1055924683, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1055924683, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1055924683, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1055924683, ~x~0=~x~0_In-1055924683, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1055924683} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:02:19,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t69~0.offset_10| 0) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t69~0.base_11|) 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t69~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t69~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t69~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t69~0.base_11|) |v_ULTIMATE.start_main_~#t69~0.offset_10| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t69~0.base_11|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t69~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t69~0.offset=|v_ULTIMATE.start_main_~#t69~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t69~0.base=|v_ULTIMATE.start_main_~#t69~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t69~0.offset, #length, ULTIMATE.start_main_~#t69~0.base] because there is no mapped edge [2019-12-07 11:02:19,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1154739416| |P1Thread1of1ForFork2_#t~ite10_Out1154739416|)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1154739416 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1154739416 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1154739416| ~z$w_buff1~0_In1154739416) .cse2) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1154739416| ~z~0_In1154739416) .cse2 (or .cse0 .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1154739416, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1154739416, ~z$w_buff1~0=~z$w_buff1~0_In1154739416, ~z~0=~z~0_In1154739416} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1154739416|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1154739416, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1154739416|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1154739416, ~z$w_buff1~0=~z$w_buff1~0_In1154739416, ~z~0=~z~0_In1154739416} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:02:19,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1118946950 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1118946950 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-1118946950| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-1118946950| ~z$w_buff0_used~0_In-1118946950)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1118946950, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1118946950} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1118946950, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1118946950|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1118946950} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:02:19,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (not (= |v_ULTIMATE.start_main_~#t70~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t70~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t70~0.base_11|) |v_ULTIMATE.start_main_~#t70~0.offset_10| 2)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t70~0.base_11| 1) |v_#valid_31|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t70~0.base_11| 4)) (= 0 |v_ULTIMATE.start_main_~#t70~0.offset_10|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t70~0.base_11|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t70~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t70~0.offset=|v_ULTIMATE.start_main_~#t70~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t70~0.base=|v_ULTIMATE.start_main_~#t70~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t70~0.offset, ULTIMATE.start_main_~#t70~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 11:02:19,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In675150 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In675150 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out675150|) (not .cse1)) (and (= ~z$w_buff0_used~0_In675150 |P0Thread1of1ForFork1_#t~ite5_Out675150|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In675150, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In675150} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out675150|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In675150, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In675150} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:02:19,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd1~0_In-400506397 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-400506397 256))) (.cse0 (= (mod ~z$r_buff1_thd1~0_In-400506397 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-400506397 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-400506397|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-400506397 |P0Thread1of1ForFork1_#t~ite6_Out-400506397|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-400506397, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-400506397, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-400506397, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-400506397} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-400506397, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-400506397|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-400506397, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-400506397, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-400506397} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:02:19,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1651532334 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1651532334 256))) (.cse1 (= ~z$r_buff0_thd1~0_In-1651532334 ~z$r_buff0_thd1~0_Out-1651532334))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~z$r_buff0_thd1~0_Out-1651532334) (not .cse0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1651532334, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1651532334} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1651532334, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1651532334|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1651532334} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:02:19,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In1251043349 256))) (.cse2 (= (mod ~z$r_buff1_thd1~0_In1251043349 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1251043349 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1251043349 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out1251043349| ~z$r_buff1_thd1~0_In1251043349) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1251043349| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1251043349, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1251043349, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1251043349, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1251043349} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1251043349|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1251043349, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1251043349, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1251043349, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1251043349} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:02:19,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:02:19,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In-1945710058 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1945710058 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1945710058 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-1945710058 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1945710058| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1945710058| ~z$w_buff1_used~0_In-1945710058) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1945710058, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1945710058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1945710058, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1945710058} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1945710058, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1945710058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1945710058, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1945710058|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1945710058} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:02:19,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In394060591 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In394060591 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out394060591|)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In394060591 |P1Thread1of1ForFork2_#t~ite13_Out394060591|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In394060591, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In394060591} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In394060591, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out394060591|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In394060591} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:02:19,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In-1359036863 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-1359036863 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1359036863 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1359036863 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1359036863|)) (and (= ~z$r_buff1_thd2~0_In-1359036863 |P1Thread1of1ForFork2_#t~ite14_Out-1359036863|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1359036863, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1359036863, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1359036863, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1359036863} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1359036863, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1359036863, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1359036863, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1359036863|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1359036863} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:02:19,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:02:19,401 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-924551186 256)))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-924551186 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-924551186 256)) (and (= 0 (mod ~z$w_buff1_used~0_In-924551186 256)) .cse0) (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-924551186 256))))) (= |P2Thread1of1ForFork0_#t~ite29_Out-924551186| ~z$w_buff1_used~0_In-924551186) (= |P2Thread1of1ForFork0_#t~ite30_Out-924551186| |P2Thread1of1ForFork0_#t~ite29_Out-924551186|) .cse1) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite30_Out-924551186| ~z$w_buff1_used~0_In-924551186) (= |P2Thread1of1ForFork0_#t~ite29_In-924551186| |P2Thread1of1ForFork0_#t~ite29_Out-924551186|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-924551186, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-924551186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-924551186, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-924551186, ~weak$$choice2~0=~weak$$choice2~0_In-924551186, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-924551186|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-924551186, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-924551186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-924551186, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-924551186, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-924551186|, ~weak$$choice2~0=~weak$$choice2~0_In-924551186, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-924551186|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:02:19,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:02:19,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:02:19,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-398919585 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-398919585 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-398919585| ~z~0_In-398919585) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-398919585| ~z$w_buff1~0_In-398919585)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-398919585, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-398919585, ~z$w_buff1~0=~z$w_buff1~0_In-398919585, ~z~0=~z~0_In-398919585} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-398919585|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-398919585, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-398919585, ~z$w_buff1~0=~z$w_buff1~0_In-398919585, ~z~0=~z~0_In-398919585} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:02:19,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 11:02:19,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1609654400 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1609654400 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1609654400 |P2Thread1of1ForFork0_#t~ite40_Out-1609654400|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-1609654400|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1609654400, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1609654400} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1609654400, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1609654400|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1609654400} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:02:19,404 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-613781886 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-613781886 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-613781886 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-613781886 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-613781886| ~z$w_buff1_used~0_In-613781886) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-613781886| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-613781886, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-613781886, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-613781886, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-613781886} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-613781886, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-613781886, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-613781886, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-613781886, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-613781886|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:02:19,404 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1285336805 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1285336805 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1285336805| ~z$r_buff0_thd3~0_In-1285336805) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1285336805|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1285336805, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1285336805} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1285336805, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1285336805, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1285336805|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:02:19,404 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In-1377950829 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1377950829 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1377950829 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1377950829 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-1377950829| ~z$r_buff1_thd3~0_In-1377950829) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out-1377950829| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1377950829, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1377950829, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1377950829, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1377950829} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1377950829|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1377950829, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1377950829, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1377950829, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1377950829} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:02:19,404 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:02:19,405 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:02:19,405 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In95566669 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out95566669| |ULTIMATE.start_main_#t~ite47_Out95566669|)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In95566669 256)))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In95566669 |ULTIMATE.start_main_#t~ite47_Out95566669|)) (and (= |ULTIMATE.start_main_#t~ite47_Out95566669| ~z$w_buff1~0_In95566669) (not .cse1) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In95566669, ~z$w_buff1_used~0=~z$w_buff1_used~0_In95566669, ~z$w_buff1~0=~z$w_buff1~0_In95566669, ~z~0=~z~0_In95566669} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In95566669, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out95566669|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In95566669, ~z$w_buff1~0=~z$w_buff1~0_In95566669, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out95566669|, ~z~0=~z~0_In95566669} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:02:19,405 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-281726417 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-281726417 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-281726417| ~z$w_buff0_used~0_In-281726417) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-281726417| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-281726417, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-281726417} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-281726417, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-281726417, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-281726417|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:02:19,406 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1475654853 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1475654853 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1475654853 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-1475654853 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1475654853|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1475654853 |ULTIMATE.start_main_#t~ite50_Out-1475654853|) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1475654853, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1475654853, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1475654853, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1475654853} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1475654853|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1475654853, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1475654853, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1475654853, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1475654853} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:02:19,406 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1674160724 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1674160724 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1674160724|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd0~0_In-1674160724 |ULTIMATE.start_main_#t~ite51_Out-1674160724|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1674160724, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1674160724} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1674160724, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1674160724|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1674160724} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:02:19,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In1320717993 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1320717993 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1320717993 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1320717993 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1320717993| ~z$r_buff1_thd0~0_In1320717993) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out1320717993| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1320717993, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1320717993, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1320717993, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1320717993} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1320717993|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1320717993, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1320717993, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1320717993, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1320717993} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:02:19,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:02:19,456 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:02:19 BasicIcfg [2019-12-07 11:02:19,456 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:02:19,456 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:02:19,456 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:02:19,457 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:02:19,457 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:58:58" (3/4) ... [2019-12-07 11:02:19,458 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:02:19,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t68~0.base_32|) (= 0 v_~x~0_134) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t68~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t68~0.base_32|) |v_ULTIMATE.start_main_~#t68~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t68~0.base_32|)) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~z$read_delayed~0_6 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t68~0.base_32| 1)) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= |v_ULTIMATE.start_main_~#t68~0.offset_23| 0) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t68~0.base_32| 4)) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ULTIMATE.start_main_~#t68~0.offset=|v_ULTIMATE.start_main_~#t68~0.offset_23|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t70~0.offset=|v_ULTIMATE.start_main_~#t70~0.offset_14|, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_~#t70~0.base=|v_ULTIMATE.start_main_~#t70~0.base_16|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ULTIMATE.start_main_~#t69~0.offset=|v_ULTIMATE.start_main_~#t69~0.offset_22|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ~y~0=v_~y~0_24, ULTIMATE.start_main_~#t69~0.base=|v_ULTIMATE.start_main_~#t69~0.base_29|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t68~0.base=|v_ULTIMATE.start_main_~#t68~0.base_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t68~0.offset, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t70~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_~#t70~0.base, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ULTIMATE.start_main_~#t69~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ULTIMATE.start_main_~#t69~0.base, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t68~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:02:19,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (= ~__unbuffered_p0_EAX~0_Out-1055924683 ~x~0_In-1055924683) (= ~z$r_buff0_thd0~0_In-1055924683 ~z$r_buff1_thd0~0_Out-1055924683) (= 1 ~z$r_buff0_thd1~0_Out-1055924683) (= ~z$r_buff0_thd3~0_In-1055924683 ~z$r_buff1_thd3~0_Out-1055924683) (= ~z$r_buff0_thd2~0_In-1055924683 ~z$r_buff1_thd2~0_Out-1055924683) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1055924683)) (= ~z$r_buff1_thd1~0_Out-1055924683 ~z$r_buff0_thd1~0_In-1055924683)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1055924683, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1055924683, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1055924683, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1055924683, ~x~0=~x~0_In-1055924683, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1055924683} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-1055924683, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1055924683, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-1055924683, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-1055924683, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-1055924683, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-1055924683, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1055924683, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1055924683, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1055924683, ~x~0=~x~0_In-1055924683, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1055924683} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:02:19,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t69~0.offset_10| 0) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t69~0.base_11|) 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t69~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t69~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t69~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t69~0.base_11|) |v_ULTIMATE.start_main_~#t69~0.offset_10| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t69~0.base_11|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t69~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t69~0.offset=|v_ULTIMATE.start_main_~#t69~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t69~0.base=|v_ULTIMATE.start_main_~#t69~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t69~0.offset, #length, ULTIMATE.start_main_~#t69~0.base] because there is no mapped edge [2019-12-07 11:02:19,460 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1154739416| |P1Thread1of1ForFork2_#t~ite10_Out1154739416|)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1154739416 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1154739416 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1154739416| ~z$w_buff1~0_In1154739416) .cse2) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1154739416| ~z~0_In1154739416) .cse2 (or .cse0 .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1154739416, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1154739416, ~z$w_buff1~0=~z$w_buff1~0_In1154739416, ~z~0=~z~0_In1154739416} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1154739416|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1154739416, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1154739416|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1154739416, ~z$w_buff1~0=~z$w_buff1~0_In1154739416, ~z~0=~z~0_In1154739416} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:02:19,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1118946950 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1118946950 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-1118946950| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-1118946950| ~z$w_buff0_used~0_In-1118946950)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1118946950, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1118946950} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1118946950, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1118946950|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1118946950} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:02:19,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (not (= |v_ULTIMATE.start_main_~#t70~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t70~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t70~0.base_11|) |v_ULTIMATE.start_main_~#t70~0.offset_10| 2)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t70~0.base_11| 1) |v_#valid_31|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t70~0.base_11| 4)) (= 0 |v_ULTIMATE.start_main_~#t70~0.offset_10|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t70~0.base_11|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t70~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t70~0.offset=|v_ULTIMATE.start_main_~#t70~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t70~0.base=|v_ULTIMATE.start_main_~#t70~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t70~0.offset, ULTIMATE.start_main_~#t70~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 11:02:19,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In675150 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In675150 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out675150|) (not .cse1)) (and (= ~z$w_buff0_used~0_In675150 |P0Thread1of1ForFork1_#t~ite5_Out675150|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In675150, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In675150} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out675150|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In675150, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In675150} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:02:19,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd1~0_In-400506397 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-400506397 256))) (.cse0 (= (mod ~z$r_buff1_thd1~0_In-400506397 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-400506397 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-400506397|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-400506397 |P0Thread1of1ForFork1_#t~ite6_Out-400506397|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-400506397, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-400506397, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-400506397, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-400506397} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-400506397, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-400506397|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-400506397, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-400506397, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-400506397} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:02:19,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1651532334 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1651532334 256))) (.cse1 (= ~z$r_buff0_thd1~0_In-1651532334 ~z$r_buff0_thd1~0_Out-1651532334))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~z$r_buff0_thd1~0_Out-1651532334) (not .cse0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1651532334, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1651532334} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1651532334, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1651532334|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1651532334} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:02:19,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In1251043349 256))) (.cse2 (= (mod ~z$r_buff1_thd1~0_In1251043349 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1251043349 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1251043349 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out1251043349| ~z$r_buff1_thd1~0_In1251043349) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1251043349| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1251043349, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1251043349, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1251043349, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1251043349} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1251043349|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1251043349, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1251043349, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1251043349, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1251043349} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:02:19,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:02:19,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In-1945710058 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1945710058 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1945710058 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-1945710058 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1945710058| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1945710058| ~z$w_buff1_used~0_In-1945710058) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1945710058, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1945710058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1945710058, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1945710058} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1945710058, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1945710058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1945710058, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1945710058|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1945710058} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:02:19,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In394060591 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In394060591 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out394060591|)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In394060591 |P1Thread1of1ForFork2_#t~ite13_Out394060591|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In394060591, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In394060591} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In394060591, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out394060591|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In394060591} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:02:19,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In-1359036863 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-1359036863 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1359036863 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1359036863 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1359036863|)) (and (= ~z$r_buff1_thd2~0_In-1359036863 |P1Thread1of1ForFork2_#t~ite14_Out-1359036863|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1359036863, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1359036863, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1359036863, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1359036863} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1359036863, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1359036863, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1359036863, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1359036863|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1359036863} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:02:19,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:02:19,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-924551186 256)))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-924551186 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-924551186 256)) (and (= 0 (mod ~z$w_buff1_used~0_In-924551186 256)) .cse0) (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-924551186 256))))) (= |P2Thread1of1ForFork0_#t~ite29_Out-924551186| ~z$w_buff1_used~0_In-924551186) (= |P2Thread1of1ForFork0_#t~ite30_Out-924551186| |P2Thread1of1ForFork0_#t~ite29_Out-924551186|) .cse1) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite30_Out-924551186| ~z$w_buff1_used~0_In-924551186) (= |P2Thread1of1ForFork0_#t~ite29_In-924551186| |P2Thread1of1ForFork0_#t~ite29_Out-924551186|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-924551186, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-924551186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-924551186, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-924551186, ~weak$$choice2~0=~weak$$choice2~0_In-924551186, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-924551186|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-924551186, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-924551186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-924551186, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-924551186, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-924551186|, ~weak$$choice2~0=~weak$$choice2~0_In-924551186, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-924551186|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:02:19,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:02:19,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:02:19,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-398919585 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-398919585 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-398919585| ~z~0_In-398919585) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-398919585| ~z$w_buff1~0_In-398919585)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-398919585, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-398919585, ~z$w_buff1~0=~z$w_buff1~0_In-398919585, ~z~0=~z~0_In-398919585} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-398919585|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-398919585, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-398919585, ~z$w_buff1~0=~z$w_buff1~0_In-398919585, ~z~0=~z~0_In-398919585} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:02:19,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 11:02:19,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1609654400 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1609654400 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1609654400 |P2Thread1of1ForFork0_#t~ite40_Out-1609654400|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-1609654400|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1609654400, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1609654400} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1609654400, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1609654400|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1609654400} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:02:19,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-613781886 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-613781886 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-613781886 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-613781886 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-613781886| ~z$w_buff1_used~0_In-613781886) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-613781886| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-613781886, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-613781886, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-613781886, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-613781886} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-613781886, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-613781886, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-613781886, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-613781886, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-613781886|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:02:19,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1285336805 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1285336805 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1285336805| ~z$r_buff0_thd3~0_In-1285336805) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1285336805|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1285336805, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1285336805} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1285336805, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1285336805, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1285336805|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:02:19,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In-1377950829 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1377950829 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1377950829 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1377950829 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-1377950829| ~z$r_buff1_thd3~0_In-1377950829) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out-1377950829| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1377950829, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1377950829, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1377950829, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1377950829} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1377950829|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1377950829, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1377950829, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1377950829, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1377950829} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:02:19,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:02:19,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:02:19,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In95566669 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out95566669| |ULTIMATE.start_main_#t~ite47_Out95566669|)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In95566669 256)))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In95566669 |ULTIMATE.start_main_#t~ite47_Out95566669|)) (and (= |ULTIMATE.start_main_#t~ite47_Out95566669| ~z$w_buff1~0_In95566669) (not .cse1) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In95566669, ~z$w_buff1_used~0=~z$w_buff1_used~0_In95566669, ~z$w_buff1~0=~z$w_buff1~0_In95566669, ~z~0=~z~0_In95566669} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In95566669, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out95566669|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In95566669, ~z$w_buff1~0=~z$w_buff1~0_In95566669, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out95566669|, ~z~0=~z~0_In95566669} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:02:19,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-281726417 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-281726417 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-281726417| ~z$w_buff0_used~0_In-281726417) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-281726417| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-281726417, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-281726417} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-281726417, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-281726417, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-281726417|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:02:19,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1475654853 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1475654853 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1475654853 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-1475654853 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1475654853|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1475654853 |ULTIMATE.start_main_#t~ite50_Out-1475654853|) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1475654853, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1475654853, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1475654853, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1475654853} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1475654853|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1475654853, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1475654853, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1475654853, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1475654853} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:02:19,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1674160724 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1674160724 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1674160724|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd0~0_In-1674160724 |ULTIMATE.start_main_#t~ite51_Out-1674160724|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1674160724, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1674160724} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1674160724, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1674160724|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1674160724} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:02:19,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In1320717993 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1320717993 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1320717993 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1320717993 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1320717993| ~z$r_buff1_thd0~0_In1320717993) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out1320717993| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1320717993, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1320717993, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1320717993, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1320717993} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1320717993|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1320717993, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1320717993, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1320717993, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1320717993} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:02:19,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:02:19,525 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_344a75d5-5b26-40e6-ac77-9f02ea93c588/bin/uautomizer/witness.graphml [2019-12-07 11:02:19,525 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:02:19,526 INFO L168 Benchmark]: Toolchain (without parser) took 202052.78 ms. Allocated memory was 1.0 GB in the beginning and 8.2 GB in the end (delta: 7.2 GB). Free memory was 933.9 MB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. [2019-12-07 11:02:19,526 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 954.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:02:19,526 INFO L168 Benchmark]: CACSL2BoogieTranslator took 445.45 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 80.2 MB). Free memory was 933.9 MB in the beginning and 1.1 GB in the end (delta: -118.0 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:02:19,527 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.90 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:02:19,527 INFO L168 Benchmark]: Boogie Preprocessor took 26.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:02:19,527 INFO L168 Benchmark]: RCFGBuilder took 421.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 987.0 MB in the end (delta: 59.6 MB). Peak memory consumption was 59.6 MB. Max. memory is 11.5 GB. [2019-12-07 11:02:19,527 INFO L168 Benchmark]: TraceAbstraction took 201044.87 ms. Allocated memory was 1.1 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 985.6 MB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. [2019-12-07 11:02:19,528 INFO L168 Benchmark]: Witness Printer took 68.63 ms. Allocated memory is still 8.2 GB. Free memory was 3.6 GB in the beginning and 3.6 GB in the end (delta: 48.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 11.5 GB. [2019-12-07 11:02:19,529 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 954.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 445.45 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 80.2 MB). Free memory was 933.9 MB in the beginning and 1.1 GB in the end (delta: -118.0 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.90 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 421.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 987.0 MB in the end (delta: 59.6 MB). Peak memory consumption was 59.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 201044.87 ms. Allocated memory was 1.1 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 985.6 MB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. * Witness Printer took 68.63 ms. Allocated memory is still 8.2 GB. Free memory was 3.6 GB in the beginning and 3.6 GB in the end (delta: 48.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 95 ProgramPointsAfterwards, 215 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 35 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 29 ChoiceCompositions, 7593 VarBasedMoverChecksPositive, 373 VarBasedMoverChecksNegative, 200 SemBasedMoverChecksPositive, 268 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 132619 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L832] FCALL, FORK 0 pthread_create(&t68, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 1 z$w_buff1 = z$w_buff0 [L736] 1 z$w_buff0 = 1 [L737] 1 z$w_buff1_used = z$w_buff0_used [L738] 1 z$w_buff0_used = (_Bool)1 [L750] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L834] FCALL, FORK 0 pthread_create(&t69, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 x = 1 [L767] 2 __unbuffered_p1_EAX = x [L770] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L773] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L750] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L773] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L774] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L836] FCALL, FORK 0 pthread_create(&t70, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 y = 1 [L790] 3 __unbuffered_p2_EAX = y [L793] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L794] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L795] 3 z$flush_delayed = weak$$choice2 [L796] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L751] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L752] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L775] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L776] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L798] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L799] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L800] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L801] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L809] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L811] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L812] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L842] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L842] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L843] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L844] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L845] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 200.8s, OverallIterations: 39, TraceHistogramMax: 1, AutomataDifference: 69.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10402 SDtfs, 12859 SDslu, 39137 SDs, 0 SdLazy, 31141 SolverSat, 550 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 27.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 560 GetRequests, 45 SyntacticMatches, 37 SemanticMatches, 478 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3070 ImplicationChecksByTransitivity, 6.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=238804occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 106.8s AutomataMinimizationTime, 38 MinimizatonAttempts, 548141 StatesRemovedByMinimization, 36 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 1643 NumberOfCodeBlocks, 1643 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 1538 ConstructedInterpolants, 0 QuantifiedInterpolants, 609213 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...