./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix003_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix003_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 13ac49fedcf8917655501f61eb5c87f5491f45c7 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:48:42,693 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:48:42,695 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:48:42,703 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:48:42,703 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:48:42,704 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:48:42,705 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:48:42,707 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:48:42,709 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:48:42,709 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:48:42,710 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:48:42,711 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:48:42,712 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:48:42,713 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:48:42,713 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:48:42,715 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:48:42,715 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:48:42,716 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:48:42,718 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:48:42,720 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:48:42,721 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:48:42,722 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:48:42,723 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:48:42,724 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:48:42,726 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:48:42,726 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:48:42,726 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:48:42,727 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:48:42,727 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:48:42,728 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:48:42,728 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:48:42,729 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:48:42,729 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:48:42,730 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:48:42,731 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:48:42,731 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:48:42,731 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:48:42,731 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:48:42,732 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:48:42,732 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:48:42,733 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:48:42,734 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:48:42,745 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:48:42,746 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:48:42,746 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:48:42,747 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:48:42,747 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:48:42,747 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:48:42,747 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:48:42,747 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:48:42,747 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:48:42,747 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:48:42,748 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:48:42,748 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:48:42,748 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:48:42,748 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:48:42,748 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:48:42,748 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:48:42,749 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:48:42,749 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:48:42,749 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:48:42,749 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:48:42,749 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:48:42,749 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:48:42,749 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:48:42,750 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:48:42,750 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:48:42,750 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:48:42,750 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:48:42,750 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:48:42,750 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:48:42,750 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 13ac49fedcf8917655501f61eb5c87f5491f45c7 [2019-12-07 12:48:42,872 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:48:42,883 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:48:42,886 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:48:42,887 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:48:42,887 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:48:42,888 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix003_rmo.oepc.i [2019-12-07 12:48:42,930 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/data/53ac9f835/23f5820d281047a88910a457a12f446e/FLAG52d4accfd [2019-12-07 12:48:43,386 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:48:43,387 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/sv-benchmarks/c/pthread-wmm/mix003_rmo.oepc.i [2019-12-07 12:48:43,397 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/data/53ac9f835/23f5820d281047a88910a457a12f446e/FLAG52d4accfd [2019-12-07 12:48:43,408 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/data/53ac9f835/23f5820d281047a88910a457a12f446e [2019-12-07 12:48:43,409 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:48:43,410 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:48:43,411 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:48:43,411 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:48:43,414 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:48:43,415 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,417 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43, skipping insertion in model container [2019-12-07 12:48:43,417 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,423 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:48:43,460 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:48:43,702 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:48:43,710 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:48:43,768 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:48:43,820 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:48:43,820 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43 WrapperNode [2019-12-07 12:48:43,820 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:48:43,821 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:48:43,821 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:48:43,821 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:48:43,827 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,845 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,868 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:48:43,869 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:48:43,869 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:48:43,869 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:48:43,876 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,876 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,881 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,881 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,891 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,895 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,899 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... [2019-12-07 12:48:43,903 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:48:43,904 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:48:43,904 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:48:43,904 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:48:43,905 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:48:43,946 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:48:43,946 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:48:43,946 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:48:43,946 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:48:43,946 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:48:43,947 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:48:43,947 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:48:43,947 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:48:43,947 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:48:43,947 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:48:43,947 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:48:43,947 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:48:43,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:48:43,948 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:48:44,305 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:48:44,306 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:48:44,306 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:48:44 BoogieIcfgContainer [2019-12-07 12:48:44,306 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:48:44,307 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:48:44,307 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:48:44,309 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:48:44,309 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:48:43" (1/3) ... [2019-12-07 12:48:44,310 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ad751bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:48:44, skipping insertion in model container [2019-12-07 12:48:44,310 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:48:43" (2/3) ... [2019-12-07 12:48:44,310 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ad751bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:48:44, skipping insertion in model container [2019-12-07 12:48:44,310 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:48:44" (3/3) ... [2019-12-07 12:48:44,311 INFO L109 eAbstractionObserver]: Analyzing ICFG mix003_rmo.oepc.i [2019-12-07 12:48:44,318 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:48:44,318 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:48:44,323 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:48:44,323 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:48:44,348 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,348 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,348 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,348 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,348 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,348 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,348 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,349 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,349 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,349 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,349 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,349 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,349 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,349 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,350 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,351 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,351 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,351 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,351 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,351 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,351 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,351 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,351 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,352 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,352 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,352 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,352 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,352 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,352 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,352 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,352 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,353 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,354 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,355 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,355 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,355 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,355 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,355 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,355 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,355 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,355 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,356 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,356 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,356 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,356 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,356 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,356 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,357 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,358 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,359 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,360 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,361 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,366 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,367 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,368 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,368 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,368 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,368 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,368 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:48:44,383 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:48:44,397 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:48:44,398 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:48:44,398 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:48:44,398 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:48:44,398 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:48:44,398 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:48:44,398 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:48:44,398 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:48:44,408 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 12:48:44,409 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 12:48:44,476 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 12:48:44,476 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:48:44,486 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:48:44,503 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 12:48:44,538 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 12:48:44,539 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:48:44,544 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:48:44,560 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 12:48:44,561 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:48:47,530 WARN L192 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 12:48:47,850 INFO L206 etLargeBlockEncoding]: Checked pairs total: 132619 [2019-12-07 12:48:47,850 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 12:48:47,853 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 12:49:05,023 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 120347 states. [2019-12-07 12:49:05,024 INFO L276 IsEmpty]: Start isEmpty. Operand 120347 states. [2019-12-07 12:49:05,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 12:49:05,029 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:49:05,030 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 12:49:05,030 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:49:05,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:49:05,034 INFO L82 PathProgramCache]: Analyzing trace with hash 919842, now seen corresponding path program 1 times [2019-12-07 12:49:05,039 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:49:05,039 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982037748] [2019-12-07 12:49:05,039 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:49:05,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:49:05,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:49:05,167 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982037748] [2019-12-07 12:49:05,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:49:05,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:49:05,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [133569688] [2019-12-07 12:49:05,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:49:05,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:49:05,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:49:05,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:49:05,182 INFO L87 Difference]: Start difference. First operand 120347 states. Second operand 3 states. [2019-12-07 12:49:05,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:49:05,966 INFO L93 Difference]: Finished difference Result 119613 states and 515253 transitions. [2019-12-07 12:49:05,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:49:05,968 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 12:49:05,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:49:06,459 INFO L225 Difference]: With dead ends: 119613 [2019-12-07 12:49:06,459 INFO L226 Difference]: Without dead ends: 105755 [2019-12-07 12:49:06,460 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:49:10,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105755 states. [2019-12-07 12:49:12,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105755 to 105755. [2019-12-07 12:49:12,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105755 states. [2019-12-07 12:49:14,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105755 states to 105755 states and 454361 transitions. [2019-12-07 12:49:14,425 INFO L78 Accepts]: Start accepts. Automaton has 105755 states and 454361 transitions. Word has length 3 [2019-12-07 12:49:14,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:49:14,426 INFO L462 AbstractCegarLoop]: Abstraction has 105755 states and 454361 transitions. [2019-12-07 12:49:14,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:49:14,426 INFO L276 IsEmpty]: Start isEmpty. Operand 105755 states and 454361 transitions. [2019-12-07 12:49:14,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:49:14,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:49:14,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:49:14,430 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:49:14,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:49:14,431 INFO L82 PathProgramCache]: Analyzing trace with hash 474732739, now seen corresponding path program 1 times [2019-12-07 12:49:14,431 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:49:14,431 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683910764] [2019-12-07 12:49:14,431 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:49:14,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:49:14,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:49:14,501 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683910764] [2019-12-07 12:49:14,501 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:49:14,501 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:49:14,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [740535665] [2019-12-07 12:49:14,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:49:14,503 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:49:14,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:49:14,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:49:14,503 INFO L87 Difference]: Start difference. First operand 105755 states and 454361 transitions. Second operand 4 states. [2019-12-07 12:49:15,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:49:15,500 INFO L93 Difference]: Finished difference Result 168845 states and 694815 transitions. [2019-12-07 12:49:15,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:49:15,501 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:49:15,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:49:15,950 INFO L225 Difference]: With dead ends: 168845 [2019-12-07 12:49:15,950 INFO L226 Difference]: Without dead ends: 168747 [2019-12-07 12:49:15,951 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:49:21,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168747 states. [2019-12-07 12:49:25,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168747 to 153153. [2019-12-07 12:49:25,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153153 states. [2019-12-07 12:49:25,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153153 states to 153153 states and 639357 transitions. [2019-12-07 12:49:25,604 INFO L78 Accepts]: Start accepts. Automaton has 153153 states and 639357 transitions. Word has length 11 [2019-12-07 12:49:25,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:49:25,605 INFO L462 AbstractCegarLoop]: Abstraction has 153153 states and 639357 transitions. [2019-12-07 12:49:25,605 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:49:25,605 INFO L276 IsEmpty]: Start isEmpty. Operand 153153 states and 639357 transitions. [2019-12-07 12:49:25,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:49:25,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:49:25,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:49:25,609 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:49:25,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:49:25,609 INFO L82 PathProgramCache]: Analyzing trace with hash -512415605, now seen corresponding path program 1 times [2019-12-07 12:49:25,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:49:25,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532497426] [2019-12-07 12:49:25,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:49:25,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:49:25,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:49:25,659 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532497426] [2019-12-07 12:49:25,659 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:49:25,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:49:25,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [250093560] [2019-12-07 12:49:25,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:49:25,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:49:25,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:49:25,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:49:25,660 INFO L87 Difference]: Start difference. First operand 153153 states and 639357 transitions. Second operand 4 states. [2019-12-07 12:49:27,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:49:27,173 INFO L93 Difference]: Finished difference Result 220024 states and 896381 transitions. [2019-12-07 12:49:27,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:49:27,173 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:49:27,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:49:27,737 INFO L225 Difference]: With dead ends: 220024 [2019-12-07 12:49:27,738 INFO L226 Difference]: Without dead ends: 219912 [2019-12-07 12:49:27,738 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:49:33,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219912 states. [2019-12-07 12:49:36,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219912 to 183120. [2019-12-07 12:49:36,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183120 states. [2019-12-07 12:49:39,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183120 states to 183120 states and 760223 transitions. [2019-12-07 12:49:39,884 INFO L78 Accepts]: Start accepts. Automaton has 183120 states and 760223 transitions. Word has length 13 [2019-12-07 12:49:39,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:49:39,885 INFO L462 AbstractCegarLoop]: Abstraction has 183120 states and 760223 transitions. [2019-12-07 12:49:39,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:49:39,885 INFO L276 IsEmpty]: Start isEmpty. Operand 183120 states and 760223 transitions. [2019-12-07 12:49:39,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:49:39,892 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:49:39,892 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:49:39,893 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:49:39,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:49:39,893 INFO L82 PathProgramCache]: Analyzing trace with hash -1719969010, now seen corresponding path program 1 times [2019-12-07 12:49:39,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:49:39,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124843690] [2019-12-07 12:49:39,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:49:39,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:49:39,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:49:39,943 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124843690] [2019-12-07 12:49:39,944 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:49:39,944 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:49:39,944 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389402782] [2019-12-07 12:49:39,944 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:49:39,944 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:49:39,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:49:39,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:49:39,945 INFO L87 Difference]: Start difference. First operand 183120 states and 760223 transitions. Second operand 4 states. [2019-12-07 12:49:41,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:49:41,184 INFO L93 Difference]: Finished difference Result 225249 states and 927434 transitions. [2019-12-07 12:49:41,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:49:41,184 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:49:41,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:49:41,771 INFO L225 Difference]: With dead ends: 225249 [2019-12-07 12:49:41,771 INFO L226 Difference]: Without dead ends: 225249 [2019-12-07 12:49:41,771 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:49:47,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225249 states. [2019-12-07 12:49:50,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225249 to 195075. [2019-12-07 12:49:50,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195075 states. [2019-12-07 12:49:51,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195075 states to 195075 states and 809283 transitions. [2019-12-07 12:49:51,337 INFO L78 Accepts]: Start accepts. Automaton has 195075 states and 809283 transitions. Word has length 16 [2019-12-07 12:49:51,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:49:51,337 INFO L462 AbstractCegarLoop]: Abstraction has 195075 states and 809283 transitions. [2019-12-07 12:49:51,337 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:49:51,337 INFO L276 IsEmpty]: Start isEmpty. Operand 195075 states and 809283 transitions. [2019-12-07 12:49:51,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:49:51,344 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:49:51,344 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:49:51,344 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:49:51,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:49:51,344 INFO L82 PathProgramCache]: Analyzing trace with hash -1720071868, now seen corresponding path program 1 times [2019-12-07 12:49:51,344 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:49:51,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131599464] [2019-12-07 12:49:51,345 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:49:51,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:49:51,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:49:51,377 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131599464] [2019-12-07 12:49:51,377 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:49:51,377 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:49:51,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1684997079] [2019-12-07 12:49:51,378 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:49:51,378 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:49:51,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:49:51,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:49:51,378 INFO L87 Difference]: Start difference. First operand 195075 states and 809283 transitions. Second operand 3 states. [2019-12-07 12:49:52,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:49:52,640 INFO L93 Difference]: Finished difference Result 282572 states and 1168256 transitions. [2019-12-07 12:49:52,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:49:52,640 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 12:49:52,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:49:54,037 INFO L225 Difference]: With dead ends: 282572 [2019-12-07 12:49:54,037 INFO L226 Difference]: Without dead ends: 282572 [2019-12-07 12:49:54,037 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:00,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282572 states. [2019-12-07 12:50:06,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282572 to 224589. [2019-12-07 12:50:06,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224589 states. [2019-12-07 12:50:07,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224589 states to 224589 states and 936012 transitions. [2019-12-07 12:50:07,684 INFO L78 Accepts]: Start accepts. Automaton has 224589 states and 936012 transitions. Word has length 16 [2019-12-07 12:50:07,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:07,684 INFO L462 AbstractCegarLoop]: Abstraction has 224589 states and 936012 transitions. [2019-12-07 12:50:07,684 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:50:07,684 INFO L276 IsEmpty]: Start isEmpty. Operand 224589 states and 936012 transitions. [2019-12-07 12:50:07,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:50:07,692 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:07,692 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:07,692 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:07,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:07,692 INFO L82 PathProgramCache]: Analyzing trace with hash 759335912, now seen corresponding path program 1 times [2019-12-07 12:50:07,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:07,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393147619] [2019-12-07 12:50:07,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:07,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:07,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:07,732 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393147619] [2019-12-07 12:50:07,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:07,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:50:07,732 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284315187] [2019-12-07 12:50:07,732 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:50:07,733 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:07,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:50:07,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:50:07,733 INFO L87 Difference]: Start difference. First operand 224589 states and 936012 transitions. Second operand 4 states. [2019-12-07 12:50:09,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:09,530 INFO L93 Difference]: Finished difference Result 265350 states and 1097413 transitions. [2019-12-07 12:50:09,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:50:09,530 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:50:09,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:10,231 INFO L225 Difference]: With dead ends: 265350 [2019-12-07 12:50:10,231 INFO L226 Difference]: Without dead ends: 265350 [2019-12-07 12:50:10,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:50:16,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265350 states. [2019-12-07 12:50:20,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265350 to 227267. [2019-12-07 12:50:20,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227267 states. [2019-12-07 12:50:20,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227267 states to 227267 states and 947978 transitions. [2019-12-07 12:50:20,916 INFO L78 Accepts]: Start accepts. Automaton has 227267 states and 947978 transitions. Word has length 16 [2019-12-07 12:50:20,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:20,916 INFO L462 AbstractCegarLoop]: Abstraction has 227267 states and 947978 transitions. [2019-12-07 12:50:20,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:50:20,916 INFO L276 IsEmpty]: Start isEmpty. Operand 227267 states and 947978 transitions. [2019-12-07 12:50:20,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:50:20,927 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:20,927 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:20,927 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:20,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:20,927 INFO L82 PathProgramCache]: Analyzing trace with hash 980787520, now seen corresponding path program 1 times [2019-12-07 12:50:20,927 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:20,927 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253312506] [2019-12-07 12:50:20,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:20,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:20,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:20,973 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253312506] [2019-12-07 12:50:20,974 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:20,974 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:50:20,974 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1423615105] [2019-12-07 12:50:20,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:50:20,974 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:20,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:50:20,974 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:20,974 INFO L87 Difference]: Start difference. First operand 227267 states and 947978 transitions. Second operand 3 states. [2019-12-07 12:50:22,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:22,411 INFO L93 Difference]: Finished difference Result 227267 states and 938556 transitions. [2019-12-07 12:50:22,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:50:22,412 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:50:22,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:23,032 INFO L225 Difference]: With dead ends: 227267 [2019-12-07 12:50:23,033 INFO L226 Difference]: Without dead ends: 227267 [2019-12-07 12:50:23,033 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:31,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227267 states. [2019-12-07 12:50:34,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227267 to 223833. [2019-12-07 12:50:34,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223833 states. [2019-12-07 12:50:35,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223833 states to 223833 states and 925814 transitions. [2019-12-07 12:50:35,443 INFO L78 Accepts]: Start accepts. Automaton has 223833 states and 925814 transitions. Word has length 18 [2019-12-07 12:50:35,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:35,444 INFO L462 AbstractCegarLoop]: Abstraction has 223833 states and 925814 transitions. [2019-12-07 12:50:35,444 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:50:35,444 INFO L276 IsEmpty]: Start isEmpty. Operand 223833 states and 925814 transitions. [2019-12-07 12:50:35,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:50:35,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:35,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:35,454 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:35,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:35,454 INFO L82 PathProgramCache]: Analyzing trace with hash -907604290, now seen corresponding path program 1 times [2019-12-07 12:50:35,455 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:35,455 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778923010] [2019-12-07 12:50:35,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:35,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:35,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:35,499 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778923010] [2019-12-07 12:50:35,500 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:35,500 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:50:35,500 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1892917404] [2019-12-07 12:50:35,500 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:50:35,500 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:35,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:50:35,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:35,501 INFO L87 Difference]: Start difference. First operand 223833 states and 925814 transitions. Second operand 3 states. [2019-12-07 12:50:36,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:36,955 INFO L93 Difference]: Finished difference Result 227222 states and 936124 transitions. [2019-12-07 12:50:36,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:50:36,956 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:50:36,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:37,544 INFO L225 Difference]: With dead ends: 227222 [2019-12-07 12:50:37,545 INFO L226 Difference]: Without dead ends: 227222 [2019-12-07 12:50:37,545 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:43,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227222 states. [2019-12-07 12:50:46,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227222 to 223830. [2019-12-07 12:50:46,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223830 states. [2019-12-07 12:50:47,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223830 states to 223830 states and 925802 transitions. [2019-12-07 12:50:47,696 INFO L78 Accepts]: Start accepts. Automaton has 223830 states and 925802 transitions. Word has length 18 [2019-12-07 12:50:47,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:47,696 INFO L462 AbstractCegarLoop]: Abstraction has 223830 states and 925802 transitions. [2019-12-07 12:50:47,696 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:50:47,696 INFO L276 IsEmpty]: Start isEmpty. Operand 223830 states and 925802 transitions. [2019-12-07 12:50:47,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:50:47,709 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:47,709 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:47,709 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:47,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:47,709 INFO L82 PathProgramCache]: Analyzing trace with hash 793088017, now seen corresponding path program 1 times [2019-12-07 12:50:47,709 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:47,710 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820032581] [2019-12-07 12:50:47,710 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:47,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:47,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:47,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820032581] [2019-12-07 12:50:47,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:47,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:50:47,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1488623398] [2019-12-07 12:50:47,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:50:47,736 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:47,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:50:47,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:47,736 INFO L87 Difference]: Start difference. First operand 223830 states and 925802 transitions. Second operand 3 states. [2019-12-07 12:50:47,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:47,868 INFO L93 Difference]: Finished difference Result 41380 states and 135423 transitions. [2019-12-07 12:50:47,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:50:47,868 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 12:50:47,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:48,323 INFO L225 Difference]: With dead ends: 41380 [2019-12-07 12:50:48,323 INFO L226 Difference]: Without dead ends: 41380 [2019-12-07 12:50:48,324 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:48,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41380 states. [2019-12-07 12:50:48,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41380 to 41380. [2019-12-07 12:50:48,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41380 states. [2019-12-07 12:50:48,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41380 states to 41380 states and 135423 transitions. [2019-12-07 12:50:48,982 INFO L78 Accepts]: Start accepts. Automaton has 41380 states and 135423 transitions. Word has length 19 [2019-12-07 12:50:48,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:48,983 INFO L462 AbstractCegarLoop]: Abstraction has 41380 states and 135423 transitions. [2019-12-07 12:50:48,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:50:48,983 INFO L276 IsEmpty]: Start isEmpty. Operand 41380 states and 135423 transitions. [2019-12-07 12:50:48,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:50:48,989 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:48,989 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:48,989 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:48,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:48,989 INFO L82 PathProgramCache]: Analyzing trace with hash -390431288, now seen corresponding path program 1 times [2019-12-07 12:50:48,989 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:48,989 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830197062] [2019-12-07 12:50:48,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:49,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:49,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:49,037 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830197062] [2019-12-07 12:50:49,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:49,037 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:50:49,038 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606199626] [2019-12-07 12:50:49,038 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:50:49,038 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:49,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:50:49,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:50:49,038 INFO L87 Difference]: Start difference. First operand 41380 states and 135423 transitions. Second operand 5 states. [2019-12-07 12:50:49,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:49,467 INFO L93 Difference]: Finished difference Result 57787 states and 184150 transitions. [2019-12-07 12:50:49,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:50:49,468 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:50:49,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:49,554 INFO L225 Difference]: With dead ends: 57787 [2019-12-07 12:50:49,554 INFO L226 Difference]: Without dead ends: 57773 [2019-12-07 12:50:49,555 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:50:49,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57773 states. [2019-12-07 12:50:50,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57773 to 42368. [2019-12-07 12:50:50,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42368 states. [2019-12-07 12:50:50,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42368 states to 42368 states and 138443 transitions. [2019-12-07 12:50:50,395 INFO L78 Accepts]: Start accepts. Automaton has 42368 states and 138443 transitions. Word has length 22 [2019-12-07 12:50:50,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:50,396 INFO L462 AbstractCegarLoop]: Abstraction has 42368 states and 138443 transitions. [2019-12-07 12:50:50,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:50:50,396 INFO L276 IsEmpty]: Start isEmpty. Operand 42368 states and 138443 transitions. [2019-12-07 12:50:50,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:50:50,402 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:50,402 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:50,402 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:50,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:50,402 INFO L82 PathProgramCache]: Analyzing trace with hash 2088873634, now seen corresponding path program 1 times [2019-12-07 12:50:50,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:50,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114992652] [2019-12-07 12:50:50,403 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:50,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:50,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:50,443 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114992652] [2019-12-07 12:50:50,443 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:50,443 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:50:50,443 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439369412] [2019-12-07 12:50:50,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:50:50,444 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:50,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:50:50,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:50:50,444 INFO L87 Difference]: Start difference. First operand 42368 states and 138443 transitions. Second operand 5 states. [2019-12-07 12:50:51,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:51,670 INFO L93 Difference]: Finished difference Result 59679 states and 189951 transitions. [2019-12-07 12:50:51,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:50:51,671 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:50:51,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:51,758 INFO L225 Difference]: With dead ends: 59679 [2019-12-07 12:50:51,758 INFO L226 Difference]: Without dead ends: 59665 [2019-12-07 12:50:51,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:50:52,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59665 states. [2019-12-07 12:50:52,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59665 to 41021. [2019-12-07 12:50:52,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41021 states. [2019-12-07 12:50:52,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41021 states to 41021 states and 134083 transitions. [2019-12-07 12:50:52,576 INFO L78 Accepts]: Start accepts. Automaton has 41021 states and 134083 transitions. Word has length 22 [2019-12-07 12:50:52,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:52,576 INFO L462 AbstractCegarLoop]: Abstraction has 41021 states and 134083 transitions. [2019-12-07 12:50:52,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:50:52,576 INFO L276 IsEmpty]: Start isEmpty. Operand 41021 states and 134083 transitions. [2019-12-07 12:50:52,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:50:52,586 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:52,586 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:52,586 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:52,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:52,587 INFO L82 PathProgramCache]: Analyzing trace with hash -697105977, now seen corresponding path program 1 times [2019-12-07 12:50:52,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:52,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [175702014] [2019-12-07 12:50:52,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:52,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:52,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:52,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [175702014] [2019-12-07 12:50:52,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:52,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:50:52,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307280858] [2019-12-07 12:50:52,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:50:52,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:52,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:50:52,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:50:52,624 INFO L87 Difference]: Start difference. First operand 41021 states and 134083 transitions. Second operand 5 states. [2019-12-07 12:50:53,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:53,032 INFO L93 Difference]: Finished difference Result 58839 states and 187273 transitions. [2019-12-07 12:50:53,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:50:53,032 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:50:53,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:53,115 INFO L225 Difference]: With dead ends: 58839 [2019-12-07 12:50:53,116 INFO L226 Difference]: Without dead ends: 58813 [2019-12-07 12:50:53,116 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:50:53,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58813 states. [2019-12-07 12:50:53,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58813 to 48914. [2019-12-07 12:50:53,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48914 states. [2019-12-07 12:50:54,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48914 states to 48914 states and 158771 transitions. [2019-12-07 12:50:54,181 INFO L78 Accepts]: Start accepts. Automaton has 48914 states and 158771 transitions. Word has length 25 [2019-12-07 12:50:54,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:54,182 INFO L462 AbstractCegarLoop]: Abstraction has 48914 states and 158771 transitions. [2019-12-07 12:50:54,182 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:50:54,182 INFO L276 IsEmpty]: Start isEmpty. Operand 48914 states and 158771 transitions. [2019-12-07 12:50:54,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:50:54,195 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:54,195 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:54,195 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:54,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:54,195 INFO L82 PathProgramCache]: Analyzing trace with hash 967503752, now seen corresponding path program 1 times [2019-12-07 12:50:54,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:54,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009556716] [2019-12-07 12:50:54,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:54,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:54,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:54,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2009556716] [2019-12-07 12:50:54,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:54,219 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:50:54,219 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96308277] [2019-12-07 12:50:54,219 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:50:54,220 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:54,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:50:54,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:54,220 INFO L87 Difference]: Start difference. First operand 48914 states and 158771 transitions. Second operand 3 states. [2019-12-07 12:50:54,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:54,399 INFO L93 Difference]: Finished difference Result 62759 states and 194816 transitions. [2019-12-07 12:50:54,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:50:54,400 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:50:54,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:54,490 INFO L225 Difference]: With dead ends: 62759 [2019-12-07 12:50:54,490 INFO L226 Difference]: Without dead ends: 62759 [2019-12-07 12:50:54,490 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:54,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62759 states. [2019-12-07 12:50:55,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62759 to 48438. [2019-12-07 12:50:55,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48438 states. [2019-12-07 12:50:55,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48438 states to 48438 states and 150393 transitions. [2019-12-07 12:50:55,396 INFO L78 Accepts]: Start accepts. Automaton has 48438 states and 150393 transitions. Word has length 27 [2019-12-07 12:50:55,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:55,396 INFO L462 AbstractCegarLoop]: Abstraction has 48438 states and 150393 transitions. [2019-12-07 12:50:55,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:50:55,396 INFO L276 IsEmpty]: Start isEmpty. Operand 48438 states and 150393 transitions. [2019-12-07 12:50:55,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:50:55,409 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:55,409 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:55,409 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:55,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:55,410 INFO L82 PathProgramCache]: Analyzing trace with hash 196927527, now seen corresponding path program 1 times [2019-12-07 12:50:55,410 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:55,410 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1407706504] [2019-12-07 12:50:55,410 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:55,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:55,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:55,438 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1407706504] [2019-12-07 12:50:55,438 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:55,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:50:55,439 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1934950949] [2019-12-07 12:50:55,439 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:50:55,439 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:55,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:50:55,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:50:55,439 INFO L87 Difference]: Start difference. First operand 48438 states and 150393 transitions. Second operand 5 states. [2019-12-07 12:50:55,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:55,770 INFO L93 Difference]: Finished difference Result 59466 states and 182837 transitions. [2019-12-07 12:50:55,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:50:55,771 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 12:50:55,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:55,852 INFO L225 Difference]: With dead ends: 59466 [2019-12-07 12:50:55,852 INFO L226 Difference]: Without dead ends: 59424 [2019-12-07 12:50:55,852 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:50:56,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59424 states. [2019-12-07 12:50:56,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59424 to 50589. [2019-12-07 12:50:56,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50589 states. [2019-12-07 12:50:56,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50589 states to 50589 states and 156953 transitions. [2019-12-07 12:50:56,853 INFO L78 Accepts]: Start accepts. Automaton has 50589 states and 156953 transitions. Word has length 27 [2019-12-07 12:50:56,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:56,854 INFO L462 AbstractCegarLoop]: Abstraction has 50589 states and 156953 transitions. [2019-12-07 12:50:56,854 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:50:56,854 INFO L276 IsEmpty]: Start isEmpty. Operand 50589 states and 156953 transitions. [2019-12-07 12:50:56,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 12:50:56,869 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:56,869 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:56,870 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:56,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:56,870 INFO L82 PathProgramCache]: Analyzing trace with hash -1188103809, now seen corresponding path program 1 times [2019-12-07 12:50:56,870 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:56,870 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535473499] [2019-12-07 12:50:56,870 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:56,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:56,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:56,902 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [535473499] [2019-12-07 12:50:56,902 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:56,902 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:50:56,903 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89585281] [2019-12-07 12:50:56,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:50:56,903 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:56,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:50:56,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:50:56,903 INFO L87 Difference]: Start difference. First operand 50589 states and 156953 transitions. Second operand 5 states. [2019-12-07 12:50:57,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:57,238 INFO L93 Difference]: Finished difference Result 61327 states and 188389 transitions. [2019-12-07 12:50:57,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:50:57,239 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 12:50:57,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:57,324 INFO L225 Difference]: With dead ends: 61327 [2019-12-07 12:50:57,324 INFO L226 Difference]: Without dead ends: 61283 [2019-12-07 12:50:57,325 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:50:57,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61283 states. [2019-12-07 12:50:58,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61283 to 50396. [2019-12-07 12:50:58,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50396 states. [2019-12-07 12:50:58,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50396 states to 50396 states and 156269 transitions. [2019-12-07 12:50:58,265 INFO L78 Accepts]: Start accepts. Automaton has 50396 states and 156269 transitions. Word has length 28 [2019-12-07 12:50:58,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:58,265 INFO L462 AbstractCegarLoop]: Abstraction has 50396 states and 156269 transitions. [2019-12-07 12:50:58,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:50:58,265 INFO L276 IsEmpty]: Start isEmpty. Operand 50396 states and 156269 transitions. [2019-12-07 12:50:58,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:50:58,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:58,279 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:58,279 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:58,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:58,279 INFO L82 PathProgramCache]: Analyzing trace with hash -175678458, now seen corresponding path program 1 times [2019-12-07 12:50:58,279 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:58,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139880651] [2019-12-07 12:50:58,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:58,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:58,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:58,311 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139880651] [2019-12-07 12:50:58,311 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:58,311 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:50:58,311 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814646977] [2019-12-07 12:50:58,311 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:50:58,311 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:58,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:50:58,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:58,312 INFO L87 Difference]: Start difference. First operand 50396 states and 156269 transitions. Second operand 3 states. [2019-12-07 12:50:58,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:58,454 INFO L93 Difference]: Finished difference Result 50343 states and 156111 transitions. [2019-12-07 12:50:58,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:50:58,454 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 12:50:58,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:58,528 INFO L225 Difference]: With dead ends: 50343 [2019-12-07 12:50:58,528 INFO L226 Difference]: Without dead ends: 50343 [2019-12-07 12:50:58,528 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:58,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50343 states. [2019-12-07 12:50:59,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50343 to 50343. [2019-12-07 12:50:59,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50343 states. [2019-12-07 12:50:59,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50343 states to 50343 states and 156111 transitions. [2019-12-07 12:50:59,424 INFO L78 Accepts]: Start accepts. Automaton has 50343 states and 156111 transitions. Word has length 29 [2019-12-07 12:50:59,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:50:59,424 INFO L462 AbstractCegarLoop]: Abstraction has 50343 states and 156111 transitions. [2019-12-07 12:50:59,424 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:50:59,424 INFO L276 IsEmpty]: Start isEmpty. Operand 50343 states and 156111 transitions. [2019-12-07 12:50:59,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 12:50:59,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:50:59,439 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:50:59,439 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:50:59,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:50:59,439 INFO L82 PathProgramCache]: Analyzing trace with hash -502361435, now seen corresponding path program 1 times [2019-12-07 12:50:59,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:50:59,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808167299] [2019-12-07 12:50:59,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:50:59,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:50:59,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:50:59,470 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808167299] [2019-12-07 12:50:59,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:50:59,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:50:59,471 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1025388303] [2019-12-07 12:50:59,471 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:50:59,471 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:50:59,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:50:59,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:59,471 INFO L87 Difference]: Start difference. First operand 50343 states and 156111 transitions. Second operand 3 states. [2019-12-07 12:50:59,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:50:59,612 INFO L93 Difference]: Finished difference Result 50255 states and 155837 transitions. [2019-12-07 12:50:59,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:50:59,614 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 12:50:59,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:50:59,685 INFO L225 Difference]: With dead ends: 50255 [2019-12-07 12:50:59,686 INFO L226 Difference]: Without dead ends: 50255 [2019-12-07 12:50:59,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:50:59,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50255 states. [2019-12-07 12:51:00,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50255 to 50255. [2019-12-07 12:51:00,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50255 states. [2019-12-07 12:51:00,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50255 states to 50255 states and 155837 transitions. [2019-12-07 12:51:00,528 INFO L78 Accepts]: Start accepts. Automaton has 50255 states and 155837 transitions. Word has length 30 [2019-12-07 12:51:00,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:00,529 INFO L462 AbstractCegarLoop]: Abstraction has 50255 states and 155837 transitions. [2019-12-07 12:51:00,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:51:00,529 INFO L276 IsEmpty]: Start isEmpty. Operand 50255 states and 155837 transitions. [2019-12-07 12:51:00,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 12:51:00,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:00,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:00,546 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:00,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:00,547 INFO L82 PathProgramCache]: Analyzing trace with hash 623425171, now seen corresponding path program 1 times [2019-12-07 12:51:00,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:00,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23553705] [2019-12-07 12:51:00,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:00,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:00,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:00,577 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [23553705] [2019-12-07 12:51:00,577 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:00,578 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:51:00,578 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632982264] [2019-12-07 12:51:00,578 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:51:00,578 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:00,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:51:00,579 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:51:00,579 INFO L87 Difference]: Start difference. First operand 50255 states and 155837 transitions. Second operand 4 states. [2019-12-07 12:51:00,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:00,643 INFO L93 Difference]: Finished difference Result 19537 states and 57983 transitions. [2019-12-07 12:51:00,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:51:00,644 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 12:51:00,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:00,664 INFO L225 Difference]: With dead ends: 19537 [2019-12-07 12:51:00,664 INFO L226 Difference]: Without dead ends: 19537 [2019-12-07 12:51:00,664 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:51:00,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19537 states. [2019-12-07 12:51:00,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19537 to 18347. [2019-12-07 12:51:00,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18347 states. [2019-12-07 12:51:00,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18347 states to 18347 states and 54527 transitions. [2019-12-07 12:51:00,939 INFO L78 Accepts]: Start accepts. Automaton has 18347 states and 54527 transitions. Word has length 31 [2019-12-07 12:51:00,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:00,940 INFO L462 AbstractCegarLoop]: Abstraction has 18347 states and 54527 transitions. [2019-12-07 12:51:00,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:51:00,940 INFO L276 IsEmpty]: Start isEmpty. Operand 18347 states and 54527 transitions. [2019-12-07 12:51:00,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:51:00,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:00,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:00,953 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:00,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:00,953 INFO L82 PathProgramCache]: Analyzing trace with hash 1042720045, now seen corresponding path program 1 times [2019-12-07 12:51:00,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:00,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598599842] [2019-12-07 12:51:00,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:00,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:00,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:00,999 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598599842] [2019-12-07 12:51:01,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:01,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:51:01,000 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1714127329] [2019-12-07 12:51:01,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:51:01,000 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:01,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:51:01,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:51:01,001 INFO L87 Difference]: Start difference. First operand 18347 states and 54527 transitions. Second operand 6 states. [2019-12-07 12:51:01,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:01,405 INFO L93 Difference]: Finished difference Result 23133 states and 67936 transitions. [2019-12-07 12:51:01,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:51:01,405 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 12:51:01,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:01,428 INFO L225 Difference]: With dead ends: 23133 [2019-12-07 12:51:01,428 INFO L226 Difference]: Without dead ends: 23133 [2019-12-07 12:51:01,428 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:51:01,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23133 states. [2019-12-07 12:51:01,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23133 to 18515. [2019-12-07 12:51:01,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18515 states. [2019-12-07 12:51:01,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18515 states to 18515 states and 55057 transitions. [2019-12-07 12:51:01,741 INFO L78 Accepts]: Start accepts. Automaton has 18515 states and 55057 transitions. Word has length 33 [2019-12-07 12:51:01,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:01,741 INFO L462 AbstractCegarLoop]: Abstraction has 18515 states and 55057 transitions. [2019-12-07 12:51:01,741 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:51:01,741 INFO L276 IsEmpty]: Start isEmpty. Operand 18515 states and 55057 transitions. [2019-12-07 12:51:01,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 12:51:01,754 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:01,754 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:01,754 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:01,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:01,754 INFO L82 PathProgramCache]: Analyzing trace with hash -738339527, now seen corresponding path program 1 times [2019-12-07 12:51:01,755 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:01,755 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1038588846] [2019-12-07 12:51:01,755 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:01,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:01,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:01,802 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1038588846] [2019-12-07 12:51:01,802 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:01,802 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:51:01,802 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725808477] [2019-12-07 12:51:01,803 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:51:01,803 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:01,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:51:01,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:51:01,803 INFO L87 Difference]: Start difference. First operand 18515 states and 55057 transitions. Second operand 6 states. [2019-12-07 12:51:02,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:02,216 INFO L93 Difference]: Finished difference Result 22604 states and 66411 transitions. [2019-12-07 12:51:02,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:51:02,216 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 12:51:02,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:02,238 INFO L225 Difference]: With dead ends: 22604 [2019-12-07 12:51:02,239 INFO L226 Difference]: Without dead ends: 22604 [2019-12-07 12:51:02,239 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:51:02,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22604 states. [2019-12-07 12:51:02,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22604 to 17798. [2019-12-07 12:51:02,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17798 states. [2019-12-07 12:51:02,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17798 states to 17798 states and 52944 transitions. [2019-12-07 12:51:02,530 INFO L78 Accepts]: Start accepts. Automaton has 17798 states and 52944 transitions. Word has length 34 [2019-12-07 12:51:02,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:02,531 INFO L462 AbstractCegarLoop]: Abstraction has 17798 states and 52944 transitions. [2019-12-07 12:51:02,531 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:51:02,531 INFO L276 IsEmpty]: Start isEmpty. Operand 17798 states and 52944 transitions. [2019-12-07 12:51:02,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:51:02,545 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:02,545 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:02,545 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:02,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:02,545 INFO L82 PathProgramCache]: Analyzing trace with hash -935567252, now seen corresponding path program 1 times [2019-12-07 12:51:02,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:02,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703386369] [2019-12-07 12:51:02,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:02,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:02,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:02,577 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703386369] [2019-12-07 12:51:02,577 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:02,577 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:51:02,578 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347628567] [2019-12-07 12:51:02,578 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:51:02,578 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:02,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:51:02,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:51:02,578 INFO L87 Difference]: Start difference. First operand 17798 states and 52944 transitions. Second operand 3 states. [2019-12-07 12:51:02,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:02,633 INFO L93 Difference]: Finished difference Result 17798 states and 52256 transitions. [2019-12-07 12:51:02,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:51:02,634 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 12:51:02,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:02,651 INFO L225 Difference]: With dead ends: 17798 [2019-12-07 12:51:02,652 INFO L226 Difference]: Without dead ends: 17798 [2019-12-07 12:51:02,652 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:51:02,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17798 states. [2019-12-07 12:51:02,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17798 to 17524. [2019-12-07 12:51:02,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17524 states. [2019-12-07 12:51:02,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17524 states to 17524 states and 51488 transitions. [2019-12-07 12:51:02,896 INFO L78 Accepts]: Start accepts. Automaton has 17524 states and 51488 transitions. Word has length 41 [2019-12-07 12:51:02,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:02,896 INFO L462 AbstractCegarLoop]: Abstraction has 17524 states and 51488 transitions. [2019-12-07 12:51:02,896 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:51:02,896 INFO L276 IsEmpty]: Start isEmpty. Operand 17524 states and 51488 transitions. [2019-12-07 12:51:02,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 12:51:02,910 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:02,910 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:02,910 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:02,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:02,910 INFO L82 PathProgramCache]: Analyzing trace with hash 936590377, now seen corresponding path program 1 times [2019-12-07 12:51:02,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:02,911 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786218209] [2019-12-07 12:51:02,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:02,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:02,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:02,947 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786218209] [2019-12-07 12:51:02,948 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:02,948 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:51:02,948 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2123295631] [2019-12-07 12:51:02,948 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:51:02,948 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:02,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:51:02,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:51:02,949 INFO L87 Difference]: Start difference. First operand 17524 states and 51488 transitions. Second operand 5 states. [2019-12-07 12:51:03,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:03,008 INFO L93 Difference]: Finished difference Result 16109 states and 48466 transitions. [2019-12-07 12:51:03,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:51:03,009 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 12:51:03,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:03,026 INFO L225 Difference]: With dead ends: 16109 [2019-12-07 12:51:03,027 INFO L226 Difference]: Without dead ends: 16109 [2019-12-07 12:51:03,027 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:51:03,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16109 states. [2019-12-07 12:51:03,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16109 to 14604. [2019-12-07 12:51:03,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14604 states. [2019-12-07 12:51:03,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14604 states to 14604 states and 44151 transitions. [2019-12-07 12:51:03,259 INFO L78 Accepts]: Start accepts. Automaton has 14604 states and 44151 transitions. Word has length 42 [2019-12-07 12:51:03,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:03,259 INFO L462 AbstractCegarLoop]: Abstraction has 14604 states and 44151 transitions. [2019-12-07 12:51:03,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:51:03,259 INFO L276 IsEmpty]: Start isEmpty. Operand 14604 states and 44151 transitions. [2019-12-07 12:51:03,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:51:03,271 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:03,272 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:03,272 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:03,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:03,272 INFO L82 PathProgramCache]: Analyzing trace with hash 1653836464, now seen corresponding path program 1 times [2019-12-07 12:51:03,272 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:03,272 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820819921] [2019-12-07 12:51:03,272 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:03,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:03,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:03,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820819921] [2019-12-07 12:51:03,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:03,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:51:03,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242812804] [2019-12-07 12:51:03,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:51:03,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:03,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:51:03,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:51:03,308 INFO L87 Difference]: Start difference. First operand 14604 states and 44151 transitions. Second operand 3 states. [2019-12-07 12:51:03,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:03,375 INFO L93 Difference]: Finished difference Result 17473 states and 52902 transitions. [2019-12-07 12:51:03,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:51:03,376 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:51:03,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:03,394 INFO L225 Difference]: With dead ends: 17473 [2019-12-07 12:51:03,394 INFO L226 Difference]: Without dead ends: 17473 [2019-12-07 12:51:03,394 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:51:03,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17473 states. [2019-12-07 12:51:03,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17473 to 13664. [2019-12-07 12:51:03,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13664 states. [2019-12-07 12:51:03,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13664 states to 13664 states and 41709 transitions. [2019-12-07 12:51:03,629 INFO L78 Accepts]: Start accepts. Automaton has 13664 states and 41709 transitions. Word has length 66 [2019-12-07 12:51:03,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:03,629 INFO L462 AbstractCegarLoop]: Abstraction has 13664 states and 41709 transitions. [2019-12-07 12:51:03,629 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:51:03,629 INFO L276 IsEmpty]: Start isEmpty. Operand 13664 states and 41709 transitions. [2019-12-07 12:51:03,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:51:03,642 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:03,642 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:03,642 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:03,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:03,642 INFO L82 PathProgramCache]: Analyzing trace with hash 731097294, now seen corresponding path program 1 times [2019-12-07 12:51:03,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:03,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184403895] [2019-12-07 12:51:03,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:03,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:03,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:03,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184403895] [2019-12-07 12:51:03,683 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:03,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:51:03,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728670942] [2019-12-07 12:51:03,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:51:03,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:03,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:51:03,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:51:03,684 INFO L87 Difference]: Start difference. First operand 13664 states and 41709 transitions. Second operand 4 states. [2019-12-07 12:51:03,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:03,759 INFO L93 Difference]: Finished difference Result 13479 states and 40986 transitions. [2019-12-07 12:51:03,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:51:03,760 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 12:51:03,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:03,773 INFO L225 Difference]: With dead ends: 13479 [2019-12-07 12:51:03,774 INFO L226 Difference]: Without dead ends: 13479 [2019-12-07 12:51:03,774 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:51:03,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13479 states. [2019-12-07 12:51:03,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13479 to 12329. [2019-12-07 12:51:03,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12329 states. [2019-12-07 12:51:03,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12329 states to 12329 states and 37348 transitions. [2019-12-07 12:51:03,981 INFO L78 Accepts]: Start accepts. Automaton has 12329 states and 37348 transitions. Word has length 67 [2019-12-07 12:51:03,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:03,981 INFO L462 AbstractCegarLoop]: Abstraction has 12329 states and 37348 transitions. [2019-12-07 12:51:03,981 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:51:03,981 INFO L276 IsEmpty]: Start isEmpty. Operand 12329 states and 37348 transitions. [2019-12-07 12:51:03,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:51:03,992 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:03,992 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:03,992 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:03,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:03,993 INFO L82 PathProgramCache]: Analyzing trace with hash -543525966, now seen corresponding path program 1 times [2019-12-07 12:51:03,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:03,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1584937840] [2019-12-07 12:51:03,993 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:04,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:04,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:04,141 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1584937840] [2019-12-07 12:51:04,141 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:04,141 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:51:04,141 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [85940262] [2019-12-07 12:51:04,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:51:04,142 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:04,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:51:04,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:51:04,142 INFO L87 Difference]: Start difference. First operand 12329 states and 37348 transitions. Second operand 10 states. [2019-12-07 12:51:04,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:04,956 INFO L93 Difference]: Finished difference Result 21886 states and 66232 transitions. [2019-12-07 12:51:04,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 12:51:04,956 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:51:04,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:04,973 INFO L225 Difference]: With dead ends: 21886 [2019-12-07 12:51:04,973 INFO L226 Difference]: Without dead ends: 16855 [2019-12-07 12:51:04,973 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=82, Invalid=338, Unknown=0, NotChecked=0, Total=420 [2019-12-07 12:51:05,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16855 states. [2019-12-07 12:51:05,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16855 to 14354. [2019-12-07 12:51:05,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14354 states. [2019-12-07 12:51:05,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14354 states to 14354 states and 43456 transitions. [2019-12-07 12:51:05,212 INFO L78 Accepts]: Start accepts. Automaton has 14354 states and 43456 transitions. Word has length 67 [2019-12-07 12:51:05,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:05,213 INFO L462 AbstractCegarLoop]: Abstraction has 14354 states and 43456 transitions. [2019-12-07 12:51:05,213 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:51:05,213 INFO L276 IsEmpty]: Start isEmpty. Operand 14354 states and 43456 transitions. [2019-12-07 12:51:05,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:51:05,225 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:05,225 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:05,225 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:05,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:05,226 INFO L82 PathProgramCache]: Analyzing trace with hash -1737332378, now seen corresponding path program 2 times [2019-12-07 12:51:05,226 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:05,226 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372432711] [2019-12-07 12:51:05,226 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:05,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:05,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:05,357 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372432711] [2019-12-07 12:51:05,357 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:05,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:51:05,357 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443127060] [2019-12-07 12:51:05,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:51:05,357 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:05,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:51:05,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:51:05,358 INFO L87 Difference]: Start difference. First operand 14354 states and 43456 transitions. Second operand 11 states. [2019-12-07 12:51:06,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:06,104 INFO L93 Difference]: Finished difference Result 21202 states and 63374 transitions. [2019-12-07 12:51:06,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 12:51:06,104 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:51:06,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:06,121 INFO L225 Difference]: With dead ends: 21202 [2019-12-07 12:51:06,121 INFO L226 Difference]: Without dead ends: 16947 [2019-12-07 12:51:06,122 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2019-12-07 12:51:06,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16947 states. [2019-12-07 12:51:06,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16947 to 14678. [2019-12-07 12:51:06,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14678 states. [2019-12-07 12:51:06,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14678 states to 14678 states and 44268 transitions. [2019-12-07 12:51:06,362 INFO L78 Accepts]: Start accepts. Automaton has 14678 states and 44268 transitions. Word has length 67 [2019-12-07 12:51:06,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:06,362 INFO L462 AbstractCegarLoop]: Abstraction has 14678 states and 44268 transitions. [2019-12-07 12:51:06,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:51:06,362 INFO L276 IsEmpty]: Start isEmpty. Operand 14678 states and 44268 transitions. [2019-12-07 12:51:06,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:51:06,375 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:06,375 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:06,375 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:06,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:06,376 INFO L82 PathProgramCache]: Analyzing trace with hash 202288426, now seen corresponding path program 3 times [2019-12-07 12:51:06,376 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:06,376 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2107893090] [2019-12-07 12:51:06,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:06,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:06,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:06,475 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2107893090] [2019-12-07 12:51:06,475 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:06,475 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:51:06,475 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1838574115] [2019-12-07 12:51:06,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:51:06,476 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:06,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:51:06,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:51:06,476 INFO L87 Difference]: Start difference. First operand 14678 states and 44268 transitions. Second operand 10 states. [2019-12-07 12:51:07,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:07,252 INFO L93 Difference]: Finished difference Result 22083 states and 65705 transitions. [2019-12-07 12:51:07,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 12:51:07,253 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:51:07,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:07,273 INFO L225 Difference]: With dead ends: 22083 [2019-12-07 12:51:07,273 INFO L226 Difference]: Without dead ends: 18758 [2019-12-07 12:51:07,273 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-12-07 12:51:07,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18758 states. [2019-12-07 12:51:07,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18758 to 15062. [2019-12-07 12:51:07,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15062 states. [2019-12-07 12:51:07,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15062 states to 15062 states and 45254 transitions. [2019-12-07 12:51:07,523 INFO L78 Accepts]: Start accepts. Automaton has 15062 states and 45254 transitions. Word has length 67 [2019-12-07 12:51:07,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:07,523 INFO L462 AbstractCegarLoop]: Abstraction has 15062 states and 45254 transitions. [2019-12-07 12:51:07,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:51:07,523 INFO L276 IsEmpty]: Start isEmpty. Operand 15062 states and 45254 transitions. [2019-12-07 12:51:07,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:51:07,536 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:07,536 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:07,536 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:07,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:07,536 INFO L82 PathProgramCache]: Analyzing trace with hash -917850962, now seen corresponding path program 4 times [2019-12-07 12:51:07,536 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:07,536 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190122361] [2019-12-07 12:51:07,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:07,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:07,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:07,689 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1190122361] [2019-12-07 12:51:07,689 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:07,689 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:51:07,689 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [658206557] [2019-12-07 12:51:07,690 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:51:07,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:07,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:51:07,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:51:07,690 INFO L87 Difference]: Start difference. First operand 15062 states and 45254 transitions. Second operand 11 states. [2019-12-07 12:51:08,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:08,608 INFO L93 Difference]: Finished difference Result 20625 states and 61357 transitions. [2019-12-07 12:51:08,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 12:51:08,609 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:51:08,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:08,627 INFO L225 Difference]: With dead ends: 20625 [2019-12-07 12:51:08,627 INFO L226 Difference]: Without dead ends: 18014 [2019-12-07 12:51:08,627 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2019-12-07 12:51:08,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18014 states. [2019-12-07 12:51:08,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18014 to 14758. [2019-12-07 12:51:08,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14758 states. [2019-12-07 12:51:08,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14758 states to 14758 states and 44338 transitions. [2019-12-07 12:51:08,869 INFO L78 Accepts]: Start accepts. Automaton has 14758 states and 44338 transitions. Word has length 67 [2019-12-07 12:51:08,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:08,869 INFO L462 AbstractCegarLoop]: Abstraction has 14758 states and 44338 transitions. [2019-12-07 12:51:08,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:51:08,870 INFO L276 IsEmpty]: Start isEmpty. Operand 14758 states and 44338 transitions. [2019-12-07 12:51:08,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:51:08,882 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:08,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:08,883 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:08,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:08,883 INFO L82 PathProgramCache]: Analyzing trace with hash 668274002, now seen corresponding path program 5 times [2019-12-07 12:51:08,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:08,883 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304753236] [2019-12-07 12:51:08,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:08,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:09,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:09,028 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304753236] [2019-12-07 12:51:09,028 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:09,028 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:51:09,028 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773230293] [2019-12-07 12:51:09,028 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:51:09,028 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:09,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:51:09,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:51:09,029 INFO L87 Difference]: Start difference. First operand 14758 states and 44338 transitions. Second operand 11 states. [2019-12-07 12:51:10,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:10,056 INFO L93 Difference]: Finished difference Result 38181 states and 113753 transitions. [2019-12-07 12:51:10,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 12:51:10,057 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:51:10,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:10,085 INFO L225 Difference]: With dead ends: 38181 [2019-12-07 12:51:10,085 INFO L226 Difference]: Without dead ends: 26787 [2019-12-07 12:51:10,085 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=277, Invalid=1129, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 12:51:10,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26787 states. [2019-12-07 12:51:10,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26787 to 14961. [2019-12-07 12:51:10,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14961 states. [2019-12-07 12:51:10,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14961 states to 14961 states and 44832 transitions. [2019-12-07 12:51:10,384 INFO L78 Accepts]: Start accepts. Automaton has 14961 states and 44832 transitions. Word has length 67 [2019-12-07 12:51:10,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:10,384 INFO L462 AbstractCegarLoop]: Abstraction has 14961 states and 44832 transitions. [2019-12-07 12:51:10,384 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:51:10,384 INFO L276 IsEmpty]: Start isEmpty. Operand 14961 states and 44832 transitions. [2019-12-07 12:51:10,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:51:10,398 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:10,398 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:10,398 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:10,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:10,398 INFO L82 PathProgramCache]: Analyzing trace with hash -222673432, now seen corresponding path program 6 times [2019-12-07 12:51:10,398 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:10,398 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881500242] [2019-12-07 12:51:10,398 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:10,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:51:10,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:51:10,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881500242] [2019-12-07 12:51:10,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:51:10,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:51:10,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [644063906] [2019-12-07 12:51:10,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:51:10,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:51:10,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:51:10,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:51:10,528 INFO L87 Difference]: Start difference. First operand 14961 states and 44832 transitions. Second operand 12 states. [2019-12-07 12:51:11,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:51:11,207 INFO L93 Difference]: Finished difference Result 26632 states and 78750 transitions. [2019-12-07 12:51:11,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 12:51:11,208 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 12:51:11,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:51:11,236 INFO L225 Difference]: With dead ends: 26632 [2019-12-07 12:51:11,237 INFO L226 Difference]: Without dead ends: 26153 [2019-12-07 12:51:11,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 191 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=178, Invalid=814, Unknown=0, NotChecked=0, Total=992 [2019-12-07 12:51:11,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26153 states. [2019-12-07 12:51:11,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26153 to 14601. [2019-12-07 12:51:11,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14601 states. [2019-12-07 12:51:11,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14601 states to 14601 states and 43790 transitions. [2019-12-07 12:51:11,536 INFO L78 Accepts]: Start accepts. Automaton has 14601 states and 43790 transitions. Word has length 67 [2019-12-07 12:51:11,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:51:11,536 INFO L462 AbstractCegarLoop]: Abstraction has 14601 states and 43790 transitions. [2019-12-07 12:51:11,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:51:11,537 INFO L276 IsEmpty]: Start isEmpty. Operand 14601 states and 43790 transitions. [2019-12-07 12:51:11,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:51:11,549 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:51:11,549 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:51:11,550 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:51:11,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:51:11,550 INFO L82 PathProgramCache]: Analyzing trace with hash -1210625396, now seen corresponding path program 7 times [2019-12-07 12:51:11,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:51:11,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108972170] [2019-12-07 12:51:11,550 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:51:11,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:51:11,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:51:11,632 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:51:11,632 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:51:11,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (= 0 |v_ULTIMATE.start_main_~#t74~0.offset_23|) (= 0 v_~x~0_134) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t74~0.base_32|)) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~z$read_delayed~0_6 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t74~0.base_32| 1)) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t74~0.base_32|) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t74~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t74~0.base_32|) |v_ULTIMATE.start_main_~#t74~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff1~0_222 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t74~0.base_32| 4)) (= 0 v_~__unbuffered_p0_EAX~0_142) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t75~0.offset=|v_ULTIMATE.start_main_~#t75~0.offset_22|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t76~0.base=|v_ULTIMATE.start_main_~#t76~0.base_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ULTIMATE.start_main_~#t76~0.offset=|v_ULTIMATE.start_main_~#t76~0.offset_14|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ULTIMATE.start_main_~#t75~0.base=|v_ULTIMATE.start_main_~#t75~0.base_29|, ULTIMATE.start_main_~#t74~0.offset=|v_ULTIMATE.start_main_~#t74~0.offset_23|, ~y~0=v_~y~0_24, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t74~0.base=|v_ULTIMATE.start_main_~#t74~0.base_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t75~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t76~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t76~0.offset, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t75~0.base, ULTIMATE.start_main_~#t74~0.offset, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t74~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:51:11,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246 0)) (= ~x~0_In2029572246 ~__unbuffered_p0_EAX~0_Out2029572246) (= ~z$r_buff0_thd1~0_In2029572246 ~z$r_buff1_thd1~0_Out2029572246) (= ~z$r_buff1_thd0~0_Out2029572246 ~z$r_buff0_thd0~0_In2029572246) (= ~z$r_buff1_thd3~0_Out2029572246 ~z$r_buff0_thd3~0_In2029572246) (= ~z$r_buff0_thd1~0_Out2029572246 1) (= ~z$r_buff1_thd2~0_Out2029572246 ~z$r_buff0_thd2~0_In2029572246)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2029572246, ~x~0=~x~0_In2029572246, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2029572246} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out2029572246, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2029572246, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out2029572246, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out2029572246, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out2029572246, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2029572246, ~x~0=~x~0_In2029572246, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2029572246} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:51:11,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t75~0.base_11| 4)) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t75~0.base_11| 1)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t75~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t75~0.base_11|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t75~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t75~0.base_11|) |v_ULTIMATE.start_main_~#t75~0.offset_10| 1)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t75~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t75~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t75~0.offset=|v_ULTIMATE.start_main_~#t75~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t75~0.base=|v_ULTIMATE.start_main_~#t75~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t75~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t75~0.base, #length] because there is no mapped edge [2019-12-07 12:51:11,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| |P1Thread1of1ForFork2_#t~ite10_Out1138404549|)) (.cse2 (= (mod ~z$w_buff1_used~0_In1138404549 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1138404549 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| ~z~0_In1138404549) .cse0 (or .cse1 .cse2)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| ~z$w_buff1~0_In1138404549) .cse0 (not .cse2) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1138404549, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1138404549, ~z$w_buff1~0=~z$w_buff1~0_In1138404549, ~z~0=~z~0_In1138404549} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1138404549|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1138404549, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1138404549|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1138404549, ~z$w_buff1~0=~z$w_buff1~0_In1138404549, ~z~0=~z~0_In1138404549} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 12:51:11,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1998633825 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1998633825 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1998633825 |P1Thread1of1ForFork2_#t~ite11_Out-1998633825|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1998633825|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998633825, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1998633825} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998633825, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1998633825|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1998633825} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:51:11,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t76~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t76~0.base_11|) |v_ULTIMATE.start_main_~#t76~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t76~0.base_11|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t76~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t76~0.base_11|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t76~0.base_11| 4) |v_#length_15|) (= |v_ULTIMATE.start_main_~#t76~0.offset_10| 0) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t76~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t76~0.offset=|v_ULTIMATE.start_main_~#t76~0.offset_10|, ULTIMATE.start_main_~#t76~0.base=|v_ULTIMATE.start_main_~#t76~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t76~0.offset, ULTIMATE.start_main_~#t76~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 12:51:11,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1951686915 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1951686915 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out1951686915| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1951686915 |P0Thread1of1ForFork1_#t~ite5_Out1951686915|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1951686915} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1951686915|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1951686915} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:51:11,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1721577792 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-1721577792 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1721577792 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1721577792 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1721577792| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite6_Out-1721577792| ~z$w_buff1_used~0_In-1721577792)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1721577792, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1721577792, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1721577792, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1721577792} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1721577792, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1721577792|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1721577792, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1721577792, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1721577792} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:51:11,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-802465787 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-802465787 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In-802465787 ~z$r_buff0_thd1~0_Out-802465787))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out-802465787) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-802465787} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-802465787|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-802465787} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:51:11,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-634165196 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-634165196 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-634165196 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-634165196 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-634165196| ~z$r_buff1_thd1~0_In-634165196) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-634165196|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-634165196, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-634165196, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-634165196, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-634165196} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-634165196|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-634165196, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-634165196, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-634165196, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-634165196} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:51:11,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:51:11,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1368216591 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1368216591 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In1368216591 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1368216591 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1368216591|)) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1368216591 |P1Thread1of1ForFork2_#t~ite12_Out1368216591|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1368216591} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1368216591|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1368216591} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:51:11,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1573265270 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1573265270 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In1573265270 |P1Thread1of1ForFork2_#t~ite13_Out1573265270|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1573265270|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1573265270, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1573265270} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1573265270, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1573265270|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1573265270} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:51:11,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-361323778 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-361323778 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-361323778 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-361323778 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-361323778| ~z$r_buff1_thd2~0_In-361323778) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite14_Out-361323778| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-361323778, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-361323778, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-361323778, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-361323778, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-361323778|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:51:11,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:51:11,644 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In541248209 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_In541248209| |P2Thread1of1ForFork0_#t~ite29_Out541248209|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite30_Out541248209| ~z$w_buff1_used~0_In541248209)) (and (= |P2Thread1of1ForFork0_#t~ite29_Out541248209| |P2Thread1of1ForFork0_#t~ite30_Out541248209|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In541248209 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In541248209 256)) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In541248209 256) 0)) (and .cse1 (= (mod ~z$w_buff1_used~0_In541248209 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite29_Out541248209| ~z$w_buff1_used~0_In541248209) .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In541248209, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In541248209, ~z$w_buff1_used~0=~z$w_buff1_used~0_In541248209, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In541248209, ~weak$$choice2~0=~weak$$choice2~0_In541248209, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In541248209|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In541248209, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In541248209, ~z$w_buff1_used~0=~z$w_buff1_used~0_In541248209, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In541248209, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out541248209|, ~weak$$choice2~0=~weak$$choice2~0_In541248209, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out541248209|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 12:51:11,644 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:51:11,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 12:51:11,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In1899950079 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1899950079 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1899950079| ~z$w_buff1~0_In1899950079) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1899950079| ~z~0_In1899950079) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1899950079, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1899950079, ~z$w_buff1~0=~z$w_buff1~0_In1899950079, ~z~0=~z~0_In1899950079} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1899950079|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1899950079, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1899950079, ~z$w_buff1~0=~z$w_buff1~0_In1899950079, ~z~0=~z~0_In1899950079} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:51:11,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 12:51:11,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-149696817 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-149696817 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-149696817| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-149696817 |P2Thread1of1ForFork0_#t~ite40_Out-149696817|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-149696817, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-149696817} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-149696817, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-149696817|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-149696817} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:51:11,646 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1350969871 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1350969871 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-1350969871 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1350969871 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1350969871| ~z$w_buff1_used~0_In-1350969871) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1350969871| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1350969871, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1350969871, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1350969871, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1350969871} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1350969871, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1350969871, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1350969871, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1350969871, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1350969871|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:51:11,646 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-204629242 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-204629242 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-204629242|)) (and (= ~z$r_buff0_thd3~0_In-204629242 |P2Thread1of1ForFork0_#t~ite42_Out-204629242|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-204629242, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-204629242} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-204629242, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-204629242, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-204629242|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:51:11,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In43252447 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In43252447 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In43252447 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In43252447 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out43252447|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$r_buff1_thd3~0_In43252447 |P2Thread1of1ForFork0_#t~ite43_Out43252447|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In43252447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In43252447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In43252447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In43252447} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out43252447|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In43252447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In43252447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In43252447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In43252447} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:51:11,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:51:11,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:51:11,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out-1303595495| |ULTIMATE.start_main_#t~ite47_Out-1303595495|)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1303595495 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1303595495 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In-1303595495 |ULTIMATE.start_main_#t~ite47_Out-1303595495|) .cse1 (not .cse2)) (and (= ~z~0_In-1303595495 |ULTIMATE.start_main_#t~ite47_Out-1303595495|) .cse1 (or .cse0 .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1303595495, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1303595495, ~z$w_buff1~0=~z$w_buff1~0_In-1303595495, ~z~0=~z~0_In-1303595495} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1303595495, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1303595495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1303595495, ~z$w_buff1~0=~z$w_buff1~0_In-1303595495, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1303595495|, ~z~0=~z~0_In-1303595495} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:51:11,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1504730334 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1504730334 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1504730334| ~z$w_buff0_used~0_In-1504730334)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1504730334| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1504730334, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1504730334} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1504730334, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1504730334, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1504730334|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:51:11,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-648599100 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-648599100 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-648599100 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-648599100 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-648599100 |ULTIMATE.start_main_#t~ite50_Out-648599100|)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-648599100|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-648599100, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-648599100, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-648599100|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-648599100, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-648599100, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:51:11,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1156825025 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1156825025 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1156825025 |ULTIMATE.start_main_#t~ite51_Out-1156825025|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-1156825025| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156825025, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156825025} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156825025, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1156825025|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156825025} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:51:11,649 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In194091227 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In194091227 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In194091227 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In194091227 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out194091227|)) (and (= ~z$r_buff1_thd0~0_In194091227 |ULTIMATE.start_main_#t~ite52_Out194091227|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In194091227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In194091227} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out194091227|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In194091227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In194091227} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:51:11,649 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:51:11,704 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:51:11 BasicIcfg [2019-12-07 12:51:11,704 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:51:11,704 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:51:11,704 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:51:11,704 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:51:11,705 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:48:44" (3/4) ... [2019-12-07 12:51:11,706 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:51:11,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (= 0 |v_ULTIMATE.start_main_~#t74~0.offset_23|) (= 0 v_~x~0_134) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t74~0.base_32|)) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~z$read_delayed~0_6 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t74~0.base_32| 1)) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t74~0.base_32|) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t74~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t74~0.base_32|) |v_ULTIMATE.start_main_~#t74~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff1~0_222 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t74~0.base_32| 4)) (= 0 v_~__unbuffered_p0_EAX~0_142) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t75~0.offset=|v_ULTIMATE.start_main_~#t75~0.offset_22|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t76~0.base=|v_ULTIMATE.start_main_~#t76~0.base_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ULTIMATE.start_main_~#t76~0.offset=|v_ULTIMATE.start_main_~#t76~0.offset_14|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ULTIMATE.start_main_~#t75~0.base=|v_ULTIMATE.start_main_~#t75~0.base_29|, ULTIMATE.start_main_~#t74~0.offset=|v_ULTIMATE.start_main_~#t74~0.offset_23|, ~y~0=v_~y~0_24, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t74~0.base=|v_ULTIMATE.start_main_~#t74~0.base_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t75~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t76~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t76~0.offset, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t75~0.base, ULTIMATE.start_main_~#t74~0.offset, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t74~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:51:11,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246 0)) (= ~x~0_In2029572246 ~__unbuffered_p0_EAX~0_Out2029572246) (= ~z$r_buff0_thd1~0_In2029572246 ~z$r_buff1_thd1~0_Out2029572246) (= ~z$r_buff1_thd0~0_Out2029572246 ~z$r_buff0_thd0~0_In2029572246) (= ~z$r_buff1_thd3~0_Out2029572246 ~z$r_buff0_thd3~0_In2029572246) (= ~z$r_buff0_thd1~0_Out2029572246 1) (= ~z$r_buff1_thd2~0_Out2029572246 ~z$r_buff0_thd2~0_In2029572246)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2029572246, ~x~0=~x~0_In2029572246, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2029572246} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out2029572246, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2029572246, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out2029572246, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out2029572246, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out2029572246, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In2029572246, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2029572246, ~x~0=~x~0_In2029572246, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2029572246} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:51:11,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t75~0.base_11| 4)) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t75~0.base_11| 1)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t75~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t75~0.base_11|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t75~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t75~0.base_11|) |v_ULTIMATE.start_main_~#t75~0.offset_10| 1)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t75~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t75~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t75~0.offset=|v_ULTIMATE.start_main_~#t75~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t75~0.base=|v_ULTIMATE.start_main_~#t75~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t75~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t75~0.base, #length] because there is no mapped edge [2019-12-07 12:51:11,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| |P1Thread1of1ForFork2_#t~ite10_Out1138404549|)) (.cse2 (= (mod ~z$w_buff1_used~0_In1138404549 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1138404549 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| ~z~0_In1138404549) .cse0 (or .cse1 .cse2)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1138404549| ~z$w_buff1~0_In1138404549) .cse0 (not .cse2) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1138404549, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1138404549, ~z$w_buff1~0=~z$w_buff1~0_In1138404549, ~z~0=~z~0_In1138404549} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1138404549|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1138404549, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1138404549|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1138404549, ~z$w_buff1~0=~z$w_buff1~0_In1138404549, ~z~0=~z~0_In1138404549} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 12:51:11,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1998633825 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1998633825 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1998633825 |P1Thread1of1ForFork2_#t~ite11_Out-1998633825|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1998633825|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998633825, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1998633825} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998633825, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1998633825|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1998633825} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:51:11,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t76~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t76~0.base_11|) |v_ULTIMATE.start_main_~#t76~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t76~0.base_11|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t76~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t76~0.base_11|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t76~0.base_11| 4) |v_#length_15|) (= |v_ULTIMATE.start_main_~#t76~0.offset_10| 0) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t76~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t76~0.offset=|v_ULTIMATE.start_main_~#t76~0.offset_10|, ULTIMATE.start_main_~#t76~0.base=|v_ULTIMATE.start_main_~#t76~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t76~0.offset, ULTIMATE.start_main_~#t76~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 12:51:11,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1951686915 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1951686915 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out1951686915| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1951686915 |P0Thread1of1ForFork1_#t~ite5_Out1951686915|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1951686915} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1951686915|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1951686915} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:51:11,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1721577792 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-1721577792 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1721577792 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1721577792 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1721577792| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite6_Out-1721577792| ~z$w_buff1_used~0_In-1721577792)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1721577792, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1721577792, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1721577792, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1721577792} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1721577792, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1721577792|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1721577792, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1721577792, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1721577792} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:51:11,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-802465787 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-802465787 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In-802465787 ~z$r_buff0_thd1~0_Out-802465787))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out-802465787) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-802465787} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-802465787|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-802465787} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:51:11,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-634165196 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-634165196 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-634165196 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-634165196 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-634165196| ~z$r_buff1_thd1~0_In-634165196) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-634165196|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-634165196, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-634165196, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-634165196, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-634165196} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-634165196|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-634165196, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-634165196, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-634165196, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-634165196} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:51:11,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:51:11,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1368216591 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1368216591 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In1368216591 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1368216591 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1368216591|)) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1368216591 |P1Thread1of1ForFork2_#t~ite12_Out1368216591|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1368216591} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1368216591|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1368216591} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:51:11,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1573265270 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1573265270 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In1573265270 |P1Thread1of1ForFork2_#t~ite13_Out1573265270|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1573265270|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1573265270, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1573265270} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1573265270, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1573265270|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1573265270} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:51:11,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-361323778 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-361323778 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-361323778 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-361323778 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-361323778| ~z$r_buff1_thd2~0_In-361323778) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite14_Out-361323778| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-361323778, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-361323778, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-361323778, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-361323778, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-361323778|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:51:11,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:51:11,714 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In541248209 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_In541248209| |P2Thread1of1ForFork0_#t~ite29_Out541248209|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite30_Out541248209| ~z$w_buff1_used~0_In541248209)) (and (= |P2Thread1of1ForFork0_#t~ite29_Out541248209| |P2Thread1of1ForFork0_#t~ite30_Out541248209|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In541248209 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In541248209 256)) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In541248209 256) 0)) (and .cse1 (= (mod ~z$w_buff1_used~0_In541248209 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite29_Out541248209| ~z$w_buff1_used~0_In541248209) .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In541248209, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In541248209, ~z$w_buff1_used~0=~z$w_buff1_used~0_In541248209, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In541248209, ~weak$$choice2~0=~weak$$choice2~0_In541248209, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In541248209|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In541248209, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In541248209, ~z$w_buff1_used~0=~z$w_buff1_used~0_In541248209, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In541248209, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out541248209|, ~weak$$choice2~0=~weak$$choice2~0_In541248209, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out541248209|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 12:51:11,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:51:11,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 12:51:11,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In1899950079 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1899950079 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1899950079| ~z$w_buff1~0_In1899950079) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1899950079| ~z~0_In1899950079) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1899950079, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1899950079, ~z$w_buff1~0=~z$w_buff1~0_In1899950079, ~z~0=~z~0_In1899950079} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1899950079|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1899950079, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1899950079, ~z$w_buff1~0=~z$w_buff1~0_In1899950079, ~z~0=~z~0_In1899950079} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:51:11,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 12:51:11,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-149696817 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-149696817 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-149696817| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-149696817 |P2Thread1of1ForFork0_#t~ite40_Out-149696817|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-149696817, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-149696817} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-149696817, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-149696817|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-149696817} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:51:11,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1350969871 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1350969871 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-1350969871 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1350969871 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1350969871| ~z$w_buff1_used~0_In-1350969871) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1350969871| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1350969871, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1350969871, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1350969871, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1350969871} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1350969871, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1350969871, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1350969871, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1350969871, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1350969871|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:51:11,717 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-204629242 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-204629242 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-204629242|)) (and (= ~z$r_buff0_thd3~0_In-204629242 |P2Thread1of1ForFork0_#t~ite42_Out-204629242|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-204629242, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-204629242} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-204629242, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-204629242, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-204629242|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:51:11,717 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In43252447 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In43252447 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In43252447 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In43252447 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out43252447|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$r_buff1_thd3~0_In43252447 |P2Thread1of1ForFork0_#t~ite43_Out43252447|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In43252447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In43252447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In43252447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In43252447} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out43252447|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In43252447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In43252447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In43252447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In43252447} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:51:11,717 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:51:11,717 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:51:11,718 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out-1303595495| |ULTIMATE.start_main_#t~ite47_Out-1303595495|)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1303595495 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1303595495 256) 0))) (or (and (not .cse0) (= ~z$w_buff1~0_In-1303595495 |ULTIMATE.start_main_#t~ite47_Out-1303595495|) .cse1 (not .cse2)) (and (= ~z~0_In-1303595495 |ULTIMATE.start_main_#t~ite47_Out-1303595495|) .cse1 (or .cse0 .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1303595495, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1303595495, ~z$w_buff1~0=~z$w_buff1~0_In-1303595495, ~z~0=~z~0_In-1303595495} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1303595495, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1303595495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1303595495, ~z$w_buff1~0=~z$w_buff1~0_In-1303595495, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1303595495|, ~z~0=~z~0_In-1303595495} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:51:11,718 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1504730334 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1504730334 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1504730334| ~z$w_buff0_used~0_In-1504730334)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1504730334| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1504730334, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1504730334} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1504730334, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1504730334, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1504730334|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:51:11,719 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-648599100 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-648599100 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-648599100 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-648599100 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-648599100 |ULTIMATE.start_main_#t~ite50_Out-648599100|)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-648599100|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-648599100, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-648599100, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-648599100|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-648599100, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-648599100, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:51:11,719 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1156825025 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1156825025 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1156825025 |ULTIMATE.start_main_#t~ite51_Out-1156825025|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-1156825025| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156825025, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156825025} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156825025, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1156825025|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156825025} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:51:11,719 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In194091227 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In194091227 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In194091227 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In194091227 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out194091227|)) (and (= ~z$r_buff1_thd0~0_In194091227 |ULTIMATE.start_main_#t~ite52_Out194091227|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In194091227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In194091227} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out194091227|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In194091227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In194091227} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:51:11,719 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:51:11,775 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_aa5b7a51-22f6-4021-b240-d8aa46214e54/bin/uautomizer/witness.graphml [2019-12-07 12:51:11,776 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:51:11,777 INFO L168 Benchmark]: Toolchain (without parser) took 148366.41 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 939.9 MB in the beginning and 4.9 GB in the end (delta: -4.0 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-12-07 12:51:11,777 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:51:11,777 INFO L168 Benchmark]: CACSL2BoogieTranslator took 409.44 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 939.9 MB in the beginning and 1.1 GB in the end (delta: -144.7 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 12:51:11,777 INFO L168 Benchmark]: Boogie Procedure Inliner took 47.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2019-12-07 12:51:11,778 INFO L168 Benchmark]: Boogie Preprocessor took 34.88 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:51:11,778 INFO L168 Benchmark]: RCFGBuilder took 402.67 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 58.0 MB). Peak memory consumption was 58.0 MB. Max. memory is 11.5 GB. [2019-12-07 12:51:11,778 INFO L168 Benchmark]: TraceAbstraction took 147396.75 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-12-07 12:51:11,778 INFO L168 Benchmark]: Witness Printer took 71.68 ms. Allocated memory is still 7.0 GB. Free memory was 5.0 GB in the beginning and 4.9 GB in the end (delta: 38.9 MB). Peak memory consumption was 38.9 MB. Max. memory is 11.5 GB. [2019-12-07 12:51:11,780 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 409.44 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 939.9 MB in the beginning and 1.1 GB in the end (delta: -144.7 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 47.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.88 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 402.67 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 58.0 MB). Peak memory consumption was 58.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 147396.75 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. * Witness Printer took 71.68 ms. Allocated memory is still 7.0 GB. Free memory was 5.0 GB in the beginning and 4.9 GB in the end (delta: 38.9 MB). Peak memory consumption was 38.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 178 ProgramPointsBefore, 95 ProgramPointsAfterwards, 215 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 35 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 29 ChoiceCompositions, 7593 VarBasedMoverChecksPositive, 373 VarBasedMoverChecksNegative, 200 SemBasedMoverChecksPositive, 268 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 132619 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L832] FCALL, FORK 0 pthread_create(&t74, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 1 z$w_buff1 = z$w_buff0 [L736] 1 z$w_buff0 = 1 [L737] 1 z$w_buff1_used = z$w_buff0_used [L738] 1 z$w_buff0_used = (_Bool)1 [L750] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L834] FCALL, FORK 0 pthread_create(&t75, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 x = 1 [L767] 2 __unbuffered_p1_EAX = x [L770] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L773] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L750] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L773] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L774] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L836] FCALL, FORK 0 pthread_create(&t76, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 y = 1 [L790] 3 __unbuffered_p2_EAX = y [L793] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L794] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L795] 3 z$flush_delayed = weak$$choice2 [L796] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L751] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L752] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L775] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L776] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L798] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L799] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L800] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L801] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L809] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L811] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L812] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L842] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L842] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L843] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L844] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L845] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 147.2s, OverallIterations: 31, TraceHistogramMax: 1, AutomataDifference: 26.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6270 SDtfs, 6396 SDslu, 19421 SDs, 0 SdLazy, 10151 SolverSat, 220 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 266 GetRequests, 28 SyntacticMatches, 18 SemanticMatches, 220 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 752 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=227267occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 97.5s AutomataMinimizationTime, 30 MinimizatonAttempts, 315895 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 1123 NumberOfCodeBlocks, 1123 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 1026 ConstructedInterpolants, 0 QuantifiedInterpolants, 287212 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...