./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix003_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix003_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 957932eb1d526e6d8778d28a684b5b910d90e05e ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:07:40,093 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:07:40,094 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:07:40,101 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:07:40,102 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:07:40,102 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:07:40,103 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:07:40,105 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:07:40,106 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:07:40,106 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:07:40,107 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:07:40,108 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:07:40,108 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:07:40,109 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:07:40,109 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:07:40,110 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:07:40,111 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:07:40,111 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:07:40,113 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:07:40,114 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:07:40,115 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:07:40,116 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:07:40,117 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:07:40,117 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:07:40,119 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:07:40,119 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:07:40,120 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:07:40,120 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:07:40,120 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:07:40,121 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:07:40,121 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:07:40,121 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:07:40,122 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:07:40,122 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:07:40,123 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:07:40,123 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:07:40,124 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:07:40,124 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:07:40,124 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:07:40,124 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:07:40,125 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:07:40,125 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:07:40,134 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:07:40,134 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:07:40,135 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:07:40,135 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:07:40,135 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:07:40,136 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:07:40,136 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:07:40,136 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:07:40,136 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:07:40,136 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:07:40,136 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:07:40,136 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:07:40,136 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:07:40,136 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:07:40,137 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:07:40,137 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:07:40,137 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:07:40,137 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:07:40,137 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:07:40,137 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:07:40,137 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:07:40,137 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:07:40,138 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:07:40,138 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:07:40,138 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:07:40,138 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:07:40,138 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:07:40,138 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:07:40,138 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:07:40,138 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 957932eb1d526e6d8778d28a684b5b910d90e05e [2019-12-07 16:07:40,243 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:07:40,253 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:07:40,256 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:07:40,258 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:07:40,258 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:07:40,258 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix003_tso.oepc.i [2019-12-07 16:07:40,298 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/data/9ec1c7472/1df0c90ea2a84edebb5636b08e4eea5f/FLAG5357c29f0 [2019-12-07 16:07:40,810 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:07:40,811 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/sv-benchmarks/c/pthread-wmm/mix003_tso.oepc.i [2019-12-07 16:07:40,824 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/data/9ec1c7472/1df0c90ea2a84edebb5636b08e4eea5f/FLAG5357c29f0 [2019-12-07 16:07:41,330 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/data/9ec1c7472/1df0c90ea2a84edebb5636b08e4eea5f [2019-12-07 16:07:41,333 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:07:41,334 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:07:41,334 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:07:41,334 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:07:41,337 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:07:41,338 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,340 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@227d51b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41, skipping insertion in model container [2019-12-07 16:07:41,340 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,345 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:07:41,380 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:07:41,616 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:07:41,624 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:07:41,667 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:07:41,711 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:07:41,711 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41 WrapperNode [2019-12-07 16:07:41,712 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:07:41,712 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:07:41,712 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:07:41,712 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:07:41,718 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,731 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,750 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:07:41,750 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:07:41,751 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:07:41,751 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:07:41,757 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,757 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,760 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,761 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,768 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,771 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,773 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... [2019-12-07 16:07:41,776 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:07:41,777 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:07:41,777 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:07:41,777 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:07:41,777 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:07:41,818 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:07:41,819 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:07:41,819 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:07:41,819 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:07:41,819 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:07:41,819 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:07:41,819 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:07:41,819 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:07:41,819 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 16:07:41,820 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 16:07:41,820 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:07:41,820 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:07:41,820 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:07:41,821 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:07:42,182 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:07:42,183 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:07:42,183 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:07:42 BoogieIcfgContainer [2019-12-07 16:07:42,183 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:07:42,184 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:07:42,184 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:07:42,186 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:07:42,186 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:07:41" (1/3) ... [2019-12-07 16:07:42,187 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f818e9e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:07:42, skipping insertion in model container [2019-12-07 16:07:42,187 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:07:41" (2/3) ... [2019-12-07 16:07:42,187 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f818e9e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:07:42, skipping insertion in model container [2019-12-07 16:07:42,187 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:07:42" (3/3) ... [2019-12-07 16:07:42,188 INFO L109 eAbstractionObserver]: Analyzing ICFG mix003_tso.oepc.i [2019-12-07 16:07:42,194 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:07:42,195 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:07:42,199 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:07:42,200 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:07:42,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,226 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,226 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,226 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,227 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,227 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,230 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,231 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,232 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,234 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,234 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,246 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,246 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,246 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,246 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,246 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,246 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,246 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:07:42,258 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 16:07:42,271 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:07:42,271 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:07:42,271 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:07:42,271 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:07:42,271 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:07:42,271 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:07:42,271 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:07:42,271 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:07:42,282 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 16:07:42,283 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 16:07:42,339 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 16:07:42,339 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:07:42,351 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:07:42,369 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 16:07:42,398 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 16:07:42,399 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:07:42,404 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:07:42,420 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 16:07:42,421 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:07:45,320 WARN L192 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 16:07:45,644 INFO L206 etLargeBlockEncoding]: Checked pairs total: 132619 [2019-12-07 16:07:45,644 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 16:07:45,646 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 16:08:02,493 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 120347 states. [2019-12-07 16:08:02,494 INFO L276 IsEmpty]: Start isEmpty. Operand 120347 states. [2019-12-07 16:08:02,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 16:08:02,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:08:02,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 16:08:02,499 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:08:02,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:08:02,502 INFO L82 PathProgramCache]: Analyzing trace with hash 919842, now seen corresponding path program 1 times [2019-12-07 16:08:02,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:08:02,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915122547] [2019-12-07 16:08:02,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:08:02,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:08:02,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:08:02,639 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915122547] [2019-12-07 16:08:02,639 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:08:02,639 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:08:02,640 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1719310460] [2019-12-07 16:08:02,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:08:02,643 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:08:02,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:08:02,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:08:02,654 INFO L87 Difference]: Start difference. First operand 120347 states. Second operand 3 states. [2019-12-07 16:08:03,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:08:03,453 INFO L93 Difference]: Finished difference Result 119613 states and 515253 transitions. [2019-12-07 16:08:03,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:08:03,455 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 16:08:03,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:08:03,934 INFO L225 Difference]: With dead ends: 119613 [2019-12-07 16:08:03,935 INFO L226 Difference]: Without dead ends: 105755 [2019-12-07 16:08:03,936 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:08:08,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105755 states. [2019-12-07 16:08:10,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105755 to 105755. [2019-12-07 16:08:10,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105755 states. [2019-12-07 16:08:11,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105755 states to 105755 states and 454361 transitions. [2019-12-07 16:08:11,501 INFO L78 Accepts]: Start accepts. Automaton has 105755 states and 454361 transitions. Word has length 3 [2019-12-07 16:08:11,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:08:11,501 INFO L462 AbstractCegarLoop]: Abstraction has 105755 states and 454361 transitions. [2019-12-07 16:08:11,501 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:08:11,502 INFO L276 IsEmpty]: Start isEmpty. Operand 105755 states and 454361 transitions. [2019-12-07 16:08:11,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:08:11,505 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:08:11,505 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:08:11,505 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:08:11,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:08:11,505 INFO L82 PathProgramCache]: Analyzing trace with hash 474732739, now seen corresponding path program 1 times [2019-12-07 16:08:11,506 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:08:11,506 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240841399] [2019-12-07 16:08:11,506 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:08:11,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:08:11,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:08:11,573 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240841399] [2019-12-07 16:08:11,573 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:08:11,573 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:08:11,573 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [598394553] [2019-12-07 16:08:11,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:08:11,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:08:11,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:08:11,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:08:11,575 INFO L87 Difference]: Start difference. First operand 105755 states and 454361 transitions. Second operand 4 states. [2019-12-07 16:08:12,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:08:12,436 INFO L93 Difference]: Finished difference Result 168845 states and 694815 transitions. [2019-12-07 16:08:12,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:08:12,436 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:08:12,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:08:12,870 INFO L225 Difference]: With dead ends: 168845 [2019-12-07 16:08:12,870 INFO L226 Difference]: Without dead ends: 168747 [2019-12-07 16:08:12,871 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:08:18,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168747 states. [2019-12-07 16:08:21,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168747 to 153153. [2019-12-07 16:08:21,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153153 states. [2019-12-07 16:08:22,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153153 states to 153153 states and 639357 transitions. [2019-12-07 16:08:22,321 INFO L78 Accepts]: Start accepts. Automaton has 153153 states and 639357 transitions. Word has length 11 [2019-12-07 16:08:22,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:08:22,321 INFO L462 AbstractCegarLoop]: Abstraction has 153153 states and 639357 transitions. [2019-12-07 16:08:22,321 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:08:22,322 INFO L276 IsEmpty]: Start isEmpty. Operand 153153 states and 639357 transitions. [2019-12-07 16:08:22,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:08:22,326 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:08:22,327 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:08:22,327 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:08:22,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:08:22,327 INFO L82 PathProgramCache]: Analyzing trace with hash -512415605, now seen corresponding path program 1 times [2019-12-07 16:08:22,327 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:08:22,327 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670079052] [2019-12-07 16:08:22,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:08:22,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:08:22,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:08:22,377 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670079052] [2019-12-07 16:08:22,377 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:08:22,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:08:22,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828242688] [2019-12-07 16:08:22,378 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:08:22,378 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:08:22,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:08:22,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:08:22,378 INFO L87 Difference]: Start difference. First operand 153153 states and 639357 transitions. Second operand 4 states. [2019-12-07 16:08:23,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:08:23,851 INFO L93 Difference]: Finished difference Result 220024 states and 896381 transitions. [2019-12-07 16:08:23,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:08:23,851 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:08:23,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:08:24,415 INFO L225 Difference]: With dead ends: 220024 [2019-12-07 16:08:24,415 INFO L226 Difference]: Without dead ends: 219912 [2019-12-07 16:08:24,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:08:30,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219912 states. [2019-12-07 16:08:32,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219912 to 183120. [2019-12-07 16:08:32,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183120 states. [2019-12-07 16:08:36,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183120 states to 183120 states and 760223 transitions. [2019-12-07 16:08:36,585 INFO L78 Accepts]: Start accepts. Automaton has 183120 states and 760223 transitions. Word has length 13 [2019-12-07 16:08:36,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:08:36,586 INFO L462 AbstractCegarLoop]: Abstraction has 183120 states and 760223 transitions. [2019-12-07 16:08:36,586 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:08:36,586 INFO L276 IsEmpty]: Start isEmpty. Operand 183120 states and 760223 transitions. [2019-12-07 16:08:36,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 16:08:36,593 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:08:36,593 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:08:36,593 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:08:36,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:08:36,593 INFO L82 PathProgramCache]: Analyzing trace with hash -1719969010, now seen corresponding path program 1 times [2019-12-07 16:08:36,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:08:36,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621644713] [2019-12-07 16:08:36,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:08:36,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:08:36,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:08:36,643 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621644713] [2019-12-07 16:08:36,643 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:08:36,643 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:08:36,643 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385525986] [2019-12-07 16:08:36,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:08:36,644 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:08:36,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:08:36,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:08:36,644 INFO L87 Difference]: Start difference. First operand 183120 states and 760223 transitions. Second operand 4 states. [2019-12-07 16:08:37,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:08:37,790 INFO L93 Difference]: Finished difference Result 225249 states and 927434 transitions. [2019-12-07 16:08:37,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:08:37,791 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 16:08:37,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:08:38,396 INFO L225 Difference]: With dead ends: 225249 [2019-12-07 16:08:38,396 INFO L226 Difference]: Without dead ends: 225249 [2019-12-07 16:08:38,397 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:08:44,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225249 states. [2019-12-07 16:08:47,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225249 to 195075. [2019-12-07 16:08:47,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195075 states. [2019-12-07 16:08:47,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195075 states to 195075 states and 809283 transitions. [2019-12-07 16:08:47,768 INFO L78 Accepts]: Start accepts. Automaton has 195075 states and 809283 transitions. Word has length 16 [2019-12-07 16:08:47,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:08:47,768 INFO L462 AbstractCegarLoop]: Abstraction has 195075 states and 809283 transitions. [2019-12-07 16:08:47,768 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:08:47,768 INFO L276 IsEmpty]: Start isEmpty. Operand 195075 states and 809283 transitions. [2019-12-07 16:08:47,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 16:08:47,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:08:47,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:08:47,775 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:08:47,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:08:47,775 INFO L82 PathProgramCache]: Analyzing trace with hash -1720071868, now seen corresponding path program 1 times [2019-12-07 16:08:47,775 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:08:47,776 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778893243] [2019-12-07 16:08:47,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:08:47,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:08:47,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:08:47,806 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778893243] [2019-12-07 16:08:47,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:08:47,807 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:08:47,807 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [624451792] [2019-12-07 16:08:47,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:08:47,807 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:08:47,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:08:47,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:08:47,808 INFO L87 Difference]: Start difference. First operand 195075 states and 809283 transitions. Second operand 3 states. [2019-12-07 16:08:48,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:08:48,967 INFO L93 Difference]: Finished difference Result 282572 states and 1168256 transitions. [2019-12-07 16:08:48,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:08:48,968 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 16:08:48,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:08:49,703 INFO L225 Difference]: With dead ends: 282572 [2019-12-07 16:08:49,703 INFO L226 Difference]: Without dead ends: 282572 [2019-12-07 16:08:49,704 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:08:59,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282572 states. [2019-12-07 16:09:02,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282572 to 224589. [2019-12-07 16:09:02,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224589 states. [2019-12-07 16:09:03,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224589 states to 224589 states and 936012 transitions. [2019-12-07 16:09:03,441 INFO L78 Accepts]: Start accepts. Automaton has 224589 states and 936012 transitions. Word has length 16 [2019-12-07 16:09:03,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:03,442 INFO L462 AbstractCegarLoop]: Abstraction has 224589 states and 936012 transitions. [2019-12-07 16:09:03,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:09:03,442 INFO L276 IsEmpty]: Start isEmpty. Operand 224589 states and 936012 transitions. [2019-12-07 16:09:03,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 16:09:03,448 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:03,448 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:03,448 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:03,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:03,448 INFO L82 PathProgramCache]: Analyzing trace with hash 759335912, now seen corresponding path program 1 times [2019-12-07 16:09:03,448 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:03,448 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385123450] [2019-12-07 16:09:03,448 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:03,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:03,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:03,486 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385123450] [2019-12-07 16:09:03,486 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:03,486 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:09:03,487 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672978428] [2019-12-07 16:09:03,487 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:09:03,487 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:03,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:09:03,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:09:03,487 INFO L87 Difference]: Start difference. First operand 224589 states and 936012 transitions. Second operand 4 states. [2019-12-07 16:09:05,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:05,207 INFO L93 Difference]: Finished difference Result 265350 states and 1097413 transitions. [2019-12-07 16:09:05,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:09:05,208 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 16:09:05,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:05,891 INFO L225 Difference]: With dead ends: 265350 [2019-12-07 16:09:05,891 INFO L226 Difference]: Without dead ends: 265350 [2019-12-07 16:09:05,892 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:09:12,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265350 states. [2019-12-07 16:09:15,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265350 to 227267. [2019-12-07 16:09:15,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227267 states. [2019-12-07 16:09:16,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227267 states to 227267 states and 947978 transitions. [2019-12-07 16:09:16,469 INFO L78 Accepts]: Start accepts. Automaton has 227267 states and 947978 transitions. Word has length 16 [2019-12-07 16:09:16,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:16,469 INFO L462 AbstractCegarLoop]: Abstraction has 227267 states and 947978 transitions. [2019-12-07 16:09:16,469 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:09:16,469 INFO L276 IsEmpty]: Start isEmpty. Operand 227267 states and 947978 transitions. [2019-12-07 16:09:16,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 16:09:16,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:16,479 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:16,479 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:16,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:16,480 INFO L82 PathProgramCache]: Analyzing trace with hash 980787520, now seen corresponding path program 1 times [2019-12-07 16:09:16,480 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:16,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1053648062] [2019-12-07 16:09:16,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:16,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:16,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:16,538 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1053648062] [2019-12-07 16:09:16,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:16,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:09:16,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212483087] [2019-12-07 16:09:16,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:09:16,539 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:16,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:09:16,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:16,539 INFO L87 Difference]: Start difference. First operand 227267 states and 947978 transitions. Second operand 3 states. [2019-12-07 16:09:19,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:19,676 INFO L93 Difference]: Finished difference Result 227267 states and 938556 transitions. [2019-12-07 16:09:19,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:09:19,677 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 16:09:19,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:20,283 INFO L225 Difference]: With dead ends: 227267 [2019-12-07 16:09:20,283 INFO L226 Difference]: Without dead ends: 227267 [2019-12-07 16:09:20,284 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:26,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227267 states. [2019-12-07 16:09:29,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227267 to 223833. [2019-12-07 16:09:29,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223833 states. [2019-12-07 16:09:29,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223833 states to 223833 states and 925814 transitions. [2019-12-07 16:09:29,839 INFO L78 Accepts]: Start accepts. Automaton has 223833 states and 925814 transitions. Word has length 18 [2019-12-07 16:09:29,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:29,839 INFO L462 AbstractCegarLoop]: Abstraction has 223833 states and 925814 transitions. [2019-12-07 16:09:29,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:09:29,839 INFO L276 IsEmpty]: Start isEmpty. Operand 223833 states and 925814 transitions. [2019-12-07 16:09:29,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 16:09:29,849 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:29,849 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:29,849 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:29,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:29,849 INFO L82 PathProgramCache]: Analyzing trace with hash -907604290, now seen corresponding path program 1 times [2019-12-07 16:09:29,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:29,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257818859] [2019-12-07 16:09:29,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:29,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:29,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:29,901 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1257818859] [2019-12-07 16:09:29,901 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:29,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:09:29,901 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [880370480] [2019-12-07 16:09:29,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:09:29,901 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:29,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:09:29,901 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:29,901 INFO L87 Difference]: Start difference. First operand 223833 states and 925814 transitions. Second operand 3 states. [2019-12-07 16:09:31,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:31,237 INFO L93 Difference]: Finished difference Result 227222 states and 936124 transitions. [2019-12-07 16:09:31,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:09:31,238 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 16:09:31,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:31,850 INFO L225 Difference]: With dead ends: 227222 [2019-12-07 16:09:31,851 INFO L226 Difference]: Without dead ends: 227222 [2019-12-07 16:09:31,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:37,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227222 states. [2019-12-07 16:09:41,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227222 to 223830. [2019-12-07 16:09:41,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223830 states. [2019-12-07 16:09:41,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223830 states to 223830 states and 925802 transitions. [2019-12-07 16:09:41,675 INFO L78 Accepts]: Start accepts. Automaton has 223830 states and 925802 transitions. Word has length 18 [2019-12-07 16:09:41,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:41,675 INFO L462 AbstractCegarLoop]: Abstraction has 223830 states and 925802 transitions. [2019-12-07 16:09:41,675 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:09:41,675 INFO L276 IsEmpty]: Start isEmpty. Operand 223830 states and 925802 transitions. [2019-12-07 16:09:41,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:09:41,687 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:41,687 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:41,687 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:41,688 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:41,688 INFO L82 PathProgramCache]: Analyzing trace with hash 793088017, now seen corresponding path program 1 times [2019-12-07 16:09:41,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:41,688 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1794597203] [2019-12-07 16:09:41,688 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:41,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:41,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:41,709 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1794597203] [2019-12-07 16:09:41,709 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:41,709 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:09:41,709 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467866635] [2019-12-07 16:09:41,710 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:09:41,710 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:41,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:09:41,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:41,710 INFO L87 Difference]: Start difference. First operand 223830 states and 925802 transitions. Second operand 3 states. [2019-12-07 16:09:41,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:41,837 INFO L93 Difference]: Finished difference Result 41380 states and 135423 transitions. [2019-12-07 16:09:41,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:09:41,837 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 16:09:41,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:41,894 INFO L225 Difference]: With dead ends: 41380 [2019-12-07 16:09:41,894 INFO L226 Difference]: Without dead ends: 41380 [2019-12-07 16:09:41,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:42,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41380 states. [2019-12-07 16:09:42,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41380 to 41380. [2019-12-07 16:09:42,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41380 states. [2019-12-07 16:09:42,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41380 states to 41380 states and 135423 transitions. [2019-12-07 16:09:42,907 INFO L78 Accepts]: Start accepts. Automaton has 41380 states and 135423 transitions. Word has length 19 [2019-12-07 16:09:42,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:42,908 INFO L462 AbstractCegarLoop]: Abstraction has 41380 states and 135423 transitions. [2019-12-07 16:09:42,908 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:09:42,908 INFO L276 IsEmpty]: Start isEmpty. Operand 41380 states and 135423 transitions. [2019-12-07 16:09:42,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:09:42,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:42,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:42,913 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:42,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:42,914 INFO L82 PathProgramCache]: Analyzing trace with hash -390431288, now seen corresponding path program 1 times [2019-12-07 16:09:42,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:42,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776775491] [2019-12-07 16:09:42,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:42,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:42,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:42,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776775491] [2019-12-07 16:09:42,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:42,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:09:42,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248488547] [2019-12-07 16:09:42,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:09:42,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:42,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:09:42,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:09:42,958 INFO L87 Difference]: Start difference. First operand 41380 states and 135423 transitions. Second operand 5 states. [2019-12-07 16:09:43,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:43,388 INFO L93 Difference]: Finished difference Result 57787 states and 184150 transitions. [2019-12-07 16:09:43,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:09:43,389 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 16:09:43,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:43,475 INFO L225 Difference]: With dead ends: 57787 [2019-12-07 16:09:43,475 INFO L226 Difference]: Without dead ends: 57773 [2019-12-07 16:09:43,475 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:09:43,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57773 states. [2019-12-07 16:09:44,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57773 to 42368. [2019-12-07 16:09:44,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42368 states. [2019-12-07 16:09:44,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42368 states to 42368 states and 138443 transitions. [2019-12-07 16:09:44,283 INFO L78 Accepts]: Start accepts. Automaton has 42368 states and 138443 transitions. Word has length 22 [2019-12-07 16:09:44,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:44,284 INFO L462 AbstractCegarLoop]: Abstraction has 42368 states and 138443 transitions. [2019-12-07 16:09:44,284 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:09:44,284 INFO L276 IsEmpty]: Start isEmpty. Operand 42368 states and 138443 transitions. [2019-12-07 16:09:44,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:09:44,290 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:44,290 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:44,290 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:44,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:44,290 INFO L82 PathProgramCache]: Analyzing trace with hash 2088873634, now seen corresponding path program 1 times [2019-12-07 16:09:44,290 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:44,290 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373445508] [2019-12-07 16:09:44,290 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:44,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:44,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:44,325 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373445508] [2019-12-07 16:09:44,325 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:44,325 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:09:44,325 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1465804448] [2019-12-07 16:09:44,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:09:44,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:44,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:09:44,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:09:44,326 INFO L87 Difference]: Start difference. First operand 42368 states and 138443 transitions. Second operand 5 states. [2019-12-07 16:09:44,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:44,732 INFO L93 Difference]: Finished difference Result 59679 states and 189951 transitions. [2019-12-07 16:09:44,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:09:44,733 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 16:09:44,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:44,821 INFO L225 Difference]: With dead ends: 59679 [2019-12-07 16:09:44,821 INFO L226 Difference]: Without dead ends: 59665 [2019-12-07 16:09:44,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:09:45,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59665 states. [2019-12-07 16:09:46,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59665 to 41021. [2019-12-07 16:09:46,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41021 states. [2019-12-07 16:09:46,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41021 states to 41021 states and 134083 transitions. [2019-12-07 16:09:46,476 INFO L78 Accepts]: Start accepts. Automaton has 41021 states and 134083 transitions. Word has length 22 [2019-12-07 16:09:46,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:46,476 INFO L462 AbstractCegarLoop]: Abstraction has 41021 states and 134083 transitions. [2019-12-07 16:09:46,476 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:09:46,476 INFO L276 IsEmpty]: Start isEmpty. Operand 41021 states and 134083 transitions. [2019-12-07 16:09:46,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:09:46,485 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:46,486 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:46,486 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:46,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:46,486 INFO L82 PathProgramCache]: Analyzing trace with hash -697105977, now seen corresponding path program 1 times [2019-12-07 16:09:46,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:46,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053633377] [2019-12-07 16:09:46,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:46,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:46,516 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:46,516 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053633377] [2019-12-07 16:09:46,517 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:46,517 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:09:46,517 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574108878] [2019-12-07 16:09:46,517 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:09:46,517 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:46,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:09:46,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:09:46,518 INFO L87 Difference]: Start difference. First operand 41021 states and 134083 transitions. Second operand 4 states. [2019-12-07 16:09:46,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:46,576 INFO L93 Difference]: Finished difference Result 15869 states and 49980 transitions. [2019-12-07 16:09:46,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:09:46,576 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 16:09:46,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:46,594 INFO L225 Difference]: With dead ends: 15869 [2019-12-07 16:09:46,594 INFO L226 Difference]: Without dead ends: 15869 [2019-12-07 16:09:46,594 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:09:46,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15869 states. [2019-12-07 16:09:46,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15869 to 15869. [2019-12-07 16:09:46,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15869 states. [2019-12-07 16:09:46,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15869 states to 15869 states and 49980 transitions. [2019-12-07 16:09:46,818 INFO L78 Accepts]: Start accepts. Automaton has 15869 states and 49980 transitions. Word has length 25 [2019-12-07 16:09:46,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:46,818 INFO L462 AbstractCegarLoop]: Abstraction has 15869 states and 49980 transitions. [2019-12-07 16:09:46,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:09:46,818 INFO L276 IsEmpty]: Start isEmpty. Operand 15869 states and 49980 transitions. [2019-12-07 16:09:46,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 16:09:46,829 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:46,829 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:46,829 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:46,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:46,829 INFO L82 PathProgramCache]: Analyzing trace with hash 967503752, now seen corresponding path program 1 times [2019-12-07 16:09:46,829 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:46,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493460247] [2019-12-07 16:09:46,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:46,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:46,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:46,846 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493460247] [2019-12-07 16:09:46,847 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:46,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:09:46,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [995237874] [2019-12-07 16:09:46,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:09:46,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:46,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:09:46,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:46,847 INFO L87 Difference]: Start difference. First operand 15869 states and 49980 transitions. Second operand 3 states. [2019-12-07 16:09:46,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:46,910 INFO L93 Difference]: Finished difference Result 20201 states and 60332 transitions. [2019-12-07 16:09:46,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:09:46,911 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 16:09:46,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:46,931 INFO L225 Difference]: With dead ends: 20201 [2019-12-07 16:09:46,931 INFO L226 Difference]: Without dead ends: 20201 [2019-12-07 16:09:46,931 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:47,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20201 states. [2019-12-07 16:09:47,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20201 to 15869. [2019-12-07 16:09:47,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15869 states. [2019-12-07 16:09:47,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15869 states to 15869 states and 47602 transitions. [2019-12-07 16:09:47,177 INFO L78 Accepts]: Start accepts. Automaton has 15869 states and 47602 transitions. Word has length 27 [2019-12-07 16:09:47,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:47,177 INFO L462 AbstractCegarLoop]: Abstraction has 15869 states and 47602 transitions. [2019-12-07 16:09:47,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:09:47,177 INFO L276 IsEmpty]: Start isEmpty. Operand 15869 states and 47602 transitions. [2019-12-07 16:09:47,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 16:09:47,187 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:47,187 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:47,187 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:47,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:47,187 INFO L82 PathProgramCache]: Analyzing trace with hash 196927527, now seen corresponding path program 1 times [2019-12-07 16:09:47,188 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:47,188 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861670381] [2019-12-07 16:09:47,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:47,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:47,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:47,217 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861670381] [2019-12-07 16:09:47,217 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:47,218 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:09:47,218 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111393051] [2019-12-07 16:09:47,218 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:09:47,218 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:47,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:09:47,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:09:47,219 INFO L87 Difference]: Start difference. First operand 15869 states and 47602 transitions. Second operand 5 states. [2019-12-07 16:09:47,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:47,433 INFO L93 Difference]: Finished difference Result 19656 states and 58117 transitions. [2019-12-07 16:09:47,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:09:47,434 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 16:09:47,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:47,454 INFO L225 Difference]: With dead ends: 19656 [2019-12-07 16:09:47,454 INFO L226 Difference]: Without dead ends: 19656 [2019-12-07 16:09:47,454 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:09:47,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19656 states. [2019-12-07 16:09:47,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19656 to 16811. [2019-12-07 16:09:47,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16811 states. [2019-12-07 16:09:47,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16811 states to 16811 states and 50401 transitions. [2019-12-07 16:09:47,712 INFO L78 Accepts]: Start accepts. Automaton has 16811 states and 50401 transitions. Word has length 27 [2019-12-07 16:09:47,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:47,712 INFO L462 AbstractCegarLoop]: Abstraction has 16811 states and 50401 transitions. [2019-12-07 16:09:47,712 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:09:47,712 INFO L276 IsEmpty]: Start isEmpty. Operand 16811 states and 50401 transitions. [2019-12-07 16:09:47,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 16:09:47,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:47,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:47,723 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:47,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:47,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1188103809, now seen corresponding path program 1 times [2019-12-07 16:09:47,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:47,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359803428] [2019-12-07 16:09:47,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:47,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:47,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:47,756 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359803428] [2019-12-07 16:09:47,756 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:47,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:09:47,757 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408180296] [2019-12-07 16:09:47,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:09:47,757 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:47,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:09:47,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:09:47,757 INFO L87 Difference]: Start difference. First operand 16811 states and 50401 transitions. Second operand 5 states. [2019-12-07 16:09:47,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:47,967 INFO L93 Difference]: Finished difference Result 20323 states and 60022 transitions. [2019-12-07 16:09:47,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:09:47,967 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 16:09:47,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:47,988 INFO L225 Difference]: With dead ends: 20323 [2019-12-07 16:09:47,988 INFO L226 Difference]: Without dead ends: 20323 [2019-12-07 16:09:47,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:09:48,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20323 states. [2019-12-07 16:09:48,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20323 to 16587. [2019-12-07 16:09:48,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16587 states. [2019-12-07 16:09:48,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16587 states to 16587 states and 49677 transitions. [2019-12-07 16:09:48,247 INFO L78 Accepts]: Start accepts. Automaton has 16587 states and 49677 transitions. Word has length 28 [2019-12-07 16:09:48,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:48,248 INFO L462 AbstractCegarLoop]: Abstraction has 16587 states and 49677 transitions. [2019-12-07 16:09:48,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:09:48,248 INFO L276 IsEmpty]: Start isEmpty. Operand 16587 states and 49677 transitions. [2019-12-07 16:09:48,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 16:09:48,259 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:48,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:48,259 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:48,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:48,260 INFO L82 PathProgramCache]: Analyzing trace with hash 1042720045, now seen corresponding path program 1 times [2019-12-07 16:09:48,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:48,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173019919] [2019-12-07 16:09:48,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:48,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:48,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:48,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173019919] [2019-12-07 16:09:48,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:48,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:09:48,310 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [244885170] [2019-12-07 16:09:48,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:09:48,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:48,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:09:48,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:09:48,311 INFO L87 Difference]: Start difference. First operand 16587 states and 49677 transitions. Second operand 6 states. [2019-12-07 16:09:48,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:48,770 INFO L93 Difference]: Finished difference Result 22141 states and 65250 transitions. [2019-12-07 16:09:48,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 16:09:48,770 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 16:09:48,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:48,792 INFO L225 Difference]: With dead ends: 22141 [2019-12-07 16:09:48,792 INFO L226 Difference]: Without dead ends: 22141 [2019-12-07 16:09:48,792 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:09:48,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22141 states. [2019-12-07 16:09:49,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22141 to 16791. [2019-12-07 16:09:49,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16791 states. [2019-12-07 16:09:49,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16791 states to 16791 states and 50330 transitions. [2019-12-07 16:09:49,053 INFO L78 Accepts]: Start accepts. Automaton has 16791 states and 50330 transitions. Word has length 33 [2019-12-07 16:09:49,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:49,053 INFO L462 AbstractCegarLoop]: Abstraction has 16791 states and 50330 transitions. [2019-12-07 16:09:49,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:09:49,053 INFO L276 IsEmpty]: Start isEmpty. Operand 16791 states and 50330 transitions. [2019-12-07 16:09:49,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 16:09:49,065 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:49,065 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:49,065 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:49,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:49,065 INFO L82 PathProgramCache]: Analyzing trace with hash -738339527, now seen corresponding path program 1 times [2019-12-07 16:09:49,065 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:49,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265363513] [2019-12-07 16:09:49,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:49,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:49,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:49,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1265363513] [2019-12-07 16:09:49,122 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:49,122 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:09:49,122 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1274790281] [2019-12-07 16:09:49,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:09:49,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:49,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:09:49,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:09:49,123 INFO L87 Difference]: Start difference. First operand 16791 states and 50330 transitions. Second operand 6 states. [2019-12-07 16:09:49,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:49,526 INFO L93 Difference]: Finished difference Result 21420 states and 63215 transitions. [2019-12-07 16:09:49,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 16:09:49,526 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 16:09:49,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:49,547 INFO L225 Difference]: With dead ends: 21420 [2019-12-07 16:09:49,547 INFO L226 Difference]: Without dead ends: 21420 [2019-12-07 16:09:49,548 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:09:49,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21420 states. [2019-12-07 16:09:49,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21420 to 16038. [2019-12-07 16:09:49,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16038 states. [2019-12-07 16:09:49,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16038 states to 16038 states and 48094 transitions. [2019-12-07 16:09:49,809 INFO L78 Accepts]: Start accepts. Automaton has 16038 states and 48094 transitions. Word has length 34 [2019-12-07 16:09:49,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:49,809 INFO L462 AbstractCegarLoop]: Abstraction has 16038 states and 48094 transitions. [2019-12-07 16:09:49,809 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:09:49,809 INFO L276 IsEmpty]: Start isEmpty. Operand 16038 states and 48094 transitions. [2019-12-07 16:09:49,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 16:09:49,823 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:49,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:49,823 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:49,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:49,823 INFO L82 PathProgramCache]: Analyzing trace with hash 520376947, now seen corresponding path program 1 times [2019-12-07 16:09:49,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:49,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1582347900] [2019-12-07 16:09:49,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:49,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:49,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:49,885 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1582347900] [2019-12-07 16:09:49,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:49,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:09:49,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [824623142] [2019-12-07 16:09:49,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:09:49,886 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:49,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:09:49,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:09:49,886 INFO L87 Difference]: Start difference. First operand 16038 states and 48094 transitions. Second operand 4 states. [2019-12-07 16:09:49,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:49,932 INFO L93 Difference]: Finished difference Result 16037 states and 48092 transitions. [2019-12-07 16:09:49,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:09:49,932 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 40 [2019-12-07 16:09:49,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:49,949 INFO L225 Difference]: With dead ends: 16037 [2019-12-07 16:09:49,949 INFO L226 Difference]: Without dead ends: 16037 [2019-12-07 16:09:49,950 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:09:50,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16037 states. [2019-12-07 16:09:50,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16037 to 16037. [2019-12-07 16:09:50,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16037 states. [2019-12-07 16:09:50,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16037 states to 16037 states and 48092 transitions. [2019-12-07 16:09:50,173 INFO L78 Accepts]: Start accepts. Automaton has 16037 states and 48092 transitions. Word has length 40 [2019-12-07 16:09:50,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:50,174 INFO L462 AbstractCegarLoop]: Abstraction has 16037 states and 48092 transitions. [2019-12-07 16:09:50,174 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:09:50,174 INFO L276 IsEmpty]: Start isEmpty. Operand 16037 states and 48092 transitions. [2019-12-07 16:09:50,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 16:09:50,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:50,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:50,188 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:50,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:50,188 INFO L82 PathProgramCache]: Analyzing trace with hash -935567252, now seen corresponding path program 1 times [2019-12-07 16:09:50,189 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:50,189 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1003844872] [2019-12-07 16:09:50,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:50,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:50,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:50,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1003844872] [2019-12-07 16:09:50,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:50,219 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:09:50,219 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666535599] [2019-12-07 16:09:50,219 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:09:50,219 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:50,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:09:50,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:50,220 INFO L87 Difference]: Start difference. First operand 16037 states and 48092 transitions. Second operand 3 states. [2019-12-07 16:09:50,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:50,260 INFO L93 Difference]: Finished difference Result 16037 states and 47404 transitions. [2019-12-07 16:09:50,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:09:50,261 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 16:09:50,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:50,277 INFO L225 Difference]: With dead ends: 16037 [2019-12-07 16:09:50,277 INFO L226 Difference]: Without dead ends: 16037 [2019-12-07 16:09:50,277 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:50,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16037 states. [2019-12-07 16:09:50,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16037 to 15763. [2019-12-07 16:09:50,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15763 states. [2019-12-07 16:09:50,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15763 states to 15763 states and 46636 transitions. [2019-12-07 16:09:50,494 INFO L78 Accepts]: Start accepts. Automaton has 15763 states and 46636 transitions. Word has length 41 [2019-12-07 16:09:50,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:50,494 INFO L462 AbstractCegarLoop]: Abstraction has 15763 states and 46636 transitions. [2019-12-07 16:09:50,494 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:09:50,495 INFO L276 IsEmpty]: Start isEmpty. Operand 15763 states and 46636 transitions. [2019-12-07 16:09:50,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 16:09:50,507 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:50,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:50,507 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:50,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:50,507 INFO L82 PathProgramCache]: Analyzing trace with hash 936590377, now seen corresponding path program 1 times [2019-12-07 16:09:50,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:50,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [732536980] [2019-12-07 16:09:50,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:50,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:50,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:50,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [732536980] [2019-12-07 16:09:50,540 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:50,540 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:09:50,540 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [895191752] [2019-12-07 16:09:50,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:09:50,541 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:50,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:09:50,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:09:50,541 INFO L87 Difference]: Start difference. First operand 15763 states and 46636 transitions. Second operand 5 states. [2019-12-07 16:09:50,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:50,590 INFO L93 Difference]: Finished difference Result 14604 states and 44151 transitions. [2019-12-07 16:09:50,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:09:50,590 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 16:09:50,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:50,607 INFO L225 Difference]: With dead ends: 14604 [2019-12-07 16:09:50,607 INFO L226 Difference]: Without dead ends: 14604 [2019-12-07 16:09:50,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:09:50,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14604 states. [2019-12-07 16:09:50,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14604 to 14604. [2019-12-07 16:09:50,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14604 states. [2019-12-07 16:09:50,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14604 states to 14604 states and 44151 transitions. [2019-12-07 16:09:50,817 INFO L78 Accepts]: Start accepts. Automaton has 14604 states and 44151 transitions. Word has length 42 [2019-12-07 16:09:50,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:50,817 INFO L462 AbstractCegarLoop]: Abstraction has 14604 states and 44151 transitions. [2019-12-07 16:09:50,817 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:09:50,818 INFO L276 IsEmpty]: Start isEmpty. Operand 14604 states and 44151 transitions. [2019-12-07 16:09:50,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:09:50,830 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:50,830 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:50,831 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:50,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:50,831 INFO L82 PathProgramCache]: Analyzing trace with hash 1653836464, now seen corresponding path program 1 times [2019-12-07 16:09:50,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:50,831 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158468450] [2019-12-07 16:09:50,831 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:50,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:50,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:50,867 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158468450] [2019-12-07 16:09:50,867 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:50,867 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:09:50,867 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [556314912] [2019-12-07 16:09:50,867 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:09:50,867 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:50,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:09:50,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:50,868 INFO L87 Difference]: Start difference. First operand 14604 states and 44151 transitions. Second operand 3 states. [2019-12-07 16:09:50,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:50,936 INFO L93 Difference]: Finished difference Result 17473 states and 52902 transitions. [2019-12-07 16:09:50,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:09:50,937 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 16:09:50,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:50,954 INFO L225 Difference]: With dead ends: 17473 [2019-12-07 16:09:50,954 INFO L226 Difference]: Without dead ends: 17473 [2019-12-07 16:09:50,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:09:51,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17473 states. [2019-12-07 16:09:51,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17473 to 13664. [2019-12-07 16:09:51,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13664 states. [2019-12-07 16:09:51,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13664 states to 13664 states and 41709 transitions. [2019-12-07 16:09:51,218 INFO L78 Accepts]: Start accepts. Automaton has 13664 states and 41709 transitions. Word has length 66 [2019-12-07 16:09:51,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:51,218 INFO L462 AbstractCegarLoop]: Abstraction has 13664 states and 41709 transitions. [2019-12-07 16:09:51,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:09:51,218 INFO L276 IsEmpty]: Start isEmpty. Operand 13664 states and 41709 transitions. [2019-12-07 16:09:51,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:09:51,230 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:51,230 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:51,230 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:51,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:51,230 INFO L82 PathProgramCache]: Analyzing trace with hash 731097294, now seen corresponding path program 1 times [2019-12-07 16:09:51,230 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:51,230 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803251202] [2019-12-07 16:09:51,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:51,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:51,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:51,274 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803251202] [2019-12-07 16:09:51,274 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:51,275 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:09:51,275 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994400730] [2019-12-07 16:09:51,275 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:09:51,275 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:51,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:09:51,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:09:51,275 INFO L87 Difference]: Start difference. First operand 13664 states and 41709 transitions. Second operand 4 states. [2019-12-07 16:09:51,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:51,347 INFO L93 Difference]: Finished difference Result 13479 states and 40986 transitions. [2019-12-07 16:09:51,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:09:51,348 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 16:09:51,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:51,361 INFO L225 Difference]: With dead ends: 13479 [2019-12-07 16:09:51,362 INFO L226 Difference]: Without dead ends: 13479 [2019-12-07 16:09:51,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:09:51,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13479 states. [2019-12-07 16:09:51,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13479 to 12329. [2019-12-07 16:09:51,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12329 states. [2019-12-07 16:09:51,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12329 states to 12329 states and 37348 transitions. [2019-12-07 16:09:51,549 INFO L78 Accepts]: Start accepts. Automaton has 12329 states and 37348 transitions. Word has length 67 [2019-12-07 16:09:51,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:51,549 INFO L462 AbstractCegarLoop]: Abstraction has 12329 states and 37348 transitions. [2019-12-07 16:09:51,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:09:51,549 INFO L276 IsEmpty]: Start isEmpty. Operand 12329 states and 37348 transitions. [2019-12-07 16:09:51,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:09:51,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:51,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:51,560 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:51,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:51,560 INFO L82 PathProgramCache]: Analyzing trace with hash -543525966, now seen corresponding path program 1 times [2019-12-07 16:09:51,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:51,560 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100223915] [2019-12-07 16:09:51,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:51,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:51,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:51,889 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100223915] [2019-12-07 16:09:51,889 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:51,889 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 16:09:51,889 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107796878] [2019-12-07 16:09:51,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 16:09:51,889 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:51,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 16:09:51,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:09:51,890 INFO L87 Difference]: Start difference. First operand 12329 states and 37348 transitions. Second operand 15 states. [2019-12-07 16:09:55,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:09:55,361 INFO L93 Difference]: Finished difference Result 24828 states and 73971 transitions. [2019-12-07 16:09:55,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 16:09:55,362 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 16:09:55,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:09:55,379 INFO L225 Difference]: With dead ends: 24828 [2019-12-07 16:09:55,379 INFO L226 Difference]: Without dead ends: 17505 [2019-12-07 16:09:55,380 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 544 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=373, Invalid=1979, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 16:09:55,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17505 states. [2019-12-07 16:09:55,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17505 to 15111. [2019-12-07 16:09:55,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15111 states. [2019-12-07 16:09:55,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15111 states to 15111 states and 45501 transitions. [2019-12-07 16:09:55,614 INFO L78 Accepts]: Start accepts. Automaton has 15111 states and 45501 transitions. Word has length 67 [2019-12-07 16:09:55,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:09:55,614 INFO L462 AbstractCegarLoop]: Abstraction has 15111 states and 45501 transitions. [2019-12-07 16:09:55,614 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 16:09:55,614 INFO L276 IsEmpty]: Start isEmpty. Operand 15111 states and 45501 transitions. [2019-12-07 16:09:55,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:09:55,627 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:09:55,627 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:09:55,627 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:09:55,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:09:55,627 INFO L82 PathProgramCache]: Analyzing trace with hash -1737332378, now seen corresponding path program 2 times [2019-12-07 16:09:55,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:09:55,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576697724] [2019-12-07 16:09:55,628 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:09:55,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:09:55,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:09:55,966 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576697724] [2019-12-07 16:09:55,966 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:09:55,966 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 16:09:55,966 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [397859062] [2019-12-07 16:09:55,966 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 16:09:55,966 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:09:55,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 16:09:55,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2019-12-07 16:09:55,967 INFO L87 Difference]: Start difference. First operand 15111 states and 45501 transitions. Second operand 16 states. [2019-12-07 16:10:02,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:10:02,019 INFO L93 Difference]: Finished difference Result 21736 states and 64683 transitions. [2019-12-07 16:10:02,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 16:10:02,019 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 16:10:02,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:10:02,036 INFO L225 Difference]: With dead ends: 21736 [2019-12-07 16:10:02,036 INFO L226 Difference]: Without dead ends: 17322 [2019-12-07 16:10:02,037 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 384 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=286, Invalid=1606, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 16:10:02,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17322 states. [2019-12-07 16:10:02,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17322 to 15164. [2019-12-07 16:10:02,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15164 states. [2019-12-07 16:10:02,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15164 states to 15164 states and 45626 transitions. [2019-12-07 16:10:02,268 INFO L78 Accepts]: Start accepts. Automaton has 15164 states and 45626 transitions. Word has length 67 [2019-12-07 16:10:02,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:10:02,268 INFO L462 AbstractCegarLoop]: Abstraction has 15164 states and 45626 transitions. [2019-12-07 16:10:02,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 16:10:02,268 INFO L276 IsEmpty]: Start isEmpty. Operand 15164 states and 45626 transitions. [2019-12-07 16:10:02,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:10:02,282 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:10:02,282 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:10:02,282 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:10:02,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:10:02,282 INFO L82 PathProgramCache]: Analyzing trace with hash 1424347706, now seen corresponding path program 3 times [2019-12-07 16:10:02,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:10:02,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16403138] [2019-12-07 16:10:02,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:10:02,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:10:02,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:10:02,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16403138] [2019-12-07 16:10:02,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:10:02,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:10:02,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1931767432] [2019-12-07 16:10:02,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:10:02,400 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:10:02,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:10:02,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:10:02,401 INFO L87 Difference]: Start difference. First operand 15164 states and 45626 transitions. Second operand 11 states. [2019-12-07 16:10:03,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:10:03,294 INFO L93 Difference]: Finished difference Result 24636 states and 73903 transitions. [2019-12-07 16:10:03,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 16:10:03,294 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 16:10:03,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:10:03,313 INFO L225 Difference]: With dead ends: 24636 [2019-12-07 16:10:03,313 INFO L226 Difference]: Without dead ends: 18646 [2019-12-07 16:10:03,313 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2019-12-07 16:10:03,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18646 states. [2019-12-07 16:10:03,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18646 to 15681. [2019-12-07 16:10:03,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15681 states. [2019-12-07 16:10:03,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15681 states to 15681 states and 47050 transitions. [2019-12-07 16:10:03,556 INFO L78 Accepts]: Start accepts. Automaton has 15681 states and 47050 transitions. Word has length 67 [2019-12-07 16:10:03,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:10:03,556 INFO L462 AbstractCegarLoop]: Abstraction has 15681 states and 47050 transitions. [2019-12-07 16:10:03,556 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:10:03,556 INFO L276 IsEmpty]: Start isEmpty. Operand 15681 states and 47050 transitions. [2019-12-07 16:10:03,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:10:03,574 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:10:03,575 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:10:03,575 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:10:03,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:10:03,575 INFO L82 PathProgramCache]: Analyzing trace with hash 202288426, now seen corresponding path program 4 times [2019-12-07 16:10:03,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:10:03,575 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033363513] [2019-12-07 16:10:03,575 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:10:03,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:10:03,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:10:03,681 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033363513] [2019-12-07 16:10:03,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:10:03,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 16:10:03,681 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864602151] [2019-12-07 16:10:03,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:10:03,681 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:10:03,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:10:03,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:10:03,681 INFO L87 Difference]: Start difference. First operand 15681 states and 47050 transitions. Second operand 10 states. [2019-12-07 16:10:04,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:10:04,432 INFO L93 Difference]: Finished difference Result 23477 states and 69460 transitions. [2019-12-07 16:10:04,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 16:10:04,432 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 16:10:04,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:10:04,451 INFO L225 Difference]: With dead ends: 23477 [2019-12-07 16:10:04,451 INFO L226 Difference]: Without dead ends: 19967 [2019-12-07 16:10:04,452 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:10:04,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19967 states. [2019-12-07 16:10:04,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19967 to 16110. [2019-12-07 16:10:04,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16110 states. [2019-12-07 16:10:04,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16110 states to 16110 states and 48120 transitions. [2019-12-07 16:10:04,703 INFO L78 Accepts]: Start accepts. Automaton has 16110 states and 48120 transitions. Word has length 67 [2019-12-07 16:10:04,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:10:04,703 INFO L462 AbstractCegarLoop]: Abstraction has 16110 states and 48120 transitions. [2019-12-07 16:10:04,703 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:10:04,703 INFO L276 IsEmpty]: Start isEmpty. Operand 16110 states and 48120 transitions. [2019-12-07 16:10:04,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:10:04,717 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:10:04,717 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:10:04,717 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:10:04,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:10:04,717 INFO L82 PathProgramCache]: Analyzing trace with hash -917850962, now seen corresponding path program 5 times [2019-12-07 16:10:04,717 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:10:04,717 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240944186] [2019-12-07 16:10:04,717 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:10:04,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:10:04,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:10:04,845 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240944186] [2019-12-07 16:10:04,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:10:04,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:10:04,846 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1368719871] [2019-12-07 16:10:04,846 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:10:04,846 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:10:04,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:10:04,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:10:04,846 INFO L87 Difference]: Start difference. First operand 16110 states and 48120 transitions. Second operand 11 states. [2019-12-07 16:10:05,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:10:05,618 INFO L93 Difference]: Finished difference Result 21795 states and 64512 transitions. [2019-12-07 16:10:05,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 16:10:05,618 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 16:10:05,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:10:05,644 INFO L225 Difference]: With dead ends: 21795 [2019-12-07 16:10:05,644 INFO L226 Difference]: Without dead ends: 19085 [2019-12-07 16:10:05,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2019-12-07 16:10:05,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19085 states. [2019-12-07 16:10:05,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19085 to 15770. [2019-12-07 16:10:05,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15770 states. [2019-12-07 16:10:05,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15770 states to 15770 states and 47125 transitions. [2019-12-07 16:10:05,887 INFO L78 Accepts]: Start accepts. Automaton has 15770 states and 47125 transitions. Word has length 67 [2019-12-07 16:10:05,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:10:05,887 INFO L462 AbstractCegarLoop]: Abstraction has 15770 states and 47125 transitions. [2019-12-07 16:10:05,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:10:05,887 INFO L276 IsEmpty]: Start isEmpty. Operand 15770 states and 47125 transitions. [2019-12-07 16:10:05,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:10:05,900 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:10:05,900 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:10:05,900 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:10:05,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:10:05,900 INFO L82 PathProgramCache]: Analyzing trace with hash 668274002, now seen corresponding path program 6 times [2019-12-07 16:10:05,901 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:10:05,901 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476325406] [2019-12-07 16:10:05,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:10:05,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:10:06,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:10:06,024 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1476325406] [2019-12-07 16:10:06,024 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:10:06,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:10:06,024 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837542274] [2019-12-07 16:10:06,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:10:06,025 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:10:06,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:10:06,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:10:06,025 INFO L87 Difference]: Start difference. First operand 15770 states and 47125 transitions. Second operand 11 states. [2019-12-07 16:10:07,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:10:07,327 INFO L93 Difference]: Finished difference Result 39585 states and 117513 transitions. [2019-12-07 16:10:07,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 16:10:07,327 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 16:10:07,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:10:07,356 INFO L225 Difference]: With dead ends: 39585 [2019-12-07 16:10:07,356 INFO L226 Difference]: Without dead ends: 27791 [2019-12-07 16:10:07,357 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=277, Invalid=1129, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 16:10:07,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27791 states. [2019-12-07 16:10:07,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27791 to 15826. [2019-12-07 16:10:07,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15826 states. [2019-12-07 16:10:07,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15826 states to 15826 states and 47250 transitions. [2019-12-07 16:10:07,663 INFO L78 Accepts]: Start accepts. Automaton has 15826 states and 47250 transitions. Word has length 67 [2019-12-07 16:10:07,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:10:07,663 INFO L462 AbstractCegarLoop]: Abstraction has 15826 states and 47250 transitions. [2019-12-07 16:10:07,663 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:10:07,663 INFO L276 IsEmpty]: Start isEmpty. Operand 15826 states and 47250 transitions. [2019-12-07 16:10:07,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:10:07,677 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:10:07,677 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:10:07,677 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:10:07,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:10:07,677 INFO L82 PathProgramCache]: Analyzing trace with hash -222673432, now seen corresponding path program 7 times [2019-12-07 16:10:07,677 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:10:07,678 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184406986] [2019-12-07 16:10:07,678 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:10:07,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:10:07,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:10:07,809 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184406986] [2019-12-07 16:10:07,809 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:10:07,810 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:10:07,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2091204209] [2019-12-07 16:10:07,810 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:10:07,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:10:07,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:10:07,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:10:07,810 INFO L87 Difference]: Start difference. First operand 15826 states and 47250 transitions. Second operand 12 states. [2019-12-07 16:10:08,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:10:08,516 INFO L93 Difference]: Finished difference Result 27648 states and 81584 transitions. [2019-12-07 16:10:08,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 16:10:08,516 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 16:10:08,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:10:08,545 INFO L225 Difference]: With dead ends: 27648 [2019-12-07 16:10:08,545 INFO L226 Difference]: Without dead ends: 27169 [2019-12-07 16:10:08,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 191 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=178, Invalid=814, Unknown=0, NotChecked=0, Total=992 [2019-12-07 16:10:08,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27169 states. [2019-12-07 16:10:08,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27169 to 15466. [2019-12-07 16:10:08,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15466 states. [2019-12-07 16:10:08,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15466 states to 15466 states and 46220 transitions. [2019-12-07 16:10:08,843 INFO L78 Accepts]: Start accepts. Automaton has 15466 states and 46220 transitions. Word has length 67 [2019-12-07 16:10:08,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:10:08,843 INFO L462 AbstractCegarLoop]: Abstraction has 15466 states and 46220 transitions. [2019-12-07 16:10:08,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:10:08,843 INFO L276 IsEmpty]: Start isEmpty. Operand 15466 states and 46220 transitions. [2019-12-07 16:10:08,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:10:08,856 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:10:08,856 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:10:08,856 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:10:08,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:10:08,856 INFO L82 PathProgramCache]: Analyzing trace with hash -1210625396, now seen corresponding path program 8 times [2019-12-07 16:10:08,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:10:08,856 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1412113274] [2019-12-07 16:10:08,856 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:10:08,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:10:08,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:10:08,932 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:10:08,932 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:10:08,934 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= 0 |v_ULTIMATE.start_main_~#t83~0.offset_23|) (= v_~z$r_buff0_thd2~0_185 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t83~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t83~0.base_32|) |v_ULTIMATE.start_main_~#t83~0.offset_23| 0)) |v_#memory_int_21|) (= 0 v_~x~0_134) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t83~0.base_32|) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t83~0.base_32| 1)) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= v_~z$r_buff1_thd0~0_195 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t83~0.base_32| 4) |v_#length_23|) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~z$read_delayed~0_6 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t83~0.base_32|)) (= v_~z$r_buff1_thd2~0_185 0) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t83~0.base=|v_ULTIMATE.start_main_~#t83~0.base_32|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_~#t85~0.offset=|v_ULTIMATE.start_main_~#t85~0.offset_14|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t84~0.base=|v_ULTIMATE.start_main_~#t84~0.base_29|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ULTIMATE.start_main_~#t84~0.offset=|v_ULTIMATE.start_main_~#t84~0.offset_22|, ~y~0=v_~y~0_24, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ULTIMATE.start_main_~#t85~0.base=|v_ULTIMATE.start_main_~#t85~0.base_16|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_~#t83~0.offset=|v_ULTIMATE.start_main_~#t83~0.offset_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t83~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t85~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t84~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t84~0.offset, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t85~0.base, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t83~0.offset, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:10:08,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (= ~x~0_In-759837036 ~__unbuffered_p0_EAX~0_Out-759837036) (= ~z$r_buff1_thd3~0_Out-759837036 ~z$r_buff0_thd3~0_In-759837036) (= ~z$r_buff0_thd1~0_In-759837036 ~z$r_buff1_thd1~0_Out-759837036) (= ~z$r_buff0_thd2~0_In-759837036 ~z$r_buff1_thd2~0_Out-759837036) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-759837036)) (= ~z$r_buff1_thd0~0_Out-759837036 ~z$r_buff0_thd0~0_In-759837036) (= 1 ~z$r_buff0_thd1~0_Out-759837036)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-759837036, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-759837036, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-759837036, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-759837036, ~x~0=~x~0_In-759837036, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-759837036} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-759837036, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-759837036, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-759837036, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-759837036, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-759837036, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-759837036, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-759837036, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-759837036, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-759837036, ~x~0=~x~0_In-759837036, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-759837036} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:10:08,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t84~0.offset_10| 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t84~0.base_11| 1)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t84~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t84~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t84~0.base_11|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t84~0.base_11| 4) |v_#length_17|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t84~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t84~0.base_11|) |v_ULTIMATE.start_main_~#t84~0.offset_10| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t84~0.base=|v_ULTIMATE.start_main_~#t84~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t84~0.offset=|v_ULTIMATE.start_main_~#t84~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t84~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t84~0.offset] because there is no mapped edge [2019-12-07 16:10:08,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In281471796 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In281471796 256))) (.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out281471796| |P1Thread1of1ForFork2_#t~ite10_Out281471796|))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out281471796| ~z$w_buff1~0_In281471796) .cse0 (not .cse1) (not .cse2)) (and (or .cse1 .cse2) .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out281471796| ~z~0_In281471796)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In281471796, ~z$w_buff1_used~0=~z$w_buff1_used~0_In281471796, ~z$w_buff1~0=~z$w_buff1~0_In281471796, ~z~0=~z~0_In281471796} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out281471796|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In281471796, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out281471796|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In281471796, ~z$w_buff1~0=~z$w_buff1~0_In281471796, ~z~0=~z~0_In281471796} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 16:10:08,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1617421882 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1617421882 256) 0))) (or (and (= ~z$w_buff0_used~0_In1617421882 |P1Thread1of1ForFork2_#t~ite11_Out1617421882|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1617421882|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1617421882, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1617421882} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1617421882, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1617421882|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1617421882} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 16:10:08,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t85~0.base_11|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t85~0.base_11| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t85~0.base_11|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t85~0.base_11| 1) |v_#valid_31|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t85~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t85~0.base_11|) |v_ULTIMATE.start_main_~#t85~0.offset_10| 2)) |v_#memory_int_13|) (= |v_ULTIMATE.start_main_~#t85~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t85~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t85~0.base=|v_ULTIMATE.start_main_~#t85~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t85~0.offset=|v_ULTIMATE.start_main_~#t85~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t85~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t85~0.offset] because there is no mapped edge [2019-12-07 16:10:08,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-536034225 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd1~0_In-536034225 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out-536034225| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-536034225 |P0Thread1of1ForFork1_#t~ite5_Out-536034225|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-536034225, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-536034225} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-536034225|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-536034225, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-536034225} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 16:10:08,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1524838366 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In1524838366 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1524838366 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In1524838366 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1524838366|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1524838366 |P0Thread1of1ForFork1_#t~ite6_Out1524838366|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1524838366, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1524838366, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1524838366, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1524838366} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1524838366, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1524838366|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1524838366, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1524838366, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1524838366} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 16:10:08,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-222509118 256))) (.cse2 (= ~z$r_buff0_thd1~0_Out-222509118 ~z$r_buff0_thd1~0_In-222509118)) (.cse0 (= (mod ~z$w_buff0_used~0_In-222509118 256) 0))) (or (and (= ~z$r_buff0_thd1~0_Out-222509118 0) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-222509118, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-222509118} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-222509118, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-222509118|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-222509118} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1718705240 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In-1718705240 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1718705240 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1718705240 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1718705240| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1718705240| ~z$r_buff1_thd1~0_In-1718705240) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1718705240, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1718705240, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1718705240, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1718705240} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1718705240|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1718705240, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1718705240, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1718705240, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1718705240} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 16:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-2121186683 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-2121186683 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-2121186683 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-2121186683 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-2121186683| ~z$w_buff1_used~0_In-2121186683) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-2121186683|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2121186683, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2121186683, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2121186683, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2121186683} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2121186683, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2121186683, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2121186683, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2121186683|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2121186683} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 16:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In454174320 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In454174320 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out454174320|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In454174320 |P1Thread1of1ForFork2_#t~ite13_Out454174320|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In454174320, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In454174320} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In454174320, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out454174320|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In454174320} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 16:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In289703615 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In289703615 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In289703615 256))) (.cse2 (= (mod ~z$r_buff1_thd2~0_In289703615 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out289703615|)) (and (or .cse1 .cse0) (= ~z$r_buff1_thd2~0_In289703615 |P1Thread1of1ForFork2_#t~ite14_Out289703615|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In289703615, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In289703615, ~z$w_buff1_used~0=~z$w_buff1_used~0_In289703615, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In289703615} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In289703615, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In289703615, ~z$w_buff1_used~0=~z$w_buff1_used~0_In289703615, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out289703615|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In289703615} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 16:10:08,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:10:08,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1998862099 256) 0))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1998862099 256)))) (or (and .cse1 (= (mod ~z$w_buff1_used~0_In-1998862099 256) 0)) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-1998862099 256) 0)) (= (mod ~z$w_buff0_used~0_In-1998862099 256) 0))) (= |P2Thread1of1ForFork0_#t~ite29_Out-1998862099| |P2Thread1of1ForFork0_#t~ite30_Out-1998862099|) (= ~z$w_buff1_used~0_In-1998862099 |P2Thread1of1ForFork0_#t~ite29_Out-1998862099|)) (and (= ~z$w_buff1_used~0_In-1998862099 |P2Thread1of1ForFork0_#t~ite30_Out-1998862099|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_In-1998862099| |P2Thread1of1ForFork0_#t~ite29_Out-1998862099|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998862099, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1998862099, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1998862099, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1998862099, ~weak$$choice2~0=~weak$$choice2~0_In-1998862099, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1998862099|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998862099, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1998862099, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1998862099, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1998862099, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1998862099|, ~weak$$choice2~0=~weak$$choice2~0_In-1998862099, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1998862099|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:10:08,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:10:08,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 16:10:08,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In2112425768 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In2112425768 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out2112425768| ~z$w_buff1~0_In2112425768)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out2112425768| ~z~0_In2112425768)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2112425768, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2112425768, ~z$w_buff1~0=~z$w_buff1~0_In2112425768, ~z~0=~z~0_In2112425768} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out2112425768|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2112425768, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2112425768, ~z$w_buff1~0=~z$w_buff1~0_In2112425768, ~z~0=~z~0_In2112425768} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:10:08,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 16:10:08,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-925856461 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-925856461 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-925856461| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-925856461 |P2Thread1of1ForFork0_#t~ite40_Out-925856461|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-925856461, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-925856461} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-925856461, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-925856461|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-925856461} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 16:10:08,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1919492618 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1919492618 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1919492618 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1919492618 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1919492618|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1919492618| ~z$w_buff1_used~0_In-1919492618) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1919492618, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1919492618, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1919492618, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1919492618} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1919492618, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1919492618, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1919492618, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1919492618, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1919492618|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 16:10:08,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-114096490 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-114096490 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-114096490|)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-114096490| ~z$r_buff0_thd3~0_In-114096490) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-114096490, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-114096490} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-114096490, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-114096490, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-114096490|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 16:10:08,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1473440477 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1473440477 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1473440477 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1473440477 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1473440477|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-1473440477 |P2Thread1of1ForFork0_#t~ite43_Out-1473440477|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1473440477, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1473440477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1473440477, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1473440477} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1473440477|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1473440477, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1473440477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1473440477, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1473440477} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 16:10:08,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:10:08,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:10:08,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-1571090498| |ULTIMATE.start_main_#t~ite47_Out-1571090498|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1571090498 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1571090498 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= ~z$w_buff1~0_In-1571090498 |ULTIMATE.start_main_#t~ite47_Out-1571090498|)) (and .cse0 (or .cse1 .cse2) (= ~z~0_In-1571090498 |ULTIMATE.start_main_#t~ite47_Out-1571090498|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1571090498, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1571090498, ~z$w_buff1~0=~z$w_buff1~0_In-1571090498, ~z~0=~z~0_In-1571090498} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1571090498, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1571090498|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1571090498, ~z$w_buff1~0=~z$w_buff1~0_In-1571090498, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1571090498|, ~z~0=~z~0_In-1571090498} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:10:08,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-2099227300 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-2099227300 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-2099227300 |ULTIMATE.start_main_#t~ite49_Out-2099227300|)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-2099227300|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2099227300, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2099227300} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2099227300, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2099227300, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2099227300|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 16:10:08,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-631354767 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-631354767 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-631354767 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-631354767 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-631354767| ~z$w_buff1_used~0_In-631354767) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-631354767| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-631354767, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-631354767, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-631354767, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-631354767} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-631354767|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-631354767, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-631354767, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-631354767, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-631354767} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 16:10:08,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-841087192 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-841087192 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-841087192 |ULTIMATE.start_main_#t~ite51_Out-841087192|)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-841087192|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-841087192, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-841087192} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-841087192, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-841087192|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-841087192} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:10:08,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In1921475958 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1921475958 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1921475958 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In1921475958 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1921475958|)) (and (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In1921475958 |ULTIMATE.start_main_#t~ite52_Out1921475958|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1921475958, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1921475958, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1921475958, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1921475958} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1921475958|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1921475958, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1921475958, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1921475958, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1921475958} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 16:10:08,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:10:08,997 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:10:08 BasicIcfg [2019-12-07 16:10:08,997 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:10:08,997 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:10:08,998 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:10:08,998 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:10:08,998 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:07:42" (3/4) ... [2019-12-07 16:10:09,000 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:10:09,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= 0 |v_ULTIMATE.start_main_~#t83~0.offset_23|) (= v_~z$r_buff0_thd2~0_185 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t83~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t83~0.base_32|) |v_ULTIMATE.start_main_~#t83~0.offset_23| 0)) |v_#memory_int_21|) (= 0 v_~x~0_134) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t83~0.base_32|) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t83~0.base_32| 1)) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= v_~z$r_buff1_thd0~0_195 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t83~0.base_32| 4) |v_#length_23|) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~z$read_delayed~0_6 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t83~0.base_32|)) (= v_~z$r_buff1_thd2~0_185 0) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t83~0.base=|v_ULTIMATE.start_main_~#t83~0.base_32|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_~#t85~0.offset=|v_ULTIMATE.start_main_~#t85~0.offset_14|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t84~0.base=|v_ULTIMATE.start_main_~#t84~0.base_29|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ULTIMATE.start_main_~#t84~0.offset=|v_ULTIMATE.start_main_~#t84~0.offset_22|, ~y~0=v_~y~0_24, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ULTIMATE.start_main_~#t85~0.base=|v_ULTIMATE.start_main_~#t85~0.base_16|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_~#t83~0.offset=|v_ULTIMATE.start_main_~#t83~0.offset_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t83~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t85~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t84~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t84~0.offset, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t85~0.base, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t83~0.offset, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:10:09,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (= ~x~0_In-759837036 ~__unbuffered_p0_EAX~0_Out-759837036) (= ~z$r_buff1_thd3~0_Out-759837036 ~z$r_buff0_thd3~0_In-759837036) (= ~z$r_buff0_thd1~0_In-759837036 ~z$r_buff1_thd1~0_Out-759837036) (= ~z$r_buff0_thd2~0_In-759837036 ~z$r_buff1_thd2~0_Out-759837036) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-759837036)) (= ~z$r_buff1_thd0~0_Out-759837036 ~z$r_buff0_thd0~0_In-759837036) (= 1 ~z$r_buff0_thd1~0_Out-759837036)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-759837036, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-759837036, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-759837036, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-759837036, ~x~0=~x~0_In-759837036, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-759837036} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-759837036, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-759837036, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-759837036, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-759837036, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-759837036, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-759837036, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-759837036, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-759837036, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-759837036, ~x~0=~x~0_In-759837036, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-759837036} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:10:09,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t84~0.offset_10| 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t84~0.base_11| 1)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t84~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t84~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t84~0.base_11|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t84~0.base_11| 4) |v_#length_17|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t84~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t84~0.base_11|) |v_ULTIMATE.start_main_~#t84~0.offset_10| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t84~0.base=|v_ULTIMATE.start_main_~#t84~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t84~0.offset=|v_ULTIMATE.start_main_~#t84~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t84~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t84~0.offset] because there is no mapped edge [2019-12-07 16:10:09,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In281471796 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In281471796 256))) (.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out281471796| |P1Thread1of1ForFork2_#t~ite10_Out281471796|))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out281471796| ~z$w_buff1~0_In281471796) .cse0 (not .cse1) (not .cse2)) (and (or .cse1 .cse2) .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out281471796| ~z~0_In281471796)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In281471796, ~z$w_buff1_used~0=~z$w_buff1_used~0_In281471796, ~z$w_buff1~0=~z$w_buff1~0_In281471796, ~z~0=~z~0_In281471796} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out281471796|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In281471796, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out281471796|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In281471796, ~z$w_buff1~0=~z$w_buff1~0_In281471796, ~z~0=~z~0_In281471796} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 16:10:09,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1617421882 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1617421882 256) 0))) (or (and (= ~z$w_buff0_used~0_In1617421882 |P1Thread1of1ForFork2_#t~ite11_Out1617421882|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1617421882|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1617421882, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1617421882} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1617421882, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1617421882|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1617421882} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 16:10:09,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t85~0.base_11|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t85~0.base_11| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t85~0.base_11|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t85~0.base_11| 1) |v_#valid_31|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t85~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t85~0.base_11|) |v_ULTIMATE.start_main_~#t85~0.offset_10| 2)) |v_#memory_int_13|) (= |v_ULTIMATE.start_main_~#t85~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t85~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t85~0.base=|v_ULTIMATE.start_main_~#t85~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t85~0.offset=|v_ULTIMATE.start_main_~#t85~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t85~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t85~0.offset] because there is no mapped edge [2019-12-07 16:10:09,004 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-536034225 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd1~0_In-536034225 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out-536034225| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-536034225 |P0Thread1of1ForFork1_#t~ite5_Out-536034225|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-536034225, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-536034225} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-536034225|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-536034225, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-536034225} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 16:10:09,004 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1524838366 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In1524838366 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1524838366 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In1524838366 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1524838366|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1524838366 |P0Thread1of1ForFork1_#t~ite6_Out1524838366|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1524838366, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1524838366, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1524838366, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1524838366} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1524838366, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1524838366|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1524838366, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1524838366, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1524838366} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 16:10:09,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-222509118 256))) (.cse2 (= ~z$r_buff0_thd1~0_Out-222509118 ~z$r_buff0_thd1~0_In-222509118)) (.cse0 (= (mod ~z$w_buff0_used~0_In-222509118 256) 0))) (or (and (= ~z$r_buff0_thd1~0_Out-222509118 0) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-222509118, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-222509118} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-222509118, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-222509118|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-222509118} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:10:09,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1718705240 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In-1718705240 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1718705240 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1718705240 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1718705240| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1718705240| ~z$r_buff1_thd1~0_In-1718705240) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1718705240, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1718705240, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1718705240, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1718705240} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1718705240|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1718705240, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1718705240, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1718705240, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1718705240} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 16:10:09,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:10:09,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-2121186683 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-2121186683 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-2121186683 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-2121186683 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-2121186683| ~z$w_buff1_used~0_In-2121186683) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-2121186683|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2121186683, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2121186683, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2121186683, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2121186683} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2121186683, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2121186683, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2121186683, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2121186683|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2121186683} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 16:10:09,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In454174320 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In454174320 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out454174320|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In454174320 |P1Thread1of1ForFork2_#t~ite13_Out454174320|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In454174320, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In454174320} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In454174320, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out454174320|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In454174320} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 16:10:09,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In289703615 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In289703615 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In289703615 256))) (.cse2 (= (mod ~z$r_buff1_thd2~0_In289703615 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out289703615|)) (and (or .cse1 .cse0) (= ~z$r_buff1_thd2~0_In289703615 |P1Thread1of1ForFork2_#t~ite14_Out289703615|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In289703615, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In289703615, ~z$w_buff1_used~0=~z$w_buff1_used~0_In289703615, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In289703615} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In289703615, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In289703615, ~z$w_buff1_used~0=~z$w_buff1_used~0_In289703615, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out289703615|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In289703615} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 16:10:09,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:10:09,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1998862099 256) 0))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1998862099 256)))) (or (and .cse1 (= (mod ~z$w_buff1_used~0_In-1998862099 256) 0)) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-1998862099 256) 0)) (= (mod ~z$w_buff0_used~0_In-1998862099 256) 0))) (= |P2Thread1of1ForFork0_#t~ite29_Out-1998862099| |P2Thread1of1ForFork0_#t~ite30_Out-1998862099|) (= ~z$w_buff1_used~0_In-1998862099 |P2Thread1of1ForFork0_#t~ite29_Out-1998862099|)) (and (= ~z$w_buff1_used~0_In-1998862099 |P2Thread1of1ForFork0_#t~ite30_Out-1998862099|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_In-1998862099| |P2Thread1of1ForFork0_#t~ite29_Out-1998862099|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998862099, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1998862099, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1998862099, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1998862099, ~weak$$choice2~0=~weak$$choice2~0_In-1998862099, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1998862099|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1998862099, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1998862099, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1998862099, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1998862099, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1998862099|, ~weak$$choice2~0=~weak$$choice2~0_In-1998862099, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1998862099|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:10:09,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:10:09,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 16:10:09,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In2112425768 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In2112425768 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out2112425768| ~z$w_buff1~0_In2112425768)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out2112425768| ~z~0_In2112425768)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2112425768, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2112425768, ~z$w_buff1~0=~z$w_buff1~0_In2112425768, ~z~0=~z~0_In2112425768} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out2112425768|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2112425768, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2112425768, ~z$w_buff1~0=~z$w_buff1~0_In2112425768, ~z~0=~z~0_In2112425768} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:10:09,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 16:10:09,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-925856461 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-925856461 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-925856461| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-925856461 |P2Thread1of1ForFork0_#t~ite40_Out-925856461|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-925856461, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-925856461} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-925856461, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-925856461|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-925856461} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 16:10:09,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1919492618 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1919492618 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1919492618 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1919492618 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1919492618|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1919492618| ~z$w_buff1_used~0_In-1919492618) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1919492618, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1919492618, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1919492618, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1919492618} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1919492618, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1919492618, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1919492618, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1919492618, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1919492618|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 16:10:09,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-114096490 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-114096490 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-114096490|)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-114096490| ~z$r_buff0_thd3~0_In-114096490) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-114096490, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-114096490} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-114096490, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-114096490, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-114096490|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 16:10:09,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1473440477 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1473440477 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1473440477 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1473440477 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1473440477|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-1473440477 |P2Thread1of1ForFork0_#t~ite43_Out-1473440477|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1473440477, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1473440477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1473440477, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1473440477} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1473440477|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1473440477, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1473440477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1473440477, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1473440477} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 16:10:09,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:10:09,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:10:09,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-1571090498| |ULTIMATE.start_main_#t~ite47_Out-1571090498|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1571090498 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1571090498 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= ~z$w_buff1~0_In-1571090498 |ULTIMATE.start_main_#t~ite47_Out-1571090498|)) (and .cse0 (or .cse1 .cse2) (= ~z~0_In-1571090498 |ULTIMATE.start_main_#t~ite47_Out-1571090498|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1571090498, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1571090498, ~z$w_buff1~0=~z$w_buff1~0_In-1571090498, ~z~0=~z~0_In-1571090498} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1571090498, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1571090498|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1571090498, ~z$w_buff1~0=~z$w_buff1~0_In-1571090498, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1571090498|, ~z~0=~z~0_In-1571090498} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:10:09,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-2099227300 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-2099227300 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-2099227300 |ULTIMATE.start_main_#t~ite49_Out-2099227300|)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-2099227300|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2099227300, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2099227300} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2099227300, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2099227300, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2099227300|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 16:10:09,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-631354767 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-631354767 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-631354767 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-631354767 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-631354767| ~z$w_buff1_used~0_In-631354767) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-631354767| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-631354767, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-631354767, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-631354767, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-631354767} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-631354767|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-631354767, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-631354767, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-631354767, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-631354767} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 16:10:09,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-841087192 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-841087192 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-841087192 |ULTIMATE.start_main_#t~ite51_Out-841087192|)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-841087192|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-841087192, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-841087192} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-841087192, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-841087192|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-841087192} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:10:09,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In1921475958 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1921475958 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1921475958 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In1921475958 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1921475958|)) (and (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In1921475958 |ULTIMATE.start_main_#t~ite52_Out1921475958|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1921475958, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1921475958, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1921475958, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1921475958} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1921475958|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1921475958, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1921475958, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1921475958, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1921475958} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 16:10:09,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:10:09,063 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_f700328b-9a3f-4acc-b5d1-3cc5567d6b64/bin/uautomizer/witness.graphml [2019-12-07 16:10:09,064 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:10:09,065 INFO L168 Benchmark]: Toolchain (without parser) took 147731.28 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 6.0 GB). Free memory was 939.4 MB in the beginning and 4.9 GB in the end (delta: -4.0 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. [2019-12-07 16:10:09,065 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:10:09,065 INFO L168 Benchmark]: CACSL2BoogieTranslator took 377.50 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.7 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -128.5 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2019-12-07 16:10:09,065 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.18 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:10:09,066 INFO L168 Benchmark]: Boogie Preprocessor took 26.11 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:10:09,066 INFO L168 Benchmark]: RCFGBuilder took 406.82 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. [2019-12-07 16:10:09,066 INFO L168 Benchmark]: TraceAbstraction took 146813.18 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. [2019-12-07 16:10:09,066 INFO L168 Benchmark]: Witness Printer took 66.26 ms. Allocated memory is still 7.0 GB. Free memory was 5.0 GB in the beginning and 4.9 GB in the end (delta: 43.4 MB). Peak memory consumption was 43.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:10:09,068 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 377.50 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.7 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -128.5 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.18 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.11 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 406.82 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 146813.18 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. * Witness Printer took 66.26 ms. Allocated memory is still 7.0 GB. Free memory was 5.0 GB in the beginning and 4.9 GB in the end (delta: 43.4 MB). Peak memory consumption was 43.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 95 ProgramPointsAfterwards, 215 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 35 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 29 ChoiceCompositions, 7593 VarBasedMoverChecksPositive, 373 VarBasedMoverChecksNegative, 200 SemBasedMoverChecksPositive, 268 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 132619 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L832] FCALL, FORK 0 pthread_create(&t83, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 1 z$w_buff1 = z$w_buff0 [L736] 1 z$w_buff0 = 1 [L737] 1 z$w_buff1_used = z$w_buff0_used [L738] 1 z$w_buff0_used = (_Bool)1 [L750] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L834] FCALL, FORK 0 pthread_create(&t84, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 x = 1 [L767] 2 __unbuffered_p1_EAX = x [L770] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L773] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L750] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L773] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L774] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L836] FCALL, FORK 0 pthread_create(&t85, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 y = 1 [L790] 3 __unbuffered_p2_EAX = y [L793] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L794] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L795] 3 z$flush_delayed = weak$$choice2 [L796] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L751] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L752] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L775] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L776] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L798] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L799] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L800] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L801] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L809] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L811] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L812] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L842] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L842] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L843] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L844] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L845] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 146.6s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 33.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6195 SDtfs, 7040 SDslu, 21227 SDs, 0 SdLazy, 16946 SolverSat, 287 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 333 GetRequests, 27 SyntacticMatches, 21 SemanticMatches, 285 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1625 ImplicationChecksByTransitivity, 3.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=227267occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 90.1s AutomataMinimizationTime, 29 MinimizatonAttempts, 284736 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 1140 NumberOfCodeBlocks, 1140 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 1044 ConstructedInterpolants, 0 QuantifiedInterpolants, 391048 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...