./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix004_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix004_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 30c494d485746eb5681bf8f4c54708c519ec7c33 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:22:18,354 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:22:18,355 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:22:18,362 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:22:18,363 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:22:18,363 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:22:18,364 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:22:18,366 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:22:18,367 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:22:18,367 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:22:18,368 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:22:18,369 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:22:18,369 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:22:18,370 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:22:18,370 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:22:18,371 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:22:18,372 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:22:18,372 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:22:18,374 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:22:18,376 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:22:18,377 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:22:18,377 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:22:18,378 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:22:18,379 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:22:18,380 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:22:18,381 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:22:18,381 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:22:18,381 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:22:18,381 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:22:18,382 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:22:18,382 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:22:18,383 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:22:18,383 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:22:18,383 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:22:18,384 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:22:18,384 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:22:18,385 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:22:18,385 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:22:18,385 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:22:18,385 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:22:18,386 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:22:18,386 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:22:18,395 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:22:18,395 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:22:18,396 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:22:18,396 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:22:18,396 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:22:18,397 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:22:18,397 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:22:18,397 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:22:18,397 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:22:18,397 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:22:18,397 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:22:18,397 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:22:18,397 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:22:18,398 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:22:18,398 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:22:18,398 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:22:18,398 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:22:18,398 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:22:18,398 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:22:18,398 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:22:18,398 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:22:18,398 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:22:18,399 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:22:18,399 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:22:18,399 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:22:18,399 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:22:18,399 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:22:18,399 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:22:18,399 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:22:18,400 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 30c494d485746eb5681bf8f4c54708c519ec7c33 [2019-12-07 18:22:18,502 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:22:18,512 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:22:18,515 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:22:18,516 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:22:18,517 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:22:18,517 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix004_power.opt.i [2019-12-07 18:22:18,558 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/data/636fe6f52/5172439264364a4b8129d7c940c45dcb/FLAG466c6ef38 [2019-12-07 18:22:18,968 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:22:18,969 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/sv-benchmarks/c/pthread-wmm/mix004_power.opt.i [2019-12-07 18:22:18,980 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/data/636fe6f52/5172439264364a4b8129d7c940c45dcb/FLAG466c6ef38 [2019-12-07 18:22:18,989 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/data/636fe6f52/5172439264364a4b8129d7c940c45dcb [2019-12-07 18:22:18,991 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:22:18,992 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:22:18,993 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:22:18,993 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:22:18,995 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:22:18,996 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:22:18" (1/1) ... [2019-12-07 18:22:18,998 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3152a1b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:18, skipping insertion in model container [2019-12-07 18:22:18,998 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:22:18" (1/1) ... [2019-12-07 18:22:19,003 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:22:19,035 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:22:19,285 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:22:19,293 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:22:19,337 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:22:19,383 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:22:19,384 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19 WrapperNode [2019-12-07 18:22:19,384 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:22:19,385 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:22:19,385 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:22:19,385 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:22:19,391 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,405 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,427 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:22:19,428 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:22:19,428 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:22:19,428 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:22:19,434 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,435 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,438 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,438 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,447 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,450 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,453 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... [2019-12-07 18:22:19,456 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:22:19,457 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:22:19,457 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:22:19,457 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:22:19,457 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:22:19,503 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:22:19,503 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:22:19,503 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:22:19,503 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:22:19,503 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:22:19,503 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:22:19,504 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:22:19,504 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:22:19,504 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:22:19,504 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:22:19,504 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 18:22:19,504 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 18:22:19,504 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:22:19,505 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:22:19,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:22:19,506 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:22:19,936 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:22:19,936 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:22:19,937 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:22:19 BoogieIcfgContainer [2019-12-07 18:22:19,937 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:22:19,938 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:22:19,938 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:22:19,940 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:22:19,940 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:22:18" (1/3) ... [2019-12-07 18:22:19,940 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d267fa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:22:19, skipping insertion in model container [2019-12-07 18:22:19,940 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:22:19" (2/3) ... [2019-12-07 18:22:19,941 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d267fa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:22:19, skipping insertion in model container [2019-12-07 18:22:19,941 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:22:19" (3/3) ... [2019-12-07 18:22:19,942 INFO L109 eAbstractionObserver]: Analyzing ICFG mix004_power.opt.i [2019-12-07 18:22:19,948 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:22:19,948 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:22:19,953 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:22:19,954 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:22:19,983 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,983 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,983 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,983 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,984 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,984 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,984 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,984 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,984 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,984 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,984 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,985 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,985 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,985 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,985 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,985 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,985 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,986 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,986 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,986 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,986 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,986 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,986 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,986 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,987 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,987 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,987 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,987 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,987 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,987 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,987 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,987 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,988 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,988 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,988 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,988 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,988 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,988 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,988 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,989 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,989 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,989 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,989 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,989 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,989 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,989 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,989 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,990 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,990 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,990 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,990 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,990 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,990 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,990 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,990 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,991 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,991 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,991 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,991 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,991 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,991 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,991 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,992 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,992 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,992 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,992 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,992 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,993 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,993 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,993 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,993 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,993 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,993 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,993 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,993 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,994 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,994 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,994 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,994 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,994 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,994 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,994 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,994 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,995 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,996 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,996 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,996 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,996 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,996 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,996 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,996 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,998 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,998 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,998 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,998 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,999 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,999 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,999 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,999 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,999 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,999 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,999 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:19,999 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,000 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,000 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,000 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,000 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,000 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,000 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,000 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,001 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,001 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,001 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,001 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,001 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,001 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,001 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,001 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,002 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,003 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,003 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,003 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,003 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,003 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,003 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,003 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,003 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,004 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,005 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,006 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,007 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,007 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,007 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,007 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,007 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,007 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,007 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,007 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,008 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,009 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,010 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,011 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,012 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,012 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,012 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,012 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,012 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,012 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,012 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:22:20,024 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 18:22:20,036 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:22:20,037 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:22:20,037 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:22:20,037 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:22:20,037 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:22:20,037 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:22:20,037 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:22:20,037 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:22:20,048 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 213 places, 256 transitions [2019-12-07 18:22:20,050 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 213 places, 256 transitions [2019-12-07 18:22:20,117 INFO L134 PetriNetUnfolder]: 56/252 cut-off events. [2019-12-07 18:22:20,117 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:22:20,131 INFO L76 FinitePrefix]: Finished finitePrefix Result has 265 conditions, 252 events. 56/252 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 13. Compared 931 event pairs. 12/206 useless extension candidates. Maximal degree in co-relation 217. Up to 2 conditions per place. [2019-12-07 18:22:20,153 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 213 places, 256 transitions [2019-12-07 18:22:20,196 INFO L134 PetriNetUnfolder]: 56/252 cut-off events. [2019-12-07 18:22:20,197 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:22:20,206 INFO L76 FinitePrefix]: Finished finitePrefix Result has 265 conditions, 252 events. 56/252 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 13. Compared 931 event pairs. 12/206 useless extension candidates. Maximal degree in co-relation 217. Up to 2 conditions per place. [2019-12-07 18:22:20,241 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 26510 [2019-12-07 18:22:20,242 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:22:24,128 WARN L192 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 101 [2019-12-07 18:22:24,415 WARN L192 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 53 [2019-12-07 18:22:24,447 INFO L206 etLargeBlockEncoding]: Checked pairs total: 131755 [2019-12-07 18:22:24,447 INFO L214 etLargeBlockEncoding]: Total number of compositions: 134 [2019-12-07 18:22:24,449 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 116 places, 136 transitions [2019-12-07 18:22:34,081 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 100210 states. [2019-12-07 18:22:34,082 INFO L276 IsEmpty]: Start isEmpty. Operand 100210 states. [2019-12-07 18:22:34,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 18:22:34,087 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:22:34,087 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:22:34,087 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:22:34,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:22:34,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1786135930, now seen corresponding path program 1 times [2019-12-07 18:22:34,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:22:34,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1397196522] [2019-12-07 18:22:34,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:22:34,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:22:34,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:22:34,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1397196522] [2019-12-07 18:22:34,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:22:34,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:22:34,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1658292048] [2019-12-07 18:22:34,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:22:34,256 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:22:34,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:22:34,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:22:34,267 INFO L87 Difference]: Start difference. First operand 100210 states. Second operand 3 states. [2019-12-07 18:22:34,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:22:34,967 INFO L93 Difference]: Finished difference Result 99346 states and 455736 transitions. [2019-12-07 18:22:34,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:22:34,968 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 18:22:34,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:22:35,740 INFO L225 Difference]: With dead ends: 99346 [2019-12-07 18:22:35,740 INFO L226 Difference]: Without dead ends: 92982 [2019-12-07 18:22:35,741 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:22:37,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92982 states. [2019-12-07 18:22:38,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92982 to 92982. [2019-12-07 18:22:38,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92982 states. [2019-12-07 18:22:39,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92982 states to 92982 states and 426292 transitions. [2019-12-07 18:22:39,301 INFO L78 Accepts]: Start accepts. Automaton has 92982 states and 426292 transitions. Word has length 9 [2019-12-07 18:22:39,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:22:39,302 INFO L462 AbstractCegarLoop]: Abstraction has 92982 states and 426292 transitions. [2019-12-07 18:22:39,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:22:39,302 INFO L276 IsEmpty]: Start isEmpty. Operand 92982 states and 426292 transitions. [2019-12-07 18:22:39,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:22:39,308 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:22:39,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:22:39,309 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:22:39,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:22:39,309 INFO L82 PathProgramCache]: Analyzing trace with hash -1774452864, now seen corresponding path program 1 times [2019-12-07 18:22:39,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:22:39,309 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1234982068] [2019-12-07 18:22:39,309 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:22:39,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:22:39,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:22:39,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1234982068] [2019-12-07 18:22:39,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:22:39,368 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:22:39,368 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254325275] [2019-12-07 18:22:39,369 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:22:39,369 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:22:39,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:22:39,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:22:39,370 INFO L87 Difference]: Start difference. First operand 92982 states and 426292 transitions. Second operand 4 states. [2019-12-07 18:22:40,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:22:40,309 INFO L93 Difference]: Finished difference Result 144254 states and 639260 transitions. [2019-12-07 18:22:40,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:22:40,310 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:22:40,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:22:42,822 INFO L225 Difference]: With dead ends: 144254 [2019-12-07 18:22:42,822 INFO L226 Difference]: Without dead ends: 144186 [2019-12-07 18:22:42,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:22:44,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144186 states. [2019-12-07 18:22:46,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144186 to 141118. [2019-12-07 18:22:46,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141118 states. [2019-12-07 18:22:47,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141118 states to 141118 states and 628016 transitions. [2019-12-07 18:22:47,382 INFO L78 Accepts]: Start accepts. Automaton has 141118 states and 628016 transitions. Word has length 15 [2019-12-07 18:22:47,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:22:47,383 INFO L462 AbstractCegarLoop]: Abstraction has 141118 states and 628016 transitions. [2019-12-07 18:22:47,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:22:47,383 INFO L276 IsEmpty]: Start isEmpty. Operand 141118 states and 628016 transitions. [2019-12-07 18:22:47,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:22:47,389 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:22:47,389 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:22:47,389 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:22:47,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:22:47,389 INFO L82 PathProgramCache]: Analyzing trace with hash 206840971, now seen corresponding path program 1 times [2019-12-07 18:22:47,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:22:47,389 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1678720272] [2019-12-07 18:22:47,389 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:22:47,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:22:47,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:22:47,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1678720272] [2019-12-07 18:22:47,436 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:22:47,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:22:47,436 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555076697] [2019-12-07 18:22:47,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:22:47,437 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:22:47,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:22:47,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:22:47,437 INFO L87 Difference]: Start difference. First operand 141118 states and 628016 transitions. Second operand 4 states. [2019-12-07 18:22:48,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:22:48,382 INFO L93 Difference]: Finished difference Result 179838 states and 790536 transitions. [2019-12-07 18:22:48,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:22:48,383 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 18:22:48,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:22:48,874 INFO L225 Difference]: With dead ends: 179838 [2019-12-07 18:22:48,874 INFO L226 Difference]: Without dead ends: 179778 [2019-12-07 18:22:48,874 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:22:51,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179778 states. [2019-12-07 18:22:55,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179778 to 161538. [2019-12-07 18:22:55,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161538 states. [2019-12-07 18:22:56,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161538 states to 161538 states and 715756 transitions. [2019-12-07 18:22:56,325 INFO L78 Accepts]: Start accepts. Automaton has 161538 states and 715756 transitions. Word has length 18 [2019-12-07 18:22:56,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:22:56,325 INFO L462 AbstractCegarLoop]: Abstraction has 161538 states and 715756 transitions. [2019-12-07 18:22:56,325 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:22:56,325 INFO L276 IsEmpty]: Start isEmpty. Operand 161538 states and 715756 transitions. [2019-12-07 18:22:56,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:22:56,339 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:22:56,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:22:56,339 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:22:56,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:22:56,340 INFO L82 PathProgramCache]: Analyzing trace with hash -528150255, now seen corresponding path program 1 times [2019-12-07 18:22:56,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:22:56,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579490108] [2019-12-07 18:22:56,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:22:56,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:22:56,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:22:56,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579490108] [2019-12-07 18:22:56,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:22:56,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:22:56,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070308055] [2019-12-07 18:22:56,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:22:56,382 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:22:56,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:22:56,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:22:56,383 INFO L87 Difference]: Start difference. First operand 161538 states and 715756 transitions. Second operand 3 states. [2019-12-07 18:22:57,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:22:57,453 INFO L93 Difference]: Finished difference Result 152786 states and 669636 transitions. [2019-12-07 18:22:57,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:22:57,454 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 18:22:57,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:22:57,856 INFO L225 Difference]: With dead ends: 152786 [2019-12-07 18:22:57,856 INFO L226 Difference]: Without dead ends: 152786 [2019-12-07 18:22:57,856 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:22:59,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152786 states. [2019-12-07 18:23:03,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152786 to 152402. [2019-12-07 18:23:03,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152402 states. [2019-12-07 18:23:04,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152402 states to 152402 states and 668228 transitions. [2019-12-07 18:23:04,241 INFO L78 Accepts]: Start accepts. Automaton has 152402 states and 668228 transitions. Word has length 20 [2019-12-07 18:23:04,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:04,241 INFO L462 AbstractCegarLoop]: Abstraction has 152402 states and 668228 transitions. [2019-12-07 18:23:04,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:23:04,241 INFO L276 IsEmpty]: Start isEmpty. Operand 152402 states and 668228 transitions. [2019-12-07 18:23:04,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:23:04,250 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:04,250 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:04,250 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:04,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:04,250 INFO L82 PathProgramCache]: Analyzing trace with hash 127526733, now seen corresponding path program 1 times [2019-12-07 18:23:04,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:04,250 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781390973] [2019-12-07 18:23:04,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:04,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:04,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:04,299 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781390973] [2019-12-07 18:23:04,299 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:04,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:23:04,299 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1867428704] [2019-12-07 18:23:04,299 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:23:04,299 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:04,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:23:04,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:23:04,300 INFO L87 Difference]: Start difference. First operand 152402 states and 668228 transitions. Second operand 3 states. [2019-12-07 18:23:04,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:04,947 INFO L93 Difference]: Finished difference Result 143106 states and 626200 transitions. [2019-12-07 18:23:04,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:23:04,948 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 18:23:04,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:05,699 INFO L225 Difference]: With dead ends: 143106 [2019-12-07 18:23:05,699 INFO L226 Difference]: Without dead ends: 143106 [2019-12-07 18:23:05,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:23:07,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143106 states. [2019-12-07 18:23:09,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143106 to 143106. [2019-12-07 18:23:09,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143106 states. [2019-12-07 18:23:10,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143106 states to 143106 states and 626200 transitions. [2019-12-07 18:23:10,054 INFO L78 Accepts]: Start accepts. Automaton has 143106 states and 626200 transitions. Word has length 20 [2019-12-07 18:23:10,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:10,054 INFO L462 AbstractCegarLoop]: Abstraction has 143106 states and 626200 transitions. [2019-12-07 18:23:10,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:23:10,054 INFO L276 IsEmpty]: Start isEmpty. Operand 143106 states and 626200 transitions. [2019-12-07 18:23:10,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 18:23:10,076 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:10,076 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:10,076 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:10,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:10,076 INFO L82 PathProgramCache]: Analyzing trace with hash -1433529915, now seen corresponding path program 1 times [2019-12-07 18:23:10,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:10,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212266028] [2019-12-07 18:23:10,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:10,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:10,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:10,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212266028] [2019-12-07 18:23:10,120 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:10,120 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:23:10,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [458884091] [2019-12-07 18:23:10,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:23:10,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:10,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:23:10,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:23:10,122 INFO L87 Difference]: Start difference. First operand 143106 states and 626200 transitions. Second operand 5 states. [2019-12-07 18:23:11,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:11,227 INFO L93 Difference]: Finished difference Result 170970 states and 740404 transitions. [2019-12-07 18:23:11,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:23:11,228 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2019-12-07 18:23:11,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:11,669 INFO L225 Difference]: With dead ends: 170970 [2019-12-07 18:23:11,669 INFO L226 Difference]: Without dead ends: 170862 [2019-12-07 18:23:11,669 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:23:14,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170862 states. [2019-12-07 18:23:18,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170862 to 142182. [2019-12-07 18:23:18,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142182 states. [2019-12-07 18:23:18,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142182 states to 142182 states and 622424 transitions. [2019-12-07 18:23:18,489 INFO L78 Accepts]: Start accepts. Automaton has 142182 states and 622424 transitions. Word has length 24 [2019-12-07 18:23:18,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:18,489 INFO L462 AbstractCegarLoop]: Abstraction has 142182 states and 622424 transitions. [2019-12-07 18:23:18,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:23:18,489 INFO L276 IsEmpty]: Start isEmpty. Operand 142182 states and 622424 transitions. [2019-12-07 18:23:18,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 18:23:18,636 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:18,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:18,636 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:18,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:18,636 INFO L82 PathProgramCache]: Analyzing trace with hash -1752423513, now seen corresponding path program 1 times [2019-12-07 18:23:18,637 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:18,637 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167453571] [2019-12-07 18:23:18,637 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:18,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:18,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:18,705 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167453571] [2019-12-07 18:23:18,705 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:18,705 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:23:18,705 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000094889] [2019-12-07 18:23:18,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:23:18,706 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:18,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:23:18,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:23:18,706 INFO L87 Difference]: Start difference. First operand 142182 states and 622424 transitions. Second operand 4 states. [2019-12-07 18:23:19,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:19,635 INFO L93 Difference]: Finished difference Result 142078 states and 622012 transitions. [2019-12-07 18:23:19,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:23:19,636 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-12-07 18:23:19,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:19,996 INFO L225 Difference]: With dead ends: 142078 [2019-12-07 18:23:19,996 INFO L226 Difference]: Without dead ends: 142078 [2019-12-07 18:23:19,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:23:21,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142078 states. [2019-12-07 18:23:23,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142078 to 142078. [2019-12-07 18:23:23,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142078 states. [2019-12-07 18:23:24,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142078 states to 142078 states and 622012 transitions. [2019-12-07 18:23:24,315 INFO L78 Accepts]: Start accepts. Automaton has 142078 states and 622012 transitions. Word has length 35 [2019-12-07 18:23:24,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:24,315 INFO L462 AbstractCegarLoop]: Abstraction has 142078 states and 622012 transitions. [2019-12-07 18:23:24,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:23:24,315 INFO L276 IsEmpty]: Start isEmpty. Operand 142078 states and 622012 transitions. [2019-12-07 18:23:24,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-07 18:23:24,758 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:24,758 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:24,758 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:24,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:24,758 INFO L82 PathProgramCache]: Analyzing trace with hash -310464037, now seen corresponding path program 1 times [2019-12-07 18:23:24,759 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:24,759 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040518189] [2019-12-07 18:23:24,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:24,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:24,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:24,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2040518189] [2019-12-07 18:23:24,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:24,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:23:24,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [151711568] [2019-12-07 18:23:24,845 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:23:24,845 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:24,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:23:24,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:23:24,846 INFO L87 Difference]: Start difference. First operand 142078 states and 622012 transitions. Second operand 5 states. [2019-12-07 18:23:25,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:25,973 INFO L93 Difference]: Finished difference Result 199946 states and 886180 transitions. [2019-12-07 18:23:25,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:23:25,974 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2019-12-07 18:23:25,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:26,543 INFO L225 Difference]: With dead ends: 199946 [2019-12-07 18:23:26,543 INFO L226 Difference]: Without dead ends: 199946 [2019-12-07 18:23:26,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:23:30,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199946 states. [2019-12-07 18:23:33,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199946 to 193486. [2019-12-07 18:23:33,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193486 states. [2019-12-07 18:23:34,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193486 states to 193486 states and 859600 transitions. [2019-12-07 18:23:34,303 INFO L78 Accepts]: Start accepts. Automaton has 193486 states and 859600 transitions. Word has length 36 [2019-12-07 18:23:34,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:34,303 INFO L462 AbstractCegarLoop]: Abstraction has 193486 states and 859600 transitions. [2019-12-07 18:23:34,303 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:23:34,303 INFO L276 IsEmpty]: Start isEmpty. Operand 193486 states and 859600 transitions. [2019-12-07 18:23:34,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-07 18:23:34,536 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:34,536 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:34,536 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:34,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:34,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1982461725, now seen corresponding path program 2 times [2019-12-07 18:23:34,537 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:34,537 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309963783] [2019-12-07 18:23:34,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:34,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:34,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:34,598 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [309963783] [2019-12-07 18:23:34,598 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:34,598 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:23:34,599 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [868758431] [2019-12-07 18:23:34,599 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:23:34,599 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:34,599 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:23:34,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:23:34,600 INFO L87 Difference]: Start difference. First operand 193486 states and 859600 transitions. Second operand 4 states. [2019-12-07 18:23:35,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:35,536 INFO L93 Difference]: Finished difference Result 167062 states and 728728 transitions. [2019-12-07 18:23:35,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:23:35,537 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-12-07 18:23:35,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:35,972 INFO L225 Difference]: With dead ends: 167062 [2019-12-07 18:23:35,972 INFO L226 Difference]: Without dead ends: 167062 [2019-12-07 18:23:35,972 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:23:38,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167062 states. [2019-12-07 18:23:40,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167062 to 164286. [2019-12-07 18:23:40,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164286 states. [2019-12-07 18:23:41,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164286 states to 164286 states and 717072 transitions. [2019-12-07 18:23:41,286 INFO L78 Accepts]: Start accepts. Automaton has 164286 states and 717072 transitions. Word has length 36 [2019-12-07 18:23:41,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:41,286 INFO L462 AbstractCegarLoop]: Abstraction has 164286 states and 717072 transitions. [2019-12-07 18:23:41,286 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:23:41,286 INFO L276 IsEmpty]: Start isEmpty. Operand 164286 states and 717072 transitions. [2019-12-07 18:23:41,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-07 18:23:41,485 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:41,485 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:41,485 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:41,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:41,485 INFO L82 PathProgramCache]: Analyzing trace with hash 1469086365, now seen corresponding path program 3 times [2019-12-07 18:23:41,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:41,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855235451] [2019-12-07 18:23:41,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:41,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:41,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:41,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855235451] [2019-12-07 18:23:41,516 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:41,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:23:41,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [983401330] [2019-12-07 18:23:41,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:23:41,516 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:41,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:23:41,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:23:41,517 INFO L87 Difference]: Start difference. First operand 164286 states and 717072 transitions. Second operand 3 states. [2019-12-07 18:23:42,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:42,392 INFO L93 Difference]: Finished difference Result 127398 states and 515103 transitions. [2019-12-07 18:23:42,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:23:42,393 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2019-12-07 18:23:42,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:42,687 INFO L225 Difference]: With dead ends: 127398 [2019-12-07 18:23:42,687 INFO L226 Difference]: Without dead ends: 127398 [2019-12-07 18:23:42,687 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:23:44,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127398 states. [2019-12-07 18:23:47,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127398 to 127398. [2019-12-07 18:23:47,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127398 states. [2019-12-07 18:23:48,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127398 states to 127398 states and 515103 transitions. [2019-12-07 18:23:48,020 INFO L78 Accepts]: Start accepts. Automaton has 127398 states and 515103 transitions. Word has length 36 [2019-12-07 18:23:48,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:48,020 INFO L462 AbstractCegarLoop]: Abstraction has 127398 states and 515103 transitions. [2019-12-07 18:23:48,020 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:23:48,020 INFO L276 IsEmpty]: Start isEmpty. Operand 127398 states and 515103 transitions. [2019-12-07 18:23:48,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:23:48,145 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:48,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:48,146 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:48,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:48,146 INFO L82 PathProgramCache]: Analyzing trace with hash 322852790, now seen corresponding path program 1 times [2019-12-07 18:23:48,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:48,146 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532976277] [2019-12-07 18:23:48,146 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:48,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:48,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:48,257 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532976277] [2019-12-07 18:23:48,258 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:48,258 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:23:48,258 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [808771333] [2019-12-07 18:23:48,258 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:23:48,258 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:48,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:23:48,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:23:48,258 INFO L87 Difference]: Start difference. First operand 127398 states and 515103 transitions. Second operand 8 states. [2019-12-07 18:23:49,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:49,799 INFO L93 Difference]: Finished difference Result 260060 states and 1059652 transitions. [2019-12-07 18:23:49,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:23:49,800 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2019-12-07 18:23:49,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:50,460 INFO L225 Difference]: With dead ends: 260060 [2019-12-07 18:23:50,460 INFO L226 Difference]: Without dead ends: 243218 [2019-12-07 18:23:50,461 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=145, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:23:52,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243218 states. [2019-12-07 18:23:55,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243218 to 163122. [2019-12-07 18:23:55,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163122 states. [2019-12-07 18:23:55,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163122 states to 163122 states and 664025 transitions. [2019-12-07 18:23:55,867 INFO L78 Accepts]: Start accepts. Automaton has 163122 states and 664025 transitions. Word has length 37 [2019-12-07 18:23:55,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:55,867 INFO L462 AbstractCegarLoop]: Abstraction has 163122 states and 664025 transitions. [2019-12-07 18:23:55,867 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:23:55,867 INFO L276 IsEmpty]: Start isEmpty. Operand 163122 states and 664025 transitions. [2019-12-07 18:23:56,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:23:56,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:56,052 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:56,052 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:56,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:56,052 INFO L82 PathProgramCache]: Analyzing trace with hash -988531130, now seen corresponding path program 2 times [2019-12-07 18:23:56,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:56,053 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468009159] [2019-12-07 18:23:56,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:56,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:56,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:56,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468009159] [2019-12-07 18:23:56,185 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:56,185 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:23:56,185 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068291780] [2019-12-07 18:23:56,185 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:23:56,186 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:56,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:23:56,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:23:56,186 INFO L87 Difference]: Start difference. First operand 163122 states and 664025 transitions. Second operand 8 states. [2019-12-07 18:23:58,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:58,251 INFO L93 Difference]: Finished difference Result 240662 states and 981684 transitions. [2019-12-07 18:23:58,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:23:58,252 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2019-12-07 18:23:58,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:58,859 INFO L225 Difference]: With dead ends: 240662 [2019-12-07 18:23:58,859 INFO L226 Difference]: Without dead ends: 240662 [2019-12-07 18:23:58,859 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=80, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:24:01,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240662 states. [2019-12-07 18:24:06,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240662 to 177550. [2019-12-07 18:24:06,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177550 states. [2019-12-07 18:24:06,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177550 states to 177550 states and 723975 transitions. [2019-12-07 18:24:06,687 INFO L78 Accepts]: Start accepts. Automaton has 177550 states and 723975 transitions. Word has length 37 [2019-12-07 18:24:06,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:06,688 INFO L462 AbstractCegarLoop]: Abstraction has 177550 states and 723975 transitions. [2019-12-07 18:24:06,688 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:24:06,688 INFO L276 IsEmpty]: Start isEmpty. Operand 177550 states and 723975 transitions. [2019-12-07 18:24:06,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:24:06,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:06,911 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:06,911 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:06,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:06,912 INFO L82 PathProgramCache]: Analyzing trace with hash 1636806964, now seen corresponding path program 3 times [2019-12-07 18:24:06,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:06,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933663775] [2019-12-07 18:24:06,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:06,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:07,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:07,014 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933663775] [2019-12-07 18:24:07,014 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:07,014 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:24:07,015 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764904211] [2019-12-07 18:24:07,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:24:07,015 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:07,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:24:07,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:24:07,015 INFO L87 Difference]: Start difference. First operand 177550 states and 723975 transitions. Second operand 8 states. [2019-12-07 18:24:09,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:09,516 INFO L93 Difference]: Finished difference Result 310878 states and 1269069 transitions. [2019-12-07 18:24:09,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:24:09,517 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2019-12-07 18:24:09,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:10,316 INFO L225 Difference]: With dead ends: 310878 [2019-12-07 18:24:10,316 INFO L226 Difference]: Without dead ends: 310878 [2019-12-07 18:24:10,317 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=178, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:24:13,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310878 states. [2019-12-07 18:24:16,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310878 to 228607. [2019-12-07 18:24:16,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228607 states. [2019-12-07 18:24:17,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228607 states to 228607 states and 934563 transitions. [2019-12-07 18:24:17,745 INFO L78 Accepts]: Start accepts. Automaton has 228607 states and 934563 transitions. Word has length 37 [2019-12-07 18:24:17,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:17,745 INFO L462 AbstractCegarLoop]: Abstraction has 228607 states and 934563 transitions. [2019-12-07 18:24:17,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:24:17,746 INFO L276 IsEmpty]: Start isEmpty. Operand 228607 states and 934563 transitions. [2019-12-07 18:24:18,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:24:18,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:18,010 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:18,010 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:18,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:18,010 INFO L82 PathProgramCache]: Analyzing trace with hash 1772565184, now seen corresponding path program 4 times [2019-12-07 18:24:18,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:18,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [480570038] [2019-12-07 18:24:18,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:18,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:18,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:18,112 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [480570038] [2019-12-07 18:24:18,112 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:18,112 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:24:18,112 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067390310] [2019-12-07 18:24:18,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:24:18,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:18,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:24:18,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:24:18,113 INFO L87 Difference]: Start difference. First operand 228607 states and 934563 transitions. Second operand 9 states. [2019-12-07 18:24:20,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:20,685 INFO L93 Difference]: Finished difference Result 323899 states and 1318301 transitions. [2019-12-07 18:24:20,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:24:20,685 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2019-12-07 18:24:20,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:21,423 INFO L225 Difference]: With dead ends: 323899 [2019-12-07 18:24:21,423 INFO L226 Difference]: Without dead ends: 302767 [2019-12-07 18:24:21,424 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:24:26,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302767 states. [2019-12-07 18:24:29,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 302767 to 190519. [2019-12-07 18:24:29,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190519 states. [2019-12-07 18:24:30,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190519 states to 190519 states and 776136 transitions. [2019-12-07 18:24:30,357 INFO L78 Accepts]: Start accepts. Automaton has 190519 states and 776136 transitions. Word has length 37 [2019-12-07 18:24:30,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:30,358 INFO L462 AbstractCegarLoop]: Abstraction has 190519 states and 776136 transitions. [2019-12-07 18:24:30,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:24:30,358 INFO L276 IsEmpty]: Start isEmpty. Operand 190519 states and 776136 transitions. [2019-12-07 18:24:30,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-07 18:24:30,923 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:30,923 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:30,923 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:30,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:30,923 INFO L82 PathProgramCache]: Analyzing trace with hash 360853693, now seen corresponding path program 1 times [2019-12-07 18:24:30,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:30,924 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485789315] [2019-12-07 18:24:30,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:30,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:30,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:30,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1485789315] [2019-12-07 18:24:30,955 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:30,955 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:24:30,955 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2131048035] [2019-12-07 18:24:30,956 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:24:30,956 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:30,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:24:30,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:24:30,956 INFO L87 Difference]: Start difference. First operand 190519 states and 776136 transitions. Second operand 4 states. [2019-12-07 18:24:31,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:31,207 INFO L93 Difference]: Finished difference Result 73150 states and 251333 transitions. [2019-12-07 18:24:31,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:24:31,207 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-12-07 18:24:31,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:31,331 INFO L225 Difference]: With dead ends: 73150 [2019-12-07 18:24:31,331 INFO L226 Difference]: Without dead ends: 73150 [2019-12-07 18:24:31,332 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:24:31,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73150 states. [2019-12-07 18:24:32,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73150 to 73150. [2019-12-07 18:24:32,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73150 states. [2019-12-07 18:24:32,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73150 states to 73150 states and 251333 transitions. [2019-12-07 18:24:32,835 INFO L78 Accepts]: Start accepts. Automaton has 73150 states and 251333 transitions. Word has length 38 [2019-12-07 18:24:32,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:32,835 INFO L462 AbstractCegarLoop]: Abstraction has 73150 states and 251333 transitions. [2019-12-07 18:24:32,835 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:24:32,835 INFO L276 IsEmpty]: Start isEmpty. Operand 73150 states and 251333 transitions. [2019-12-07 18:24:32,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:24:32,904 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:32,905 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:32,905 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:32,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:32,905 INFO L82 PathProgramCache]: Analyzing trace with hash 1262672038, now seen corresponding path program 1 times [2019-12-07 18:24:32,905 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:32,905 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101324455] [2019-12-07 18:24:32,905 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:32,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:32,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:32,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101324455] [2019-12-07 18:24:32,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:32,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:24:32,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916943320] [2019-12-07 18:24:32,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:24:32,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:32,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:24:32,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:32,965 INFO L87 Difference]: Start difference. First operand 73150 states and 251333 transitions. Second operand 5 states. [2019-12-07 18:24:33,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:33,747 INFO L93 Difference]: Finished difference Result 137148 states and 469333 transitions. [2019-12-07 18:24:33,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:24:33,748 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2019-12-07 18:24:33,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:33,869 INFO L225 Difference]: With dead ends: 137148 [2019-12-07 18:24:33,869 INFO L226 Difference]: Without dead ends: 73213 [2019-12-07 18:24:33,869 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:34,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73213 states. [2019-12-07 18:24:35,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73213 to 73150. [2019-12-07 18:24:35,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73150 states. [2019-12-07 18:24:35,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73150 states to 73150 states and 244694 transitions. [2019-12-07 18:24:35,344 INFO L78 Accepts]: Start accepts. Automaton has 73150 states and 244694 transitions. Word has length 39 [2019-12-07 18:24:35,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:35,344 INFO L462 AbstractCegarLoop]: Abstraction has 73150 states and 244694 transitions. [2019-12-07 18:24:35,345 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:35,345 INFO L276 IsEmpty]: Start isEmpty. Operand 73150 states and 244694 transitions. [2019-12-07 18:24:35,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:24:35,413 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:35,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:35,413 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:35,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:35,413 INFO L82 PathProgramCache]: Analyzing trace with hash 1434440000, now seen corresponding path program 2 times [2019-12-07 18:24:35,414 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:35,414 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544905196] [2019-12-07 18:24:35,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:35,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:35,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:35,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544905196] [2019-12-07 18:24:35,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:35,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:24:35,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1177191648] [2019-12-07 18:24:35,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:24:35,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:35,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:24:35,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:35,459 INFO L87 Difference]: Start difference. First operand 73150 states and 244694 transitions. Second operand 5 states. [2019-12-07 18:24:35,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:35,518 INFO L93 Difference]: Finished difference Result 11929 states and 34298 transitions. [2019-12-07 18:24:35,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:24:35,518 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2019-12-07 18:24:35,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:35,532 INFO L225 Difference]: With dead ends: 11929 [2019-12-07 18:24:35,532 INFO L226 Difference]: Without dead ends: 11929 [2019-12-07 18:24:35,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:35,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11929 states. [2019-12-07 18:24:36,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11929 to 11913. [2019-12-07 18:24:36,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11913 states. [2019-12-07 18:24:36,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11913 states to 11913 states and 34262 transitions. [2019-12-07 18:24:36,029 INFO L78 Accepts]: Start accepts. Automaton has 11913 states and 34262 transitions. Word has length 39 [2019-12-07 18:24:36,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:36,029 INFO L462 AbstractCegarLoop]: Abstraction has 11913 states and 34262 transitions. [2019-12-07 18:24:36,030 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:36,030 INFO L276 IsEmpty]: Start isEmpty. Operand 11913 states and 34262 transitions. [2019-12-07 18:24:36,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 18:24:36,039 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:36,039 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:36,039 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:36,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:36,039 INFO L82 PathProgramCache]: Analyzing trace with hash -1885024750, now seen corresponding path program 1 times [2019-12-07 18:24:36,040 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:36,040 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324048386] [2019-12-07 18:24:36,040 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:36,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:36,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:36,212 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [324048386] [2019-12-07 18:24:36,212 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:36,212 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:24:36,212 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70635580] [2019-12-07 18:24:36,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:24:36,213 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:36,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:24:36,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:24:36,213 INFO L87 Difference]: Start difference. First operand 11913 states and 34262 transitions. Second operand 10 states. [2019-12-07 18:24:36,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:36,759 INFO L93 Difference]: Finished difference Result 16511 states and 45477 transitions. [2019-12-07 18:24:36,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:24:36,759 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 50 [2019-12-07 18:24:36,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:36,775 INFO L225 Difference]: With dead ends: 16511 [2019-12-07 18:24:36,775 INFO L226 Difference]: Without dead ends: 16234 [2019-12-07 18:24:36,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:24:36,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16234 states. [2019-12-07 18:24:36,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16234 to 14087. [2019-12-07 18:24:36,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14087 states. [2019-12-07 18:24:36,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14087 states to 14087 states and 39792 transitions. [2019-12-07 18:24:36,952 INFO L78 Accepts]: Start accepts. Automaton has 14087 states and 39792 transitions. Word has length 50 [2019-12-07 18:24:36,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:36,952 INFO L462 AbstractCegarLoop]: Abstraction has 14087 states and 39792 transitions. [2019-12-07 18:24:36,952 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:24:36,952 INFO L276 IsEmpty]: Start isEmpty. Operand 14087 states and 39792 transitions. [2019-12-07 18:24:36,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 18:24:36,964 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:36,964 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:36,964 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:36,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:36,964 INFO L82 PathProgramCache]: Analyzing trace with hash -145368000, now seen corresponding path program 2 times [2019-12-07 18:24:36,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:36,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262839753] [2019-12-07 18:24:36,965 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:36,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:37,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:37,150 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262839753] [2019-12-07 18:24:37,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:37,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:24:37,150 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531773167] [2019-12-07 18:24:37,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:24:37,151 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:37,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:24:37,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:24:37,151 INFO L87 Difference]: Start difference. First operand 14087 states and 39792 transitions. Second operand 11 states. [2019-12-07 18:24:37,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:37,714 INFO L93 Difference]: Finished difference Result 16641 states and 45880 transitions. [2019-12-07 18:24:37,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:24:37,715 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 50 [2019-12-07 18:24:37,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:37,735 INFO L225 Difference]: With dead ends: 16641 [2019-12-07 18:24:37,735 INFO L226 Difference]: Without dead ends: 15433 [2019-12-07 18:24:37,736 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=64, Invalid=242, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:24:37,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15433 states. [2019-12-07 18:24:37,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15433 to 13759. [2019-12-07 18:24:37,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13759 states. [2019-12-07 18:24:37,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13759 states to 13759 states and 38884 transitions. [2019-12-07 18:24:37,909 INFO L78 Accepts]: Start accepts. Automaton has 13759 states and 38884 transitions. Word has length 50 [2019-12-07 18:24:37,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:37,909 INFO L462 AbstractCegarLoop]: Abstraction has 13759 states and 38884 transitions. [2019-12-07 18:24:37,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:24:37,909 INFO L276 IsEmpty]: Start isEmpty. Operand 13759 states and 38884 transitions. [2019-12-07 18:24:37,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 18:24:37,920 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:37,920 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:37,920 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:37,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:37,920 INFO L82 PathProgramCache]: Analyzing trace with hash 2004371604, now seen corresponding path program 3 times [2019-12-07 18:24:37,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:37,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [558376945] [2019-12-07 18:24:37,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:37,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:38,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:38,088 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [558376945] [2019-12-07 18:24:38,088 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:38,088 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:24:38,088 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1293972702] [2019-12-07 18:24:38,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:24:38,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:38,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:24:38,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:24:38,089 INFO L87 Difference]: Start difference. First operand 13759 states and 38884 transitions. Second operand 11 states. [2019-12-07 18:24:38,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:38,797 INFO L93 Difference]: Finished difference Result 19592 states and 53937 transitions. [2019-12-07 18:24:38,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:24:38,798 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 50 [2019-12-07 18:24:38,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:38,815 INFO L225 Difference]: With dead ends: 19592 [2019-12-07 18:24:38,815 INFO L226 Difference]: Without dead ends: 18371 [2019-12-07 18:24:38,815 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=317, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:24:38,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18371 states. [2019-12-07 18:24:38,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18371 to 13874. [2019-12-07 18:24:38,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13874 states. [2019-12-07 18:24:39,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13874 states to 13874 states and 39223 transitions. [2019-12-07 18:24:39,004 INFO L78 Accepts]: Start accepts. Automaton has 13874 states and 39223 transitions. Word has length 50 [2019-12-07 18:24:39,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:39,004 INFO L462 AbstractCegarLoop]: Abstraction has 13874 states and 39223 transitions. [2019-12-07 18:24:39,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:24:39,004 INFO L276 IsEmpty]: Start isEmpty. Operand 13874 states and 39223 transitions. [2019-12-07 18:24:39,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 18:24:39,016 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:39,016 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:39,016 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:39,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:39,017 INFO L82 PathProgramCache]: Analyzing trace with hash -485370438, now seen corresponding path program 4 times [2019-12-07 18:24:39,017 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:39,017 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192453838] [2019-12-07 18:24:39,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:39,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:39,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:39,056 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [192453838] [2019-12-07 18:24:39,056 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:39,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:24:39,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409958613] [2019-12-07 18:24:39,057 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:24:39,057 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:39,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:24:39,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:24:39,057 INFO L87 Difference]: Start difference. First operand 13874 states and 39223 transitions. Second operand 4 states. [2019-12-07 18:24:39,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:39,121 INFO L93 Difference]: Finished difference Result 19799 states and 53553 transitions. [2019-12-07 18:24:39,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:24:39,121 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 50 [2019-12-07 18:24:39,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:39,135 INFO L225 Difference]: With dead ends: 19799 [2019-12-07 18:24:39,135 INFO L226 Difference]: Without dead ends: 13810 [2019-12-07 18:24:39,136 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:39,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13810 states. [2019-12-07 18:24:39,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13810 to 13751. [2019-12-07 18:24:39,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13751 states. [2019-12-07 18:24:39,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13751 states to 13751 states and 36308 transitions. [2019-12-07 18:24:39,344 INFO L78 Accepts]: Start accepts. Automaton has 13751 states and 36308 transitions. Word has length 50 [2019-12-07 18:24:39,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:39,344 INFO L462 AbstractCegarLoop]: Abstraction has 13751 states and 36308 transitions. [2019-12-07 18:24:39,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:24:39,344 INFO L276 IsEmpty]: Start isEmpty. Operand 13751 states and 36308 transitions. [2019-12-07 18:24:39,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 18:24:39,355 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:39,355 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:39,355 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:39,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:39,356 INFO L82 PathProgramCache]: Analyzing trace with hash 1269220922, now seen corresponding path program 5 times [2019-12-07 18:24:39,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:39,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721414104] [2019-12-07 18:24:39,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:39,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:39,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:39,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721414104] [2019-12-07 18:24:39,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:39,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:24:39,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1461260519] [2019-12-07 18:24:39,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:24:39,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:39,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:24:39,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:24:39,564 INFO L87 Difference]: Start difference. First operand 13751 states and 36308 transitions. Second operand 9 states. [2019-12-07 18:24:41,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:41,140 INFO L93 Difference]: Finished difference Result 25770 states and 65694 transitions. [2019-12-07 18:24:41,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 18:24:41,140 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 50 [2019-12-07 18:24:41,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:41,164 INFO L225 Difference]: With dead ends: 25770 [2019-12-07 18:24:41,164 INFO L226 Difference]: Without dead ends: 25256 [2019-12-07 18:24:41,164 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=92, Invalid=214, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:24:41,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25256 states. [2019-12-07 18:24:41,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25256 to 18159. [2019-12-07 18:24:41,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18159 states. [2019-12-07 18:24:41,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18159 states to 18159 states and 47713 transitions. [2019-12-07 18:24:41,419 INFO L78 Accepts]: Start accepts. Automaton has 18159 states and 47713 transitions. Word has length 50 [2019-12-07 18:24:41,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:41,419 INFO L462 AbstractCegarLoop]: Abstraction has 18159 states and 47713 transitions. [2019-12-07 18:24:41,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:24:41,420 INFO L276 IsEmpty]: Start isEmpty. Operand 18159 states and 47713 transitions. [2019-12-07 18:24:41,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 18:24:41,434 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:41,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:41,434 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:41,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:41,434 INFO L82 PathProgramCache]: Analyzing trace with hash -1098866780, now seen corresponding path program 6 times [2019-12-07 18:24:41,435 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:41,435 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111508069] [2019-12-07 18:24:41,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:41,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:41,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:41,485 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111508069] [2019-12-07 18:24:41,485 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:41,485 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:41,485 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872628241] [2019-12-07 18:24:41,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:24:41,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:41,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:24:41,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:41,485 INFO L87 Difference]: Start difference. First operand 18159 states and 47713 transitions. Second operand 6 states. [2019-12-07 18:24:41,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:41,539 INFO L93 Difference]: Finished difference Result 15465 states and 41496 transitions. [2019-12-07 18:24:41,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:24:41,539 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 50 [2019-12-07 18:24:41,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:41,543 INFO L225 Difference]: With dead ends: 15465 [2019-12-07 18:24:41,543 INFO L226 Difference]: Without dead ends: 5039 [2019-12-07 18:24:41,543 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:41,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5039 states. [2019-12-07 18:24:41,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5039 to 4236. [2019-12-07 18:24:41,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4236 states. [2019-12-07 18:24:41,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4236 states to 4236 states and 10555 transitions. [2019-12-07 18:24:41,585 INFO L78 Accepts]: Start accepts. Automaton has 4236 states and 10555 transitions. Word has length 50 [2019-12-07 18:24:41,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:41,586 INFO L462 AbstractCegarLoop]: Abstraction has 4236 states and 10555 transitions. [2019-12-07 18:24:41,586 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:24:41,586 INFO L276 IsEmpty]: Start isEmpty. Operand 4236 states and 10555 transitions. [2019-12-07 18:24:41,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:24:41,588 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:41,588 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:41,589 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:41,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:41,589 INFO L82 PathProgramCache]: Analyzing trace with hash 1587612672, now seen corresponding path program 1 times [2019-12-07 18:24:41,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:41,589 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807278607] [2019-12-07 18:24:41,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:41,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:41,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:41,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807278607] [2019-12-07 18:24:41,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:41,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:24:41,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1256838522] [2019-12-07 18:24:41,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:24:41,621 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:41,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:24:41,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:41,621 INFO L87 Difference]: Start difference. First operand 4236 states and 10555 transitions. Second operand 5 states. [2019-12-07 18:24:41,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:41,761 INFO L93 Difference]: Finished difference Result 4625 states and 11415 transitions. [2019-12-07 18:24:41,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:24:41,761 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 18:24:41,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:41,765 INFO L225 Difference]: With dead ends: 4625 [2019-12-07 18:24:41,765 INFO L226 Difference]: Without dead ends: 4625 [2019-12-07 18:24:41,765 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:41,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4625 states. [2019-12-07 18:24:41,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4625 to 4254. [2019-12-07 18:24:41,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4254 states. [2019-12-07 18:24:41,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4254 states to 4254 states and 10592 transitions. [2019-12-07 18:24:41,805 INFO L78 Accepts]: Start accepts. Automaton has 4254 states and 10592 transitions. Word has length 65 [2019-12-07 18:24:41,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:41,805 INFO L462 AbstractCegarLoop]: Abstraction has 4254 states and 10592 transitions. [2019-12-07 18:24:41,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:41,805 INFO L276 IsEmpty]: Start isEmpty. Operand 4254 states and 10592 transitions. [2019-12-07 18:24:41,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:24:41,807 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:41,808 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:41,808 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:41,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:41,808 INFO L82 PathProgramCache]: Analyzing trace with hash 1531787844, now seen corresponding path program 2 times [2019-12-07 18:24:41,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:41,808 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830542377] [2019-12-07 18:24:41,808 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:41,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:41,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:41,982 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830542377] [2019-12-07 18:24:41,982 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:41,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:24:41,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457013764] [2019-12-07 18:24:41,983 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:24:41,983 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:41,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:24:41,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:24:41,983 INFO L87 Difference]: Start difference. First operand 4254 states and 10592 transitions. Second operand 11 states. [2019-12-07 18:24:42,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:42,801 INFO L93 Difference]: Finished difference Result 9294 states and 23059 transitions. [2019-12-07 18:24:42,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:24:42,802 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 18:24:42,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:42,809 INFO L225 Difference]: With dead ends: 9294 [2019-12-07 18:24:42,809 INFO L226 Difference]: Without dead ends: 8903 [2019-12-07 18:24:42,809 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=132, Invalid=624, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:24:42,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8903 states. [2019-12-07 18:24:42,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8903 to 5360. [2019-12-07 18:24:42,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5360 states. [2019-12-07 18:24:42,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5360 states to 5360 states and 13505 transitions. [2019-12-07 18:24:42,873 INFO L78 Accepts]: Start accepts. Automaton has 5360 states and 13505 transitions. Word has length 65 [2019-12-07 18:24:42,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:42,873 INFO L462 AbstractCegarLoop]: Abstraction has 5360 states and 13505 transitions. [2019-12-07 18:24:42,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:24:42,873 INFO L276 IsEmpty]: Start isEmpty. Operand 5360 states and 13505 transitions. [2019-12-07 18:24:42,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:24:42,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:42,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:42,877 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:42,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:42,877 INFO L82 PathProgramCache]: Analyzing trace with hash 2050336996, now seen corresponding path program 3 times [2019-12-07 18:24:42,877 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:42,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1987133455] [2019-12-07 18:24:42,877 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:42,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:42,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:42,952 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1987133455] [2019-12-07 18:24:42,952 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:42,952 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:42,952 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1955133063] [2019-12-07 18:24:42,952 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:24:42,952 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:42,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:24:42,953 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:42,953 INFO L87 Difference]: Start difference. First operand 5360 states and 13505 transitions. Second operand 7 states. [2019-12-07 18:24:43,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:43,078 INFO L93 Difference]: Finished difference Result 9931 states and 25031 transitions. [2019-12-07 18:24:43,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:24:43,078 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 18:24:43,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:43,086 INFO L225 Difference]: With dead ends: 9931 [2019-12-07 18:24:43,086 INFO L226 Difference]: Without dead ends: 8342 [2019-12-07 18:24:43,086 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:24:43,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8342 states. [2019-12-07 18:24:43,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8342 to 7370. [2019-12-07 18:24:43,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7370 states. [2019-12-07 18:24:43,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7370 states to 7370 states and 18782 transitions. [2019-12-07 18:24:43,167 INFO L78 Accepts]: Start accepts. Automaton has 7370 states and 18782 transitions. Word has length 65 [2019-12-07 18:24:43,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:43,167 INFO L462 AbstractCegarLoop]: Abstraction has 7370 states and 18782 transitions. [2019-12-07 18:24:43,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:24:43,167 INFO L276 IsEmpty]: Start isEmpty. Operand 7370 states and 18782 transitions. [2019-12-07 18:24:43,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:24:43,173 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:43,173 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:43,173 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:43,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:43,173 INFO L82 PathProgramCache]: Analyzing trace with hash 745190016, now seen corresponding path program 4 times [2019-12-07 18:24:43,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:43,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254332438] [2019-12-07 18:24:43,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:43,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:43,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:43,385 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254332438] [2019-12-07 18:24:43,385 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:43,385 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:24:43,385 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175188926] [2019-12-07 18:24:43,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:24:43,386 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:43,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:24:43,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:24:43,386 INFO L87 Difference]: Start difference. First operand 7370 states and 18782 transitions. Second operand 12 states. [2019-12-07 18:24:43,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:43,906 INFO L93 Difference]: Finished difference Result 10093 states and 25714 transitions. [2019-12-07 18:24:43,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:24:43,906 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 65 [2019-12-07 18:24:43,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:43,919 INFO L225 Difference]: With dead ends: 10093 [2019-12-07 18:24:43,919 INFO L226 Difference]: Without dead ends: 9622 [2019-12-07 18:24:43,919 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=87, Invalid=419, Unknown=0, NotChecked=0, Total=506 [2019-12-07 18:24:43,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9622 states. [2019-12-07 18:24:43,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9622 to 7385. [2019-12-07 18:24:43,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7385 states. [2019-12-07 18:24:44,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7385 states to 7385 states and 18815 transitions. [2019-12-07 18:24:44,004 INFO L78 Accepts]: Start accepts. Automaton has 7385 states and 18815 transitions. Word has length 65 [2019-12-07 18:24:44,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:44,004 INFO L462 AbstractCegarLoop]: Abstraction has 7385 states and 18815 transitions. [2019-12-07 18:24:44,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:24:44,004 INFO L276 IsEmpty]: Start isEmpty. Operand 7385 states and 18815 transitions. [2019-12-07 18:24:44,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:24:44,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:44,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:44,009 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:44,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:44,009 INFO L82 PathProgramCache]: Analyzing trace with hash -1956684232, now seen corresponding path program 5 times [2019-12-07 18:24:44,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:44,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [15703418] [2019-12-07 18:24:44,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:44,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:44,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:44,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [15703418] [2019-12-07 18:24:44,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:44,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:24:44,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247105758] [2019-12-07 18:24:44,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:24:44,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:44,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:24:44,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:24:44,204 INFO L87 Difference]: Start difference. First operand 7385 states and 18815 transitions. Second operand 12 states. [2019-12-07 18:24:45,415 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 32 [2019-12-07 18:24:45,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:45,820 INFO L93 Difference]: Finished difference Result 10071 states and 25712 transitions. [2019-12-07 18:24:45,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:24:45,822 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 65 [2019-12-07 18:24:45,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:45,841 INFO L225 Difference]: With dead ends: 10071 [2019-12-07 18:24:45,841 INFO L226 Difference]: Without dead ends: 9698 [2019-12-07 18:24:45,842 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=95, Invalid=411, Unknown=0, NotChecked=0, Total=506 [2019-12-07 18:24:45,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9698 states. [2019-12-07 18:24:45,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9698 to 7385. [2019-12-07 18:24:45,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7385 states. [2019-12-07 18:24:45,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7385 states to 7385 states and 18815 transitions. [2019-12-07 18:24:45,936 INFO L78 Accepts]: Start accepts. Automaton has 7385 states and 18815 transitions. Word has length 65 [2019-12-07 18:24:45,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:45,937 INFO L462 AbstractCegarLoop]: Abstraction has 7385 states and 18815 transitions. [2019-12-07 18:24:45,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:24:45,937 INFO L276 IsEmpty]: Start isEmpty. Operand 7385 states and 18815 transitions. [2019-12-07 18:24:45,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:24:45,942 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:45,942 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:45,942 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:45,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:45,942 INFO L82 PathProgramCache]: Analyzing trace with hash -433582366, now seen corresponding path program 6 times [2019-12-07 18:24:45,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:45,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [435827532] [2019-12-07 18:24:45,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:45,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:46,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:46,001 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [435827532] [2019-12-07 18:24:46,001 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:46,001 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:24:46,001 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272650932] [2019-12-07 18:24:46,001 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:24:46,001 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:46,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:24:46,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:46,002 INFO L87 Difference]: Start difference. First operand 7385 states and 18815 transitions. Second operand 6 states. [2019-12-07 18:24:46,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:46,896 INFO L93 Difference]: Finished difference Result 10333 states and 26109 transitions. [2019-12-07 18:24:46,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:24:46,898 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 18:24:46,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:46,922 INFO L225 Difference]: With dead ends: 10333 [2019-12-07 18:24:46,922 INFO L226 Difference]: Without dead ends: 10333 [2019-12-07 18:24:46,922 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:46,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10333 states. [2019-12-07 18:24:47,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10333 to 9029. [2019-12-07 18:24:47,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9029 states. [2019-12-07 18:24:47,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9029 states to 9029 states and 23008 transitions. [2019-12-07 18:24:47,029 INFO L78 Accepts]: Start accepts. Automaton has 9029 states and 23008 transitions. Word has length 65 [2019-12-07 18:24:47,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:47,029 INFO L462 AbstractCegarLoop]: Abstraction has 9029 states and 23008 transitions. [2019-12-07 18:24:47,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:24:47,029 INFO L276 IsEmpty]: Start isEmpty. Operand 9029 states and 23008 transitions. [2019-12-07 18:24:47,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:24:47,035 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:47,035 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:47,036 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:47,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:47,036 INFO L82 PathProgramCache]: Analyzing trace with hash -1550706070, now seen corresponding path program 7 times [2019-12-07 18:24:47,036 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:47,036 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296974156] [2019-12-07 18:24:47,036 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:47,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:47,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:47,239 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296974156] [2019-12-07 18:24:47,239 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:47,239 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:24:47,239 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037991709] [2019-12-07 18:24:47,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:24:47,239 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:47,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:24:47,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:24:47,239 INFO L87 Difference]: Start difference. First operand 9029 states and 23008 transitions. Second operand 12 states. [2019-12-07 18:24:48,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:48,426 INFO L93 Difference]: Finished difference Result 17145 states and 43404 transitions. [2019-12-07 18:24:48,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 18:24:48,426 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 65 [2019-12-07 18:24:48,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:48,440 INFO L225 Difference]: With dead ends: 17145 [2019-12-07 18:24:48,440 INFO L226 Difference]: Without dead ends: 16575 [2019-12-07 18:24:48,440 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=190, Invalid=1070, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 18:24:48,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16575 states. [2019-12-07 18:24:48,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16575 to 9055. [2019-12-07 18:24:48,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9055 states. [2019-12-07 18:24:48,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9055 states to 9055 states and 23091 transitions. [2019-12-07 18:24:48,565 INFO L78 Accepts]: Start accepts. Automaton has 9055 states and 23091 transitions. Word has length 65 [2019-12-07 18:24:48,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:48,565 INFO L462 AbstractCegarLoop]: Abstraction has 9055 states and 23091 transitions. [2019-12-07 18:24:48,565 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:24:48,566 INFO L276 IsEmpty]: Start isEmpty. Operand 9055 states and 23091 transitions. [2019-12-07 18:24:48,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:24:48,572 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:48,572 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:48,572 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:48,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:48,572 INFO L82 PathProgramCache]: Analyzing trace with hash -197956498, now seen corresponding path program 8 times [2019-12-07 18:24:48,572 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:48,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608425184] [2019-12-07 18:24:48,573 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:48,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:48,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:48,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608425184] [2019-12-07 18:24:48,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:48,610 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:24:48,610 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1904305650] [2019-12-07 18:24:48,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:24:48,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:48,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:24:48,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:24:48,610 INFO L87 Difference]: Start difference. First operand 9055 states and 23091 transitions. Second operand 4 states. [2019-12-07 18:24:48,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:48,634 INFO L93 Difference]: Finished difference Result 9484 states and 24070 transitions. [2019-12-07 18:24:48,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:24:48,635 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2019-12-07 18:24:48,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:48,636 INFO L225 Difference]: With dead ends: 9484 [2019-12-07 18:24:48,636 INFO L226 Difference]: Without dead ends: 492 [2019-12-07 18:24:48,636 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:48,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2019-12-07 18:24:48,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 486. [2019-12-07 18:24:48,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 486 states. [2019-12-07 18:24:48,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 486 states to 486 states and 1057 transitions. [2019-12-07 18:24:48,640 INFO L78 Accepts]: Start accepts. Automaton has 486 states and 1057 transitions. Word has length 65 [2019-12-07 18:24:48,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:48,640 INFO L462 AbstractCegarLoop]: Abstraction has 486 states and 1057 transitions. [2019-12-07 18:24:48,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:24:48,640 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states and 1057 transitions. [2019-12-07 18:24:48,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:24:48,641 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:48,641 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:48,641 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:48,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:48,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1367329311, now seen corresponding path program 1 times [2019-12-07 18:24:48,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:48,641 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122226182] [2019-12-07 18:24:48,641 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:48,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:48,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:48,704 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122226182] [2019-12-07 18:24:48,704 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:48,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:24:48,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1213456768] [2019-12-07 18:24:48,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:24:48,705 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:48,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:24:48,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:48,705 INFO L87 Difference]: Start difference. First operand 486 states and 1057 transitions. Second operand 7 states. [2019-12-07 18:24:48,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:48,847 INFO L93 Difference]: Finished difference Result 1034 states and 2213 transitions. [2019-12-07 18:24:48,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:24:48,848 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:24:48,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:48,848 INFO L225 Difference]: With dead ends: 1034 [2019-12-07 18:24:48,848 INFO L226 Difference]: Without dead ends: 767 [2019-12-07 18:24:48,849 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:24:48,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 767 states. [2019-12-07 18:24:48,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 767 to 561. [2019-12-07 18:24:48,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 561 states. [2019-12-07 18:24:48,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 561 states to 561 states and 1188 transitions. [2019-12-07 18:24:48,854 INFO L78 Accepts]: Start accepts. Automaton has 561 states and 1188 transitions. Word has length 66 [2019-12-07 18:24:48,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:48,854 INFO L462 AbstractCegarLoop]: Abstraction has 561 states and 1188 transitions. [2019-12-07 18:24:48,854 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:24:48,854 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 1188 transitions. [2019-12-07 18:24:48,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:24:48,854 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:48,854 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:48,854 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:48,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:48,855 INFO L82 PathProgramCache]: Analyzing trace with hash -144676445, now seen corresponding path program 2 times [2019-12-07 18:24:48,855 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:48,855 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2145985609] [2019-12-07 18:24:48,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:48,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:24:48,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:24:48,933 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:24:48,933 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:24:48,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1063] [1063] ULTIMATE.startENTRY-->L858: Formula: (let ((.cse0 (store |v_#valid_87| 0 0))) (and (= v_~z$w_buff0~0_728 0) (= v_~weak$$choice2~0_343 0) (= 0 v_~z$r_buff1_thd3~0_505) (= v_~z$w_buff1_used~0_880 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~__unbuffered_p0_EAX~0_74) (= |v_#NULL.offset_7| 0) (< 0 |v_#StackHeapBarrier_22|) (= v_~z$r_buff1_thd0~0_309 0) (= v_~__unbuffered_p2_EBX~0_114 0) (= v_~z$w_buff1~0_467 0) (= v_~z$w_buff0_used~0_1253 0) (= v_~x~0_38 0) (= v_~main$tmp_guard1~0_61 0) (= |v_#valid_85| (store .cse0 |v_ULTIMATE.start_main_~#t93~0.base_32| 1)) (= 0 v_~__unbuffered_p1_EAX~0_78) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~__unbuffered_p3_EAX~0_79) (= v_~__unbuffered_cnt~0_163 0) (= v_~z$r_buff0_thd1~0_82 0) (= 0 v_~z$r_buff1_thd4~0_433) (= |v_ULTIMATE.start_main_~#t93~0.offset_23| 0) (= v_~z$read_delayed~0_7 0) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t93~0.base_32| 4)) (= v_~a~0_31 0) (= v_~z$r_buff0_thd2~0_82 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$flush_delayed~0_298) (= 0 v_~weak$$choice0~0_246) (= v_~z$r_buff1_thd1~0_208 0) (= |v_#memory_int_27| (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t93~0.base_32| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t93~0.base_32|) |v_ULTIMATE.start_main_~#t93~0.offset_23| 0))) (= 0 v_~z$r_buff0_thd3~0_454) (= 0 v_~__unbuffered_p3_EBX~0_70) (= v_~y~0_59 0) (= v_~z$r_buff1_thd2~0_208 0) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t93~0.base_32|) (= v_~z$r_buff0_thd0~0_181 0) (= 0 v_~z$r_buff0_thd4~0_611) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_p2_EAX~0_98) (= v_~z~0_332 0) (= 0 v_~z$mem_tmp~0_257) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t93~0.base_32|)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_28|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t95~0.base=|v_ULTIMATE.start_main_~#t95~0.base_18|, ULTIMATE.start_main_~#t95~0.offset=|v_ULTIMATE.start_main_~#t95~0.offset_15|, ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_9|, ULTIMATE.start_main_#t~nondet55=|v_ULTIMATE.start_main_#t~nondet55_10|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_208, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_131|, ~a~0=v_~a~0_31, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_181, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_74, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_78, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_611, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_79, #length=|v_#length_31|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_98, ~z$mem_tmp~0=v_~z$mem_tmp~0_257, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_114, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_880, ~z$flush_delayed~0=v_~z$flush_delayed~0_298, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_43|, ~weak$$choice0~0=v_~weak$$choice0~0_246, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_225|, ULTIMATE.start_main_~#t94~0.base=|v_ULTIMATE.start_main_~#t94~0.base_25|, ULTIMATE.start_main_~#t96~0.offset=|v_ULTIMATE.start_main_~#t96~0.offset_16|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_208, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_454, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_163, ~x~0=v_~x~0_38, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_433, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_25|, ULTIMATE.start_main_#t~nondet56=|v_ULTIMATE.start_main_#t~nondet56_10|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_467, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t94~0.offset=|v_ULTIMATE.start_main_~#t94~0.offset_16|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_309, ULTIMATE.start_main_~#t93~0.base=|v_ULTIMATE.start_main_~#t93~0.base_32|, ~y~0=v_~y~0_59, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_82, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1253, ~z$w_buff0~0=v_~z$w_buff0~0_728, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_505, ULTIMATE.start_main_~#t96~0.base=|v_ULTIMATE.start_main_~#t96~0.base_19|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_57|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_70, ULTIMATE.start_main_~#t93~0.offset=|v_ULTIMATE.start_main_~#t93~0.offset_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_45|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_59|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_85|, #memory_int=|v_#memory_int_27|, ~z~0=v_~z~0_332, ~weak$$choice2~0=v_~weak$$choice2~0_343, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_82} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t95~0.base, ULTIMATE.start_main_~#t95~0.offset, ULTIMATE.start_main_#t~nondet57, ULTIMATE.start_main_#t~nondet55, ~z$r_buff1_thd2~0, #NULL.offset, ULTIMATE.start_main_#t~ite64, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ULTIMATE.start_main_~#t94~0.base, ULTIMATE.start_main_~#t96~0.offset, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~nondet58, ULTIMATE.start_main_#t~nondet56, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t94~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t93~0.base, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t96~0.base, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_~#t93~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:24:48,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1022] [1022] L858-1-->L860: Formula: (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t94~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t94~0.base_12|) |v_ULTIMATE.start_main_~#t94~0.offset_11| 1)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t94~0.base_12|)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t94~0.base_12|) (= 0 (select |v_#valid_44| |v_ULTIMATE.start_main_~#t94~0.base_12|)) (= |v_ULTIMATE.start_main_~#t94~0.offset_11| 0) (= (store |v_#valid_44| |v_ULTIMATE.start_main_~#t94~0.base_12| 1) |v_#valid_43|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t94~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t94~0.offset=|v_ULTIMATE.start_main_~#t94~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t94~0.base=|v_ULTIMATE.start_main_~#t94~0.base_12|, ULTIMATE.start_main_#t~nondet55=|v_ULTIMATE.start_main_#t~nondet55_6|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_17|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t94~0.offset, ULTIMATE.start_main_~#t94~0.base, ULTIMATE.start_main_#t~nondet55, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:24:48,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1014] [1014] L860-1-->L862: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t95~0.base_10| 1)) (not (= |v_ULTIMATE.start_main_~#t95~0.base_10| 0)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t95~0.base_10|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t95~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t95~0.base_10|) |v_ULTIMATE.start_main_~#t95~0.offset_9| 2)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t95~0.base_10|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t95~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t95~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t95~0.base=|v_ULTIMATE.start_main_~#t95~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t95~0.offset=|v_ULTIMATE.start_main_~#t95~0.offset_9|, #valid=|v_#valid_39|, ULTIMATE.start_main_#t~nondet56=|v_ULTIMATE.start_main_#t~nondet56_6|, #memory_int=|v_#memory_int_15|, #length=|v_#length_19|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t95~0.base, ULTIMATE.start_main_~#t95~0.offset, #valid, ULTIMATE.start_main_#t~nondet56, #memory_int, #length] because there is no mapped edge [2019-12-07 18:24:48,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1039] [1039] L862-1-->L864: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t96~0.base_13|)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t96~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t96~0.base_13|) |v_ULTIMATE.start_main_~#t96~0.offset_11| 3)) |v_#memory_int_19|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t96~0.base_13|) (= |v_#valid_49| (store |v_#valid_50| |v_ULTIMATE.start_main_~#t96~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t96~0.offset_11| 0) (= 0 (select |v_#valid_50| |v_ULTIMATE.start_main_~#t96~0.base_13|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t96~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_50|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t96~0.offset=|v_ULTIMATE.start_main_~#t96~0.offset_11|, ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_5|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t96~0.base=|v_ULTIMATE.start_main_~#t96~0.base_13|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t96~0.offset, ULTIMATE.start_main_#t~nondet57, #valid, #memory_int, ULTIMATE.start_main_~#t96~0.base, #length] because there is no mapped edge [2019-12-07 18:24:48,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [913] [913] L4-->L820: Formula: (and (not (= v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_10 0)) (= v_~z$r_buff1_thd2~0_8 v_~z$r_buff0_thd2~0_8) (= v_~z$r_buff0_thd0~0_27 v_~z$r_buff1_thd0~0_15) (= v_~z$r_buff0_thd4~0_70 1) (= v_~z$r_buff0_thd4~0_71 v_~z$r_buff1_thd4~0_39) (= v_~weak$$choice2~0_34 v_~z$flush_delayed~0_23) (= |v_P3Thread1of1ForFork3_#t~nondet27_14| v_~weak$$choice2~0_34) (= |v_P3Thread1of1ForFork3_#t~nondet26_14| v_~weak$$choice0~0_9) (= v_~z$r_buff1_thd1~0_8 v_~z$r_buff0_thd1~0_8) (= v_~z$mem_tmp~0_13 v_~z~0_35) (= v_~z$r_buff0_thd3~0_42 v_~z$r_buff1_thd3~0_30)) InVars {P3Thread1of1ForFork3_#t~nondet26=|v_P3Thread1of1ForFork3_#t~nondet26_14|, P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_10, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_27, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_71, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z~0=v_~z~0_35, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_8, P3Thread1of1ForFork3_#t~nondet27=|v_P3Thread1of1ForFork3_#t~nondet27_14|} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, P3Thread1of1ForFork3_#t~nondet26=|v_P3Thread1of1ForFork3_#t~nondet26_13|, P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_10, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_39, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_30, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_23, ~weak$$choice0~0=v_~weak$$choice0~0_9, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_27, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_15, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_8, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_70, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z~0=v_~z~0_35, ~weak$$choice2~0=v_~weak$$choice2~0_34, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_8, P3Thread1of1ForFork3_#t~nondet27=|v_P3Thread1of1ForFork3_#t~nondet27_13|} AuxVars[] AssignedVars[~z$mem_tmp~0, P3Thread1of1ForFork3_#t~nondet26, ~weak$$choice0~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd4~0, ~z$flush_delayed~0, ~weak$$choice2~0, P3Thread1of1ForFork3_#t~nondet27] because there is no mapped edge [2019-12-07 18:24:48,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [994] [994] L820-2-->L820-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In918190990 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In918190990 256))) (.cse2 (= |P3Thread1of1ForFork3_#t~ite28_Out918190990| |P3Thread1of1ForFork3_#t~ite29_Out918190990|))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite28_Out918190990| ~z$w_buff1~0_In918190990) .cse2) (and (= ~z$w_buff0~0_In918190990 |P3Thread1of1ForFork3_#t~ite28_Out918190990|) (not .cse1) (not .cse0) .cse2))) InVars {~z$w_buff0~0=~z$w_buff0~0_In918190990, ~z$w_buff0_used~0=~z$w_buff0_used~0_In918190990, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In918190990, ~z$w_buff1~0=~z$w_buff1~0_In918190990} OutVars{P3Thread1of1ForFork3_#t~ite29=|P3Thread1of1ForFork3_#t~ite29_Out918190990|, P3Thread1of1ForFork3_#t~ite28=|P3Thread1of1ForFork3_#t~ite28_Out918190990|, ~z$w_buff0~0=~z$w_buff0~0_In918190990, ~z$w_buff0_used~0=~z$w_buff0_used~0_In918190990, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In918190990, ~z$w_buff1~0=~z$w_buff1~0_In918190990} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite29, P3Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 18:24:48,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [958] [958] L825-->L826: Formula: (and (= v_~z$r_buff0_thd4~0_135 v_~z$r_buff0_thd4~0_134) (not (= (mod v_~weak$$choice2~0_81 256) 0))) InVars {~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_135, ~weak$$choice2~0=v_~weak$$choice2~0_81} OutVars{P3Thread1of1ForFork3_#t~ite42=|v_P3Thread1of1ForFork3_#t~ite42_6|, P3Thread1of1ForFork3_#t~ite43=|v_P3Thread1of1ForFork3_#t~ite43_9|, P3Thread1of1ForFork3_#t~ite44=|v_P3Thread1of1ForFork3_#t~ite44_9|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_134, ~weak$$choice2~0=v_~weak$$choice2~0_81} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite42, P3Thread1of1ForFork3_#t~ite43, P3Thread1of1ForFork3_#t~ite44, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:24:48,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [988] [988] L828-->L828-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In575320963 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite48_Out575320963| ~z$mem_tmp~0_In575320963) (not .cse0)) (and (= |P3Thread1of1ForFork3_#t~ite48_Out575320963| ~z~0_In575320963) .cse0))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In575320963, ~z$flush_delayed~0=~z$flush_delayed~0_In575320963, ~z~0=~z~0_In575320963} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In575320963, P3Thread1of1ForFork3_#t~ite48=|P3Thread1of1ForFork3_#t~ite48_Out575320963|, ~z$flush_delayed~0=~z$flush_delayed~0_In575320963, ~z~0=~z~0_In575320963} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite48] because there is no mapped edge [2019-12-07 18:24:48,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1037] [1037] P0ENTRY-->P0EXIT: Formula: (and (= v_~a~0_23 1) (= v_P0Thread1of1ForFork0_~arg.offset_14 |v_P0Thread1of1ForFork0_#in~arg.offset_16|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x~0_25 v_~__unbuffered_p0_EAX~0_24) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_P0Thread1of1ForFork0_~arg.base_14 |v_P0Thread1of1ForFork0_#in~arg.base_16|) (= v_~__unbuffered_cnt~0_116 (+ v_~__unbuffered_cnt~0_117 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_16|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_16|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_117, ~x~0=v_~x~0_25} OutVars{~a~0=v_~a~0_23, P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_16|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_24, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_16|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_116, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_14, ~x~0=v_~x~0_25, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_14} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:24:48,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1031] [1031] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= |v_P1Thread1of1ForFork1_#res.offset_7| 0) (= v_~y~0_41 v_~__unbuffered_p1_EAX~0_17) (= 0 |v_P1Thread1of1ForFork1_#res.base_7|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92) (= v_~x~0_16 1)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, ~y~0=v_~y~0_41} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_7|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, ~y~0=v_~y~0_41, ~x~0=v_~x~0_16, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_7|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:24:48,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [984] [984] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In-1997017449 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite25_Out-1997017449| ~z~0_In-1997017449) .cse0) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite25_Out-1997017449| ~z$mem_tmp~0_In-1997017449)))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In-1997017449, ~z$flush_delayed~0=~z$flush_delayed~0_In-1997017449, ~z~0=~z~0_In-1997017449} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In-1997017449, P2Thread1of1ForFork2_#t~ite25=|P2Thread1of1ForFork2_#t~ite25_Out-1997017449|, ~z$flush_delayed~0=~z$flush_delayed~0_In-1997017449, ~z~0=~z~0_In-1997017449} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 18:24:48,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1019] [1019] L790-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= 0 v_~z$flush_delayed~0_110) (= v_~z~0_147 |v_P2Thread1of1ForFork2_#t~ite25_50|)) InVars {P2Thread1of1ForFork2_#t~ite25=|v_P2Thread1of1ForFork2_#t~ite25_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{P2Thread1of1ForFork2_#t~ite25=|v_P2Thread1of1ForFork2_#t~ite25_49|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, ~z$flush_delayed~0=v_~z$flush_delayed~0_110, ~z~0=v_~z~0_147, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite25, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, ~z$flush_delayed~0, ~z~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:24:48,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [981] [981] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1543981378 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In1543981378 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite51_Out1543981378| ~z$w_buff0_used~0_In1543981378) (or .cse0 .cse1)) (and (= |P3Thread1of1ForFork3_#t~ite51_Out1543981378| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1543981378, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1543981378} OutVars{P3Thread1of1ForFork3_#t~ite51=|P3Thread1of1ForFork3_#t~ite51_Out1543981378|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1543981378, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1543981378} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite51] because there is no mapped edge [2019-12-07 18:24:48,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [986] [986] L837-->L837-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In-1532400084 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1532400084 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1532400084 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd4~0_In-1532400084 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite52_Out-1532400084| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite52_Out-1532400084| ~z$w_buff1_used~0_In-1532400084) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1532400084, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1532400084, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1532400084, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1532400084} OutVars{P3Thread1of1ForFork3_#t~ite52=|P3Thread1of1ForFork3_#t~ite52_Out-1532400084|, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1532400084, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1532400084, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1532400084, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1532400084} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite52] because there is no mapped edge [2019-12-07 18:24:48,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [991] [991] L838-->L839: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In757306303 256))) (.cse1 (= (mod ~z$r_buff0_thd4~0_In757306303 256) 0)) (.cse2 (= ~z$r_buff0_thd4~0_Out757306303 ~z$r_buff0_thd4~0_In757306303))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out757306303) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In757306303, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In757306303} OutVars{P3Thread1of1ForFork3_#t~ite53=|P3Thread1of1ForFork3_#t~ite53_Out757306303|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In757306303, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out757306303} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite53, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:24:48,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [992] [992] L839-->L839-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In402879343 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In402879343 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In402879343 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd4~0_In402879343 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite54_Out402879343| ~z$r_buff1_thd4~0_In402879343) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P3Thread1of1ForFork3_#t~ite54_Out402879343| 0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In402879343, ~z$w_buff0_used~0=~z$w_buff0_used~0_In402879343, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In402879343, ~z$w_buff1_used~0=~z$w_buff1_used~0_In402879343} OutVars{P3Thread1of1ForFork3_#t~ite54=|P3Thread1of1ForFork3_#t~ite54_Out402879343|, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In402879343, ~z$w_buff0_used~0=~z$w_buff0_used~0_In402879343, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In402879343, ~z$w_buff1_used~0=~z$w_buff1_used~0_In402879343} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite54] because there is no mapped edge [2019-12-07 18:24:48,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1038] [1038] L839-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite54_42| v_~z$r_buff1_thd4~0_278) (= v_~__unbuffered_cnt~0_134 (+ v_~__unbuffered_cnt~0_135 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite54=|v_P3Thread1of1ForFork3_#t~ite54_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_135} OutVars{P3Thread1of1ForFork3_#t~ite54=|v_P3Thread1of1ForFork3_#t~ite54_41|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_278, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_134, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite54, ~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:24:48,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [946] [946] L864-1-->L870: Formula: (and (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_38) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet58, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:24:48,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1004] [1004] L870-2-->L870-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1917707103 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1917707103 256) 0))) (or (and (= ~z$w_buff1~0_In1917707103 |ULTIMATE.start_main_#t~ite59_Out1917707103|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite59_Out1917707103| ~z~0_In1917707103) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1917707103, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1917707103, ~z$w_buff1~0=~z$w_buff1~0_In1917707103, ~z~0=~z~0_In1917707103} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1917707103, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1917707103, ~z$w_buff1~0=~z$w_buff1~0_In1917707103, ULTIMATE.start_main_#t~ite59=|ULTIMATE.start_main_#t~ite59_Out1917707103|, ~z~0=~z~0_In1917707103} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite59] because there is no mapped edge [2019-12-07 18:24:48,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [905] [905] L870-4-->L871: Formula: (= v_~z~0_21 |v_ULTIMATE.start_main_#t~ite59_9|) InVars {ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_9|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_12|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_8|, ~z~0=v_~z~0_21} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite59, ~z~0] because there is no mapped edge [2019-12-07 18:24:48,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [985] [985] L871-->L871-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1213902357 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1213902357 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite61_Out1213902357| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite61_Out1213902357| ~z$w_buff0_used~0_In1213902357)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1213902357, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1213902357} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1213902357, ULTIMATE.start_main_#t~ite61=|ULTIMATE.start_main_#t~ite61_Out1213902357|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1213902357} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61] because there is no mapped edge [2019-12-07 18:24:48,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1001] [1001] L872-->L872-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In103744957 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In103744957 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In103744957 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In103744957 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite62_Out103744957| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite62_Out103744957| ~z$w_buff1_used~0_In103744957)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In103744957, ~z$w_buff0_used~0=~z$w_buff0_used~0_In103744957, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In103744957, ~z$w_buff1_used~0=~z$w_buff1_used~0_In103744957} OutVars{ULTIMATE.start_main_#t~ite62=|ULTIMATE.start_main_#t~ite62_Out103744957|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In103744957, ~z$w_buff0_used~0=~z$w_buff0_used~0_In103744957, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In103744957, ~z$w_buff1_used~0=~z$w_buff1_used~0_In103744957} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62] because there is no mapped edge [2019-12-07 18:24:48,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [987] [987] L873-->L873-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-300384835 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-300384835 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite63_Out-300384835|)) (and (= ~z$r_buff0_thd0~0_In-300384835 |ULTIMATE.start_main_#t~ite63_Out-300384835|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-300384835, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-300384835} OutVars{ULTIMATE.start_main_#t~ite63=|ULTIMATE.start_main_#t~ite63_Out-300384835|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-300384835, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-300384835} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63] because there is no mapped edge [2019-12-07 18:24:48,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1002] [1002] L874-->L874-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1545954793 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1545954793 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-1545954793 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-1545954793 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite64_Out-1545954793| ~z$r_buff1_thd0~0_In-1545954793)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite64_Out-1545954793| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1545954793, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1545954793, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1545954793, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1545954793} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1545954793, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1545954793, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1545954793, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1545954793, ULTIMATE.start_main_#t~ite64=|ULTIMATE.start_main_#t~ite64_Out-1545954793|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite64] because there is no mapped edge [2019-12-07 18:24:48,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1049] [1049] L874-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~z$r_buff1_thd0~0_247 |v_ULTIMATE.start_main_#t~ite64_59|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16| (mod v_~main$tmp_guard1~0_26 256)) (= v_~main$tmp_guard1~0_26 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_60 0) (= 1 v_~__unbuffered_p2_EAX~0_62) (= 1 v_~__unbuffered_p3_EAX~0_36) (= 0 v_~__unbuffered_p1_EAX~0_40) (= 0 v_~__unbuffered_p3_EBX~0_33) (= 0 v_~__unbuffered_p0_EAX~0_38))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_38, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_60, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_36, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_33, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_59|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_38, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_13, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_60, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_247, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_36, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_33, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_58|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite64, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:24:49,018 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:24:49 BasicIcfg [2019-12-07 18:24:49,018 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:24:49,018 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:24:49,018 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:24:49,018 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:24:49,019 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:22:19" (3/4) ... [2019-12-07 18:24:49,020 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:24:49,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1063] [1063] ULTIMATE.startENTRY-->L858: Formula: (let ((.cse0 (store |v_#valid_87| 0 0))) (and (= v_~z$w_buff0~0_728 0) (= v_~weak$$choice2~0_343 0) (= 0 v_~z$r_buff1_thd3~0_505) (= v_~z$w_buff1_used~0_880 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~__unbuffered_p0_EAX~0_74) (= |v_#NULL.offset_7| 0) (< 0 |v_#StackHeapBarrier_22|) (= v_~z$r_buff1_thd0~0_309 0) (= v_~__unbuffered_p2_EBX~0_114 0) (= v_~z$w_buff1~0_467 0) (= v_~z$w_buff0_used~0_1253 0) (= v_~x~0_38 0) (= v_~main$tmp_guard1~0_61 0) (= |v_#valid_85| (store .cse0 |v_ULTIMATE.start_main_~#t93~0.base_32| 1)) (= 0 v_~__unbuffered_p1_EAX~0_78) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~__unbuffered_p3_EAX~0_79) (= v_~__unbuffered_cnt~0_163 0) (= v_~z$r_buff0_thd1~0_82 0) (= 0 v_~z$r_buff1_thd4~0_433) (= |v_ULTIMATE.start_main_~#t93~0.offset_23| 0) (= v_~z$read_delayed~0_7 0) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t93~0.base_32| 4)) (= v_~a~0_31 0) (= v_~z$r_buff0_thd2~0_82 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$flush_delayed~0_298) (= 0 v_~weak$$choice0~0_246) (= v_~z$r_buff1_thd1~0_208 0) (= |v_#memory_int_27| (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t93~0.base_32| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t93~0.base_32|) |v_ULTIMATE.start_main_~#t93~0.offset_23| 0))) (= 0 v_~z$r_buff0_thd3~0_454) (= 0 v_~__unbuffered_p3_EBX~0_70) (= v_~y~0_59 0) (= v_~z$r_buff1_thd2~0_208 0) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t93~0.base_32|) (= v_~z$r_buff0_thd0~0_181 0) (= 0 v_~z$r_buff0_thd4~0_611) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_p2_EAX~0_98) (= v_~z~0_332 0) (= 0 v_~z$mem_tmp~0_257) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t93~0.base_32|)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_28|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t95~0.base=|v_ULTIMATE.start_main_~#t95~0.base_18|, ULTIMATE.start_main_~#t95~0.offset=|v_ULTIMATE.start_main_~#t95~0.offset_15|, ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_9|, ULTIMATE.start_main_#t~nondet55=|v_ULTIMATE.start_main_#t~nondet55_10|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_208, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_131|, ~a~0=v_~a~0_31, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_181, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_74, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_78, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_611, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_79, #length=|v_#length_31|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_98, ~z$mem_tmp~0=v_~z$mem_tmp~0_257, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_114, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_880, ~z$flush_delayed~0=v_~z$flush_delayed~0_298, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_43|, ~weak$$choice0~0=v_~weak$$choice0~0_246, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_225|, ULTIMATE.start_main_~#t94~0.base=|v_ULTIMATE.start_main_~#t94~0.base_25|, ULTIMATE.start_main_~#t96~0.offset=|v_ULTIMATE.start_main_~#t96~0.offset_16|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_208, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_454, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_163, ~x~0=v_~x~0_38, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_433, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_25|, ULTIMATE.start_main_#t~nondet56=|v_ULTIMATE.start_main_#t~nondet56_10|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_467, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t94~0.offset=|v_ULTIMATE.start_main_~#t94~0.offset_16|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_309, ULTIMATE.start_main_~#t93~0.base=|v_ULTIMATE.start_main_~#t93~0.base_32|, ~y~0=v_~y~0_59, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_82, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1253, ~z$w_buff0~0=v_~z$w_buff0~0_728, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_505, ULTIMATE.start_main_~#t96~0.base=|v_ULTIMATE.start_main_~#t96~0.base_19|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_57|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_70, ULTIMATE.start_main_~#t93~0.offset=|v_ULTIMATE.start_main_~#t93~0.offset_23|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_45|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_59|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_85|, #memory_int=|v_#memory_int_27|, ~z~0=v_~z~0_332, ~weak$$choice2~0=v_~weak$$choice2~0_343, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_82} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t95~0.base, ULTIMATE.start_main_~#t95~0.offset, ULTIMATE.start_main_#t~nondet57, ULTIMATE.start_main_#t~nondet55, ~z$r_buff1_thd2~0, #NULL.offset, ULTIMATE.start_main_#t~ite64, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ULTIMATE.start_main_~#t94~0.base, ULTIMATE.start_main_~#t96~0.offset, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~nondet58, ULTIMATE.start_main_#t~nondet56, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t94~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t93~0.base, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t96~0.base, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_~#t93~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:24:49,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1022] [1022] L858-1-->L860: Formula: (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t94~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t94~0.base_12|) |v_ULTIMATE.start_main_~#t94~0.offset_11| 1)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t94~0.base_12|)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t94~0.base_12|) (= 0 (select |v_#valid_44| |v_ULTIMATE.start_main_~#t94~0.base_12|)) (= |v_ULTIMATE.start_main_~#t94~0.offset_11| 0) (= (store |v_#valid_44| |v_ULTIMATE.start_main_~#t94~0.base_12| 1) |v_#valid_43|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t94~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t94~0.offset=|v_ULTIMATE.start_main_~#t94~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t94~0.base=|v_ULTIMATE.start_main_~#t94~0.base_12|, ULTIMATE.start_main_#t~nondet55=|v_ULTIMATE.start_main_#t~nondet55_6|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_17|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t94~0.offset, ULTIMATE.start_main_~#t94~0.base, ULTIMATE.start_main_#t~nondet55, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:24:49,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1014] [1014] L860-1-->L862: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t95~0.base_10| 1)) (not (= |v_ULTIMATE.start_main_~#t95~0.base_10| 0)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t95~0.base_10|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t95~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t95~0.base_10|) |v_ULTIMATE.start_main_~#t95~0.offset_9| 2)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t95~0.base_10|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t95~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t95~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t95~0.base=|v_ULTIMATE.start_main_~#t95~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t95~0.offset=|v_ULTIMATE.start_main_~#t95~0.offset_9|, #valid=|v_#valid_39|, ULTIMATE.start_main_#t~nondet56=|v_ULTIMATE.start_main_#t~nondet56_6|, #memory_int=|v_#memory_int_15|, #length=|v_#length_19|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t95~0.base, ULTIMATE.start_main_~#t95~0.offset, #valid, ULTIMATE.start_main_#t~nondet56, #memory_int, #length] because there is no mapped edge [2019-12-07 18:24:49,022 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1039] [1039] L862-1-->L864: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t96~0.base_13|)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t96~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t96~0.base_13|) |v_ULTIMATE.start_main_~#t96~0.offset_11| 3)) |v_#memory_int_19|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t96~0.base_13|) (= |v_#valid_49| (store |v_#valid_50| |v_ULTIMATE.start_main_~#t96~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t96~0.offset_11| 0) (= 0 (select |v_#valid_50| |v_ULTIMATE.start_main_~#t96~0.base_13|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t96~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_50|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t96~0.offset=|v_ULTIMATE.start_main_~#t96~0.offset_11|, ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_5|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t96~0.base=|v_ULTIMATE.start_main_~#t96~0.base_13|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t96~0.offset, ULTIMATE.start_main_#t~nondet57, #valid, #memory_int, ULTIMATE.start_main_~#t96~0.base, #length] because there is no mapped edge [2019-12-07 18:24:49,023 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [913] [913] L4-->L820: Formula: (and (not (= v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_10 0)) (= v_~z$r_buff1_thd2~0_8 v_~z$r_buff0_thd2~0_8) (= v_~z$r_buff0_thd0~0_27 v_~z$r_buff1_thd0~0_15) (= v_~z$r_buff0_thd4~0_70 1) (= v_~z$r_buff0_thd4~0_71 v_~z$r_buff1_thd4~0_39) (= v_~weak$$choice2~0_34 v_~z$flush_delayed~0_23) (= |v_P3Thread1of1ForFork3_#t~nondet27_14| v_~weak$$choice2~0_34) (= |v_P3Thread1of1ForFork3_#t~nondet26_14| v_~weak$$choice0~0_9) (= v_~z$r_buff1_thd1~0_8 v_~z$r_buff0_thd1~0_8) (= v_~z$mem_tmp~0_13 v_~z~0_35) (= v_~z$r_buff0_thd3~0_42 v_~z$r_buff1_thd3~0_30)) InVars {P3Thread1of1ForFork3_#t~nondet26=|v_P3Thread1of1ForFork3_#t~nondet26_14|, P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_10, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_27, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_71, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z~0=v_~z~0_35, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_8, P3Thread1of1ForFork3_#t~nondet27=|v_P3Thread1of1ForFork3_#t~nondet27_14|} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, P3Thread1of1ForFork3_#t~nondet26=|v_P3Thread1of1ForFork3_#t~nondet26_13|, P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_10, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_39, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_30, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_8, ~z$flush_delayed~0=v_~z$flush_delayed~0_23, ~weak$$choice0~0=v_~weak$$choice0~0_9, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_27, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_15, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_8, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_70, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_42, ~z~0=v_~z~0_35, ~weak$$choice2~0=v_~weak$$choice2~0_34, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_8, P3Thread1of1ForFork3_#t~nondet27=|v_P3Thread1of1ForFork3_#t~nondet27_13|} AuxVars[] AssignedVars[~z$mem_tmp~0, P3Thread1of1ForFork3_#t~nondet26, ~weak$$choice0~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd4~0, ~z$flush_delayed~0, ~weak$$choice2~0, P3Thread1of1ForFork3_#t~nondet27] because there is no mapped edge [2019-12-07 18:24:49,023 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [994] [994] L820-2-->L820-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In918190990 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In918190990 256))) (.cse2 (= |P3Thread1of1ForFork3_#t~ite28_Out918190990| |P3Thread1of1ForFork3_#t~ite29_Out918190990|))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite28_Out918190990| ~z$w_buff1~0_In918190990) .cse2) (and (= ~z$w_buff0~0_In918190990 |P3Thread1of1ForFork3_#t~ite28_Out918190990|) (not .cse1) (not .cse0) .cse2))) InVars {~z$w_buff0~0=~z$w_buff0~0_In918190990, ~z$w_buff0_used~0=~z$w_buff0_used~0_In918190990, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In918190990, ~z$w_buff1~0=~z$w_buff1~0_In918190990} OutVars{P3Thread1of1ForFork3_#t~ite29=|P3Thread1of1ForFork3_#t~ite29_Out918190990|, P3Thread1of1ForFork3_#t~ite28=|P3Thread1of1ForFork3_#t~ite28_Out918190990|, ~z$w_buff0~0=~z$w_buff0~0_In918190990, ~z$w_buff0_used~0=~z$w_buff0_used~0_In918190990, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In918190990, ~z$w_buff1~0=~z$w_buff1~0_In918190990} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite29, P3Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 18:24:49,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [958] [958] L825-->L826: Formula: (and (= v_~z$r_buff0_thd4~0_135 v_~z$r_buff0_thd4~0_134) (not (= (mod v_~weak$$choice2~0_81 256) 0))) InVars {~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_135, ~weak$$choice2~0=v_~weak$$choice2~0_81} OutVars{P3Thread1of1ForFork3_#t~ite42=|v_P3Thread1of1ForFork3_#t~ite42_6|, P3Thread1of1ForFork3_#t~ite43=|v_P3Thread1of1ForFork3_#t~ite43_9|, P3Thread1of1ForFork3_#t~ite44=|v_P3Thread1of1ForFork3_#t~ite44_9|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_134, ~weak$$choice2~0=v_~weak$$choice2~0_81} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite42, P3Thread1of1ForFork3_#t~ite43, P3Thread1of1ForFork3_#t~ite44, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:24:49,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [988] [988] L828-->L828-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In575320963 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite48_Out575320963| ~z$mem_tmp~0_In575320963) (not .cse0)) (and (= |P3Thread1of1ForFork3_#t~ite48_Out575320963| ~z~0_In575320963) .cse0))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In575320963, ~z$flush_delayed~0=~z$flush_delayed~0_In575320963, ~z~0=~z~0_In575320963} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In575320963, P3Thread1of1ForFork3_#t~ite48=|P3Thread1of1ForFork3_#t~ite48_Out575320963|, ~z$flush_delayed~0=~z$flush_delayed~0_In575320963, ~z~0=~z~0_In575320963} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite48] because there is no mapped edge [2019-12-07 18:24:49,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1037] [1037] P0ENTRY-->P0EXIT: Formula: (and (= v_~a~0_23 1) (= v_P0Thread1of1ForFork0_~arg.offset_14 |v_P0Thread1of1ForFork0_#in~arg.offset_16|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x~0_25 v_~__unbuffered_p0_EAX~0_24) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_P0Thread1of1ForFork0_~arg.base_14 |v_P0Thread1of1ForFork0_#in~arg.base_16|) (= v_~__unbuffered_cnt~0_116 (+ v_~__unbuffered_cnt~0_117 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_16|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_16|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_117, ~x~0=v_~x~0_25} OutVars{~a~0=v_~a~0_23, P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_16|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_24, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_16|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_116, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_14, ~x~0=v_~x~0_25, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_14} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:24:49,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1031] [1031] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= |v_P1Thread1of1ForFork1_#res.offset_7| 0) (= v_~y~0_41 v_~__unbuffered_p1_EAX~0_17) (= 0 |v_P1Thread1of1ForFork1_#res.base_7|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92) (= v_~x~0_16 1)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, ~y~0=v_~y~0_41} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_7|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, ~y~0=v_~y~0_41, ~x~0=v_~x~0_16, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_7|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:24:49,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [984] [984] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In-1997017449 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite25_Out-1997017449| ~z~0_In-1997017449) .cse0) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite25_Out-1997017449| ~z$mem_tmp~0_In-1997017449)))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In-1997017449, ~z$flush_delayed~0=~z$flush_delayed~0_In-1997017449, ~z~0=~z~0_In-1997017449} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In-1997017449, P2Thread1of1ForFork2_#t~ite25=|P2Thread1of1ForFork2_#t~ite25_Out-1997017449|, ~z$flush_delayed~0=~z$flush_delayed~0_In-1997017449, ~z~0=~z~0_In-1997017449} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 18:24:49,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1019] [1019] L790-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= 0 v_~z$flush_delayed~0_110) (= v_~z~0_147 |v_P2Thread1of1ForFork2_#t~ite25_50|)) InVars {P2Thread1of1ForFork2_#t~ite25=|v_P2Thread1of1ForFork2_#t~ite25_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{P2Thread1of1ForFork2_#t~ite25=|v_P2Thread1of1ForFork2_#t~ite25_49|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, ~z$flush_delayed~0=v_~z$flush_delayed~0_110, ~z~0=v_~z~0_147, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite25, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, ~z$flush_delayed~0, ~z~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:24:49,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [981] [981] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1543981378 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In1543981378 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite51_Out1543981378| ~z$w_buff0_used~0_In1543981378) (or .cse0 .cse1)) (and (= |P3Thread1of1ForFork3_#t~ite51_Out1543981378| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1543981378, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1543981378} OutVars{P3Thread1of1ForFork3_#t~ite51=|P3Thread1of1ForFork3_#t~ite51_Out1543981378|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1543981378, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1543981378} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite51] because there is no mapped edge [2019-12-07 18:24:49,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [986] [986] L837-->L837-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In-1532400084 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1532400084 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1532400084 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd4~0_In-1532400084 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite52_Out-1532400084| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite52_Out-1532400084| ~z$w_buff1_used~0_In-1532400084) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1532400084, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1532400084, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1532400084, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1532400084} OutVars{P3Thread1of1ForFork3_#t~ite52=|P3Thread1of1ForFork3_#t~ite52_Out-1532400084|, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1532400084, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1532400084, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1532400084, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1532400084} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite52] because there is no mapped edge [2019-12-07 18:24:49,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [991] [991] L838-->L839: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In757306303 256))) (.cse1 (= (mod ~z$r_buff0_thd4~0_In757306303 256) 0)) (.cse2 (= ~z$r_buff0_thd4~0_Out757306303 ~z$r_buff0_thd4~0_In757306303))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out757306303) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In757306303, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In757306303} OutVars{P3Thread1of1ForFork3_#t~ite53=|P3Thread1of1ForFork3_#t~ite53_Out757306303|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In757306303, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out757306303} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite53, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:24:49,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [992] [992] L839-->L839-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In402879343 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In402879343 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In402879343 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd4~0_In402879343 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite54_Out402879343| ~z$r_buff1_thd4~0_In402879343) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P3Thread1of1ForFork3_#t~ite54_Out402879343| 0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In402879343, ~z$w_buff0_used~0=~z$w_buff0_used~0_In402879343, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In402879343, ~z$w_buff1_used~0=~z$w_buff1_used~0_In402879343} OutVars{P3Thread1of1ForFork3_#t~ite54=|P3Thread1of1ForFork3_#t~ite54_Out402879343|, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In402879343, ~z$w_buff0_used~0=~z$w_buff0_used~0_In402879343, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In402879343, ~z$w_buff1_used~0=~z$w_buff1_used~0_In402879343} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite54] because there is no mapped edge [2019-12-07 18:24:49,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1038] [1038] L839-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite54_42| v_~z$r_buff1_thd4~0_278) (= v_~__unbuffered_cnt~0_134 (+ v_~__unbuffered_cnt~0_135 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite54=|v_P3Thread1of1ForFork3_#t~ite54_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_135} OutVars{P3Thread1of1ForFork3_#t~ite54=|v_P3Thread1of1ForFork3_#t~ite54_41|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_278, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_134, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite54, ~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:24:49,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [946] [946] L864-1-->L870: Formula: (and (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_38) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet58, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:24:49,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1004] [1004] L870-2-->L870-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1917707103 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1917707103 256) 0))) (or (and (= ~z$w_buff1~0_In1917707103 |ULTIMATE.start_main_#t~ite59_Out1917707103|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite59_Out1917707103| ~z~0_In1917707103) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1917707103, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1917707103, ~z$w_buff1~0=~z$w_buff1~0_In1917707103, ~z~0=~z~0_In1917707103} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1917707103, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1917707103, ~z$w_buff1~0=~z$w_buff1~0_In1917707103, ULTIMATE.start_main_#t~ite59=|ULTIMATE.start_main_#t~ite59_Out1917707103|, ~z~0=~z~0_In1917707103} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite59] because there is no mapped edge [2019-12-07 18:24:49,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [905] [905] L870-4-->L871: Formula: (= v_~z~0_21 |v_ULTIMATE.start_main_#t~ite59_9|) InVars {ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_9|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_12|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_8|, ~z~0=v_~z~0_21} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite59, ~z~0] because there is no mapped edge [2019-12-07 18:24:49,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [985] [985] L871-->L871-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1213902357 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1213902357 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite61_Out1213902357| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite61_Out1213902357| ~z$w_buff0_used~0_In1213902357)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1213902357, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1213902357} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1213902357, ULTIMATE.start_main_#t~ite61=|ULTIMATE.start_main_#t~ite61_Out1213902357|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1213902357} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61] because there is no mapped edge [2019-12-07 18:24:49,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1001] [1001] L872-->L872-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In103744957 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In103744957 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In103744957 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In103744957 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite62_Out103744957| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite62_Out103744957| ~z$w_buff1_used~0_In103744957)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In103744957, ~z$w_buff0_used~0=~z$w_buff0_used~0_In103744957, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In103744957, ~z$w_buff1_used~0=~z$w_buff1_used~0_In103744957} OutVars{ULTIMATE.start_main_#t~ite62=|ULTIMATE.start_main_#t~ite62_Out103744957|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In103744957, ~z$w_buff0_used~0=~z$w_buff0_used~0_In103744957, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In103744957, ~z$w_buff1_used~0=~z$w_buff1_used~0_In103744957} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62] because there is no mapped edge [2019-12-07 18:24:49,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [987] [987] L873-->L873-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-300384835 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-300384835 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite63_Out-300384835|)) (and (= ~z$r_buff0_thd0~0_In-300384835 |ULTIMATE.start_main_#t~ite63_Out-300384835|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-300384835, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-300384835} OutVars{ULTIMATE.start_main_#t~ite63=|ULTIMATE.start_main_#t~ite63_Out-300384835|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-300384835, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-300384835} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63] because there is no mapped edge [2019-12-07 18:24:49,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1002] [1002] L874-->L874-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1545954793 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1545954793 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-1545954793 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-1545954793 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite64_Out-1545954793| ~z$r_buff1_thd0~0_In-1545954793)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite64_Out-1545954793| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1545954793, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1545954793, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1545954793, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1545954793} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1545954793, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1545954793, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1545954793, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1545954793, ULTIMATE.start_main_#t~ite64=|ULTIMATE.start_main_#t~ite64_Out-1545954793|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite64] because there is no mapped edge [2019-12-07 18:24:49,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1049] [1049] L874-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~z$r_buff1_thd0~0_247 |v_ULTIMATE.start_main_#t~ite64_59|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16| (mod v_~main$tmp_guard1~0_26 256)) (= v_~main$tmp_guard1~0_26 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_60 0) (= 1 v_~__unbuffered_p2_EAX~0_62) (= 1 v_~__unbuffered_p3_EAX~0_36) (= 0 v_~__unbuffered_p1_EAX~0_40) (= 0 v_~__unbuffered_p3_EBX~0_33) (= 0 v_~__unbuffered_p0_EAX~0_38))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_38, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_60, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_36, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_33, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_59|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_38, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_13, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_60, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_40, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_247, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_36, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_33, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_58|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite64, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:24:49,099 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_76fed092-b83d-4dea-9534-b0b416c8d7f3/bin/uautomizer/witness.graphml [2019-12-07 18:24:49,099 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:24:49,100 INFO L168 Benchmark]: Toolchain (without parser) took 150108.01 ms. Allocated memory was 1.0 GB in the beginning and 8.9 GB in the end (delta: 7.9 GB). Free memory was 942.0 MB in the beginning and 4.7 GB in the end (delta: -3.8 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:24:49,100 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:24:49,100 INFO L168 Benchmark]: CACSL2BoogieTranslator took 391.54 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 77.1 MB). Free memory was 942.0 MB in the beginning and 1.0 GB in the end (delta: -101.4 MB). Peak memory consumption was 23.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:24:49,101 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.8 MB). Peak memory consumption was 2.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:24:49,101 INFO L168 Benchmark]: Boogie Preprocessor took 28.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:24:49,101 INFO L168 Benchmark]: RCFGBuilder took 480.47 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 969.6 MB in the end (delta: 68.3 MB). Peak memory consumption was 68.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:24:49,101 INFO L168 Benchmark]: TraceAbstraction took 149080.23 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 969.6 MB in the beginning and 4.8 GB in the end (delta: -3.8 GB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. [2019-12-07 18:24:49,102 INFO L168 Benchmark]: Witness Printer took 80.77 ms. Allocated memory is still 8.9 GB. Free memory was 4.8 GB in the beginning and 4.7 GB in the end (delta: 37.6 MB). Peak memory consumption was 37.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:24:49,103 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 391.54 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 77.1 MB). Free memory was 942.0 MB in the beginning and 1.0 GB in the end (delta: -101.4 MB). Peak memory consumption was 23.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.8 MB). Peak memory consumption was 2.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 480.47 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 969.6 MB in the end (delta: 68.3 MB). Peak memory consumption was 68.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 149080.23 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 969.6 MB in the beginning and 4.8 GB in the end (delta: -3.8 GB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. * Witness Printer took 80.77 ms. Allocated memory is still 8.9 GB. Free memory was 4.8 GB in the beginning and 4.7 GB in the end (delta: 37.6 MB). Peak memory consumption was 37.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.3s, 213 ProgramPointsBefore, 116 ProgramPointsAfterwards, 256 TransitionsBefore, 136 TransitionsAfterwards, 26510 CoEnabledTransitionPairs, 7 FixpointIterations, 39 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 53 ConcurrentYvCompositions, 28 ChoiceCompositions, 11555 VarBasedMoverChecksPositive, 393 VarBasedMoverChecksNegative, 130 SemBasedMoverChecksPositive, 392 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.6s, 0 MoverChecksTotal, 131755 CheckedPairsTotal, 134 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L858] FCALL, FORK 0 pthread_create(&t93, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L860] FCALL, FORK 0 pthread_create(&t94, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L862] FCALL, FORK 0 pthread_create(&t95, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L864] FCALL, FORK 0 pthread_create(&t96, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 4 z$w_buff1 = z$w_buff0 [L804] 4 z$w_buff0 = 1 [L805] 4 z$w_buff1_used = z$w_buff0_used [L806] 4 z$w_buff0_used = (_Bool)1 [L820] EXPR 4 !z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L820] 4 z = !z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff1) [L821] EXPR 4 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L821] 4 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)) [L822] EXPR 4 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L822] 4 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)) [L823] EXPR 4 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L823] 4 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used)) [L824] EXPR 4 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] 4 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L826] EXPR 4 weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L826] 4 z$r_buff1_thd4 = weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L827] 4 __unbuffered_p3_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L828] 4 z = z$flush_delayed ? z$mem_tmp : z [L829] 4 z$flush_delayed = (_Bool)0 [L832] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L835] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L772] 3 y = 1 [L775] 3 __unbuffered_p2_EAX = y [L778] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L779] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L780] 3 z$flush_delayed = weak$$choice2 [L781] 3 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L782] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, \result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L782] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L783] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L784] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L784] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L785] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L786] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L786] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L787] EXPR 3 weak$$choice2 ? z$r_buff0_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff0_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff0_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z$r_buff0_thd3 = weak$$choice2 ? z$r_buff0_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff0_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3)) [L788] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L788] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L789] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L835] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L836] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L837] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L870] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L871] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L872] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L873] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 201 locations, 2 error locations. Result: UNSAFE, OverallTime: 148.8s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 38.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9261 SDtfs, 13720 SDslu, 33560 SDs, 0 SdLazy, 12260 SolverSat, 354 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 388 GetRequests, 54 SyntacticMatches, 36 SemanticMatches, 298 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 828 ImplicationChecksByTransitivity, 4.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=228607occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 90.5s AutomataMinimizationTime, 32 MinimizatonAttempts, 432163 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 1465 NumberOfCodeBlocks, 1465 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 1367 ConstructedInterpolants, 0 QuantifiedInterpolants, 675380 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...