./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix006_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix006_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 64e4ff6112e856e512892ce6d1752a8276fc80ad ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:53:59,909 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:53:59,910 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:53:59,918 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:53:59,918 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:53:59,919 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:53:59,920 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:53:59,921 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:53:59,922 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:53:59,923 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:53:59,924 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:53:59,924 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:53:59,925 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:53:59,925 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:53:59,926 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:53:59,927 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:53:59,927 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:53:59,928 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:53:59,929 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:53:59,931 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:53:59,932 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:53:59,933 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:53:59,934 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:53:59,934 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:53:59,936 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:53:59,936 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:53:59,936 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:53:59,937 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:53:59,937 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:53:59,938 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:53:59,938 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:53:59,938 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:53:59,939 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:53:59,939 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:53:59,940 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:53:59,940 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:53:59,940 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:53:59,940 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:53:59,940 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:53:59,941 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:53:59,941 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:53:59,942 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:53:59,951 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:53:59,951 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:53:59,952 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:53:59,952 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:53:59,952 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:53:59,952 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:53:59,952 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:53:59,952 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:53:59,953 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:53:59,953 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:53:59,954 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:53:59,954 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:53:59,955 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:53:59,955 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 64e4ff6112e856e512892ce6d1752a8276fc80ad [2019-12-07 18:54:00,058 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:54:00,068 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:54:00,071 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:54:00,072 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:54:00,073 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:54:00,073 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix006_power.oepc.i [2019-12-07 18:54:00,114 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/data/52280a7e6/c274c907594941f19f5c8a676c7e7568/FLAGef5f36db9 [2019-12-07 18:54:00,602 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:54:00,603 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/sv-benchmarks/c/pthread-wmm/mix006_power.oepc.i [2019-12-07 18:54:00,613 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/data/52280a7e6/c274c907594941f19f5c8a676c7e7568/FLAGef5f36db9 [2019-12-07 18:54:00,624 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/data/52280a7e6/c274c907594941f19f5c8a676c7e7568 [2019-12-07 18:54:00,626 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:54:00,627 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:54:00,627 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:54:00,627 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:54:00,630 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:54:00,630 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:54:00" (1/1) ... [2019-12-07 18:54:00,632 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:00, skipping insertion in model container [2019-12-07 18:54:00,632 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:54:00" (1/1) ... [2019-12-07 18:54:00,637 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:54:00,673 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:54:00,920 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:54:00,928 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:54:00,974 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:54:01,020 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:54:01,020 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01 WrapperNode [2019-12-07 18:54:01,020 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:54:01,021 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:54:01,021 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:54:01,021 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:54:01,027 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,040 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,060 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:54:01,061 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:54:01,061 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:54:01,061 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:54:01,067 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,067 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,071 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,071 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,078 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,080 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,083 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... [2019-12-07 18:54:01,086 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:54:01,086 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:54:01,086 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:54:01,087 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:54:01,087 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:54:01,126 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:54:01,126 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:54:01,126 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:54:01,126 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:54:01,126 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:54:01,126 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:54:01,126 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:54:01,127 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:54:01,127 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:54:01,127 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:54:01,127 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:54:01,127 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:54:01,127 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:54:01,128 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:54:01,497 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:54:01,497 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:54:01,498 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:01 BoogieIcfgContainer [2019-12-07 18:54:01,498 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:54:01,499 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:54:01,499 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:54:01,501 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:54:01,501 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:54:00" (1/3) ... [2019-12-07 18:54:01,502 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72412a12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:54:01, skipping insertion in model container [2019-12-07 18:54:01,502 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:01" (2/3) ... [2019-12-07 18:54:01,502 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72412a12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:54:01, skipping insertion in model container [2019-12-07 18:54:01,502 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:01" (3/3) ... [2019-12-07 18:54:01,503 INFO L109 eAbstractionObserver]: Analyzing ICFG mix006_power.oepc.i [2019-12-07 18:54:01,509 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:54:01,509 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:54:01,514 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:54:01,515 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:54:01,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,541 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,541 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,541 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,542 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,542 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,546 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,546 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,550 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,550 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,550 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,551 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,552 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,565 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,565 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,565 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,565 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,565 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,565 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,566 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,566 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,566 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,566 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,566 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:01,578 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:54:01,591 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:54:01,591 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:54:01,591 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:54:01,591 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:54:01,591 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:54:01,591 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:54:01,591 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:54:01,591 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:54:01,604 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 18:54:01,605 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 18:54:01,667 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 18:54:01,667 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:54:01,678 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 706 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:54:01,695 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 18:54:01,732 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 18:54:01,733 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:54:01,738 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 706 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:54:01,754 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:54:01,754 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:54:04,735 WARN L192 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 48 [2019-12-07 18:54:04,925 WARN L192 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 18:54:05,021 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78628 [2019-12-07 18:54:05,021 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 18:54:05,024 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 18:54:19,077 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 110182 states. [2019-12-07 18:54:19,079 INFO L276 IsEmpty]: Start isEmpty. Operand 110182 states. [2019-12-07 18:54:19,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:54:19,083 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:54:19,083 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:54:19,083 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:54:19,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:54:19,087 INFO L82 PathProgramCache]: Analyzing trace with hash 917838, now seen corresponding path program 1 times [2019-12-07 18:54:19,092 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:54:19,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224007973] [2019-12-07 18:54:19,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:54:19,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:54:19,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:54:19,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224007973] [2019-12-07 18:54:19,224 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:54:19,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:54:19,225 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [31401771] [2019-12-07 18:54:19,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:54:19,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:54:19,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:54:19,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:54:19,239 INFO L87 Difference]: Start difference. First operand 110182 states. Second operand 3 states. [2019-12-07 18:54:20,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:54:20,040 INFO L93 Difference]: Finished difference Result 109312 states and 463550 transitions. [2019-12-07 18:54:20,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:54:20,041 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:54:20,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:54:20,500 INFO L225 Difference]: With dead ends: 109312 [2019-12-07 18:54:20,500 INFO L226 Difference]: Without dead ends: 102592 [2019-12-07 18:54:20,501 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:54:24,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102592 states. [2019-12-07 18:54:26,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102592 to 102592. [2019-12-07 18:54:26,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102592 states. [2019-12-07 18:54:26,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102592 states to 102592 states and 434430 transitions. [2019-12-07 18:54:26,443 INFO L78 Accepts]: Start accepts. Automaton has 102592 states and 434430 transitions. Word has length 3 [2019-12-07 18:54:26,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:54:26,443 INFO L462 AbstractCegarLoop]: Abstraction has 102592 states and 434430 transitions. [2019-12-07 18:54:26,443 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:54:26,443 INFO L276 IsEmpty]: Start isEmpty. Operand 102592 states and 434430 transitions. [2019-12-07 18:54:26,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:54:26,446 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:54:26,446 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:54:26,446 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:54:26,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:54:26,446 INFO L82 PathProgramCache]: Analyzing trace with hash 1857942485, now seen corresponding path program 1 times [2019-12-07 18:54:26,446 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:54:26,447 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950122901] [2019-12-07 18:54:26,447 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:54:26,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:54:26,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:54:26,512 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950122901] [2019-12-07 18:54:26,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:54:26,512 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:54:26,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1742705019] [2019-12-07 18:54:26,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:54:26,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:54:26,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:54:26,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:54:26,514 INFO L87 Difference]: Start difference. First operand 102592 states and 434430 transitions. Second operand 4 states. [2019-12-07 18:54:28,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:54:28,944 INFO L93 Difference]: Finished difference Result 159508 states and 648686 transitions. [2019-12-07 18:54:28,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:54:28,945 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:54:28,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:54:29,351 INFO L225 Difference]: With dead ends: 159508 [2019-12-07 18:54:29,351 INFO L226 Difference]: Without dead ends: 159459 [2019-12-07 18:54:29,352 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:54:34,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159459 states. [2019-12-07 18:54:36,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159459 to 146095. [2019-12-07 18:54:36,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146095 states. [2019-12-07 18:54:36,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146095 states to 146095 states and 601450 transitions. [2019-12-07 18:54:36,681 INFO L78 Accepts]: Start accepts. Automaton has 146095 states and 601450 transitions. Word has length 11 [2019-12-07 18:54:36,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:54:36,681 INFO L462 AbstractCegarLoop]: Abstraction has 146095 states and 601450 transitions. [2019-12-07 18:54:36,681 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:54:36,682 INFO L276 IsEmpty]: Start isEmpty. Operand 146095 states and 601450 transitions. [2019-12-07 18:54:36,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:54:36,686 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:54:36,686 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:54:36,686 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:54:36,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:54:36,687 INFO L82 PathProgramCache]: Analyzing trace with hash 230844073, now seen corresponding path program 1 times [2019-12-07 18:54:36,687 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:54:36,687 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958168088] [2019-12-07 18:54:36,687 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:54:36,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:54:36,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:54:36,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958168088] [2019-12-07 18:54:36,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:54:36,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:54:36,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1193528658] [2019-12-07 18:54:36,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:54:36,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:54:36,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:54:36,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:54:36,738 INFO L87 Difference]: Start difference. First operand 146095 states and 601450 transitions. Second operand 4 states. [2019-12-07 18:54:39,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:54:39,694 INFO L93 Difference]: Finished difference Result 210634 states and 846978 transitions. [2019-12-07 18:54:39,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:54:39,695 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:54:39,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:54:40,203 INFO L225 Difference]: With dead ends: 210634 [2019-12-07 18:54:40,203 INFO L226 Difference]: Without dead ends: 210578 [2019-12-07 18:54:40,204 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:54:45,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210578 states. [2019-12-07 18:54:48,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210578 to 176587. [2019-12-07 18:54:48,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176587 states. [2019-12-07 18:54:48,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176587 states to 176587 states and 722707 transitions. [2019-12-07 18:54:48,911 INFO L78 Accepts]: Start accepts. Automaton has 176587 states and 722707 transitions. Word has length 13 [2019-12-07 18:54:48,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:54:48,912 INFO L462 AbstractCegarLoop]: Abstraction has 176587 states and 722707 transitions. [2019-12-07 18:54:48,912 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:54:48,913 INFO L276 IsEmpty]: Start isEmpty. Operand 176587 states and 722707 transitions. [2019-12-07 18:54:48,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:54:48,919 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:54:48,919 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:54:48,920 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:54:48,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:54:48,920 INFO L82 PathProgramCache]: Analyzing trace with hash 1069845708, now seen corresponding path program 1 times [2019-12-07 18:54:48,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:54:48,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2074943871] [2019-12-07 18:54:48,921 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:54:48,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:54:48,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:54:48,983 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2074943871] [2019-12-07 18:54:48,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:54:48,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:54:48,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [229216687] [2019-12-07 18:54:48,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:54:48,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:54:48,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:54:48,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:54:48,985 INFO L87 Difference]: Start difference. First operand 176587 states and 722707 transitions. Second operand 4 states. [2019-12-07 18:54:50,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:54:50,037 INFO L93 Difference]: Finished difference Result 216416 states and 883253 transitions. [2019-12-07 18:54:50,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:54:50,038 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 18:54:50,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:54:50,610 INFO L225 Difference]: With dead ends: 216416 [2019-12-07 18:54:50,610 INFO L226 Difference]: Without dead ends: 216416 [2019-12-07 18:54:50,611 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:54:56,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216416 states. [2019-12-07 18:55:01,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216416 to 185201. [2019-12-07 18:55:01,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185201 states. [2019-12-07 18:55:01,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185201 states to 185201 states and 759317 transitions. [2019-12-07 18:55:01,844 INFO L78 Accepts]: Start accepts. Automaton has 185201 states and 759317 transitions. Word has length 16 [2019-12-07 18:55:01,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:01,844 INFO L462 AbstractCegarLoop]: Abstraction has 185201 states and 759317 transitions. [2019-12-07 18:55:01,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:55:01,844 INFO L276 IsEmpty]: Start isEmpty. Operand 185201 states and 759317 transitions. [2019-12-07 18:55:01,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:55:01,856 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:01,856 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:01,856 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:01,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:01,856 INFO L82 PathProgramCache]: Analyzing trace with hash -430348270, now seen corresponding path program 1 times [2019-12-07 18:55:01,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:01,857 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197447004] [2019-12-07 18:55:01,857 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:01,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:01,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:01,911 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197447004] [2019-12-07 18:55:01,911 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:01,911 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:55:01,911 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559684741] [2019-12-07 18:55:01,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:01,911 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:01,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:01,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:01,912 INFO L87 Difference]: Start difference. First operand 185201 states and 759317 transitions. Second operand 3 states. [2019-12-07 18:55:03,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:03,780 INFO L93 Difference]: Finished difference Result 331864 states and 1351232 transitions. [2019-12-07 18:55:03,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:03,781 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:55:03,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:04,513 INFO L225 Difference]: With dead ends: 331864 [2019-12-07 18:55:04,513 INFO L226 Difference]: Without dead ends: 294974 [2019-12-07 18:55:04,513 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:13,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294974 states. [2019-12-07 18:55:18,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294974 to 282616. [2019-12-07 18:55:18,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 282616 states. [2019-12-07 18:55:18,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 282616 states to 282616 states and 1158738 transitions. [2019-12-07 18:55:18,922 INFO L78 Accepts]: Start accepts. Automaton has 282616 states and 1158738 transitions. Word has length 18 [2019-12-07 18:55:18,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:18,923 INFO L462 AbstractCegarLoop]: Abstraction has 282616 states and 1158738 transitions. [2019-12-07 18:55:18,923 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:18,923 INFO L276 IsEmpty]: Start isEmpty. Operand 282616 states and 1158738 transitions. [2019-12-07 18:55:18,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:55:18,940 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:18,941 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:18,941 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:18,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:18,941 INFO L82 PathProgramCache]: Analyzing trace with hash -1935633602, now seen corresponding path program 1 times [2019-12-07 18:55:18,941 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:18,941 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541571026] [2019-12-07 18:55:18,941 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:18,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:18,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:18,990 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541571026] [2019-12-07 18:55:18,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:18,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:55:18,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1233458271] [2019-12-07 18:55:18,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:18,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:18,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:18,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:18,992 INFO L87 Difference]: Start difference. First operand 282616 states and 1158738 transitions. Second operand 5 states. [2019-12-07 18:55:21,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:21,577 INFO L93 Difference]: Finished difference Result 395363 states and 1592433 transitions. [2019-12-07 18:55:21,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:55:21,578 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:55:21,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:23,249 INFO L225 Difference]: With dead ends: 395363 [2019-12-07 18:55:23,249 INFO L226 Difference]: Without dead ends: 395265 [2019-12-07 18:55:23,249 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:55:34,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395265 states. [2019-12-07 18:55:39,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395265 to 301435. [2019-12-07 18:55:39,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301435 states. [2019-12-07 18:55:40,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301435 states to 301435 states and 1234907 transitions. [2019-12-07 18:55:40,598 INFO L78 Accepts]: Start accepts. Automaton has 301435 states and 1234907 transitions. Word has length 19 [2019-12-07 18:55:40,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:40,599 INFO L462 AbstractCegarLoop]: Abstraction has 301435 states and 1234907 transitions. [2019-12-07 18:55:40,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:40,599 INFO L276 IsEmpty]: Start isEmpty. Operand 301435 states and 1234907 transitions. [2019-12-07 18:55:40,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:55:40,619 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:40,620 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:40,620 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:40,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:40,620 INFO L82 PathProgramCache]: Analyzing trace with hash 1383705760, now seen corresponding path program 1 times [2019-12-07 18:55:40,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:40,620 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727362309] [2019-12-07 18:55:40,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:40,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:40,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:40,650 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727362309] [2019-12-07 18:55:40,650 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:40,650 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:40,650 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1498279000] [2019-12-07 18:55:40,650 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:40,650 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:40,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:40,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:40,651 INFO L87 Difference]: Start difference. First operand 301435 states and 1234907 transitions. Second operand 3 states. [2019-12-07 18:55:42,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:42,365 INFO L93 Difference]: Finished difference Result 301435 states and 1222640 transitions. [2019-12-07 18:55:42,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:42,366 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:55:42,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:43,111 INFO L225 Difference]: With dead ends: 301435 [2019-12-07 18:55:43,112 INFO L226 Difference]: Without dead ends: 301435 [2019-12-07 18:55:43,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:52,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301435 states. [2019-12-07 18:55:57,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301435 to 298819. [2019-12-07 18:55:57,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298819 states. [2019-12-07 18:55:57,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298819 states to 298819 states and 1213070 transitions. [2019-12-07 18:55:57,903 INFO L78 Accepts]: Start accepts. Automaton has 298819 states and 1213070 transitions. Word has length 19 [2019-12-07 18:55:57,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:57,903 INFO L462 AbstractCegarLoop]: Abstraction has 298819 states and 1213070 transitions. [2019-12-07 18:55:57,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:57,904 INFO L276 IsEmpty]: Start isEmpty. Operand 298819 states and 1213070 transitions. [2019-12-07 18:55:57,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:55:57,922 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:57,922 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:57,922 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:57,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:57,922 INFO L82 PathProgramCache]: Analyzing trace with hash -911766470, now seen corresponding path program 1 times [2019-12-07 18:55:57,922 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:57,922 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [448920111] [2019-12-07 18:55:57,923 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:57,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:57,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:57,949 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [448920111] [2019-12-07 18:55:57,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:57,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:57,949 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1319558064] [2019-12-07 18:55:57,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:57,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:57,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:57,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:57,950 INFO L87 Difference]: Start difference. First operand 298819 states and 1213070 transitions. Second operand 3 states. [2019-12-07 18:55:58,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:58,129 INFO L93 Difference]: Finished difference Result 59726 states and 191228 transitions. [2019-12-07 18:55:58,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:58,129 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:55:58,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:58,221 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 18:55:58,222 INFO L226 Difference]: Without dead ends: 59726 [2019-12-07 18:55:58,222 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:58,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59726 states. [2019-12-07 18:55:59,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59726 to 59726. [2019-12-07 18:55:59,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59726 states. [2019-12-07 18:55:59,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59726 states to 59726 states and 191228 transitions. [2019-12-07 18:55:59,561 INFO L78 Accepts]: Start accepts. Automaton has 59726 states and 191228 transitions. Word has length 19 [2019-12-07 18:55:59,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:59,561 INFO L462 AbstractCegarLoop]: Abstraction has 59726 states and 191228 transitions. [2019-12-07 18:55:59,561 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:59,561 INFO L276 IsEmpty]: Start isEmpty. Operand 59726 states and 191228 transitions. [2019-12-07 18:55:59,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:55:59,569 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:59,569 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:59,569 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:59,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:59,569 INFO L82 PathProgramCache]: Analyzing trace with hash 6986775, now seen corresponding path program 1 times [2019-12-07 18:55:59,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:59,569 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1890288898] [2019-12-07 18:55:59,570 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:59,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:59,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:59,605 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1890288898] [2019-12-07 18:55:59,605 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:59,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:55:59,606 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1376791173] [2019-12-07 18:55:59,606 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:59,606 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:59,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:59,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:59,606 INFO L87 Difference]: Start difference. First operand 59726 states and 191228 transitions. Second operand 5 states. [2019-12-07 18:56:00,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:00,078 INFO L93 Difference]: Finished difference Result 77588 states and 245011 transitions. [2019-12-07 18:56:00,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:56:00,079 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:56:00,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:00,198 INFO L225 Difference]: With dead ends: 77588 [2019-12-07 18:56:00,198 INFO L226 Difference]: Without dead ends: 77581 [2019-12-07 18:56:00,198 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:00,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77581 states. [2019-12-07 18:56:01,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77581 to 62186. [2019-12-07 18:56:01,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62186 states. [2019-12-07 18:56:01,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62186 states to 62186 states and 198426 transitions. [2019-12-07 18:56:01,347 INFO L78 Accepts]: Start accepts. Automaton has 62186 states and 198426 transitions. Word has length 22 [2019-12-07 18:56:01,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:01,347 INFO L462 AbstractCegarLoop]: Abstraction has 62186 states and 198426 transitions. [2019-12-07 18:56:01,347 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:56:01,347 INFO L276 IsEmpty]: Start isEmpty. Operand 62186 states and 198426 transitions. [2019-12-07 18:56:01,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:56:01,367 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:01,368 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:01,368 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:01,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:01,368 INFO L82 PathProgramCache]: Analyzing trace with hash 1947963172, now seen corresponding path program 1 times [2019-12-07 18:56:01,368 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:01,368 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1106779690] [2019-12-07 18:56:01,368 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:01,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:01,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:01,413 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1106779690] [2019-12-07 18:56:01,413 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:01,413 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:56:01,413 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [14201256] [2019-12-07 18:56:01,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:56:01,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:01,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:56:01,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:56:01,414 INFO L87 Difference]: Start difference. First operand 62186 states and 198426 transitions. Second operand 6 states. [2019-12-07 18:56:01,912 WARN L192 SmtUtils]: Spent 252.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2019-12-07 18:56:02,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:02,428 INFO L93 Difference]: Finished difference Result 157654 states and 507961 transitions. [2019-12-07 18:56:02,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:56:02,429 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:56:02,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:02,679 INFO L225 Difference]: With dead ends: 157654 [2019-12-07 18:56:02,680 INFO L226 Difference]: Without dead ends: 157606 [2019-12-07 18:56:02,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:56:03,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157606 states. [2019-12-07 18:56:04,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157606 to 83469. [2019-12-07 18:56:04,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83469 states. [2019-12-07 18:56:04,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83469 states to 83469 states and 270386 transitions. [2019-12-07 18:56:04,791 INFO L78 Accepts]: Start accepts. Automaton has 83469 states and 270386 transitions. Word has length 27 [2019-12-07 18:56:04,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:04,792 INFO L462 AbstractCegarLoop]: Abstraction has 83469 states and 270386 transitions. [2019-12-07 18:56:04,792 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:56:04,792 INFO L276 IsEmpty]: Start isEmpty. Operand 83469 states and 270386 transitions. [2019-12-07 18:56:04,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:56:04,817 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:04,817 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:04,817 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:04,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:04,817 INFO L82 PathProgramCache]: Analyzing trace with hash -89566793, now seen corresponding path program 1 times [2019-12-07 18:56:04,817 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:04,818 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747724465] [2019-12-07 18:56:04,818 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:04,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:04,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:04,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747724465] [2019-12-07 18:56:04,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:04,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:56:04,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324689164] [2019-12-07 18:56:04,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:56:04,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:04,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:56:04,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:56:04,864 INFO L87 Difference]: Start difference. First operand 83469 states and 270386 transitions. Second operand 6 states. [2019-12-07 18:56:05,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:05,724 INFO L93 Difference]: Finished difference Result 160656 states and 514675 transitions. [2019-12-07 18:56:05,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:56:05,725 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 18:56:05,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:05,984 INFO L225 Difference]: With dead ends: 160656 [2019-12-07 18:56:05,984 INFO L226 Difference]: Without dead ends: 160606 [2019-12-07 18:56:05,984 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:56:06,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160606 states. [2019-12-07 18:56:07,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160606 to 85834. [2019-12-07 18:56:07,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85834 states. [2019-12-07 18:56:08,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85834 states to 85834 states and 279447 transitions. [2019-12-07 18:56:08,055 INFO L78 Accepts]: Start accepts. Automaton has 85834 states and 279447 transitions. Word has length 28 [2019-12-07 18:56:08,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:08,056 INFO L462 AbstractCegarLoop]: Abstraction has 85834 states and 279447 transitions. [2019-12-07 18:56:08,056 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:56:08,056 INFO L276 IsEmpty]: Start isEmpty. Operand 85834 states and 279447 transitions. [2019-12-07 18:56:08,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:56:08,086 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:08,087 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:08,087 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:08,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:08,087 INFO L82 PathProgramCache]: Analyzing trace with hash 926801998, now seen corresponding path program 1 times [2019-12-07 18:56:08,087 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:08,087 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344410815] [2019-12-07 18:56:08,087 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:08,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:08,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:08,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344410815] [2019-12-07 18:56:08,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:08,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:08,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117309393] [2019-12-07 18:56:08,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:56:08,125 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:08,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:56:08,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:08,125 INFO L87 Difference]: Start difference. First operand 85834 states and 279447 transitions. Second operand 4 states. [2019-12-07 18:56:08,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:08,224 INFO L93 Difference]: Finished difference Result 33205 states and 104210 transitions. [2019-12-07 18:56:08,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:56:08,225 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 18:56:08,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:08,270 INFO L225 Difference]: With dead ends: 33205 [2019-12-07 18:56:08,271 INFO L226 Difference]: Without dead ends: 33205 [2019-12-07 18:56:08,271 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:08,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33205 states. [2019-12-07 18:56:08,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33205 to 30946. [2019-12-07 18:56:08,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30946 states. [2019-12-07 18:56:08,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30946 states to 30946 states and 97236 transitions. [2019-12-07 18:56:08,782 INFO L78 Accepts]: Start accepts. Automaton has 30946 states and 97236 transitions. Word has length 30 [2019-12-07 18:56:08,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:08,782 INFO L462 AbstractCegarLoop]: Abstraction has 30946 states and 97236 transitions. [2019-12-07 18:56:08,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:08,782 INFO L276 IsEmpty]: Start isEmpty. Operand 30946 states and 97236 transitions. [2019-12-07 18:56:08,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:56:08,806 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:08,807 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:08,807 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:08,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:08,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1720610055, now seen corresponding path program 1 times [2019-12-07 18:56:08,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:08,807 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672932365] [2019-12-07 18:56:08,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:08,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:08,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:08,880 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [672932365] [2019-12-07 18:56:08,880 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:08,880 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:56:08,880 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315352222] [2019-12-07 18:56:08,880 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:56:08,880 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:08,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:56:08,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:08,881 INFO L87 Difference]: Start difference. First operand 30946 states and 97236 transitions. Second operand 7 states. [2019-12-07 18:56:09,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:09,735 INFO L93 Difference]: Finished difference Result 62326 states and 193553 transitions. [2019-12-07 18:56:09,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:56:09,736 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:56:09,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:09,821 INFO L225 Difference]: With dead ends: 62326 [2019-12-07 18:56:09,821 INFO L226 Difference]: Without dead ends: 62326 [2019-12-07 18:56:09,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:56:09,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62326 states. [2019-12-07 18:56:10,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62326 to 30984. [2019-12-07 18:56:10,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30984 states. [2019-12-07 18:56:10,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30984 states to 30984 states and 97364 transitions. [2019-12-07 18:56:10,556 INFO L78 Accepts]: Start accepts. Automaton has 30984 states and 97364 transitions. Word has length 33 [2019-12-07 18:56:10,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:10,556 INFO L462 AbstractCegarLoop]: Abstraction has 30984 states and 97364 transitions. [2019-12-07 18:56:10,556 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:56:10,556 INFO L276 IsEmpty]: Start isEmpty. Operand 30984 states and 97364 transitions. [2019-12-07 18:56:10,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:56:10,580 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:10,580 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:10,580 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:10,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:10,581 INFO L82 PathProgramCache]: Analyzing trace with hash -1518720007, now seen corresponding path program 2 times [2019-12-07 18:56:10,581 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:10,581 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046965608] [2019-12-07 18:56:10,581 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:10,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:10,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:10,640 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046965608] [2019-12-07 18:56:10,640 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:10,640 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:56:10,640 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755224855] [2019-12-07 18:56:10,641 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:56:10,641 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:10,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:56:10,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:56:10,641 INFO L87 Difference]: Start difference. First operand 30984 states and 97364 transitions. Second operand 8 states. [2019-12-07 18:56:11,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:11,890 INFO L93 Difference]: Finished difference Result 94487 states and 287972 transitions. [2019-12-07 18:56:11,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 18:56:11,891 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 18:56:11,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:12,018 INFO L225 Difference]: With dead ends: 94487 [2019-12-07 18:56:12,018 INFO L226 Difference]: Without dead ends: 94487 [2019-12-07 18:56:12,018 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 226 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=224, Invalid=646, Unknown=0, NotChecked=0, Total=870 [2019-12-07 18:56:12,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94487 states. [2019-12-07 18:56:12,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94487 to 30556. [2019-12-07 18:56:12,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30556 states. [2019-12-07 18:56:12,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30556 states to 30556 states and 96072 transitions. [2019-12-07 18:56:12,979 INFO L78 Accepts]: Start accepts. Automaton has 30556 states and 96072 transitions. Word has length 33 [2019-12-07 18:56:12,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:12,980 INFO L462 AbstractCegarLoop]: Abstraction has 30556 states and 96072 transitions. [2019-12-07 18:56:12,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:56:12,980 INFO L276 IsEmpty]: Start isEmpty. Operand 30556 states and 96072 transitions. [2019-12-07 18:56:13,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:56:13,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:13,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:13,005 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:13,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:13,005 INFO L82 PathProgramCache]: Analyzing trace with hash -2146187134, now seen corresponding path program 1 times [2019-12-07 18:56:13,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:13,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957457748] [2019-12-07 18:56:13,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:13,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:13,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:13,080 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957457748] [2019-12-07 18:56:13,081 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:13,081 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:56:13,081 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288411668] [2019-12-07 18:56:13,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:56:13,081 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:13,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:56:13,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:13,082 INFO L87 Difference]: Start difference. First operand 30556 states and 96072 transitions. Second operand 7 states. [2019-12-07 18:56:14,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:14,298 INFO L93 Difference]: Finished difference Result 55881 states and 171523 transitions. [2019-12-07 18:56:14,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:56:14,299 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 18:56:14,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:14,382 INFO L225 Difference]: With dead ends: 55881 [2019-12-07 18:56:14,382 INFO L226 Difference]: Without dead ends: 55881 [2019-12-07 18:56:14,383 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:56:14,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55881 states. [2019-12-07 18:56:14,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55881 to 29599. [2019-12-07 18:56:14,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29599 states. [2019-12-07 18:56:15,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29599 states to 29599 states and 93012 transitions. [2019-12-07 18:56:15,037 INFO L78 Accepts]: Start accepts. Automaton has 29599 states and 93012 transitions. Word has length 34 [2019-12-07 18:56:15,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:15,037 INFO L462 AbstractCegarLoop]: Abstraction has 29599 states and 93012 transitions. [2019-12-07 18:56:15,037 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:56:15,037 INFO L276 IsEmpty]: Start isEmpty. Operand 29599 states and 93012 transitions. [2019-12-07 18:56:15,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:56:15,060 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:15,060 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:15,060 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:15,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:15,061 INFO L82 PathProgramCache]: Analyzing trace with hash 1401085166, now seen corresponding path program 2 times [2019-12-07 18:56:15,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:15,061 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869031895] [2019-12-07 18:56:15,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:15,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:15,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:15,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869031895] [2019-12-07 18:56:15,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:15,125 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:56:15,125 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [750969751] [2019-12-07 18:56:15,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:56:15,125 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:15,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:56:15,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:56:15,125 INFO L87 Difference]: Start difference. First operand 29599 states and 93012 transitions. Second operand 8 states. [2019-12-07 18:56:16,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:16,200 INFO L93 Difference]: Finished difference Result 72627 states and 219091 transitions. [2019-12-07 18:56:16,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 18:56:16,200 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 18:56:16,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:16,304 INFO L225 Difference]: With dead ends: 72627 [2019-12-07 18:56:16,304 INFO L226 Difference]: Without dead ends: 72627 [2019-12-07 18:56:16,305 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=209, Invalid=603, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:56:16,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72627 states. [2019-12-07 18:56:17,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72627 to 29162. [2019-12-07 18:56:17,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29162 states. [2019-12-07 18:56:17,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29162 states to 29162 states and 91677 transitions. [2019-12-07 18:56:17,090 INFO L78 Accepts]: Start accepts. Automaton has 29162 states and 91677 transitions. Word has length 34 [2019-12-07 18:56:17,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:17,090 INFO L462 AbstractCegarLoop]: Abstraction has 29162 states and 91677 transitions. [2019-12-07 18:56:17,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:56:17,090 INFO L276 IsEmpty]: Start isEmpty. Operand 29162 states and 91677 transitions. [2019-12-07 18:56:17,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:56:17,119 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:17,119 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:17,119 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:17,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:17,120 INFO L82 PathProgramCache]: Analyzing trace with hash 1606834207, now seen corresponding path program 1 times [2019-12-07 18:56:17,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:17,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2087829350] [2019-12-07 18:56:17,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:17,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:17,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:17,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2087829350] [2019-12-07 18:56:17,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:17,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:56:17,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211749277] [2019-12-07 18:56:17,169 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:56:17,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:17,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:56:17,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:17,169 INFO L87 Difference]: Start difference. First operand 29162 states and 91677 transitions. Second operand 5 states. [2019-12-07 18:56:17,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:17,625 INFO L93 Difference]: Finished difference Result 45785 states and 141977 transitions. [2019-12-07 18:56:17,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:56:17,625 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:56:17,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:17,683 INFO L225 Difference]: With dead ends: 45785 [2019-12-07 18:56:17,683 INFO L226 Difference]: Without dead ends: 45785 [2019-12-07 18:56:17,683 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:17,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45785 states. [2019-12-07 18:56:18,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45785 to 35544. [2019-12-07 18:56:18,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35544 states. [2019-12-07 18:56:18,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35544 states to 35544 states and 111102 transitions. [2019-12-07 18:56:18,302 INFO L78 Accepts]: Start accepts. Automaton has 35544 states and 111102 transitions. Word has length 40 [2019-12-07 18:56:18,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:18,302 INFO L462 AbstractCegarLoop]: Abstraction has 35544 states and 111102 transitions. [2019-12-07 18:56:18,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:56:18,302 INFO L276 IsEmpty]: Start isEmpty. Operand 35544 states and 111102 transitions. [2019-12-07 18:56:18,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:56:18,337 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:18,337 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:18,337 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:18,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:18,337 INFO L82 PathProgramCache]: Analyzing trace with hash -1278569393, now seen corresponding path program 2 times [2019-12-07 18:56:18,338 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:18,338 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [992159336] [2019-12-07 18:56:18,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:18,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:18,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:18,382 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [992159336] [2019-12-07 18:56:18,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:18,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:56:18,383 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723346334] [2019-12-07 18:56:18,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:56:18,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:18,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:56:18,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:18,383 INFO L87 Difference]: Start difference. First operand 35544 states and 111102 transitions. Second operand 5 states. [2019-12-07 18:56:18,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:18,485 INFO L93 Difference]: Finished difference Result 33036 states and 105439 transitions. [2019-12-07 18:56:18,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:56:18,485 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:56:18,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:18,530 INFO L225 Difference]: With dead ends: 33036 [2019-12-07 18:56:18,530 INFO L226 Difference]: Without dead ends: 32480 [2019-12-07 18:56:18,530 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:18,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32480 states. [2019-12-07 18:56:18,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32480 to 17990. [2019-12-07 18:56:18,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17990 states. [2019-12-07 18:56:18,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17990 states to 17990 states and 57467 transitions. [2019-12-07 18:56:18,896 INFO L78 Accepts]: Start accepts. Automaton has 17990 states and 57467 transitions. Word has length 40 [2019-12-07 18:56:18,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:18,897 INFO L462 AbstractCegarLoop]: Abstraction has 17990 states and 57467 transitions. [2019-12-07 18:56:18,897 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:56:18,897 INFO L276 IsEmpty]: Start isEmpty. Operand 17990 states and 57467 transitions. [2019-12-07 18:56:18,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:56:18,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:18,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:18,914 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:18,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:18,914 INFO L82 PathProgramCache]: Analyzing trace with hash -1009608446, now seen corresponding path program 1 times [2019-12-07 18:56:18,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:18,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187069876] [2019-12-07 18:56:18,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:18,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:18,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:18,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187069876] [2019-12-07 18:56:18,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:18,953 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:18,953 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916461226] [2019-12-07 18:56:18,953 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:18,953 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:18,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:18,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:18,954 INFO L87 Difference]: Start difference. First operand 17990 states and 57467 transitions. Second operand 3 states. [2019-12-07 18:56:19,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:19,034 INFO L93 Difference]: Finished difference Result 21898 states and 69678 transitions. [2019-12-07 18:56:19,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:19,035 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:56:19,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:19,061 INFO L225 Difference]: With dead ends: 21898 [2019-12-07 18:56:19,061 INFO L226 Difference]: Without dead ends: 21898 [2019-12-07 18:56:19,061 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:19,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21898 states. [2019-12-07 18:56:19,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21898 to 16217. [2019-12-07 18:56:19,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16217 states. [2019-12-07 18:56:19,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16217 states to 16217 states and 51622 transitions. [2019-12-07 18:56:19,340 INFO L78 Accepts]: Start accepts. Automaton has 16217 states and 51622 transitions. Word has length 65 [2019-12-07 18:56:19,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:19,340 INFO L462 AbstractCegarLoop]: Abstraction has 16217 states and 51622 transitions. [2019-12-07 18:56:19,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:19,340 INFO L276 IsEmpty]: Start isEmpty. Operand 16217 states and 51622 transitions. [2019-12-07 18:56:19,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:19,355 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:19,355 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:19,355 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:19,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:19,355 INFO L82 PathProgramCache]: Analyzing trace with hash 696339612, now seen corresponding path program 1 times [2019-12-07 18:56:19,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:19,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524606464] [2019-12-07 18:56:19,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:19,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:19,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:19,433 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524606464] [2019-12-07 18:56:19,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:19,433 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:56:19,433 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1306821148] [2019-12-07 18:56:19,433 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:56:19,433 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:19,433 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:56:19,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:19,434 INFO L87 Difference]: Start difference. First operand 16217 states and 51622 transitions. Second operand 7 states. [2019-12-07 18:56:20,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:20,409 INFO L93 Difference]: Finished difference Result 36817 states and 116374 transitions. [2019-12-07 18:56:20,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:56:20,409 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:56:20,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:20,455 INFO L225 Difference]: With dead ends: 36817 [2019-12-07 18:56:20,455 INFO L226 Difference]: Without dead ends: 36817 [2019-12-07 18:56:20,456 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=93, Invalid=249, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:56:20,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36817 states. [2019-12-07 18:56:20,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36817 to 16675. [2019-12-07 18:56:20,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16675 states. [2019-12-07 18:56:20,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16675 states to 16675 states and 53118 transitions. [2019-12-07 18:56:20,862 INFO L78 Accepts]: Start accepts. Automaton has 16675 states and 53118 transitions. Word has length 66 [2019-12-07 18:56:20,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:20,863 INFO L462 AbstractCegarLoop]: Abstraction has 16675 states and 53118 transitions. [2019-12-07 18:56:20,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:56:20,863 INFO L276 IsEmpty]: Start isEmpty. Operand 16675 states and 53118 transitions. [2019-12-07 18:56:20,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:20,878 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:20,878 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:20,878 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:20,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:20,879 INFO L82 PathProgramCache]: Analyzing trace with hash -682854070, now seen corresponding path program 2 times [2019-12-07 18:56:20,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:20,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889000735] [2019-12-07 18:56:20,879 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:20,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:20,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:20,943 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889000735] [2019-12-07 18:56:20,943 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:20,943 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:20,943 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [251008580] [2019-12-07 18:56:20,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:56:20,944 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:20,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:56:20,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:20,944 INFO L87 Difference]: Start difference. First operand 16675 states and 53118 transitions. Second operand 4 states. [2019-12-07 18:56:21,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:21,032 INFO L93 Difference]: Finished difference Result 29177 states and 93481 transitions. [2019-12-07 18:56:21,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:56:21,032 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 18:56:21,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:21,050 INFO L225 Difference]: With dead ends: 29177 [2019-12-07 18:56:21,050 INFO L226 Difference]: Without dead ends: 13674 [2019-12-07 18:56:21,050 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:21,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13674 states. [2019-12-07 18:56:21,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13674 to 13674. [2019-12-07 18:56:21,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13674 states. [2019-12-07 18:56:21,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13674 states to 13674 states and 44007 transitions. [2019-12-07 18:56:21,259 INFO L78 Accepts]: Start accepts. Automaton has 13674 states and 44007 transitions. Word has length 66 [2019-12-07 18:56:21,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:21,260 INFO L462 AbstractCegarLoop]: Abstraction has 13674 states and 44007 transitions. [2019-12-07 18:56:21,260 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:21,260 INFO L276 IsEmpty]: Start isEmpty. Operand 13674 states and 44007 transitions. [2019-12-07 18:56:21,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:21,273 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:21,273 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:21,273 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:21,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:21,273 INFO L82 PathProgramCache]: Analyzing trace with hash -1828295080, now seen corresponding path program 3 times [2019-12-07 18:56:21,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:21,274 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136750173] [2019-12-07 18:56:21,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:21,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:21,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:21,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136750173] [2019-12-07 18:56:21,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:21,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:56:21,354 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [762119018] [2019-12-07 18:56:21,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:56:21,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:21,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:56:21,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:21,355 INFO L87 Difference]: Start difference. First operand 13674 states and 44007 transitions. Second operand 7 states. [2019-12-07 18:56:21,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:21,679 INFO L93 Difference]: Finished difference Result 43105 states and 136354 transitions. [2019-12-07 18:56:21,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:56:21,679 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:56:21,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:21,719 INFO L225 Difference]: With dead ends: 43105 [2019-12-07 18:56:21,720 INFO L226 Difference]: Without dead ends: 31595 [2019-12-07 18:56:21,720 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:56:21,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31595 states. [2019-12-07 18:56:22,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31595 to 16230. [2019-12-07 18:56:22,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16230 states. [2019-12-07 18:56:22,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16230 states to 16230 states and 52180 transitions. [2019-12-07 18:56:22,079 INFO L78 Accepts]: Start accepts. Automaton has 16230 states and 52180 transitions. Word has length 66 [2019-12-07 18:56:22,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:22,079 INFO L462 AbstractCegarLoop]: Abstraction has 16230 states and 52180 transitions. [2019-12-07 18:56:22,079 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:56:22,079 INFO L276 IsEmpty]: Start isEmpty. Operand 16230 states and 52180 transitions. [2019-12-07 18:56:22,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:22,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:22,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:22,095 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:22,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:22,095 INFO L82 PathProgramCache]: Analyzing trace with hash 704226476, now seen corresponding path program 1 times [2019-12-07 18:56:22,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:22,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257912436] [2019-12-07 18:56:22,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:22,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:22,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:22,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257912436] [2019-12-07 18:56:22,120 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:22,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:22,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801489301] [2019-12-07 18:56:22,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:22,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:22,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:22,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:22,121 INFO L87 Difference]: Start difference. First operand 16230 states and 52180 transitions. Second operand 3 states. [2019-12-07 18:56:22,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:22,189 INFO L93 Difference]: Finished difference Result 20733 states and 65333 transitions. [2019-12-07 18:56:22,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:22,190 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:56:22,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:22,213 INFO L225 Difference]: With dead ends: 20733 [2019-12-07 18:56:22,213 INFO L226 Difference]: Without dead ends: 20733 [2019-12-07 18:56:22,213 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:22,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20733 states. [2019-12-07 18:56:22,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20733 to 16397. [2019-12-07 18:56:22,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16397 states. [2019-12-07 18:56:22,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16397 states to 16397 states and 52147 transitions. [2019-12-07 18:56:22,488 INFO L78 Accepts]: Start accepts. Automaton has 16397 states and 52147 transitions. Word has length 66 [2019-12-07 18:56:22,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:22,488 INFO L462 AbstractCegarLoop]: Abstraction has 16397 states and 52147 transitions. [2019-12-07 18:56:22,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:22,488 INFO L276 IsEmpty]: Start isEmpty. Operand 16397 states and 52147 transitions. [2019-12-07 18:56:22,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:22,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:22,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:22,504 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:22,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:22,504 INFO L82 PathProgramCache]: Analyzing trace with hash -1895791660, now seen corresponding path program 1 times [2019-12-07 18:56:22,504 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:22,504 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330215589] [2019-12-07 18:56:22,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:22,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:22,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:22,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [330215589] [2019-12-07 18:56:22,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:22,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:56:22,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872960964] [2019-12-07 18:56:22,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:56:22,568 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:22,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:56:22,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:22,568 INFO L87 Difference]: Start difference. First operand 16397 states and 52147 transitions. Second operand 7 states. [2019-12-07 18:56:23,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:23,478 INFO L93 Difference]: Finished difference Result 33526 states and 102948 transitions. [2019-12-07 18:56:23,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:56:23,479 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:56:23,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:23,518 INFO L225 Difference]: With dead ends: 33526 [2019-12-07 18:56:23,518 INFO L226 Difference]: Without dead ends: 33526 [2019-12-07 18:56:23,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=93, Invalid=249, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:56:23,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33526 states. [2019-12-07 18:56:23,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33526 to 16779. [2019-12-07 18:56:23,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16779 states. [2019-12-07 18:56:23,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16779 states to 16779 states and 53266 transitions. [2019-12-07 18:56:23,884 INFO L78 Accepts]: Start accepts. Automaton has 16779 states and 53266 transitions. Word has length 66 [2019-12-07 18:56:23,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:23,885 INFO L462 AbstractCegarLoop]: Abstraction has 16779 states and 53266 transitions. [2019-12-07 18:56:23,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:56:23,885 INFO L276 IsEmpty]: Start isEmpty. Operand 16779 states and 53266 transitions. [2019-12-07 18:56:23,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:23,900 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:23,900 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:23,901 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:23,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:23,901 INFO L82 PathProgramCache]: Analyzing trace with hash 1332754028, now seen corresponding path program 4 times [2019-12-07 18:56:23,901 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:23,901 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513368911] [2019-12-07 18:56:23,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:23,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:23,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:23,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513368911] [2019-12-07 18:56:23,992 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:23,992 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:56:23,992 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [659563678] [2019-12-07 18:56:23,993 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:56:23,993 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:23,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:56:23,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:56:23,993 INFO L87 Difference]: Start difference. First operand 16779 states and 53266 transitions. Second operand 8 states. [2019-12-07 18:56:24,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:24,982 INFO L93 Difference]: Finished difference Result 38693 states and 119765 transitions. [2019-12-07 18:56:24,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:56:24,983 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 18:56:24,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:25,029 INFO L225 Difference]: With dead ends: 38693 [2019-12-07 18:56:25,029 INFO L226 Difference]: Without dead ends: 38693 [2019-12-07 18:56:25,030 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=309, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:56:25,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38693 states. [2019-12-07 18:56:25,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38693 to 16807. [2019-12-07 18:56:25,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16807 states. [2019-12-07 18:56:25,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16807 states to 16807 states and 53346 transitions. [2019-12-07 18:56:25,429 INFO L78 Accepts]: Start accepts. Automaton has 16807 states and 53346 transitions. Word has length 66 [2019-12-07 18:56:25,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:25,430 INFO L462 AbstractCegarLoop]: Abstraction has 16807 states and 53346 transitions. [2019-12-07 18:56:25,430 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:56:25,430 INFO L276 IsEmpty]: Start isEmpty. Operand 16807 states and 53346 transitions. [2019-12-07 18:56:25,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:25,446 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:25,446 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:25,446 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:25,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:25,446 INFO L82 PathProgramCache]: Analyzing trace with hash -430308760, now seen corresponding path program 5 times [2019-12-07 18:56:25,446 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:25,446 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122755920] [2019-12-07 18:56:25,447 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:25,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:25,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:25,535 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122755920] [2019-12-07 18:56:25,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:25,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:56:25,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301053821] [2019-12-07 18:56:25,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:56:25,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:25,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:56:25,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:25,536 INFO L87 Difference]: Start difference. First operand 16807 states and 53346 transitions. Second operand 9 states. [2019-12-07 18:56:26,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:26,484 INFO L93 Difference]: Finished difference Result 32280 states and 99942 transitions. [2019-12-07 18:56:26,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 18:56:26,484 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 18:56:26,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:26,523 INFO L225 Difference]: With dead ends: 32280 [2019-12-07 18:56:26,523 INFO L226 Difference]: Without dead ends: 32280 [2019-12-07 18:56:26,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=118, Invalid=344, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:56:26,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32280 states. [2019-12-07 18:56:26,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32280 to 16779. [2019-12-07 18:56:26,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16779 states. [2019-12-07 18:56:26,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16779 states to 16779 states and 53266 transitions. [2019-12-07 18:56:26,875 INFO L78 Accepts]: Start accepts. Automaton has 16779 states and 53266 transitions. Word has length 66 [2019-12-07 18:56:26,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:26,875 INFO L462 AbstractCegarLoop]: Abstraction has 16779 states and 53266 transitions. [2019-12-07 18:56:26,875 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:56:26,875 INFO L276 IsEmpty]: Start isEmpty. Operand 16779 states and 53266 transitions. [2019-12-07 18:56:26,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:26,891 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:26,891 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:26,891 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:26,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:26,892 INFO L82 PathProgramCache]: Analyzing trace with hash -1619470892, now seen corresponding path program 2 times [2019-12-07 18:56:26,892 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:26,892 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612891342] [2019-12-07 18:56:26,892 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:26,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:26,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:26,965 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612891342] [2019-12-07 18:56:26,965 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:26,965 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:56:26,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1370546123] [2019-12-07 18:56:26,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:56:26,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:26,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:56:26,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:56:26,965 INFO L87 Difference]: Start difference. First operand 16779 states and 53266 transitions. Second operand 8 states. [2019-12-07 18:56:27,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:27,779 INFO L93 Difference]: Finished difference Result 24900 states and 75387 transitions. [2019-12-07 18:56:27,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:56:27,779 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 18:56:27,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:27,807 INFO L225 Difference]: With dead ends: 24900 [2019-12-07 18:56:27,807 INFO L226 Difference]: Without dead ends: 24830 [2019-12-07 18:56:27,808 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=87, Invalid=255, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:56:27,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24830 states. [2019-12-07 18:56:28,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24830 to 15851. [2019-12-07 18:56:28,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15851 states. [2019-12-07 18:56:28,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15851 states to 15851 states and 49441 transitions. [2019-12-07 18:56:28,109 INFO L78 Accepts]: Start accepts. Automaton has 15851 states and 49441 transitions. Word has length 66 [2019-12-07 18:56:28,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:28,110 INFO L462 AbstractCegarLoop]: Abstraction has 15851 states and 49441 transitions. [2019-12-07 18:56:28,110 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:56:28,110 INFO L276 IsEmpty]: Start isEmpty. Operand 15851 states and 49441 transitions. [2019-12-07 18:56:28,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:28,124 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:28,124 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:28,125 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:28,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:28,125 INFO L82 PathProgramCache]: Analyzing trace with hash -1843508078, now seen corresponding path program 6 times [2019-12-07 18:56:28,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:28,125 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27191844] [2019-12-07 18:56:28,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:28,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:28,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:28,162 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [27191844] [2019-12-07 18:56:28,162 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:28,162 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:28,163 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464906831] [2019-12-07 18:56:28,163 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:28,163 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:28,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:28,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:28,163 INFO L87 Difference]: Start difference. First operand 15851 states and 49441 transitions. Second operand 3 states. [2019-12-07 18:56:28,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:28,194 INFO L93 Difference]: Finished difference Result 10406 states and 32317 transitions. [2019-12-07 18:56:28,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:28,194 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:56:28,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:28,205 INFO L225 Difference]: With dead ends: 10406 [2019-12-07 18:56:28,205 INFO L226 Difference]: Without dead ends: 10406 [2019-12-07 18:56:28,205 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:28,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10406 states. [2019-12-07 18:56:28,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10406 to 9497. [2019-12-07 18:56:28,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9497 states. [2019-12-07 18:56:28,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9497 states to 9497 states and 29490 transitions. [2019-12-07 18:56:28,350 INFO L78 Accepts]: Start accepts. Automaton has 9497 states and 29490 transitions. Word has length 66 [2019-12-07 18:56:28,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:28,350 INFO L462 AbstractCegarLoop]: Abstraction has 9497 states and 29490 transitions. [2019-12-07 18:56:28,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:28,350 INFO L276 IsEmpty]: Start isEmpty. Operand 9497 states and 29490 transitions. [2019-12-07 18:56:28,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:28,358 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:28,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:28,358 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:28,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:28,358 INFO L82 PathProgramCache]: Analyzing trace with hash -574262541, now seen corresponding path program 1 times [2019-12-07 18:56:28,358 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:28,358 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1504712952] [2019-12-07 18:56:28,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:28,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:28,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:28,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1504712952] [2019-12-07 18:56:28,436 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:28,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:56:28,436 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605610693] [2019-12-07 18:56:28,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:56:28,436 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:28,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:56:28,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:28,437 INFO L87 Difference]: Start difference. First operand 9497 states and 29490 transitions. Second operand 9 states. [2019-12-07 18:56:29,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:29,100 INFO L93 Difference]: Finished difference Result 52666 states and 159728 transitions. [2019-12-07 18:56:29,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 18:56:29,101 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 18:56:29,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:29,156 INFO L225 Difference]: With dead ends: 52666 [2019-12-07 18:56:29,156 INFO L226 Difference]: Without dead ends: 48436 [2019-12-07 18:56:29,157 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=151, Invalid=499, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:56:29,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48436 states. [2019-12-07 18:56:29,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48436 to 10478. [2019-12-07 18:56:29,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10478 states. [2019-12-07 18:56:29,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10478 states to 10478 states and 32770 transitions. [2019-12-07 18:56:29,550 INFO L78 Accepts]: Start accepts. Automaton has 10478 states and 32770 transitions. Word has length 67 [2019-12-07 18:56:29,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:29,550 INFO L462 AbstractCegarLoop]: Abstraction has 10478 states and 32770 transitions. [2019-12-07 18:56:29,550 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:56:29,550 INFO L276 IsEmpty]: Start isEmpty. Operand 10478 states and 32770 transitions. [2019-12-07 18:56:29,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:29,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:29,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:29,560 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:29,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:29,560 INFO L82 PathProgramCache]: Analyzing trace with hash 603749179, now seen corresponding path program 1 times [2019-12-07 18:56:29,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:29,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1641446059] [2019-12-07 18:56:29,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:29,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:29,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:29,618 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1641446059] [2019-12-07 18:56:29,618 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:29,618 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:56:29,618 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [385529079] [2019-12-07 18:56:29,618 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:56:29,618 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:29,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:56:29,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:29,619 INFO L87 Difference]: Start difference. First operand 10478 states and 32770 transitions. Second operand 7 states. [2019-12-07 18:56:30,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:30,564 INFO L93 Difference]: Finished difference Result 25664 states and 76837 transitions. [2019-12-07 18:56:30,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:56:30,565 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 18:56:30,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:30,598 INFO L225 Difference]: With dead ends: 25664 [2019-12-07 18:56:30,598 INFO L226 Difference]: Without dead ends: 25664 [2019-12-07 18:56:30,598 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:56:30,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25664 states. [2019-12-07 18:56:30,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25664 to 14293. [2019-12-07 18:56:30,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14293 states. [2019-12-07 18:56:30,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14293 states to 14293 states and 44190 transitions. [2019-12-07 18:56:30,888 INFO L78 Accepts]: Start accepts. Automaton has 14293 states and 44190 transitions. Word has length 67 [2019-12-07 18:56:30,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:30,889 INFO L462 AbstractCegarLoop]: Abstraction has 14293 states and 44190 transitions. [2019-12-07 18:56:30,889 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:56:30,889 INFO L276 IsEmpty]: Start isEmpty. Operand 14293 states and 44190 transitions. [2019-12-07 18:56:30,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:30,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:30,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:30,903 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:30,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:30,903 INFO L82 PathProgramCache]: Analyzing trace with hash 795565329, now seen corresponding path program 2 times [2019-12-07 18:56:30,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:30,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100337532] [2019-12-07 18:56:30,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:30,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:30,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:30,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100337532] [2019-12-07 18:56:30,941 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:30,941 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:30,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [492293170] [2019-12-07 18:56:30,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:56:30,941 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:30,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:56:30,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:30,941 INFO L87 Difference]: Start difference. First operand 14293 states and 44190 transitions. Second operand 4 states. [2019-12-07 18:56:31,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:31,020 INFO L93 Difference]: Finished difference Result 16780 states and 51647 transitions. [2019-12-07 18:56:31,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:56:31,021 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:56:31,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:31,039 INFO L225 Difference]: With dead ends: 16780 [2019-12-07 18:56:31,039 INFO L226 Difference]: Without dead ends: 16780 [2019-12-07 18:56:31,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:31,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16780 states. [2019-12-07 18:56:31,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16780 to 13738. [2019-12-07 18:56:31,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13738 states. [2019-12-07 18:56:31,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13738 states to 13738 states and 42538 transitions. [2019-12-07 18:56:31,263 INFO L78 Accepts]: Start accepts. Automaton has 13738 states and 42538 transitions. Word has length 67 [2019-12-07 18:56:31,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:31,263 INFO L462 AbstractCegarLoop]: Abstraction has 13738 states and 42538 transitions. [2019-12-07 18:56:31,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:31,264 INFO L276 IsEmpty]: Start isEmpty. Operand 13738 states and 42538 transitions. [2019-12-07 18:56:31,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:31,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:31,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:31,277 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:31,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:31,277 INFO L82 PathProgramCache]: Analyzing trace with hash 516538099, now seen corresponding path program 2 times [2019-12-07 18:56:31,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:31,277 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349046609] [2019-12-07 18:56:31,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:31,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:31,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:31,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349046609] [2019-12-07 18:56:31,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:31,375 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:56:31,375 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231496202] [2019-12-07 18:56:31,376 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:56:31,376 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:31,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:56:31,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:31,376 INFO L87 Difference]: Start difference. First operand 13738 states and 42538 transitions. Second operand 9 states. [2019-12-07 18:56:32,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:32,841 INFO L93 Difference]: Finished difference Result 81751 states and 245469 transitions. [2019-12-07 18:56:32,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 18:56:32,842 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 18:56:32,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:32,910 INFO L225 Difference]: With dead ends: 81751 [2019-12-07 18:56:32,910 INFO L226 Difference]: Without dead ends: 57808 [2019-12-07 18:56:32,911 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 635 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=421, Invalid=1559, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 18:56:33,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57808 states. [2019-12-07 18:56:33,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57808 to 15475. [2019-12-07 18:56:33,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15475 states. [2019-12-07 18:56:33,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15475 states to 15475 states and 47798 transitions. [2019-12-07 18:56:33,456 INFO L78 Accepts]: Start accepts. Automaton has 15475 states and 47798 transitions. Word has length 67 [2019-12-07 18:56:33,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:33,457 INFO L462 AbstractCegarLoop]: Abstraction has 15475 states and 47798 transitions. [2019-12-07 18:56:33,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:56:33,457 INFO L276 IsEmpty]: Start isEmpty. Operand 15475 states and 47798 transitions. [2019-12-07 18:56:33,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:33,471 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:33,471 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:33,471 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:33,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:33,471 INFO L82 PathProgramCache]: Analyzing trace with hash 763340387, now seen corresponding path program 3 times [2019-12-07 18:56:33,471 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:33,471 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844908410] [2019-12-07 18:56:33,471 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:33,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:56:33,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:56:33,550 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:56:33,550 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:56:33,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= v_~__unbuffered_p1_EBX~0_48 0) (= v_~main$tmp_guard0~0_30 0) (= 0 v_~z$r_buff0_thd3~0_367) (= v_~z$r_buff0_thd0~0_147 0) (= v_~z$w_buff0_used~0_850 0) (= v_~z$w_buff0~0_393 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= 0 v_~z$r_buff1_thd3~0_322) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t153~0.base_27| 4) |v_#length_23|) (= v_~weak$$choice2~0_147 0) (= v_~z$read_delayed~0_6 0) (= v_~z$r_buff1_thd1~0_158 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_168 0) (= |v_ULTIMATE.start_main_~#t153~0.offset_17| 0) (= v_~z$w_buff1_used~0_568 0) (= v_~main$tmp_guard1~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_41) (= 0 |v_#NULL.base_6|) (= (store .cse0 |v_ULTIMATE.start_main_~#t153~0.base_27| 1) |v_#valid_73|) (= 0 v_~z$flush_delayed~0_26) (= v_~__unbuffered_p2_EBX~0_49 0) (= 0 v_~__unbuffered_p1_EAX~0_47) (= v_~z$r_buff0_thd1~0_210 0) (= 0 v_~x~0_154) (= (select .cse0 |v_ULTIMATE.start_main_~#t153~0.base_27|) 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t153~0.base_27|) (= v_~z$r_buff0_thd2~0_129 0) (= 0 v_~__unbuffered_cnt~0_88) (= v_~z~0_181 0) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t153~0.base_27| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t153~0.base_27|) |v_ULTIMATE.start_main_~#t153~0.offset_17| 0)) |v_#memory_int_19|) (= v_~y~0_31 0) (= v_~z$r_buff1_thd0~0_191 0) (= v_~z$w_buff1~0_253 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t154~0.offset=|v_ULTIMATE.start_main_~#t154~0.offset_16|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_168, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_61|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_191|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_147, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, ULTIMATE.start_main_~#t153~0.base=|v_ULTIMATE.start_main_~#t153~0.base_27|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_41, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_49, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_568, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t155~0.offset=|v_ULTIMATE.start_main_~#t155~0.offset_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_158, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_367, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~x~0=v_~x~0_154, ULTIMATE.start_main_~#t154~0.base=|v_ULTIMATE.start_main_~#t154~0.base_22|, ULTIMATE.start_main_~#t155~0.base=|v_ULTIMATE.start_main_~#t155~0.base_23|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_253, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_41, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_39|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_191, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_129, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_48, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_850, ~z$w_buff0~0=v_~z$w_buff0~0_393, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_322, ULTIMATE.start_main_~#t153~0.offset=|v_ULTIMATE.start_main_~#t153~0.offset_17|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_181, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_210} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t154~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t153~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t155~0.offset, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t154~0.base, ULTIMATE.start_main_~#t155~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t153~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:56:33,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L830-1-->L832: Formula: (and (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t154~0.base_11| 4)) (= |v_ULTIMATE.start_main_~#t154~0.offset_9| 0) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t154~0.base_11| 1)) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t154~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t154~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t154~0.base_11|) |v_ULTIMATE.start_main_~#t154~0.offset_9| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t154~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t154~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t154~0.offset=|v_ULTIMATE.start_main_~#t154~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t154~0.base=|v_ULTIMATE.start_main_~#t154~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t154~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t154~0.base] because there is no mapped edge [2019-12-07 18:56:33,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->L748: Formula: (and (= v_~z$r_buff0_thd0~0_17 v_~z$r_buff1_thd0~0_13) (= 1 v_~x~0_6) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4)) (= v_~z$r_buff0_thd1~0_21 1) (= v_~z$r_buff0_thd3~0_47 v_~z$r_buff1_thd3~0_31) (= v_~z$r_buff0_thd1~0_22 v_~z$r_buff1_thd1~0_11) (= v_~z$r_buff0_thd2~0_15 v_~z$r_buff1_thd2~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_47, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_22, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_15} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_17, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_31, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_13, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_11, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_11, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_47, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_21, ~x~0=v_~x~0_6, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_15} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:56:33,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L771-2-->L771-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1588612407 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-1588612407 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out-1588612407| ~z~0_In-1588612407) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-1588612407| ~z$w_buff1~0_In-1588612407) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1588612407, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1588612407, ~z$w_buff1~0=~z$w_buff1~0_In-1588612407, ~z~0=~z~0_In-1588612407} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1588612407|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1588612407, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1588612407, ~z$w_buff1~0=~z$w_buff1~0_In-1588612407, ~z~0=~z~0_In-1588612407} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:56:33,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L771-4-->L772: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~z~0_27) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_15|, ~z~0=v_~z~0_27} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 18:56:33,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L772-->L772-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In462570625 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In462570625 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out462570625| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out462570625| ~z$w_buff0_used~0_In462570625) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In462570625, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In462570625} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In462570625, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out462570625|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In462570625} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:56:33,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L773-->L773-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In1781654037 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1781654037 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In1781654037 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1781654037 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1781654037|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In1781654037 |P1Thread1of1ForFork2_#t~ite12_Out1781654037|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1781654037, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1781654037, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1781654037, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1781654037} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1781654037, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1781654037, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1781654037, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1781654037|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1781654037} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:56:33,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L832-1-->L834: Formula: (and (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t155~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t155~0.base_9|) |v_ULTIMATE.start_main_~#t155~0.offset_8| 2)) |v_#memory_int_9|) (= |v_ULTIMATE.start_main_~#t155~0.offset_8| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t155~0.base_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t155~0.base_9| 1)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t155~0.base_9| 4) |v_#length_13|) (not (= |v_ULTIMATE.start_main_~#t155~0.base_9| 0)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t155~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t155~0.base=|v_ULTIMATE.start_main_~#t155~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t155~0.offset=|v_ULTIMATE.start_main_~#t155~0.offset_8|, #valid=|v_#valid_27|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t155~0.base, ULTIMATE.start_main_~#t155~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 18:56:33,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1750790847 256)))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-1750790847 256) 0))) (or (and .cse0 (= (mod ~z$w_buff1_used~0_In-1750790847 256) 0)) (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1750790847 256))) (= 0 (mod ~z$w_buff0_used~0_In-1750790847 256)))) .cse1 (= |P2Thread1of1ForFork0_#t~ite20_Out-1750790847| ~z$w_buff0~0_In-1750790847) (= |P2Thread1of1ForFork0_#t~ite21_Out-1750790847| |P2Thread1of1ForFork0_#t~ite20_Out-1750790847|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1750790847| ~z$w_buff0~0_In-1750790847) (= |P2Thread1of1ForFork0_#t~ite20_In-1750790847| |P2Thread1of1ForFork0_#t~ite20_Out-1750790847|) (not .cse1)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-1750790847, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1750790847, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1750790847, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1750790847, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1750790847, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1750790847|, ~weak$$choice2~0=~weak$$choice2~0_In-1750790847} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1750790847|, ~z$w_buff0~0=~z$w_buff0~0_In-1750790847, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1750790847, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1750790847, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1750790847, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1750790847, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1750790847|, ~weak$$choice2~0=~weak$$choice2~0_In-1750790847} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:56:33,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In6450241 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In6450241 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out6450241| 0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out6450241| ~z$r_buff0_thd2~0_In6450241) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In6450241, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In6450241} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In6450241, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out6450241|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In6450241} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:56:33,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L775-->L775-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1273074350 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1273074350 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1273074350 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1273074350 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1273074350| ~z$r_buff1_thd2~0_In1273074350) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1273074350| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1273074350, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1273074350, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1273074350, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1273074350} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1273074350, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1273074350, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1273074350, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1273074350|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1273074350} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:56:33,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L775-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_30| v_~z$r_buff1_thd2~0_56) (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_30|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_29|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:56:33,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In88772297 256)))) (or (and (= ~z$w_buff1~0_In88772297 |P2Thread1of1ForFork0_#t~ite23_Out88772297|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In88772297 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In88772297 256) 0) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In88772297 256))) (= 0 (mod ~z$w_buff0_used~0_In88772297 256)))) (= |P2Thread1of1ForFork0_#t~ite24_Out88772297| |P2Thread1of1ForFork0_#t~ite23_Out88772297|)) (and (= ~z$w_buff1~0_In88772297 |P2Thread1of1ForFork0_#t~ite24_Out88772297|) (= |P2Thread1of1ForFork0_#t~ite23_In88772297| |P2Thread1of1ForFork0_#t~ite23_Out88772297|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In88772297, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In88772297, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In88772297|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In88772297, ~z$w_buff1~0=~z$w_buff1~0_In88772297, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In88772297, ~weak$$choice2~0=~weak$$choice2~0_In88772297} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In88772297, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out88772297|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In88772297, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out88772297|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In88772297, ~z$w_buff1~0=~z$w_buff1~0_In88772297, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In88772297, ~weak$$choice2~0=~weak$$choice2~0_In88772297} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 18:56:33,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L798-->L798-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In378233979 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In378233979| |P2Thread1of1ForFork0_#t~ite26_Out378233979|) (not .cse0) (= ~z$w_buff0_used~0_In378233979 |P2Thread1of1ForFork0_#t~ite27_Out378233979|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In378233979 256)))) (or (and (= 0 (mod ~z$r_buff1_thd3~0_In378233979 256)) .cse1) (= (mod ~z$w_buff0_used~0_In378233979 256) 0) (and (= 0 (mod ~z$w_buff1_used~0_In378233979 256)) .cse1))) (= |P2Thread1of1ForFork0_#t~ite27_Out378233979| |P2Thread1of1ForFork0_#t~ite26_Out378233979|) (= ~z$w_buff0_used~0_In378233979 |P2Thread1of1ForFork0_#t~ite26_Out378233979|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In378233979|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In378233979, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In378233979, ~z$w_buff1_used~0=~z$w_buff1_used~0_In378233979, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In378233979, ~weak$$choice2~0=~weak$$choice2~0_In378233979} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out378233979|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out378233979|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In378233979, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In378233979, ~z$w_buff1_used~0=~z$w_buff1_used~0_In378233979, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In378233979, ~weak$$choice2~0=~weak$$choice2~0_In378233979} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:56:33,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff0_thd3~0_66)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_66, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:56:33,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L803-->L807: Formula: (and (= 0 v_~z$flush_delayed~0_11) (= v_~z~0_50 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:56:33,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-156830557 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In-156830557 256) 0))) (or (and (= ~z$w_buff0_used~0_In-156830557 |P0Thread1of1ForFork1_#t~ite5_Out-156830557|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-156830557|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-156830557, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-156830557} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-156830557|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-156830557, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-156830557} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:56:33,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L807-2-->L807-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In300433352 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In300433352 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out300433352| ~z$w_buff1~0_In300433352) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out300433352| ~z~0_In300433352)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In300433352, ~z$w_buff1_used~0=~z$w_buff1_used~0_In300433352, ~z$w_buff1~0=~z$w_buff1~0_In300433352, ~z~0=~z~0_In300433352} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out300433352|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In300433352, ~z$w_buff1_used~0=~z$w_buff1_used~0_In300433352, ~z$w_buff1~0=~z$w_buff1~0_In300433352, ~z~0=~z~0_In300433352} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:56:33,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2066610572 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In2066610572 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd1~0_In2066610572 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In2066610572 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out2066610572|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In2066610572 |P0Thread1of1ForFork1_#t~ite6_Out2066610572|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2066610572, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2066610572, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2066610572, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2066610572} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2066610572, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out2066610572|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2066610572, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2066610572, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2066610572} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:56:33,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L751-->L752: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-988858907 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-988858907 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out-988858907 ~z$r_buff0_thd1~0_In-988858907))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse1) (= ~z$r_buff0_thd1~0_Out-988858907 0)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-988858907, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-988858907} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-988858907, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-988858907|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-988858907} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:56:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In465363218 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In465363218 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In465363218 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In465363218 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out465363218|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out465363218| ~z$r_buff1_thd1~0_In465363218) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In465363218, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In465363218, ~z$w_buff1_used~0=~z$w_buff1_used~0_In465363218, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In465363218} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out465363218|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In465363218, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In465363218, ~z$w_buff1_used~0=~z$w_buff1_used~0_In465363218, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In465363218} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:56:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_30|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_29|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:56:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L807-4-->L808: Formula: (= v_~z~0_20 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 18:56:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In369803856 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In369803856 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out369803856| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out369803856| ~z$w_buff0_used~0_In369803856)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In369803856, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In369803856} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In369803856, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out369803856|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In369803856} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:56:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L809-->L809-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In-507587312 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-507587312 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-507587312 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-507587312 256) 0))) (or (and (= ~z$w_buff1_used~0_In-507587312 |P2Thread1of1ForFork0_#t~ite41_Out-507587312|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-507587312|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-507587312, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-507587312, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-507587312, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-507587312} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-507587312, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-507587312, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-507587312, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-507587312, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-507587312|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:56:33,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L810-->L810-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-797291343 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-797291343 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-797291343| 0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-797291343| ~z$r_buff0_thd3~0_In-797291343) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-797291343, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-797291343} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-797291343, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-797291343, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-797291343|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:56:33,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd3~0_In1646249680 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1646249680 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1646249680 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1646249680 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In1646249680 |P2Thread1of1ForFork0_#t~ite43_Out1646249680|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out1646249680| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1646249680, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1646249680, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1646249680, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1646249680} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1646249680|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1646249680, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1646249680, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1646249680, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1646249680} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:56:33,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= v_~z$r_buff1_thd3~0_121 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_121, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:56:33,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L834-1-->L840: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:56:33,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L840-2-->L840-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out265863989| |ULTIMATE.start_main_#t~ite47_Out265863989|)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In265863989 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In265863989 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out265863989| ~z$w_buff1~0_In265863989) (not .cse1) (not .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out265863989| ~z~0_In265863989) (or .cse2 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In265863989, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265863989, ~z$w_buff1~0=~z$w_buff1~0_In265863989, ~z~0=~z~0_In265863989} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In265863989, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out265863989|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265863989, ~z$w_buff1~0=~z$w_buff1~0_In265863989, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out265863989|, ~z~0=~z~0_In265863989} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:56:33,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1707165567 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1707165567 256)))) (or (and (= ~z$w_buff0_used~0_In1707165567 |ULTIMATE.start_main_#t~ite49_Out1707165567|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out1707165567|) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1707165567, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1707165567} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1707165567, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1707165567, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1707165567|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:56:33,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L842-->L842-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In1256221764 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In1256221764 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In1256221764 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1256221764 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out1256221764| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1256221764 |ULTIMATE.start_main_#t~ite50_Out1256221764|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1256221764, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1256221764, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1256221764, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1256221764} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1256221764|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1256221764, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1256221764, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1256221764, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1256221764} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:56:33,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1205151473 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In1205151473 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1205151473 |ULTIMATE.start_main_#t~ite51_Out1205151473|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out1205151473|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1205151473, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1205151473} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1205151473, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1205151473|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1205151473} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:56:33,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In200355811 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In200355811 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In200355811 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In200355811 256)))) (or (and (= ~z$r_buff1_thd0~0_In200355811 |ULTIMATE.start_main_#t~ite52_Out200355811|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out200355811|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In200355811, ~z$w_buff0_used~0=~z$w_buff0_used~0_In200355811, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In200355811, ~z$w_buff1_used~0=~z$w_buff1_used~0_In200355811} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out200355811|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In200355811, ~z$w_buff0_used~0=~z$w_buff0_used~0_In200355811, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In200355811, ~z$w_buff1_used~0=~z$w_buff1_used~0_In200355811} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:56:33,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [886] [886] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (= (ite (not (and (= 2 v_~__unbuffered_p1_EAX~0_22) (= v_~x~0_65 2) (= v_~__unbuffered_p2_EBX~0_27 0) (= v_~__unbuffered_p1_EBX~0_23 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_18 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_101 |v_ULTIMATE.start_main_#t~ite52_39|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_23, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_27, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_65} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_23, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_27, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_101, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_65, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:56:33,629 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:56:33 BasicIcfg [2019-12-07 18:56:33,629 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:56:33,629 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:56:33,629 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:56:33,629 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:56:33,630 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:01" (3/4) ... [2019-12-07 18:56:33,632 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:56:33,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= v_~__unbuffered_p1_EBX~0_48 0) (= v_~main$tmp_guard0~0_30 0) (= 0 v_~z$r_buff0_thd3~0_367) (= v_~z$r_buff0_thd0~0_147 0) (= v_~z$w_buff0_used~0_850 0) (= v_~z$w_buff0~0_393 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= 0 v_~z$r_buff1_thd3~0_322) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t153~0.base_27| 4) |v_#length_23|) (= v_~weak$$choice2~0_147 0) (= v_~z$read_delayed~0_6 0) (= v_~z$r_buff1_thd1~0_158 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_168 0) (= |v_ULTIMATE.start_main_~#t153~0.offset_17| 0) (= v_~z$w_buff1_used~0_568 0) (= v_~main$tmp_guard1~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_41) (= 0 |v_#NULL.base_6|) (= (store .cse0 |v_ULTIMATE.start_main_~#t153~0.base_27| 1) |v_#valid_73|) (= 0 v_~z$flush_delayed~0_26) (= v_~__unbuffered_p2_EBX~0_49 0) (= 0 v_~__unbuffered_p1_EAX~0_47) (= v_~z$r_buff0_thd1~0_210 0) (= 0 v_~x~0_154) (= (select .cse0 |v_ULTIMATE.start_main_~#t153~0.base_27|) 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t153~0.base_27|) (= v_~z$r_buff0_thd2~0_129 0) (= 0 v_~__unbuffered_cnt~0_88) (= v_~z~0_181 0) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t153~0.base_27| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t153~0.base_27|) |v_ULTIMATE.start_main_~#t153~0.offset_17| 0)) |v_#memory_int_19|) (= v_~y~0_31 0) (= v_~z$r_buff1_thd0~0_191 0) (= v_~z$w_buff1~0_253 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t154~0.offset=|v_ULTIMATE.start_main_~#t154~0.offset_16|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_168, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_61|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_191|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_147, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, ULTIMATE.start_main_~#t153~0.base=|v_ULTIMATE.start_main_~#t153~0.base_27|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_41, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_49, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_568, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t155~0.offset=|v_ULTIMATE.start_main_~#t155~0.offset_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_158, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_367, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~x~0=v_~x~0_154, ULTIMATE.start_main_~#t154~0.base=|v_ULTIMATE.start_main_~#t154~0.base_22|, ULTIMATE.start_main_~#t155~0.base=|v_ULTIMATE.start_main_~#t155~0.base_23|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_253, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_41, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_39|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_191, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_129, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_48, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_850, ~z$w_buff0~0=v_~z$w_buff0~0_393, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_322, ULTIMATE.start_main_~#t153~0.offset=|v_ULTIMATE.start_main_~#t153~0.offset_17|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_181, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_210} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t154~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t153~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t155~0.offset, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t154~0.base, ULTIMATE.start_main_~#t155~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t153~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:56:33,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L830-1-->L832: Formula: (and (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t154~0.base_11| 4)) (= |v_ULTIMATE.start_main_~#t154~0.offset_9| 0) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t154~0.base_11| 1)) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t154~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t154~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t154~0.base_11|) |v_ULTIMATE.start_main_~#t154~0.offset_9| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t154~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t154~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t154~0.offset=|v_ULTIMATE.start_main_~#t154~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t154~0.base=|v_ULTIMATE.start_main_~#t154~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t154~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t154~0.base] because there is no mapped edge [2019-12-07 18:56:33,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->L748: Formula: (and (= v_~z$r_buff0_thd0~0_17 v_~z$r_buff1_thd0~0_13) (= 1 v_~x~0_6) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4)) (= v_~z$r_buff0_thd1~0_21 1) (= v_~z$r_buff0_thd3~0_47 v_~z$r_buff1_thd3~0_31) (= v_~z$r_buff0_thd1~0_22 v_~z$r_buff1_thd1~0_11) (= v_~z$r_buff0_thd2~0_15 v_~z$r_buff1_thd2~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_47, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_22, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_15} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_17, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_31, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_13, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_11, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_11, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_47, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_21, ~x~0=v_~x~0_6, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_15} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:56:33,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L771-2-->L771-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1588612407 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-1588612407 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out-1588612407| ~z~0_In-1588612407) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-1588612407| ~z$w_buff1~0_In-1588612407) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1588612407, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1588612407, ~z$w_buff1~0=~z$w_buff1~0_In-1588612407, ~z~0=~z~0_In-1588612407} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1588612407|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1588612407, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1588612407, ~z$w_buff1~0=~z$w_buff1~0_In-1588612407, ~z~0=~z~0_In-1588612407} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:56:33,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L771-4-->L772: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~z~0_27) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_15|, ~z~0=v_~z~0_27} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 18:56:33,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L772-->L772-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In462570625 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In462570625 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out462570625| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out462570625| ~z$w_buff0_used~0_In462570625) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In462570625, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In462570625} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In462570625, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out462570625|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In462570625} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:56:33,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L773-->L773-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In1781654037 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1781654037 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In1781654037 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1781654037 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1781654037|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In1781654037 |P1Thread1of1ForFork2_#t~ite12_Out1781654037|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1781654037, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1781654037, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1781654037, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1781654037} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1781654037, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1781654037, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1781654037, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1781654037|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1781654037} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:56:33,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L832-1-->L834: Formula: (and (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t155~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t155~0.base_9|) |v_ULTIMATE.start_main_~#t155~0.offset_8| 2)) |v_#memory_int_9|) (= |v_ULTIMATE.start_main_~#t155~0.offset_8| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t155~0.base_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t155~0.base_9| 1)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t155~0.base_9| 4) |v_#length_13|) (not (= |v_ULTIMATE.start_main_~#t155~0.base_9| 0)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t155~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t155~0.base=|v_ULTIMATE.start_main_~#t155~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t155~0.offset=|v_ULTIMATE.start_main_~#t155~0.offset_8|, #valid=|v_#valid_27|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t155~0.base, ULTIMATE.start_main_~#t155~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 18:56:33,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1750790847 256)))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-1750790847 256) 0))) (or (and .cse0 (= (mod ~z$w_buff1_used~0_In-1750790847 256) 0)) (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1750790847 256))) (= 0 (mod ~z$w_buff0_used~0_In-1750790847 256)))) .cse1 (= |P2Thread1of1ForFork0_#t~ite20_Out-1750790847| ~z$w_buff0~0_In-1750790847) (= |P2Thread1of1ForFork0_#t~ite21_Out-1750790847| |P2Thread1of1ForFork0_#t~ite20_Out-1750790847|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1750790847| ~z$w_buff0~0_In-1750790847) (= |P2Thread1of1ForFork0_#t~ite20_In-1750790847| |P2Thread1of1ForFork0_#t~ite20_Out-1750790847|) (not .cse1)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-1750790847, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1750790847, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1750790847, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1750790847, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1750790847, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1750790847|, ~weak$$choice2~0=~weak$$choice2~0_In-1750790847} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1750790847|, ~z$w_buff0~0=~z$w_buff0~0_In-1750790847, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1750790847, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1750790847, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1750790847, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1750790847, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1750790847|, ~weak$$choice2~0=~weak$$choice2~0_In-1750790847} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:56:33,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In6450241 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In6450241 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out6450241| 0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out6450241| ~z$r_buff0_thd2~0_In6450241) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In6450241, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In6450241} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In6450241, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out6450241|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In6450241} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:56:33,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L775-->L775-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1273074350 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1273074350 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1273074350 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1273074350 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1273074350| ~z$r_buff1_thd2~0_In1273074350) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1273074350| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1273074350, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1273074350, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1273074350, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1273074350} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1273074350, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1273074350, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1273074350, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1273074350|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1273074350} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:56:33,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L775-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_30| v_~z$r_buff1_thd2~0_56) (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_30|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_29|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:56:33,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In88772297 256)))) (or (and (= ~z$w_buff1~0_In88772297 |P2Thread1of1ForFork0_#t~ite23_Out88772297|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In88772297 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In88772297 256) 0) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In88772297 256))) (= 0 (mod ~z$w_buff0_used~0_In88772297 256)))) (= |P2Thread1of1ForFork0_#t~ite24_Out88772297| |P2Thread1of1ForFork0_#t~ite23_Out88772297|)) (and (= ~z$w_buff1~0_In88772297 |P2Thread1of1ForFork0_#t~ite24_Out88772297|) (= |P2Thread1of1ForFork0_#t~ite23_In88772297| |P2Thread1of1ForFork0_#t~ite23_Out88772297|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In88772297, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In88772297, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In88772297|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In88772297, ~z$w_buff1~0=~z$w_buff1~0_In88772297, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In88772297, ~weak$$choice2~0=~weak$$choice2~0_In88772297} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In88772297, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out88772297|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In88772297, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out88772297|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In88772297, ~z$w_buff1~0=~z$w_buff1~0_In88772297, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In88772297, ~weak$$choice2~0=~weak$$choice2~0_In88772297} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 18:56:33,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L798-->L798-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In378233979 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In378233979| |P2Thread1of1ForFork0_#t~ite26_Out378233979|) (not .cse0) (= ~z$w_buff0_used~0_In378233979 |P2Thread1of1ForFork0_#t~ite27_Out378233979|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In378233979 256)))) (or (and (= 0 (mod ~z$r_buff1_thd3~0_In378233979 256)) .cse1) (= (mod ~z$w_buff0_used~0_In378233979 256) 0) (and (= 0 (mod ~z$w_buff1_used~0_In378233979 256)) .cse1))) (= |P2Thread1of1ForFork0_#t~ite27_Out378233979| |P2Thread1of1ForFork0_#t~ite26_Out378233979|) (= ~z$w_buff0_used~0_In378233979 |P2Thread1of1ForFork0_#t~ite26_Out378233979|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In378233979|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In378233979, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In378233979, ~z$w_buff1_used~0=~z$w_buff1_used~0_In378233979, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In378233979, ~weak$$choice2~0=~weak$$choice2~0_In378233979} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out378233979|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out378233979|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In378233979, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In378233979, ~z$w_buff1_used~0=~z$w_buff1_used~0_In378233979, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In378233979, ~weak$$choice2~0=~weak$$choice2~0_In378233979} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:56:33,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff0_thd3~0_66)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_66, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:56:33,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L803-->L807: Formula: (and (= 0 v_~z$flush_delayed~0_11) (= v_~z~0_50 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:56:33,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-156830557 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In-156830557 256) 0))) (or (and (= ~z$w_buff0_used~0_In-156830557 |P0Thread1of1ForFork1_#t~ite5_Out-156830557|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-156830557|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-156830557, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-156830557} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-156830557|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-156830557, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-156830557} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:56:33,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L807-2-->L807-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In300433352 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In300433352 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out300433352| ~z$w_buff1~0_In300433352) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out300433352| ~z~0_In300433352)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In300433352, ~z$w_buff1_used~0=~z$w_buff1_used~0_In300433352, ~z$w_buff1~0=~z$w_buff1~0_In300433352, ~z~0=~z~0_In300433352} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out300433352|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In300433352, ~z$w_buff1_used~0=~z$w_buff1_used~0_In300433352, ~z$w_buff1~0=~z$w_buff1~0_In300433352, ~z~0=~z~0_In300433352} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:56:33,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2066610572 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In2066610572 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd1~0_In2066610572 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In2066610572 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out2066610572|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In2066610572 |P0Thread1of1ForFork1_#t~ite6_Out2066610572|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2066610572, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2066610572, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2066610572, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2066610572} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2066610572, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out2066610572|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2066610572, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2066610572, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2066610572} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:56:33,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L751-->L752: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-988858907 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-988858907 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out-988858907 ~z$r_buff0_thd1~0_In-988858907))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse1) (= ~z$r_buff0_thd1~0_Out-988858907 0)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-988858907, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-988858907} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-988858907, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-988858907|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-988858907} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:56:33,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In465363218 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In465363218 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In465363218 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In465363218 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out465363218|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out465363218| ~z$r_buff1_thd1~0_In465363218) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In465363218, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In465363218, ~z$w_buff1_used~0=~z$w_buff1_used~0_In465363218, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In465363218} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out465363218|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In465363218, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In465363218, ~z$w_buff1_used~0=~z$w_buff1_used~0_In465363218, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In465363218} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:56:33,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_30|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_29|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:56:33,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L807-4-->L808: Formula: (= v_~z~0_20 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 18:56:33,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In369803856 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In369803856 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out369803856| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out369803856| ~z$w_buff0_used~0_In369803856)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In369803856, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In369803856} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In369803856, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out369803856|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In369803856} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:56:33,644 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L809-->L809-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In-507587312 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-507587312 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-507587312 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-507587312 256) 0))) (or (and (= ~z$w_buff1_used~0_In-507587312 |P2Thread1of1ForFork0_#t~ite41_Out-507587312|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-507587312|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-507587312, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-507587312, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-507587312, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-507587312} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-507587312, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-507587312, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-507587312, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-507587312, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-507587312|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:56:33,644 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L810-->L810-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-797291343 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-797291343 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-797291343| 0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-797291343| ~z$r_buff0_thd3~0_In-797291343) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-797291343, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-797291343} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-797291343, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-797291343, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-797291343|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:56:33,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd3~0_In1646249680 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1646249680 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1646249680 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1646249680 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In1646249680 |P2Thread1of1ForFork0_#t~ite43_Out1646249680|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out1646249680| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1646249680, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1646249680, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1646249680, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1646249680} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1646249680|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1646249680, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1646249680, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1646249680, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1646249680} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:56:33,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= v_~z$r_buff1_thd3~0_121 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_121, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:56:33,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L834-1-->L840: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:56:33,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L840-2-->L840-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out265863989| |ULTIMATE.start_main_#t~ite47_Out265863989|)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In265863989 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In265863989 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out265863989| ~z$w_buff1~0_In265863989) (not .cse1) (not .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out265863989| ~z~0_In265863989) (or .cse2 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In265863989, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265863989, ~z$w_buff1~0=~z$w_buff1~0_In265863989, ~z~0=~z~0_In265863989} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In265863989, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out265863989|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265863989, ~z$w_buff1~0=~z$w_buff1~0_In265863989, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out265863989|, ~z~0=~z~0_In265863989} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:56:33,646 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1707165567 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1707165567 256)))) (or (and (= ~z$w_buff0_used~0_In1707165567 |ULTIMATE.start_main_#t~ite49_Out1707165567|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out1707165567|) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1707165567, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1707165567} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1707165567, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1707165567, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1707165567|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:56:33,646 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L842-->L842-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In1256221764 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In1256221764 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In1256221764 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1256221764 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out1256221764| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1256221764 |ULTIMATE.start_main_#t~ite50_Out1256221764|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1256221764, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1256221764, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1256221764, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1256221764} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1256221764|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1256221764, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1256221764, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1256221764, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1256221764} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:56:33,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1205151473 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In1205151473 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1205151473 |ULTIMATE.start_main_#t~ite51_Out1205151473|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out1205151473|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1205151473, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1205151473} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1205151473, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1205151473|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1205151473} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:56:33,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In200355811 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In200355811 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In200355811 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In200355811 256)))) (or (and (= ~z$r_buff1_thd0~0_In200355811 |ULTIMATE.start_main_#t~ite52_Out200355811|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out200355811|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In200355811, ~z$w_buff0_used~0=~z$w_buff0_used~0_In200355811, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In200355811, ~z$w_buff1_used~0=~z$w_buff1_used~0_In200355811} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out200355811|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In200355811, ~z$w_buff0_used~0=~z$w_buff0_used~0_In200355811, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In200355811, ~z$w_buff1_used~0=~z$w_buff1_used~0_In200355811} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:56:33,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [886] [886] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (= (ite (not (and (= 2 v_~__unbuffered_p1_EAX~0_22) (= v_~x~0_65 2) (= v_~__unbuffered_p2_EBX~0_27 0) (= v_~__unbuffered_p1_EBX~0_23 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_18 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_101 |v_ULTIMATE.start_main_#t~ite52_39|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_23, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_27, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_65} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_23, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_27, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_101, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_65, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:56:33,715 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_f3221288-83c2-466f-a2a7-0cd7ac4adb9d/bin/uautomizer/witness.graphml [2019-12-07 18:56:33,715 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:56:33,716 INFO L168 Benchmark]: Toolchain (without parser) took 153089.58 ms. Allocated memory was 1.0 GB in the beginning and 8.7 GB in the end (delta: 7.7 GB). Free memory was 937.1 MB in the beginning and 4.7 GB in the end (delta: -3.8 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. [2019-12-07 18:56:33,717 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:56:33,717 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.35 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.8 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -124.5 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:56:33,717 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.57 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:56:33,717 INFO L168 Benchmark]: Boogie Preprocessor took 25.51 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:56:33,718 INFO L168 Benchmark]: RCFGBuilder took 412.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.9 MB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:56:33,718 INFO L168 Benchmark]: TraceAbstraction took 152130.00 ms. Allocated memory was 1.1 GB in the beginning and 8.7 GB in the end (delta: 7.6 GB). Free memory was 994.6 MB in the beginning and 4.8 GB in the end (delta: -3.8 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:56:33,718 INFO L168 Benchmark]: Witness Printer took 85.78 ms. Allocated memory is still 8.7 GB. Free memory was 4.8 GB in the beginning and 4.7 GB in the end (delta: 48.4 MB). Peak memory consumption was 48.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:56:33,720 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.35 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.8 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -124.5 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.57 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.51 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 412.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.9 MB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 152130.00 ms. Allocated memory was 1.1 GB in the beginning and 8.7 GB in the end (delta: 7.6 GB). Free memory was 994.6 MB in the beginning and 4.8 GB in the end (delta: -3.8 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 85.78 ms. Allocated memory is still 8.7 GB. Free memory was 4.8 GB in the beginning and 4.7 GB in the end (delta: 48.4 MB). Peak memory consumption was 48.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 177 ProgramPointsBefore, 93 ProgramPointsAfterwards, 214 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 34 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 32 ChoiceCompositions, 7398 VarBasedMoverChecksPositive, 271 VarBasedMoverChecksNegative, 70 SemBasedMoverChecksPositive, 270 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78628 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t153, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] FCALL, FORK 0 pthread_create(&t154, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 1 z$w_buff1 = z$w_buff0 [L734] 1 z$w_buff0 = 1 [L735] 1 z$w_buff1_used = z$w_buff0_used [L736] 1 z$w_buff0_used = (_Bool)1 [L762] 2 x = 2 [L765] 2 __unbuffered_p1_EAX = x [L768] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L771] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L772] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L834] FCALL, FORK 0 pthread_create(&t155, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 y = 1 [L788] 3 __unbuffered_p2_EAX = y [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 z$flush_delayed = weak$$choice2 [L794] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L796] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L773] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L774] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L748] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L798] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L801] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L748] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L807] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L749] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L750] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L808] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L809] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L810] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L840] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L840] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L841] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L842] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L843] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 151.9s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 36.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7621 SDtfs, 11954 SDslu, 19100 SDs, 0 SdLazy, 13931 SolverSat, 835 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 439 GetRequests, 78 SyntacticMatches, 20 SemanticMatches, 341 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1780 ImplicationChecksByTransitivity, 3.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=301435occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 95.5s AutomataMinimizationTime, 32 MinimizatonAttempts, 747938 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 1433 NumberOfCodeBlocks, 1433 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 1334 ConstructedInterpolants, 0 QuantifiedInterpolants, 309789 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...